Commit 5701659004d6 ("net: stmmac: Fix race between stmmac_drv_probe and
stmmac_open") re-ordered how the MDIO bus registration and the network
device are registered, but missed to unwind the MDIO bus registration in
case we fail to register the network device.
Fixes: 5701659004d6 ("net: stmmac:
> -Original Message-
> From: Kishan Sandeep [mailto:sandeepkishan...@gmail.com]
> Sent: Wednesday, December 28, 2016 7:56 PM
> To: Kweh, Hock Leong
> Cc: David Miller ; f.faine...@gmail.com;
> joao.pi...@synopsys.com; peppe.cavall...@st.com;
Add the dt-bindings header for the rk3328, that gets shared between
the clock controller and the clock references in the dts.
Add softreset ID for rk3328.
Signed-off-by: Elaine Zhang
---
include/dt-bindings/clock/rk3328-cru.h | 403 +
1
Add the clock tree definition for the new rk3328 SoC.
Changes in v5:
fix up some code style, remove grf clk init and cru dump.
Changes in v4:
adjust the pacth 3 and 4 order.
Changes in v3:
fix up the pll parent only xin24m.
Changes in v2:
fix up these *_sample error description.
The rk3328's pll and clock are similar with rk3036's,
it different with pll_mode_mask, the rk3328 soc
pll mode only one bit(rk3036 soc have two bits)
so these should be independent and separate from
the series of rk3328s.
Changes in v4:
adjust the pacth 3 and 4 order.
move pll_rk3328 to patch
Add devicetree bindings for Rockchip cru which found on
Rockchip SoCs.
Changes in v4:
dropping the "rockchip,cru" and "syscon" properties for bindings of rk3328
Signed-off-by: Elaine Zhang
---
.../bindings/clock/rockchip,rk3328-cru.txt | 57
On Wed, Dec 21, 2016 at 03:49:35AM -0800, Bjorn Andersson wrote:
> As per the device tree binding the apq8064 scm node requires the core
> clock to be specified, so add this.
>
> Cc: John Stultz
> Signed-off-by: Bjorn Andersson
> ---
>
On Wed, Dec 28, 2016 at 04:30:27PM +0100, Michal Hocko wrote:
> From: Michal Hocko
>
> Our reclaim process has several tracepoints to tell us more about how
> things are progressing. We are, however, missing a tracepoint to track
> active list aging. Introduce
On Wed, Dec 28, 2016 at 04:30:28PM +0100, Michal Hocko wrote:
> From: Michal Hocko
>
> mm_vmscan_lru_isolate shows the number of requested, scanned and taken
> pages. This is mostly OK but on 32b systems the number of scanned pages
> is quite misleading because it includes both
On Wed, Dec 28, 2016 at 04:30:29PM +0100, Michal Hocko wrote:
> From: Michal Hocko
>
> mm_vmscan_lru_isolate currently prints only whether the LRU we isolate
> from is file or anonymous but we do not know which LRU this is. It is
> useful to know whether the list is file or
On 12/23, Imran Khan wrote:
> On 12/22/2016 6:01 AM, Stephen Boyd wrote:
> >
> > Raw numbers sounds fine, but how do we know what ODM it is to
> > understand how to parse the numbers appropriately? Perhaps the
> > smem DT entry needs to have a property indicating the ODM that
> > has configured
The high-speed phy on qcom SoCs is controlled via the ULPI
viewport.
Cc: Kishon Vijay Abraham I
Cc:
Acked-by: Rob Herring
Signed-off-by: Stephen Boyd
---
.../devicetree/bindings/phy/qcom,usb-hs-phy.txt|
We're not properly marking the glue layer/wrapper device as
runtime active, so runtime PM believes that the hardware state is
inactive when we call pm_runtime_enable() in this driver. This
causes a problem when the glue layer has a power domain
associated with it, because runtime PM will go and
If two devices are probed with this same driver, they'll share
the same platform data structure, while the chipidea core layer
writes and modifies it. This can lead to interesting results
especially if one device is an OTG type chipidea controller and
another is a host. Let's create a copy of this
The ULPI phy on qcom platforms needs to be initialized and
powered on after a USB reset and before we toggle the run/stop
bit. Otherwise, the phy locks up and doesn't work properly. Hook
the phy initialization into the RESET event and the phy power off
into the STOPPED event.
Acked-by: Peter Chen
If something fails in ci_hdrc_add_device() due to probe defer, we
shouldn't print an error message. Be silent in this case as we'll
try probe again later.
Acked-by: Peter Chen
Cc: Greg Kroah-Hartman
Signed-off-by: Stephen Boyd
The HSIC USB controller on qcom SoCs has an integrated all
digital phy controlled via the ULPI viewport.
Cc: Kishon Vijay Abraham I
Acked-by: Rob Herring
Cc:
Signed-off-by: Stephen Boyd
---
On 12/20, Vivek Gautam wrote:
> Qualcomm SOCs have QMP phy controller that provides support
> to a number of controller, viz. PCIe, UFS, and USB.
> Add a new driver, based on generic phy framework, for this
> phy controller.
>
> Signed-off-by: Vivek Gautam
>
On 2016.12.28 14:33 Rafael J. Wysocki wrote:
> On Wed, Dec 28, 2016 at 11:00 AM, Sedat Dilek wrote:
>> On Wed, Dec 28, 2016 at 9:29 AM, Jani Nikula wrote:
>>> On Wed, 28 Dec 2016, Sedat Dilek wrote:
On Tue, Dec 27, 2016
> -Original Message-
> From: Florian Fainelli [mailto:f.faine...@gmail.com]
> Sent: Thursday, December 29, 2016 2:43 AM
> To: Kweh, Hock Leong ; David Miller
>
> Cc: joao.pi...@synopsys.com; peppe.cavall...@st.com;
>
On Mon, Dec 26, 2016 at 01:48:40PM +0100, Michal Hocko wrote:
> On Fri 23-12-16 23:26:00, Nils Holland wrote:
> > On Fri, Dec 23, 2016 at 03:47:39PM +0100, Michal Hocko wrote:
> > >
> > > Nils, even though this is still highly experimental, could you give it a
> > > try please?
> >
> > Yes, no
On Wed, Dec 28, 2016 at 05:42:13PM -0600, Grygorii Strashko wrote:
Grygorii,
> Now below code sequence causes "Unable to handle kernel NULL pointer
> dereference.." exception and system crash during CPSW CPDMA initialization:
>
> cpsw_probe
> |-cpdma_chan_create (TX channel)
>
Hi Randy,
On 12/29/2016 12:34 AM, Randy Li wrote:
> This reverts commit f90142683f04bcb0729bf0df67a5e29562b725b9.
> It is reported that making RK3288 can't boot from eMMC/MMC.
Could you explain in more detail?
As you mentioned, this patch is making that RK3288 can't boot..then why?
Good way
TL;DR: incremental -rt patch uprev from 4.8-rt to the new 4.9-rt
covering 175 touch down points on mainline merges & tags by Linus;
useful for rt developers and bugfixers to research and bisect with.
If you just want the bisect points generated on your machine, then:
mkdir rt-test
cd
As NAND support for Freescale/NXP IFC controller is available on
LS1021A, the dependency for LS1021A is added.
Signed-off-by: Alison Wang
---
drivers/mtd/nand/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/Kconfig
On Wed, 28 Dec 2016 20:16:56 -0800
Linus Torvalds wrote:
> On Wed, Dec 28, 2016 at 8:08 PM, Nicholas Piggin wrote:
> >
> > Okay. The name could be a bit better though I think, for readability.
> > Just a BUILD_BUG_ON if it is not constant and
Hi all,
This patch series removes some duplicate code between the Kurobox and the
Terastation Pro 2 since they both use the same on-board microcontroller (micon)
attached to their UART1 for system restart.
Future patches will add support for the LEDs, temperature, FAN that the micro
controller
This driver is currently only used to reboot the devices, but the
microcontroller hanging off UART1 on the Buffalo Kurobox Pro and
Terastation II Pro/Live is capable of a lot more than that, which we
will support in subsequent patches. For now, just add the reboot
functionality to make the kernel
Convert the Kurobox Pro and Terastation Pro II/Live machines to utilize
the MFD_MICON driver which currently provides reboot support, but will
later be extended to support LEDs, buttons, FAN control and temperature.
Signed-off-by: Florian Fainelli
---
On Wed, Dec 28, 2016 at 01:58:06PM +0800, Ding Tianhong wrote:
> Hi, Paul:
>
> I try to debug this problem and found this solution could work well for both
> problem scene.
>
>
> diff --git a/kernel/rcu/tree_plugin.h b/kernel/rcu/tree_plugin.h
> index 85c5a88..dbc14a7 100644
> ---
On Wed, 28 Dec 2016 11:17:00 -0800
Linus Torvalds wrote:
> On Tue, Dec 27, 2016 at 7:53 PM, Nicholas Piggin wrote:
> >>
> >> Yeah, that patch is disgusting, and doesn't even help x86.
> >
> > No, although it would help some cases (but granted
On Wed, 28 Dec 2016 15:03:02 +0100, Wolfram Sang said:
> > I have absolutely no idea how to you want to achieve calling that
> > i2c_new_device() registration
> > without kernel patches.
>
> Documentation/i2c/instantiating-devices lists all supported methods.
> Method 4 is userspace instantiation.
Now below code sequence causes "Unable to handle kernel NULL pointer
dereference.." exception and system crash during CPSW CPDMA initialization:
cpsw_probe
|-cpdma_chan_create (TX channel)
|-cpdma_chan_split_pool
|-cpdma_chan_set_descs(for TX channels)
|-cpdma_chan_set_descs(for RX
Signed-off-by: Xishi Qiu
---
mm/zsmalloc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c
index 9cc3c0b..2d6c92e 100644
--- a/mm/zsmalloc.c
+++ b/mm/zsmalloc.c
@@ -364,7 +364,7 @@ static struct zspage
On Wed, Dec 28, 2016 at 03:50:57PM +0100, Andreas Schwab wrote:
> On Dez 28 2016, "Harisangam, Sharvari (S.)"
> wrote:
>
> > + return !!(ssi_private->dai_fmt & SND_SOC_DAIFMT_AC97) ==
> > + SND_SOC_DAIFMT_AC97;
>
> This is never true.
>
> Andreas.
We don't call hw_device_reset() with the ci->lock held, so it
doesn't seem like this lock here is protecting anything. Let's
just remove it. This allows us to call sleeping functions like
phy_init() from within the CI_HDRC_CONTROLLER_RESET_EVENT hook.
Acked-by: Peter Chen
Cc:
The qcom HSIC ULPI phy doesn't have any bits set in the vendor or
product ID registers. This makes it impossible to make a ULPI
driver match against the ID registers. Add support to discover
the ULPI phys via DT help alleviate this problem. In the DT case,
we'll look for a ULPI bus node underneath
The chipidea/udc.c file sends a CI_HDRC_CONTROLLER_RESET_EVENT to
the wrapper drivers when it calls hw_device_reset(), but that
function is not called from chipidea/host.c. And the udc.c file
sends the CI_HDRC_CONTROLLER_STOPPED_EVENT but the host.c file
doesn't do anything.
The intent of the
The ULPI bus can be built as a module, and it will soon be
calling these functions when it supports probing devices from DT.
Export them so they can be used by the ULPI module.
Acked-by: Rob Herring
Cc:
Signed-off-by: Stephen Boyd
With the id and vbus detection done via extcon we need to make
sure we poll the status of OTGSC properly by considering what the
extcon is saying, and not just what the register is saying. Let's
move this hw_wait_reg() function to the only place it's used and
simplify it for polling the OTGSC
On 12/20, Vivek Gautam wrote:
> PHY transceiver driver for QUSB2 phy controller that provides
> HighSpeed functionality for DWC3 controller present on
> Qualcomm chipsets.
>
> Signed-off-by: Vivek Gautam
One comment below, but otherwise
Reviewed-by: Stephen Boyd
The ULPI phy on qcom platforms needs to be initialized and
powered on after a USB reset and before we toggle the run/stop
bit. Otherwise, the phy locks up and doesn't work properly.
Therefore, add a flag to skip any phy power management in the
core layer, leaving it up to the glue driver to
On 12/20, Vivek Gautam wrote:
> +
> +Example:
> + pcie_phy: phy@34000 {
> + compatible = "qcom,msm8996-qmp-pcie-phy";
> + reg = <0x034000 0x48f>,
> + <0x035000 0x5bf>,
> + <0x036000 0x5bf>,
> + <0x037000
On Thu, Dec 29, 2016 at 09:31:54AM +0900, Minchan Kim wrote:
> On Mon, Dec 26, 2016 at 01:48:40PM +0100, Michal Hocko wrote:
> > On Fri 23-12-16 23:26:00, Nils Holland wrote:
> > > On Fri, Dec 23, 2016 at 03:47:39PM +0100, Michal Hocko wrote:
> > > >
> > > > Nils, even though this is still highly
There are two bugfixes in this patch:
1. When the execution go to the ib_umem_odp_get() path, pid should be put
back.
2. When the memory allocation fail, the pid also should be put back before
exit.
Signed-off-by: Kenneth Lee
---
drivers/infiniband/core/umem.c | 2
There are many reasons of CMA allocation failure such as EBUSY, ENOMEM, EINTR.
This patch prints the error value and bitmap status to know available pages
regarding fragmentation.
This is an ENOMEM example with this patch.
[ 11.616321] [2: Binder:711_1: 740] cma: cma_alloc: alloc failed,
2016-11-21 20:26 GMT+08:00 Peter Zijlstra :
> On Mon, Nov 21, 2016 at 12:14:32PM +, Juri Lelli wrote:
>> On 21/11/16 11:19, Peter Zijlstra wrote:
>
>> > So no tunables and rate limits here at all please.
>> >
>> > During LPC we discussed the rampup and decay issues and
We need to pick the correct phy at runtime based on how the SoC
has been wired onto the board. If the secondary phy is used, take
it out of reset and mux over to it by writing into the TCSR
register. Make sure to do this on reset too, because this
register is reset to the default value (primary
The two extcon notifiers are almost the same except for the
variable name for the cable structure and the id notifier inverts
the cable->state logic. Make it the same and replace two
functions with one to save some lines. This also makes it so that
the id cable state is true when the id pin is
From: Peter Chen
At some situations, the vbus may already be there before starting
gadget. So we need to check vbus event after switch to gadget in
order to handle missing vbus event. The typical use cases are plugging
vbus cable before driver load or the vbus has already
The msm chipidea controller uses two main clks, an AHB clk to
read/write the MMIO registers and a core clk called the system
clk that drives the controller itself. Add support for these clks
as they're required in all designs.
Also add support for an optional third clk that we need to turn
on to
The core framework already handles setting this parameter with a
platform quirk. Add the appropriate flag so that we always set
AHBBURST to 0. Technically DT should be doing this, but we always
do it for msm chipidea devices so setting the flag in the driver
works just as well. If the burst needs
The MSM_USB_BASE macro trick is not very clear, and we're using
it for only one register write so let's just move to using
hw_write_id_reg() and passing the ci pointer instead. That
clearly shows what offset we're using and avoids needing to
include the msm_hsusb_hw.h file when we're going to
The CI_HDRC_CONTROLLER_STOPPED_EVENT may want to call sleeping
APIs similar to how _gadget_stop_activity() may. Let's drop the
lock across the event so that glue drivers can make sleeping
calls.
Cc: Peter Chen
Cc: Greg Kroah-Hartman
Signed-off-by:
When the RESET bit is set in the USBCMD register it resets quite
a few of the wrapper's registers to their reset state. This
includes the GENCONFIG and GENCONFIG2 registers. Currently this
is done by the usb phy and ehci-msm drivers writing into the
controller wrapper's MMIO address space. Let's
We're currently emulating the vbus and id interrupts in the OTGSC
read API, but we also need to make sure that if we're handling
the events with extcon that we don't enable the interrupts for
those events in the hardware. Therefore, properly emulate this
register if we're using extcon, but don't
On 12/15, Avaneesh Kumar Dwivedi wrote:
> @@ -148,29 +167,34 @@ enum {
> Q6V5_SUPPLY_PLL,
> };
>
> -static int q6v5_regulator_init(struct q6v5 *qproc)
> +static int q6v5_regulator_init(struct device *dev, struct reg_info *regs,
> + const struct qcom_mss_reg_res
On 12/15, Avaneesh Kumar Dwivedi wrote:
> Add support to use reset control framework for resetting MSS
> with hexagon v56 1.5.0.
>
> Signed-off-by: Avaneesh Kumar Dwivedi
> Reviewed-by: Bjorn Andersson
> ---
Applied to clk-next. I take it
On 12/28/2016 04:28 PM, Kweh, Hock Leong wrote:
>> Although this is required, we can't be doing it in all circumstances, we
>> need to
>> mimic what stmmac_drv_remove() does.
>>
>> Let me submit an incremental fix which takes care of mdio bus unregistration.
>> --
>> Florian
>
> Noted & Thanks.
Hi,
Sorry for the delay (I'd got some problem in my procmailrc file, and miss this
mail).
The new patch, with title "[PATCH] ib umem: bugfix: mixed put_pid()s in
ib_umem_get()", has been sent.
On Thu, Dec 22, 2016 at 10:00:57AM +0200, Mark Bloch wrote:
> Date: Thu, 22 Dec 2016 10:00:57 +0200
On Thu, Dec 01, 2016 at 11:02:18PM +0100, Richard Weinberger wrote:
> This is the first step to support proper telldir/seekdir()
> in UBIFS.
> Let's report 64bit cookies in readdir(). The cookie is a combination
> of the entry key plus the double hash value.
Would it be possible to explain what
On Wed, Dec 28, 2016 at 8:08 PM, Nicholas Piggin wrote:
>
> Okay. The name could be a bit better though I think, for readability.
> Just a BUILD_BUG_ON if it is not constant and correct bit numbers?
I have a slightly edited patch - moved the comments around and added
some new
On Thu, Dec 29, 2016 at 4:34 AM, Stephen Boyd wrote:
> On 12/20, Vivek Gautam wrote:
>> +
>> +Example:
>> + pcie_phy: phy@34000 {
>> + compatible = "qcom,msm8996-qmp-pcie-phy";
>> + reg = <0x034000 0x48f>,
>> + <0x035000
On 12/29/2016 4:05 AM, Stephen Boyd wrote:
> On 12/23, Imran Khan wrote:
>> On 12/22/2016 6:01 AM, Stephen Boyd wrote:
>>>
>>> Raw numbers sounds fine, but how do we know what ODM it is to
>>> understand how to parse the numbers appropriately? Perhaps the
>>> smem DT entry needs to have a property
Hi,
On Wednesday 28 December 2016 10:50 PM, Joao Pinto wrote:
> Às 5:17 PM de 12/28/2016, Joao Pinto escreveu:
>> Às 4:41 PM de 12/28/2016, Bjorn Helgaas escreveu:
>>> On Wed, Dec 28, 2016 at 01:57:13PM +, Joao Pinto wrote:
Às 9:22 AM de 12/28/2016, Christoph Hellwig escreveu:
> On
On Wed, Dec 28, 2016 at 11:32 PM, Rafael J. Wysocki wrote:
> On Wed, Dec 28, 2016 at 11:00 AM, Sedat Dilek wrote:
>> On Wed, Dec 28, 2016 at 9:29 AM, Jani Nikula wrote:
>>> On Wed, 28 Dec 2016, Sedat Dilek
On Tue, Dec 27, 2016 at 04:55:33PM +0100, Michal Hocko wrote:
> Hi,
> could you try to run with the following patch on top of the previous
> one? I do not think it will make a large change in your workload but
> I think we need something like that so some testing under which is known
> to make a
> -Original Message-
> From: linux-usb-ow...@vger.kernel.org [mailto:linux-usb-
> ow...@vger.kernel.org] On Behalf Of Felipe Balbi
> Sent: Wednesday, December 28, 2016 8:19 AM
> To: Janusz Dziedzic
> Cc: Lu Baolu ; Baolin Wang
>
On Tue, Nov 22, 2016 at 04:01:06PM -0300, Arnaldo Carvalho de Melo wrote:
> Sorry for the overly long delay, trying it now after fixing up a
> conflict with a recent patchkit (branch stuff) I tested it by running
> 'perf top -g' and I'm getting some assertion bugs:
>
>
> # perf top -g
>
Hello Mical Hocko and Michal Nazarewicz
Thank you for your comment.
I agree with you on that the new bitmap API may not be used widely yet.
Let me give up the bitmap API and resend another patch regarding CMA allocation
failure.
Thank you.
On 2016년 12월 28일 23:14, Michal Nazarewicz wrote:
> On
For CMA allocations, we expect to occasionally hit this error path, at
which point CMA will retry. Given that, we shouldn't be spamming
dmesg about it.
The Raspberry Pi graphics driver does frequent CMA allocations, and
during regression testing this printk was sometimes occurring 100s of
times
Changes in v5:
fix up some code style, remove grf clk init and cru dump.
Changes in v4:
dropping the "rockchip,cru" and "syscon" properties for bindings of rk3328
adjust the pacth 3 and 4 order.
move pll_rk3328 to patch 3.
Changes in v3:
fix up the pll type pll_rk3328 description and
On 12/26/2016 09:24 PM, Kirill A. Shutemov wrote:
> On Mon, Dec 26, 2016 at 06:06:01PM -0800, Andy Lutomirski wrote:
>> On Mon, Dec 26, 2016 at 5:54 PM, Kirill A. Shutemov
>> wrote:
>>> This patch introduces new rlimit resource to manage maximum virtual
>>>
FYI, we noticed the following commit:
commit: 1da5c46fa965ff90f5ffc080b6ab3fae5e227bc3 ("kthread: Make struct kthread
kmalloc'ed")
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
in testcase: boot
on test machine: qemu-system-x86_64 -enable-kvm -cpu host -smp 2 -m
>>>
> Hi Gang, one small comment below:
>
> On Wed, Dec 21, 2016 at 2:20 AM, Gang He wrote:
>> First, move setting fe_done = 1 in spin lock, avoid bring
>> any potential race condition. Second, tune mlog message level
>> from ERROR to NOTICE, since the message should not
On Thu, Dec 01, 2016 at 11:02:21PM +0100, Richard Weinberger wrote:
> Since we have 64bit readdir cookies and export operations
> we can finally enable NFS export support for UBIFS.
>
> Signed-off-by: Richard Weinberger
> ---
> fs/ubifs/dir.c | 9 ++---
> fs/ubifs/super.c
On Wed, Dec 14, 2016 at 12:58:38AM +, Linux Kernel wrote:
> Web:
> https://git.kernel.org/torvalds/c/712668460594294d74c13f2a023398a597fbe95f
> Commit: 712668460594294d74c13f2a023398a597fbe95f
> Parent: 2195c31b127def509c806fe8a9d3b4092a28ce31
> Refname:
The state of USB ChipIdea support on Qualcomm's platforms is not great.
The DT description of these devices requires up to three different nodes
for what amounts to be the same hardware block, when there should really
only be one. Furthermore, the "phy" driver that is in mainline (phy-msm-usb.c)
If the phy supports it, call phy_set_mode() to pull up D+ when
required by setting the mode to PHY_MODE_USB_DEVICE. If we want
to remove the pullup, set the mode to PHY_MODE_USB_HOST.
Cc: Peter Chen
Cc: Greg Kroah-Hartman
Signed-off-by: Stephen
The MSM chipidea wrapper has two bits that are used to reset the
first or second phy. Add support for these bits via the reset
controller framework, so that phy drivers can reset their
hardware at the right time during initialization.
Acked-by: Peter Chen
Cc: Greg
Some phys for the chipidea controller are controlled via the ULPI
viewport. Add support for the ULPI bus so that these sorts of
phys can be probed and read/written automatically without having
to duplicate the viewport logic in each phy driver.
Acked-by: Peter Chen
Cc: Greg
In the case of ULPI devices, we want to be able to load the
driver before registering the device so that we don't get stuck
in a loop waiting for the phy module to appear and failing usb
controller probe. Currently we request the ulpi module via the
ulpi ids, but in the DT case we might need to
On Tue, Nov 01, 2016 at 04:25:12PM +0200, Boaz Harrosh wrote:
> >> What about memcpy_to_pmem() in linux/pmem.h it already has all the arch
> >> switches.
> >>
> >> Feels bad to add yet just another arch switch over __copy_user_nocache
> >>
> >> Just feels like too many things that do the same
On Fri, Dec 16, 2016 at 12:06:55AM +0530, Hari Bathini wrote:
> This patch-set overcomes this limitation by using cgroup identifier as
> container unique identifier. A new PERF_RECORD_NAMESPACES event that
> records namespaces related info is introduced, from which the cgroup
> namespace's device
> On 26 Dec 2016, at 17:26, Seraphime Kirkovski wrote:
>
> This removes the uses of ACCESS_ONCE in favor of READ_ONCE
>
> Signed-off-by: Seraphime Kirkovski
> ---
> fs/ceph/addr.c | 4 ++--
> fs/ceph/caps.c | 2 +-
> fs/ceph/dir.c
On 12/27/16 12:03 PM, David Miller wrote:
> From: Wei Zhang
> Date: Tue, 27 Dec 2016 17:52:24 +0800
>
>> When we send a packet for our own local address on a non-loopback
>> interface (e.g. eth0), due to the change had been introduced from
>> commit 0b922b7a829c ("net:
On ata passthru commands scsih_qcmd() ends up spinning in
scsi_wait_for_queuecommand() indefinitely. scsih_qcmd() is called from
__blk_run_queue_uncond() which first increments request_fn_active to a
non-zero value. Thus, scsi_wait_for_queuecommand() never completes because
its spinning waiting
On Thu, Dec 29, 2016 at 10:24:43AM +0800, Kenneth Lee wrote:
> There are two bugfixes in this patch:
>
> 1. When the execution go to the ib_umem_odp_get() path, pid should be put
>back.
> 2. When the memory allocation fail, the pid also should be put back before
>exit.
>
> Signed-off-by:
Hi Stephen,
On Thu, Dec 29, 2016 at 4:46 AM, Stephen Boyd wrote:
> On 12/20, Vivek Gautam wrote:
>> Qualcomm SOCs have QMP phy controller that provides support
>> to a number of controller, viz. PCIe, UFS, and USB.
>> Add a new driver, based on generic phy framework, for
On Thu 29-12-16 15:02:04, Minchan Kim wrote:
> On Wed, Dec 28, 2016 at 04:30:29PM +0100, Michal Hocko wrote:
> > From: Michal Hocko
> >
> > mm_vmscan_lru_isolate currently prints only whether the LRU we isolate
> > from is file or anonymous but we do not know which LRU this is.
On Wednesday, December 28, 2016 11:30 PM Michal Hocko wrote:
> From: Michal Hocko
>
> mm_vmscan_lru_isolate shows the number of requested, scanned and taken
> pages. This is mostly OK but on 32b systems the number of scanned pages
> is quite misleading because it includes both
Delete extra semicolon, it was introduced in
3783689 zsmalloc: introduce zspage structure
Signed-off-by: Xishi Qiu
---
mm/zsmalloc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c
index 9cc3c0b..2d6c92e 100644
---
Hi Sergey,
On Thu, Dec 29, 2016 at 03:52:05PM +0900, Sergey Senozhatsky wrote:
> On (12/29/16 15:44), Minchan Kim wrote:
> > On Thu, Dec 29, 2016 at 10:06:47AM +0800, Xishi Qiu wrote:
> > > Signed-off-by: Xishi Qiu
> > > ---
> > > mm/zsmalloc.c | 2 +-
> > > 1 file changed,
On Wednesday, December 28, 2016 11:30 PM Michal Hocko wrote:
> From: Michal Hocko
>
> Our reclaim process has several tracepoints to tell us more about how
> things are progressing. We are, however, missing a tracepoint to track
> active list aging. Introduce
On (12/29/16 15:44), Minchan Kim wrote:
> On Thu, Dec 29, 2016 at 10:06:47AM +0800, Xishi Qiu wrote:
> > Signed-off-by: Xishi Qiu
> > ---
> > mm/zsmalloc.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c
> > index
On Wednesday, December 28, 2016 11:30 PM Michal Hocko wrote:
> From: Michal Hocko
>
> the trace point is not used since 925b7673cce3 ("mm: make per-memcg LRU
> lists exclusive") so it can be removed.
>
> Signed-off-by: Michal Hocko
> ---
Acked-by: Hillf
On Wed, Dec 28, 2016 at 04:40:16PM -0500, Dave Jones wrote:
> sg_io+0x113/0x470
Can you resolve that to a source line using a gdb?
On Thu, Dec 29, 2016 at 04:34:03PM +0900, Sergey Senozhatsky wrote:
> Hello,
>
> On (12/29/16 15:59), Minchan Kim wrote:
> [..]
> > > I don't know... do we want to have it as a separate patch?
> > > may be we can fold it into some other patch someday later.
> >
> > Xishi spent his time to make
On 2016-12-28 23:01, Lukasz Majewski wrote:
> Hi Stefan,
>
>> Hi Stefan,
>>
>> > On 2016-12-26 23:55, Lukasz Majewski wrote:
>> > > From: Sascha Hauer
>> > >
>> > > The use of the ipg clock was introduced with commit 7b27c160c681
>> > > ("pwm: i.MX: fix clock lookup").
>>
Linus Walleij writes:
> On Thu, Dec 8, 2016 at 3:35 PM, Arvind Yadav
> wrote:
>
>> In functions pxa2xx_build_functions, the memory allocated for
>> 'functions' is live within the function only. After the
>> allocation it is immediately freed
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