[PATCH -mm 0/5] fault-inject: improve fail-nth interface

2017-04-06 Thread Akinobu Mita
This series tries to improve fail-nth interface which was added to -mm tree recently. Akinobu Mita (5): fault-inject: automatically detect the number base for fail-nth write interface fault-inject: parse as natural 1-based value for fail-nth write interface fault-inject: make

[PATCH -mm 0/5] fault-inject: improve fail-nth interface

2017-04-06 Thread Akinobu Mita
This series tries to improve fail-nth interface which was added to -mm tree recently. Akinobu Mita (5): fault-inject: automatically detect the number base for fail-nth write interface fault-inject: parse as natural 1-based value for fail-nth write interface fault-inject: make

Your long awaited part payment of $2.5.000.00Usd

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Your long awaited part payment of $2.5.000.00Usd

2017-04-06 Thread UNITED NATIONS
Attention: Beneficiary, Your long awaited part payment of $2,500,000.00 Usd (TWO MILLION FIVE Hundred Thousand United State Dollars) is ready for immediate release to you, and it was electronically credited into an ATM Visa Card for easy delivery. Your new Payment Reference No.- 6363836,

Re: [PATCH] [media] imx: csi: retain current field order and colorimetry setting as default

2017-04-06 Thread Philipp Zabel
On Thu, 2017-04-06 at 16:20 +0200, Hans Verkuil wrote: > On 04/06/2017 03:55 PM, Philipp Zabel wrote: > > If the the field order is set to ANY in set_fmt, choose the currently > > set field order. If the colorspace is set to DEFAULT, choose the current > > colorspace. If any of xfer_func,

Re: [PATCH] [media] imx: csi: retain current field order and colorimetry setting as default

2017-04-06 Thread Philipp Zabel
On Thu, 2017-04-06 at 16:20 +0200, Hans Verkuil wrote: > On 04/06/2017 03:55 PM, Philipp Zabel wrote: > > If the the field order is set to ANY in set_fmt, choose the currently > > set field order. If the colorspace is set to DEFAULT, choose the current > > colorspace. If any of xfer_func,

[PATCH v2] vfio/type1: Remove locked page accounting workqueue

2017-04-06 Thread Alex Williamson
If the mmap_sem is contented then the vfio type1 IOMMU backend will defer locked page accounting updates to a workqueue task. This has a few problems and depending on which side the user tries to play, they might be over-penalized for unmaps that haven't yet been accounted, or able to race the

[PATCH v2] vfio/type1: Remove locked page accounting workqueue

2017-04-06 Thread Alex Williamson
If the mmap_sem is contented then the vfio type1 IOMMU backend will defer locked page accounting updates to a workqueue task. This has a few problems and depending on which side the user tries to play, they might be over-penalized for unmaps that haven't yet been accounted, or able to race the

Re: [PATCH 7/8] x86: Enable 5-level paging support

2017-04-06 Thread Juergen Gross
On 06/04/17 16:01, Kirill A. Shutemov wrote: > Most of things are in place and we can enable support of 5-level paging. > > Enabling XEN with 5-level paging requires more work. The patch makes XEN > dependent on !X86_5LEVEL. > > Signed-off-by: Kirill A. Shutemov

Re: [PATCH 7/8] x86: Enable 5-level paging support

2017-04-06 Thread Juergen Gross
On 06/04/17 16:01, Kirill A. Shutemov wrote: > Most of things are in place and we can enable support of 5-level paging. > > Enabling XEN with 5-level paging requires more work. The patch makes XEN > dependent on !X86_5LEVEL. > > Signed-off-by: Kirill A. Shutemov > --- > arch/x86/Kconfig |

Re: [PATCH] mm: vmscan: fix IO/refault regression in cache workingset transition

2017-04-06 Thread Johannes Weiner
On Wed, Apr 05, 2017 at 06:11:04PM -0400, Rik van Riel wrote: > On Tue, 2017-04-04 at 18:00 -0400, Johannes Weiner wrote: > > > + > > + /* > > +  * When refaults are being observed, it means a new > > workingset > > +  * is being established. Disable active list protection to > > get > > +

Re: [PATCH] mm: vmscan: fix IO/refault regression in cache workingset transition

2017-04-06 Thread Johannes Weiner
On Wed, Apr 05, 2017 at 06:11:04PM -0400, Rik van Riel wrote: > On Tue, 2017-04-04 at 18:00 -0400, Johannes Weiner wrote: > > > + > > + /* > > +  * When refaults are being observed, it means a new > > workingset > > +  * is being established. Disable active list protection to > > get > > +

Re: [Patch v4 12/12] Documention: v4l: Documentation for HEVC CIDs

2017-04-06 Thread Sylwester Nawrocki
On 04/06/2017 08:11 AM, Smitha T Murthy wrote: Added V4l2 controls for HEVC encoder s/HEVC/H.265/HEVC ? Signed-off-by: Smitha T Murthy --- Documentation/media/uapi/v4l/extended-controls.rst | 391 + 1 file changed, 391 insertions(+) diff --git

Re: [Patch v4 12/12] Documention: v4l: Documentation for HEVC CIDs

2017-04-06 Thread Sylwester Nawrocki
On 04/06/2017 08:11 AM, Smitha T Murthy wrote: Added V4l2 controls for HEVC encoder s/HEVC/H.265/HEVC ? Signed-off-by: Smitha T Murthy --- Documentation/media/uapi/v4l/extended-controls.rst | 391 + 1 file changed, 391 insertions(+) diff --git

Re: [PATCH V10 06/12] of: device: Fix overflow of coherent_dma_mask

2017-04-06 Thread Robin Murphy
On 06/04/17 14:56, Rob Herring wrote: > On Thu, Apr 6, 2017 at 5:24 AM, Robin Murphy wrote: >> On 06/04/17 08:01, Frank Rowand wrote: >>> On 04/04/17 03:18, Sricharan R wrote: Size of the dma-range is calculated as coherent_dma_mask + 1 and passed to

Re: [PATCH V10 06/12] of: device: Fix overflow of coherent_dma_mask

2017-04-06 Thread Robin Murphy
On 06/04/17 14:56, Rob Herring wrote: > On Thu, Apr 6, 2017 at 5:24 AM, Robin Murphy wrote: >> On 06/04/17 08:01, Frank Rowand wrote: >>> On 04/04/17 03:18, Sricharan R wrote: Size of the dma-range is calculated as coherent_dma_mask + 1 and passed to arch_setup_dma_ops further. It

Re: [PATCH] vfio/type1: Remove locked page accounting workqueue

2017-04-06 Thread Alex Williamson
On Thu, 6 Apr 2017 10:23:59 +0200 Auger Eric wrote: > Hi Alex, > > On 03/04/2017 22:02, Alex Williamson wrote: > > If the mmap_sem is contented then the vfio type1 IOMMU backend will > > defer locked page accounting updates to a workqueue task. This has > > a few

Re: [PATCH] vfio/type1: Remove locked page accounting workqueue

2017-04-06 Thread Alex Williamson
On Thu, 6 Apr 2017 10:23:59 +0200 Auger Eric wrote: > Hi Alex, > > On 03/04/2017 22:02, Alex Williamson wrote: > > If the mmap_sem is contented then the vfio type1 IOMMU backend will > > defer locked page accounting updates to a workqueue task. This has > > a few problems and depending on

Re: [PATCH v1 1/5] perf/core: Define the common branch type classification

2017-04-06 Thread Jin, Yao
On 4/6/2017 5:25 PM, Peter Zijlstra wrote: On Thu, Apr 06, 2017 at 04:21:06PM +0800, Jin, Yao wrote: Hi, otherwise we have to maintain 2 branch type copies between kernel and user-space. For example, currently X86_BR_* are defined in lbr.c. To display the branch type in user-space, the

Re: [PATCH v1 1/5] perf/core: Define the common branch type classification

2017-04-06 Thread Jin, Yao
On 4/6/2017 5:25 PM, Peter Zijlstra wrote: On Thu, Apr 06, 2017 at 04:21:06PM +0800, Jin, Yao wrote: Hi, otherwise we have to maintain 2 branch type copies between kernel and user-space. For example, currently X86_BR_* are defined in lbr.c. To display the branch type in user-space, the

Re: [PATCH 5/5] fpga-region: separate out common code from dt specific code

2017-04-06 Thread Alan Tull
On Wed, Apr 5, 2017 at 11:25 PM, Moritz Fischer wrote: Hi Moritz, > Hi Alan, > > first pass ... need to get back to it. Thanks for reviewing! > > On Mon, Mar 13, 2017 at 04:53:33PM -0500, Alan Tull wrote: >> FPGA region is a layer above the FPGA manager and FPGA bridge >>

Re: [PATCH 5/5] fpga-region: separate out common code from dt specific code

2017-04-06 Thread Alan Tull
On Wed, Apr 5, 2017 at 11:25 PM, Moritz Fischer wrote: Hi Moritz, > Hi Alan, > > first pass ... need to get back to it. Thanks for reviewing! > > On Mon, Mar 13, 2017 at 04:53:33PM -0500, Alan Tull wrote: >> FPGA region is a layer above the FPGA manager and FPGA bridge >> frameworks.

[PATCH V2 0/4] pwm: tegra: Pin configuration in suspend/resume and cleanups

2017-04-06 Thread Laxman Dewangan
This patch series have following fixes: - Add more precession in PWM period register value calculation for lower pwm frequency. - Add support to configure PWM pins in different state in the suspend/resume. Changes from v1: - Use standard pinctrl names for sleep and active state. - Use API

[PATCH V2 0/4] pwm: tegra: Pin configuration in suspend/resume and cleanups

2017-04-06 Thread Laxman Dewangan
This patch series have following fixes: - Add more precession in PWM period register value calculation for lower pwm frequency. - Add support to configure PWM pins in different state in the suspend/resume. Changes from v1: - Use standard pinctrl names for sleep and active state. - Use API

[PATCH V2 2/4] pwm: tegra: Increase precision in pwm rate calculation

2017-04-06 Thread Laxman Dewangan
The rate of the PWM calculated as follows: hz = NSEC_PER_SEC / period_ns; rate = (rate + (hz / 2)) / hz; This has the precision loss in lower PWM rate. Changing this to have more precision as: hz = DIV_ROUND_CLOSE(NSEC_PER_SEC * 100, period_ns); rate =

[PATCH V2 2/4] pwm: tegra: Increase precision in pwm rate calculation

2017-04-06 Thread Laxman Dewangan
The rate of the PWM calculated as follows: hz = NSEC_PER_SEC / period_ns; rate = (rate + (hz / 2)) / hz; This has the precision loss in lower PWM rate. Changing this to have more precision as: hz = DIV_ROUND_CLOSE(NSEC_PER_SEC * 100, period_ns); rate =

[PATCH V4 4/4] pwm: tegra: Add support to configure pin state in suspends/resume

2017-04-06 Thread Laxman Dewangan
In some of NVIDIA Tegra's platform, PWM controller is used to control the PWM controlled regulators. PWM signal is connected to the VID pin of the regulator where duty cycle of PWM signal decide the voltage level of the regulator output. The tristate (high impedance of PWM pin form Tegra) also

[PATCH V4 4/4] pwm: tegra: Add support to configure pin state in suspends/resume

2017-04-06 Thread Laxman Dewangan
In some of NVIDIA Tegra's platform, PWM controller is used to control the PWM controlled regulators. PWM signal is connected to the VID pin of the regulator where duty cycle of PWM signal decide the voltage level of the regulator output. The tristate (high impedance of PWM pin form Tegra) also

Re: [PATCH v4 13/14] pwm: jz4740: Let the pinctrl driver configure the pins

2017-04-06 Thread Thierry Reding
On Sun, Apr 02, 2017 at 10:42:43PM +0200, Paul Cercueil wrote: > Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on > the pins being properly configured before the driver probes. > > One inherent problem of this new approach is that the pinctrl framework > does not allow us to

[PATCH V2 1/4] pwm: tegra: Use DIV_ROUND_CLOSEST_ULL() instead of local implementation

2017-04-06 Thread Laxman Dewangan
Use macro DIV_ROUND_CLOSEST_ULL() for 64bit division to closet one instead of implementing the same locally. This increase readability. Signed-off-by: Laxman Dewangan --- Changes from V1: None drivers/pwm/pwm-tegra.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)

[PATCH V2 1/4] pwm: tegra: Use DIV_ROUND_CLOSEST_ULL() instead of local implementation

2017-04-06 Thread Laxman Dewangan
Use macro DIV_ROUND_CLOSEST_ULL() for 64bit division to closet one instead of implementing the same locally. This increase readability. Signed-off-by: Laxman Dewangan --- Changes from V1: None drivers/pwm/pwm-tegra.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git

Re: [PATCH v4 13/14] pwm: jz4740: Let the pinctrl driver configure the pins

2017-04-06 Thread Thierry Reding
On Sun, Apr 02, 2017 at 10:42:43PM +0200, Paul Cercueil wrote: > Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on > the pins being properly configured before the driver probes. > > One inherent problem of this new approach is that the pinctrl framework > does not allow us to

[PATCH V3 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume

2017-04-06 Thread Laxman Dewangan
In some of NVIDIA Tegra's platform, PWM controller is used to control the PWM controlled regulators. PWM signal is connected to the VID pin of the regulator where duty cycle of PWM signal decide the voltage level of the regulator output. The tristate (high impedance of PWM pin form Tegra) also

[PATCH V3 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume

2017-04-06 Thread Laxman Dewangan
In some of NVIDIA Tegra's platform, PWM controller is used to control the PWM controlled regulators. PWM signal is connected to the VID pin of the regulator where duty cycle of PWM signal decide the voltage level of the regulator output. The tristate (high impedance of PWM pin form Tegra) also

Re: [PATCH] [media] imx: csi: retain current field order and colorimetry setting as default

2017-04-06 Thread Russell King - ARM Linux
On Thu, Apr 06, 2017 at 04:20:21PM +0200, Hans Verkuil wrote: > On 04/06/2017 03:55 PM, Philipp Zabel wrote: > > If the the field order is set to ANY in set_fmt, choose the currently > > set field order. If the colorspace is set to DEFAULT, choose the current > > colorspace. If any of xfer_func,

Re: [PATCH] [media] imx: csi: retain current field order and colorimetry setting as default

2017-04-06 Thread Russell King - ARM Linux
On Thu, Apr 06, 2017 at 04:20:21PM +0200, Hans Verkuil wrote: > On 04/06/2017 03:55 PM, Philipp Zabel wrote: > > If the the field order is set to ANY in set_fmt, choose the currently > > set field order. If the colorspace is set to DEFAULT, choose the current > > colorspace. If any of xfer_func,

Re: [PATCH] arm64: xen: Implement EFI reset_system callback

2017-04-06 Thread Juergen Gross
On 06/04/17 16:27, Daniel Kiper wrote: > On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote: >> Hi Juergen, >> >> On 06/04/17 07:23, Juergen Gross wrote: >>> On 05/04/17 21:49, Boris Ostrovsky wrote: On 04/05/2017 02:14 PM, Julien Grall wrote: > The x86 code has theoritically a

Re: [PATCH] arm64: xen: Implement EFI reset_system callback

2017-04-06 Thread Juergen Gross
On 06/04/17 16:27, Daniel Kiper wrote: > On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote: >> Hi Juergen, >> >> On 06/04/17 07:23, Juergen Gross wrote: >>> On 05/04/17 21:49, Boris Ostrovsky wrote: On 04/05/2017 02:14 PM, Julien Grall wrote: > The x86 code has theoritically a

Re: [PATCH] arm64: xen: Implement EFI reset_system callback

2017-04-06 Thread Boris Ostrovsky
On 04/06/2017 10:32 AM, Julien Grall wrote: > Hi Daniel, > > On 06/04/17 15:27, Daniel Kiper wrote: >> On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote: >>> Hi Juergen, >>> >>> On 06/04/17 07:23, Juergen Gross wrote: On 05/04/17 21:49, Boris Ostrovsky wrote: > On 04/05/2017

Re: [PATCH] arm64: xen: Implement EFI reset_system callback

2017-04-06 Thread Boris Ostrovsky
On 04/06/2017 10:32 AM, Julien Grall wrote: > Hi Daniel, > > On 06/04/17 15:27, Daniel Kiper wrote: >> On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote: >>> Hi Juergen, >>> >>> On 06/04/17 07:23, Juergen Gross wrote: On 05/04/17 21:49, Boris Ostrovsky wrote: > On 04/05/2017

Re: [PATCH v4] tools/perf: Allow user probes on versioned symbols

2017-04-06 Thread Arnaldo Carvalho de Melo
Em Wed, Apr 05, 2017 at 10:30:03PM -0500, Paul Clarke escreveu: > Symbol versioning, as in glibc, results in symbols being defined as: > @[@] > (Note that "@@" identifies a default symbol, if the symbol name > is repeated.) > > perf is currently unable to deal with this, and is unable to create >

Re: [PATCH v4] tools/perf: Allow user probes on versioned symbols

2017-04-06 Thread Arnaldo Carvalho de Melo
Em Wed, Apr 05, 2017 at 10:30:03PM -0500, Paul Clarke escreveu: > Symbol versioning, as in glibc, results in symbols being defined as: > @[@] > (Note that "@@" identifies a default symbol, if the symbol name > is repeated.) > > perf is currently unable to deal with this, and is unable to create >

Re: [PATCH] tick/nohz: Fix wrong user and system time accouting against vtime sampling

2017-04-06 Thread Rik van Riel
On Wed, 2017-04-05 at 23:36 -0700, Wanpeng Li wrote: > This patch offsets the tick to avert all ticks alignment in order  > that the vtime sampling does not end up "in phase" with the jiffies  > incrementing. > > Reported-by: Luiz Capitulino > Suggested-by: Rik van Riel

Re: [PATCH] tick/nohz: Fix wrong user and system time accouting against vtime sampling

2017-04-06 Thread Rik van Riel
On Wed, 2017-04-05 at 23:36 -0700, Wanpeng Li wrote: > This patch offsets the tick to avert all ticks alignment in order  > that the vtime sampling does not end up "in phase" with the jiffies  > incrementing. > > Reported-by: Luiz Capitulino > Suggested-by: Rik van Riel > Cc: Frederic

Re: [RFC 00/10] V4L2 explicit synchronization support

2017-04-06 Thread Javier Martinez Canillas
Hello Gustavo, On 04/06/2017 10:08 AM, Gustavo Padovan wrote: > Hi Javier, > > 2017-04-05 Javier Martinez Canillas : > >> Hello Gustavo, >> >> On 04/05/2017 11:09 AM, Gustavo Padovan wrote: >>> 2017-04-03 Javier Martinez Canillas : >>> Hello

Re: [RFC 00/10] V4L2 explicit synchronization support

2017-04-06 Thread Javier Martinez Canillas
Hello Gustavo, On 04/06/2017 10:08 AM, Gustavo Padovan wrote: > Hi Javier, > > 2017-04-05 Javier Martinez Canillas : > >> Hello Gustavo, >> >> On 04/05/2017 11:09 AM, Gustavo Padovan wrote: >>> 2017-04-03 Javier Martinez Canillas : >>> Hello Mauro and Gustavo, On 04/03/2017 07:16

Re: [PATCH v3 0/2] switch to atomic PWM

2017-04-06 Thread Thierry Reding
On Wed, Mar 22, 2017 at 03:29:33PM +0200, Claudiu Beznea wrote: > Changes in v3: > - since v2 introduced per-IP register layout there is no need > to keep update_cdty and set_cprd_cdty members in atmel_pwm_data > data structure used in v2; doing in this way the atmel_pwm_data > data structure will

Re: [PATCH v3 0/2] switch to atomic PWM

2017-04-06 Thread Thierry Reding
On Wed, Mar 22, 2017 at 03:29:33PM +0200, Claudiu Beznea wrote: > Changes in v3: > - since v2 introduced per-IP register layout there is no need > to keep update_cdty and set_cprd_cdty members in atmel_pwm_data > data structure used in v2; doing in this way the atmel_pwm_data > data structure will

Re: [PATCH] arm64: xen: Implement EFI reset_system callback

2017-04-06 Thread Julien Grall
Hi Daniel, On 06/04/17 15:27, Daniel Kiper wrote: On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote: Hi Juergen, On 06/04/17 07:23, Juergen Gross wrote: On 05/04/17 21:49, Boris Ostrovsky wrote: On 04/05/2017 02:14 PM, Julien Grall wrote: The x86 code has theoritically a similar

Re: [PATCH] arm64: xen: Implement EFI reset_system callback

2017-04-06 Thread Julien Grall
Hi Daniel, On 06/04/17 15:27, Daniel Kiper wrote: On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote: Hi Juergen, On 06/04/17 07:23, Juergen Gross wrote: On 05/04/17 21:49, Boris Ostrovsky wrote: On 04/05/2017 02:14 PM, Julien Grall wrote: The x86 code has theoritically a similar

[PATCH] staging: android: ashmem: lseek failed due to no FMODE_LSEEK.

2017-04-06 Thread zhangshuxiaomi
From: zhangshuxiao vfs_llseek will check whether the file mode has FMODE_LSEEK, no return failure. But ashmem can be lseek, so add FMODE_LSEEK to ashmem file. Signed-off-by: Shuxiao Zhang Tested-by: Greg Hackmann ---

[PATCH] staging: android: ashmem: lseek failed due to no FMODE_LSEEK.

2017-04-06 Thread zhangshuxiaomi
From: zhangshuxiao vfs_llseek will check whether the file mode has FMODE_LSEEK, no return failure. But ashmem can be lseek, so add FMODE_LSEEK to ashmem file. Signed-off-by: Shuxiao Zhang Tested-by: Greg Hackmann --- drivers/staging/android/ashmem.c | 1 + 1 file changed, 1 insertion(+)

Re: [PATCH] arm64: xen: Implement EFI reset_system callback

2017-04-06 Thread Daniel Kiper
On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote: > Hi Juergen, > > On 06/04/17 07:23, Juergen Gross wrote: > >On 05/04/17 21:49, Boris Ostrovsky wrote: > >>On 04/05/2017 02:14 PM, Julien Grall wrote: > >>>The x86 code has theoritically a similar issue, altought EFI does not > >>>seem

Re: [PATCH] arm64: xen: Implement EFI reset_system callback

2017-04-06 Thread Daniel Kiper
On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote: > Hi Juergen, > > On 06/04/17 07:23, Juergen Gross wrote: > >On 05/04/17 21:49, Boris Ostrovsky wrote: > >>On 04/05/2017 02:14 PM, Julien Grall wrote: > >>>The x86 code has theoritically a similar issue, altought EFI does not > >>>seem

Re: [PATCH 4/4] net: dsa: LAN9303: add MDIO managed mode support

2017-04-06 Thread Andrew Lunn
On Thu, Apr 06, 2017 at 06:53:10AM -0700, Florian Fainelli wrote: > > > On 04/05/2017 12:32 PM, Andrew Lunn wrote: > >> +static const struct of_device_id lan9303_mdio_of_match[] = { > >> + { .compatible = "smsc,lan9303" }, > >> + { /* sentinel */ }, > >> +}; > >> +MODULE_DEVICE_TABLE(of,

Re: [PATCH 4/4] net: dsa: LAN9303: add MDIO managed mode support

2017-04-06 Thread Andrew Lunn
On Thu, Apr 06, 2017 at 06:53:10AM -0700, Florian Fainelli wrote: > > > On 04/05/2017 12:32 PM, Andrew Lunn wrote: > >> +static const struct of_device_id lan9303_mdio_of_match[] = { > >> + { .compatible = "smsc,lan9303" }, > >> + { /* sentinel */ }, > >> +}; > >> +MODULE_DEVICE_TABLE(of,

Re: [RFC][PATCH] mm: Tighten x86 /dev/mem with zeroing

2017-04-06 Thread Tommi Rantala
On 06.04.2017 03:00, Kees Cook wrote: This changes the x86 exception for the low 1MB by reading back zeros for RAM areas instead of blindly allowing them. (It may be possible for heap to end up getting allocated in low 1MB RAM, and then read out, possibly tripping hardened usercopy.)

Re: [RFC][PATCH] mm: Tighten x86 /dev/mem with zeroing

2017-04-06 Thread Tommi Rantala
On 06.04.2017 03:00, Kees Cook wrote: This changes the x86 exception for the low 1MB by reading back zeros for RAM areas instead of blindly allowing them. (It may be possible for heap to end up getting allocated in low 1MB RAM, and then read out, possibly tripping hardened usercopy.)

[PATCH] x86/mpx, selftests: Only check bounds-vs-shadow when we keep shadow

2017-04-06 Thread Joerg Roedel
From: Joerg Roedel The check between the hardware state and our shadow of it is checked in the signal handler for all bounds exceptions, even for the ones where we don't keep the shadow up2date. This is a problem because when no shadow is kept the handler fails at this point and

[PATCH] x86/mpx, selftests: Only check bounds-vs-shadow when we keep shadow

2017-04-06 Thread Joerg Roedel
From: Joerg Roedel The check between the hardware state and our shadow of it is checked in the signal handler for all bounds exceptions, even for the ones where we don't keep the shadow up2date. This is a problem because when no shadow is kept the handler fails at this point and hides the real

Re: [PATCH 4.4 42/76] mmc: sdhci: Do not disable interrupts while waiting for clock

2017-04-06 Thread Ben Hutchings
On Thu, 2017-04-06 at 14:12 +0200, Ludovic Desroches wrote: > On Tue, Apr 04, 2017 at 05:50:50PM +0100, Ben Hutchings wrote: > > On Tue, 2017-03-28 at 14:30 +0200, Greg Kroah-Hartman wrote: > > > 4.4-stable review patch. If anyone has any objections, please let me > > > know. > > > > > >

Re: [PATCH 4.4 42/76] mmc: sdhci: Do not disable interrupts while waiting for clock

2017-04-06 Thread Ben Hutchings
On Thu, 2017-04-06 at 14:12 +0200, Ludovic Desroches wrote: > On Tue, Apr 04, 2017 at 05:50:50PM +0100, Ben Hutchings wrote: > > On Tue, 2017-03-28 at 14:30 +0200, Greg Kroah-Hartman wrote: > > > 4.4-stable review patch. If anyone has any objections, please let me > > > know. > > > > > >

Re: [PATCH] x86, kvm: Handle PFNs outside of kernel reach when touching GPTEs

2017-04-06 Thread Radim Krčmář
2017-04-05 15:07+0200, Filippo Sironi: > cmpxchg_gpte() calls get_user_pages_fast() to retrieve the number of > pages and the respective struct pages for mapping in the kernel virtual > address space. > This doesn't work if get_user_pages_fast() is invoked with a userspace > virtual address that's

Re: [PATCH] x86, kvm: Handle PFNs outside of kernel reach when touching GPTEs

2017-04-06 Thread Radim Krčmář
2017-04-05 15:07+0200, Filippo Sironi: > cmpxchg_gpte() calls get_user_pages_fast() to retrieve the number of > pages and the respective struct pages for mapping in the kernel virtual > address space. > This doesn't work if get_user_pages_fast() is invoked with a userspace > virtual address that's

Re: [PATCH] [media] imx: csi: retain current field order and colorimetry setting as default

2017-04-06 Thread Hans Verkuil
On 04/06/2017 03:55 PM, Philipp Zabel wrote: > If the the field order is set to ANY in set_fmt, choose the currently > set field order. If the colorspace is set to DEFAULT, choose the current > colorspace. If any of xfer_func, ycbcr_enc or quantization are set to > DEFAULT, either choose the

Re: [PATCH] [media] imx: csi: retain current field order and colorimetry setting as default

2017-04-06 Thread Hans Verkuil
On 04/06/2017 03:55 PM, Philipp Zabel wrote: > If the the field order is set to ANY in set_fmt, choose the currently > set field order. If the colorspace is set to DEFAULT, choose the current > colorspace. If any of xfer_func, ycbcr_enc or quantization are set to > DEFAULT, either choose the

[PATCH] x86/mpx: Correctly report do_mpx_bt_fault() failures to user-space

2017-04-06 Thread Joerg Roedel
From: Joerg Roedel When this function fails it just sends a SIGSEGV signal to user-space using force_sig(). This signal is missing essential information about the cause, e.g. the trap_nr or an error code. Fix this by propagating the error to the only caller of

[PATCH] x86/mpx: Correctly report do_mpx_bt_fault() failures to user-space

2017-04-06 Thread Joerg Roedel
From: Joerg Roedel When this function fails it just sends a SIGSEGV signal to user-space using force_sig(). This signal is missing essential information about the cause, e.g. the trap_nr or an error code. Fix this by propagating the error to the only caller of mpx_handle_bd_fault(),

Re: [PATCH 4/5] vfio: platform: Convert to use devm_*()

2017-04-06 Thread Leo Yan
On Sun, Apr 02, 2017 at 04:45:28PM +0200, Auger Eric wrote: > Hi Leo, > > On 26/03/2017 16:41, Leo Yan wrote: > > Convert driver to use devm_*() APIs so rely on driver model core layer > > to manage resources. This eliminates error path boilerplate and makes > > code neat. > > > > This patch

Re: [PATCH 4/5] vfio: platform: Convert to use devm_*()

2017-04-06 Thread Leo Yan
On Sun, Apr 02, 2017 at 04:45:28PM +0200, Auger Eric wrote: > Hi Leo, > > On 26/03/2017 16:41, Leo Yan wrote: > > Convert driver to use devm_*() APIs so rely on driver model core layer > > to manage resources. This eliminates error path boilerplate and makes > > code neat. > > > > This patch

Re: [PATCH 4/5] fpga-mgr: separate getting/locking FPGA manager

2017-04-06 Thread Alan Tull
On Wed, Apr 5, 2017 at 11:07 PM, Moritz Fischer wrote: > Hi Alan, > > minor nits, inline > > On Mon, Mar 13, 2017 at 04:53:32PM -0500, Alan Tull wrote: >> Add fpga_mgr_lock/unlock functions that get a mutex for >> exclusive use. >> >> of_fpga_mgr_get, fpga_mgr_get, and

Re: [PATCH 4/5] fpga-mgr: separate getting/locking FPGA manager

2017-04-06 Thread Alan Tull
On Wed, Apr 5, 2017 at 11:07 PM, Moritz Fischer wrote: > Hi Alan, > > minor nits, inline > > On Mon, Mar 13, 2017 at 04:53:32PM -0500, Alan Tull wrote: >> Add fpga_mgr_lock/unlock functions that get a mutex for >> exclusive use. >> >> of_fpga_mgr_get, fpga_mgr_get, and fpga_mgr_put no longer lock

Re: [BUG] stack tracing causes: kernel/module.c:271 module_assert_mutex_or_preempt

2017-04-06 Thread Steven Rostedt
On Wed, 5 Apr 2017 21:15:15 -0700 "Paul E. McKenney" wrote: \> > diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c > > index 8efd9fe..28e3019 100644 > > --- a/kernel/trace/ftrace.c > > +++ b/kernel/trace/ftrace.c > > @@ -2808,18 +2808,28 @@ static int

Re: [BUG] stack tracing causes: kernel/module.c:271 module_assert_mutex_or_preempt

2017-04-06 Thread Steven Rostedt
On Wed, 5 Apr 2017 21:15:15 -0700 "Paul E. McKenney" wrote: \> > diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c > > index 8efd9fe..28e3019 100644 > > --- a/kernel/trace/ftrace.c > > +++ b/kernel/trace/ftrace.c > > @@ -2808,18 +2808,28 @@ static int ftrace_shutdown(struct ftrace_ops

Re: [PATCH v3 0/9] Fix issues and factorize arm/arm64 capacity information code

2017-04-06 Thread Juri Lelli
Hi, On 27/03/17 14:18, Juri Lelli wrote: > Hi, > > arm and arm64 topology.c share a lot of code related to parsing of capacity > information. This is v3 of a solution [1] (based on Will's, Catalin's and > Mark's off-line suggestions) to move such common code in a single place: >

Re: [PATCH v3 0/9] Fix issues and factorize arm/arm64 capacity information code

2017-04-06 Thread Juri Lelli
Hi, On 27/03/17 14:18, Juri Lelli wrote: > Hi, > > arm and arm64 topology.c share a lot of code related to parsing of capacity > information. This is v3 of a solution [1] (based on Will's, Catalin's and > Mark's off-line suggestions) to move such common code in a single place: >

Re: [RFC][PATCH] spin loop arch primitives for busy waiting

2017-04-06 Thread Will Deacon
Hi Nick, On Thu, Apr 06, 2017 at 10:59:58AM +1000, Nicholas Piggin wrote: > On Wed, 05 Apr 2017 07:01:57 -0700 (PDT) > David Miller wrote: > > > From: Nicholas Piggin > > Date: Tue, 4 Apr 2017 13:02:33 +1000 > > > > > On Mon, 3 Apr 2017 17:43:05 -0700 >

Re: [RFC][PATCH] spin loop arch primitives for busy waiting

2017-04-06 Thread Will Deacon
Hi Nick, On Thu, Apr 06, 2017 at 10:59:58AM +1000, Nicholas Piggin wrote: > On Wed, 05 Apr 2017 07:01:57 -0700 (PDT) > David Miller wrote: > > > From: Nicholas Piggin > > Date: Tue, 4 Apr 2017 13:02:33 +1000 > > > > > On Mon, 3 Apr 2017 17:43:05 -0700 > > > Linus Torvalds wrote: > > > > >

Re: [PATCH v3 33/37] mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unset

2017-04-06 Thread Leonard Crestez
On Thu, Mar 30, 2017 at 11:15 AM, Masahiro Yamada wrote: > > Some NAND controllers are using DMA engine requiring a specific > buffer alignment.  The core provides no guarantee on the nand_buffers > pointers, which forces some drivers to allocate their own buffers

Re: [PATCH v3 33/37] mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unset

2017-04-06 Thread Leonard Crestez
On Thu, Mar 30, 2017 at 11:15 AM, Masahiro Yamada wrote: > > Some NAND controllers are using DMA engine requiring a specific > buffer alignment.  The core provides no guarantee on the nand_buffers > pointers, which forces some drivers to allocate their own buffers > and pass the

Re: [RFC 00/10] V4L2 explicit synchronization support

2017-04-06 Thread Gustavo Padovan
Hi Javier, 2017-04-05 Javier Martinez Canillas : > Hello Gustavo, > > On 04/05/2017 11:09 AM, Gustavo Padovan wrote: > > 2017-04-03 Javier Martinez Canillas : > > > >> Hello Mauro and Gustavo, > >> > >> On 04/03/2017 07:16 AM, Mauro Carvalho

Re: [RFC 00/10] V4L2 explicit synchronization support

2017-04-06 Thread Gustavo Padovan
Hi Javier, 2017-04-05 Javier Martinez Canillas : > Hello Gustavo, > > On 04/05/2017 11:09 AM, Gustavo Padovan wrote: > > 2017-04-03 Javier Martinez Canillas : > > > >> Hello Mauro and Gustavo, > >> > >> On 04/03/2017 07:16 AM, Mauro Carvalho Chehab wrote: > >>> Hi Gustavo, > >>> > >>> Em Mon,

Re: [PATCH] [media] imx: csi: retain current field order and colorimetry setting as default

2017-04-06 Thread Russell King - ARM Linux
On Thu, Apr 06, 2017 at 03:55:29PM +0200, Philipp Zabel wrote: > + > + /* Retain current field setting as default */ > + if (sdformat->format.field == V4L2_FIELD_ANY) > + sdformat->format.field = fmt->field; > + > + /* Retain current colorspace setting as default */ > +

Re: [PATCH] [media] imx: csi: retain current field order and colorimetry setting as default

2017-04-06 Thread Russell King - ARM Linux
On Thu, Apr 06, 2017 at 03:55:29PM +0200, Philipp Zabel wrote: > + > + /* Retain current field setting as default */ > + if (sdformat->format.field == V4L2_FIELD_ANY) > + sdformat->format.field = fmt->field; > + > + /* Retain current colorspace setting as default */ > +

Re: [PATCH] of: change fixup of dma-ranges size to error

2017-04-06 Thread Rob Herring
On Thu, Apr 6, 2017 at 1:18 AM, wrote: > From: Frank Rowand > > of_dma_get_range() has workaround code to fixup a device tree that > incorrectly specified a mask instead of a size for property > dma-ranges. That device tree was fixed a year ago in

Re: [PATCH 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume

2017-04-06 Thread Jon Hunter
On 06/04/17 14:19, Laxman Dewangan wrote: > > On Thursday 06 April 2017 06:33 PM, Thierry Reding wrote: >> * PGP Signed by an unknown key >> >> On Thu, Apr 06, 2017 at 09:57:09AM +0100, Jon Hunter wrote: >>> On 05/04/17 15:13, Laxman Dewangan wrote: +state of the system. The configuration

Re: [PATCH] of: change fixup of dma-ranges size to error

2017-04-06 Thread Rob Herring
On Thu, Apr 6, 2017 at 1:18 AM, wrote: > From: Frank Rowand > > of_dma_get_range() has workaround code to fixup a device tree that > incorrectly specified a mask instead of a size for property > dma-ranges. That device tree was fixed a year ago in v4.6, so > the workaround is no longer needed.

Re: [PATCH 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume

2017-04-06 Thread Jon Hunter
On 06/04/17 14:19, Laxman Dewangan wrote: > > On Thursday 06 April 2017 06:33 PM, Thierry Reding wrote: >> * PGP Signed by an unknown key >> >> On Thu, Apr 06, 2017 at 09:57:09AM +0100, Jon Hunter wrote: >>> On 05/04/17 15:13, Laxman Dewangan wrote: +state of the system. The configuration

Re: [Linux-cachefs] Variable fscache_cache_cleared_wq undefined!

2017-04-06 Thread David Howells
Corcodel Marian wrote: > Hi on function fscache_object_destroyed may run with variable undefined when > in not set CONFIG_FSCACHE > > +void fscache_object_destroyed(struct fscache_cache *cache) > +{ > +#ifdef CONFIG_FSCACHE > + if

Re: [Linux-cachefs] Variable fscache_cache_cleared_wq undefined!

2017-04-06 Thread David Howells
Corcodel Marian wrote: > Hi on function fscache_object_destroyed may run with variable undefined when > in not set CONFIG_FSCACHE > > +void fscache_object_destroyed(struct fscache_cache *cache) > +{ > +#ifdef CONFIG_FSCACHE > + if (atomic_dec_and_test(>object_count)) > +

[PATCH 7/8] x86: Enable 5-level paging support

2017-04-06 Thread Kirill A. Shutemov
Most of things are in place and we can enable support of 5-level paging. Enabling XEN with 5-level paging requires more work. The patch makes XEN dependent on !X86_5LEVEL. Signed-off-by: Kirill A. Shutemov --- arch/x86/Kconfig | 5 +

[PATCH 7/8] x86: Enable 5-level paging support

2017-04-06 Thread Kirill A. Shutemov
Most of things are in place and we can enable support of 5-level paging. Enabling XEN with 5-level paging requires more work. The patch makes XEN dependent on !X86_5LEVEL. Signed-off-by: Kirill A. Shutemov --- arch/x86/Kconfig | 5 + arch/x86/xen/Kconfig | 1 + 2 files changed, 6

Re: [RFC PATCH 0/4] fs: introduce new writeback error tracking infrastructure and convert ext4 to use it

2017-04-06 Thread Jeff Layton
On Thu, 2017-04-06 at 10:02 +1000, NeilBrown wrote: > On Thu, Apr 06 2017, Jeff Layton wrote: > > > On Tue, 2017-04-04 at 10:09 -0700, Matthew Wilcox wrote: > > > On Tue, Apr 04, 2017 at 12:25:46PM -0400, Jeff Layton wrote: > > > > That said, I think giving more specific errors where we can is

Re: [RFC PATCH 0/4] fs: introduce new writeback error tracking infrastructure and convert ext4 to use it

2017-04-06 Thread Jeff Layton
On Thu, 2017-04-06 at 10:02 +1000, NeilBrown wrote: > On Thu, Apr 06 2017, Jeff Layton wrote: > > > On Tue, 2017-04-04 at 10:09 -0700, Matthew Wilcox wrote: > > > On Tue, Apr 04, 2017 at 12:25:46PM -0400, Jeff Layton wrote: > > > > That said, I think giving more specific errors where we can is

Re: [RFC][PATCH 1/2] printk: Introduce per-console filtering of messages by loglevel

2017-04-06 Thread Petr Mladek
On Wed 2017-04-05 17:38:19, Calvin Owens wrote: > On Wednesday 04/05 at 17:22 +0200, Petr Mladek wrote: > > I think about a reasonable behavior. There seems to be three variables > > that are related and are in use: > > > > console_level > > minimum_console_loglevel > >

Re: [RFC][PATCH 1/2] printk: Introduce per-console filtering of messages by loglevel

2017-04-06 Thread Petr Mladek
On Wed 2017-04-05 17:38:19, Calvin Owens wrote: > On Wednesday 04/05 at 17:22 +0200, Petr Mladek wrote: > > I think about a reasonable behavior. There seems to be three variables > > that are related and are in use: > > > > console_level > > minimum_console_loglevel > >

[PATCH 6/8] x86/mm: Add support for 5-level paging for KASLR

2017-04-06 Thread Kirill A. Shutemov
With 5-level paging randomization happens on P4D level instead of PUD. Maximum amount of physical memory also bumped to 52-bits for 5-level paging. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/kaslr.c | 81

[PATCH 5/8] x86/mm: Make kernel_physical_mapping_init() support 5-level paging

2017-04-06 Thread Kirill A. Shutemov
Populate additional page table level if CONFIG_X86_5LEVEL is enabled. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/init_64.c | 69 --- 1 file changed, 60 insertions(+), 9 deletions(-) diff --git

[PATCH 6/8] x86/mm: Add support for 5-level paging for KASLR

2017-04-06 Thread Kirill A. Shutemov
With 5-level paging randomization happens on P4D level instead of PUD. Maximum amount of physical memory also bumped to 52-bits for 5-level paging. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/kaslr.c | 81 - 1 file changed, 62

[PATCH 5/8] x86/mm: Make kernel_physical_mapping_init() support 5-level paging

2017-04-06 Thread Kirill A. Shutemov
Populate additional page table level if CONFIG_X86_5LEVEL is enabled. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/init_64.c | 69 --- 1 file changed, 60 insertions(+), 9 deletions(-) diff --git a/arch/x86/mm/init_64.c

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