[PATCH 1/8] x86/boot/64: Rewrite startup_64 in C

The patch write most of startup_64 logic in C. This is preparation for 5-level paging enabling. Signed-off-by: Kirill A. Shutemov --- arch/x86/kernel/head64.c | 81 - arch/x86/kernel/head_64.S | 93

[PATCH 1/8] x86/boot/64: Rewrite startup_64 in C

The patch write most of startup_64 logic in C. This is preparation for 5-level paging enabling. Signed-off-by: Kirill A. Shutemov --- arch/x86/kernel/head64.c | 81 - arch/x86/kernel/head_64.S | 93 +-- 2

[PATCH 8/8] x86/mm: Allow to have userspace mappings above 47-bits

On x86, 5-level paging enables 56-bit userspace virtual address space. Not all user space is ready to handle wide addresses. It's known that at least some JIT compilers use higher bits in pointers to encode their information. It collides with valid pointers with 5-level paging and leads to

[PATCH 8/8] x86/mm: Allow to have userspace mappings above 47-bits

On x86, 5-level paging enables 56-bit userspace virtual address space. Not all user space is ready to handle wide addresses. It's known that at least some JIT compilers use higher bits in pointers to encode their information. It collides with valid pointers with 5-level paging and leads to

[PATCH 3/8] x86/boot/64: Add support of additional page table level during early boot

This patch adds support for 5-level paging during early boot. It generalizes boot for 4- and 5-level paging on 64-bit systems with compile-time switch between them. Signed-off-by: Kirill A. Shutemov --- arch/x86/boot/compressed/head_64.S | 23

[PATCH 0/8] x86: 5-level paging enabling for v4.12, Part 4

Here's the fourth and the last bunch of of patches that brings initial 5-level paging enabling. Please review and consider applying. As Ingo requested I've tried to rewrite assembly parts of boot process into C before bringing 5-level paging support. The only part where I succeed is startup_64

[PATCH 3/8] x86/boot/64: Add support of additional page table level during early boot

This patch adds support for 5-level paging during early boot. It generalizes boot for 4- and 5-level paging on 64-bit systems with compile-time switch between them. Signed-off-by: Kirill A. Shutemov --- arch/x86/boot/compressed/head_64.S | 23 ---

[PATCH 0/8] x86: 5-level paging enabling for v4.12, Part 4

Here's the fourth and the last bunch of of patches that brings initial 5-level paging enabling. Please review and consider applying. As Ingo requested I've tried to rewrite assembly parts of boot process into C before bringing 5-level paging support. The only part where I succeed is startup_64

[PATCH 4/8] x86/mm: Add sync_global_pgds() for configuration with 5-level paging

This basically restores slightly modified version of original sync_global_pgds() which we had before folded p4d was introduced. The only modification is protection against 'address' overflow. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/init_64.c | 35

[PATCH 4/8] x86/mm: Add sync_global_pgds() for configuration with 5-level paging

This basically restores slightly modified version of original sync_global_pgds() which we had before folded p4d was introduced. The only modification is protection against 'address' overflow. Signed-off-by: Kirill A. Shutemov --- arch/x86/mm/init_64.c | 35 +++

[PATCH 2/8] x86/boot/64: Rename init_level4_pgt and early_level4_pgt

With CONFIG_X86_5LEVEL=y, level 4 is no longer top level of page tables. Let's give these variable more generic names: init_top_pgt and early_top_pgt. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/pgtable.h | 2 +-

[PATCH 2/8] x86/boot/64: Rename init_level4_pgt and early_level4_pgt

With CONFIG_X86_5LEVEL=y, level 4 is no longer top level of page tables. Let's give these variable more generic names: init_top_pgt and early_top_pgt. Signed-off-by: Kirill A. Shutemov --- arch/x86/include/asm/pgtable.h | 2 +- arch/x86/include/asm/pgtable_64.h | 4 ++--

Re: [PATCH v5 7/9] clk: hi6220: add debug APB clock

On Tue, Apr 04, 2017 at 02:51:09PM -0700, Stephen Boyd wrote: > On 03/26, Leo Yan wrote: > > The debug APB clock is absent in hi6220 driver, so this patch is to add > > support for it. > > > > Signed-off-by: Leo Yan > > --- > > Applied to clk-next. Thanks a lot :) > I

Re: [PATCH v5 7/9] clk: hi6220: add debug APB clock

On Tue, Apr 04, 2017 at 02:51:09PM -0700, Stephen Boyd wrote: > On 03/26, Leo Yan wrote: > > The debug APB clock is absent in hi6220 driver, so this patch is to add > > support for it. > > > > Signed-off-by: Leo Yan > > --- > > Applied to clk-next. Thanks a lot :) > I suspect we don't need a

Re: [HMM 01/16] mm/memory/hotplug: add memory type parameter to arch_add/remove_memory

> > diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c > > index 5f84433..0933261 100644 > > --- a/arch/powerpc/mm/mem.c > > +++ b/arch/powerpc/mm/mem.c > > @@ -126,14 +126,31 @@ int __weak remove_section_mapping(unsigned long > > start, unsigned long end) > > return -ENODEV; > > } >

Re: [HMM 01/16] mm/memory/hotplug: add memory type parameter to arch_add/remove_memory

> > diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c > > index 5f84433..0933261 100644 > > --- a/arch/powerpc/mm/mem.c > > +++ b/arch/powerpc/mm/mem.c > > @@ -126,14 +126,31 @@ int __weak remove_section_mapping(unsigned long > > start, unsigned long end) > > return -ENODEV; > > } >

[PATCH 6/6] apparmor: Make path_max parameter readonly

The path_max parameter determines the max size of buffers allocated but it should not be setable at run time. If can be used to cause an oops root@ubuntu:~# echo 16777216 > /sys/module/apparmor/parameters/path_max root@ubuntu:~# cat /sys/module/apparmor/parameters/path_max Killed [ 122.141911]

[PATCH 1/1] gpio: core: Decouple open drain/source flag with active low/high

Currently, the GPIO interface is said to Open Drain if it is Single Ended and active LOW. Similarly, it is said as Open Source if it is Single Ended and active HIGH. The active HIGH/LOW is used in the interface for setting the pin state to HIGH or LOW when enabling/disabling the interface. In

[PATCH 6/6] apparmor: Make path_max parameter readonly

The path_max parameter determines the max size of buffers allocated but it should not be setable at run time. If can be used to cause an oops root@ubuntu:~# echo 16777216 > /sys/module/apparmor/parameters/path_max root@ubuntu:~# cat /sys/module/apparmor/parameters/path_max Killed [ 122.141911]

[PATCH 1/1] gpio: core: Decouple open drain/source flag with active low/high

Currently, the GPIO interface is said to Open Drain if it is Single Ended and active LOW. Similarly, it is said as Open Source if it is Single Ended and active HIGH. The active HIGH/LOW is used in the interface for setting the pin state to HIGH or LOW when enabling/disabling the interface. In

Re: [PATCH V10 06/12] of: device: Fix overflow of coherent_dma_mask

On Thu, Apr 6, 2017 at 5:24 AM, Robin Murphy wrote: > On 06/04/17 08:01, Frank Rowand wrote: >> On 04/04/17 03:18, Sricharan R wrote: >>> Size of the dma-range is calculated as coherent_dma_mask + 1 >>> and passed to arch_setup_dma_ops further. It overflows when >>> the

Re: [PATCH V10 06/12] of: device: Fix overflow of coherent_dma_mask

On Thu, Apr 6, 2017 at 5:24 AM, Robin Murphy wrote: > On 06/04/17 08:01, Frank Rowand wrote: >> On 04/04/17 03:18, Sricharan R wrote: >>> Size of the dma-range is calculated as coherent_dma_mask + 1 >>> and passed to arch_setup_dma_ops further. It overflows when >>> the coherent_dma_mask is set

[PATCH 5/6] apparmor: fix parameters so that the permission test is bypassed at boot

Boot parameters are written before apparmor is ready to answer whether the user is policy_view_capable(). Setting the parameters at boot results in an oops and failure to boot. Setting the parameters at boot is obviously allowed so skip the permission check when apparmor is not initialized. While

[PATCH 5/6] apparmor: fix parameters so that the permission test is bypassed at boot

Boot parameters are written before apparmor is ready to answer whether the user is policy_view_capable(). Setting the parameters at boot results in an oops and failure to boot. Setting the parameters at boot is obviously allowed so skip the permission check when apparmor is not initialized. While

[PATCH 2/6] security/apparmor/lsm.c: set debug messages

From: Valentin Rothberg Add the _APPARMOR substring to reference the intended Kconfig option. Signed-off-by: Valentin Rothberg Signed-off-by: John Johansen --- security/apparmor/lsm.c | 2 +- 1 file changed,

[PATCH] [media] imx: csi: retain current field order and colorimetry setting as default

If the the field order is set to ANY in set_fmt, choose the currently set field order. If the colorspace is set to DEFAULT, choose the current colorspace. If any of xfer_func, ycbcr_enc or quantization are set to DEFAULT, either choose the current setting, or the default setting for the new

[PATCH 2/6] security/apparmor/lsm.c: set debug messages

From: Valentin Rothberg Add the _APPARMOR substring to reference the intended Kconfig option. Signed-off-by: Valentin Rothberg Signed-off-by: John Johansen --- security/apparmor/lsm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/security/apparmor/lsm.c

[PATCH] [media] imx: csi: retain current field order and colorimetry setting as default

If the the field order is set to ANY in set_fmt, choose the currently set field order. If the colorspace is set to DEFAULT, choose the current colorspace. If any of xfer_func, ycbcr_enc or quantization are set to DEFAULT, either choose the current setting, or the default setting for the new

[PATCH 1/6] apparmor: fix boolreturn.cocci warnings

From: kbuild test robot security/apparmor/lib.c:132:9-10: WARNING: return of 0/1 in function 'aa_policy_init' with return type bool Return statements in functions returning bool should use true/false instead of 1/0. Generated by:

[PATCH 1/6] apparmor: fix boolreturn.cocci warnings

From: kbuild test robot security/apparmor/lib.c:132:9-10: WARNING: return of 0/1 in function 'aa_policy_init' with return type bool Return statements in functions returning bool should use true/false instead of 1/0. Generated by: scripts/coccinelle/misc/boolreturn.cocci Signed-off-by:

[PATCH 3/6] apparmor: use SHASH_DESC_ON_STACK

From: Nicolas Iooss When building the kernel with clang, the compiler fails to build security/apparmor/crypto.c with the following error: security/apparmor/crypto.c:36:8: error: fields must have a constant size: 'variable length array in structure' extension

[PATCH 3/6] apparmor: use SHASH_DESC_ON_STACK

From: Nicolas Iooss When building the kernel with clang, the compiler fails to build security/apparmor/crypto.c with the following error: security/apparmor/crypto.c:36:8: error: fields must have a constant size: 'variable length array in structure' extension will never be supported

[PATCH 4/6] apparmor: fix invalid reference to index variable of iterator line 836

Once the loop on lines 836-853 is complete and exits normally, ent is a pointer to the dummy list head value. The derefernces accessible from eg the goto fail on line 860 or the various goto fail_lock's afterwards thus seem incorrect. Reported-by: Julia Lawall

[PATCH 4/6] apparmor: fix invalid reference to index variable of iterator line 836

Once the loop on lines 836-853 is complete and exits normally, ent is a pointer to the dummy list head value. The derefernces accessible from eg the goto fail on line 860 or the various goto fail_lock's afterwards thus seem incorrect. Reported-by: Julia Lawall Signed-off-by: John Johansen ---

[GIT PULL] AppArmor fixes for 4.12

Hi James, Here is the pull request for 4.12 There are no new features here, just a small set of bug fixes since the 4.11 pull request. Thanks, -John --- The following changes since commit ef933e87785f42868980f0e3af91fec313612868: selinux: fix kernel BUG on prlimit(..., NULL, NULL)

[GIT PULL] AppArmor fixes for 4.12

Hi James, Here is the pull request for 4.12 There are no new features here, just a small set of bug fixes since the 4.11 pull request. Thanks, -John --- The following changes since commit ef933e87785f42868980f0e3af91fec313612868: selinux: fix kernel BUG on prlimit(..., NULL, NULL)

Re: [PATCH 4/4] net: dsa: LAN9303: add MDIO managed mode support

On 04/05/2017 12:32 PM, Andrew Lunn wrote: >> +static const struct of_device_id lan9303_mdio_of_match[] = { >> +{ .compatible = "smsc,lan9303" }, >> +{ /* sentinel */ }, >> +}; >> +MODULE_DEVICE_TABLE(of, lan9303_mdio_of_match); > > If i'm reading this right, i think you have the same

Re: [PATCH 4/4] net: dsa: LAN9303: add MDIO managed mode support

On 04/05/2017 12:32 PM, Andrew Lunn wrote: >> +static const struct of_device_id lan9303_mdio_of_match[] = { >> +{ .compatible = "smsc,lan9303" }, >> +{ /* sentinel */ }, >> +}; >> +MODULE_DEVICE_TABLE(of, lan9303_mdio_of_match); > > If i'm reading this right, i think you have the same

[PATCH for-4.10 5/6] MIPS: Select HAVE_IRQ_EXIT_ON_IRQ_STACK

From: Matt Redfearn Since do_IRQ is now invoked on a separate IRQ stack, we select HAVE_IRQ_EXIT_ON_IRQ_STACK so that softirq's may be invoked directly from irq_exit(), rather than requiring do_softirq_own_stack. Signed-off-by: Matt Redfearn

[PATCH for-4.10 4/6] MIPS: Switch to the irq_stack in interrupts

From: Matt Redfearn When enterring interrupt context via handle_int or except_vec_vi, switch to the irq_stack of the current CPU if it is not already in use. The current stack pointer is masked with the thread size and compared to the base or the irq stack. If it does

[PATCH for-4.10 4/6] MIPS: Switch to the irq_stack in interrupts

From: Matt Redfearn When enterring interrupt context via handle_int or except_vec_vi, switch to the irq_stack of the current CPU if it is not already in use. The current stack pointer is masked with the thread size and compared to the base or the irq stack. If it does not match then the stack

[PATCH for-4.10 5/6] MIPS: Select HAVE_IRQ_EXIT_ON_IRQ_STACK

From: Matt Redfearn Since do_IRQ is now invoked on a separate IRQ stack, we select HAVE_IRQ_EXIT_ON_IRQ_STACK so that softirq's may be invoked directly from irq_exit(), rather than requiring do_softirq_own_stack. Signed-off-by: Matt Redfearn Acked-by: Jason A. Donenfeld Cc: Thomas Gleixner

[PATCH for-4.10 3/6] MIPS: Only change $28 to thread_info if coming from user mode

From: Matt Redfearn The SAVE_SOME macro is used to save the execution context on all exceptions. If an exception occurs while executing user code, the stack is switched to the kernel's stack for the current task, and register $28 is switched to point to the

[PATCH for-4.10 3/6] MIPS: Only change $28 to thread_info if coming from user mode

From: Matt Redfearn The SAVE_SOME macro is used to save the execution context on all exceptions. If an exception occurs while executing user code, the stack is switched to the kernel's stack for the current task, and register $28 is switched to point to the current_thread_info, which is at the

[PATCH for-4.10 2/6] MIPS: Stack unwinding while on IRQ stack

From: Matt Redfearn Within unwind stack, check if the stack pointer being unwound is within the CPU's irq_stack and if so use that page rather than the task's stack page. Signed-off-by: Matt Redfearn Acked-by: Jason A. Donenfeld

[PATCH for-4.10 2/6] MIPS: Stack unwinding while on IRQ stack

From: Matt Redfearn Within unwind stack, check if the stack pointer being unwound is within the CPU's irq_stack and if so use that page rather than the task's stack page. Signed-off-by: Matt Redfearn Acked-by: Jason A. Donenfeld Cc: Thomas Gleixner Cc: Adam Buchbinder Cc: Maciej W. Rozycki

[PATCH for-4.10 1/6] MIPS: Introduce irq_stack

From: Matt Redfearn Allocate a per-cpu irq stack for use within interrupt handlers. Also add a utility function on_irq_stack to determine if a given stack pointer is within the irq stack for that cpu. Signed-off-by: Matt Redfearn Acked-by:

[PATCH for-4.10 1/6] MIPS: Introduce irq_stack

From: Matt Redfearn Allocate a per-cpu irq stack for use within interrupt handlers. Also add a utility function on_irq_stack to determine if a given stack pointer is within the irq stack for that cpu. Signed-off-by: Matt Redfearn Acked-by: Jason A. Donenfeld Cc: Thomas Gleixner Cc: Paolo

Re: [PATCH 3/4] net: dsa: LAN9303: add I2C managed mode support

On 04/06/2017 06:46 AM, Juergen Borleis wrote: >>> + phy-reset-gpios = < 6 GPIO_ACTIVE_LOW>; >>> + phy-reset-duration = <200>; >>> + >>> + dsa,member = <0 0>; >>> + >>> + ports { >>> + #address-cells = <1>; >>> +

Re: [PATCH 3/4] net: dsa: LAN9303: add I2C managed mode support

On 04/06/2017 06:46 AM, Juergen Borleis wrote: >>> + phy-reset-gpios = < 6 GPIO_ACTIVE_LOW>; >>> + phy-reset-duration = <200>; >>> + >>> + dsa,member = <0 0>; >>> + >>> + ports { >>> + #address-cells = <1>; >>> +

Re: [PATCH 3/4] net: dsa: LAN9303: add I2C managed mode support

Hi Andrew, On Wednesday 05 April 2017 20:21:55 Andrew Lunn wrote: > [...] > > +SMSC/MicroChip LAN9303 three port ethernet switch > > +- > > + > > +Required properties: > > + > > +- compatible: should be "smsc,lan9303" > > +- #size-cells: must be 0 >

Re: [PATCH 3/4] net: dsa: LAN9303: add I2C managed mode support

Hi Andrew, On Wednesday 05 April 2017 20:21:55 Andrew Lunn wrote: > [...] > > +SMSC/MicroChip LAN9303 three port ethernet switch > > +- > > + > > +Required properties: > > + > > +- compatible: should be "smsc,lan9303" > > +- #size-cells: must be 0 >

Re: [PATCH] sched: Fix numabalancing to work with isolated cpus

On Thu 06-04-17 12:47:57, Peter Zijlstra wrote: > On Thu, Apr 06, 2017 at 12:42:04PM +0200, Michal Hocko wrote: > > > Is this something dictated by usecases which rely on isolcpus or rather > > nobody bothered to implement one scheduling domain? > > Its from the original use-case I suspect. It

Re: [PATCH] sched: Fix numabalancing to work with isolated cpus

On Thu 06-04-17 12:47:57, Peter Zijlstra wrote: > On Thu, Apr 06, 2017 at 12:42:04PM +0200, Michal Hocko wrote: > > > Is this something dictated by usecases which rely on isolcpus or rather > > nobody bothered to implement one scheduling domain? > > Its from the original use-case I suspect. It

Re: [PATCH 2/4] net: dsa: add new DSA switch driver for the SMSC-LAN9303

Hi Andrew, On Thursday 06 April 2017 13:59:00 Andrew Lunn wrote: > [...] > > > Does the MDIO bus go to the outside world? Could there be external > > > PHYs? > > > > This device includes two phys (at port 1 and 2) and these > > functions are called to detect their state. > > Some switches

Re: [PATCH 2/4] net: dsa: add new DSA switch driver for the SMSC-LAN9303

Hi Andrew, On Thursday 06 April 2017 13:59:00 Andrew Lunn wrote: > [...] > > > Does the MDIO bus go to the outside world? Could there be external > > > PHYs? > > > > This device includes two phys (at port 1 and 2) and these > > functions are called to detect their state. > > Some switches

Re: [PATCH -mm -v2] mm, swap: Use kvzalloc to allocate some swap data structure

On Wed, Apr 05, 2017 at 03:10:58PM +0800, Huang, Ying wrote: > In general, kmalloc() will have less memory fragmentation than > vmalloc(). From Dave Hansen: For example, we have a two-page data > structure. vmalloc() takes two effectively random order-0 pages, > probably from two different 2M

Re: [PATCH -mm -v2] mm, swap: Use kvzalloc to allocate some swap data structure

On Wed, Apr 05, 2017 at 03:10:58PM +0800, Huang, Ying wrote: > In general, kmalloc() will have less memory fragmentation than > vmalloc(). From Dave Hansen: For example, we have a two-page data > structure. vmalloc() takes two effectively random order-0 pages, > probably from two different 2M

Re: [patch for-4.11] mm, thp: fix setting of defer+madvise thp defrag mode

On Wed 05-04-17 18:17:42, David Rientjes wrote: > Setting thp defrag mode of "defer+madvise" actually sets "defer" in the > kernel due to the name similarity and the out-of-order way the string is > checked in defrag_store(). > > Check the string in the correct order so that >

Re: [patch for-4.11] mm, thp: fix setting of defer+madvise thp defrag mode

On Wed 05-04-17 18:17:42, David Rientjes wrote: > Setting thp defrag mode of "defer+madvise" actually sets "defer" in the > kernel due to the name similarity and the out-of-order way the string is > checked in defrag_store(). > > Check the string in the correct order so that >

Re: [PATCH 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume

On Thursday 06 April 2017 06:33 PM, Thierry Reding wrote: * PGP Signed by an unknown key On Thu, Apr 06, 2017 at 09:57:09AM +0100, Jon Hunter wrote: On 05/04/17 15:13, Laxman Dewangan wrote: +state of the system. The configuration of pin is provided via the pinctrl +DT node as detailed in

Re: [PATCH 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume

On Thursday 06 April 2017 06:33 PM, Thierry Reding wrote: * PGP Signed by an unknown key On Thu, Apr 06, 2017 at 09:57:09AM +0100, Jon Hunter wrote: On 05/04/17 15:13, Laxman Dewangan wrote: +state of the system. The configuration of pin is provided via the pinctrl +DT node as detailed in

Re: [PATCH 1/4] net: dsa: add support for the SMSC-LAN9303 tagging format

Hi Andrew, On Wednesday 05 April 2017 19:10:01 Andrew Lunn wrote: > [...] > > +static int lan9303_rcv(struct sk_buff *skb, struct net_device *dev, > > + struct packet_type *pt, struct net_device *orig_dev) > > +{ > > + u16 *lan9303_tag; > > + struct dsa_switch_tree *dst =

Re: [PATCH 1/4] net: dsa: add support for the SMSC-LAN9303 tagging format

Hi Andrew, On Wednesday 05 April 2017 19:10:01 Andrew Lunn wrote: > [...] > > +static int lan9303_rcv(struct sk_buff *skb, struct net_device *dev, > > + struct packet_type *pt, struct net_device *orig_dev) > > +{ > > + u16 *lan9303_tag; > > + struct dsa_switch_tree *dst =

[PATCH] pinctrl: at91-pio4: handle suspend to ram

When suspending to RAM, the power to the core is cut and the register values are lost. Save and restore more registers than just IMR. Signed-off-by: Alexandre Belloni --- drivers/pinctrl/pinctrl-at91-pio4.c | 34 -- 1 file

[PATCH] pinctrl: at91-pio4: handle suspend to ram

When suspending to RAM, the power to the core is cut and the register values are lost. Save and restore more registers than just IMR. Signed-off-by: Alexandre Belloni --- drivers/pinctrl/pinctrl-at91-pio4.c | 34 -- 1 file changed, 28 insertions(+), 6

[PATCH v6 8/8] arm64: dts: qcom: msm8916: Add debug unit

Add debug unit on Qualcomm msm8916 based platforms, including the DragonBoard 410c board. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 32 1 file changed, 32 insertions(+) diff --git

Re: [Patch v4 12/12] Documention: v4l: Documentation for HEVC CIDs

On 04/06/2017 08:11 AM, Smitha T Murthy wrote: > Added V4l2 controls for HEVC encoder > > Signed-off-by: Smitha T Murthy General comment: don't forget to build the pdf and check that as well. > --- > Documentation/media/uapi/v4l/extended-controls.rst | 391 >

[PATCH v6 8/8] arm64: dts: qcom: msm8916: Add debug unit

Add debug unit on Qualcomm msm8916 based platforms, including the DragonBoard 410c board. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 32 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi

Re: [Patch v4 12/12] Documention: v4l: Documentation for HEVC CIDs

On 04/06/2017 08:11 AM, Smitha T Murthy wrote: > Added V4l2 controls for HEVC encoder > > Signed-off-by: Smitha T Murthy General comment: don't forget to build the pdf and check that as well. > --- > Documentation/media/uapi/v4l/extended-controls.rst | 391 > + > 1 file

[PATCH v6 5/8] coresight: use const for device_node structures

Almost low level functions from open firmware have used const to qualify device_node structures, so add const for device_node parameters in of_coresight related functions. Reviewed-by: Stephen Boyd Signed-off-by: Leo Yan ---

[PATCH v6 6/8] coresight: add support for CPU debug module

Coresight includes debug module and usually the module connects with CPU debug logic. ARMv8 architecture reference manual (ARM DDI 0487A.k) has description for related info in "Part H: External Debug". Chapter H7 "The Sample-based Profiling Extension" introduces several sampling registers, e.g.

[PATCH v6 5/8] coresight: use const for device_node structures

Almost low level functions from open firmware have used const to qualify device_node structures, so add const for device_node parameters in of_coresight related functions. Reviewed-by: Stephen Boyd Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/of_coresight.c | 6 +++---

[PATCH v6 6/8] coresight: add support for CPU debug module

Coresight includes debug module and usually the module connects with CPU debug logic. ARMv8 architecture reference manual (ARM DDI 0487A.k) has description for related info in "Part H: External Debug". Chapter H7 "The Sample-based Profiling Extension" introduces several sampling registers, e.g.

[PATCH v6 7/8] arm64: dts: hi6220: register debug module

Bind debug module driver for Hi6220. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 64 +++ 1 file changed, 64 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi

[PATCH v6 7/8] arm64: dts: hi6220: register debug module

Bind debug module driver for Hi6220. Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 64 +++ 1 file changed, 64 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index

[PATCH v6 4/8] coresight: refactor with function of_coresight_get_cpu

This is refactor to add function of_coresight_get_cpu(), so it's used to retrieve CPU id for coresight component. Finally can use it as a common function for multiple places. Suggested-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose

[PATCH v6 4/8] coresight: refactor with function of_coresight_get_cpu

This is refactor to add function of_coresight_get_cpu(), so it's used to retrieve CPU id for coresight component. Finally can use it as a common function for multiple places. Suggested-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose Signed-off-by: Leo Yan ---

[PATCH v6 3/8] coresight: of_get_coresight_platform_data: Add missing of_node_put

From: Suzuki K Poulose The of_get_coresight_platform_data iterates over the possible CPU nodes to find a given cpu phandle. However it does not drop the reference to the node pointer returned by the of_get_coresight_platform_data. This patch also introduces another minor

[PATCH v6 3/8] coresight: of_get_coresight_platform_data: Add missing of_node_put

From: Suzuki K Poulose The of_get_coresight_platform_data iterates over the possible CPU nodes to find a given cpu phandle. However it does not drop the reference to the node pointer returned by the of_get_coresight_platform_data. This patch also introduces another minor fix is to use

[PATCH v6 2/8] doc: Add documentation for Coresight CPU debug

Update kernel-parameters.txt to add new parameter: coresight_cpu_debug.enable is a knob to enable debugging at boot time. Add detailed documentation, which contains the implementation, Mike Leach excellent summary for "clock and power domain". At the end some examples on how to enable the

[PATCH v6 2/8] doc: Add documentation for Coresight CPU debug

Update kernel-parameters.txt to add new parameter: coresight_cpu_debug.enable is a knob to enable debugging at boot time. Add detailed documentation, which contains the implementation, Mike Leach excellent summary for "clock and power domain". At the end some examples on how to enable the

[PATCH v6 1/8] coresight: bindings for CPU debug module

According to ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug', the CPU can integrate debug module and it can support self-hosted debug and external debug. Especially for supporting self-hosted debug, this means the program can access the debug module from mmio

[PATCH v6 1/8] coresight: bindings for CPU debug module

According to ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug', the CPU can integrate debug module and it can support self-hosted debug and external debug. Especially for supporting self-hosted debug, this means the program can access the debug module from mmio

[PATCH v6 0/8] coresight: enable debug module

ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter H7 "The Sample-based Profiling Extension" has description for sampling registers, we can utilize these registers to check program counter value with combined CPU exception level, secure state, etc. So this is helpful for CPU lockup

[PATCH v6 0/8] coresight: enable debug module

ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter H7 "The Sample-based Profiling Extension" has description for sampling registers, we can utilize these registers to check program counter value with combined CPU exception level, secure state, etc. So this is helpful for CPU lockup

Re: [RFC PATCH 0/4] fs: introduce new writeback error tracking infrastructure and convert ext4 to use it

On Thu, Apr 06, 2017 at 03:12:42PM +1000, NeilBrown wrote: > On Wed, Apr 05 2017, Matthew Wilcox wrote: > > > On Thu, Apr 06, 2017 at 10:02:48AM +1000, NeilBrown wrote: > >> If you are concerned about space in 'struct address_space', just prune > >> some wastage. > > > > I'm trying to (via

Re: [RFC PATCH 0/4] fs: introduce new writeback error tracking infrastructure and convert ext4 to use it

On Thu, Apr 06, 2017 at 03:12:42PM +1000, NeilBrown wrote: > On Wed, Apr 05 2017, Matthew Wilcox wrote: > > > On Thu, Apr 06, 2017 at 10:02:48AM +1000, NeilBrown wrote: > >> If you are concerned about space in 'struct address_space', just prune > >> some wastage. > > > > I'm trying to (via

Re: tty crash in tty_ldisc_receive_buf()

On Thu, Apr 6, 2017 at 2:04 AM, Michael Neuling wrote: > Hi all, > > We are seeing the following crash (in linux-next but has been around since at > least v4.10). > > [ 417.514499] Unable to handle kernel paging request for data at address > 0x2260 > [ 417.515361]

Re: tty crash in tty_ldisc_receive_buf()

On Thu, Apr 6, 2017 at 2:04 AM, Michael Neuling wrote: > Hi all, > > We are seeing the following crash (in linux-next but has been around since at > least v4.10). > > [ 417.514499] Unable to handle kernel paging request for data at address > 0x2260 > [ 417.515361] Faulting instruction

[PATCH for-4.9 5/7] MIPS: Select HAVE_IRQ_EXIT_ON_IRQ_STACK

From: Matt Redfearn Since do_IRQ is now invoked on a separate IRQ stack, we select HAVE_IRQ_EXIT_ON_IRQ_STACK so that softirq's may be invoked directly from irq_exit(), rather than requiring do_softirq_own_stack. Signed-off-by: Matt Redfearn

[PATCH for-4.9 5/7] MIPS: Select HAVE_IRQ_EXIT_ON_IRQ_STACK

From: Matt Redfearn Since do_IRQ is now invoked on a separate IRQ stack, we select HAVE_IRQ_EXIT_ON_IRQ_STACK so that softirq's may be invoked directly from irq_exit(), rather than requiring do_softirq_own_stack. Signed-off-by: Matt Redfearn Acked-by: Jason A. Donenfeld Cc: Thomas Gleixner

[PATCH for-4.9 4/7] MIPS: Switch to the irq_stack in interrupts

From: Matt Redfearn When enterring interrupt context via handle_int or except_vec_vi, switch to the irq_stack of the current CPU if it is not already in use. The current stack pointer is masked with the thread size and compared to the base or the irq stack. If it does

[PATCH for-4.9 4/7] MIPS: Switch to the irq_stack in interrupts

From: Matt Redfearn When enterring interrupt context via handle_int or except_vec_vi, switch to the irq_stack of the current CPU if it is not already in use. The current stack pointer is masked with the thread size and compared to the base or the irq stack. If it does not match then the stack

[PATCH for-4.9 1/7] MIPS: Introduce irq_stack

From: Matt Redfearn Allocate a per-cpu irq stack for use within interrupt handlers. Also add a utility function on_irq_stack to determine if a given stack pointer is within the irq stack for that cpu. Signed-off-by: Matt Redfearn Acked-by:

[PATCH for-4.9 1/7] MIPS: Introduce irq_stack

From: Matt Redfearn Allocate a per-cpu irq stack for use within interrupt handlers. Also add a utility function on_irq_stack to determine if a given stack pointer is within the irq stack for that cpu. Signed-off-by: Matt Redfearn Acked-by: Jason A. Donenfeld Cc: Thomas Gleixner Cc: Paolo

[PATCH for-4.9 2/7] MIPS: Stack unwinding while on IRQ stack

From: Matt Redfearn Within unwind stack, check if the stack pointer being unwound is within the CPU's irq_stack and if so use that page rather than the task's stack page. Signed-off-by: Matt Redfearn Acked-by: Jason A. Donenfeld

[PATCH for-4.9 3/7] MIPS: Only change $28 to thread_info if coming from user mode

From: Matt Redfearn The SAVE_SOME macro is used to save the execution context on all exceptions. If an exception occurs while executing user code, the stack is switched to the kernel's stack for the current task, and register $28 is switched to point to the

[PATCH for-4.9 2/7] MIPS: Stack unwinding while on IRQ stack

From: Matt Redfearn Within unwind stack, check if the stack pointer being unwound is within the CPU's irq_stack and if so use that page rather than the task's stack page. Signed-off-by: Matt Redfearn Acked-by: Jason A. Donenfeld Cc: Thomas Gleixner Cc: Adam Buchbinder Cc: Maciej W. Rozycki

[PATCH for-4.9 3/7] MIPS: Only change $28 to thread_info if coming from user mode

From: Matt Redfearn The SAVE_SOME macro is used to save the execution context on all exceptions. If an exception occurs while executing user code, the stack is switched to the kernel's stack for the current task, and register $28 is switched to point to the current_thread_info, which is at the

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