This basically restores slightly modified version of original
sync_global_pgds() which we had before folded p4d was introduced.
The only modification is protection against 'address' overflow.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/mm/init_64.c | 35 +++
1
This patch adds support for 5-level paging during early boot.
It generalizes boot for 4- and 5-level paging on 64-bit systems with
compile-time switch between them.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/boot/compressed/head_64.S | 23 ---
arch/x86/include/asm/pgtabl
Here's the fourth and the last bunch of of patches that brings initial
5-level paging enabling.
Please review and consider applying.
As Ingo requested I've tried to rewrite assembly parts of boot process
into C before bringing 5-level paging support. The only part where I
succeed is startup_64 in
On x86, 5-level paging enables 56-bit userspace virtual address space.
Not all user space is ready to handle wide addresses. It's known that
at least some JIT compilers use higher bits in pointers to encode their
information. It collides with valid pointers with 5-level paging and
leads to crashes.
The patch write most of startup_64 logic in C.
This is preparation for 5-level paging enabling.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/kernel/head64.c | 81 -
arch/x86/kernel/head_64.S | 93 +--
2 files
With 5-level paging randomization happens on P4D level instead of PUD.
Maximum amount of physical memory also bumped to 52-bits for 5-level
paging.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/mm/kaslr.c | 81 -
1 file changed, 62 insertions
Populate additional page table level if CONFIG_X86_5LEVEL is enabled.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/mm/init_64.c | 69 ---
1 file changed, 60 insertions(+), 9 deletions(-)
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
On Wed 2017-04-05 17:38:19, Calvin Owens wrote:
> On Wednesday 04/05 at 17:22 +0200, Petr Mladek wrote:
> > I think about a reasonable behavior. There seems to be three variables
> > that are related and are in use:
> >
> > console_level
> > minimum_console_loglevel
> > ignore_logle
On Thu, 2017-04-06 at 10:02 +1000, NeilBrown wrote:
> On Thu, Apr 06 2017, Jeff Layton wrote:
>
> > On Tue, 2017-04-04 at 10:09 -0700, Matthew Wilcox wrote:
> > > On Tue, Apr 04, 2017 at 12:25:46PM -0400, Jeff Layton wrote:
> > > > That said, I think giving more specific errors where we can is use
Most of things are in place and we can enable support of 5-level paging.
Enabling XEN with 5-level paging requires more work. The patch makes XEN
dependent on !X86_5LEVEL.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/Kconfig | 5 +
arch/x86/xen/Kconfig | 1 +
2 files changed, 6 insert
Corcodel Marian wrote:
> Hi on function fscache_object_destroyed may run with variable undefined when
> in not set CONFIG_FSCACHE
>
> +void fscache_object_destroyed(struct fscache_cache *cache)
> +{
> +#ifdef CONFIG_FSCACHE
> + if (atomic_dec_and_test(&cache->object_count))
> +
On Thu, Apr 6, 2017 at 1:18 AM, wrote:
> From: Frank Rowand
>
> of_dma_get_range() has workaround code to fixup a device tree that
> incorrectly specified a mask instead of a size for property
> dma-ranges. That device tree was fixed a year ago in v4.6, so
> the workaround is no longer needed.
On 06/04/17 14:19, Laxman Dewangan wrote:
>
> On Thursday 06 April 2017 06:33 PM, Thierry Reding wrote:
>> * PGP Signed by an unknown key
>>
>> On Thu, Apr 06, 2017 at 09:57:09AM +0100, Jon Hunter wrote:
>>> On 05/04/17 15:13, Laxman Dewangan wrote:
+state of the system. The configuration of
On Thu, Apr 06, 2017 at 03:55:29PM +0200, Philipp Zabel wrote:
> +
> + /* Retain current field setting as default */
> + if (sdformat->format.field == V4L2_FIELD_ANY)
> + sdformat->format.field = fmt->field;
> +
> + /* Retain current colorspace setting as default */
> +
Hi Javier,
2017-04-05 Javier Martinez Canillas :
> Hello Gustavo,
>
> On 04/05/2017 11:09 AM, Gustavo Padovan wrote:
> > 2017-04-03 Javier Martinez Canillas :
> >
> >> Hello Mauro and Gustavo,
> >>
> >> On 04/03/2017 07:16 AM, Mauro Carvalho Chehab wrote:
> >>> Hi Gustavo,
> >>>
> >>> Em Mon, 1
On Thu, Mar 30, 2017 at 11:15 AM, Masahiro Yamada
wrote:
>
> Some NAND controllers are using DMA engine requiring a specific
> buffer alignment. The core provides no guarantee on the nand_buffers
> pointers, which forces some drivers to allocate their own buffers
> and pass the NAND_OWN_BUFFERS
Hi Nick,
On Thu, Apr 06, 2017 at 10:59:58AM +1000, Nicholas Piggin wrote:
> On Wed, 05 Apr 2017 07:01:57 -0700 (PDT)
> David Miller wrote:
>
> > From: Nicholas Piggin
> > Date: Tue, 4 Apr 2017 13:02:33 +1000
> >
> > > On Mon, 3 Apr 2017 17:43:05 -0700
> > > Linus Torvalds wrote:
> > >
> >
Hi,
On 27/03/17 14:18, Juri Lelli wrote:
> Hi,
>
> arm and arm64 topology.c share a lot of code related to parsing of capacity
> information. This is v3 of a solution [1] (based on Will's, Catalin's and
> Mark's off-line suggestions) to move such common code in a single place:
> drivers/base/arch
On Wed, 5 Apr 2017 21:15:15 -0700
"Paul E. McKenney" wrote:
\> > diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
> > index 8efd9fe..28e3019 100644
> > --- a/kernel/trace/ftrace.c
> > +++ b/kernel/trace/ftrace.c
> > @@ -2808,18 +2808,28 @@ static int ftrace_shutdown(struct ftrace_ops *op
On Wed, Apr 5, 2017 at 11:07 PM, Moritz Fischer wrote:
> Hi Alan,
>
> minor nits, inline
>
> On Mon, Mar 13, 2017 at 04:53:32PM -0500, Alan Tull wrote:
>> Add fpga_mgr_lock/unlock functions that get a mutex for
>> exclusive use.
>>
>> of_fpga_mgr_get, fpga_mgr_get, and fpga_mgr_put no longer lock
On Sun, Apr 02, 2017 at 04:45:28PM +0200, Auger Eric wrote:
> Hi Leo,
>
> On 26/03/2017 16:41, Leo Yan wrote:
> > Convert driver to use devm_*() APIs so rely on driver model core layer
> > to manage resources. This eliminates error path boilerplate and makes
> > code neat.
> >
> > This patch also
From: Joerg Roedel
When this function fails it just sends a SIGSEGV signal to
user-space using force_sig(). This signal is missing
essential information about the cause, e.g. the trap_nr or
an error code.
Fix this by propagating the error to the only caller of
mpx_handle_bd_fault(), do_bounds(),
On 04/06/2017 03:55 PM, Philipp Zabel wrote:
> If the the field order is set to ANY in set_fmt, choose the currently
> set field order. If the colorspace is set to DEFAULT, choose the current
> colorspace. If any of xfer_func, ycbcr_enc or quantization are set to
> DEFAULT, either choose the curre
2017-04-05 15:07+0200, Filippo Sironi:
> cmpxchg_gpte() calls get_user_pages_fast() to retrieve the number of
> pages and the respective struct pages for mapping in the kernel virtual
> address space.
> This doesn't work if get_user_pages_fast() is invoked with a userspace
> virtual address that's
On Thu, 2017-04-06 at 14:12 +0200, Ludovic Desroches wrote:
> On Tue, Apr 04, 2017 at 05:50:50PM +0100, Ben Hutchings wrote:
> > On Tue, 2017-03-28 at 14:30 +0200, Greg Kroah-Hartman wrote:
> > > 4.4-stable review patch. If anyone has any objections, please let me
> > > know.
> > >
> > > ---
From: Joerg Roedel
The check between the hardware state and our shadow of it is
checked in the signal handler for all bounds exceptions,
even for the ones where we don't keep the shadow up2date.
This is a problem because when no shadow is kept the handler
fails at this point and hides the real re
On 06.04.2017 03:00, Kees Cook wrote:
This changes the x86 exception for the low 1MB by reading back zeros for
RAM areas instead of blindly allowing them. (It may be possible for heap
to end up getting allocated in low 1MB RAM, and then read out, possibly
tripping hardened usercopy.)
Unfinished:
On Thu, Apr 06, 2017 at 06:53:10AM -0700, Florian Fainelli wrote:
>
>
> On 04/05/2017 12:32 PM, Andrew Lunn wrote:
> >> +static const struct of_device_id lan9303_mdio_of_match[] = {
> >> + { .compatible = "smsc,lan9303" },
> >> + { /* sentinel */ },
> >> +};
> >> +MODULE_DEVICE_TABLE(of, lan930
On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote:
> Hi Juergen,
>
> On 06/04/17 07:23, Juergen Gross wrote:
> >On 05/04/17 21:49, Boris Ostrovsky wrote:
> >>On 04/05/2017 02:14 PM, Julien Grall wrote:
> >>>The x86 code has theoritically a similar issue, altought EFI does not
> >>>seem t
From: zhangshuxiao
vfs_llseek will check whether the file mode has
FMODE_LSEEK, no return failure. But ashmem can be
lseek, so add FMODE_LSEEK to ashmem file.
Signed-off-by: Shuxiao Zhang
Tested-by: Greg Hackmann
---
drivers/staging/android/ashmem.c | 1 +
1 file changed, 1 insertion(+)
diff
Hi Daniel,
On 06/04/17 15:27, Daniel Kiper wrote:
On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote:
Hi Juergen,
On 06/04/17 07:23, Juergen Gross wrote:
On 05/04/17 21:49, Boris Ostrovsky wrote:
On 04/05/2017 02:14 PM, Julien Grall wrote:
The x86 code has theoritically a similar
On Wed, Mar 22, 2017 at 03:29:33PM +0200, Claudiu Beznea wrote:
> Changes in v3:
> - since v2 introduced per-IP register layout there is no need
> to keep update_cdty and set_cprd_cdty members in atmel_pwm_data
> data structure used in v2; doing in this way the atmel_pwm_data
> data structure will
Hello Gustavo,
On 04/06/2017 10:08 AM, Gustavo Padovan wrote:
> Hi Javier,
>
> 2017-04-05 Javier Martinez Canillas :
>
>> Hello Gustavo,
>>
>> On 04/05/2017 11:09 AM, Gustavo Padovan wrote:
>>> 2017-04-03 Javier Martinez Canillas :
>>>
Hello Mauro and Gustavo,
On 04/03/2017 07:16
On Wed, 2017-04-05 at 23:36 -0700, Wanpeng Li wrote:
> This patch offsets the tick to avert all ticks alignment in order
> that the vtime sampling does not end up "in phase" with the jiffies
> incrementing.
>
> Reported-by: Luiz Capitulino
> Suggested-by: Rik van Riel
> Cc: Frederic Weisbecke
Em Wed, Apr 05, 2017 at 10:30:03PM -0500, Paul Clarke escreveu:
> Symbol versioning, as in glibc, results in symbols being defined as:
> @[@]
> (Note that "@@" identifies a default symbol, if the symbol name
> is repeated.)
>
> perf is currently unable to deal with this, and is unable to create
>
On 04/06/2017 10:32 AM, Julien Grall wrote:
> Hi Daniel,
>
> On 06/04/17 15:27, Daniel Kiper wrote:
>> On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote:
>>> Hi Juergen,
>>>
>>> On 06/04/17 07:23, Juergen Gross wrote:
On 05/04/17 21:49, Boris Ostrovsky wrote:
> On 04/05/2017 02:
On 06/04/17 16:27, Daniel Kiper wrote:
> On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote:
>> Hi Juergen,
>>
>> On 06/04/17 07:23, Juergen Gross wrote:
>>> On 05/04/17 21:49, Boris Ostrovsky wrote:
On 04/05/2017 02:14 PM, Julien Grall wrote:
> The x86 code has theoritically a s
On Thu, Apr 06, 2017 at 04:20:21PM +0200, Hans Verkuil wrote:
> On 04/06/2017 03:55 PM, Philipp Zabel wrote:
> > If the the field order is set to ANY in set_fmt, choose the currently
> > set field order. If the colorspace is set to DEFAULT, choose the current
> > colorspace. If any of xfer_func, y
In some of NVIDIA Tegra's platform, PWM controller is used to
control the PWM controlled regulators. PWM signal is connected to
the VID pin of the regulator where duty cycle of PWM signal decide
the voltage level of the regulator output.
The tristate (high impedance of PWM pin form Tegra) also def
Use macro DIV_ROUND_CLOSEST_ULL() for 64bit division to closet one
instead of implementing the same locally. This increase readability.
Signed-off-by: Laxman Dewangan
---
Changes from V1:
None
drivers/pwm/pwm-tegra.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/
On Sun, Apr 02, 2017 at 10:42:43PM +0200, Paul Cercueil wrote:
> Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
> the pins being properly configured before the driver probes.
>
> One inherent problem of this new approach is that the pinctrl framework
> does not allow us to
In some of NVIDIA Tegra's platform, PWM controller is used to
control the PWM controlled regulators. PWM signal is connected to
the VID pin of the regulator where duty cycle of PWM signal decide
the voltage level of the regulator output.
The tristate (high impedance of PWM pin form Tegra) also def
The rate of the PWM calculated as follows:
hz = NSEC_PER_SEC / period_ns;
rate = (rate + (hz / 2)) / hz;
This has the precision loss in lower PWM rate.
Changing this to have more precision as:
hz = DIV_ROUND_CLOSE(NSEC_PER_SEC * 100, period_ns);
rate = DIV_ROUND_CLO
This patch series have following fixes:
- Add more precession in PWM period register value calculation
for lower pwm frequency.
- Add support to configure PWM pins in different state in the
suspend/resume.
Changes from v1:
- Use standard pinctrl names for sleep and active state.
- Use API pinc
On Wed, Apr 5, 2017 at 11:25 PM, Moritz Fischer wrote:
Hi Moritz,
> Hi Alan,
>
> first pass ... need to get back to it.
Thanks for reviewing!
>
> On Mon, Mar 13, 2017 at 04:53:33PM -0500, Alan Tull wrote:
>> FPGA region is a layer above the FPGA manager and FPGA bridge
>> frameworks. Currently
On 4/6/2017 5:25 PM, Peter Zijlstra wrote:
On Thu, Apr 06, 2017 at 04:21:06PM +0800, Jin, Yao wrote:
Hi, otherwise we have to maintain 2 branch type copies between kernel and
user-space.
For example, currently X86_BR_* are defined in lbr.c. To display the branch
type in user-space, the user-s
On Thu, 6 Apr 2017 10:23:59 +0200
Auger Eric wrote:
> Hi Alex,
>
> On 03/04/2017 22:02, Alex Williamson wrote:
> > If the mmap_sem is contented then the vfio type1 IOMMU backend will
> > defer locked page accounting updates to a workqueue task. This has
> > a few problems and depending on which
On 06/04/17 14:56, Rob Herring wrote:
> On Thu, Apr 6, 2017 at 5:24 AM, Robin Murphy wrote:
>> On 06/04/17 08:01, Frank Rowand wrote:
>>> On 04/04/17 03:18, Sricharan R wrote:
Size of the dma-range is calculated as coherent_dma_mask + 1
and passed to arch_setup_dma_ops further. It overfl
On 04/06/2017 08:11 AM, Smitha T Murthy wrote:
Added V4l2 controls for HEVC encoder
s/HEVC/H.265/HEVC ?
Signed-off-by: Smitha T Murthy
---
Documentation/media/uapi/v4l/extended-controls.rst | 391 +
1 file changed, 391 insertions(+)
diff --git a/Documentation/media/uapi
On Wed, Apr 05, 2017 at 06:11:04PM -0400, Rik van Riel wrote:
> On Tue, 2017-04-04 at 18:00 -0400, Johannes Weiner wrote:
>
> > +
> > + /*
> > + * When refaults are being observed, it means a new
> > workingset
> > + * is being established. Disable active list protection to
> > get
> > +
On 06/04/17 16:01, Kirill A. Shutemov wrote:
> Most of things are in place and we can enable support of 5-level paging.
>
> Enabling XEN with 5-level paging requires more work. The patch makes XEN
> dependent on !X86_5LEVEL.
>
> Signed-off-by: Kirill A. Shutemov
> ---
> arch/x86/Kconfig | 5
If the mmap_sem is contented then the vfio type1 IOMMU backend will
defer locked page accounting updates to a workqueue task. This has
a few problems and depending on which side the user tries to play,
they might be over-penalized for unmaps that haven't yet been
accounted, or able to race the wor
On Thu, 2017-04-06 at 16:20 +0200, Hans Verkuil wrote:
> On 04/06/2017 03:55 PM, Philipp Zabel wrote:
> > If the the field order is set to ANY in set_fmt, choose the currently
> > set field order. If the colorspace is set to DEFAULT, choose the current
> > colorspace. If any of xfer_func, ycbcr_en
Attention: Beneficiary,
Your long awaited part payment of $2,500,000.00 Usd (TWO MILLION FIVE
Hundred Thousand United State Dollars) is ready for
immediate release to you, and it was electronically credited into an
ATM Visa Card for easy delivery.
Your new Payment Reference No.- 6363836,
Passwor
This series tries to improve fail-nth interface which was added to -mm
tree recently.
Akinobu Mita (5):
fault-inject: automatically detect the number base for fail-nth write
interface
fault-inject: parse as natural 1-based value for fail-nth write
interface
fault-inject: make fail-nt
The value written to fail-nth file is parsed as 0-based. Parsing as
one-based is more natural to understand and it enables to cancel the
previous setup by simply writing '0'.
This change also convert task->fail_nth from signed to unsigned int.
Cc: Dmitry Vyukov
Signed-off-by: Akinobu Mita
---
The read interface for fail-nth looks a bit odd. Read from this file
returns "N..." or "Y..." (this makes me surprise when cat this
file). Because there is no EOF condition. The first character indicates
current->fail_nth is zero or not, and then current->fail_nth is reset
to zero.
Just
The fail-nth file is created with 0666 and the access is permitted if
and only if the task is current.
This file is owned by the currnet user. So we can create it with 0644
and allow the owner to write it. This enables to watch the status of
task->fail_nth from another processes.
Cc: Dmitry Vyu
Automatically detect the number base to use when writing to fail-nth
file instead of always parsing as a decimal number.
Cc: Dmitry Vyukov
Signed-off-by: Akinobu Mita
---
fs/proc/base.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/proc/base.c b/fs/proc/base.c
index f3f
fail-nth interface is only created in /proc/self/task//.
This change also adds it in /proc//.
This makes shell based tool a bit simpler.
$ bash -c "builtin echo 100 > /proc/self/fail-nth && exec ls /"
Cc: Dmitry Vyukov
Signed-off-by: Akinobu Mita
---
Documentation/fault-injection/faul
On Thu, Apr 06, 2017 at 10:14:25AM -0400, Steven Rostedt wrote:
> On Wed, 5 Apr 2017 21:15:15 -0700
> "Paul E. McKenney" wrote:
> \> > diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
> > > index 8efd9fe..28e3019 100644
> > > --- a/kernel/trace/ftrace.c
> > > +++ b/kernel/trace/ftrace.c
On Thu, Apr 06, 2017 at 03:44:59PM +0300, Kirill A. Shutemov wrote:
> I've got the crash below on master/tip. Reveting the patch helps.
>
>
> UBSAN: Undefined behaviour in /home/kas/linux/la57/mm/sparse.c:336:9
> memb
On Thu, 2017-04-06 at 15:05 +0100, Russell King - ARM Linux wrote:
> On Thu, Apr 06, 2017 at 03:55:29PM +0200, Philipp Zabel wrote:
> > +
> > + /* Retain current field setting as default */
> > + if (sdformat->format.field == V4L2_FIELD_ANY)
> > + sdformat->format.field = fmt->field;
On Thu, Apr 06, 2017 at 05:01:52PM +0200, Philipp Zabel wrote:
> On Thu, 2017-04-06 at 15:05 +0100, Russell King - ARM Linux wrote:
> > On Thu, Apr 06, 2017 at 03:55:29PM +0200, Philipp Zabel wrote:
> > > +
> > > + /* Retain current field setting as default */
> > > + if (sdformat->format.field ==
On Thu, Apr 6, 2017 at 7:13 AM, Will Deacon wrote:
>
> We've wrapped this up in the arm64 code as __cmpwait, and we use that
> to build smp_cond_load_acquire. It would be nice to use the same machinery
> for the conditional spinning here, unless you anticipate that we're only
> going to be spinnin
On 06/04/17 15:21, Laxman Dewangan wrote:
> In some of NVIDIA Tegra's platform, PWM controller is used to
> control the PWM controlled regulators. PWM signal is connected to
> the VID pin of the regulator where duty cycle of PWM signal decide
> the voltage level of the regulator output.
>
> The t
On Thu, 2017-04-06 at 16:20 +0200, Hans Verkuil wrote:
> On 04/06/2017 03:55 PM, Philipp Zabel wrote:
> > If the the field order is set to ANY in set_fmt, choose the currently
> > set field order. If the colorspace is set to DEFAULT, choose the current
> > colorspace. If any of xfer_func, ycbcr_en
On Wed, Apr 05, 2017 at 03:54:19PM -0700, Kuppuswamy Sathyanarayanan wrote:
> According to Broxton APL PMC spec, gcr mem region starts
> at offset 0x1000 from ipc mem base address. In this driver,
> PLAT_RESOURCE_GCR_OFFSET macro defines the offset of GCR
> memory region from IPC mem region. So we
On Thu, Apr 06, 2017 at 04:38:24PM +0200, Juergen Gross wrote:
> On 06/04/17 16:27, Daniel Kiper wrote:
> > On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote:
> >> Hi Juergen,
> >>
> >> On 06/04/17 07:23, Juergen Gross wrote:
> >>> On 05/04/17 21:49, Boris Ostrovsky wrote:
> On 04/0
On Thu, Apr 06, 2017 at 04:52:11PM +0200, Juergen Gross wrote:
> On 06/04/17 16:01, Kirill A. Shutemov wrote:
> > Most of things are in place and we can enable support of 5-level paging.
> >
> > Enabling XEN with 5-level paging requires more work. The patch makes XEN
> > dependent on !X86_5LEVEL.
On Thu, Apr 06, 2017 at 03:08:46PM +0200, Michal Hocko wrote:
OK, so after recent change mostly driven by testing from Reza Arbab
(thanks again) I believe I am getting to a working state finally. All I
currently have is
in git://git.kernel.org/pub/scm/linux/kernel/git/mhocko/mm.git tree
attempts/
On Thu, 2017-04-06 at 16:10 +0100, Russell King - ARM Linux wrote:
> On Thu, Apr 06, 2017 at 05:01:52PM +0200, Philipp Zabel wrote:
> > On Thu, 2017-04-06 at 15:05 +0100, Russell King - ARM Linux wrote:
> > > On Thu, Apr 06, 2017 at 03:55:29PM +0200, Philipp Zabel wrote:
> > > > +
> > > > + /
On 06/04/17 15:21, Laxman Dewangan wrote:
> In some of NVIDIA Tegra's platform, PWM controller is used to
> control the PWM controlled regulators. PWM signal is connected to
> the VID pin of the regulator where duty cycle of PWM signal decide
> the voltage level of the regulator output.
>
> The t
On Thu, 6 Apr 2017 15:13:53 +0100
Will Deacon wrote:
> Hi Nick,
>
> On Thu, Apr 06, 2017 at 10:59:58AM +1000, Nicholas Piggin wrote:
> > On Wed, 05 Apr 2017 07:01:57 -0700 (PDT)
> > David Miller wrote:
> >
> > > From: Nicholas Piggin
> > > Date: Tue, 4 Apr 2017 13:02:33 +1000
> > >
> > >
On 04/06/2017 07:30 AM, zhangshuxia...@gmail.com wrote:
From: zhangshuxiao
vfs_llseek will check whether the file mode has
FMODE_LSEEK, no return failure. But ashmem can be
lseek, so add FMODE_LSEEK to ashmem file.
Signed-off-by: Shuxiao Zhang
Tested-by: Greg Hackmann
---
drivers/staging/an
On Thu, 6 Apr 2017 16:49:35 +0800
Cao jin wrote:
> On 04/06/2017 05:56 AM, Michael S. Tsirkin wrote:
> > On Wed, Apr 05, 2017 at 04:54:33PM +0800, Cao jin wrote:
> >> Apparently, I don't have experience to induce non-fatal error, device
> >> error is more of a chance related with the environmen
On Thu, 6 Apr 2017 16:53:44 +0800
Cao jin wrote:
> On 04/06/2017 06:36 AM, Michael S. Tsirkin wrote:
> > On Wed, Apr 05, 2017 at 04:19:10PM -0600, Alex Williamson wrote:
> >> On Thu, 6 Apr 2017 00:50:22 +0300
> >> "Michael S. Tsirkin" wrote:
> >>
> >>> On Wed, Apr 05, 2017 at 01:38:22PM -060
Hi Daniel,
On 06/04/17 16:20, Daniel Kiper wrote:
On Thu, Apr 06, 2017 at 04:38:24PM +0200, Juergen Gross wrote:
On 06/04/17 16:27, Daniel Kiper wrote:
On Thu, Apr 06, 2017 at 09:32:32AM +0100, Julien Grall wrote:
Hi Juergen,
On 06/04/17 07:23, Juergen Gross wrote:
On 05/04/17 21:49, Boris
On Thu 06-04-17 10:24:49, Reza Arbab wrote:
> On Thu, Apr 06, 2017 at 03:08:46PM +0200, Michal Hocko wrote:
> >OK, so after recent change mostly driven by testing from Reza Arbab
> >(thanks again) I believe I am getting to a working state finally. All I
> >currently have is
> >in git://git.kernel.o
On Thu, Apr 06, 2017 at 04:59:37PM +0200, Borislav Petkov wrote:
> On Thu, Apr 06, 2017 at 03:44:59PM +0300, Kirill A. Shutemov wrote:
> > I've got the crash below on master/tip. Reveting the patch helps.
> >
> >
> >
This look ok, but how did you manage to trigger this case? I think
we might have a deeper problem here.
why?
On Thu, Apr 06, 2017 at 04:02:49PM +0400, Dmitry Monakhov wrote:
> Signed-off-by: Dmitry Monakhov
> ---
> fs/block_dev.c | 9 -
> 1 file changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/fs/block_dev.c b/fs/block_dev.c
> index 2eca00e..f4b13e1 100644
> --- a/fs/block_dev.c
On 04/06/2017 04:54 PM, Philipp Zabel wrote:
> On Thu, 2017-04-06 at 16:20 +0200, Hans Verkuil wrote:
>> On 04/06/2017 03:55 PM, Philipp Zabel wrote:
>>> If the the field order is set to ANY in set_fmt, choose the currently
>>> set field order. If the colorspace is set to DEFAULT, choose the curren
On Thu, Apr 06, 2017 at 05:41:28PM +0200, Michal Hocko wrote:
On Thu 06-04-17 10:24:49, Reza Arbab wrote:
On Thu, Apr 06, 2017 at 03:08:46PM +0200, Michal Hocko wrote:
>OK, so after recent change mostly driven by testing from Reza Arbab
>(thanks again) I believe I am getting to a working state f
On 04/05, Eric W. Biederman wrote:
>
> Oleg Nesterov writes:
>
> >> --- a/kernel/signal.c
> >> +++ b/kernel/signal.c
> >> @@ -995,6 +995,10 @@ static int __send_signal(int sig, struct siginfo
> >> *info, struct task_struct *t,
> >>from_ancestor_ns || (info == SEND_SIG_FORCED))
Hi!
> > diff --git a/Documentation/devicetree/bindings/leds/leds-pca9532.txt
> > b/Documentation/devicetree/bindings/leds/leds-pca9532.txt
> > index 198f3ba..8374075 100644
> > --- a/Documentation/devicetree/bindings/leds/leds-pca9532.txt
> > +++ b/Documentation/devicetree/bindings/leds/leds-pca9
Christoph Hellwig writes:
> why?
because it is not good thing to truncate page cache and fiew lines later
realize that feature is not supported !blk_queue_discard(q) and return ENOTSUPP.
Event more: if mode == FALLOC_FL_KEEP_SIZE then we do nothing and
return ENOTSUPP unconditionally.
IMHO (m
Linus,
Wei Yongjun fixed a long standing bug in the ring buffer startup test.
If for some unknown reason, the kthread that is created fails to be
created, the return from kthread_create() is an PTR_ERR and not a NULL.
The test incorrectly checks for NULL instead of an error.
Please pull the lat
Hey Sagi,
On 05/04/17 11:47 PM, Sagi Grimberg wrote:
> Because the user can get it wrong, and its our job to do what we can in
> order to prevent the user from screwing itself.
Well, "screwing" themselves seems a bit strong. It wouldn't be much
different from a lot of other tunables in the system
[Adding the EFI maintainers]
Tl;DR: Xen's EFI wrappery doesn't implement reset_system, so when
invoked on arm64 we get a NULL dereference.
On Thu, Apr 06, 2017 at 04:39:13PM +0100, Julien Grall wrote:
> On 06/04/17 16:20, Daniel Kiper wrote:
> >On Thu, Apr 06, 2017 at 04:38:24PM +0200, Juergen Gr
On 04/03, Eric W. Biederman wrote:
>
> Oleg Nesterov writes:
>
> >> I reviewed the code and cred_guard_mutex needs to cover what it covers.
> >
> > I strongly, strongly disagree. Its scope is unnecessary huge, we should
> > narrow
> > it in any case, even if the current code was not bugy. But thi
On 06/04/17 17:24, Kirill A. Shutemov wrote:
> On Thu, Apr 06, 2017 at 04:52:11PM +0200, Juergen Gross wrote:
>> On 06/04/17 16:01, Kirill A. Shutemov wrote:
>>> Most of things are in place and we can enable support of 5-level paging.
>>>
>>> Enabling XEN with 5-level paging requires more work. The
On 04/06/2017 09:36 AM, Arnaldo Carvalho de Melo wrote:
Em Wed, Apr 05, 2017 at 10:30:03PM -0500, Paul Clarke escreveu:
Symbol versioning, as in glibc, results in symbols being defined as:
@[@]
(Note that "@@" identifies a default symbol, if the symbol name
is repeated.)
perf is currently unabl
On Thu, Apr 06, 2017 at 12:52:13PM +0530, Imran Khan wrote:
> On 4/5/2017 10:13 AM, Imran Khan wrote:
> >> We may have to revisit this logic and consider L1_CACHE_BYTES the
> >> _minimum_ of cache line sizes in arm64 systems supported by the kernel.
> >> Do you have any benchmarks on Cavium boards
On Thu, 2017-04-06 at 14:28 +0200, Peter Zijlstra wrote:
> On Wed, Apr 05, 2017 at 02:18:43PM -0700, Darren Hart wrote:
> > On Wed, Mar 22, 2017 at 11:35:52AM +0100, Peter Zijlstra wrote:
> > > @@ -1336,6 +1418,7 @@ static int wake_futex_pi(u32 __user *uad
> > >
> > > if (cmpxchg_futex_value_lo
Since commit 4cfffcfa5106 ("irqchip/mips-gic: Fix local interrupts"),
the gic driver has been allocating virq's for local interrupts during
its initialisation. Unfortunately on Malta platforms, these are the
first IRQs to be allocated and so are allocated virqs 1-3. The i8259
driver uses a legacy i
On Wed, Apr 5, 2017 at 5:14 PM, Kees Cook wrote:
> On Wed, Apr 5, 2017 at 4:57 PM, Andy Lutomirski wrote:
>> On Wed, Mar 29, 2017 at 6:41 PM, Kees Cook wrote:
>>> On Wed, Mar 29, 2017 at 3:38 PM, Andy Lutomirski
>>> wrote:
On Wed, Mar 29, 2017 at 11:15 AM, Kees Cook wrote:
> Based on
Reported-by: 李强
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/virtio/virtgpu_object.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/virtio/virtgpu_object.c
b/drivers/gpu/drm/virtio/virtgpu_object.c
index 1483dae..6f66b73 100644
--- a/drivers/gpu/drm/v
On Wed, Apr 5, 2017 at 1:36 PM, Mathias Krause wrote:
> If either via kernel command line 'vdso32=' or via 'sysctl abi.vsyscall32'
> vdso32_enabled gets set to a value below 0 or above 1, load_vdso32() won't
> map the vDSO but ARCH_DLINFO_IA32 would still pass an AT_SYSINFO_EHDR
> auxiliary vector
Christoph Hellwig writes:
> This look ok, but how did you manage to trigger this case?
# testcases
# TEST1
# Via bug in fallocate
truncate -l 1G img
losetup /dev/loop img
mkfs.ext4 -qF /dev/loop0
mkdir m
mount /dev/loop0 m
# command above truncate bdevs pagecache
xfs_io -c "falloc -k 0 32G" -d
501 - 600 of 978 matches
Mail list logo
