On Thu, Apr 13, 2017 at 03:33:05PM +0800, Minghsiu Tsai wrote:
> If the mdp_* nodes are under an mdp sub-node, their corresponding
> platform device does not automatically get its iommu assigned properly.
>
> Fix this by moving the mdp component nodes up a level such that they are
> siblings of
On Thu, Apr 13, 2017 at 03:33:05PM +0800, Minghsiu Tsai wrote:
> If the mdp_* nodes are under an mdp sub-node, their corresponding
> platform device does not automatically get its iommu assigned properly.
>
> Fix this by moving the mdp component nodes up a level such that they are
> siblings of
On 04/19/2017 10:20 PM, Cyrille Pitchen wrote:
> Hi Marek,
>
> Le 19/04/2017 à 01:05, Marek Vasut a écrit :
>> On 04/19/2017 12:51 AM, Cyrille Pitchen wrote:
>>> This patch introduces support to Double Transfer Rate (DTR) SPI protocols.
>>> DTR is used only for Fast Read operations.
>>>
>>>
On 04/19/2017 10:20 PM, Cyrille Pitchen wrote:
> Hi Marek,
>
> Le 19/04/2017 à 01:05, Marek Vasut a écrit :
>> On 04/19/2017 12:51 AM, Cyrille Pitchen wrote:
>>> This patch introduces support to Double Transfer Rate (DTR) SPI protocols.
>>> DTR is used only for Fast Read operations.
>>>
>>>
On 04/19/2017 10:12 PM, Cyrille Pitchen wrote:
> Le 19/04/2017 à 01:02, Marek Vasut a écrit :
>> On 04/19/2017 12:51 AM, Cyrille Pitchen wrote:
>>> This patch changes the prototype of spi_nor_scan(): its 3rd parameter
>>> is replaced by a 'struct spi_nor_hwcaps' pointer, which tells the spi-nor
On 04/19/2017 10:12 PM, Cyrille Pitchen wrote:
> Le 19/04/2017 à 01:02, Marek Vasut a écrit :
>> On 04/19/2017 12:51 AM, Cyrille Pitchen wrote:
>>> This patch changes the prototype of spi_nor_scan(): its 3rd parameter
>>> is replaced by a 'struct spi_nor_hwcaps' pointer, which tells the spi-nor
Le 19/04/2017 à 01:02, Marek Vasut a écrit :
> On 04/19/2017 12:51 AM, Cyrille Pitchen wrote:
>> This patch changes the prototype of spi_nor_scan(): its 3rd parameter
>> is replaced by a 'struct spi_nor_hwcaps' pointer, which tells the spi-nor
>> framework about the actual hardware capabilities
Le 19/04/2017 à 01:02, Marek Vasut a écrit :
> On 04/19/2017 12:51 AM, Cyrille Pitchen wrote:
>> This patch changes the prototype of spi_nor_scan(): its 3rd parameter
>> is replaced by a 'struct spi_nor_hwcaps' pointer, which tells the spi-nor
>> framework about the actual hardware capabilities
On 04/19/2017 01:28 PM, Gregory Fong wrote:
> On Wed, Apr 19, 2017 at 10:01 AM, Florian Fainelli
> wrote:
>> Remove the duplicate brcm,bcm7425-sun-top-ctrl compatible string and
>> replace it with brcm,bcm7435-sun-top-ctrl which was intentend.
>
> s/intentend/intended/
>
On 04/19/2017 01:28 PM, Gregory Fong wrote:
> On Wed, Apr 19, 2017 at 10:01 AM, Florian Fainelli
> wrote:
>> Remove the duplicate brcm,bcm7425-sun-top-ctrl compatible string and
>> replace it with brcm,bcm7435-sun-top-ctrl which was intentend.
>
> s/intentend/intended/
>
>>
>> Fixes:
On Thu, Apr 13, 2017 at 03:05:07PM +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> Document the devicetree bindings for Mediatek random number
> generator which could be found on MT7623 SoC or other similar
> Mediatek SoCs.
>
> Signed-off-by: Sean Wang
On Thu, Apr 13, 2017 at 03:05:07PM +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> Document the devicetree bindings for Mediatek random number
> generator which could be found on MT7623 SoC or other similar
> Mediatek SoCs.
>
> Signed-off-by: Sean Wang
> ---
>
clang fails to build with the current code:
arch/arm64/include/asm/processor.h:172:15: error: invalid operand in
inline asm: 'prfm pldl1keep, ${0:a}'
Apparently clang does not support the 'a' modifier. Change the
constraint from 'p' ('An operand that is a valid memory address is
allowed') to 'Q'
clang fails to build with the current code:
arch/arm64/include/asm/processor.h:172:15: error: invalid operand in
inline asm: 'prfm pldl1keep, ${0:a}'
Apparently clang does not support the 'a' modifier. Change the
constraint from 'p' ('An operand that is a valid memory address is
allowed') to 'Q'
On 04/19/2017 01:18 PM, Markus Mayer wrote:
> From: Markus Mayer
>
> We enable the BRCMSTB SoC drivers not only for ARM, but also ARM64.
This looks fine, can you also put add || BMIPS_GENERIC in there since
the driver is also used for these platforms?
We may also want a ||
On 04/19/2017 01:18 PM, Markus Mayer wrote:
> From: Markus Mayer
>
> We enable the BRCMSTB SoC drivers not only for ARM, but also ARM64.
This looks fine, can you also put add || BMIPS_GENERIC in there since
the driver is also used for these platforms?
We may also want a || COMPILE_TEST just to
> 20 апр. 2017 г., в 0:08, Florian Fainelli написал(а):
>
> This looks fine. If you wanted to go further, you could move the
> phy_connect(), phy_disconnect() calls down to the arc_emac_open()
> respectively arc_emac_stop() as this would also allow the PHY device to
> be
> 20 апр. 2017 г., в 0:08, Florian Fainelli написал(а):
>
> This looks fine. If you wanted to go further, you could move the
> phy_connect(), phy_disconnect() calls down to the arc_emac_open()
> respectively arc_emac_stop() as this would also allow the PHY device to
> be fully suspended when
On Wed, 19 Apr 2017 14:13:32 +0200
Pavel Machek wrote:
> Hi!
>
> We have some problems with fsl_ifc_nand ... in the old kernels, but
> this one does not seem to be fixed in v4.11, either.
>
> UBIFS complains:
>
> UBIFS error (pid 931): ubifs_scan: corrupt empty space at LEB
On Wed, 19 Apr 2017 14:13:32 +0200
Pavel Machek wrote:
> Hi!
>
> We have some problems with fsl_ifc_nand ... in the old kernels, but
> this one does not seem to be fixed in v4.11, either.
>
> UBIFS complains:
>
> UBIFS error (pid 931): ubifs_scan: corrupt empty space at LEB 282:252630
> UBIFS
On Wed, Apr 19, 2017 at 9:33 PM, Jan Kiszka wrote:
> The firmware for Quark X102x prepends a security header to the capsule
> which is needed to support the mandatory secure boot on this processor.
> The header can be detected by checking for the "_CSH" signature and -
>
On Wed, Apr 19, 2017 at 9:33 PM, Jan Kiszka wrote:
> The firmware for Quark X102x prepends a security header to the capsule
> which is needed to support the mandatory secure boot on this processor.
> The header can be detected by checking for the "_CSH" signature and -
> to avoid any GUID
Allow use of the trace_pstate_sample trace function
when the intel_pstate driver is in passive mode.
Since the core_busy and scaled_busy fields are not
used, and it might be desirable to know which path
through the driver was used, either intel_cpufreq_target
or intel_cpufreq_fast_switch, re-task
Allow use of the trace_pstate_sample trace function
when the intel_pstate driver is in passive mode.
Since the core_busy and scaled_busy fields are not
used, and it might be desirable to know which path
through the driver was used, either intel_cpufreq_target
or intel_cpufreq_fast_switch, re-task
On 19/04/17 19:15, Arnd Bergmann wrote:
> gcc warns about an obviously incorrect use of strncat():
>
> drivers/media/usb/rainshadow-cec/rainshadow-cec.c: In function
> 'rain_cec_adap_transmit':
> drivers/media/usb/rainshadow-cec/rainshadow-cec.c:299:4: error: specified
> bound 48 equals the
On 19/04/17 19:15, Arnd Bergmann wrote:
> gcc warns about an obviously incorrect use of strncat():
>
> drivers/media/usb/rainshadow-cec/rainshadow-cec.c: In function
> 'rain_cec_adap_transmit':
> drivers/media/usb/rainshadow-cec/rainshadow-cec.c:299:4: error: specified
> bound 48 equals the
On 04/19/2017 03:13 AM, Michael Ellerman wrote:
> Oliver O'Halloran writes:
>
>> On Wed, Apr 19, 2017 at 2:46 AM, Rob Herring wrote:
>>> On Mon, Apr 17, 2017 at 7:32 PM, Tyrel Datwyler
>>> wrote:
This patch introduces event
On 04/19/2017 03:13 AM, Michael Ellerman wrote:
> Oliver O'Halloran writes:
>
>> On Wed, Apr 19, 2017 at 2:46 AM, Rob Herring wrote:
>>> On Mon, Apr 17, 2017 at 7:32 PM, Tyrel Datwyler
>>> wrote:
This patch introduces event tracepoints for tracking a device_nodes
reference cycle as
On 04/19/2017 07:29 AM, Alexander Kochetkov wrote:
> The patch replace phy_start_aneg() with phy_start(). phy_start() call
> phy_start_aneg() as a part of startup sequence and allow recover from
> error (PHY_HALTED) state.
>
> Also added call phy_stop() to arc_emac_remove() to stop PHY state
On 04/19/2017 07:29 AM, Alexander Kochetkov wrote:
> The patch replace phy_start_aneg() with phy_start(). phy_start() call
> phy_start_aneg() as a part of startup sequence and allow recover from
> error (PHY_HALTED) state.
>
> Also added call phy_stop() to arc_emac_remove() to stop PHY state
On Wed, Apr 12, 2017 at 01:13:46PM +0200, Corentin Labbe wrote:
> This patch adds documentation for Device-Tree bindings for the
> syscon present in allwinner devices.
>
> Signed-off-by: Corentin Labbe
> ---
> .../devicetree/bindings/misc/allwinner,syscon.txt | 19
Hi Arnd,
On 19/04/17 18:59, Arnd Bergmann wrote:
> When the media subsystem is built as a loadable module, a built-in
> DRM driver cannot use the cec notifiers:
>
> drivers/gpu/drm/sti/sti_hdmi.o: In function `sti_hdmi_remove':
> sti_hdmi.c:(.text.sti_hdmi_remove+0x28): undefined reference to
>
On Wed, Apr 12, 2017 at 01:13:46PM +0200, Corentin Labbe wrote:
> This patch adds documentation for Device-Tree bindings for the
> syscon present in allwinner devices.
>
> Signed-off-by: Corentin Labbe
> ---
> .../devicetree/bindings/misc/allwinner,syscon.txt | 19
> +++
>
Hi Arnd,
On 19/04/17 18:59, Arnd Bergmann wrote:
> When the media subsystem is built as a loadable module, a built-in
> DRM driver cannot use the cec notifiers:
>
> drivers/gpu/drm/sti/sti_hdmi.o: In function `sti_hdmi_remove':
> sti_hdmi.c:(.text.sti_hdmi_remove+0x28): undefined reference to
>
On 2017-04-19 15:49, Philipp Zabel wrote:
> On Wed, 2017-04-19 at 14:00 +0200, Peter Rosin wrote:
> [...]
+int mux_control_select(struct mux_control *mux, int state)
>>>
>>> If we let two of these race, ...
>>
>> The window for this "race" is positively huge. If there are several
>> mux
On 2017-04-19 15:49, Philipp Zabel wrote:
> On Wed, 2017-04-19 at 14:00 +0200, Peter Rosin wrote:
> [...]
+int mux_control_select(struct mux_control *mux, int state)
>>>
>>> If we let two of these race, ...
>>
>> The window for this "race" is positively huge. If there are several
>> mux
From: Cyrille Pitchen
Switch to my alternative address as primary address.
Signed-off-by: Cyrille Pitchen
---
Hi all,
I still work at Atmel/Microchip at least for few more months but currently
my Atmel account is broken for few weeks
From: Cyrille Pitchen
Switch to my alternative address as primary address.
Signed-off-by: Cyrille Pitchen
---
Hi all,
I still work at Atmel/Microchip at least for few more months but currently
my Atmel account is broken for few weeks now. I thought it would have been
fix quickly but
Hi Marek,
can we close the review on patch 1 and 3, please?
I would like to merge into the spi-nor tree then prepare the PR to brian
for v4.12.
Best regards,
Cyrille
Le 19/04/2017 à 22:12, Cyrille Pitchen a écrit :
> Le 19/04/2017 à 01:02, Marek Vasut a écrit :
>> On 04/19/2017 12:51 AM,
Hi Marek,
Le 19/04/2017 à 01:05, Marek Vasut a écrit :
> On 04/19/2017 12:51 AM, Cyrille Pitchen wrote:
>> This patch introduces support to Double Transfer Rate (DTR) SPI protocols.
>> DTR is used only for Fast Read operations.
>>
>> According to manufacturer datasheets, whatever the number of
Hi Marek,
can we close the review on patch 1 and 3, please?
I would like to merge into the spi-nor tree then prepare the PR to brian
for v4.12.
Best regards,
Cyrille
Le 19/04/2017 à 22:12, Cyrille Pitchen a écrit :
> Le 19/04/2017 à 01:02, Marek Vasut a écrit :
>> On 04/19/2017 12:51 AM,
Hi Marek,
Le 19/04/2017 à 01:05, Marek Vasut a écrit :
> On 04/19/2017 12:51 AM, Cyrille Pitchen wrote:
>> This patch introduces support to Double Transfer Rate (DTR) SPI protocols.
>> DTR is used only for Fast Read operations.
>>
>> According to manufacturer datasheets, whatever the number of
On Wed, Apr 19, 2017 at 10:36:39PM +0200, Carlo Caione wrote:
> From: Carlo Caione
>
> All the helper functions (i.e. hp_wmi_dock_state, hp_wmi_tablet_state,
> ...) using hp_wmi_perform_query to perform an HP WMI query shadow the
> returned value in case of error.
>
> We
On Wed, Apr 19, 2017 at 10:36:39PM +0200, Carlo Caione wrote:
> From: Carlo Caione
>
> All the helper functions (i.e. hp_wmi_dock_state, hp_wmi_tablet_state,
> ...) using hp_wmi_perform_query to perform an HP WMI query shadow the
> returned value in case of error.
>
> We return -EINVAL only
Thanks Vladis!
Reviewed-by: Sinclair Yeh
On Thu, Apr 06, 2017 at 02:33:40PM +0200, Vladis Dronov wrote:
> The 'req->mip_levels' parameter in vmw_gb_surface_define_ioctl() is
> a user-controlled 'uint32_t' value which is used as a loop count limit.
> This can lead to a kernel
Thanks Vladis!
Reviewed-by: Sinclair Yeh
On Thu, Apr 06, 2017 at 02:33:40PM +0200, Vladis Dronov wrote:
> The 'req->mip_levels' parameter in vmw_gb_surface_define_ioctl() is
> a user-controlled 'uint32_t' value which is used as a loop count limit.
> This can lead to a kernel lockup and DoS. Add
From: K. Y. Srinivasan
We will not be able to send packets over a channel that has been
rescinded. Make necessary adjustments so we can properly cleanup
even when the channel is rescinded. This issue can be trigerred
in the NIC hot-remove path.
Signed-off-by: K. Y.
From: K. Y. Srinivasan
We will not be able to send packets over a channel that has been
rescinded. Make necessary adjustments so we can properly cleanup
even when the channel is rescinded. This issue can be trigerred
in the NIC hot-remove path.
Signed-off-by: K. Y. Srinivasan
---
On Wed, Apr 19, 2017 at 10:43:52PM +0200, Cyrille Pitchen wrote:
> From: Cyrille Pitchen
>
> Switch to my alternative address as primary address.
>
> Signed-off-by: Cyrille Pitchen
> ---
>
> Hi all,
>
> I still work at Atmel/Microchip at
On Wed, Apr 19, 2017 at 10:43:52PM +0200, Cyrille Pitchen wrote:
> From: Cyrille Pitchen
>
> Switch to my alternative address as primary address.
>
> Signed-off-by: Cyrille Pitchen
> ---
>
> Hi all,
>
> I still work at Atmel/Microchip at least for few more months but currently
> my Atmel
> -Original Message-
> From: k...@exchange.microsoft.com [mailto:k...@exchange.microsoft.com]
> Sent: Wednesday, April 19, 2017 1:49 PM
> To: da...@davemloft.net; net...@vger.kernel.org; linux-
> ker...@vger.kernel.org; de...@linuxdriverproject.org; o...@aepfle.de;
> a...@canonical.com;
> -Original Message-
> From: k...@exchange.microsoft.com [mailto:k...@exchange.microsoft.com]
> Sent: Wednesday, April 19, 2017 1:49 PM
> To: da...@davemloft.net; net...@vger.kernel.org; linux-
> ker...@vger.kernel.org; de...@linuxdriverproject.org; o...@aepfle.de;
> a...@canonical.com;
Updates the QMan and BMan device tree bindings for reserved memory
nodes. This makes the reserved memory allocation compatiable with
the shared-dma-pool usage.
Signed-off-by: Roy Pledge
---
Documentation/devicetree/bindings/soc/fsl/bman.txt | 11 ++-
Updates the QMan and BMan device tree bindings for reserved memory
nodes. This makes the reserved memory allocation compatiable with
the shared-dma-pool usage.
Signed-off-by: Roy Pledge
---
Documentation/devicetree/bindings/soc/fsl/bman.txt | 11 ++-
From: Madalin Bucur
Replace PPC specific set/clear_bits API with standard
bit twiddling so driver is portalable outside PPC.
Signed-off-by: Madalin Bucur
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
From: Madalin Bucur
Replace PPC specific set/clear_bits API with standard
bit twiddling so driver is portalable outside PPC.
Signed-off-by: Madalin Bucur
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/bman.c | 2 +-
drivers/soc/fsl/qbman/qman.c | 8
Use the shared-memory-pool mechanism for free buffer proxy record
area allocation.
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/bman_ccsr.c | 35 ++-
drivers/soc/fsl/qbman/bman_priv.h | 3 +++
2 files changed, 37 insertions(+), 1
Rework ioremap() for PPC and ARM. The PPC devices require a
non-coherent mapping while ARM will work with a non-cachable/write
combine mapping.
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/bman_portal.c | 16 +---
drivers/soc/fsl/qbman/qman_portal.c | 16
Use the shared-memory-pool mechanism for free buffer proxy record
area allocation.
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/bman_ccsr.c | 35 ++-
drivers/soc/fsl/qbman/bman_priv.h | 3 +++
2 files changed, 37 insertions(+), 1 deletion(-)
diff --git
Rework ioremap() for PPC and ARM. The PPC devices require a
non-coherent mapping while ARM will work with a non-cachable/write
combine mapping.
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/bman_portal.c | 16 +---
drivers/soc/fsl/qbman/qman_portal.c | 16 +---
2
From: Madalin Bucur
Add revision 3.2 of the QBMan block. This is the version
for LS1043A and LS1046A SoCs.
Signed-off-by: Madalin Bucur
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/qman_ccsr.c | 2 ++
From: Madalin Bucur
Add revision 3.2 of the QBMan block. This is the version
for LS1043A and LS1046A SoCs.
Signed-off-by: Madalin Bucur
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/qman_ccsr.c | 2 ++
drivers/soc/fsl/qbman/qman_priv.h | 1 +
2 files changed, 3 insertions(+)
diff
Use the shared-memory-pool mechanism for frame queue descriptor and
packed frame descriptor record area allocations.
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/qman_ccsr.c | 136 +-
drivers/soc/fsl/qbman/qman_priv.h | 4 +-
Use the shared-memory-pool mechanism for frame queue descriptor and
packed frame descriptor record area allocations.
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/qman_ccsr.c | 136 +-
drivers/soc/fsl/qbman/qman_priv.h | 4 +-
From: K. Y. Srinivasan
We will not be able to send packets over a channel that has been
rescinded. Make necessary adjustments so we can properly cleanup
even when the channel is rescinded. This issue can be trigerred
in the NIC hot-remove path.
Signed-off-by: K. Y.
From: K. Y. Srinivasan
We will not be able to send packets over a channel that has been
rescinded. Make necessary adjustments so we can properly cleanup
even when the channel is rescinded. This issue can be trigerred
in the NIC hot-remove path.
Signed-off-by: K. Y. Srinivasan
---
From: Valentin Rothberg
The Kconfig symbol for 32bit ARM is 'ARM', not 'ARM32'.
Signed-off-by: Valentin Rothberg
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
---
From: Valentin Rothberg
The Kconfig symbol for 32bit ARM is 'ARM', not 'ARM32'.
Signed-off-by: Valentin Rothberg
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/dpaa_sys.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Madalin Bucur
Signed-off-by: Madalin Bucur
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/bman.c | 22 ++
drivers/soc/fsl/qbman/qman.c | 38
From: Madalin Bucur
Signed-off-by: Madalin Bucur
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/bman.c | 22 ++
drivers/soc/fsl/qbman/qman.c | 38 ++
2 files changed, 60 insertions(+)
diff --git
From: Madalin Bucur
Signed-off-by: Madalin Bucur
Signed-off-by: Claudiu Manoil
[Stuart: changed to use ARCH_LAYERSCAPE]
Signed-off-by: Stuart Yoder
Signed-off-by: Roy Pledge
---
From: Madalin Bucur
Signed-off-by: Madalin Bucur
Signed-off-by: Claudiu Manoil
[Stuart: changed to use ARCH_LAYERSCAPE]
Signed-off-by: Stuart Yoder
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Claudiu Manoil
Unlike PPC builds, ARM builds need following headers
explicitly:
+#include for ioread32be()
+#includefor udelay()
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
---
From: Claudiu Manoil
Unlike PPC builds, ARM builds need following headers
explicitly:
+#include for ioread32be()
+#includefor udelay()
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/dpaa_sys.h | 2 ++
1 file changed, 2
On Wed, Apr 19, 2017 at 8:14 PM, Matthias Kaehlcke wrote:
> El Tue, Apr 04, 2017 at 11:07:20AM -0700 Matthias Kaehlcke ha dit:
>
>> From: Mark Charlebois
>>
>> cmd in COMPATIBLE_IOCTL is always a u32, so cast it so there isn't a
>> warning about an overflow
This patch series enables DPAA1 QBMan devices for ARM and
ARM64 architectures. This allows the LS1043A and LS1046A to use
QBMan functionality.
Changes since v1:
Reworked private memory allocations to use shared-dma-pool on ARM platforms
Claudiu Manoil (2):
soc/fsl/qbman: Drop L1_CACHE_BYTES
On Wed, Apr 19, 2017 at 8:14 PM, Matthias Kaehlcke wrote:
> El Tue, Apr 04, 2017 at 11:07:20AM -0700 Matthias Kaehlcke ha dit:
>
>> From: Mark Charlebois
>>
>> cmd in COMPATIBLE_IOCTL is always a u32, so cast it so there isn't a
>> warning about an overflow in XFORM.
>>
>> From: Mark Charlebois
This patch series enables DPAA1 QBMan devices for ARM and
ARM64 architectures. This allows the LS1043A and LS1046A to use
QBMan functionality.
Changes since v1:
Reworked private memory allocations to use shared-dma-pool on ARM platforms
Claudiu Manoil (2):
soc/fsl/qbman: Drop L1_CACHE_BYTES
From: Claudiu Manoil
Not relevant and arch dependent. Overkill for PPC.
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/dpaa_sys.h | 4
1 file changed, 4 deletions(-)
diff --git
From: Claudiu Manoil
Not relevant and arch dependent. Overkill for PPC.
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/dpaa_sys.h | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/soc/fsl/qbman/dpaa_sys.h b/drivers/soc/fsl/qbman/dpaa_sys.h
> -Original Message-
> From: Arnd Bergmann [mailto:a...@arndb.de]
> Sent: Wednesday, April 19, 2017 10:30 AM
> To: Kirsher, Jeffrey T
> Cc: Arnd Bergmann ; Pujari, Bimmy
> ; Duyck, Alexander H
>
> -Original Message-
> From: Arnd Bergmann [mailto:a...@arndb.de]
> Sent: Wednesday, April 19, 2017 10:30 AM
> To: Kirsher, Jeffrey T
> Cc: Arnd Bergmann ; Pujari, Bimmy
> ; Duyck, Alexander H
> ; Williams, Mitch A
> ; Keller, Jacob E ;
> Brady,
> Alan ; Joe Perches ; Singhai, Anjali
> ;
On Wed, Apr 19, 2017 at 01:41:49PM -0600, Logan Gunthorpe wrote:
> > But.. it could point to a GPU and the GPU struct device could have a
> > proxy dma_ops like Dan pointed out.
>
> Seems a bit awkward to me that in order for the intended use case, you
> have to proxy the dma_ops. I'd probably
On Wed, Apr 19, 2017 at 01:41:49PM -0600, Logan Gunthorpe wrote:
> > But.. it could point to a GPU and the GPU struct device could have a
> > proxy dma_ops like Dan pointed out.
>
> Seems a bit awkward to me that in order for the intended use case, you
> have to proxy the dma_ops. I'd probably
On Wed, Apr 19, 2017 at 02:31:13PM -0600, Baicar, Tyler wrote:
> Will do.
You don't necessarily have to reply with "will do" if you agree with the
review.
Also, please wait until I've gone through the whole pile before sending
it again.
Thanks.
--
Regards/Gruss,
Boris.
Good mailing
On Wed, Apr 19, 2017 at 02:31:13PM -0600, Baicar, Tyler wrote:
> Will do.
You don't necessarily have to reply with "will do" if you agree with the
review.
Also, please wait until I've gone through the whole pile before sending
it again.
Thanks.
--
Regards/Gruss,
Boris.
Good mailing
On Fri, Apr 14, 2017 at 8:29 PM,
wrote:
> From: Kuppuswamy Sathyanarayanan
>
> According to Whiskey cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
cove -> Cove
> battery IO. So we should skip this bit
On Fri, Apr 14, 2017 at 8:29 PM,
wrote:
> From: Kuppuswamy Sathyanarayanan
>
> According to Whiskey cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to
cove -> Cove
> battery IO. So we should skip this bit when checking for GPIO irq pending
irq -> IRQ
> status. Otherwise,
On 04/19/2017 08:55 AM, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.4.63 release.
> There are 45 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
On 04/19/2017 08:55 AM, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.4.63 release.
> There are 45 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
On Wed, Apr 19, 2017 at 10:21 PM, Laurent Pinchart
wrote:
>>
>> This adds a dependency like we have for the other panel drivers.
>
> I believe the dependency should be made optional. DPI panels that don't need
> backlight control should be supported by a kernel
On Wed, Apr 19, 2017 at 10:21 PM, Laurent Pinchart
wrote:
>>
>> This adds a dependency like we have for the other panel drivers.
>
> I believe the dependency should be made optional. DPI panels that don't need
> backlight control should be supported by a kernel that has backlight support
>
On 04/19/2017 08:42 AM, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.24 release.
> There are 69 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
On 04/19/2017 08:42 AM, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.24 release.
> There are 69 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
When building object-list.o, gcc 6 raises a warning on the sprintf call
in fscache_objlist_show:
CC fs/fscache/object-list.o
fs/fscache/object-list.c: In function ‘fscache_objlist_show’:
fs/fscache/object-list.c:265:19: warning: ‘sprintf’ may write a
terminating nul past the end of the
When building object-list.o, gcc 6 raises a warning on the sprintf call
in fscache_objlist_show:
CC fs/fscache/object-list.o
fs/fscache/object-list.c: In function ‘fscache_objlist_show’:
fs/fscache/object-list.c:265:19: warning: ‘sprintf’ may write a
terminating nul past the end of the
On 04/19/2017 08:36 AM, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.10.12 release.
> There are 69 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
On 04/19/2017 08:36 AM, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.10.12 release.
> There are 69 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
From: Carlo Caione
All the helper functions (i.e. hp_wmi_dock_state, hp_wmi_tablet_state,
...) using hp_wmi_perform_query to perform an HP WMI query shadow the
returned value in case of error.
We return -EINVAL only when the HP WMI query returns a positive value
(the
From: Carlo Caione
All the helper functions (i.e. hp_wmi_dock_state, hp_wmi_tablet_state,
...) using hp_wmi_perform_query to perform an HP WMI query shadow the
returned value in case of error.
We return -EINVAL only when the HP WMI query returns a positive value
(the specific error code) to not
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