This is a heterogeneous memory management (HMM) process address space
mirroring. In a nutshell this provide an API to mirror process address
space on a device. This boils down to keeping CPU and device page table
synchronize (we assume that both device and CPU are cache coherent like
PCIe device
Hi Guenter,
On Wednesday 28 Jun 2017 20:59:17 Laurent Pinchart wrote:
> On Wednesday 28 Jun 2017 07:36:43 Guenter Roeck wrote:
> > On Mon, May 22, 2017 at 12:48:04PM -0700, Guenter Roeck wrote:
> >> From: Robb Glasser
> >>
> >> The size of uvc_control_mapping is user
Bhumika Goyal wrote:
> Declare hwbus_ops structures as const as they are only passed as an
> argument to the function cw1200_core_probe. This argument is of type
> const. So, make these structures const.
>
> Signed-off-by: Bhumika Goyal
Patch applied to
On 28/06/17 18:09, Daniel Borkmann wrote:
> Could you elaborate on this one? If I understand it correctly, then
> the scalar += pointer case would mean the following: given I have one
> of the allowed pointer types in adjust_ptr_min_max_vals() then the
> prior scalar type inherits the ptr type/id.
On Wed, Jun 28, 2017 at 03:51:17PM +1000, Stephen Rothwell wrote:
> Hi Tejun,
>
> After merging the libata tree, today's linux-next build (arm
> multi_v7_defconfig) produced this warning:
>
> drivers/ata/libata-scsi.c: In function 'ata_scsi_var_len_cdb_xlat':
> drivers/ata/libata-scsi.c:4194:1:
On 06/28/2017 12:52 PM, Christoph Hellwig wrote:
> On Wed, Jun 28, 2017 at 12:44:00PM -0600, Jens Axboe wrote:
>> On 06/28/2017 12:38 PM, Christoph Hellwig wrote:
>>> On Wed, Jun 28, 2017 at 12:34:15PM -0600, Jens Axboe wrote:
That's what I sent out.
>>>
>>> Where? Didn't see that anywhere..
On Tue, Jun 27, 2017 at 04:48:22PM -0700, Andi Kleen wrote:
> > I haven't heard back any test result yet.
> >
> > The above patch looks good to me.
>
> This needs performance testing. It may slow down performance or latency
> sensitive workloads.
More motivation to work through the issues
Adds cpumask attribute to be used by each IMC pmu. Only one cpu (any
online CPU) from each chip for nest PMUs is designated to read counters.
On CPU hotplug, dying CPU is checked to see whether it
> -Original Message-
> From: themo...@gmail.com [mailto:themo...@gmail.com] On Behalf Of
> Jack Miller
> Sent: Wednesday, June 28, 2017 2:53 PM
> To: Ghannam, Yazen
> Cc: Jack Miller ; Borislav Petkov ; linux-
>
The patch
spi: stm32: use SoC specific compatible
has been applied to the spi tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus
The patch
spi: stm32: use normal conditional statements instead of ternary operator
has been applied to the spi tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the
The patch
regmap: irq: add chip option mask_writeonly
has been applied to the regmap tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to
The patch
spi: loopback-test: fix spelling mistake: "reruning" -> "rerunning"
has been applied to the spi tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24
The patch
spi: loopback-test: Fix kfree() NULL pointer error.
has been applied to the spi tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
On 06/28/2017 06:07 PM, Edward Cree wrote:
On 28/06/17 16:15, Daniel Borkmann wrote:
On 06/27/2017 02:56 PM, Edward Cree wrote:
Tracks value alignment by means of tracking known & unknown bits.
Tightens some min/max value checks and fixes a couple of bugs therein.
You mean the one in
Em Wed, Jun 28, 2017 at 08:21:37PM +, Hunter, Adrian escreveu:
> Sorry for the top-post...
>
> Yeah, I've now mixed up the variable attribute:
>
>
> https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#Common-Variable-Attributes
>
> with the type attribute:
>
>
On 06/28/2017 02:53 PM, Tom Lendacky wrote:
In this I am leaving the top level config as-is and adding
CONFIG_CRYPTO_DEV_SP_CCP to enable the CCP device support inside the SP device
driver.
[*] Support for AMD Secure Processor
Secure Processor device driver
Encryption and hashing
On Wed, Jun 28, 2017 at 09:18:37PM +0300, Laurent Pinchart wrote:
> Hi Guenter,
>
> On Wednesday 28 Jun 2017 20:59:17 Laurent Pinchart wrote:
> > On Wednesday 28 Jun 2017 07:36:43 Guenter Roeck wrote:
> > > On Mon, May 22, 2017 at 12:48:04PM -0700, Guenter Roeck wrote:
> > >> From: Robb Glasser
Signed-off-by: Andrea Adami
---
drivers/mtd/nand/sharpsl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/sharpsl.c b/drivers/mtd/nand/sharpsl.c
index 064ca17..87c6fc2 100644
--- a/drivers/mtd/nand/sharpsl.c
+++
Signed-off-by: Andrea Adami
---
arch/arm/mach-pxa/tosa.c | 28
1 file changed, 8 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 13de660..3074aae 100644
--- a/arch/arm/mach-pxa/tosa.c
+++
Signed-off-by: Andrea Adami
---
arch/arm/mach-pxa/corgi.c | 31 ---
1 file changed, 8 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 7270f0d..2412add 100644
---
Commit-ID: df65c1bcd9b7b639177a5a15da1b8dc3bee4f5fa
Gitweb: http://git.kernel.org/tip/df65c1bcd9b7b639177a5a15da1b8dc3bee4f5fa
Author: Thomas Gleixner
AuthorDate: Thu, 16 Mar 2017 22:50:07 +0100
Committer: Thomas Gleixner
CommitDate: Wed, 28 Jun
On Mon, Jun 26, 2017 at 12:49:09PM +, Bich HEMON wrote:
> From: Bich Hemon
>
> Each usart controller should have an alias correctly
> numbered in "aliases" node.
This is board specific typically and doesn't need to be in the binding
doc.
Rob
On 28/06/17 19:00, Mathieu Poirier wrote:
On 26 June 2017 at 09:22, Suzuki K Poulose wrote:
Use the new compatible for ATB programmable replicator in Juno.
Cc: Sudeep Holla
Cc: Mike Leach
Cc: Mathieu Poirier
"Gustavo A. R. Silva" wrote:
> Check return value from call to wl18xx_top_reg_write(),
> so in case of error jump to goto label out and return.
>
> Also, remove unnecessary value check before goto label out.
>
> Addresses-Coverity-ID: 1226938
> Signed-off-by: Gustavo
On 06/28/2017 12:31 PM, Christoph Hellwig wrote:
> On Wed, Jun 28, 2017 at 01:10:31PM -0400, Keith Busch wrote:
>> On Wed, Jun 28, 2017 at 11:32:51AM -0500, wenxi...@linux.vnet.ibm.com wrote:
>>> diff --git a/fs/block_dev.c b/fs/block_dev.c
>>> index 519599d..e871444 100644
>>> ---
On Tue, Jun 27, 2017 at 10:30:10PM -0700, Doug Anderson wrote:
> Jeffy,
>
> On Tue, Jun 27, 2017 at 9:38 PM, Jeffy Chen wrote:
> > The rockchip spi would stop driving pins when runtime suspended, which
> > might break slave's xfer(for example cros_ec).
Please delete
On 2017/06/28 11:16PM, Masami Hiramatsu wrote:
> > > diff --git
> > > a/tools/testing/selftests/ftrace/test.d/kprobe/kprobe_eventname.tc
> > > b/tools/testing/selftests/ftrace/test.d/kprobe/kprobe_eventname.tc
> > > new file mode 100644
> > > index 000..d259031
> > > --- /dev/null
> > > +++
This contains the various __init C functions, the initial assembly
kernel entry point, and the code to reset the system. When a file was
init-related, it contains
Signed-off-by: Palmer Dabbelt
---
arch/riscv/include/asm/bug.h | 88 +++
This contains all the code that directly interfaces with the RISC-V
memory model. While this code corforms to the current RISC-V ISA
specifications (user 2.2 and priv 1.10), the memory model is somewhat
underspecified in those documents. There is a working group that hopes
to produce a formal
Thanks to everyone who has particpated in the review process so far. We've
made a handful of changes since the v2 port, and at this point aside from a
handful of FIXMEs floating around the code I don't think there's anything left
I know about that's still missing for a minimal port. I believe
On Sun, May 21, 2017 at 11:42:24AM +0800, Ryder Lee wrote:
> Add support for the Mediatek PCIe Gen2 controller which can
> be found on MT7623 series SoCs.
>
> Signed-off-by: Ryder Lee
> ---
> drivers/pci/host/Kconfig | 11 +
> drivers/pci/host/Makefile|
On 06/26/2017 02:26 AM, joeyli wrote:
> Hi all,
>
> If ACPI received ejection request for a ACPI container, kernel
> emits KOBJ_CHANGE uevent when it found online children devices
> below the acpi container.
>
> Base on the description of caa73ea15 kernel patch, user space
> is expected to
On Mon, Jun 19, 2017 at 01:57:20PM +0200, Robert Jarzmik wrote:
> My serie shifted by one, so the very first of the serie is therefore missing,
> formerly "ALSA: ac97: split out the generic ac97 registers" in
> https://patchwork.kernel.org/patch/9398143/, and the shift triggered the
> inclusion
Hi,
Please find my comments inline.
On 19 June 2017 at 07:10, Smitha T Murthy wrote:
> Added V4l2 controls for HEVC encoder
>
> Signed-off-by: Smitha T Murthy
> ---
> Documentation/media/uapi/v4l/extended-controls.rst | 364
> +
This new harmless warning just showed up:
drivers/ata/libata-scsi.c: In function 'ata_scsi_var_len_cdb_xlat':
drivers/ata/libata-scsi.c:4194:1: error: label 'unspprt_sa' defined but not
used [-Werror=unused-label]
The label is obviously unused and can be removed.
Fixes: b1ffbf854e08 ("libata:
With the introduction of mlx5 firmware flash support, we get a link
error with CONFIG_MLXFW=m and CONFIG_MLX5_CORE=y:
drivers/net/ethernet/mellanox/mlx5/core/fw.o: In function `mlx5_firmware_flash':
fw.c:(.text+0x9d4): undefined reference to `mlxfw_firmware_flash'
We could have a more elaborate
Problem
---
We are using an ARM embedded platform and require 16KiB NTB's to allow for fast
data transfer. Unfortunately we have found that there are times after
running the kernel for a while and transferring a lot of data over the CDC-NCM
connection that it can become harder to find 16KiB
On 28/06/17 22:54, Andy Shevchenko wrote:
> On Wed, Jun 28, 2017 at 12:38 PM, Wolfram Sang wrote:
>>
if (i2c_pca_add_numbered_bus(>adap) < 0) {
- ret = -ENODEV;
- goto e_adapt;
+ return -ENODEV;
>>>
>>>
On Wed, 28 Jun 2017 14:05:14 PDT (-0700), mer...@debian.org wrote:
> On Wed, Jun 28, 2017 at 11:55:38AM -0700, Palmer Dabbelt wrote:
>> This patch contains all the build infastructure that actually enables
>> the RISC-V port. This includes Makefiles, linker scripts, and Kconfig
>> files. It also
On Wed, Jun 28, 2017 at 12:44:17PM -0500, Jack Miller wrote:
> SwitchBSP() is part of the UEFI MPServices Protocol which I believe is
> an extension but it is supported by all of the firmwares I've tested
> on.
Damn, that ubiquitous firmware. One day the kernel will be just a
userspace process to
On 28-06-17 19:02, Tom Levens wrote:
On Wed, 28 Jun 2017, Guenter Roeck wrote:
On Wed, Jun 28, 2017 at 05:29:38PM +0200, Tom Levens wrote:
[ ... ]
Whatever happened to this patch though? It didn't make it to mainline,
otherwise I'd have found it sooner...
I'll have to look it up,
On Sat, 13 May 2017, Chen Yu wrote:
> This is because:
> 1. One of the drivers has declare many vector resource via
>pci_enable_msix_range(), say, this driver might likely want
>to reserve 6 per logical CPU, then there would be 192 of them.
This has been solved with the managed interrupt
On Tue, Jun 27, 2017 at 5:11 PM, Richard Guy Briggs wrote:
> On 2017-05-30 17:21, Paul Moore wrote:
>> On Tue, Apr 4, 2017 at 5:21 AM, Richard Guy Briggs wrote:
...
>> > diff --git a/kernel/audit.c b/kernel/audit.c
>> > index 25dd70a..7d83c5a 100644
>> > ---
Hi Luis!
On Wed, 28 Jun 2017, Luis R. Rodriguez wrote:
On Wed, Jun 28, 2017 at 06:45:14AM -0700, Davidlohr Bueso wrote:
On Tue, 27 Jun 2017, Luis R. Rodriguez wrote:
> diff --git a/include/linux/swait.h b/include/linux/swait.h
> index 4a4e180d0a35..14fcf23cece4 100644
> ---
The patch
spi: stm32: fix compatible to fit with new bindings
has been applied to the spi tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
The patch
spi: stm32: add runtime PM support
has been applied to the spi tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
I ran into a build error:
kernel/sched/fair.c:2655:44: error: 'struct sched_domain' declared inside
parameter list will not be visible outside of this definition or declaration
[-Werror]
Adding a forward declaration for the struct name is sufficient
to avoid it.
Fixes: 3fed382b46ba
On Wed, Jun 28, 2017 at 03:00:08PM -0400, Don Zickus wrote:
> On Tue, Jun 27, 2017 at 04:48:22PM -0700, Andi Kleen wrote:
> > > I haven't heard back any test result yet.
> > >
> > > The above patch looks good to me.
> >
> > This needs performance testing. It may slow down performance or latency
On Tue, 27 Jun 2017, Bjorn Helgaas wrote:
> On Thu, Mar 16, 2017 at 10:50:06PM +0100, Thomas Gleixner wrote:
> > Provide a kernel config option which can be selected by an architecture
> > when the low level PCI configuration space accessors in the architecture
> > use their own serialization or
Signed-off-by: Andrea Adami
---
arch/arm/mach-pxa/poodle.c | 28
1 file changed, 8 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 62a1191..4881a43 100644
---
Commit-ID: aae3e318d012e76211f34bb65754f3d4d2a8c93d
Gitweb: http://git.kernel.org/tip/aae3e318d012e76211f34bb65754f3d4d2a8c93d
Author: Thomas Gleixner
AuthorDate: Thu, 16 Mar 2017 22:50:04 +0100
Committer: Thomas Gleixner
CommitDate: Wed, 28 Jun
Commit-ID: 425a17cbfff933c4cca4eeef5caa5926d198dd85
Gitweb: http://git.kernel.org/tip/425a17cbfff933c4cca4eeef5caa5926d198dd85
Author: Christoph Hellwig
AuthorDate: Mon, 26 Jun 2017 12:20:58 +0200
Committer: Thomas Gleixner
CommitDate: Wed, 28 Jun 2017
On Tue, Jun 20, 2017 at 9:51 AM, Jerry Hoemann wrote:
> Add bus_dsm_mask to sysfs display under /sys/bus/nd/devices/ndbusX/nfit.
>
> Signed-off-by: Jerry Hoemann
> ---
> drivers/acpi/nfit/core.c | 10 ++
> 1 file changed, 10 insertions(+)
>
On 26 June 2017 at 09:22, Suzuki K Poulose wrote:
> Use the new compatible for ATB programmable replicator in Juno.
>
> Cc: Sudeep Holla
> Cc: Mike Leach
> Cc: Mathieu Poirier
> Cc: Liviu Dudau
On Mon, Jun 26, 2017 at 11:51:28AM +0200, Amelie Delaunay wrote:
> This patch documents support for STM32H7 Real Time Clock.
> It introduces a new compatible and rework clock definitions.
> On STM32H7 we have a 'pclk' clock for register access, in addition to
> the 'rtc_ck' clock.
>
>
On Mon, Jun 26, 2017 at 09:48:59AM +0800, Chen-Yu Tsai wrote:
> On Sat, Jun 24, 2017 at 2:24 PM, Danny Milosavljevic
> > +static const struct snd_kcontrol_new sun4i_codec_mixer_controls[] = {
> > + SOC_DAPM_DOUBLE("DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
> > +
On Wed, 28 Jun 2017, Mark Rutland wrote:
> On Wed, Jun 28, 2017 at 05:24:24PM +0200, Thomas Gleixner wrote:
> Given we're gonig to clean things up, we may as well avoid the backwards
> include of , whcih was only there as
> a bodge:
>
> For the UP arches we do:
> # echo '#include '
2017-06-28 11:05 GMT-07:00 Long Li :
> From: Long Li
>
> In cifs_call_async, server response may return as soon as I/O is submitted.
> Because mid entry is freed on the return path, do not modify it after I/O is
> submitted.
>
> Signed-off-by:
When rpmsg devices are expected to be matched based on their compatible
the modalias should reflect this, so that module autoloading has a
chance to match and load the appropriate module.
Reported-by: Rob Clark
Signed-off-by: Bjorn Andersson
---
This patch contains the code that interfaces with ELF objects on RISC-V
systems, the vast majority of which is present to load kernel modules.
Signed-off-by: Palmer Dabbelt
---
arch/riscv/include/asm/compat.h | 31 +++
arch/riscv/include/asm/elf.h| 85
This patch contains code that interfaces with devices that are mandated
by the RISC-V supervisor specification and that don't have explicit
drivers anywhere else in the tree. This includes the staticly defined
interrupts, the CSR-mapped timer, and virtualized SBI devices.
Signed-off-by: Palmer
This patch contains the implementation of tasks on RISC-V, most of which
is involved in task switching.
Signed-off-by: Palmer Dabbelt
---
arch/riscv/include/asm/asm-offsets.h | 1 +
arch/riscv/include/asm/current.h | 43
arch/riscv/include/asm/kprobes.h | 22
This patch contains code that is more specific to the RISC-V ISA than it
is to Linux. It contains string and math operations, C wrappers for
various assembly instructions, stack walking code, and uaccess.
Signed-off-by: Palmer Dabbelt
---
arch/riscv/include/asm/asm.h
From: Long Li
In cifs_call_async, server may respond as soon as I/O is submitted. Because
mid entry is freed on the return path, it should not be modified after I/O
is submitted.
cifs_save_when_sent modifies the sent timestamp in mid entry, and should not
be called after
Power9 has In-Memory-Collection (IMC) infrastructure which contains
various Performance Monitoring Units (PMUs) at Nest level (these are
on-chip but off-core), Core level and Thread level.
The Nest PMU counters are handled by a Nest IMC microcode which runs
in the OCC (On-Chip Controller)
On Tue, Jun 20, 2017 at 03:00:53PM +0530, Arvind Yadav wrote:
> Here, rx/tx allocation can fail. So avoid kvfree call
> with NULL pointer.
It's not an error to free NULL, the APIs will just ignore the value.
signature.asc
Description: PGP signature
On 6/28/2017 2:39 PM, Brijesh Singh wrote:
On 06/28/2017 12:47 PM, Tom Lendacky wrote:
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 0528a62..418f991 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -512,14 +512,14 @@ config CRYPTO_DEV_ATMEL_SHA
On Mon, Jun 19, 2017 at 03:21:36PM +0530, Arvind Yadav wrote:
> 'commit 47ff3de911a7 ("PCI: dra7xx: Add TI DRA7xx PCIe driver")' in order to
> clear
> MSI and MAIN interrupts requests wrote '0' to PCIECTRL_TI_CONF_IRQSTATUS_MSI
> and PCIECTRL_TI_CONF_IRQSTATUS_MAIN registers. However the TRM has
From: Baoquan He
commit fc5f9d5f151c9fff21d3d1d2907b888a5aec3ff7 upstream.
Jeff Moyer reported that on his system with two memory regions 0~64G and
1T~1T+192G, and kernel option "memmap=192G!1024G" added, enabling KASLR
will make the system hang intermittently during boot.
From: Baoquan He
commit fc5f9d5f151c9fff21d3d1d2907b888a5aec3ff7 upstream.
Jeff Moyer reported that on his system with two memory regions 0~64G and
1T~1T+192G, and kernel option "memmap=192G!1024G" added, enabling KASLR
will make the system hang intermittently during boot.
On Tue, Jun 27, 2017 at 9:45 PM, Stanimir Varbanov
wrote:
> Hi Arnd,
>
> On 27.06.2017 18:02, Arnd Bergmann wrote:
>>
>> If QCOM_MDT_LOADER is enabled, but ARCH_QCOM is not, we run into
>> a build error:
>>
>> ERROR: "qcom_mdt_load"
On Wed, Jun 28, 2017 at 12:18 AM, Dave Airlie wrote:
>
> git://people.freedesktop.org/~airlied/linux drm-fixes-for-v4.12-rc8
That tag does not exist.
However:
> for you to fetch changes up to 9ff1beb1d19ffe2b26bf9cd2d33e6073d4f4b5fe:
That commit 9ff1beb1d19f _is_ the head
Signed-off-by: Andrea Adami
---
include/linux/mtd/sharpsl.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/mtd/sharpsl.h b/include/linux/mtd/sharpsl.h
index 65e91d0..c0e0be2 100644
--- a/include/linux/mtd/sharpsl.h
+++ b/include/linux/mtd/sharpsl.h
@@
The Sharp SL Series (Zaurus) PXA handhelds have 16/64/128M of NAND flash
and share the same layout of the first 7M partition, managed by Sharp FTL.
The purpose of this self-contained patch is to add a common parser and
remove the hardcoded sizes in the board files (these devices are not yet
This patchset introduces a simple partition parser for the Sharp SL
Series PXA handhelds. More details in the commit text.
I have set in cc the ARM PXA maintainers because this is the MTD part of
a planned wider patchset cleaning the Zaurus board files. The MFD maintainers
are also in cc (tmio.h
Signed-off-by: Andrea Adami
---
arch/arm/mach-pxa/spitz.c | 34 +-
1 file changed, 9 insertions(+), 25 deletions(-)
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 67d66c7..21a2e42 100644
---
Signed-off-by: Andrea Adami
---
include/linux/mfd/tmio.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index a1520d8..23bb069 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -139,6 +139,7 @@
On 06/28/2017 12:11 PM, Tejun Heo wrote:
> Hello,
>
> On Wed, Jun 28, 2017 at 10:54:28AM -0600, Jens Axboe wrote:
Series looks fine to me. I don't know how you want to split or funnel it,
since it touches multiple different parts. Would it make sense to split
this
series into
This patch add a new memory migration helpers, which migrate memory
backing a range of virtual address of a process to different memory
(which can be allocated through special allocator). It differs from
numa migration by working on a range of virtual address and thus by
doing migration in chunk
This does not use existing page table walker because we want to share
same code for our page fault handler.
Changed since v2:
- s/device unaddressable/device private/
Changes since v1:
- Use spinlock instead of rcu synchronized list traversal
Signed-off-by: Jérôme Glisse
HMM provides 3 separate types of functionality:
- Mirroring: synchronize CPU page table and device page table
- Device memory: allocating struct page for device memory
- Migration: migrating regular memory to device memory
This patch introduces some common helpers and definitions to
From: Michal Hocko
There are new users of memory hotplug emerging. Some of them require
different subset of arch_add_memory. There are some which only require
allocation of struct pages without mapping those pages to the kernel
address space. We currently have __add_pages for
HMM (heterogeneous memory management) need struct page to support migration
from system main memory to device memory. Reasons for HMM and migration to
device memory is explained with HMM core patch.
This patch deals with device memory that is un-addressable memory (ie CPU
can not access it).
Signed-off-by: Patrick Venture
---
arch/arm/mach-aspeed/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig
index f3f8c5c658db..b71ab9f37eb1 100644
--- a/arch/arm/mach-aspeed/Kconfig
+++
Colin Ian King wrote:
> From: Colin Ian King
>
> Trivial fix to spelling mistake in mwifiex_dbg message
>
> Signed-off-by: Colin Ian King
Patch applied to wireless-drivers-next.git, thanks.
3334c28ec56c mwifiex:
On Wed, 2017-06-28 at 21:10 +0200, Lubomir Rintel wrote:
> On Wed, 2017-06-28 at 17:02 +0200, Johannes Berg wrote:
> > On Wed, 2017-06-28 at 15:17 +0200, Lubomir Rintel wrote:
> > > The mac80211_hwsim doesn't offer a way to disable the debugging
> > > output.
> > > Unfortunately, it's pretty
On Mon 26 Jun 02:04 PDT 2017, Henri Roosen wrote:
> On 06/25/2017 11:51 PM, Bjorn Andersson wrote:
> > On Fri 02 Jun 04:35 PDT 2017, Henri Roosen wrote:
> >
> > > A device might not have an ops structure registered. This
> > > patch fixes a null-prt dereference by checking ops before
On Thu, 29 Jun 2017, Anju T Sudhakar wrote:
> +static void cleanup_all_core_imc_memory(struct imc_pmu *pmu_ptr)
> +{
> + struct imc_mem_info *ptr;
> +
> + for (ptr = pmu_ptr->mem_info; ptr; ptr++) {
> + if (ptr->vbase[0])
> + free_pages((u64)ptr->vbase[0],
The patch
drm: dw-hdmi-i2s: add .get_dai_id callback for ALSA SoC
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours)
The CDC-NCM driver can require large amounts of memory to create
skb's and this can be a problem when the memory becomes fragmented.
This especially affects embedded systems that have constrained
resources but wish to maximise the throughput of CDC-NCM with 16KiB
NTB's.
The issue is after
Commit-ID: bb290fda879ffd1f6f6b0869bf7335554093f4bd
Gitweb: http://git.kernel.org/tip/bb290fda879ffd1f6f6b0869bf7335554093f4bd
Author: Thomas Gleixner
AuthorDate: Thu, 16 Mar 2017 22:50:05 +0100
Committer: Thomas Gleixner
CommitDate: Wed, 28 Jun
On Wednesday, June 28, 2017 09:44:55 AM Viresh Kumar wrote:
> On 27-06-17, 18:08, Rafael J. Wysocki wrote:
> > On Tue, Jun 27, 2017 at 6:20 AM, Viresh Kumar
> > wrote:
> > > @Rafael: Will it be fine to lower down the value of LATENCY_MULTIPLIER?
> >
> > We can do that,
Hi Guenter,
On Wednesday 28 Jun 2017 07:36:43 Guenter Roeck wrote:
> On Mon, May 22, 2017 at 12:48:04PM -0700, Guenter Roeck wrote:
> > From: Robb Glasser
> >
> > The size of uvc_control_mapping is user controlled leading to a
> > potential heap overflow in the uvc driver.
On Wed, Jun 28, 2017 at 09:29:57AM -0700, Shaohua Li wrote:
> From: Shaohua Li
>
> Add an API to export cgroup fhandle info. We don't export a full 'struct
> file_handle', there are unrequired info. Sepcifically, cgroup is always
> a directory, so we don't need a
Hello,
On Wed, Jun 28, 2017 at 10:54:28AM -0600, Jens Axboe wrote:
> >> Series looks fine to me. I don't know how you want to split or funnel it,
> >> since it touches multiple different parts. Would it make sense to split
> >> this
> >> series into two - one for the kernfs changes, and then a
On 6/28/17 6:18 AM, Mike Rapoport wrote:
On Tue, Jun 27, 2017 at 09:01:20AM -0700, Prakash Sangappa wrote:
On 6/27/17 8:35 AM, Mike Rapoport wrote:
On Tue, Jun 27, 2017 at 09:06:43AM +0200, Michal Hocko wrote:
This is an user visible API so let's CC linux-api mailing list.
On Mon 26-06-17
On 06/28/2017 12:38 PM, Christoph Hellwig wrote:
> On Wed, Jun 28, 2017 at 12:34:15PM -0600, Jens Axboe wrote:
>> That's what I sent out.
>
> Where? Didn't see that anywhere..
Looks like you weren't CC'ed on the original thread. About an hour ago.
>> Here it is again. We should get this into
Em Wed, Jun 28, 2017 at 08:40:25PM +0300, Adrian Hunter escreveu:
> On 06/28/2017 04:04 PM, Arnaldo Carvalho de Melo wrote:
> > Em Fri, May 26, 2017 at 11:17:26AM +0300, Adrian Hunter escreveu:
> >> Add definitions for synthesized Intel PT events for power and ptwrite.
> >
> >> +++
On Wed, Jun 28, 2017 at 1:00 PM, Ghannam, Yazen wrote:
>> -Original Message-
>> From: themo...@gmail.com [mailto:themo...@gmail.com] On Behalf Of
>> Jack Miller
>> Sent: Wednesday, June 28, 2017 1:44 PM
>> To: Borislav Petkov
>> Cc: Jack Miller
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