Hello Hans,
On 08/09/2017 02:02 PM, Hans de Goede wrote:
> Hi,
>
> On 09-08-17 10:44, Javier Martinez Canillas wrote:
>> The driver has a tristate Kconfig symbol so it can be built as a module,
>> but it doesn't export the device aliases in the module. So if the driver
>> is built as module, auto
Use resource managed variants of irq_alloc_generic_chip() and
irq_setup_generic_chip().
Signed-off-by: Bartosz Golaszewski
---
drivers/gpio/gpio-sta2x11.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/gpio-sta2x11.c b/drivers/gpio/gpio-sta2x11.c
i
Use resource managed variants of irq_alloc_generic_chip() and
irq_setup_generic_chip().
Signed-off-by: Bartosz Golaszewski
---
drivers/gpio/gpio-mxc.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index a4d4
This driver is non-modular so explicitly disallow a driver unbind.
Signed-off-by: Bartosz Golaszewski
---
drivers/gpio/gpio-mxs.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
index 6ae583f36733..159927876577 100644
--- a/drivers/gpio/gpio-
Use resource managed variants of irq_alloc_generic_chip() and
irq_setup_generic_chip().
Signed-off-by: Bartosz Golaszewski
---
drivers/gpio/gpio-mxs.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
index 159927
Use resource managed variants of irq_alloc_generic_chip() and
irq_setup_generic_chip().
Signed-off-by: Bartosz Golaszewski
---
drivers/gpio/gpio-pch.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c
index f6600f8a
This driver is non-modular so explicitly disallow a driver unbind.
Signed-off-by: Bartosz Golaszewski
---
drivers/gpio/gpio-sta2x11.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpio/gpio-sta2x11.c b/drivers/gpio/gpio-sta2x11.c
index 9e705162da8d..56beb31c03db 100644
--- a/driver
Use resource managed variants of irq_alloc_generic_chip() and
irq_setup_generic_chip().
Signed-off-by: Bartosz Golaszewski
---
drivers/gpio/gpio-ml-ioh.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c
index
We now provide resource managed versions of irq_alloc_generic_chip()
and irq_setup_generic_chip(). Use them in all relevant gpio drivers.
v1 -> v2:
- added three patches which explicitly disable driver unbinding for
non-modular drivers, only updated those built-in modules which already
use dev
This driver is non-modular so explicitly disallow a driver unbind.
Signed-off-by: Bartosz Golaszewski
---
drivers/gpio/gpio-mxc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index 92692251ade1..a4d4a3527a24 100644
--- a/drivers/gpio/gpio-
2017-08-09 19:42 GMT+09:00 Vitaly Kuznetsov :
> What happens is: __netvsc_vf_setup() does dev_open() for the VF device and
> the consecutive dev_change_name() fails with -EBUSY because of the
> (dev->flags & IFF_UP) check. The history of this code predates git so I
> wasn't able to figure out when
On Wed, 2017-08-09 at 12:59 +0300, Kirill A. Shutemov wrote:
> On Mon, Aug 07, 2017 at 10:59:51AM -0400, Rik van Riel wrote:
> > On Mon, 2017-08-07 at 15:46 +0200, Michal Hocko wrote:
> > > On Mon 07-08-17 15:22:57, Michal Hocko wrote:
> > > > This is an user visible API so make sure you CC linux-a
On Wed, Aug 9, 2017 at 1:00 AM, Dmitry V. Levin wrote:
> On Sun, Aug 06, 2017 at 06:44:06PM +0200, Mikko Rapeli wrote:
>> This libc header has sockaddr definition in user space.
>>
>> Fixes user space compilation errors like these from kernel headers including
>> only linux/socket.h:
>>
>> error:
| From: Bjorn Helgaas
| Sent: Tuesday, August 8, 2017 7:22 PM
| ...
| and the caller should do something like this:
|
| if (pcie_relaxed_ordering_broken(pci_find_pcie_root_port(pdev)))
| adapter->flags |= ROOT_NO_RELAXED_ORDERING;
|
| That way it's obvious where the issue is, and it'
On 08/08/2017 09:33 PM, Laurent Pinchart wrote:
Hi Bhumika,
Thank you for the patch.
On Tuesday 08 Aug 2017 21:24:10 Bhumika Goyal wrote:
Make these structures const as they are only stored in the funcs field
of drm_bridge structure, which is of type const.
Done using Coccinelle.
Signed-off
On 08/09/2017 02:08 PM, Laurent Pinchart wrote:
Hi Arvind,
Thank you for the patch.
On Wednesday 09 Aug 2017 13:08:37 Arvind Yadav wrote:
snd_pcm_ops are not supposed to change at runtime. All functions
working with snd_pcm_ops provided by work with
const snd_pcm_ops. So mark the non-const
Hi Martin,
This code was added to detect holes, when we started testing with 4.9
kernel. when we disabled "use_blk_mq" and no merges, we are hitting
issues with holes. Anyhow In latest upstream, it got fixed with this
commit 5a8d75a1b8c99bdc926ba69b7b7dbe4fae81a5af
So we are removing the code rela
On Wed, Aug 9, 2017 at 12:57 AM, Dmitry V. Levin wrote:
> On Sun, Aug 06, 2017 at 06:44:05PM +0200, Mikko Rapeli wrote:
>> Arnd Bergmann doubts that __kernel_size_t could be used here
>> so trying to fall back to gcc's .
>
> The only architecture where you cannot do this safely is x86 family
> be
When the flow dissector first sees packets coming in on a DSA devices the
802.3 header wont be located where the code expects it to be as the tag
is still present. Adding this new callback allows a DSA device to provide a
new function that the flow_dissector can use to get the correct protocol
and
The MT7530 inserts the 4 magic header in between the 802.3 address and
protocol field. The patch implements the callback that can be called by
the flow dissector to figure out the real protocol and offset of the
network header. With this patch applied we can properly parse the packet
and thus make
On 08/09/2017 11:59 AM, Kirill A. Shutemov wrote:
> It's not obvious to me what would break if kernel would ignore
> MADV_DONTFORK or MADV_DONTDUMP.
Ignoring MADV_DONTDUMP could cause secrets to be written to disk,
contrary to the expected security policy of the system.
Thanks,
Florian
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root cause of this is that skb_hash will call the
flow_dissector. At this point the skb still contains the magic switch
header and the skb->protocol field is not set up to the correct 802.3
value yet. By
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root cause of this is that skb_hash will call the
flow_dissector. At this point the skb still contains the magic switch
header and the skb->protocol field is not set up to the correct 802.3
value yet. By
We need to access this struct from within the flow_dissector to fix
dissection for packets coming in on DSA devices.
Signed-off-by: Muciri Gatimu
Signed-off-by: Shashidhar Lakkavalli
Signed-off-by: John Crispin
---
include/net/dsa.h | 7 +++
net/dsa/dsa_priv.h | 7 ---
2 files changed
On Tue, 08 Aug 2017, Pavel Machek wrote:
> Hi!
>
> > > > > I've not precisely checked it, but smth is telling me that below
> > > > > patch can cause this:
> > > > >
> > > > > commit 78daaca78ee57dead0f4aa5ee399f0499e81cd9e
> ...
> > > > > mfd: twl4030-irq: Drop unnecessary static
> > > > >
---
This email has been checked for viruses by Avast antivirus software.
https://www.avast.com/antivirus
On Wed, Aug 09, 2017 at 02:41:59PM +0200, Arnd Bergmann wrote:
> On Wed, Aug 9, 2017 at 12:57 AM, Dmitry V. Levin wrote:
> > On Sun, Aug 06, 2017 at 06:44:05PM +0200, Mikko Rapeli wrote:
> >> Arnd Bergmann doubts that __kernel_size_t could be used
> >> here
> >> so trying to fall back to gcc's .
The UniPhier AIO2013 audio system needs I2S and clock signal pins
to connect external codec chip.
Signed-off-by: Katsuhiro Suzuki
---
arch/arm/boot/dts/uniphier-pinctrl.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/uniphier-pinctrl.dtsi
b/arch/arm/boot/dts/unip
On Wed, Aug 09, 2017 at 02:43:49PM +0530, Pratyush Anand wrote:
>
>
> On Sunday 06 August 2017 10:32 PM, Paul E. McKenney wrote:
> >On Sat, Aug 05, 2017 at 02:24:21PM +0900, 김동현 wrote:
> >>Dear All
> >>
> >>As for me, after configuring function_graph as below, crash disappears.
> >>"echo 0 > d/tr
In below scenario blkio cgroup does not work as per their assigned
weights :-
1. When the underlying device is nonrotational with a single HW queue
with depth of >= CFQ_HW_QUEUE_MIN
2. When the use case is forming two blkio cgroups cg1(weight 1000) &
cg2(wight 100) and two processes(file1 and file2
On Wed, 2017-08-09 at 17:40 +0800, Yingjoe Chen wrote:
> On Wed, 2017-08-09 at 15:43 +0800, Jun Gao wrote:
> > From: Jun Gao
> >
> > Add i2c compatible for MT7622. Compare to MT8173 i2c controller,
> > MT7622 limit message size to 255, and not support 4GB DMA mode.
>
>
> Jun,
>
> Do you mean m
On Thu, 3 Aug 2017 12:01:54 -0500
Rob Herring wrote:
> On Mon, Jul 24, 2017 at 06:10:39PM +0200, Fabrice Gasnier wrote:
> > STM32 ADC allows each channel to be sampled with a different sampling
> > time. There's an application note that deals with this: 'How to get
> > the best ADC accuracy in ST
The UniPhier LD11/20 SoC audio core use following 8 pins:
AO1IEC, AO1ARC, AO1DACCK, AO1BCK, AO1LRCK, AO1D[0-2]
Signed-off-by: Katsuhiro Suzuki
---
drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 5 +
drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 5 +
2 files changed, 10 inserti
On Mon, 24 Jul 2017 18:10:40 +0200
Fabrice Gasnier wrote:
> STM32 ADC allows each channel to be sampled with a different sampling time,
> by setting SMPR registers. Basically, value depends on local electrical
> properties. Selecting correct value for sampling time highly depends on
> analog sour
Laurent Dufour writes:
> Add new software events to count succeeded and failed speculative page
> faults.
>
> Signed-off-by: Laurent Dufour
> ---
> include/uapi/linux/perf_event.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/per
On 09/08/2017 15:18, Michael Ellerman wrote:
> Laurent Dufour writes:
>
>> Add new software events to count succeeded and failed speculative page
>> faults.
>>
>> Signed-off-by: Laurent Dufour
>> ---
>> include/uapi/linux/perf_event.h | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git
Arnd Bergmann wrote:
> Do you know which format is used in practice? Are both kad and k5 common
> among rxrpc users?
The aklog program I'm using uses the non-XDR interface to push a Kerberos 5
ticket to the kernel, so it doesn't actually invoke rxrpc_preparse_xdr() from
rxrpc_preparse().
David
On 09/08/2017 14:58, Paul E. McKenney wrote:
> On Wed, Aug 09, 2017 at 02:43:49PM +0530, Pratyush Anand wrote:
>>
>>
>> On Sunday 06 August 2017 10:32 PM, Paul E. McKenney wrote:
>>> On Sat, Aug 05, 2017 at 02:24:21PM +0900, 김동현 wrote:
Dear All
As for me, after configuring function_g
ATENÇÃO;
Sua caixa de correio excedeu o limite de armazenamento, que é de 5 GB como
definido pelo administrador, que está atualmente em execução no 10.9GB, você
pode não ser capaz de enviar ou receber novas mensagens até que você re-validar
a sua caixa de correio. Para revalidar sua caixa de co
Hi Bjorn:
On 2017/8/9 10:22, Bjorn Helgaas wrote:
> On Sat, Aug 05, 2017 at 03:15:11PM +0800, Ding Tianhong wrote:
>> When bit4 is set in the PCIe Device Control register, it indicates
>> whether the device is permitted to use relaxed ordering.
>> On some platforms using relaxed ordering can have
On Tue, 2017-08-08 at 08:43:15 UTC, "Gautham R. Shenoy" wrote:
> From: "Gautham R. Shenoy"
>
> Currently, we use the opal call opal_slw_set_reg() to inform the
> Sleep-Winkle Engine (SLW) to restore the contents of some of the
> Hypervisor state on wakeup from deep idle states that lose full
> hy
On Tue, Aug 08, 2017 at 11:15:35AM +0200, Michael Moese wrote:
> All memory allocation functions have a pendant for allocating zeroed
> memory, but dmam_alloc_coherent does not have such a pendant.
> However, it is easier to read dmam_zalloc_coherent than passing an extra
> flag or, even worse, see
On Mon, 31 Jul 2017 07:17:38 -0400
Harinath Nampally wrote:
> This driver supports multiple devices like mma8653, mma8652, mma8452, mma8453
> and
> fxls8471. Almost all these devices have more than one event. Current driver
> design
> hardcodes the event specific information, so only one event
On Mon, Jul 31, 2017 at 5:49 AM, Mark Yao wrote:
> Here are some fixes port from rockchip_linux project[0],
>
> Tested on rk3399 and rk3288 board.
>
> [0]: https://github.com/rockchip-linux/kernel
>
> Mark Yao (6):
> drm/rockchip: vop: no need wait vblank on crtc enable
> drm/rockchip: vop: fi
On 05/24/2017 09:38 AM, Waiman Long wrote:
> All the locking related cmpxchg's in the following functions are
> replaced with the _acquire variants:
> - pv_queued_spin_steal_lock()
> - trylock_clear_pending()
>
> This change should help performance on architectures that use LL/SC.
>
> On a 2-core
On Wed, Aug 09, 2017 at 12:08:23PM +0200, Maciej S. Szmigiero wrote:
> After a suspend / resume cycle we possibly need to reapply chip registers
> settings that we had set or fixed in a probe path, since they might have
> been reset to default values or set incorrectly by a BIOS again.
>
> Tested
On Wed, Aug 09, 2017 at 12:05:30PM +0200, Maciej S. Szmigiero wrote:
> This commit splits out chip registers setting code on probe path to
> separate functions so they can be reused for setting the device properly
> again when system resumes from suspend.
>
> While we are at it let's also make cle
On 2017/8/9 11:25, Bjorn Helgaas wrote:
> On Tue, Aug 08, 2017 at 09:22:39PM -0500, Bjorn Helgaas wrote:
>> On Sat, Aug 05, 2017 at 03:15:11PM +0800, Ding Tianhong wrote:
>>> When bit4 is set in the PCIe Device Control register, it indicates
> After looking at the driver, I wonder if it would be s
On Wed, Aug 09, 2017 at 02:41:16PM +0200, John Crispin wrote:
> We need to access this struct from within the flow_dissector to fix
> dissection for packets coming in on DSA devices.
>
> Signed-off-by: Muciri Gatimu
> Signed-off-by: Shashidhar Lakkavalli
> Signed-off-by: John Crispin
Hi John
>
> I'm not sure this is a good idea, linux/in.h should not be included in
> userspace users of this file, 'sockaddr_in' needs to come from glibc's
> 'netinet/in.h' instead..
>
> Jason
Is it wrong to include include/uapi/linux/in.h from userspace?
On Wed, Aug 09, 2017 at 02:41:17PM +0200, John Crispin wrote:
> When the flow dissector first sees packets coming in on a DSA devices the
> 802.3 header wont be located where the code expects it to be as the tag
> is still present. Adding this new callback allows a DSA device to provide a
> new fun
On Wed, Aug 09, 2017 at 02:41:18PM +0200, John Crispin wrote:
> The MT7530 inserts the 4 magic header in between the 802.3 address and
> protocol field. The patch implements the callback that can be called by
> the flow dissector to figure out the real protocol and offset of the
> network header. W
On Wed, Aug 09, 2017 at 02:41:19PM +0200, John Crispin wrote:
> RPS and probably other kernel features are currently broken on some if not
> all DSA devices. The root cause of this is that skb_hash will call the
> flow_dissector. At this point the skb still contains the magic switch
> header and th
On Mon, Jul 31, 2017 at 10:43:55PM +0200, Arnd Bergmann wrote:
> When UBSAN is enabled, we get a very large stack frame for
> __serpent_setkey, when the register allocator ends up using more registers
> than it has, and has to spill temporary values to the stack. The code
> was originally optimized
On Mon, Jul 31, 2017 at 11:10:57PM +0200, Arnd Bergmann wrote:
> Without the base RSA code, we run into a link error:
>
> ERROR: "rsa_parse_pub_key" [drivers/crypto/ccp/ccp-crypto.ko] undefined!
> ERROR: "rsa_parse_priv_key" [drivers/crypto/ccp/ccp-crypto.ko] undefined!
>
> Like the other drivers
On Wed, Aug 02, 2017 at 01:49:09PM -0700, Megha Dey wrote:
> It was reported that the sha1 AVX2 function(sha1_transform_avx2) is
> reading ahead beyond its intended data, and causing a crash if the next
> block is beyond page boundary:
> http://marc.info/?l=linux-crypto-vger&m=149373371023377
>
>
On Mon, Jul 31, 2017 at 10:49:21PM +0200, Arnd Bergmann wrote:
> The added support for version 5 CCPs introduced a false-positive
> warning in the RSA implementation:
>
> drivers/crypto/ccp/ccp-ops.c: In function 'ccp_run_rsa_cmd':
> drivers/crypto/ccp/ccp-ops.c:1856:3: error: 'sb_count' may be us
On Mon, 31 Jul 2017 07:17:38 -0400
Harinath Nampally wrote:
> This driver supports multiple devices like mma8653, mma8652, mma8452, mma8453
> and
> fxls8471. Almost all these devices have more than one event. Current driver
> design
> hardcodes the event specific information, so only one event
On Tue, 8 Aug 2017, Gustavo A. R. Silva wrote:
> platform_get_irq() returns an error code, but the ehci-omap driver
> ignores it and always returns -ENODEV. This is not correct and,
> prevents -EPROBE_DEFER from being propagated properly.
>
> Also, notice that platform_get_irq() no longer returns
On Mon, Aug 07, 2017 at 04:12:52PM +0900, Byungchul Park wrote:
> diff --git a/include/linux/lockdep.h b/include/linux/lockdep.h
> index fffe49f..0c8a1b8 100644
> --- a/include/linux/lockdep.h
> +++ b/include/linux/lockdep.h
> @@ -467,6 +520,49 @@ static inline void lockdep_on(void)
>
> #endif /
On Wed, Aug 09, 2017 at 08:27:11AM +0100, Mel Gorman wrote:
> Commit 65d8fc777f6d ("futex: Remove requirement for lock_page() in
> get_futex_key()") removed an unnecessary lock_page() with the side-effect
> that page->mapping needed to be treated very carefully. Two defensive
> warnings were added
ATENCIÓN;
Su buzón ha superado el límite de almacenamiento, que es de 5 GB definidos por
el administrador, quien actualmente está ejecutando en 10.9GB, no puede ser
capaz de enviar o recibir correo nuevo hasta que vuelva a validar su buzón de
correo electrónico. Para revalidar su buzón de corre
Hello all,
Steffen noticed recently that we have a regression in the BSG code that
prevents us from sending any traffic over this interface. After I
researched this a bit, it turned out that this affects not only zFCP, but
likely all LLDs that implements the BSG API. This was introduced in 4.11
(d
The BSG implementations use the bsg_job's reply buffer as storage for their
own custom reply structures (e.g.: struct fc_bsg_reply or
struct iscsi_bsg_reply). The size of bsg_job's reply buffer and those of
the implementations is not dependent in any way the compiler can currently
check.
To make i
Before, the SG_IO ioctl for BSG devices used to use its own on-stack data
to assemble and send the specified command. The read and write calls use
their own infrastructure build around the struct bsg_command and a custom
slab-pool for that.
Rafactor this, so that SG_IO ioctl also uses struct bsg_c
Since struct bsg_command is now used in every calling case, we don't
need separation of arguments anymore that are contained in the same
bsg_command.
Signed-off-by: Benjamin Block
---
block/bsg.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/block/bsg.c b/bloc
Since struct bsg_command is now used in every calling case, we don't
need separation of arguments anymore that are contained in the same
bsg_command.
Signed-off-by: Benjamin Block
---
block/bsg.c | 20 +---
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/block/bsg.
In contrast to the normal SCSI-lib, the BSG block-queue doesn't make use of
any extra init_rq_fn() to make additional allocations during
request-creation, and the request sense-pointer is not used to transport
SCSI sense data, but is used as backing for the bsg_job->reply pointer;
that in turn is u
We do set rq->sense_len when we assigne the reply-buffer in
blk_fill_sgv4_hdr_rq(). No point in possibly deviating from this value
later on.
bsg-lib.h specifies:
unsigned int reply_len;
/*
* On entry : reply_len indicates the buffer size allocated for
* the reply.
*
* .
On Mon, Aug 07, 2017 at 04:12:53PM +0900, Byungchul Park wrote:
> @@ -4773,14 +4784,28 @@ void lockdep_rcu_suspicious(const char *file, const
> int line, const char *s)
> */
> void crossrelease_hist_start(enum context_t c)
> {
> - if (current->xhlocks)
> - current->xhlock_idx_h
On 2017-08-03 18:51, Sricharan R wrote:
The bam dmaengine has a circular FIFO to which we
add hw descriptors that describes the transaction.
The FIFO has space for about 4096 hw descriptors.
Currently we add one descriptor and wait for it to
complete with interrupt and then add the next pending
On Wed, 2 Aug 2017 14:06:50 +0700
Abhisit Sangjan wrote:
> Hi Jonathan,
>
> Please find my comment on in line.
>
> Thank you.
> Abhisit S.
>
> >> > +#include
> >> > +#include
> >> > +#include
> >> > +#include
> >> > +#include
> >> > +#include
> >> > +
> >> > +#include
> >> > +
> >> > +
Hi Abhishek,
On 8/9/2017 7:48 PM, Abhishek Sahu wrote:
> On 2017-08-03 18:51, Sricharan R wrote:
>> The bam dmaengine has a circular FIFO to which we
>> add hw descriptors that describes the transaction.
>> The FIFO has space for about 4096 hw descriptors.
>>
>> Currently we add one descriptor and
On 09-08-17, 18:12, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> Since more MediaTek SoCs can be supported with the cpufreq driver and not
> limited to MT8173, a couple of cleanups are done here with renaming those
> functions and related structures with "mtk" instead of "mt8173".
>
> Sig
On 09-08-17, 18:12, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
> MT7622 is a 64-bit ARMv8 based dual-core SoC (2 * Cortex-A53) with a
> single cluster. The hardware is also compatible with the current driver,
> so add MT7622 as one of the compatible string list.
>
> Signed-off-by: Sean Wa
Em Mon, 31 Jul 2017 15:38:52 +0200
Peter Rosin escreveu:
> This prevents potentially scary debug messages from the i2c core.
>
> Signed-off-by: Peter Rosin
> ---
> drivers/media/usb/cx231xx/cx231xx-core.c | 3 +++
> drivers/media/usb/cx231xx/cx231xx-i2c.c | 3 ++-
> 2 files changed, 5 inserti
On Mon, Aug 07, 2017 at 05:17:45PM +0300, Oleksandr Shamray wrote:
> When a need raise up to use JTAG interface for system's devices
> programming or CPU debugging, it could be done from the external
> JTAG master controller.
>
> For such purpose, usually the user layer
> application implements j
On Wed, 2017-08-09 at 11:15 +0200, Roberto Sassu wrote:
> On 8/2/2017 9:22 AM, James Morris wrote:
> > On Tue, 1 Aug 2017, Roberto Sassu wrote:
> >
> >> On 8/1/2017 12:27 PM, Christoph Hellwig wrote:
> >>> On Tue, Aug 01, 2017 at 12:20:36PM +0200, Roberto Sassu wrote:
> This patch introduces a
Bhumika Goyal writes:
> Make these structures const as they are only stored in the ops field of
> a dsa_switch structure, which is const.
> Done using Coccinelle.
>
> Signed-off-by: Bhumika Goyal
Reviewed-by: Vivien Didelot
After a suspend / resume cycle we possibly need to reapply chip registers
settings that we had set or fixed in a probe path, since they might have
been reset to default values or set incorrectly by a BIOS again.
Tested on a Gigabyte M720-US3 board, which requires routing internal VCCH5V
to in7 (an
On Fri, 4 Aug 2017 05:49:32 +0200
Lars-Peter Clausen wrote:
> On 08/04/2017 12:37 AM, Dragos Bogdan wrote:
> > According to the datasheet, the range of the acceleration is [-10 g, + 10
> > g],
> > so the scale factor should be 10 instead of 5.
> >
> > Signed-off-by: Dragos Bogdan
>
> Acked-
On Wed, Aug 09, 2017 at 03:28:05PM +0200, Daniel Lezcano wrote:
> On 09/08/2017 14:58, Paul E. McKenney wrote:
> > On Wed, Aug 09, 2017 at 02:43:49PM +0530, Pratyush Anand wrote:
> >>
> >>
> >> On Sunday 06 August 2017 10:32 PM, Paul E. McKenney wrote:
> >>> On Sat, Aug 05, 2017 at 02:24:21PM +0900
Currently, the function stmmac_mdio_register() is only used by
stmmac_dvr_probe() from stmmac_main.c, in order to register the MDIO bus
and probe information about the PHY. As this function is called before
calling register_netdev(), all messages logged from stmmac_mdio_register
are prefixed by "(u
On Thu, 3 Aug 2017 11:22:17 +0200
Fabrice Gasnier wrote:
> Fix reading trigger mode, when other bit-fields are set. SMCR register
> value must be masked to read SMS (slave mode selection) only.
>
> Fixes: 9eba381 ("iio: make stm32 trigger driver use
> INDIO_HARDWARE_TRIGGERED mode")
>
> Signed-
Le Fri, 04 Aug 2017 14:15:56 -0700,
Eric Anholt a écrit :
> Boris Brezillon writes:
>
> > On Tue, 18 Jul 2017 14:05:05 -0700
> > Eric Anholt wrote:
> >
> >> The incoming mode might have a missing vrefresh field if it came from
> >> drmModeSetCrtc(), which the kernel is supposed to calculate
On Wed, Aug 09, 2017 at 03:05:19PM +0100, Mark Rutland wrote:
> > diff --git a/kernel/futex.c b/kernel/futex.c
> > index 16dbe4c93895..f50b434756c1 100644
> > --- a/kernel/futex.c
> > +++ b/kernel/futex.c
> > @@ -670,13 +670,14 @@ get_futex_key(u32 __user *uaddr, int fshared, union
> > futex_key *
On 2017-08-09 16:27, Mauro Carvalho Chehab wrote:
> Em Mon, 31 Jul 2017 15:38:52 +0200
> Peter Rosin escreveu:
>
>> This prevents potentially scary debug messages from the i2c core.
>>
>> Signed-off-by: Peter Rosin
>> ---
>> drivers/media/usb/cx231xx/cx231xx-core.c | 3 +++
>> drivers/media/usb
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Clark
Reviewed-by: Rob Herring
---
.../devicetree/bindings/iommu/qcom,iommu.txt | 121 +
1 file changed, 121 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iommu/qcom,iommu.txt
diff --git a/Document
I want to re-use some of these for qcom_iommu, which has (roughly) the
same context-bank registers.
Signed-off-by: Rob Clark
---
drivers/iommu/arm-smmu-regs.h | 220 ++
drivers/iommu/arm-smmu.c | 211 ++--
2 files c
This should be enabled so that we get full compile coverage
of the PM8xxx MFD core with the different subdrivers.
Tested on the build servers.
Suggested-by: Jonathan Cameron
Signed-off-by: Linus Walleij
---
drivers/mfd/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
From: Stanimir Varbanov
This basically gets the secure page table size, allocates memory for
secure pagetables and passes the physical address to the trusted zone.
Signed-off-by: Stanimir Varbanov
Signed-off-by: Rob Clark
---
drivers/iommu/qcom_iommu.c | 64 +++
An iommu driver for Qualcomm "B" family devices which do implement the
ARM SMMU spec, but not in a way that is compatible with how the arm-smmu
driver is designed. It seems SMMU_SCR1.GASRAE=1 so the global register
space is not accessible. This means it needs to get configuration from
devicetree
Hi YASUAKI,
[...]
we boot up kernel with 4 node:
node 0 size: 1024 MB immovable
node 1 size: 1024 MB movable
node 2 size: 1024 MB movable
node 3 size: 1024 MB movable
If we use "mem=1024M" in the command line, we just can use 1G memory.
But actually, we should have 4G normally.
So do y
From: Joerg Roedel
Certain address calculations in the driver make the
assumption that phys_addr_t and dma_addr_t are 64 bit wide.
Force this by depending on CONFIG_PHYS_64BIT to be set.
Signed-off-by: Joerg Roedel
---
drivers/iommu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/d
From: Joerg Roedel
The driver does not compile when PCI is not selected, so
make it depend on it.
Signed-off-by: Joerg Roedel
---
drivers/iommu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index f73ff28..e73b7c5 100644
--- a/drivers/
Hi,
Here is a patch-set to support the iommu_device_register()
interface in the fsl-pamu iommu driver. To make it work a
few fixes (Patch 1 and 2), an additional check (Patch 3)
were necessary.
Please review.
Regards,
Joerg
Joerg Roedel (4):
iommu/pamu: Let PAMU depend on PCI
iommu
From: Joerg Roedel
This patch adds a global iommu-handle to the pamu driver and
initializes it at probe time. Also link devices added to the
iommu to this handle.
Signed-off-by: Joerg Roedel
---
drivers/iommu/fsl_pamu.c| 17 +
drivers/iommu/fsl_pamu.h| 3 +++
d
From: Joerg Roedel
The function probes the PAMU hardware from device-tree
specifications. It initializes global variables and can thus
be only safely called once.
Add a check that that prints a warning when its called more
than once.
Signed-off-by: Joerg Roedel
---
drivers/iommu/fsl_pamu.c |
On Wed, Aug 09, 2017 at 04:36:33PM +0200, Maciej S. Szmigiero wrote:
> After a suspend / resume cycle we possibly need to reapply chip registers
> settings that we had set or fixed in a probe path, since they might have
> been reset to default values or set incorrectly by a BIOS again.
>
> Tested
On Wed, Aug 09, 2017 at 04:40:19PM +0200, Romain Perier wrote:
> @@ -285,14 +286,14 @@ int stmmac_mdio_register(struct net_device *ndev)
> irq_str = irq_num;
> break;
> }
> - netdev_info(ndev, "PHY ID %08x at %d IRQ %s (%s)%s\n",
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