From: root
Updated mpt3sas driver version to 15.101.00.00
Signed-off-by: Chaitra P B
Signed-off-by: Suganath Prabu S
Reviewed-by: Hannes Reinecke
---
From: root
* Added debug prints for pcie devices in ioctl debug path. Which
will be helpful for debugging.
* Added PCIe device support for ioctl BTDHMAPPING ioctl.
Signed-off-by: Chaitra P B
Signed-off-by: Suganath
From: root
Sets nvme device queue depth, name and displays device capabilities
Signed-off-by: Chaitra P B
Signed-off-by: Suganath Prabu S
---
drivers/scsi/mpt3sas/mpt3sas_base.h
On 21/08/17 14:18, Christoph Hellwig wrote:
> Can you try the patch below please?
>
> ---
> From d5f59cb7a629de8439b318e1384660e6b56e7dd8 Mon Sep 17 00:00:00 2001
> From: Christoph Hellwig
> Date: Mon, 21 Aug 2017 14:24:11 +0200
> Subject: virtio_pci: fix cpu affinity support
>
>
On Mon, Aug 21, 2017 at 09:08:04AM -0400, Jeff Mahoney wrote:
> On 8/21/17 8:41 AM, SF Markus Elfring wrote:
> > From: Markus Elfring
> > Date: Mon, 21 Aug 2017 13:34:29 +0200
> >
> > Add a jump target so that a bit of exception handling can be better reused
> > in
On Mon, Aug 21, 2017 at 02:44:58PM +0100, Juri Lelli wrote:
> Also, I'm not sure what Peter meant with
>
> "But still this isn't quite right, because when we consider this for SMT
> (as was the intent here) we'll happily occupy a full sibling core over
> finding an empty one."
Consider a 4
You need a commit message.
On Mon, Aug 21, 2017 at 03:36:16PM +0200, Christian Brauner wrote:
> Signed-off-by: Christian Brauner
> ---
> drivers/android/binder.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git
Replace -EBUSY with -EAGAIN when reporting transient busy
indication in the absence of backlog.
Signed-off-by: Gilad Ben-Yossef
Reviewed-by: Gary R Hook
---
drivers/crypto/ccp/ccp-crypto-main.c | 8 +++-
drivers/crypto/ccp/ccp-dev.c | 7
Now that -EBUSY return code only indicates backlog queueing
we can safely remove the now redundant check for the
CRYPTO_TFM_REQ_MAY_BACKLOG flag when -EBUSY is returned.
Signed-off-by: Gilad Ben-Yossef
---
crypto/ahash.c| 12 +++-
crypto/cts.c | 6
On Sat 19-08-17 09:17:28, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Fri, 18 Aug 2017 21:47:14 +0200
> MIME-Version: 1.0
> Content-Type: text/plain; charset=UTF-8
> Content-Transfer-Encoding: 8bit
>
> The script “checkpatch.pl” pointed information out
Now that -EBUSY return code only indicates backlog queueing
we can safely remove the now redundant check for the
CRYPTO_TFM_REQ_MAY_BACKLOG flag when -EBUSY is returned.
Signed-off-by: Gilad Ben-Yossef
Acked-by: Boris Brezillon
---
The talitos driver starts several async crypto ops and waits for their
completions. Move it over to generic code doing the same.
Signed-off-by: Gilad Ben-Yossef
---
drivers/crypto/talitos.c | 38 +-
1 file changed, 5 insertions(+), 33
tcrypt starts several async crypto ops and waits for their completions.
Move it over to generic code doing the same.
Signed-off-by: Gilad Ben-Yossef
---
crypto/tcrypt.c | 84 +
1 file changed, 25 insertions(+), 59
ima starts several async crypto ops and waits for their completions.
Move it over to generic code doing the same.
Signed-off-by: Gilad Ben-Yossef
Acked-by: Mimi Zohar
---
security/integrity/ima/ima_crypto.c | 56
On Sat 19-08-17 09:18:42, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Sat, 19 Aug 2017 08:10:40 +0200
>
> * Adjust jump targets.
>
> * Avoid a repeated check for the local variable "bh" after
> a memory allocation failure in this function.
>
> *
On Tuesday, August 08, 2017 10:10:26 AM Michal Simek wrote:
> Enable this driver for Xilinx ZynqMP.
>
> Signed-off-by: Michal Simek
Patch queued for 4.14, thanks.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R Institute Poland
Samsung Electronics
Hi Jacob,
On 08/03/2017 07:23 AM, Jacob Chen wrote:
> Rockchip RGA is a separate 2D raster graphic acceleration unit. It
> accelerates 2D graphics operations, such as point/line drawing, image
> scaling, rotation, BitBLT, alpha blending and image blur/sharpness
>
> The drvier is mostly based on
On Mon, Aug 21, 2017 at 11:12:23AM +0100, Salil Mehta wrote:
> This patch adds the following support to the HNS3 driver:
> 1. Support to change the Maximum Transmission Unit of a
>of a port in the HNS NIC hardware.
> 2. Initializes the supported MTU range for the netdevice.
>
> Signed-off-by:
This patch adds the following support to the HNS3 driver:
1. Support to change the Maximum Transmission Unit of a
port in the HNS NIC hardware.
2. Initializes the supported MTU range for the netdevice.
Signed-off-by: lipeng
Signed-off-by: Salil Mehta
Hello Michal,
On Mon, Aug 21, 2017 at 2:04 PM, Michal Simek wrote:
> On 21.8.2017 13:27, Javier Martinez Canillas wrote:
>> [snip]
>>
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
index
Arnd, Olof,
A very late pull request for a few fixes I'm carrying in my tree for a
while.
It would be great if you could send that to Linus for 4.13.
The following changes since commit 5771a8c08880cdca3bfb4a3fc6d309d6bba20877:
Linux v4.13-rc1 (2017-07-15 15:22:10 -0700)
are available in the
Hi Maciej,
On 08/10/2017 11:50 PM, Maciej S. Szmigiero wrote:
> This commit adds pin to pad mapping and output format configuration support
> in CX2584x-series chips to cx25840 driver.
>
> This functionality is then used to allow disabling ivtv-specific hacks
> (called a "generic mode"), so
On Mon, Aug 21, 2017 at 09:52:35AM +0200, Romain Perier wrote:
> Currently, if this logging function is used prior the phy driver is
> binded to the phy device (that is usually done from .ndo_open),
> 'phydev->drv' might be NULL, resulting in a kernel crash. That is
> typically the case in the
> With our hardware, and likely Rockchip's as well, the muxed connections
> include the MDIO and MII connections
Ah, i did not realise the MII was muxed as well. Then i agree, an MDIO
mux is wrong.
However, please try to make the binding not look like an mdio mux. We
don't want people
Le Sat, 19 Aug 2017 11:41:59 +0200,
Miquel RAYNAL a écrit :
> >
> > Le Wed, 16 Aug 2017 09:39:06 +0200,
> > Miquel Raynal a écrit :
> >
> > > Add layout functions for small and large pages with mainly free
> > > bytes plus
Do you need a personal/business L0AN, if yes contact Softlink Int'L for more
info
On Thu, Aug 17, 2017 at 09:53:01AM +0200, Simon Horman wrote:
> On Wed, Aug 16, 2017 at 08:51:04AM +0200, Geert Uytterhoeven wrote:
> > Hi Viresh,
> >
> > On Wed, Aug 16, 2017 at 7:37 AM, Viresh Kumar
> > wrote:
> > > Drop few ARM (32 and 64 bit) platforms from the
> That's will work,
Thanks for your acknowledgement.
> but that's don't improve anything.
Do you like a small source code reduction here?
Regards,
Markus
Make this const as it is only used in a copy operation.
Done using Coccinelle.
Signed-off-by: Bhumika Goyal
---
drivers/i2c/busses/i2c-versatile.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-versatile.c
For classmate-laptop.c
Acked-by: Thadeu Lima de Souza Cascardo
This driver provides PS/2 serio bus support by implementing bit banging
with the GPIO API. The GPIO pins, data and clock, can be configured with
a node in the device tree or by generic device properties (GDP).
Writing to a device is supported as well, though it is possible timings
can not be halt
Rockchip's RK3328 evaluation board has one USB 3.0 OTG controller,
we enable it and set it act as static xHCI host controller to
support USB 3.0 HOST on RK3328 evaluation board.
Signed-off-by: William Wu
---
Changes in v3:
- None
Changes in v2:
- None
Make this const as it is only used in a copy operation.
Signed-off-by: Bhumika Goyal
---
drivers/media/pci/cx18/cx18-i2c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/pci/cx18/cx18-i2c.c
b/drivers/media/pci/cx18/cx18-i2c.c
index
Adds the device tree bindings description for RK3328 and
compatible USB DWC3 controller.
Signed-off-by: William Wu
---
Changes in v3:
- Add this for separate usb dt-bindings patch.
Changes in v2:
- None
Documentation/devicetree/bindings/usb/rockchip,dwc3.txt | 4
The PS/2 gpio device binding defines the gpio pins (data and clock)
as well as the interrupt which should be used to drive the ps/2 bus.
It is expected to get an interrupt on the falling edge of the clock
line.
Also it can be configured whether the host should support writing to
the device.
In wq_numa_init() a list of NUMA nodes with their list of possible CPUs
is built.
Unfortunately, on powerpc, the Firmware is only able to provide the
node of a CPU if the CPU is present. So, in our case (possible CPU)
CPU ids are known, but as the CPU is not present, the node id is
unknown and
cpumask is the list of CPUs present when the queue is built.
If a new CPU is hotplugged, this list is not updated,
and when the scheduler asks for a CPU id, blk_mq_hctx_next_cpu()
can return WORK_CPU_UNBOUND.
And in this case _blk_mq_run_hw_queue() can be executed by the new CPU
(that is not
On 8/18/2017 5:32 PM, Bjorn Helgaas wrote:
> + if ((*l & 0x) != 0x0001)
> + return true;/* not a CRS completion */
>
This version certainly looks cleaner. However, it breaks pci_flr_wait().
If some root port doesn't support CRS and returns 0x, pci_bus_wait_crs()
On Tuesday, August 08, 2017 10:10:25 AM Michal Simek wrote:
> From: Hyun Kwon
>
> All reported by from checkpatch
> ./scripts/checkpatch.pl --max-line-length 120 -strict -f
> drivers/video/fbdev/xilinxfb.c
>
> WARNING: Block comments should align the * on each line
>
Fixes the following checkpatch warnings:
WARNING: line over 80 characters
WARNING: space prohibited between function name and open parenthesis '('
WARNING: EXPORT_SYMBOL(foo); should immediately follow its function/variable
Signed-off-by: Himanshu Jha
---
testmgr is starting async. crypto ops and waiting for them to complete.
Move it over to generic code doing the same.
This also provides a test of the generic crypto async. wait code.
Signed-off-by: Gilad Ben-Yossef
---
crypto/testmgr.c | 204
cifs starts an async. crypto op and waits for their completion.
Move it over to generic code doing the same.
Signed-off-by: Gilad Ben-Yossef
Acked-by: Pavel Shilovsky
---
fs/cifs/smb2ops.c | 30 --
1 file changed, 4
fscrypt starts several async. crypto ops and waiting for them to
complete. Move it over to generic code doing the same.
Signed-off-by: Gilad Ben-Yossef
---
fs/crypto/crypto.c | 28
fs/crypto/fname.c | 36
dm-verity is starting async. crypto ops and waiting for them to complete.
Move it over to generic code doing the same.
This also avoids a future potential data coruption bug created
by the use of wait_for_completion_interruptible() without dealing
correctly with an interrupt aborting the wait
On 21/08/17 15:56, Peter Zijlstra wrote:
> On Mon, Aug 21, 2017 at 02:44:58PM +0100, Juri Lelli wrote:
>
> > Also, I'm not sure what Peter meant with
> >
> > "But still this isn't quite right, because when we consider this for SMT
> > (as was the intent here) we'll happily occupy a full sibling
Hi Marek,
On 08/21/2017 03:21 PM, Marek Szyprowski wrote:
> Hi Stanimir,
>
> On 2017-08-21 13:34, Stanimir Varbanov wrote:
>> This change is intended to give to the v4l2 drivers a choice to
>> change the default behavior of the v4l2-core DMA mapping direction
>> from DMA_TO/FROM_DEVICE
Commit-ID: deecd4d71b12626db48544faa66bb897e2cafd07
Gitweb: http://git.kernel.org/tip/deecd4d71b12626db48544faa66bb897e2cafd07
Author: Josh Poimboeuf
AuthorDate: Thu, 27 Jul 2017 15:56:55 -0500
Committer: Ingo Molnar
CommitDate: Mon, 21 Aug 2017
Commit-ID: ee97638b5737cc0dba2f12a3bdcda761656b7c01
Gitweb: http://git.kernel.org/tip/ee97638b5737cc0dba2f12a3bdcda761656b7c01
Author: Josh Poimboeuf
AuthorDate: Fri, 11 Aug 2017 12:24:15 -0500
Committer: Ingo Molnar
CommitDate: Mon, 21 Aug 2017
On Sat 19-08-17 09:15:57, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Fri, 18 Aug 2017 21:41:24 +0200
>
> Omit an extra message for a memory allocation failure in this function.
>
> This issue was detected by using the Coccinelle software.
>
>
* Kishon Vijay Abraham I [170821 00:42]:
> Document the new compatible string "ti,dra7-sdhci" to be used for
> MMC controllers in DRA7 and DRA72 SoCs.
I suggest that you add a new one sdhci-omap.txt instead.
We are not currently parsing the all the hsmmc properties for
sdhci.
On 08/21/2017 09:33 AM, Juergen Gross wrote:
> On 06/08/17 18:44, Mikko Rapeli wrote:
>> Both are needed to compile in userspace. Fixes these
>> userspace compile errors:
>>
>> xen/gntdev.h:151:4: error: unknown type name ‘grant_ref_t’
>> grant_ref_t ref;
>> ^
>> xen/gntdev.h:153:4:
From: Stephen Bates
Hybrid polling currently uses half the average completion time as an
estimate of how long to poll for. We can improve upon this by noting
that polling before the minimum completion time makes no sense. Add a
sysfs entry to use this fact to improve CPU
On Friday, August 11, 2017 03:59:01 PM Anton Vasilyev wrote:
> If dlfb_usb_probe drops to error path then there is only one
> kref_init() call and no kref_get(), so second kref_put() leads to
> use after free.
>
> The patch removes superfluous kref_put on dlfb_usb_probe error path.
>
> Found by
Hi Yong,
First two high-level comments before I start the review:
1) Can you provide the v4l2-compliance output? I can't merge this unless I
see that it passes the compliance tests. Make sure you compile from the git
repo (https://git.linuxtv.org/v4l-utils.git/) so you are using the latest
Make these const as they are only stored in the const field of a
musb_hdrc_platform_data structure.
Signed-off-by: Bhumika Goyal
---
I could not cross compile the files, so not tested.
arch/blackfin/mach-bf548/boards/cm_bf548.c | 2 +-
On Mon, Aug 21, 2017 at 5:58 PM, Rafael J. Wysocki wrote:
> On Mon, Aug 21, 2017 at 1:43 PM, Bhumika Goyal wrote:
>> Make these const. Done using Coccinelle.
>>
>> @match disable optional_qualifier@
>> identifier s;
>> @@
>> static struct device_attribute s
On Thu, Aug 10, 2017 at 01:56:05PM +0200, Michal Hocko wrote:
> On Wed 09-08-17 14:38:25, Johannes Weiner wrote:
> > The issue is that writeback doesn't hold a page reference and the page
> > might get freed after PG_writeback is cleared (and the mapping is
> > unlocked) in
The initial idea of creating the cpufreq-dt-platdev.c file was to keep a
list of platforms that use the "operating-points" (V1) bindings and
create cpufreq device for them only, as we weren't sure which platforms
would want the device to get created automatically as some had their own
cpufreq
Hi Maciej,
On 08/10/2017 11:53 PM, Maciej S. Szmigiero wrote:
> This patch adds support for analog part of Medion 95700 in the cxusb
> driver.
>
> What works:
> * Video capture at various sizes with sequential fields,
> * Input switching (TV Tuner, Composite, S-Video),
> * TV and radio tuning,
>
On 07/08/2017 14:56, Marc Zyngier wrote:
> On 28/07/17 15:06, Marc Gonzalez wrote:
>
>> On 27/07/2017 20:17, Florian Fainelli wrote:
>>
>>> On 07/26/2017 12:13 PM, Måns Rullgård wrote:
>>>
Florian Fainelli writes:
> On 07/25/2017 06:29 AM, Måns Rullgård wrote:
>
>> Marc
From: root
Update MPI Files for NVMe support
Signed-off-by: Chaitra P B
Signed-off-by: Suganath Prabu S
---
drivers/scsi/mpt3sas/mpi/mpi2.h | 43 ++-
On 06/08/17 18:44, Mikko Rapeli wrote:
> Both are needed to compile in userspace. Fixes these
> userspace compile errors:
>
> xen/gntdev.h:151:4: error: unknown type name ‘grant_ref_t’
> grant_ref_t ref;
> ^
> xen/gntdev.h:153:4: error: unknown type name ‘domid_t’
> domid_t domid;
>
Ventura Series controller are Tri-mode. The controller and
firmware are capable of supporting NVMe devices and
PCIe switches to be connected with the controller. This
patch set adds driver level support for NVMe devices and
PCIe switches.
mpt3sas v4 patset:
1) Removed code which detects
This series add support for usb3 controller on RK3328 SoCs.
This series don't include usb3 phy patches, and I will try
to submit usb3 phy patches individually later.
Tested on RK3328 evaluation board.
William Wu (3):
dt-bindings: usb: add DT binding for RK3328 dwc3 controller
arm64: dts:
RK3328 has one USB 3.0 OTG controller which uses DWC_USB3
core's general architecture. It can act as static xHCI host
controller, static device controller, USB 3.0/2.0 OTG basing
on ID of USB3.0 PHY.
Signed-off-by: William Wu
---
Changes in v3:
- Move dt-binding
On binder_init() the devices string is duplicated and smashed into individual
device names which are passed along. However, if I'm not mistaken the original
duplicated string wasn't freed in case binder_init() failed.
Christian
Christian Brauner (1):
binder: free memory on error
Signed-off-by: Christian Brauner
---
drivers/android/binder.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index f7665c31feca..41a11661eed7 100644
--- a/drivers/android/binder.c
+++
From: root
Below Functions are added in various paths to support NVMe
drive addition.
_scsih_pcie_add_device
_scsih_pcie_device_add
_scsih_pcie_device_init_add
_scsih_check_pcie_access_status
_scsih_pcie_check_device
mpt3sas_get_pdev_by_handle
On Mon, 2017-06-19 at 05:44:25 UTC, Arvind Yadav wrote:
> of_device_ids are not supposed to change at runtime. All functions
> working with of_device_ids provided by work with const
> of_device_ids. So mark the non-const structs as const.
>
> File size before:
>text data bss
Make this const as it is only used in a copy operation.
Signed-off-by: Bhumika Goyal
---
drivers/media/pci/bt8xx/bttv-i2c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/pci/bt8xx/bttv-i2c.c
b/drivers/media/pci/bt8xx/bttv-i2c.c
index
From: root
* Mpt3sas driver uses the NVMe Encapsulated Request message to
send an NVMe command to an NVMe device attached to the IOC.
* Normal I/O commands like reads and writes are passed to the
controller as SCSI commands and the controller has the
Hi Bjorn,
On 8/18/2017 5:01 PM, Bjorn Helgaas wrote:
> On Fri, Aug 11, 2017 at 12:56:35PM -0400, Sinan Kaya wrote:
>> Sporadic reset issues have been observed with Intel 750 NVMe drive while
>> assigning the physical function to the guest machine. The sequence of
>> events observed is as follows:
Reviewed-by: Christian Borntraeger
Since we removed ia64 from KVM we no longer need an _arch_ variant.
On 08/16/2017 09:40 PM, Radim Krčmář wrote:
> Moving it to generic code will allow us to extend it with ease.
>
> Reviewed-by: David Hildenbrand
>
From: Markus Elfring
Date: Mon, 21 Aug 2017 15:45:23 +0200
Add a jump target so that a bit of exception handling can be better reused
at the end of this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
Make these const as they are only stored in the matrix_keymap_data field
of a pxa27x_keypad_platform_data structure, which is const.
Done using Coccinelle:
@match disable optional_qualifier@
identifier s;
@@
static struct matrix_keymap_data s = {...};
@ref@
position p;
identifier match.s;
@@
s@p
On Sunday, August 06, 2017 12:39:28 PM Arvind Yadav wrote:
> usb_device_id are not supposed to change at runtime. All functions
> working with usb_device_id provided by work with
> const usb_device_id. So mark the non-const structs as const.
>
> Signed-off-by: Arvind Yadav
On 8/18/2017 5:32 PM, Bjorn Helgaas wrote:
> While waiting for a device to become ready (i.e., to return a non-CRS
> completion to a read of its Vendor ID), if we got a valid response to the
> very last read before timing out, we printed a warning and gave up on the
> device even though it was
gcm is starting an async. crypto op and waiting for it complete.
Move it over to generic code doing the same.
Signed-off-by: Gilad Ben-Yossef
---
crypto/gcm.c | 32 ++--
1 file changed, 6 insertions(+), 26 deletions(-)
diff --git a/crypto/gcm.c
public_key_verify_signature() is starting an async crypto op and
waiting for it to complete. Move it over to generic code doing
the same.
Signed-off-by: Gilad Ben-Yossef
---
crypto/asymmetric_keys/public_key.c | 28
1 file changed, 4
DRBG is starting an async. crypto op and waiting for it complete.
Move it over to generic code doing the same.
The code now also passes CRYPTO_TFM_REQ_MAY_SLEEP flag indicating
crypto request memory allocation may use GFP_KERNEL which should
be perfectly fine as the code is obviously sleeping for
Invoking a possibly async. crypto op and waiting for completion
while correctly handling backlog processing is a common task
in the crypto API implementation and outside users of it.
This patch adds a generic implementation for doing so in
preparation for using it across the board instead of hand
On Mon, Aug 21, 2017 at 06:56:01AM -0700, Andy Lutomirski wrote:
>
>
> > On Aug 21, 2017, at 3:33 AM, Peter Zijlstra wrote:
> >>
> >> Using a kernel thread solves the problem for real. Anything that
> >> blindly accesses user memory in kernel thread context is
On binder_init() the devices string is duplicated and smashed into individual
device names which are passed along. However, the original duplicated string
wasn't freed in case binder_init() failed. Let's free it on error.
Signed-off-by: Christian Brauner
---
algif starts several async crypto ops and waits for their completion.
Move it over to generic code doing the same.
Signed-off-by: Gilad Ben-Yossef
---
crypto/af_alg.c | 27 ---
crypto/algif_aead.c | 8
crypto/algif_hash.c |
On Tuesday, August 08, 2017 05:17:30 PM Gustavo A. R. Silva wrote:
> platform_get_irq() returns an error code, but the pxa3xx_gcu driver
> ignores it and always returns -ENODEV. This is not correct and,
> prevents -EPROBE_DEFER from being propagated properly.
>
> Also, notice that
Make these const as they are only stored in the const field of a
musb_hdrc_platform_data structure.
Done using Coccinelle.
@match disable optional_qualifier@
identifier s;
@@
static struct musb_hdrc_config s = {...};
@ref@
position p;
identifier match.s;
@@
s@p
@good1@
identifier y;
position
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Add exported API for livepatch modules:
klp_shadow_get()
klp_shadow_alloc()
klp_shadow_get_or_alloc()
klp_shadow_free()
klp_shadow_free_all()
that implement "shadow" variables, which allow callers to associate new
shadow fields to existing data structures. This is intended to be used
Several phases can be controlled on the meson-gx controller, the core, tx
and rx clock phase. The tx and rx uses delays to allow for a more fine
grained setting of the phase. To properly compute the phase using delays,
accessing the clock rate is necessary.
Instead of ad-hoc functions, use the
It seems that the mmc clock is also used and required, somehow, by
the controller it self.
It is shown during init, when writing to CFG while the divider is set
to 0 will crash the SoC. During voltage switch, the controller may crash
and the card may then fail to exit busy state if the clock is
Rework tuning function of the rx phase. Now that the phase can be
more precisely set using CCF, test more phase setting and find the
largest working window. Then the tuning selected is the one at the
center of the window.
This rework allows to use new modes, such as UHS SDR50
Reviewed-by: Kevin
The card_busy callback is important to then add the voltage switch
callback as it allow to verify that the card is done dealing with
the voltage switch
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 13
No functional change, just improve interrupt handler readability
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 93 +
1 file changed, 39 insertions(+), 54
Unfortunately, the PCB of the libretech-cc cannot handle sdcard
at 200Mhz reliably, so sdr104 is removed
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 1 -
1 file changed, 1 deletion(-)
diff --git
Changing the card voltage on the cc is not instantaneous, especially
when switching from 3.3v to 1.8v.
It take at least 30ms for the regulator to go from 3.3v to 1.8v. Add
margin to that to make sure we don't upset the sdcard during the voltage
switch
Fixes: 61ff2af9b278 ("ARM64: dts: fixup
SDR104 seems to be OK on the nanopi-k2 SBC so enable it
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
Enable sdcard UHS modes, up to SDR50, on p20x based boards.
While the s905 supports SDR104 mode, it appears that the PCB of p20x
based boards can't cope with a rate as high as 200Mhz.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 3 +++
Now that the clock source 0 is properly described in the CCF, use it
instead of assuming the default value (xtal)
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 6 +++---
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 6 +++---
2 files
Remove unused clock rate defines. These should not be defined but
requested from the clock framework.
Also correct typo on the DELAY register
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 4 +---
1 file
spinlock used in interrupt handler should use the _irqsave variant
Fixes: 51c5d8447bd7 ("MMC: meson: initial support for GX platforms")
Reviewed-by: Kevin Hilman
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 5 +++--
1 file
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