Kees,
> In preparation for unconditionally passing the struct timer_list
> pointer to all timer callbacks, switch to using the new timer_setup()
> and from_timer() to pass the timer pointer explicitly.
Reviewed-by: Martin K. Petersen
--
Martin K. Petersen
Kees,
> In preparation for unconditionally passing the struct timer_list
> pointer to all timer callbacks, switch to using the new timer_setup()
> and from_timer() to pass the timer pointer explicitly.
Reviewed-by: Martin K. Petersen
--
Martin K. Petersen Oracle Linux Engineering
Kees,
> In preparation for unconditionally passing the struct timer_list
> pointer to all timer callbacks, switch to using the new timer_setup()
> and from_timer() to pass the timer pointer explicitly.
Reviewed-by: Martin K. Petersen
--
Martin K. Petersen
Kees,
> In preparation for unconditionally passing the struct timer_list
> pointer to all timer callbacks, switch to using the new timer_setup()
> and from_timer() to pass the timer pointer explicitly.
Reviewed-by: Martin K. Petersen
--
Martin K. Petersen Oracle Linux Engineering
Kees,
> In preparation for unconditionally passing the struct timer_list
> pointer to all timer callbacks, switch to using the new timer_setup()
> and from_timer() to pass the timer pointer explicitly.
Reviewed-by: Martin K. Petersen
--
Martin K. Petersen
Kees,
> In preparation for unconditionally passing the struct timer_list
> pointer to all timer callbacks, switch to using the new timer_setup()
> and from_timer() to pass the timer pointer explicitly.
Reviewed-by: Martin K. Petersen
--
Martin K. Petersen Oracle Linux Engineering
Kees,
> In preparation for unconditionally passing the struct timer_list
> pointer to all timer callbacks, switch to using the new timer_setup()
> and from_timer() to pass the timer pointer explicitly. This removes
> several redundant setup calls in favor of just changing the timer
> function
Kees,
> In preparation for unconditionally passing the struct timer_list
> pointer to all timer callbacks, switch to using the new timer_setup()
> and from_timer() to pass the timer pointer explicitly. This removes
> several redundant setup calls in favor of just changing the timer
> function
From: Wanpeng Li
In my setup, EPT is not exposed to L1, the VPID capability is exposed and
can be observed by vmxcap tool in L1:
INVVPID supportedyes
Individual-address INVVPID yes
Single-context INVVPID yes
From: Wanpeng Li
In my setup, EPT is not exposed to L1, the VPID capability is exposed and
can be observed by vmxcap tool in L1:
INVVPID supportedyes
Individual-address INVVPID yes
Single-context INVVPID yes
All-context INVVPID
From: Wanpeng Li
I can use vmxcap tool to observe "EPTP Switching yes" even if EPT is not
exposed to L1.
EPT switching is advertised unconditionally since it is emulated, however,
it can be treated as an extended feature for EPT and it should not be
advertised if
From: Wanpeng Li
I can use vmxcap tool to observe "EPTP Switching yes" even if EPT is not
exposed to L1.
EPT switching is advertised unconditionally since it is emulated, however,
it can be treated as an extended feature for EPT and it should not be
advertised if EPT itself is not exposed.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/timers
head: 97d21003df3e7504c899b1701546f18ff475966f
commit: 6c66350d0a482892793b888b07c1177fc6d4b344 [7/8] x86/tsc: Provide a means
to disable TSC ART
config: i386-randconfig-x0-10170810 (attached as .config)
compiler:
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/timers
head: 97d21003df3e7504c899b1701546f18ff475966f
commit: 6c66350d0a482892793b888b07c1177fc6d4b344 [7/8] x86/tsc: Provide a means
to disable TSC ART
config: i386-randconfig-x0-10170810 (attached as .config)
compiler:
Hi Mario,
[auto build test WARNING on platform-drivers-x86/for-next]
[also build test WARNING on next-20171016]
[cannot apply to v4.14-rc5]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Mario
Hi Mario,
[auto build test WARNING on platform-drivers-x86/for-next]
[also build test WARNING on next-20171016]
[cannot apply to v4.14-rc5]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Mario
On Tue, Oct 10, 2017 at 08:02:27PM +0200, Daniel Lezcano wrote:
> By essence, the tsensor does not really support multiple sensor at the same
> time. It allows to set a sensor and use it to get the temperature, another
> sensor could be switched but with a delay of 3-5ms. It is difficult to read
>
On Tue, Oct 10, 2017 at 08:02:27PM +0200, Daniel Lezcano wrote:
> By essence, the tsensor does not really support multiple sensor at the same
> time. It allows to set a sensor and use it to get the temperature, another
> sensor could be switched but with a delay of 3-5ms. It is difficult to read
>
Hi Mario,
[auto build test ERROR on platform-drivers-x86/for-next]
[also build test ERROR on v4.14-rc5 next-20171016]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Mario-Limonciello/Introduce
Hi Mario,
[auto build test ERROR on platform-drivers-x86/for-next]
[also build test ERROR on v4.14-rc5 next-20171016]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Mario-Limonciello/Introduce
Kees Cook writes:
> In preparation for unconditionally passing the struct timer_list pointer to
> all timer callbacks, switch to using the new timer_setup() and from_timer()
> to pass the timer pointer explicitly.
>
> Cc: Benjamin Herrenschmidt
>
Kees Cook writes:
> In preparation for unconditionally passing the struct timer_list pointer to
> all timer callbacks, switch to using the new timer_setup() and from_timer()
> to pass the timer pointer explicitly.
>
> Cc: Benjamin Herrenschmidt
> Cc: Paul Mackerras
> Cc: Michael Ellerman
>
On Tue, Oct 17, 2017 at 4:15 AM, Maxime Ripard
wrote:
> On Mon, Oct 16, 2017 at 04:20:32PM +0800, Chen-Yu Tsai wrote:
>> > On Sat, Oct 14, 2017 at 12:02:50PM +0800, Chen-Yu Tsai wrote:
>> >> The display backend, as well as other peripherals that have a DRAM
>> >>
On Tue, Oct 17, 2017 at 4:15 AM, Maxime Ripard
wrote:
> On Mon, Oct 16, 2017 at 04:20:32PM +0800, Chen-Yu Tsai wrote:
>> > On Sat, Oct 14, 2017 at 12:02:50PM +0800, Chen-Yu Tsai wrote:
>> >> The display backend, as well as other peripherals that have a DRAM
>> >> clock gate and access DRAM
Christos,
> Remove redundant variables in quedi_fw.c that are set but not used.
Applied to 4.15/scsi-queue.
--
Martin K. Petersen Oracle Linux Engineering
Christos,
> Remove redundant variables in quedi_fw.c that are set but not used.
Applied to 4.15/scsi-queue.
--
Martin K. Petersen Oracle Linux Engineering
On Mon, 2017-10-16 at 16:17 +0800, Sean Wang wrote:
> Hi Alexandre,
>
> Thanks for your valuable suggestions on the driver.
>
> I added comments inline and will have following-ups in the next version
>
> Sean
>
> On Thu, 2017-10-12 at 23:20 +0200, Alexandre Belloni wrote:
> > Hi,
> >
>
On Mon, 2017-10-16 at 16:17 +0800, Sean Wang wrote:
> Hi Alexandre,
>
> Thanks for your valuable suggestions on the driver.
>
> I added comments inline and will have following-ups in the next version
>
> Sean
>
> On Thu, 2017-10-12 at 23:20 +0200, Alexandre Belloni wrote:
> > Hi,
> >
>
Christos,
> Check whether configured_logical_drive_count is less than
> 255. Previous check was always evaluating to true as this variable is
> defined as u8.
Applied to 4.14/scsi-fixes. Thank you!
--
Martin K. Petersen Oracle Linux Engineering
Christos,
> Check whether configured_logical_drive_count is less than
> 255. Previous check was always evaluating to true as this variable is
> defined as u8.
Applied to 4.14/scsi-fixes. Thank you!
--
Martin K. Petersen Oracle Linux Engineering
2017-10-17 1:16 GMT+08:00 Jim Mattson :
> Does it still make sense to advertise "Enable VM Functions" in the
> secondary processor-based VM-execution controls if we don't actually
> support any VM Functions?
Will do in v2. Thanks for your review.
Regards,
Wanpeng Li
>
> On
2017-10-17 1:16 GMT+08:00 Jim Mattson :
> Does it still make sense to advertise "Enable VM Functions" in the
> secondary processor-based VM-execution controls if we don't actually
> support any VM Functions?
Will do in v2. Thanks for your review.
Regards,
Wanpeng Li
>
> On Sat, Oct 14, 2017 at
From: Jérôme Glisse
This is an optimization patch that only affect mmu_notifier users which
rely on the invalidate_range() callback. This patch avoids calling that
callback twice in a row from inside __mmu_notifier_invalidate_range_end
Existing pattern (before this patch):
From: Jérôme Glisse
This is an optimization patch that only affect mmu_notifier users which
rely on the invalidate_range() callback. This patch avoids calling that
callback twice in a row from inside __mmu_notifier_invalidate_range_end
Existing pattern (before this patch):
From: Jérôme Glisse
This patch only affects users of mmu_notifier->invalidate_range callback
which are device drivers related to ATS/PASID, CAPI, IOMMUv2, SVM ...
and it is an optimization for those users. Everyone else is unaffected
by it.
When clearing a pte/pmd we are
From: Jérôme Glisse
This patch only affects users of mmu_notifier->invalidate_range callback
which are device drivers related to ATS/PASID, CAPI, IOMMUv2, SVM ...
and it is an optimization for those users. Everyone else is unaffected
by it.
When clearing a pte/pmd we are given a choice to
From: Jérôme Glisse
(Andrew you already have v1 in your queue of patch 1, patch 2 is new,
i think you can drop it patch 1 v1 for v2, v2 is bit more conservative
and i fixed typos)
All this only affect user of invalidate_range callback (at this time
CAPI
From: Jérôme Glisse
(Andrew you already have v1 in your queue of patch 1, patch 2 is new,
i think you can drop it patch 1 v1 for v2, v2 is bit more conservative
and i fixed typos)
All this only affect user of invalidate_range callback (at this time
CAPI
On 10/16, Christoph Hellwig wrote:
>The only change for the non-nowait case is that we now do a trylock before
>locking i_rwsem. In the past that was the more optimal pattern. Can you
>test the patch below if that's not the case anymore? We have a few more
>instances like that which might also
On 10/16, Christoph Hellwig wrote:
>The only change for the non-nowait case is that we now do a trylock before
>locking i_rwsem. In the past that was the more optimal pattern. Can you
>test the patch below if that's not the case anymore? We have a few more
>instances like that which might also
On 10/16/2017 05:01 PM, Kees Cook wrote:
> In preparation for unconditionally passing the struct timer_list pointer to
> all timer callbacks, switch to using the new timer_setup() and from_timer()
> to pass the timer pointer explicitly.
>
> Cc: Kent Overstreet
> Cc:
On 10/16/2017 05:01 PM, Kees Cook wrote:
> In preparation for unconditionally passing the struct timer_list pointer to
> all timer callbacks, switch to using the new timer_setup() and from_timer()
> to pass the timer pointer explicitly.
>
> Cc: Kent Overstreet
> Cc: Shaohua Li
> Cc: Alasdair
Hi all,
I'm not sure if this is the problem on arm64 numa. What do you think ?
By the way, this testcase can be successful in any case on x86.
Thanks.
Xiaojun.
On 2017/10/16 19:42, Tan Xiaojun wrote:
> Hi all,
>
> I test ltp in Hisilicon D05 board and get a failed result about the testcase
>
Hi all,
I'm not sure if this is the problem on arm64 numa. What do you think ?
By the way, this testcase can be successful in any case on x86.
Thanks.
Xiaojun.
On 2017/10/16 19:42, Tan Xiaojun wrote:
> Hi all,
>
> I test ltp in Hisilicon D05 board and get a failed result about the testcase
>
On Mon, 16 Oct 2017 16:47:10 -0700
Kees Cook wrote:
> In preparation for unconditionally passing the struct timer_list pointer to
> all timer callbacks, switch to using the new timer_setup() and from_timer()
> to pass the timer pointer explicitly.
>
> Cc: Benjamin
On Mon, 16 Oct 2017 16:47:10 -0700
Kees Cook wrote:
> In preparation for unconditionally passing the struct timer_list pointer to
> all timer callbacks, switch to using the new timer_setup() and from_timer()
> to pass the timer pointer explicitly.
>
> Cc: Benjamin Herrenschmidt
> Cc: Paul
Colin,
> Functions ahc_devlimited_syncrate and ahc_linux_initialize_scsi_bus
> are declared static in their prototypes but are missing in their
> definitions, so add the missing static.
Applied to 4.15/scsi-queue. Thanks!
--
Martin K. Petersen Oracle Linux Engineering
Colin,
> Functions ahc_devlimited_syncrate and ahc_linux_initialize_scsi_bus
> are declared static in their prototypes but are missing in their
> definitions, so add the missing static.
Applied to 4.15/scsi-queue. Thanks!
--
Martin K. Petersen Oracle Linux Engineering
Masanori,
>> gcc-8 points out a logic error that has existed since the start
>> of the git history:
>>
>> drivers/scsi/nsp32.c: In function 'nsp32_selection_autoscsi':
>> drivers/scsi/nsp32.c:607:27: error: bitwise comparison always evaluates to
>> false [-Werror=tautological-compare]
>>
Masanori,
>> gcc-8 points out a logic error that has existed since the start
>> of the git history:
>>
>> drivers/scsi/nsp32.c: In function 'nsp32_selection_autoscsi':
>> drivers/scsi/nsp32.c:607:27: error: bitwise comparison always evaluates to
>> false [-Werror=tautological-compare]
>>
On Mon, Oct 16, 2017 at 7:12 PM, Shaohua Li wrote:
> On Mon, Oct 16, 2017 at 05:01:48PM -0700, Kees Cook wrote:
>> In preparation for unconditionally passing the struct timer_list pointer to
>> all timer callbacks, switch to using the new timer_setup() and from_timer()
>> to pass
On Mon, Oct 16, 2017 at 7:12 PM, Shaohua Li wrote:
> On Mon, Oct 16, 2017 at 05:01:48PM -0700, Kees Cook wrote:
>> In preparation for unconditionally passing the struct timer_list pointer to
>> all timer callbacks, switch to using the new timer_setup() and from_timer()
>> to pass the timer
Chandan Rajendra writes:
> Executing fstests' generic/036 test in a loop on next-20171013 kernel causes
> BUG_ON()'s condition to evaluate to true,
Did it used to work? ie. the bug just started happening? If so is there
a next tag which *doesn't* have the bug.
> run
Chandan Rajendra writes:
> Executing fstests' generic/036 test in a loop on next-20171013 kernel causes
> BUG_ON()'s condition to evaluate to true,
Did it used to work? ie. the bug just started happening? If so is there
a next tag which *doesn't* have the bug.
> run fstests generic/036 at
Hi Jim,
2017-10-17 3:53 GMT+08:00 Jim Mattson :
> According to the SDM,
>
> The IA32_VMX_EPT_VPID_CAP MSR exists only on processors that support
> the 1-setting of the “activate secondary
> controls” VM-execution control (only if bit 63 of the
> IA32_VMX_PROCBASED_CTLS MSR is
Hi Jim,
2017-10-17 3:53 GMT+08:00 Jim Mattson :
> According to the SDM,
>
> The IA32_VMX_EPT_VPID_CAP MSR exists only on processors that support
> the 1-setting of the “activate secondary
> controls” VM-execution control (only if bit 63 of the
> IA32_VMX_PROCBASED_CTLS MSR is 1) and that support
>
On Mon, Oct 16, 2017 at 05:01:48PM -0700, Kees Cook wrote:
> In preparation for unconditionally passing the struct timer_list pointer to
> all timer callbacks, switch to using the new timer_setup() and from_timer()
> to pass the timer pointer explicitly.
If you send the md.c part along, I'll
On Mon, Oct 16, 2017 at 05:01:48PM -0700, Kees Cook wrote:
> In preparation for unconditionally passing the struct timer_list pointer to
> all timer callbacks, switch to using the new timer_setup() and from_timer()
> to pass the timer pointer explicitly.
If you send the md.c part along, I'll
On 2017/10/16 23:30, Will Deacon wrote:
Can you jump the PC once the child appears to be "stuck"?
IIRC, GDB has special heuristics to step through LDXR/STXR critical
sections.
The function can be returned, But the number of instructions looks too much
We use objdump to count the assembly
On 2017/10/16 23:30, Will Deacon wrote:
Can you jump the PC once the child appears to be "stuck"?
IIRC, GDB has special heuristics to step through LDXR/STXR critical
sections.
The function can be returned, But the number of instructions looks too much
We use objdump to count the assembly
On 10/16/17 18:17, frowand.l...@gmail.com wrote:
> From: Frank Rowand
>
> I have found the device tree overlay code to be difficult to read and
> maintain. This patch series attempts to improve that situation.
>
> The cleanup includes some changes visible to users of
On 10/16/17 18:17, frowand.l...@gmail.com wrote:
> From: Frank Rowand
>
> I have found the device tree overlay code to be difficult to read and
> maintain. This patch series attempts to improve that situation.
>
> The cleanup includes some changes visible to users of overlays. The
> only in
On 10/16/17 18:17, frowand.l...@gmail.com wrote:
> From: Frank Rowand
>
> The process of applying an overlay consists of:
> - unflatten an overlay FDT (flattened device tree) into an
> EDT (expanded device tree)
> - fixup the phandle values in the overlay EDT to
On 10/16/17 18:17, frowand.l...@gmail.com wrote:
> From: Frank Rowand
>
> The process of applying an overlay consists of:
> - unflatten an overlay FDT (flattened device tree) into an
> EDT (expanded device tree)
> - fixup the phandle values in the overlay EDT to fit in a
> range
On Fri, 2017-10-13 at 12:16 +0800, Joel Stanley wrote:
> According to the ASPEED datasheet, gigabit speeds require a clock of
> 100MHz or higher. Other speeds require 25MHz or higher. This patch
> configures a 100MHz clock if the system has a direct-attached
> PHY, or 25MHz if the system is
On Fri, 2017-10-13 at 12:16 +0800, Joel Stanley wrote:
> According to the ASPEED datasheet, gigabit speeds require a clock of
> 100MHz or higher. Other speeds require 25MHz or higher. This patch
> configures a 100MHz clock if the system has a direct-attached
> PHY, or 25MHz if the system is
From: Chao Peng
Change pt_cap_get() to a public function so that KVM
can access it.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/events/intel/pt.c | 3 ++-
arch/x86/events/intel/pt.h
From: Chao Peng
Change pt_cap_get() to a public function so that KVM
can access it.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/events/intel/pt.c | 3 ++-
arch/x86/events/intel/pt.h | 18 --
arch/x86/include/asm/intel_pt.h | 20
From: Chao Peng
Trap for Intel processor trace is none sense. Pass through to
guest directly.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/kvm/vmx.c | 14 ++
1 file changed, 14
From: Chao Peng
Trap for Intel processor trace is none sense. Pass through to
guest directly.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/kvm/vmx.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index
From: Chao Peng
Load/Store Intel processor trace register in context switch.
MSR IA32_RTIT_CTL is loaded/stored automatically from VMCS,
other MSRs are loaded/stored manaully.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
From: Chao Peng
Add a date structure to save Intel processor trace context.
It mainly include all the MSR of Intel processor trace.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
From: Chao Peng
Load/Store Intel processor trace register in context switch.
MSR IA32_RTIT_CTL is loaded/stored automatically from VMCS,
other MSRs are loaded/stored manaully.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/kvm/vmx.c | 100
From: Chao Peng
Add a date structure to save Intel processor trace context.
It mainly include all the MSR of Intel processor trace.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/include/asm/msr-index.h | 1 +
arch/x86/include/asm/vmx.h | 2 ++
arch/x86/kvm/vmx.c
From: Chao Peng
Expose Intel processor trace cpuid to guest.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/kvm/cpuid.c| 23
From: Chao Peng
Intel processor trace virtualization enabling in guest need
to use these MSR bits, so move then to public header msr-index.h.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
From: Chao Peng
Expose Intel processor trace cpuid to guest.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/kvm/cpuid.c| 23 +--
arch/x86/kvm/svm.c | 6 ++
arch/x86/kvm/vmx.c
From: Chao Peng
Intel processor trace virtualization enabling in guest need
to use these MSR bits, so move then to public header msr-index.h.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/events/intel/pt.h | 37 -
From: Chao Peng
Implement Intel processor trace virtualization callbacks to
suppress host event in guest only mode.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/kvm/vmx.c | 21
From: Chao Peng
Add Intel processor trace virtualization call backs to
suppress host event in guest only mode.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/events/intel/pt.c | 21
From: Chao Peng
Implement Intel processor trace virtualization callbacks to
suppress host event in guest only mode.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/kvm/vmx.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/x86/kvm/vmx.c
From: Chao Peng
Add Intel processor trace virtualization call backs to
suppress host event in guest only mode.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/events/intel/pt.c | 21 +
arch/x86/include/asm/intel_pt.h | 9 +
2 files changed,
From: Chao Peng
PT virtualization can be work in one of 4 possible modes:
a. system-wide: trace both host/guest and output to host buffer;
b. host-only: only trace host and output to host buffer;
c. guest-only: only trace guest and output to guest buffer;
d.
From: Chao Peng
PT virtualization can be work in one of 4 possible modes:
a. system-wide: trace both host/guest and output to host buffer;
b. host-only: only trace host and output to host buffer;
c. guest-only: only trace guest and output to guest buffer;
d. host-guest: trace host/guest
From: Chao Peng
Hi All,
Here is a patch-series which adding Processor Trace enabling in KVM guest. You
can get It's software developer manuals from:
From: Chao Peng
Hi All,
Here is a patch-series which adding Processor Trace enabling in KVM guest. You
can get It's software developer manuals from:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
In Chapter 5 INTEL
On 2017年10月16日 18:06, Jeffy Chen wrote:
Add edp panel and enable related nodes on kevin.
Signed-off-by: Jeffy Chen
---
Looks good.
Reviewed-by: Mark Yao
Changes in v2: None
arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts | 29
On 2017年10月16日 18:06, Jeffy Chen wrote:
Add edp panel and enable related nodes on kevin.
Signed-off-by: Jeffy Chen
---
Looks good.
Reviewed-by: Mark Yao
Changes in v2: None
arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts | 29 +++
On 2017年10月09日 16:06, Sandy Huang wrote:
Some Rockchip CRTCs, like rv1108, can directly output parallel and
serial RGB data to panel or conversion chip, so we add this driver to
probe encoder and connector.
Signed-off-by: Sandy Huang
---
Changes in v3:
update for
On 2017年10月09日 16:06, Sandy Huang wrote:
Some Rockchip CRTCs, like rv1108, can directly output parallel and
serial RGB data to panel or conversion chip, so we add this driver to
probe encoder and connector.
Signed-off-by: Sandy Huang
---
Changes in v3:
update for rgb-mode move to panel
On 10/16/17 5:24 PM, Borislav Petkov wrote:
...
>>
>> +static inline void __set_percpu_decrypted(void *ptr, unsigned long size)
>> +{
>> +early_set_memory_decrypted(slow_virt_to_phys(ptr), size);
>> +}
> Ok, so this looks like useless conversion:
>
> you pass in a virtual address, it gets
On 10/16/17 5:24 PM, Borislav Petkov wrote:
...
>>
>> +static inline void __set_percpu_decrypted(void *ptr, unsigned long size)
>> +{
>> +early_set_memory_decrypted(slow_virt_to_phys(ptr), size);
>> +}
> Ok, so this looks like useless conversion:
>
> you pass in a virtual address, it gets
On Monday, October 16, 2017 8:33:40 PM EDT Richard Guy Briggs wrote:
> On 2017-10-12 16:33, Casey Schaufler wrote:
> > On 10/12/2017 7:14 AM, Richard Guy Briggs wrote:
> > > Containers are a userspace concept. The kernel knows nothing of them.
> > >
> > > The Linux audit system needs a way to be
On Monday, October 16, 2017 8:33:40 PM EDT Richard Guy Briggs wrote:
> On 2017-10-12 16:33, Casey Schaufler wrote:
> > On 10/12/2017 7:14 AM, Richard Guy Briggs wrote:
> > > Containers are a userspace concept. The kernel knows nothing of them.
> > >
> > > The Linux audit system needs a way to be
On 2017/10/7 3:21, Liming Sun wrote:
This series of commits enables the multi-card support for the dw-mmc
controller. It includes two parts as below.
The first part (patches 1-7) reverts the series of recent commits that
removed the multi-card support with comments saying there was no such
use
On 2017/10/7 3:21, Liming Sun wrote:
This series of commits enables the multi-card support for the dw-mmc
controller. It includes two parts as below.
The first part (patches 1-7) reverts the series of recent commits that
removed the multi-card support with comments saying there was no such
use
On Mon, Oct 16, 2017 at 01:30:09PM +0200, Hannes Reinecke wrote:
> On 10/13/2017 07:29 PM, Ming Lei wrote:
> > On Fri, Oct 13, 2017 at 05:08:52PM +, Bart Van Assche wrote:
> >> On Sat, 2017-10-14 at 00:45 +0800, Ming Lei wrote:
> >>> On Fri, Oct 13, 2017 at 04:31:04PM +, Bart Van Assche
On Mon, Oct 16, 2017 at 01:30:09PM +0200, Hannes Reinecke wrote:
> On 10/13/2017 07:29 PM, Ming Lei wrote:
> > On Fri, Oct 13, 2017 at 05:08:52PM +, Bart Van Assche wrote:
> >> On Sat, 2017-10-14 at 00:45 +0800, Ming Lei wrote:
> >>> On Fri, Oct 13, 2017 at 04:31:04PM +, Bart Van Assche
This is the second step which introduces a tunable interface that allow
numa stats configurable for optimizing zone_statistics(), as suggested by
Dave Hansen and Ying Huang.
=
When page allocation performance becomes a
This is the second step which introduces a tunable interface that allow
numa stats configurable for optimizing zone_statistics(), as suggested by
Dave Hansen and Ying Huang.
=
When page allocation performance becomes a
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