Re: [PATCH v2 05/13] mtd: rawnand: marvell: remove the dmaengine compat need
Hi Robert, On Thu, 24 May 2018 20:07:11 +0200, Robert Jarzmik wrote: > Miquel Raynal writes: > > > Hi Robert, > > Actually, a last time error slipped in this patch here (I'm really doing > poorly > on the copy paste side): > + nfc->dma_chan = dma_request_slave_channel(&nfc->dev, "data"); > > This should rather be : > + nfc->dma_chan = dma_request_slave_channel(nfc->dev, "data"); > > Would you grant your ack for the next iteration with this change folded in ? Didn't spot it. But, sure, I'm okay with the changes :) Thanks, Miquèl
Re: [PATCH] powerpc/modules: remove unused mod_arch_specific.toc field
On Friday 25 May 2018 09:18 AM, Josh Poimboeuf wrote: The toc field in the mod_arch_specific struct isn't actually used anywhere, so remove it. Also the ftrace-specific fields are now common between 32-bit and 64-bit, so simplify the struct definition a bit by moving them out of the __powerpc64__ #ifdef. Signed-off-by: Josh Poimboeuf Reviewed-by: Kamalesh Babulal
Re: [PATCH] gpu: Consistently use octal not symbolic permissions
On Fri, 2018-05-25 at 09:41 +0300, Jani Nikula wrote: > On Thu, 24 May 2018, Joe Perches wrote: > > There is currently a mixture of octal and symbolic permissions uses > > in files in drivers/gpu/drm and one file in drivers/gpu. > > > > There are ~270 existing octal uses and ~115 S_ uses. > > > > Convert all the S_ symbolic permissions to their octal equivalents > > as using octal and not symbolic permissions is preferred by many as more > > readable. > > > > see: https://lkml.org/lkml/2016/8/2/1945 > > > > Done with automated conversion via: > > $ ./scripts/checkpatch.pl -f --types=SYMBOLIC_PERMS --fix-inplace > > > > Miscellanea: > > > > o Wrapped modified multi-line calls to a single line where appropriate > > o Realign modified multi-line calls to open parenthesis > > o drivers/gpu/drm/msm/adreno/a5xx_debugfs.c has a world-writeable > > debug permission for "reset" - perhaps that should be modified > > Signed-off-by: Joe Perches > > --- > > drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c| 2 +- > > drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 98 > > +++--- > > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 3 +- > > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 9 +- > > drivers/gpu/drm/armada/armada_debugfs.c| 4 +- > > drivers/gpu/drm/drm_debugfs.c | 6 +- > > drivers/gpu/drm/drm_debugfs_crc.c | 4 +- > > drivers/gpu/drm/drm_sysfs.c| 2 +- > > drivers/gpu/drm/i915/gvt/firmware.c| 2 +- > > drivers/gpu/drm/i915/i915_debugfs.c| 8 +- > > drivers/gpu/drm/i915/i915_perf.c | 2 +- > > drivers/gpu/drm/i915/i915_sysfs.c | 22 ++--- > > drivers/gpu/drm/i915/intel_pipe_crc.c | 2 +- > > Please send at least i915 changes separately. There's zero reason to > make our lives harder for this change. The idea is to avoid unnecessary multiple patches for individual trees. But you could do that via something like: $ git am --include='drivers/gpu/drm/i915/*' cheers, Joe
Re: [PATCH 2/2] ACPI: EC: Dispatch the EC GPE directly on s2idle wake
Rafael, On 18 May 2018 at 08:10, kbuild test robot wrote: > Hi Rafael, > > I love your patch! Yet something to improve: > > [auto build test ERROR on pm/linux-next] > [also build test ERROR on v4.17-rc5] > [if your patch is applied to the wrong git tree, please drop us a note to > help improve the system] > > url: > https://github.com/0day-ci/linux/commits/Rafael-J-Wysocki/ACPI-PM-Dispatch-EC-GPE-early-on-s2idle-resume-if-LPS0-_DSM-is-used/20180518-070817 > base: https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git > linux-next > config: arm64-defconfig (attached as .config) > compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0 > reproduce: > wget > https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O > ~/bin/make.cross > chmod +x ~/bin/make.cross > # save the attached .config to linux build tree > make.cross ARCH=arm64 > > All errors (new ones prefixed by >>): > >drivers/acpi/ec.o: In function `acpi_ec_dispatch_gpe': >>> ec.c:(.text+0x239c): undefined reference to `acpi_dispatch_gpe' >ec.c:(.text+0x239c): relocation truncated to fit: R_AARCH64_CALL26 against > undefined symbol `acpi_dispatch_gpe' > > --- > 0-DAY kernel test infrastructureOpen Source Technology Center > https://lists.01.org/pipermail/kbuild-all Intel Corporation This breaks arm64 builds, would you mind to drop the offending patch from your linux-next branch? In case you haven't got time to check, I think the problem is caused by CONFIG_ACPI_REDUCED_HARDWARE_ONLY being set for arm64 builds. I can try to fix the problem, if you are busy and want help with it? Kind regards Uffe
Re: scsi/qla2xxx: BUG_ON(blk_queued_rq(req) is triggered in blk_finish_request
Hi Himanshu
I'm afraid I cannot provide you the vmcore file, it is from our customer.
If any information needed in the vmcore, I could provide with you.
In this scene, there are two contexts:
1. the irq context, scsi_done() from qla2x00_sp_compl()
2. the kworker context, scmd_eh_abort_handler which invokes the
qla2xxx_eh_abort()
Let's see the irq context.
scsi_done() will invoke the blk_complete_request().
In common case, the REQ_ATOM_COMPLETE should have been set by
blk_rq_check_expired() when the request was confirmed timeout. So
__blk_complete_request() will not be invoked.
On the other hand, in the kworker context, scmd_eh_abort_handler() will do some
other things on this aborted request.
rtn = scsi_try_to_abort_cmd(sdev->host->hostt, scmd);
if (rtn == SUCCESS) {
set_host_byte(scmd, DID_TIME_OUT)
if (scsi_host_eh_past_deadline(sdev->host)) {
} else if (!scsi_noretry_cmd(scmd) &&
(++scmd->retries <= scmd->allowed)) {
scsi_queue_insert(scmd, SCSI_MLQUEUE_EH_RETRY)
}
}
The host type of the result will set to DID_TIME_OUT. scsi_noretry_cmd() will
return false and scsi_queue_insert() will be invoked, finally the
blk_requeue_request().
blk_requeue_request() will clear the REQ_ATOM_COMPLETE and queue the request on
request_queue->queue_head.
There could be a race between these two contexts:
what if the blk_clear_rq_complete() in kworker context is invoked before the
blk_mark_rq_complete() in irq context ?
BLK_SOFTIRQ will be raised by __blk_complete_request() in irq context. Then the
scsi_softirq_done() will be invoked. At the moment, the request has been
requeued by kworker context and scsi_cmnd->result is set 0. On the cpu of the
irq context, the blk_finish_request() will be invoked finally, and panic comes
up due to BUG_ON(blk_queued_rq(req)
Here is the dmesg log.
[4937745.180213] qla2xxx [:92:00.1]-801c:4: Abort command issued
nexus=4:5:5 -- 1 2002.
[4937745.180655] qla2xxx [:92:00.1]-801c:4: Abort command issued
nexus=4:4:73 -- 0 2002.
[4937745.181059] qla2xxx [:92:00.1]-801c:4: Abort command issued
nexus=4:5:5 -- 1 2002.
[4937745.181514] qla2xxx [:92:00.1]-801c:4: Abort command issued
nexus=4:4:73 -- 0 2002.
[4937745.181636] [ cut here ]
[4937745.181900] kernel BUG at block/blk-core.c:2601!
[4937745.182095] qla2xxx [:92:00.1]-801c:4: Abort command issued
nexus=4:5:5 -- 1 2002.
[4937745.182338] qla2xxx [:92:00.1]-801c:4: Abort command issued
nexus=4:4:73 -- 1 2002.
[4937745.183046] qla2xxx [:92:00.1]-801c:4: Abort command issued
nexus=4:5:5 -- 1 2002.
[4937745.183213] qla2xxx [:92:00.1]-801c:4: Abort command issued
nexus=4:4:73 -- 1 2002.
[4937745.183844] qla2xxx [:92:00.1]-801c:4: Abort command issued
nexus=4:5:5 -- 1 2002.
[4937745.184038] qla2xxx [:92:00.1]-801c:4: Abort command issued
nexus=4:4:73 -- 1 2002.
[4937745.184919] invalid opcode: [#1] SMP
[4937745.185173] Modules linked in: ...
[4937745.188237] CPU: 18 PID: 0 Comm: swapper/18 Not tainted
4.1.12-61.1.9.el6uek.x86_64 #2
[4937745.188691] Hardware name: Oracle Corporation SUN BLADE X4-2B
/BD,ASSY,PCB,X4-2B , BIOS 28010200 01/16/2014
[4937745.189157] task: 880227fa9c00 ti: 880227fc task.ti:
880227fc
[4937745.189607] RIP: e030:[] []
blk_finish_request+0xd0/0xe0
[4937745.190104] RSP: e02b:88022d483d78 EFLAGS: 00010083
[4937745.190339] RAX: 0280 RBX: 8801c4508730 RCX:
0280
[4937745.190791] RDX: 8b5a RSI: RDI:
8801c4508730
[4937745.191246] RBP: 88022d483d88 R08: R09:
4000
[4937745.191694] R10: 000b R11: 7ffe R12:
[4937745.192153] R13: 88022374d000 R14: 880184cb88c0 R15:
8800536ccc90
[4937745.197930] FS: () GS:88022d48()
knlGS:88022d48
[4937745.198389] CS: e033 DS: 002b ES: 002b CR0: 80050033
[4937745.198627] CR2: 016e1f18 CR3: 00010caed000 CR4:
00042660
[4937745.199080] Stack:
[4937745.199309] 8801c4508730 88022d483dd8
814ac82f
[4937745.199790] 88022d483da8 0280 88022d483dd8
880184cb88c0
[4937745.200290] 8801c4508730
[4937745.200745] Call Trace:
[4937745.200968]
[4937745.200986] [] scsi_end_request+0x11f/0x1e0
[4937745.201422] [] scsi_io_completion+0xac/0x500
[4937745.201651] [] scsi_finish_command+0xf0/0x150
[4937745.201875] [] scsi_softirq_done+0x14a/0x160
[4937745.202103] [] blk_done_softirq+0x86/0xa0
[4937745.202333] [] __do_softirq+0x10a/0x350
[4937745.202558] [] irq_exit+0x125/0x130
[4937745.202787] [] xen_evtchn_do_upcall+0x39/0x50
[4937745.203020] [] xen_do_hypervisor_callback+0x1e/0x40
[4937745.203247]
[4937745.203263] [] ? xen_hypercall_sched_op+0xa/0x20
[4937745.203703] [] ? xen_hypercall_sched_op+0xa/0
Re: [PATCH] f2fs: let fstrim issue discard commands in lower priority
On 2018/5/25 14:18, Jaegeuk Kim wrote:
> On 05/25, Chao Yu wrote:
>> Hi Jaegeuk,
>>
>> On 2018/5/25 13:10, Jaegeuk Kim wrote:
>>> The fstrim gathers huge number of large discard commands, and tries to issue
>>> without IO awareness, which results in long user-perceive IO latencies on
>>> READ, WRITE, and FLUSH in UFS. We've observed some of commands take several
>>> seconds due to long discard latency.
>>>
>>> This patch limits the maximum size to 2MB per candidate, and check IO
>>> congestion
>>> when issuing them to disk.
>>>
>>> Signed-off-by: Jaegeuk Kim
>>> ---
>>> fs/f2fs/f2fs.h| 4 +-
>>> fs/f2fs/segment.c | 123 +++---
>>> 2 files changed, 64 insertions(+), 63 deletions(-)
>>>
>>> diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
>>> index 3bddf13794d9..75ae7fc86ae8 100644
>>> --- a/fs/f2fs/f2fs.h
>>> +++ b/fs/f2fs/f2fs.h
>>> @@ -178,6 +178,7 @@ enum {
>>>
>>> #define MAX_DISCARD_BLOCKS(sbi)BLKS_PER_SEC(sbi)
>>> #define DEF_MAX_DISCARD_REQUEST8 /* issue 8 discards per
>>> round */
>>> +#define DEF_MAX_DISCARD_LEN512 /* Max. 2MB per discard
>>> */
>>> #define DEF_MIN_DISCARD_ISSUE_TIME 50 /* 50 ms, if exists */
>>> #define DEF_MID_DISCARD_ISSUE_TIME 500 /* 500 ms, if device busy */
>>> #define DEF_MAX_DISCARD_ISSUE_TIME 6 /* 60 s, if no candidates */
>>> @@ -698,7 +699,8 @@ static inline void set_extent_info(struct extent_info
>>> *ei, unsigned int fofs,
>>> static inline bool __is_discard_mergeable(struct discard_info *back,
>>> struct discard_info *front)
>>> {
>>> - return back->lstart + back->len == front->lstart;
>>> + return (back->lstart + back->len == front->lstart) &&
>>> + (back->len + front->len < DEF_MAX_DISCARD_LEN);
>>> }
>>>
>>> static inline bool __is_discard_back_mergeable(struct discard_info *cur,
>>> diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c
>>> index 843fc2e6d41c..ba996d4091bc 100644
>>> --- a/fs/f2fs/segment.c
>>> +++ b/fs/f2fs/segment.c
>>> @@ -1139,68 +1139,6 @@ static int __queue_discard_cmd(struct f2fs_sb_info
>>> *sbi,
>>> return 0;
>>> }
>>>
>>> -static void __issue_discard_cmd_range(struct f2fs_sb_info *sbi,
>>> - struct discard_policy *dpolicy,
>>> - unsigned int start, unsigned int end)
>>> -{
>>> - struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info;
>>> - struct discard_cmd *prev_dc = NULL, *next_dc = NULL;
>>> - struct rb_node **insert_p = NULL, *insert_parent = NULL;
>>> - struct discard_cmd *dc;
>>> - struct blk_plug plug;
>>> - int issued;
>>> -
>>> -next:
>>> - issued = 0;
>>> -
>>> - mutex_lock(&dcc->cmd_lock);
>>> - f2fs_bug_on(sbi, !__check_rb_tree_consistence(sbi, &dcc->root));
>>> -
>>> - dc = (struct discard_cmd *)__lookup_rb_tree_ret(&dcc->root,
>>> - NULL, start,
>>> - (struct rb_entry **)&prev_dc,
>>> - (struct rb_entry **)&next_dc,
>>> - &insert_p, &insert_parent, true);
>>> - if (!dc)
>>> - dc = next_dc;
>>> -
>>> - blk_start_plug(&plug);
>>> -
>>> - while (dc && dc->lstart <= end) {
>>> - struct rb_node *node;
>>> -
>>> - if (dc->len < dpolicy->granularity)
>>> - goto skip;
>>> -
>>> - if (dc->state != D_PREP) {
>>> - list_move_tail(&dc->list, &dcc->fstrim_list);
>>> - goto skip;
>>> - }
>>> -
>>> - __submit_discard_cmd(sbi, dpolicy, dc);
>>> -
>>> - if (++issued >= dpolicy->max_requests) {
>>> - start = dc->lstart + dc->len;
>>> -
>>> - blk_finish_plug(&plug);
>>> - mutex_unlock(&dcc->cmd_lock);
>>> -
>>> - schedule();
>>> -
>>> - goto next;
>>> - }
>>> -skip:
>>> - node = rb_next(&dc->rb_node);
>>> - dc = rb_entry_safe(node, struct discard_cmd, rb_node);
>>> -
>>> - if (fatal_signal_pending(current))
>>> - break;
>>> - }
>>> -
>>> - blk_finish_plug(&plug);
>>> - mutex_unlock(&dcc->cmd_lock);
>>> -}
>>> -
>>> static int __issue_discard_cmd(struct f2fs_sb_info *sbi,
>>> struct discard_policy *dpolicy)
>>> {
>>> @@ -2397,6 +2335,67 @@ bool exist_trim_candidates(struct f2fs_sb_info *sbi,
>>> struct cp_control *cpc)
>>> return has_candidate;
>>> }
>>>
>>> +static void __issue_discard_cmd_range(struct f2fs_sb_info *sbi,
>>> + struct discard_policy *dpolicy,
>>> + unsigned int start, unsigned int end)
>>> +{
>>> + struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info;
>>> + struct discard_cmd *prev_dc = NULL, *next_dc = NULL;
>>> + struct rb_
Re: [PATCH] gpu: Consistently use octal not symbolic permissions
Well I think we rejected that multiple times now.
At least I find the symbolic permissions easier to read and I absolutely
don't see any reason why we should only use one form.
Christian.
Am 24.05.2018 um 22:22 schrieb Joe Perches:
There is currently a mixture of octal and symbolic permissions uses
in files in drivers/gpu/drm and one file in drivers/gpu.
There are ~270 existing octal uses and ~115 S_ uses.
Convert all the S_ symbolic permissions to their octal equivalents
as using octal and not symbolic permissions is preferred by many as more
readable.
see: https://lkml.org/lkml/2016/8/2/1945
Done with automated conversion via:
$ ./scripts/checkpatch.pl -f --types=SYMBOLIC_PERMS --fix-inplace
Miscellanea:
o Wrapped modified multi-line calls to a single line where appropriate
o Realign modified multi-line calls to open parenthesis
o drivers/gpu/drm/msm/adreno/a5xx_debugfs.c has a world-writeable
debug permission for "reset" - perhaps that should be modified
Signed-off-by: Joe Perches
---
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 98 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 9 +-
drivers/gpu/drm/armada/armada_debugfs.c| 4 +-
drivers/gpu/drm/drm_debugfs.c | 6 +-
drivers/gpu/drm/drm_debugfs_crc.c | 4 +-
drivers/gpu/drm/drm_sysfs.c| 2 +-
drivers/gpu/drm/i915/gvt/firmware.c| 2 +-
drivers/gpu/drm/i915/i915_debugfs.c| 8 +-
drivers/gpu/drm/i915/i915_perf.c | 2 +-
drivers/gpu/drm/i915/i915_sysfs.c | 22 ++---
drivers/gpu/drm/i915/intel_pipe_crc.c | 2 +-
drivers/gpu/drm/msm/adreno/a5xx_debugfs.c | 5 +-
drivers/gpu/drm/msm/msm_perf.c | 4 +-
drivers/gpu/drm/msm/msm_rd.c | 4 +-
drivers/gpu/drm/nouveau/nouveau_debugfs.c | 2 +-
drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c| 11 ++-
.../drm/omapdrm/displays/panel-sony-acx565akm.c| 6 +-
.../drm/omapdrm/displays/panel-tpo-td043mtea1.c| 10 +--
drivers/gpu/drm/radeon/radeon_pm.c | 26 +++---
drivers/gpu/drm/radeon/radeon_ttm.c| 4 +-
drivers/gpu/drm/sti/sti_drv.c | 2 +-
drivers/gpu/drm/tinydrm/mipi-dbi.c | 4 +-
drivers/gpu/drm/ttm/ttm_bo.c | 2 +-
drivers/gpu/drm/ttm/ttm_memory.c | 12 +--
drivers/gpu/drm/ttm/ttm_page_alloc.c | 6 +-
drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 6 +-
drivers/gpu/drm/udl/udl_fb.c | 4 +-
drivers/gpu/host1x/debug.c | 12 +--
30 files changed, 138 insertions(+), 146 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index f5fb93795a69..7b29febff511 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -830,7 +830,7 @@ int amdgpu_debugfs_regs_init(struct amdgpu_device *adev)
for (i = 0; i < ARRAY_SIZE(debugfs_regs); i++) {
ent = debugfs_create_file(debugfs_regs_names[i],
- S_IFREG | S_IRUGO, root,
+ S_IFREG | 0444, root,
adev, debugfs_regs[i]);
if (IS_ERR(ent)) {
for (j = 0; j < i; j++) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index b455da487782..fa55d7e9e784 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -905,39 +905,39 @@ static ssize_t amdgpu_set_pp_power_profile_mode(struct
device *dev,
return -EINVAL;
}
-static DEVICE_ATTR(power_dpm_state, S_IRUGO | S_IWUSR, amdgpu_get_dpm_state, amdgpu_set_dpm_state);
-static DEVICE_ATTR(power_dpm_force_performance_level, S_IRUGO | S_IWUSR,
+static DEVICE_ATTR(power_dpm_state, 0644, amdgpu_get_dpm_state,
amdgpu_set_dpm_state);
+static DEVICE_ATTR(power_dpm_force_performance_level, 0644,
amdgpu_get_dpm_forced_performance_level,
amdgpu_set_dpm_forced_performance_level);
-static DEVICE_ATTR(pp_num_states, S_IRUGO, amdgpu_get_pp_num_states, NULL);
-static DEVICE_ATTR(pp_cur_state, S_IRUGO, amdgpu_get_pp_cur_state, NULL);
-static DEVICE_ATTR(pp_force_state, S_IRUGO | S_IWUSR,
- amdgpu_get_pp_force_state,
- amdgpu_set_pp_force_state);
-static DEVICE_ATTR(pp_table, S_IRUGO | S_IWUSR,
- amdgpu_get_pp_table,
- amdgpu_set_pp_table);
-static DEVICE_ATTR(pp_dpm_sclk, S_IRUGO | S_IWUSR,
- amdgpu_get_pp_dpm_sclk,
- amdgpu_set_pp_dp
Re: [PATCH v10 01/16] videobuf2: Make struct vb2_buffer refcounted
Hello,
On 5/21/18, Ezequiel Garcia wrote:
> The in-fence implementation involves having a per-buffer fence callback,
> that triggers on the fence signal. The fence callback is called
> asynchronously
> and needs a valid reference to the associated ideobuf2 buffer.
>
> Allow this by making the vb2_buffer refcounted, so it can be passed
> to other contexts.
>
-Is it really required, because when a queued buffer with an in_fence
is deallocated, firstly queue is cancelled.
-And __vb2_dqbuf is called which calls dma_fence_remove_callback.
-So if fence callback has been called -__vb2_dqbuf will wait to
acquire fence lock.
-So during execution of fence callback, buffers and queue are still valid.
-And if __vb2_dqbuf remove callback first ,then dma_fence_signal will
wait for lock
- so there won't be any fence callback to call for that buffer when
dma_fence_signal resumes.
> Signed-off-by: Ezequiel Garcia
> ---
> drivers/media/common/videobuf2/videobuf2-core.c | 27
> ++---
> include/media/videobuf2-core.h | 7 +--
> 2 files changed, 29 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/media/common/videobuf2/videobuf2-core.c
> b/drivers/media/common/videobuf2/videobuf2-core.c
> index d3f7bb33a54d..f1feb45c1e37 100644
> --- a/drivers/media/common/videobuf2/videobuf2-core.c
> +++ b/drivers/media/common/videobuf2/videobuf2-core.c
> @@ -190,6 +190,26 @@ module_param(debug, int, 0644);
> static void __vb2_queue_cancel(struct vb2_queue *q);
> static void __enqueue_in_driver(struct vb2_buffer *vb);
>
> +static void __vb2_buffer_free(struct kref *kref)
> +{
> + struct vb2_buffer *vb =
> + container_of(kref, struct vb2_buffer, refcount);
> + kfree(vb);
> +}
> +
> +static void __vb2_buffer_put(struct vb2_buffer *vb)
> +{
> + if (vb)
> + kref_put(&vb->refcount, __vb2_buffer_free);
> +}
> +
> +static struct vb2_buffer *__vb2_buffer_get(struct vb2_buffer *vb)
> +{
> + if (vb)
> + kref_get(&vb->refcount);
> + return vb;
> +}
> +
> /*
> * __vb2_buf_mem_alloc() - allocate video memory for the given buffer
> */
> @@ -346,6 +366,7 @@ static int __vb2_queue_alloc(struct vb2_queue *q, enum
> vb2_memory memory,
> break;
> }
>
> + kref_init(&vb->refcount);
> vb->state = VB2_BUF_STATE_DEQUEUED;
> vb->vb2_queue = q;
> vb->num_planes = num_planes;
> @@ -365,7 +386,7 @@ static int __vb2_queue_alloc(struct vb2_queue *q, enum
> vb2_memory memory,
> dprintk(1, "failed allocating memory for buffer
> %d\n",
> buffer);
> q->bufs[vb->index] = NULL;
> - kfree(vb);
> + __vb2_buffer_put(vb);
> break;
> }
> __setup_offsets(vb);
> @@ -380,7 +401,7 @@ static int __vb2_queue_alloc(struct vb2_queue *q, enum
> vb2_memory memory,
> buffer, vb);
> __vb2_buf_mem_free(vb);
> q->bufs[vb->index] = NULL;
> - kfree(vb);
> + __vb2_buffer_put(vb);
> break;
> }
> }
> @@ -520,7 +541,7 @@ static int __vb2_queue_free(struct vb2_queue *q,
> unsigned int buffers)
> /* Free videobuf buffers */
> for (buffer = q->num_buffers - buffers; buffer < q->num_buffers;
>++buffer) {
> - kfree(q->bufs[buffer]);
> + __vb2_buffer_put(q->bufs[buffer]);
> q->bufs[buffer] = NULL;
> }
>
> diff --git a/include/media/videobuf2-core.h
> b/include/media/videobuf2-core.h
> index f6818f732f34..baa4632c7e59 100644
> --- a/include/media/videobuf2-core.h
> +++ b/include/media/videobuf2-core.h
> @@ -12,11 +12,12 @@
> #ifndef _MEDIA_VIDEOBUF2_CORE_H
> #define _MEDIA_VIDEOBUF2_CORE_H
>
> +#include
> +#include
> +#include
> #include
> #include
> #include
> -#include
> -#include
>
> #define VB2_MAX_FRAME(32)
> #define VB2_MAX_PLANES (8)
> @@ -249,6 +250,7 @@ struct vb2_buffer {
>
> /* private: internal use only
>*
> + * refcount:refcount for this buffer
>* state: current buffer state; do not change
>* queued_entry:entry on the queued buffers list, which holds
>* all buffers queued from userspace
> @@ -256,6 +258,7 @@ struct vb2_buffer {
>* to be dequeued to userspace
>* vb2_plane: per-plane information; do not change
>*/
> + struct kref refcount;
> enum vb2_buffer_state state;
>
> struct vb2_planeplanes[VB2_MAX_PLANES];
>
Regards,
Sathyam
Re: [PATCH] gpu: Consistently use octal not symbolic permissions
On Thu, 24 May 2018, Joe Perches wrote: > There is currently a mixture of octal and symbolic permissions uses > in files in drivers/gpu/drm and one file in drivers/gpu. > > There are ~270 existing octal uses and ~115 S_ uses. > > Convert all the S_ symbolic permissions to their octal equivalents > as using octal and not symbolic permissions is preferred by many as more > readable. > > see: https://lkml.org/lkml/2016/8/2/1945 > > Done with automated conversion via: > $ ./scripts/checkpatch.pl -f --types=SYMBOLIC_PERMS --fix-inplace > > Miscellanea: > > o Wrapped modified multi-line calls to a single line where appropriate > o Realign modified multi-line calls to open parenthesis > o drivers/gpu/drm/msm/adreno/a5xx_debugfs.c has a world-writeable > debug permission for "reset" - perhaps that should be modified > > Signed-off-by: Joe Perches > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c| 2 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 98 > +++--- > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 3 +- > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 9 +- > drivers/gpu/drm/armada/armada_debugfs.c| 4 +- > drivers/gpu/drm/drm_debugfs.c | 6 +- > drivers/gpu/drm/drm_debugfs_crc.c | 4 +- > drivers/gpu/drm/drm_sysfs.c| 2 +- > drivers/gpu/drm/i915/gvt/firmware.c| 2 +- > drivers/gpu/drm/i915/i915_debugfs.c| 8 +- > drivers/gpu/drm/i915/i915_perf.c | 2 +- > drivers/gpu/drm/i915/i915_sysfs.c | 22 ++--- > drivers/gpu/drm/i915/intel_pipe_crc.c | 2 +- Please send at least i915 changes separately. There's zero reason to make our lives harder for this change. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center
Re: [PATCH v1 2/2] cpufreq: tegra20: Use PLL_C as intermediate clock source
On Thu, May 24, 2018 at 03:49:22PM +0300, Dmitry Osipenko wrote: > On 24.05.2018 13:04, Peter De Schrijver wrote: > > On Wed, May 23, 2018 at 07:00:20PM +0300, Dmitry Osipenko wrote: > >> PLL_C is running at 600MHz which is significantly higher than the 216MHz > >> of the PLL_P and it is known that PLL_C is always-ON because AHB BUS is > >> running on that PLL. Let's use PLL_C as intermediate clock source, making > >> CPU snappier a tad during of the frequency transition. > >> > > > > pll_c isn't necessarily 600Mhz when used as a source for the second display > > head. > > Hmm, indeed. > > Even if PLL_C rate will be adjusted, it will be higher than the PLL_P.. won't > it? That's likely to be good enough. > Yes. I think it can be always higher than pll_p, but that assumes the display driver will always program the highest possible rate for pll_c for a given mode and then program the display divider to divide it down to the required rate. > Do you know if any of the available CCLK parents has a glitch-less rate > switching? I.e. CPU won't hang on the rate switch. > Tegra20 doesn't have dynamic ramp PLLs no. So you always have to switch to a backup clock source before changing the rate of pll_x. > There is other possible 600MHz source, the PLL_M. Can we use it? This one also > may become dynamic if we'll consider implementing the memory scaling, but the > memory frequency probably will fit the transition role pretty well. I think this should work, but as you mention it may very well be lower than pll_p if Tegra20 EMC scaling is re-introduced. I think that's why historically this was never done. Peter.
Re: [PATCH] usb: hub: Per-port setting to use old enumeration scheme
On Wed, May 23, 2018 at 10:16:56AM +0800, Nicolas Boichat wrote:
> The "old" enumeration scheme is considerably faster (it takes
> ~294ms instead of ~439ms to get the descriptor).
>
> It is currently only possible to use the old scheme globally
> (/sys/module/usbcore/parameters/old_scheme_first), which is not
> desirable as the new scheme was introduced to increase compatibility
> with more devices.
>
> However, in our case, we care about time-to-active for a specific
> USB device (which we make the firmware for), on a specific port
> (that is pogo-pin based: not a standard USB port). This new
> sysfs option makes it possible to use the old scheme on a single
> port only.
>
> Signed-off-by: Nicolas Boichat
> ---
>
> There are other "quirks" that we could add to reduce further
> enumeration time (e.g. reduce USB debounce time, reduce TRSTRCY
> to 10ms instead of 50ms as used currently), but the logic is quite
> similar, so it'd be good to have this reviewed first.
>
> drivers/usb/core/hub.c | 13 +
> drivers/usb/core/hub.h | 1 +
> drivers/usb/core/port.c | 23 +++
> include/linux/usb.h | 7 +++
> 4 files changed, 40 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
> index c2d993d3816f0..f900f66a62856 100644
> --- a/drivers/usb/core/hub.c
> +++ b/drivers/usb/core/hub.c
> @@ -2636,7 +2636,7 @@ static unsigned hub_is_wusb(struct usb_hub *hub)
> #define SET_ADDRESS_TRIES2
> #define GET_DESCRIPTOR_TRIES 2
> #define SET_CONFIG_TRIES (2 * (use_both_schemes + 1))
> -#define USE_NEW_SCHEME(i)((i) / 2 == (int)old_scheme_first)
> +#define USE_NEW_SCHEME(i, scheme)((i) / 2 == (int)scheme)
>
> #define HUB_ROOT_RESET_TIME 60 /* times are in msec */
> #define HUB_SHORT_RESET_TIME 10
> @@ -2651,12 +2651,16 @@ static unsigned hub_is_wusb(struct usb_hub *hub)
> * enumeration failures, so disable this enumeration scheme for USB3
> * devices.
> */
> -static bool use_new_scheme(struct usb_device *udev, int retry)
> +static bool use_new_scheme(struct usb_device *udev, int retry,
> +struct usb_port *port_dev)
> {
> + int old_scheme_first_port =
> + port_dev->quirks & USB_PORT_QUIRK_OLD_SCHEME;
> +
> if (udev->speed >= USB_SPEED_SUPER)
> return false;
>
> - return USE_NEW_SCHEME(retry);
> + return USE_NEW_SCHEME(retry, old_scheme_first_port || old_scheme_first);
> }
>
> /* Is a USB 3.0 port in the Inactive or Compliance Mode state?
> @@ -4392,6 +4396,7 @@ hub_port_init(struct usb_hub *hub, struct usb_device
> *udev, int port1,
> {
> struct usb_device *hdev = hub->hdev;
> struct usb_hcd *hcd = bus_to_hcd(hdev->bus);
> + struct usb_port *port_dev = hub->ports[port1 - 1];
> int retries, operations, retval, i;
> unsigneddelay = HUB_SHORT_RESET_TIME;
> enum usb_device_speed oldspeed = udev->speed;
> @@ -4513,7 +4518,7 @@ hub_port_init(struct usb_hub *hub, struct usb_device
> *udev, int port1,
> for (retries = 0; retries < GET_DESCRIPTOR_TRIES; (++retries,
> msleep(100))) {
> bool did_new_scheme = false;
>
> - if (use_new_scheme(udev, retry_counter)) {
> + if (use_new_scheme(udev, retry_counter, port_dev)) {
> struct usb_device_descriptor *buf;
> int r = 0;
>
> diff --git a/drivers/usb/core/hub.h b/drivers/usb/core/hub.h
> index 4dc769ee9c740..4accfb63f7dcb 100644
> --- a/drivers/usb/core/hub.h
> +++ b/drivers/usb/core/hub.h
> @@ -98,6 +98,7 @@ struct usb_port {
> struct mutex status_lock;
> u32 over_current_count;
> u8 portnum;
> + u32 quirks;
> unsigned int is_superspeed:1;
> unsigned int usb3_lpm_u1_permit:1;
> unsigned int usb3_lpm_u2_permit:1;
> diff --git a/drivers/usb/core/port.c b/drivers/usb/core/port.c
> index 6979bde87d310..4a21431953953 100644
> --- a/drivers/usb/core/port.c
> +++ b/drivers/usb/core/port.c
> @@ -50,6 +50,28 @@ static ssize_t over_current_count_show(struct device *dev,
> }
> static DEVICE_ATTR_RO(over_current_count);
>
> +static ssize_t quirks_show(struct device *dev,
> +struct device_attribute *attr, char *buf)
> +{
> + struct usb_port *port_dev = to_usb_port(dev);
> +
> + return sprintf(buf, "%08x\n", port_dev->quirks);
> +}
> +
> +static ssize_t quirks_store(struct device *dev, struct device_attribute
> *attr,
> + const char *buf, size_t count)
> +{
> + struct usb_port *port_dev = to_usb_port(dev);
> + u32 value;
> +
> + if (kstrtou32(buf, 16, &value))
> + return -EINVAL;
> +
> + port_dev->quirks = value;
> + return count;
> +}
> +static DEVICE_ATTR_RW(quirks);
> +
> static ssize_t usb3_lpm_permit_show(struct device *dev,
> struct device_attribute *attr,
Re: [PATCH] usb: hub: Per-port setting to use old enumeration scheme
On Fri, May 25, 2018 at 06:05:16AM +0800, Nicolas Boichat wrote: > On Fri, May 25, 2018 at 12:21 AM, Greg Kroah-Hartman > wrote: > > On Thu, May 24, 2018 at 07:42:00AM +0800, Nicolas Boichat wrote: > >> On Thu, May 24, 2018 at 12:39 AM, Greg Kroah-Hartman > >> wrote: > >> > On Wed, May 23, 2018 at 10:03:55AM -0400, Alan Stern wrote: > >> >> On Wed, 23 May 2018, Nicolas Boichat wrote: > >> >> > >> >> > The "old" enumeration scheme is considerably faster (it takes > >> >> > ~294ms instead of ~439ms to get the descriptor). > >> >> > > >> >> > It is currently only possible to use the old scheme globally > >> >> > (/sys/module/usbcore/parameters/old_scheme_first), which is not > >> >> > desirable as the new scheme was introduced to increase compatibility > >> >> > with more devices. > >> >> > > >> >> > However, in our case, we care about time-to-active for a specific > >> >> > USB device (which we make the firmware for), on a specific port > >> >> > (that is pogo-pin based: not a standard USB port). This new > >> >> > sysfs option makes it possible to use the old scheme on a single > >> >> > port only. > >> >> > > >> >> > Signed-off-by: Nicolas Boichat > >> >> > --- > >> >> > > >> >> > There are other "quirks" that we could add to reduce further > >> >> > enumeration time (e.g. reduce USB debounce time, reduce TRSTRCY > >> >> > to 10ms instead of 50ms as used currently), but the logic is quite > >> >> > similar, so it'd be good to have this reviewed first. > >> >> > >> >> I'm not opposed to the idea in principle, although I don't like your > >> >> implementation because it breaks the original old_scheme_first > >> >> parameter. > >> > >> I don't think it breaks the original parameter? I mean, > >> /sys/module/usbcore/parameters/old_scheme_first is still a global > >> default, while bit 0 of /sys/bus/usb/devices/x/y/z/quirks becomes a > >> port-specific override. > >> > >> >> Let's see what some other people think. > >> >> > >> >> Yours is a rather special case, because you know exactly what device > >> >> will be attached to a specific port. Still, I can see that sort of > >> >> thing happening in constrained and special-purpose settings. > >> >> > >> >> How do you arrange to set the new quirk before the device is > >> >> discovered? > >> > > >> > Yeah, this last question is what I had when looking at this. Or does it > >> > not matter at first boot and only matters for wake-up? > >> > >> It does not matter on boot, we have plenty of time to enumerate the > >> device. We use USB (auto-)suspend and remote wake, so no > >> re-enumeration there either. It only matters on unplug/replug where > >> the device needs to be re-enumerated. > > > > How does this device get unplugged/replugged if it is connected directly > > to the device? > > It is external. Essentially, this is a tablet with a detachable > keyboard/touchpad. The interface between tablet and base is USB, over > pogo pins. The port is non-standard (pogo, not normal USB), and we > fully control the firmware on the base side as well, which allows us > to take shortcuts like this: we know exactly what device will be > connected on that port. Ah, ok, that makes more sense, thanks for the explanation. I'll go queue this up in a bit. greg k-h
Re: [PATCH] cpufreq / CPPC: Add cpuinfo_cur_freq support for CPPC
Hi Prashanth,
On 05/25/2018 12:55 AM, Prakash, Prashanth wrote:
Hi George,
On 5/22/2018 5:42 AM, George Cherian wrote:
Per Section 8.4.7.1.3 of ACPI 6.2, The platform provides performance
feedback via set of performance counters. To determine the actual
performance level delivered over time, OSPM may read a set of
performance counters from the Reference Performance Counter Register
and the Delivered Performance Counter Register.
OSPM calculates the delivered performance over a given time period by
taking a beginning and ending snapshot of both the reference and
delivered performance counters, and calculating:
delivered_perf = reference_perf X (delta of delivered_perf counter / delta of
reference_perf counter).
Implement the above and hook this to the cpufreq->get method.
Signed-off-by: George Cherian
---
drivers/cpufreq/cppc_cpufreq.c | 44 ++
1 file changed, 44 insertions(+)
diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c
index b15115a..a046915 100644
--- a/drivers/cpufreq/cppc_cpufreq.c
+++ b/drivers/cpufreq/cppc_cpufreq.c
@@ -240,10 +240,54 @@ static int cppc_cpufreq_cpu_init(struct cpufreq_policy
*policy)
return ret;
}
+static int cppc_get_rate_from_fbctrs(struct cppc_perf_fb_ctrs fb_ctrs_t0,
+struct cppc_perf_fb_ctrs fb_ctrs_t1)
+{
+ u64 delta_reference, delta_delivered;
+ u64 reference_perf, ratio;
+
+ reference_perf = fb_ctrs_t0.reference_perf;
+ if (fb_ctrs_t1.reference > fb_ctrs_t0.reference)
+ delta_reference = fb_ctrs_t1.reference - fb_ctrs_t0.reference;
+ else /* Counters would have wrapped-around */
+ delta_reference = ((u64)(~((u64)0)) - fb_ctrs_t0.reference) +
+ fb_ctrs_t1.reference;
+
+ if (fb_ctrs_t1.delivered > fb_ctrs_t0.delivered)
+ delta_delivered = fb_ctrs_t1.delivered - fb_ctrs_t0.delivered;
+ else /* Counters would have wrapped-around */
+ delta_delivered = ((u64)(~((u64)0)) - fb_ctrs_t0.delivered) +
+ fb_ctrs_t1.delivered;
We need to check that the wraparound time is long enough to make sure that
the counters cannot wrap around more than once. We can register a get() api
only after checking that wraparound time value is reasonably high.
I am not aware of any platforms where wraparound time is soo short, but
wouldn't hurt to check once during init.
By design the wraparound time is a 64 bit counter, for that matter even
all the feedback counters too are 64 bit counters. I don't see any
chance in which the counters can wraparound twice in back to back reads.
The only situation is in which system itself is running at a really high
frequency. Even in that case today's spec is not sufficient to support
the same.
+
+ if (delta_reference) /* Check to avoid divide-by zero */
+ ratio = (delta_delivered * 1000) / delta_reference;
Why not just return the computed value here instead of *1000 and later /1000?
return (ref_per * delta_del) / delta_ref;
Yes.
+ else
+ return -EINVAL;
Instead of EINVAL, i think we should return current frequency.
Sorry, I didn't get you, How do you calculate the current frequency?
Did you mean reference performance?
The counters can pause if CPUs are in idle state during our sampling interval,
so
If the counters did not progress, it is reasonable to assume the delivered perf
was
equal to desired perf.
No, that is wrong. Here the check is for reference performance delta.
This counter can never pause. In case of cpuidle only the delivered
counters could pause. Delivered counters will pause only if the
particular core enters power down mode, Otherwise we would be still
clocking the core and we should be getting a delta across 2 sampling
periods. In case if the reference counter is paused which by design is
not correct then there is no point in returning reference performance
numbers. That too is wrong. In case the low level FW is not updating the
counters properly then it should be evident till Linux, instead of
returning a bogus frequency.
Even if platform wanted to limit, since the CPUs were asleep(idle) we could not
have
observed lower performance, so we will not throw off any logic that could be
driven
using the returned value.
+
+ return (reference_perf * ratio) / 1000;
This should be converted to KHz as cpufreq is not aware of CPPC abstract scale
In our platform all performance registers are implemented in KHz.
Because of which we never had an issue with conversion. I am not
aware whether ACPI mandates to use any particular unit. How is that
implemented in your platform? Just to avoid any extra conversion don't
you feel it is better to always report in KHz from firmware.
+}
+
+static unsigned int cppc_cpufreq_get_rate(unsigned int cpunum)
+{
+ struct cppc_perf_fb_ctrs f
Re: [PATCH] f2fs: let fstrim issue discard commands in lower priority
On 05/25, Chao Yu wrote:
> Hi Jaegeuk,
>
> On 2018/5/25 13:10, Jaegeuk Kim wrote:
> > The fstrim gathers huge number of large discard commands, and tries to issue
> > without IO awareness, which results in long user-perceive IO latencies on
> > READ, WRITE, and FLUSH in UFS. We've observed some of commands take several
> > seconds due to long discard latency.
> >
> > This patch limits the maximum size to 2MB per candidate, and check IO
> > congestion
> > when issuing them to disk.
> >
> > Signed-off-by: Jaegeuk Kim
> > ---
> > fs/f2fs/f2fs.h| 4 +-
> > fs/f2fs/segment.c | 123 +++---
> > 2 files changed, 64 insertions(+), 63 deletions(-)
> >
> > diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
> > index 3bddf13794d9..75ae7fc86ae8 100644
> > --- a/fs/f2fs/f2fs.h
> > +++ b/fs/f2fs/f2fs.h
> > @@ -178,6 +178,7 @@ enum {
> >
> > #define MAX_DISCARD_BLOCKS(sbi)BLKS_PER_SEC(sbi)
> > #define DEF_MAX_DISCARD_REQUEST8 /* issue 8 discards per
> > round */
> > +#define DEF_MAX_DISCARD_LEN512 /* Max. 2MB per discard
> > */
> > #define DEF_MIN_DISCARD_ISSUE_TIME 50 /* 50 ms, if exists */
> > #define DEF_MID_DISCARD_ISSUE_TIME 500 /* 500 ms, if device busy */
> > #define DEF_MAX_DISCARD_ISSUE_TIME 6 /* 60 s, if no candidates */
> > @@ -698,7 +699,8 @@ static inline void set_extent_info(struct extent_info
> > *ei, unsigned int fofs,
> > static inline bool __is_discard_mergeable(struct discard_info *back,
> > struct discard_info *front)
> > {
> > - return back->lstart + back->len == front->lstart;
> > + return (back->lstart + back->len == front->lstart) &&
> > + (back->len + front->len < DEF_MAX_DISCARD_LEN);
> > }
> >
> > static inline bool __is_discard_back_mergeable(struct discard_info *cur,
> > diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c
> > index 843fc2e6d41c..ba996d4091bc 100644
> > --- a/fs/f2fs/segment.c
> > +++ b/fs/f2fs/segment.c
> > @@ -1139,68 +1139,6 @@ static int __queue_discard_cmd(struct f2fs_sb_info
> > *sbi,
> > return 0;
> > }
> >
> > -static void __issue_discard_cmd_range(struct f2fs_sb_info *sbi,
> > - struct discard_policy *dpolicy,
> > - unsigned int start, unsigned int end)
> > -{
> > - struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info;
> > - struct discard_cmd *prev_dc = NULL, *next_dc = NULL;
> > - struct rb_node **insert_p = NULL, *insert_parent = NULL;
> > - struct discard_cmd *dc;
> > - struct blk_plug plug;
> > - int issued;
> > -
> > -next:
> > - issued = 0;
> > -
> > - mutex_lock(&dcc->cmd_lock);
> > - f2fs_bug_on(sbi, !__check_rb_tree_consistence(sbi, &dcc->root));
> > -
> > - dc = (struct discard_cmd *)__lookup_rb_tree_ret(&dcc->root,
> > - NULL, start,
> > - (struct rb_entry **)&prev_dc,
> > - (struct rb_entry **)&next_dc,
> > - &insert_p, &insert_parent, true);
> > - if (!dc)
> > - dc = next_dc;
> > -
> > - blk_start_plug(&plug);
> > -
> > - while (dc && dc->lstart <= end) {
> > - struct rb_node *node;
> > -
> > - if (dc->len < dpolicy->granularity)
> > - goto skip;
> > -
> > - if (dc->state != D_PREP) {
> > - list_move_tail(&dc->list, &dcc->fstrim_list);
> > - goto skip;
> > - }
> > -
> > - __submit_discard_cmd(sbi, dpolicy, dc);
> > -
> > - if (++issued >= dpolicy->max_requests) {
> > - start = dc->lstart + dc->len;
> > -
> > - blk_finish_plug(&plug);
> > - mutex_unlock(&dcc->cmd_lock);
> > -
> > - schedule();
> > -
> > - goto next;
> > - }
> > -skip:
> > - node = rb_next(&dc->rb_node);
> > - dc = rb_entry_safe(node, struct discard_cmd, rb_node);
> > -
> > - if (fatal_signal_pending(current))
> > - break;
> > - }
> > -
> > - blk_finish_plug(&plug);
> > - mutex_unlock(&dcc->cmd_lock);
> > -}
> > -
> > static int __issue_discard_cmd(struct f2fs_sb_info *sbi,
> > struct discard_policy *dpolicy)
> > {
> > @@ -2397,6 +2335,67 @@ bool exist_trim_candidates(struct f2fs_sb_info *sbi,
> > struct cp_control *cpc)
> > return has_candidate;
> > }
> >
> > +static void __issue_discard_cmd_range(struct f2fs_sb_info *sbi,
> > + struct discard_policy *dpolicy,
> > + unsigned int start, unsigned int end)
> > +{
> > + struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info;
> > + struct discard_cmd *prev_dc = NULL, *next_dc = NULL;
> > + struct rb_node **insert_p = NULL, *insert_parent =
[PATCH v8 11/12] ARM: dts: ipq8074: Add pcie nodes
The driver/phy support for ipq8074 is available now.
So enabling the nodes in DT.
Reviewed-by: Abhishek Sahu
Acked-by: Bjorn Andersson
Signed-off-by: Sricharan R
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 157 +-
1 file changed, 156 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index bd58ab4..1822698 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -24,7 +24,7 @@
ranges = <0 0 0 0x>;
compatible = "simple-bus";
- pinctrl@100 {
+ tlmm: pinctrl@100 {
compatible = "qcom,ipq8074-pinctrl";
reg = <0x100 0x30>;
interrupts = ;
@@ -278,6 +278,161 @@
pinctrl-names = "default";
status = "disabled";
};
+
+ pcie_phy0: phy@86000 {
+ compatible = "qcom,ipq8074-qmp-pcie-phy";
+ reg = <0x86000 0x1000>;
+ #phy-cells = <0>;
+ clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
+ clock-names = "pipe_clk";
+ clock-output-names = "pcie20_phy0_pipe_clk";
+
+ resets = <&gcc GCC_PCIE0_PHY_BCR>,
+ <&gcc GCC_PCIE0PHY_PHY_BCR>;
+ reset-names = "phy",
+ "common";
+ status = "disabled";
+ };
+
+ pcie0: pci@2000 {
+ compatible = "qcom,pcie-ipq8074";
+ reg = <0x2000 0xf1d
+ 0x2f20 0xa8
+ 0x8 0x2000
+ 0x2010 0x1000>;
+ reg-names = "dbi", "elbi", "parf", "config";
+ device_type = "pci";
+ linux,pci-domain = <0>;
+ bus-range = <0x00 0xff>;
+ num-lanes = <1>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ phys = <&pcie_phy0>;
+ phy-names = "pciephy";
+
+ ranges = <0x8100 0 0x2020 0x2020
+ 0 0x10 /* downstream I/O */
+ 0x8200 0 0x2030 0x2030
+ 0 0xd0>; /* non-prefetchable memory */
+
+ interrupts = ;
+ interrupt-names = "msi";
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0x7>;
+ interrupt-map = <0 0 0 1 &intc 0 75
+IRQ_TYPE_LEVEL_HIGH>, /* int_a */
+ <0 0 0 2 &intc 0 78
+IRQ_TYPE_LEVEL_HIGH>, /* int_b */
+ <0 0 0 3 &intc 0 79
+IRQ_TYPE_LEVEL_HIGH>, /* int_c */
+ <0 0 0 4 &intc 0 83
+IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+
+ clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>,
+<&gcc GCC_PCIE0_AXI_M_CLK>,
+<&gcc GCC_PCIE0_AXI_S_CLK>,
+<&gcc GCC_PCIE0_AHB_CLK>,
+<&gcc GCC_PCIE0_AUX_CLK>;
+
+ clock-names = "iface",
+ "axi_m",
+ "axi_s",
+ "ahb",
+ "aux";
+ resets = <&gcc GCC_PCIE0_PIPE_ARES>,
+<&gcc GCC_PCIE0_SLEEP_ARES>,
+<&gcc GCC_PCIE0_CORE_STICKY_ARES>,
+<&gcc GCC_PCIE0_AXI_MASTER_ARES>,
+<&gcc GCC_PCIE0_AXI_SLAVE_ARES>,
+<&gcc GCC_PCIE0_AHB_ARES>,
+<&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>;
+ reset-names = "pipe",
+ "sleep",
+ "sticky",
+ "axi_m",
+ "axi_s",
+ "ahb",
+ "axi_m_sticky";
+ status = "disabled";
+ };
+
+ pcie_phy1: phy@8e000 {
+ compatible = "qcom,ipq8074-qmp-pcie-phy";
+ reg = <0x8e000 0x1000>;
+ #phy-cells = <0>;
+
[PATCH v8 08/12] ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c1 board file
Reviewed-by: Abhishek Sahu
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts | 64 +
2 files changed, 65 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index c6cabec..596cce3 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -762,6 +762,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq4019-ap.dk01.1-c1.dtb \
qcom-ipq4019-ap.dk04.1-c1.dtb \
qcom-ipq4019-ap.dk04.1-c3.dtb \
+ qcom-ipq4019-ap.dk07.1-c1.dtb \
qcom-ipq8064-ap148.dtb \
qcom-msm8660-surf.dtb \
qcom-msm8960-cdp.dtb \
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
new file mode 100644
index 000..8c7ef65
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018, The Linux Foundation. All rights reserved.
+
+#include "qcom-ipq4019-ap.dk07.1.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1-C1";
+ compatible = "qcom,ipq4019-ap-dk07.1-c1";
+
+ soc {
+ pci@4000 {
+ status = "ok";
+ perst-gpio = <&tlmm 38 0x1>;
+ };
+
+ spi@78b6000 {
+ status = "ok";
+ };
+
+ pinctrl@100 {
+ serial_1_pins: serial1-pinmux {
+ pins = "gpio8", "gpio9",
+ "gpio10", "gpio11";
+ function = "blsp_uart1";
+ bias-disable;
+ };
+
+ spi_0_pins: spi-0-pinmux {
+ pinmux {
+ function = "blsp_spi0";
+ pins = "gpio13", "gpio14", "gpio15";
+ bias-disable;
+ };
+ pinmux_cs {
+ function = "gpio";
+ pins = "gpio12";
+ bias-disable;
+ output-high;
+ };
+ };
+ };
+
+ serial@78b {
+ pinctrl-0 = <&serial_1_pins>;
+ pinctrl-names = "default";
+ status = "ok";
+ };
+
+ spi@78b5000 {
+ pinctrl-0 = <&spi_0_pins>;
+ pinctrl-names = "default";
+ status = "ok";
+ cs-gpios = <&tlmm 12 0>;
+
+ m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ compatible = "n25q128a11";
+ spi-max-frequency = <2400>;
+ };
+ };
+ };
+};
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH v8 12/12] ARM: dts: ipq8074: Enable few peripherals for hk01 board
Reviewed-by: Abhishek Sahu
Acked-by: Bjorn Andersson
Signed-off-by: Sricharan R
---
arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 54 +++
1 file changed, 54 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
index 72c5b4a3..c13ddee 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
@@ -21,6 +21,7 @@
aliases {
serial0 = &blsp1_uart5;
+ serial1 = &blsp1_uart3;
};
chosen {
@@ -36,5 +37,58 @@
serial@78b3000 {
status = "ok";
};
+
+ spi@78b5000 {
+ status = "ok";
+
+ m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <5000>;
+ };
+ };
+
+ serial@78b1000 {
+status = "ok";
+ };
+
+ i2c@78b6000 {
+status = "ok";
+ };
+
+ dma@7984000 {
+status = "ok";
+ };
+
+ nand@79b {
+ status = "ok";
+
+ nand@0 {
+ reg = <0>;
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ nand-bus-width = <8>;
+ };
+ };
+
+ phy@86000 {
+ status = "ok";
+ };
+
+ phy@8e000 {
+ status = "ok";
+ };
+
+ pci@2000 {
+ status = "ok";
+ perst-gpio = <&tlmm 58 0x1>;
+ };
+
+ pci@1000 {
+ status = "ok";
+ perst-gpio = <&tlmm 61 0x1>;
+ };
};
};
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH v8 09/12] ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c2 board file
Reviewed-by: Abhishek Sahu
Acked-by: Bjorn Andersson
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts | 25 +
2 files changed, 26 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 596cce3..02b7f1d 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -763,6 +763,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq4019-ap.dk04.1-c1.dtb \
qcom-ipq4019-ap.dk04.1-c3.dtb \
qcom-ipq4019-ap.dk07.1-c1.dtb \
+ qcom-ipq4019-ap.dk07.1-c2.dtb \
qcom-ipq8064-ap148.dtb \
qcom-msm8660-surf.dtb \
qcom-msm8960-cdp.dtb \
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts
b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts
new file mode 100644
index 000..af7a902
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018, The Linux Foundation. All rights reserved.
+
+#include "qcom-ipq4019-ap.dk07.1.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1-C2";
+ compatible = "qcom,ipq4019-ap-dk07.1-c2";
+
+ soc {
+ pinctrl@100 {
+ serial_1_pins: serial1-pinmux {
+ pins = "gpio8", "gpio9";
+ function = "blsp_uart1";
+ bias-disable;
+ };
+ };
+
+ serial@78b {
+ pinctrl-0 = <&serial_1_pins>;
+ pinctrl-names = "default";
+ status = "ok";
+ };
+ };
+};
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
Re: [PATCH v10 12/16] vb2: add in-fence support to QBUF
Hello, On 5/21/18, Ezequiel Garcia wrote: > From: Gustavo Padovan > > Receive in-fence from userspace and add support for waiting on them > before queueing the buffer to the driver. Buffers can't be queued to the > driver before its fences signal. And a buffer can't be queued to the driver > out of the order they were queued from userspace. That means that even if > its fence signals it must wait for all other buffers, ahead of it in the > queue, > to signal first. > > If the fence for some buffer fails we do not queue it to the driver, > instead we mark it as error and wait until the previous buffer is done > to notify userspace of the error. We wait here to deliver the buffers back > to userspace in order. > > v13: - cleanup implementation. > - remove wrong Kconfig changes. > - print noisy warning on unexpected enqueue conditioin > - schedule a vb2_start_streaming work from the fence callback > > v12: fixed dvb_vb2.c usage of vb2_core_qbuf. > > v11: - minor doc/comments fixes (Hans Verkuil) > - reviewed the in-fence path at __fill_v4l2_buffer() > > v10: - rename fence to in_fence in many places > - handle fences signalling with error better (Hans Verkuil) > > v9: - improve comments and docs (Hans Verkuil) > - fix unlocking of vb->fence_cb_lock on vb2_core_qbuf (Hans Verkuil) > - move in-fences code that was in the out-fences patch here (Alex) > > v8: - improve comments about fences with errors > > v7: - get rid of the fence array stuff for ordering and just use > get_num_buffers_ready() (Hans) > - fix issue of queuing the buffer twice (Hans) > - avoid the dma_fence_wait() in core_qbuf() (Alex) > - merge preparation commit in > > v6: - With fences always keep the order userspace queues the buffers. > - Protect in_fence manipulation with a lock (Brian Starkey) > - check if fences have the same context before adding a fence array > - Fix last_fence ref unbalance in __set_in_fence() (Brian Starkey) > - Clean up fence if __set_in_fence() fails (Brian Starkey) > - treat -EINVAL from dma_fence_add_callback() (Brian Starkey) > > v5: - use fence_array to keep buffers ordered in vb2 core when > needed (Brian Starkey) > - keep backward compat on the reserved2 field (Brian Starkey) > - protect fence callback removal with lock (Brian Starkey) > > v4: - Add a comment about dma_fence_add_callback() not returning a > error (Hans) > - Call dma_fence_put(vb->in_fence) if fence signaled (Hans) > - select SYNC_FILE under config VIDEOBUF2_CORE (Hans) > - Move dma_fence_is_signaled() check to __enqueue_in_driver() (Hans) > - Remove list_for_each_entry() in __vb2_core_qbuf() (Hans) > - Remove if (vb->state != VB2_BUF_STATE_QUEUED) from > vb2_start_streaming() (Hans) > - set IN_FENCE flags on __fill_v4l2_buffer (Hans) > - Queue buffers to the driver as soon as they are ready (Hans) > - call fill_user_buffer() after queuing the buffer (Hans) > - add err: label to clean up fence > - add dma_fence_wait() before calling vb2_start_streaming() > > v3: - document fence parameter > - remove ternary if at vb2_qbuf() return (Mauro) > - do not change if conditions behaviour (Mauro) > > v2: - fix vb2_queue_or_prepare_buf() ret check > - remove check for VB2_MEMORY_DMABUF only (Javier) > - check num of ready buffers to start streaming > - when queueing, start from the first ready buffer > - handle queue cancel > > Signed-off-by: Gustavo Padovan > Signed-off-by: Ezequiel Garcia > --- > drivers/media/common/videobuf2/Kconfig | 1 + > drivers/media/common/videobuf2/videobuf2-core.c | 224 > > drivers/media/common/videobuf2/videobuf2-v4l2.c | 37 +++- > drivers/media/dvb-core/dvb_vb2.c| 2 +- > include/media/videobuf2-core.h | 19 +- > 5 files changed, 242 insertions(+), 41 deletions(-) > > diff --git a/drivers/media/common/videobuf2/Kconfig > b/drivers/media/common/videobuf2/Kconfig > index 17c32ea58395..27ad9e8a268b 100644 > --- a/drivers/media/common/videobuf2/Kconfig > +++ b/drivers/media/common/videobuf2/Kconfig > @@ -1,6 +1,7 @@ > # Used by drivers that need Videobuf2 modules > config VIDEOBUF2_CORE > select DMA_SHARED_BUFFER > + select SYNC_FILE > tristate > > config VIDEOBUF2_V4L2 > diff --git a/drivers/media/common/videobuf2/videobuf2-core.c > b/drivers/media/common/videobuf2/videobuf2-core.c > index a9a0a9d1decb..86b5ebe25263 100644 > --- a/drivers/media/common/videobuf2/videobuf2-core.c > +++ b/drivers/media/common/videobuf2/videobuf2-core.c > @@ -27,6 +27,7 @@ > #include > > #include > +#include > #include > > #include > @@ -189,6 +190,7 @@ module_param(debug, int, 0644); > > static void __vb2_queue_cancel(struct vb2_queue *q); > static void __enqueue_in_driver(struct vb2_buffer *vb); > +static void __qbuf_work(struct work_struct *work); > > static void __vb2_buffer_
[PATCH v8 10/12] ARM: dts: ipq8074: Add peripheral nodes
Add serial, i2c, bam, spi, qpic peripheral nodes.
While here, fix the PMU node's irq trigger to avoid
the boot warnings from GIC.
Reviewed-by: Abhishek Sahu
Signed-off-by: Sricharan R
---
arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 12 ---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 156 +-
2 files changed, 155 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
index 6a838b5..72c5b4a3 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
@@ -33,19 +33,7 @@
};
soc {
- pinctrl@100 {
- serial_4_pins: serial4_pinmux {
- mux {
- pins = "gpio23", "gpio24";
- function = "blsp4_uart1";
- bias-disable;
- };
- };
- };
-
serial@78b3000 {
- pinctrl-0 = <&serial_4_pins>;
- pinctrl-names = "default";
status = "ok";
};
};
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 2bc5dec..bd58ab4 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -32,6 +32,45 @@
#gpio-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x2>;
+
+ serial_4_pins: serial4-pinmux {
+ pins = "gpio23", "gpio24";
+ function = "blsp4_uart1";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ i2c_0_pins: i2c-0-pinmux {
+ pins = "gpio42", "gpio43";
+ function = "blsp1_i2c";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ spi_0_pins: spi-0-pins {
+ pins = "gpio38", "gpio39", "gpio40", "gpio41";
+ function = "blsp0_spi";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ hsuart_pins: hsuart-pins {
+ pins = "gpio46", "gpio47", "gpio48", "gpio49";
+ function = "blsp2_uart";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ qpic_pins: qpic-pins {
+ pins = "gpio1", "gpio3", "gpio4",
+ "gpio5", "gpio6", "gpio7",
+ "gpio8", "gpio10", "gpio11",
+ "gpio12", "gpio13", "gpio14",
+ "gpio15", "gpio16", "gpio17";
+ function = "qpic";
+ drive-strength = <8>;
+ bias-disable;
+ };
};
intc: interrupt-controller@b00 {
@@ -122,6 +161,121 @@
clocks = <&gcc GCC_BLSP1_UART5_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
+ pinctrl-0 = <&serial_4_pins>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ blsp_dma: dma@7884000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0x7884000 0x2b000>;
+ interrupts = ;
+ clocks = <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ };
+
+ blsp1_uart1: serial@78af000 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x78af000 0x200>;
+ interrupts = ;
+ clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
+<&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
+ blsp1_uart3: serial@78b1000 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x78b1000 0x200>;
+ interrupts = ;
+ clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>
[PATCH v8 05/12] ARM: dts: ipq4019: Add ipq4019-ap.dk04.1-c1 board file
Reviewed-by: Abhishek Sahu
Tested-by: Varadarajan Narayanan
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts | 19 +++
2 files changed, 20 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7e24249..4e15d0d 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -760,6 +760,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-apq8084-ifc6540.dtb \
qcom-apq8084-mtp.dtb \
qcom-ipq4019-ap.dk01.1-c1.dtb \
+ qcom-ipq4019-ap.dk04.1-c1.dtb \
qcom-ipq8064-ap148.dtb \
qcom-msm8660-surf.dtb \
qcom-msm8960-cdp.dtb \
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
new file mode 100644
index 000..7a96f30
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018, The Linux Foundation. All rights reserved.
+
+#include "qcom-ipq4019-ap.dk04.1.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1-C1";
+ compatible = "qcom,ipq4019-dk04.1-c1";
+
+ soc {
+ dma@7984000 {
+ status = "ok";
+ };
+
+ qpic-nand@79b {
+ status = "ok";
+ };
+ };
+};
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH v8 06/12] ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk04.1-c3 board file
Reviewed-by: Abhishek Sahu
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dts | 9 +
2 files changed, 10 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 4e15d0d..c6cabec 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -761,6 +761,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-apq8084-mtp.dtb \
qcom-ipq4019-ap.dk01.1-c1.dtb \
qcom-ipq4019-ap.dk04.1-c1.dtb \
+ qcom-ipq4019-ap.dk04.1-c3.dtb \
qcom-ipq8064-ap148.dtb \
qcom-msm8660-surf.dtb \
qcom-msm8960-cdp.dtb \
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dts
b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dts
new file mode 100644
index 000..2d1c4c6
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dts
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018, The Linux Foundation. All rights reserved.
+
+#include "qcom-ipq4019-ap.dk04.1.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1-C3";
+ compatible = "qcom,ipq4019-ap-dk04.1-c3";
+};
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH v8 07/12] ARM: dts: ipq4019: Add ipq4019-ap.dk07.1 common data
Add the common data for all dk07 based boards.
Reviewed-by: Abhishek Sahu
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi | 75 +++
1 file changed, 75 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi
b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi
new file mode 100644
index 000..9f1a5a66
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018, The Linux Foundation. All rights reserved.
+
+#include "qcom-ipq4019.dtsi"
+#include
+#include
+
+/ {
+ model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1";
+
+ memory {
+ device_type = "memory";
+ reg = <0x8000 0x2000>; /* 512MB */
+ };
+
+ aliases {
+ serial0 = &blsp1_uart1;
+ serial1 = &blsp1_uart2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ soc {
+ pinctrl@100 {
+ serial_0_pins: serial0-pinmux {
+ pins = "gpio16", "gpio17";
+ function = "blsp_uart0";
+ bias-disable;
+ };
+
+ i2c_0_pins: i2c-0-pinmux {
+ pins = "gpio20", "gpio21";
+ function = "blsp_i2c0";
+ bias-disable;
+ };
+
+ nand_pins: nand-pins {
+ pins = "gpio53", "gpio55", "gpio56",
+ "gpio57", "gpio58", "gpio59",
+ "gpio60", "gpio62", "gpio63",
+ "gpio64", "gpio65", "gpio66",
+ "gpio67", "gpio68", "gpio69";
+ function = "qpic";
+};
+ };
+
+ serial@78af000 {
+ pinctrl-0 = <&serial_0_pins>;
+ pinctrl-names = "default";
+ status = "ok";
+ };
+
+ dma@7884000 {
+ status = "ok";
+ };
+
+ i2c@78b7000 { /* BLSP1 QUP2 */
+ pinctrl-0 = <&i2c_0_pins>;
+ pinctrl-names = "default";
+ status = "ok";
+ };
+
+ dma@7984000 {
+ status = "ok";
+ };
+
+ qpic-nand@79b {
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+ status = "ok";
+ };
+ };
+};
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH v8 04/12] ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi
Add the common parts for the dk04 boards.
Reviewed-by: Abhishek Sahu
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 111 ++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +-
2 files changed, 112 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
new file mode 100644
index 000..7c1eb19
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018, The Linux Foundation. All rights reserved.
+
+#include "qcom-ipq4019.dtsi"
+#include
+#include
+
+/ {
+ model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
+
+ aliases {
+ serial0 = &blsp1_uart1;
+ serial1 = &blsp1_uart2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x8000 0x1000>; /* 256MB */
+ };
+
+ soc {
+ pinctrl@100 {
+ serial_0_pins: serial0-pinmux {
+ pins = "gpio16", "gpio17";
+ function = "blsp_uart0";
+ bias-disable;
+ };
+
+ serial_1_pins: serial1-pinmux {
+ pins = "gpio8", "gpio9",
+ "gpio10", "gpio11";
+ function = "blsp_uart1";
+ bias-disable;
+ };
+
+ spi_0_pins: spi-0-pinmux {
+ pinmux {
+ function = "blsp_spi0";
+ pins = "gpio13", "gpio14", "gpio15";
+ bias-disable;
+ };
+ pinmux_cs {
+ function = "gpio";
+ pins = "gpio12";
+ bias-disable;
+ output-high;
+ };
+ };
+
+ i2c_0_pins: i2c-0-pinmux {
+ pins = "gpio20", "gpio21";
+ function = "blsp_i2c0";
+ bias-disable;
+ };
+
+ nand_pins: nand-pins {
+ pins = "gpio53", "gpio55", "gpio56",
+ "gpio57", "gpio58", "gpio59",
+ "gpio60", "gpio62", "gpio63",
+ "gpio64", "gpio65", "gpio66",
+ "gpio67", "gpio68", "gpio69";
+ function = "qpic";
+ };
+ };
+
+ serial@78af000 {
+ pinctrl-0 = <&serial_0_pins>;
+ pinctrl-names = "default";
+ status = "ok";
+ };
+
+ serial@78b {
+ pinctrl-0 = <&serial_1_pins>;
+ pinctrl-names = "default";
+ status = "ok";
+ };
+
+ dma@7884000 {
+ status = "ok";
+ };
+
+ spi@78b5000 { /* BLSP1 QUP1 */
+ pinctrl-0 = <&spi_0_pins>;
+ pinctrl-names = "default";
+ status = "ok";
+ cs-gpios = <&tlmm 12 0>;
+
+ m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ compatible = "n25q128a11";
+ spi-max-frequency = <2400>;
+ };
+ };
+
+ pci@4000 {
+ status = "ok";
+ perst-gpio = <&tlmm 38 0x1>;
+ };
+
+ qpic-nand@79b {
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi
b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index ad61a55..7bcd763 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -323,7 +323,7 @@
dma-names = "rx", "tx";
};
- serial@78b {
+ blsp1_uart2: serial@78b {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
[PATCH v8 03/12] ARM: dts: ipq4019: Change the max opp frequency
The max opp frequency is 716MHZ. So update that. Reviewed-by: Abhishek Sahu Signed-off-by: Sricharan R --- arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index 737097e..ad61a55 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -63,7 +63,7 @@ 48000 110 20 110 50 110 - 666000 110 + 716000 110 >; clock-latency = <256000>; }; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
[PATCH v8 01/12] ARM: dts: ipq4019: Add a default chosen node
Add a 'chosen' node to select the serial console.
This is needed when bootloaders do not pass the
'console=' bootargs.
Acked-by: Bjorn Andersson
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 8
arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
index e413b21e..ef8d8c8 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -20,6 +20,14 @@
model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
compatible = "qcom,ipq4019";
+ aliases {
+ serial0 = &blsp1_uart1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
soc {
rng@22000 {
status = "ok";
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi
b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index b25daf3..2efc8a2 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -272,7 +272,7 @@
regulator;
};
- serial@78af000 {
+ blsp1_uart1: serial@78af000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x78af000 0x200>;
interrupts = <0 107 0>;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH v8 02/12] ARM: dts: ipq4019: Add a few peripheral nodes
Now with the driver updates for some peripherals being there,
add i2c, spi, pcie, bam, qpic-nand, scm nodes to enhance the available
peripheral support.
Reviewed-by: Abhishek Sahu
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 2 +-
arch/arm/boot/dts/qcom-ipq4019.dtsi | 156 --
2 files changed, 146 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
index ef8d8c8..418f9a0 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -69,7 +69,7 @@
status = "ok";
};
- spi_0: spi@78b5000 {
+ spi@78b5000 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "ok";
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi
b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index 2efc8a2..737097e 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -40,8 +40,10 @@
};
aliases {
- spi0 = &spi_0;
- i2c0 = &i2c_0;
+ spi0 = &blsp1_spi1;
+ spi1 = &blsp1_spi2;
+ i2c0 = &blsp1_i2c3;
+ i2c1 = &blsp1_i2c4;
};
cpus {
@@ -120,6 +122,12 @@
};
};
+ firmware {
+ scm {
+ compatible = "qcom,scm-ipq4019";
+ };
+ };
+
timer {
compatible = "arm,armv7-timer";
interrupts = <1 2 0xf08>,
@@ -165,13 +173,13 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- interrupts = <0 208 0>;
+ interrupts = ;
};
blsp_dma: dma@7884000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x07884000 0x23000>;
- interrupts = ;
+ interrupts = ;
clocks = <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
@@ -179,7 +187,7 @@
status = "disabled";
};
- spi_0: spi@78b5000 {
+ blsp1_spi1: spi@78b5000 { /* BLSP1 QUP1 */
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x78b5000 0x600>;
interrupts = ;
@@ -188,10 +196,26 @@
clock-names = "core", "iface";
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&blsp_dma 5>, <&blsp_dma 4>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ blsp1_spi2: spi@78b6000 { /* BLSP1 QUP2 */
+ compatible = "qcom,spi-qup-v2.2.1";
+ reg = <0x78b6000 0x600>;
+ interrupts = ;
+ clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ dmas = <&blsp_dma 7>, <&blsp_dma 6>;
+ dma-names = "rx", "tx";
status = "disabled";
};
- i2c_0: i2c@78b7000 {
+ blsp1_i2c3: i2c@78b7000 { /* BLSP1 QUP3 */
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x78b7000 0x600>;
interrupts = ;
@@ -200,14 +224,29 @@
clock-names = "iface", "core";
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&blsp_dma 9>, <&blsp_dma 8>;
+ dma-names = "rx", "tx";
status = "disabled";
};
+ blsp1_i2c4: i2c@78b8000 { /* BLSP1 QUP4 */
+ compatible = "qcom,i2c-qup-v2.2.1";
+ reg = <0x78b8000 0x600>;
+ interrupts = ;
+ clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+ clock-names = "iface", "core";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ dmas = <&blsp_dma 11>, <&blsp_dma 10>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
cryptobam: dma@8e04000 {
compatible = "qcom,
RE: [PATCH 4.4 00/92] 4.4.133-stable review
> -Original Message- > From: Rafael Tinoco [mailto:rafael.tin...@linaro.org] > > Thank you Daniel! Will investigate those. OK, thank you :). Notice that I did those tests on x86_64. It seems you are testing on arm, so there may be some differences. I just checked these tests on 4.4.133 (on x86_64): fcntl35: PASS fcntl35_64: PASS select04: PASS I am currently investigating other tests that are failing as well. They are not regressions, just some patches have not been backported yet. Thanks, Daniel > > Meanwhile, Greg, I referred to: > > time: Fix CLOCK_MONOTONIC_RAW sub-nanosecond accounting > > Since we're not using this type of clock on arm64's 4.4 kernel vdso > functions. This commit's description calls attention for it to be > responsible for fixing kselftest flacking tests, we wouldn't get that > on 4.4 according to bellow: > > stable-rc-linux-4.14.y > dbb236c1ceb6 arm64/vdso: Fix nsec handling for CLOCK_MONOTONIC_RAW > 49eea433b326 arm64: Add support for CLOCK_MONOTONIC_RAW in > clock_gettime() vDSO > 82e88ff1ea94 hrtimer: Revert CLOCK_MONOTONIC_RAW support > 9c808765e88e hrtimer: Add support for CLOCK_MONOTONIC_RAW > > stable-rc-linux-4.16.y > dbb236c1ceb6 arm64/vdso: Fix nsec handling for CLOCK_MONOTONIC_RAW > 49eea433b326 arm64: Add support for CLOCK_MONOTONIC_RAW in > clock_gettime() vDSO > 82e88ff1ea94 hrtimer: Revert CLOCK_MONOTONIC_RAW support > 9c808765e88e hrtimer: Add support for CLOCK_MONOTONIC_RAW > > stable-rc-linux-4.4.y > > > stable-rc-linux-4.9.y > 99f66b5182a4 arm64/vdso: Fix nsec handling for CLOCK_MONOTONIC_RAW > 49eea433b326 arm64: Add support for CLOCK_MONOTONIC_RAW in > clock_gettime() vDSO > 82e88ff1ea94 hrtimer: Revert CLOCK_MONOTONIC_RAW support > 9c808765e88e hrtimer: Add support for CLOCK_MONOTONIC_RAW > > Yet, the second fix was backported to all (including 4.4.y): > > stable-rc-linux-4.14.y > 3d88d56c5873 time: Fix CLOCK_MONOTONIC_RAW sub-nanosecond accounting > stable-rc-linux-4.16.y > 3d88d56c5873 time: Fix CLOCK_MONOTONIC_RAW sub-nanosecond accounting > stable-rc-linux-4.4.y > 7c8bd6e07430 time: Fix CLOCK_MONOTONIC_RAW sub-nanosecond accounting > stable-rc-linux-4.9.y > a53bfdda06ac time: Fix CLOCK_MONOTONIC_RAW sub-nanosecond accounting > > Not sure you want to keep it in 4.4, thought it was worth mentioning it. > > Cheers. > > On 24 May 2018 at 22:34, Daniel Sangorrin > wrote: > > Hello Rafael, > > > > The tests fcntl35 and fcntl35_64 should have go from FAIL to PASS. > > https://www.spinics.net/lists/stable/msg239475.html > > > > Looking at > > > https://qa-reports.linaro.org/lkft/linux-stable-rc-4.4-oe/build/v4.4.132-93-g915a > 3d7cdea9/testrun/228569/suite/ltp-syscalls-tests/tests/ > > I see that these two tests (and other important tests as well) are being > > SKIPPED. > > > > By the way, I see that select04 FAILS in your case. But in my setup, > > select04 was > working fine (x86_64) in 4.4.132. I will confirm that it still works in > 4.4.133 > > > > Thanks, > > Daniel Sangorrin > > > >> -Original Message- > >> From: stable-ow...@vger.kernel.org [mailto:stable-ow...@vger.kernel.org] > On > >> Behalf Of Rafael Tinoco > >> Sent: Friday, May 25, 2018 5:32 AM > >> To: Greg Kroah-Hartman > >> Cc: linux-kernel@vger.kernel.org; sh...@kernel.org; patc...@kernelci.org; > >> lkft-tri...@lists.linaro.org; ben.hutchi...@codethink.co.uk; > >> sta...@vger.kernel.org; a...@linux-foundation.org; > >> torva...@linux-foundation.org; li...@roeck-us.net > >> Subject: Re: [PATCH 4.4 00/92] 4.4.133-stable review > >> > >> > > kernel: 4.4.133-rc1 > >> > > git repo: > >> https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git > >> > > git branch: linux-4.4.y > >> > > git commit: 915a3d7cdea9daa9e9fb6b855f10c1312e6910c4 > >> > > git describe: v4.4.132-93-g915a3d7cdea9 > >> > > Test details: > >> > https://qa-reports.linaro.org/lkft/linux-stable-rc-4.4-oe/build/v4.4.132-93-g915a > >> 3d7cdea9 > >> > > > >> > > > >> > > No regressions (compared to build v4.4.132-71-g180635995c36) > >> > > >> > It should have gotten better, as there was a fix in here for at least 2 > >> > LTP tests that we previously were not passing. I don't know why you all > >> > were not reporting that in the past, it took someone else randomly > >> > deciding to run LTP to report it to me... > >> > > >> > Why did an improvement in results not show up? > >> > >> Are you referring to the CLOCK_MONOTONIC_RAW fix for the arm64 vDSO ? > >> I think that CLOCK_MONOTONIC_RAW in VDSO wasn't backported to 4.4.y > >> (commit 49eea433b326 in mainline) so this "fix" is changing the > >> timekeeping sauce (that would fix MONOTONIC RAW) but not for 4.4.y in > >> ARM64. Needs review though :\ > > > > > >
[PATCH v8 00/12] ARM: dts: ipq: updates to enable a few peripherals
All the patches have been tested on ipq4019 dk01, 04, 07 and ipq8074 hk01 boards for spi, bam, qup, qpic, spi-nor, serial, pci. [V8] * Rebased on top of Andy's for-next [V7] * Fixed Kbuild git bisectability issue [V6] * Fixed Bjorn's comments, added his acks that he gave, added Varada's acks * Rebased on top of Andy's for-next branch. [v5] * Fixed a minor comment that i missed earlier. * https://www.spinics.net/lists/arm-kernel/msg643071.html [v4] * Fixed more comments. * Dropped reserved-memory nodes from board files as that might break existing users whose u-boot do not specify the fdt_high accordingly. * Added chosen serial node for all boards to have the default serial console specified from DT. [v3] * Fixed minor comments from v2, https://www.spinics.net/lists/arm-kernel/msg641480.html * Added Abhishek's review tags [v2] * Addressed all comments from Abhishek * Removed dk01-c2 and dk04-c5 spinand based boards as support for spinand is not complete * Based all patches on top of Andy's for-next branch [V1] * https://www.spinics.net/lists/arm-kernel/msg631318.html Sricharan R (12): ARM: dts: ipq4019: Add a default chosen node ARM: dts: ipq4019: Add a few peripheral nodes ARM: dts: ipq4019: Change the max opp frequency ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi ARM: dts: ipq4019: Add ipq4019-ap.dk04.1-c1 board file ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk04.1-c3 board file ARM: dts: ipq4019: Add ipq4019-ap.dk07.1 common data ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c1 board file ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c2 board file ARM: dts: ipq8074: Add peripheral nodes ARM: dts: ipq8074: Add pcie nodes ARM: dts: ipq8074: Enable few peripherals for hk01 board arch/arm/boot/dts/Makefile | 4 + arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 10 +- arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts | 19 ++ arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dts | 9 + arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 111 + arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts | 64 + arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts | 25 ++ arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi | 75 ++ arch/arm/boot/dts/qcom-ipq4019.dtsi | 162 ++-- arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 62 - arch/arm64/boot/dts/qcom/ipq8074.dtsi | 313 +++- 11 files changed, 827 insertions(+), 27 deletions(-) create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dts create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Turris Omnia firmware possibilities [Was: Re: led: hw-trigger, global brightness and multi-colored leds]
Hello Tomas, On 05/25/2018 12:08 AM, Tomas Hlavacek wrote: > But I also have good news: The FW of the MCU is also OSS (see the repo > in the link (1)). There is a method for flashing the MCU over I2C from > Linux and there is JTAG connector for the MCU, in case un-bricking is > needed. Therefore the LED protocol can be changed to be more sensible > and/or it is even possible to emulate some existing HW LED driver chip > in Omnia MCU and reuse OSS driver for that chip. Yeah, I noticed, but when we start replacing the firmware, we'd need to detect somehow when a machine has an old (or only different) firmware. That would imply a versioning scheme and a generic way to read out the firmware version. (CMD_GET_FW_VERSION_BOOT is already a start, but this doesn't help me if I find an unknown hash.) So a CMD_GET_FW_SOMETHING that yields a version string that is similar to the soname of a library would be great. Talking about firmware, I wonder if there is firmware supported needed to solve https://wiki.debian.org/InstallingDebianOn/TurrisOmnia#Power_Management . Didn't look into that deeply yet and probably not high prio given that normally the Turris Omnia will just run 7x24h. Best regards Uwe signature.asc Description: OpenPGP digital signature
Re: [PATCH] f2fs: let fstrim issue discard commands in lower priority
Hi Jaegeuk,
On 2018/5/25 13:10, Jaegeuk Kim wrote:
> The fstrim gathers huge number of large discard commands, and tries to issue
> without IO awareness, which results in long user-perceive IO latencies on
> READ, WRITE, and FLUSH in UFS. We've observed some of commands take several
> seconds due to long discard latency.
>
> This patch limits the maximum size to 2MB per candidate, and check IO
> congestion
> when issuing them to disk.
>
> Signed-off-by: Jaegeuk Kim
> ---
> fs/f2fs/f2fs.h| 4 +-
> fs/f2fs/segment.c | 123 +++---
> 2 files changed, 64 insertions(+), 63 deletions(-)
>
> diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
> index 3bddf13794d9..75ae7fc86ae8 100644
> --- a/fs/f2fs/f2fs.h
> +++ b/fs/f2fs/f2fs.h
> @@ -178,6 +178,7 @@ enum {
>
> #define MAX_DISCARD_BLOCKS(sbi) BLKS_PER_SEC(sbi)
> #define DEF_MAX_DISCARD_REQUEST 8 /* issue 8 discards per
> round */
> +#define DEF_MAX_DISCARD_LEN 512 /* Max. 2MB per discard */
> #define DEF_MIN_DISCARD_ISSUE_TIME 50 /* 50 ms, if exists */
> #define DEF_MID_DISCARD_ISSUE_TIME 500 /* 500 ms, if device busy */
> #define DEF_MAX_DISCARD_ISSUE_TIME 6 /* 60 s, if no candidates */
> @@ -698,7 +699,8 @@ static inline void set_extent_info(struct extent_info
> *ei, unsigned int fofs,
> static inline bool __is_discard_mergeable(struct discard_info *back,
> struct discard_info *front)
> {
> - return back->lstart + back->len == front->lstart;
> + return (back->lstart + back->len == front->lstart) &&
> + (back->len + front->len < DEF_MAX_DISCARD_LEN);
> }
>
> static inline bool __is_discard_back_mergeable(struct discard_info *cur,
> diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c
> index 843fc2e6d41c..ba996d4091bc 100644
> --- a/fs/f2fs/segment.c
> +++ b/fs/f2fs/segment.c
> @@ -1139,68 +1139,6 @@ static int __queue_discard_cmd(struct f2fs_sb_info
> *sbi,
> return 0;
> }
>
> -static void __issue_discard_cmd_range(struct f2fs_sb_info *sbi,
> - struct discard_policy *dpolicy,
> - unsigned int start, unsigned int end)
> -{
> - struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info;
> - struct discard_cmd *prev_dc = NULL, *next_dc = NULL;
> - struct rb_node **insert_p = NULL, *insert_parent = NULL;
> - struct discard_cmd *dc;
> - struct blk_plug plug;
> - int issued;
> -
> -next:
> - issued = 0;
> -
> - mutex_lock(&dcc->cmd_lock);
> - f2fs_bug_on(sbi, !__check_rb_tree_consistence(sbi, &dcc->root));
> -
> - dc = (struct discard_cmd *)__lookup_rb_tree_ret(&dcc->root,
> - NULL, start,
> - (struct rb_entry **)&prev_dc,
> - (struct rb_entry **)&next_dc,
> - &insert_p, &insert_parent, true);
> - if (!dc)
> - dc = next_dc;
> -
> - blk_start_plug(&plug);
> -
> - while (dc && dc->lstart <= end) {
> - struct rb_node *node;
> -
> - if (dc->len < dpolicy->granularity)
> - goto skip;
> -
> - if (dc->state != D_PREP) {
> - list_move_tail(&dc->list, &dcc->fstrim_list);
> - goto skip;
> - }
> -
> - __submit_discard_cmd(sbi, dpolicy, dc);
> -
> - if (++issued >= dpolicy->max_requests) {
> - start = dc->lstart + dc->len;
> -
> - blk_finish_plug(&plug);
> - mutex_unlock(&dcc->cmd_lock);
> -
> - schedule();
> -
> - goto next;
> - }
> -skip:
> - node = rb_next(&dc->rb_node);
> - dc = rb_entry_safe(node, struct discard_cmd, rb_node);
> -
> - if (fatal_signal_pending(current))
> - break;
> - }
> -
> - blk_finish_plug(&plug);
> - mutex_unlock(&dcc->cmd_lock);
> -}
> -
> static int __issue_discard_cmd(struct f2fs_sb_info *sbi,
> struct discard_policy *dpolicy)
> {
> @@ -2397,6 +2335,67 @@ bool exist_trim_candidates(struct f2fs_sb_info *sbi,
> struct cp_control *cpc)
> return has_candidate;
> }
>
> +static void __issue_discard_cmd_range(struct f2fs_sb_info *sbi,
> + struct discard_policy *dpolicy,
> + unsigned int start, unsigned int end)
> +{
> + struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info;
> + struct discard_cmd *prev_dc = NULL, *next_dc = NULL;
> + struct rb_node **insert_p = NULL, *insert_parent = NULL;
> + struct discard_cmd *dc;
> + struct blk_plug plug;
> + int issued;
unsigned int cur = start;
> +
> +next:
> + issued = 0;
> +
> + mutex_lock(&
Re: [PATCH v4 3/3] powerpc/lib: optimise PPC32 memcmp
Le 24/05/2018 à 19:24, Segher Boessenkool a écrit : On Wed, May 23, 2018 at 09:47:32AM +0200, Christophe Leroy wrote: At the time being, memcmp() compares two chunks of memory byte per byte. This patch optimises the comparison by comparing word by word. A small benchmark performed on an 8xx comparing two chuncks of 512 bytes performed 10 times gives: Before : 5852274 TB ticks After: 1488638 TB ticks diff --git a/arch/powerpc/lib/string_32.S b/arch/powerpc/lib/string_32.S index 40a576d56ac7..542e6cecbcaf 100644 --- a/arch/powerpc/lib/string_32.S +++ b/arch/powerpc/lib/string_32.S @@ -16,17 +16,45 @@ .text _GLOBAL(memcmp) - cmpwi cr0, r5, 0 - beq-2f - mtctr r5 - addir6,r3,-1 - addir4,r4,-1 -1: lbzur3,1(r6) - lbzur0,1(r4) - subf. r3,r0,r3 - bdnzt 2,1b + srawi. r7, r5, 2 /* Divide len by 4 */ + mr r6, r3 + beq-3f + mtctr r7 + li r7, 0 +1: +#ifdef __LITTLE_ENDIAN__ + lwbrx r3, r6, r7 + lwbrx r0, r4, r7 +#else + lwzxr3, r6, r7 + lwzxr0, r4, r7 +#endif You don't test whether the pointers are word-aligned. Does that work? copy_tofrom_user() word-aligns the store address and doesn't take care of the load address, so I believe it works. Now, I just read in the MPC885 Ref Manual that unaligned access generates alignment exception when the processor is running in LE mode. Ref. made to the discussion on patch "powerpc/32be: use stmw/lmw for registers save/restore in asm" (https://patchwork.ozlabs.org/patch/899465/), I will drop the handling for LE mode. Christophe Say, when a load is crossing a page boundary, or segment boundary. Segher
Re: [PATCH V2 rdma-next 4/4] RDMA/hns: Fix the illegal memory operation when cross page
On 2018/5/25 5:40, Jason Gunthorpe wrote:
> On Wed, May 23, 2018 at 06:16:30PM +0800, Wei Hu (Xavier) wrote:
>> This patch fixed the potential illegal operation when using the
>> extend sge buffer cross page in post send operation. The bug
>> will cause the calltrace.
> Should include the oops for reference here..
OK, we will fix it in v3.
Thanks
>> Reported-by: Jie Chen
>> Reported-by: Xiping Zhang (Francis)
>> Fixes: b1c158350968("RDMA/hns: Get rid of virt_to_page and vmap calls after
>> dma_alloc_coherent")
>> Signed-off-by: Wei Hu (Xavier)
>>
>> v1->v2: Modify the Fixes statement according to Leon's comment.
>> drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 70
>> +-
>> drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 1 +
>> 2 files changed, 51 insertions(+), 20 deletions(-)
>>
>> diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
>> b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
>> index a70d07b..62c1eb5 100644
>> +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
>> @@ -52,6 +52,52 @@ static void set_data_seg_v2(struct
>> hns_roce_v2_wqe_data_seg *dseg,
>> dseg->len = cpu_to_le32(sg->length);
>> }
>>
>> +static void set_extend_sge(struct hns_roce_qp *qp, struct ib_send_wr *wr,
>> + unsigned int *sge_ind)
>> +{
>> +struct hns_roce_v2_wqe_data_seg *dseg;
>> +struct ib_sge *sg;
>> +int num_in_wqe = 0;
>> +int extend_sge_num;
>> +int fi_sge_num;
>> +int se_sge_num;
>> +int shift;
>> +int i;
>> +
>> +if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC)
>> +num_in_wqe = HNS_ROCE_V2_UC_RC_SGE_NUM_IN_WQE;
>> +extend_sge_num = wr->num_sge - num_in_wqe;
>> +sg = wr->sg_list + num_in_wqe;
>> +shift = qp->hr_buf.page_shift;
>> +
>> +/*
>> + * Check whether wr->num_sge sges are in the same page. If not, we
>> + * should calculate how many sges in the first page and the second
>> + * page.
>> + */
>> +dseg = get_send_extend_sge(qp, (*sge_ind) & (qp->sge.sge_cnt - 1));
>> +fi_sge_num = (u64)dseg >> shift) + 1) << shift) - (u64)dseg) /
>> + sizeof(struct hns_roce_v2_wqe_data_seg);
> desg is a pointer.. that u64 should be a uinptr_t
>
> And it is better written as
>
> (round_up((uintptr_t)dseg, 1 << shift) - (uintptr)desg)/sizeof(struct
> hns_roce_v2_wqe_data_seg)
>
> if I got it right..
Ok, we will fix it v3.
Thanks
Wei Hu
> Jason
>
> .
>
Re: [PATCH V2 rdma-next 3/4] RDMA/hns: Add reset process for RoCE in hip08
On 2018/5/25 5:31, Jason Gunthorpe wrote:
> On Wed, May 23, 2018 at 06:16:29PM +0800, Wei Hu (Xavier) wrote:
>> This patch added reset process for RoCE in hip08.
>>
>> Signed-off-by: Wei Hu (Xavier)
>>
>> v1->v2: 1.Delete handle->priv = NULL in hns_roce_hw_v2_uninit_instance.
>> 2.Add hns_roce_hw_v2_reset_notify_init callback function,
>>When RoCE reinit failed in this function, inform NIC driver.
>> The related link of Jason's commets:
>> https://www.spinics.net/lists/linux-rdma/msg65009.html
>> drivers/infiniband/hw/hns/hns_roce_cmd.c| 3 ++
>> drivers/infiniband/hw/hns/hns_roce_device.h | 2 +
>> drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 76
>> +
>> drivers/infiniband/hw/hns/hns_roce_main.c | 7 +++
>> 4 files changed, 88 insertions(+)
>>
>> diff --git a/drivers/infiniband/hw/hns/hns_roce_cmd.c
>> b/drivers/infiniband/hw/hns/hns_roce_cmd.c
>> index 9ebe839..a0ba19d 100644
>> +++ b/drivers/infiniband/hw/hns/hns_roce_cmd.c
>> @@ -176,6 +176,9 @@ int hns_roce_cmd_mbox(struct hns_roce_dev *hr_dev, u64
>> in_param, u64 out_param,
>>unsigned long in_modifier, u8 op_modifier, u16 op,
>>unsigned long timeout)
>> {
>> +if (hr_dev->is_reset)
>> +return 0;
>> +
>> if (hr_dev->cmd.use_events)
>> return hns_roce_cmd_mbox_wait(hr_dev, in_param, out_param,
>>in_modifier, op_modifier, op,
>> diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h
>> b/drivers/infiniband/hw/hns/hns_roce_device.h
>> index 412297d4..da8512b 100644
>> +++ b/drivers/infiniband/hw/hns/hns_roce_device.h
>> @@ -774,6 +774,8 @@ struct hns_roce_dev {
>> const char *irq_names[HNS_ROCE_MAX_IRQ_NUM];
>> spinlock_t sm_lock;
>> spinlock_t bt_cmd_lock;
>> +boolactive;
>> +boolis_reset;
>> struct hns_roce_ib_iboe iboe;
>>
>> struct list_headpgdir_list;
>> diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
>> b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
>> index e0ab672..a70d07b 100644
>> +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
>> @@ -768,6 +768,9 @@ static int hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
>> int ret = 0;
>> int ntc;
>>
>> +if (hr_dev->is_reset)
>> +return 0;
>> +
>> spin_lock_bh(&csq->lock);
>>
>> if (num > hns_roce_cmq_space(csq)) {
>> @@ -4790,14 +4793,87 @@ static void hns_roce_hw_v2_uninit_instance(struct
>> hnae3_handle *handle,
>> {
>> struct hns_roce_dev *hr_dev = (struct hns_roce_dev *)handle->priv;
>>
>> +if (!hr_dev)
>> +return;
>> +
>> hns_roce_exit(hr_dev);
>> kfree(hr_dev->priv);
>> ib_dealloc_device(&hr_dev->ib_dev);
>> }
>>
>> +static int hns_roce_hw_v2_reset_notify_down(struct hnae3_handle *handle)
>> +{
>> +struct hns_roce_dev *hr_dev = (struct hns_roce_dev *)handle->priv;
>> +struct ib_event event;
>> +
>> +if (!hr_dev) {
>> +dev_err(&handle->pdev->dev,
>> +"Input parameter handle->priv is NULL!\n");
>> +return -EINVAL;
>> +}
>> +
>> +hr_dev->active = false;
>> +hr_dev->is_reset = true;
>> +
>> +event.event = IB_EVENT_DEVICE_FATAL;
>> +event.device = &hr_dev->ib_dev;
>> +event.element.port_num = 1;
>> +ib_dispatch_event(&event);
>> +
>> +return 0;
>> +}
>> +
>> +static int hns_roce_hw_v2_reset_notify_init(struct hnae3_handle *handle)
>> +{
>> +int ret;
>> +
>> +ret = hns_roce_hw_v2_init_instance(handle);
>> +if (ret) {
>> +/* when reset notify type is HNAE3_INIT_CLIENT In reset notify
>> + * callback function, RoCE Engine reinitialize. If RoCE reinit
>> + * failed, we should inform NIC driver.
>> + */
>> +handle->priv = NULL;
>> +dev_err(&handle->pdev->dev,
>> +"In reset process RoCE reinit failed %d.\n", ret);
>> +}
>> +
>> +return ret;
>> +}
>> +
>> +static int hns_roce_hw_v2_reset_notify_uninit(struct hnae3_handle *handle)
>> +{
>> +msleep(100);
>> +hns_roce_hw_v2_uninit_instance(handle, false);
>> +return 0;
>> +}
>> +
>> +static int hns_roce_hw_v2_reset_notify(struct hnae3_handle *handle,
>> + enum hnae3_reset_notify_type type)
>> +{
>> +int ret = 0;
>> +
>> +switch (type) {
>> +case HNAE3_DOWN_CLIENT:
>> +ret = hns_roce_hw_v2_reset_notify_down(handle);
>> +break;
>> +case HNAE3_INIT_CLIENT:
>> +ret = hns_roce_hw_v2_reset_notify_init(handle);
>> +break;
>> +case HNAE3_UNINIT_CLIENT:
>> +ret = hns_roce_hw_v2_reset_notify_uninit(handle);
>> +break;
>> +default:
>> +break;
>> +}
>> +
>> +return ret;
>> +}
>> +
>> static const struct hnae3_client_ops hns_r
Re: [PATCH 4/9] regulator: bd71837: Devicetree bindings for BD71837 regulators
On Thu, May 24, 2018 at 06:57:21PM +0100, Mark Brown wrote:
> On Thu, May 24, 2018 at 05:30:57PM +, Vaittinen, Matti wrote:
> > > > On Thu, May 24, 2018 at 08:57:52AM +0300, Matti Vaittinen wrote:
> > >
> > > > +Required properties:
> > > > + - compatible: should be "rohm,bd71837-pmic".
> > > > + - regulator-name: should be "buck1", ..., "buck8" and "ldo1", ...,
> > > > "ldo7"
> > >
> > > The MFD is for a single device, there should be no need for compatibles
> > > on subfunctions.
> >
> > I will check this. I must admit I am not sure what is the de-facto mechanism
> > for assigning the correct device-tree nodes to sub devices if compatibles
> > are not used? I think I saw device-tree node name being used for regulators
>
> You can look at the regulators node within the parent device, you know
> that in Linux the parent device will be the MFD.
So I should parse the device-tree in MFD my driver in order to locate
the regulators node? Isn't that somewhat like code dublication? If we
rely on compatibles we can avoid device-tree parsing in MFD driver,
right? An in-tree example of this is:
Documentation/devicetree/bindings/regulator/sprd,sc2731-regulator.txt
>Required properties:
>- compatible: should be "sprd,sc27xx-regulator".
//snip
>Example:
> regulators {
> compatible = "sprd,sc27xx-regulator";
>
>vddarm0: BUCK_CPU0 {
> regulator-name = "vddarm0";
> regulator-min-microvolt = <40>;
drivers/mfd/sprd-sc27xx-spi.c
> static const struct mfd_cell sprd_pmic_devs[] = {
//snip
>}, {
>.name = "sc27xx-regulator",
>.of_compatible = "sprd,sc27xx-regulator",
>}, {
//snip
> };
and in probe just:
>ret = devm_mfd_add_devices(&spi->dev, PLATFORM_DEVID_AUTO,
> sprd_pmic_devs, ARRAY_SIZE(sprd_pmic_devs),
> NULL, 0,
> regmap_irq_get_domain(ddata->irq_data));
this looks clean to me and offloads the device-tree parsing completely
to generic code. Wouldn't that be simpler approach that looking up the
regulator node in MFD driver code? (I can do as you suggested but to me
the approach used in sprd-sc27xx-spi.c makes sense)
> > Also, another thing I was wondering is how supply regulators should be
> > handled? In this case the LDO5 is supplied by BUCK6 and LDO6 by
> > BUCK7.
>
> > From generic regulator bindings
> > /Documentation/devicetree/bindings/regulator/regulator.txt
> > I found statement:
>
> > > - -supply: phandle to the parent supply/regulator node
>
> None of that stuff uses compatible strings, just handle it as covered in
> the bindings.
Sorry. I have not been clear with my question. This part was unrelated
to compatible properties - I should have stated it in my previous mail.
What I meant is that I tried out adding
xxx-supply = <&buck6>;
in LDO5 device tree node and expected that the regulator core code would
take care of parsing this from device-tree and adding the supply
information to LDO5. This was not done and I did not fing parsing for
*-supply from drivers/regulator/of_regulator.c. So I was wondering if I
am missing something? I guess the *-supply properties in device-tree for
BD71837 regulators are now ignored. Should the supply parsing be added
in drivers/regulator/of_regulator.c - or have I simply misunderstood
something?
Anyways, I ended up hard coding:
.supply_name = "buck6"
in LDO5 regulator_desc before passing the desc to regulator_register().
This works but it means the buck6 name must be fixed to "buck6".
Br,
Matti Vaittinen
[git pull] drm fixes for v4.17-rc7
Hi Linus, Only two sets of drivers fixes, one rcar-du lvds regression fix, and a group of fixes for vmwgfx. Regards, Dave. The following changes since commit 771c577c23bac90597c685971d7297ea00f99d11: Linux 4.17-rc6 (2018-05-20 15:31:38 -0700) are available in the Git repository at: git://people.freedesktop.org/~airlied/linux tags/drm-fixes-for-v4.17-rc7 for you to fetch changes up to 4bc6f777952cf2d5b39e0c5a97a18caa743f03b7: Merge branch 'vmwgfx-fixes-4.17' of git://people.freedesktop.org/~thomash/linux into drm-fixes (2018-05-25 09:47:56 +1000) vmwgfx, rcar-du fixes Dave Airlie (2): Merge branch 'drm/du/fixes' of git://linuxtv.org/pinchartl/media into drm-fixes Merge branch 'vmwgfx-fixes-4.17' of git://people.freedesktop.org/~thomash/linux into drm-fixes Laurent Pinchart (1): drm: rcar-du: lvds: Fix crash in .atomic_check when disabling connector Thomas Hellstrom (3): drm/vmwgfx: Fix 32-bit VMW_PORT_HB_[IN|OUT] macros drm/vmwgfx: Fix host logging / guestinfo reading error paths drm/vmwgfx: Schedule an fb dirty update after resume drivers/gpu/drm/rcar-du/rcar_lvds.c | 3 +++ drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 5 drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 1 - drivers/gpu/drm/vmwgfx/vmwgfx_fb.c | 22 ++--- drivers/gpu/drm/vmwgfx/vmwgfx_msg.c | 48 - drivers/gpu/drm/vmwgfx/vmwgfx_msg.h | 25 --- 6 files changed, 58 insertions(+), 46 deletions(-)
[PATCH 0/6] arm64: dts: Add missing cooling device properties for CPUs
Hello, This fixes missing cooling device properties for CPUs for the ARM64 platforms. This is build tested by the zero day testing infrastructure as well. Individual maintainers can pick the patches to their SoC trees or I will ask ARM SoC maintainers to pick them up later. -- viresh Viresh Kumar (6): arm64: dts: amlogic: Add missing cooling device properties for CPUs arm64: dts: freescale: Add missing cooling device properties for CPUs arm64: dts: hisilicon: Add missing cooling device properties for CPUs arm64: dts: mediatek: Add missing cooling device properties for CPUs arm64: dts: rockchip: Add missing cooling device properties for CPUs arm64: dts: socionext: Add missing cooling device properties for CPUs .../boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 24 ++ arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 5 - arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 3 +++ arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 6 ++ arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 4 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 4 arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 16 ++- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 1 + arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 ++ arch/arm64/boot/dts/rockchip/rk3328.dtsi | 3 +++ arch/arm64/boot/dts/rockchip/rk3368.dtsi | 12 +++ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 8 ++-- arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 ++ 13 files changed, 86 insertions(+), 4 deletions(-) -- 2.15.0.194.g9af6a3dea062
[PATCH 5/6] arm64: dts: rockchip: Add missing cooling device properties for CPUs
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Do minor rearrangement as well to keep ordering consistent.
Signed-off-by: Viresh Kumar
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 3 +++
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 12
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 8 ++--
3 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index b8e9da15e00c..902a0907ad34 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -89,6 +89,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x1>;
clocks = <&cru ARMCLK>;
+ #cooling-cells = <2>;
dynamic-power-coefficient = <120>;
enable-method = "psci";
next-level-cache = <&l2>;
@@ -100,6 +101,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x2>;
clocks = <&cru ARMCLK>;
+ #cooling-cells = <2>;
dynamic-power-coefficient = <120>;
enable-method = "psci";
next-level-cache = <&l2>;
@@ -111,6 +113,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x3>;
clocks = <&cru ARMCLK>;
+ #cooling-cells = <2>;
dynamic-power-coefficient = <120>;
enable-method = "psci";
next-level-cache = <&l2>;
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index ad91ced78649..c32f2a551a1f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -122,6 +122,8 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
+
+ #cooling-cells = <2>; /* min followed by max */
};
cpu_l2: cpu@2 {
@@ -129,6 +131,8 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
+
+ #cooling-cells = <2>; /* min followed by max */
};
cpu_l3: cpu@3 {
@@ -136,6 +140,8 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
+
+ #cooling-cells = <2>; /* min followed by max */
};
cpu_b0: cpu@100 {
@@ -152,6 +158,8 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x101>;
enable-method = "psci";
+
+ #cooling-cells = <2>; /* min followed by max */
};
cpu_b2: cpu@102 {
@@ -159,6 +167,8 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x102>;
enable-method = "psci";
+
+ #cooling-cells = <2>; /* min followed by max */
};
cpu_b3: cpu@103 {
@@ -166,6 +176,8 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x103>;
enable-method = "psci";
+
+ #cooling-cells = <2>; /* min followed by max */
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index e0040b648f43..da935383a8f2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -108,8 +108,8 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
- #cooling-cells = <2>; /* min followed by max */
clocks = <&cru ARMCLKL>;
+ #cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <100>;
};
@@ -119,6 +119,7 @@
reg = <0x0 0x1>;
[PATCH 3/6] arm64: dts: hisilicon: Add missing cooling device properties for CPUs
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Do minor rearrangement as well to keep ordering consistent.
Signed-off-by: Viresh Kumar
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 586b281cd531..247024df714f 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -88,8 +88,8 @@
next-level-cache = <&CLUSTER0_L2>;
clocks = <&stub_clock 0>;
operating-points-v2 = <&cpu_opp_table>;
- #cooling-cells = <2>; /* min followed by max */
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ #cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <311>;
};
@@ -101,6 +101,8 @@
next-level-cache = <&CLUSTER0_L2>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ #cooling-cells = <2>; /* min followed by max */
+ dynamic-power-coefficient = <311>;
};
cpu2: cpu@2 {
@@ -111,6 +113,8 @@
next-level-cache = <&CLUSTER0_L2>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ #cooling-cells = <2>; /* min followed by max */
+ dynamic-power-coefficient = <311>;
};
cpu3: cpu@3 {
@@ -121,6 +125,8 @@
next-level-cache = <&CLUSTER0_L2>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ #cooling-cells = <2>; /* min followed by max */
+ dynamic-power-coefficient = <311>;
};
cpu4: cpu@100 {
@@ -131,6 +137,8 @@
next-level-cache = <&CLUSTER1_L2>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ #cooling-cells = <2>; /* min followed by max */
+ dynamic-power-coefficient = <311>;
};
cpu5: cpu@101 {
@@ -141,6 +149,8 @@
next-level-cache = <&CLUSTER1_L2>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ #cooling-cells = <2>; /* min followed by max */
+ dynamic-power-coefficient = <311>;
};
cpu6: cpu@102 {
@@ -151,6 +161,8 @@
next-level-cache = <&CLUSTER1_L2>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ #cooling-cells = <2>; /* min followed by max */
+ dynamic-power-coefficient = <311>;
};
cpu7: cpu@103 {
@@ -161,6 +173,8 @@
next-level-cache = <&CLUSTER1_L2>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
+ #cooling-cells = <2>; /* min followed by max */
+ dynamic-power-coefficient = <311>;
};
CLUSTER0_L2: l2-cache0 {
--
2.15.0.194.g9af6a3dea062
[PATCH 4/6] arm64: dts: mediatek: Add missing cooling device properties for CPUs
The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Signed-off-by: Viresh Kumar --- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 1 + arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 ++ 2 files changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi index 9213c966c224..d49fe125e770 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -89,6 +89,7 @@ <&apmixedsys CLK_APMIXED_MAIN_CORE_EN>; clock-names = "cpu", "intermediate"; operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; enable-method = "psci"; clock-frequency = <13>; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 94597e33c806..abd2f15a544b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -168,6 +168,7 @@ reg = <0x001>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; + #cooling-cells = <2>; clocks = <&infracfg CLK_INFRA_CA53SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; @@ -193,6 +194,7 @@ reg = <0x101>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; + #cooling-cells = <2>; clocks = <&infracfg CLK_INFRA_CA57SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; -- 2.15.0.194.g9af6a3dea062
[PATCH 1/6] arm64: dts: amlogic: Add missing cooling device properties for CPUs
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Signed-off-by: Viresh Kumar
---
.../boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 24 ++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
index 0868da476e41..313f88f8759e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
@@ -209,10 +209,34 @@
#cooling-cells = <2>;
};
+&cpu1 {
+ #cooling-cells = <2>;
+};
+
+&cpu2 {
+ #cooling-cells = <2>;
+};
+
+&cpu3 {
+ #cooling-cells = <2>;
+};
+
&cpu4 {
#cooling-cells = <2>;
};
+&cpu5 {
+ #cooling-cells = <2>;
+};
+
+&cpu6 {
+ #cooling-cells = <2>;
+};
+
+&cpu7 {
+ #cooling-cells = <2>;
+};
+
ðmac {
pinctrl-0 = <ð_pins>;
pinctrl-names = "default";
--
2.15.0.194.g9af6a3dea062
[PATCH 2/6] arm64: dts: freescale: Add missing cooling device properties for CPUs
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Do minor rearrangement as well to keep ordering consistent.
Signed-off-by: Viresh Kumar
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 5 -
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 3 +++
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 6 ++
arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 4
arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 4
5 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 1109f22bda5e..630ee47441f2 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -80,8 +80,8 @@
reg = <0x0>;
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
- #cooling-cells = <2>;
cpu-idle-states = <&CPU_PH20>;
+ #cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -91,6 +91,7 @@
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
cpu-idle-states = <&CPU_PH20>;
+ #cooling-cells = <2>;
};
cpu2: cpu@2 {
@@ -100,6 +101,7 @@
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
cpu-idle-states = <&CPU_PH20>;
+ #cooling-cells = <2>;
};
cpu3: cpu@3 {
@@ -109,6 +111,7 @@
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
cpu-idle-states = <&CPU_PH20>;
+ #cooling-cells = <2>;
};
l2: l2-cache {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 136ebfa9b333..ee7beab8bfae 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -87,6 +87,7 @@
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
cpu-idle-states = <&CPU_PH20>;
+ #cooling-cells = <2>;
};
cpu2: cpu@2 {
@@ -96,6 +97,7 @@
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
cpu-idle-states = <&CPU_PH20>;
+ #cooling-cells = <2>;
};
cpu3: cpu@3 {
@@ -105,6 +107,7 @@
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
cpu-idle-states = <&CPU_PH20>;
+ #cooling-cells = <2>;
};
l2: l2-cache {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 1c6556bcfddf..e64823a25158 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -76,6 +76,7 @@
reg = <0x1>;
clocks = <&clockgen 1 0>;
cpu-idle-states = <&CPU_PH20>;
+ #cooling-cells = <2>;
};
cpu2: cpu@2 {
@@ -84,6 +85,7 @@
reg = <0x2>;
clocks = <&clockgen 1 0>;
cpu-idle-states = <&CPU_PH20>;
+ #cooling-cells = <2>;
};
cpu3: cpu@3 {
@@ -92,6 +94,7 @@
reg = <0x3>;
clocks = <&clockgen 1 0>;
cpu-idle-states = <&CPU_PH20>;
+ #cooling-cells = <2>;
};
cpu4: cpu@100 {
@@ -109,6 +112,7 @@
reg = <0x101>;
clocks = <&clockgen 1 1>;
cpu-idle-states = <&CPU_PH20>;
+ #cooling-cells = <2>;
};
cpu6: cpu@102 {
@@ -117,6 +121,7 @@
reg = <0x102>;
clocks = <&clockgen 1 1>;
cpu-idle-states = <&CPU_PH20>;
+ #cooling-cells = <2>;
};
cpu7: cpu@103 {
@@ -125,6 +
Re: [PATCH v9 01/15] ARM: Add Krait L2 register accessor functions
Hi Bjorn,
On 5/24/2018 11:09 PM, Bjorn Andersson wrote:
> On Tue 06 Mar 06:38 PST 2018, Sricharan R wrote:
>
>> From: Stephen Boyd
>>
>> Krait CPUs have a handful of L2 cache controller registers that
>> live behind a cp15 based indirection register. First you program
>> the indirection register (l2cpselr) to point the L2 'window'
>> register (l2cpdr) at what you want to read/write. Then you
>> read/write the 'window' register to do what you want. The
>> l2cpselr register is not banked per-cpu so we must lock around
>> accesses to it to prevent other CPUs from re-pointing l2cpdr
>> underneath us.
>>
>> Cc: Mark Rutland
>> Cc: Russell King
>> Signed-off-by: Stephen Boyd
>
> This should have your signed-off-by here as well.
>
ok.
> Apart from that:
>
> Acked-by: Bjorn Andersson
>
Thanks.
Regards,
Sricharan
> Regards,
> Bjorn
>
>> ---
>> arch/arm/common/Kconfig | 3 ++
>> arch/arm/common/Makefile | 1 +
>> arch/arm/common/krait-l2-accessors.c | 48
>> +++
>> arch/arm/include/asm/krait-l2-accessors.h | 10 +++
>> 4 files changed, 62 insertions(+)
>> create mode 100644 arch/arm/common/krait-l2-accessors.c
>> create mode 100644 arch/arm/include/asm/krait-l2-accessors.h
>>
>> diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
>> index e5ad070..c8e1986 100644
>> --- a/arch/arm/common/Kconfig
>> +++ b/arch/arm/common/Kconfig
>> @@ -7,6 +7,9 @@ config DMABOUNCE
>> bool
>> select ZONE_DMA
>>
>> +config KRAIT_L2_ACCESSORS
>> +bool
>> +
>> config SHARP_LOCOMO
>> bool
>>
>> diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
>> index 70b4a14..eec6cd1 100644
>> --- a/arch/arm/common/Makefile
>> +++ b/arch/arm/common/Makefile
>> @@ -7,6 +7,7 @@ obj-y+= firmware.o
>>
>> obj-$(CONFIG_SA)+= sa.o
>> obj-$(CONFIG_DMABOUNCE) += dmabounce.o
>> +obj-$(CONFIG_KRAIT_L2_ACCESSORS) += krait-l2-accessors.o
>> obj-$(CONFIG_SHARP_LOCOMO) += locomo.o
>> obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o
>> obj-$(CONFIG_SHARP_SCOOP) += scoop.o
>> diff --git a/arch/arm/common/krait-l2-accessors.c
>> b/arch/arm/common/krait-l2-accessors.c
>> new file mode 100644
>> index 000..9a97dda
>> --- /dev/null
>> +++ b/arch/arm/common/krait-l2-accessors.c
>> @@ -0,0 +1,48 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +// Copyright (c) 2018, The Linux Foundation. All rights reserved.
>> +
>> +#include
>> +#include
>> +
>> +#include
>> +#include
>> +
>> +static DEFINE_RAW_SPINLOCK(krait_l2_lock);
>> +
>> +void krait_set_l2_indirect_reg(u32 addr, u32 val)
>> +{
>> +unsigned long flags;
>> +
>> +raw_spin_lock_irqsave(&krait_l2_lock, flags);
>> +/*
>> + * Select the L2 window by poking l2cpselr, then write to the window
>> + * via l2cpdr.
>> + */
>> +asm volatile ("mcr p15, 3, %0, c15, c0, 6 @ l2cpselr" : : "r" (addr));
>> +isb();
>> +asm volatile ("mcr p15, 3, %0, c15, c0, 7 @ l2cpdr" : : "r" (val));
>> +isb();
>> +
>> +raw_spin_unlock_irqrestore(&krait_l2_lock, flags);
>> +}
>> +EXPORT_SYMBOL(krait_set_l2_indirect_reg);
>> +
>> +u32 krait_get_l2_indirect_reg(u32 addr)
>> +{
>> +u32 val;
>> +unsigned long flags;
>> +
>> +raw_spin_lock_irqsave(&krait_l2_lock, flags);
>> +/*
>> + * Select the L2 window by poking l2cpselr, then read from the window
>> + * via l2cpdr.
>> + */
>> +asm volatile ("mcr p15, 3, %0, c15, c0, 6 @ l2cpselr" : : "r" (addr));
>> +isb();
>> +asm volatile ("mrc p15, 3, %0, c15, c0, 7 @ l2cpdr" : "=r" (val));
>> +
>> +raw_spin_unlock_irqrestore(&krait_l2_lock, flags);
>> +
>> +return val;
>> +}
>> +EXPORT_SYMBOL(krait_get_l2_indirect_reg);
>> diff --git a/arch/arm/include/asm/krait-l2-accessors.h
>> b/arch/arm/include/asm/krait-l2-accessors.h
>> new file mode 100644
>> index 000..dd7c474
>> --- /dev/null
>> +++ b/arch/arm/include/asm/krait-l2-accessors.h
>> @@ -0,0 +1,10 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +// Copyright (c) 2018, The Linux Foundation. All rights reserved.
>> +
>> +#ifndef __ASMARM_KRAIT_L2_ACCESSORS_H
>> +#define __ASMARM_KRAIT_L2_ACCESSORS_H
>> +
>> +extern void krait_set_l2_indirect_reg(u32 addr, u32 val);
>> +extern u32 krait_get_l2_indirect_reg(u32 addr);
>> +
>> +#endif
>> --
>> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
>> Code Aurora Forum, hosted by The Linux Foundation
>>
--
"QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of
Code Aurora Forum, hosted by The Linux Foundation
[PATCH 6/6] arm64: dts: socionext: Add missing cooling device properties for CPUs
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Signed-off-by: Viresh Kumar
---
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 3a5ed789c056..10ffb5019013 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -58,6 +58,7 @@
clocks = <&sys_clk 32>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
+ #cooling-cells = <2>;
};
cpu2: cpu@100 {
@@ -77,6 +78,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster1_opp>;
+ #cooling-cells = <2>;
};
};
--
2.15.0.194.g9af6a3dea062
Re: [PATCH v9 02/15] clk: mux: Split out register accessors for reuse
Hi Bjorn,
On 5/24/2018 10:20 PM, Bjorn Andersson wrote:
> On Tue 06 Mar 06:38 PST 2018, Sricharan R wrote:
>
>> From: Stephen Boyd
>>
>> We want to reuse the logic in clk-mux.c for other clock drivers
>> that don't use readl as register accessors. Fortunately, there
>> really isn't much to the mux code besides the table indirection
>> and quirk flags if you assume any bit shifting and masking has
>> been done already. Pull that logic out into reusable functions
>> that operate on an optional table and some flags so that other
>> drivers can use the same logic.
>>
>> [Sricharan: Rebased for mainline]
>> Signed-off-by: Sricharan R
>> Signed-off-by: Stephen Boyd
>
> This should read as a log, where the first entry is Stephen stating that
> he acquired or wrote the code and can release it according to the
> license requirements. Then you state that you acquired it, changed it
> and are releasing it according to the license requirements.
>
ok, will fix this to make it more clear.
>
> PS. Please expand your last name.
>
ok. Just that, all my previous patches has so far gone like this :-)
Regards,
Sricharan
> Regards,
> Bjorn
>
>> ---
>> drivers/clk/clk-mux.c | 74
>> +++
>> drivers/clk/nxp/clk-lpc32xx.c | 21 +++-
>> include/linux/clk-provider.h | 6
>> 3 files changed, 57 insertions(+), 44 deletions(-)
>>
>> diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
>> index 39cabe1..28223fa 100644
>> --- a/drivers/clk/clk-mux.c
>> +++ b/drivers/clk/clk-mux.c
>> @@ -26,35 +26,25 @@
>> * parent - parent is adjustable through clk_set_parent
>> */
>>
>> -static u8 clk_mux_get_parent(struct clk_hw *hw)
>> +unsigned int clk_mux_get_parent(struct clk_hw *hw, unsigned int val,
>> +unsigned int *table,
>> +unsigned long flags)
>> {
>> -struct clk_mux *mux = to_clk_mux(hw);
>> int num_parents = clk_hw_get_num_parents(hw);
>> -u32 val;
>> -
>> -/*
>> - * FIXME need a mux-specific flag to determine if val is bitwise or
>> numeric
>> - * e.g. sys_clkin_ck's clksel field is 3 bits wide, but ranges from 0x1
>> - * to 0x7 (index starts at one)
>> - * OTOH, pmd_trace_clk_mux_ck uses a separate bit for each clock, so
>> - * val = 0x4 really means "bit 2, index starts at bit 0"
>> - */
>> -val = clk_readl(mux->reg) >> mux->shift;
>> -val &= mux->mask;
>>
>> -if (mux->table) {
>> +if (table) {
>> int i;
>>
>> for (i = 0; i < num_parents; i++)
>> -if (mux->table[i] == val)
>> +if (table[i] == val)
>> return i;
>> return -EINVAL;
>> }
>>
>> -if (val && (mux->flags & CLK_MUX_INDEX_BIT))
>> +if (val && (flags & CLK_MUX_INDEX_BIT))
>> val = ffs(val) - 1;
>>
>> -if (val && (mux->flags & CLK_MUX_INDEX_ONE))
>> +if (val && (flags & CLK_MUX_INDEX_ONE))
>> val--;
>>
>> if (val >= num_parents)
>> @@ -62,23 +52,53 @@ static u8 clk_mux_get_parent(struct clk_hw *hw)
>>
>> return val;
>> }
>> +EXPORT_SYMBOL_GPL(clk_mux_get_parent);
>>
>> -static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
>> +static u8 _clk_mux_get_parent(struct clk_hw *hw)
>> {
>> struct clk_mux *mux = to_clk_mux(hw);
>> u32 val;
>> -unsigned long flags = 0;
>>
>> -if (mux->table) {
>> -index = mux->table[index];
>> +/*
>> + * FIXME need a mux-specific flag to determine if val is bitwise or
>> + * numeric e.g. sys_clkin_ck's clksel field is 3 bits wide,
>> + * but ranges from 0x1 to 0x7 (index starts at one)
>> + * OTOH, pmd_trace_clk_mux_ck uses a separate bit for each clock, so
>> + * val = 0x4 really means "bit 2, index starts at bit 0"
>> + */
>> +val = clk_readl(mux->reg) >> mux->shift;
>> +val &= mux->mask;
>> +
>> +return clk_mux_get_parent(hw, val, mux->table, mux->flags);
>> +}
>> +
>> +unsigned int clk_mux_reindex(u8 index, unsigned int *table,
>> + unsigned long flags)
>> +{
>> +unsigned int val = index;
>> +
>> +if (table) {
>> +val = table[val];
>> } else {
>> -if (mux->flags & CLK_MUX_INDEX_BIT)
>> -index = 1 << index;
>> +if (flags & CLK_MUX_INDEX_BIT)
>> +val = 1 << index;
>>
>> -if (mux->flags & CLK_MUX_INDEX_ONE)
>> -index++;
>> +if (flags & CLK_MUX_INDEX_ONE)
>> +val++;
>> }
>>
>> +return val;
>> +}
>> +EXPORT_SYMBOL_GPL(clk_mux_reindex);
>> +
>> +static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
>> +{
>> +struct clk_mux *mux = to_clk_mux(hw);
>> +u32 val;
>> +unsigned long flags = 0;
>> +
>> +index = clk_mux_reindex(index, mux->table, mux->flags);
>> +
>> if (mux->lock)
>>
Re: [PATCH v2] drm/xen-front: fix pointer casts
On 05/23/2018 02:46 PM, Juergen Gross wrote: On 23/05/18 13:36, Oleksandr Andrushchenko wrote: From: Oleksandr Andrushchenko Building for a 32-bit target results in warnings from casting between a 32-bit pointer and a 64-bit integer. Fix the warnings by casting those pointers to uintptr_t first. Signed-off-by: Oleksandr Andrushchenko Reviewed-by: Juergen Gross Thank you, applied to drm-misc-next Juergen
[PATCH] hwmon: binding: Fix "#cooling-cells" property's name
It should be "#cooling-cells" instead of "cooling-cells". Fix it. Signed-off-by: Viresh Kumar --- Documentation/devicetree/bindings/hwmon/gpio-fan.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/hwmon/gpio-fan.txt b/Documentation/devicetree/bindings/hwmon/gpio-fan.txt index 439a7430fc68..2becdcfdc840 100644 --- a/Documentation/devicetree/bindings/hwmon/gpio-fan.txt +++ b/Documentation/devicetree/bindings/hwmon/gpio-fan.txt @@ -11,7 +11,7 @@ Bindings for fan connected to GPIO lines must have the RPM values in ascending order. - alarm-gpios: This pin going active indicates something is wrong with the fan, and a udev event will be fired. -- cooling-cells: If used as a cooling device, must be <2> +- #cooling-cells: If used as a cooling device, must be <2> Also see: Documentation/devicetree/bindings/thermal/thermal.txt min and max states are derived from the speed-map of the fan. -- 2.15.0.194.g9af6a3dea062
[GIT PULL] sound fixes for 4.17-rc7
Linus,
please pull sound fixes for v4.17-rc7 from:
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
tags/sound-4.17-rc7
The topmost commit is 009f8c90f571d87855914dbc20e6c0ea2a3b19ae
sound fixes for 4.17-rc7
Two fixes:
- A timer pause event notification was garbled upon the recent
hardening work; corrected now
- HD-audio runtime PM regression fix due to the incorrect return
type
Ben Hutchings (1):
ALSA: timer: Fix pause event notification
Lukas Wunner (1):
ALSA: hda - Fix runtime PM
---
sound/core/timer.c| 4 ++--
sound/pci/hda/hda_local.h | 6 --
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/sound/core/timer.c b/sound/core/timer.c
index dc87728c5b74..0ddcae495838 100644
--- a/sound/core/timer.c
+++ b/sound/core/timer.c
@@ -592,7 +592,7 @@ static int snd_timer_stop1(struct snd_timer_instance
*timeri, bool stop)
else
timeri->flags |= SNDRV_TIMER_IFLG_PAUSED;
snd_timer_notify1(timeri, stop ? SNDRV_TIMER_EVENT_STOP :
- SNDRV_TIMER_EVENT_CONTINUE);
+ SNDRV_TIMER_EVENT_PAUSE);
unlock:
spin_unlock_irqrestore(&timer->lock, flags);
return result;
@@ -614,7 +614,7 @@ static int snd_timer_stop_slave(struct snd_timer_instance
*timeri, bool stop)
list_del_init(&timeri->ack_list);
list_del_init(&timeri->active_list);
snd_timer_notify1(timeri, stop ? SNDRV_TIMER_EVENT_STOP :
- SNDRV_TIMER_EVENT_CONTINUE);
+ SNDRV_TIMER_EVENT_PAUSE);
spin_unlock(&timeri->timer->lock);
}
spin_unlock_irqrestore(&slave_active_lock, flags);
diff --git a/sound/pci/hda/hda_local.h b/sound/pci/hda/hda_local.h
index 321e78baa63c..9bd935216c18 100644
--- a/sound/pci/hda/hda_local.h
+++ b/sound/pci/hda/hda_local.h
@@ -622,8 +622,10 @@ snd_hda_check_power_state(struct hda_codec *codec,
hda_nid_t nid,
{
return snd_hdac_check_power_state(&codec->core, nid, target_state);
}
-static inline bool snd_hda_sync_power_state(struct hda_codec *codec,
- hda_nid_t nid, unsigned int target_state)
+
+static inline unsigned int snd_hda_sync_power_state(struct hda_codec *codec,
+ hda_nid_t nid,
+ unsigned int target_state)
{
return snd_hdac_sync_power_state(&codec->core, nid, target_state);
}
Re: [RESEND PATCH v3 1/2] sched/deadline: Add cpudl_maximum_dl() for clean-up
On 2018-05-09 15:33, Byungchul Park wrote: On Thu, Jan 11, 2018 at 10:07:16AM +0100, Peter Zijlstra wrote: Sorry for the huge delay on this, but I'll have to postpone further. Still busy with meltdown/spectre stuff. Please consider this. Even though it's not a big bug, anyway leading mis-behavior in certain situaions. Could you see this patches, it's been too long since the start tho? -- Thanks, Byungchul
[PATCH] f2fs: let fstrim issue discard commands in lower priority
The fstrim gathers huge number of large discard commands, and tries to issue
without IO awareness, which results in long user-perceive IO latencies on
READ, WRITE, and FLUSH in UFS. We've observed some of commands take several
seconds due to long discard latency.
This patch limits the maximum size to 2MB per candidate, and check IO congestion
when issuing them to disk.
Signed-off-by: Jaegeuk Kim
---
fs/f2fs/f2fs.h| 4 +-
fs/f2fs/segment.c | 123 +++---
2 files changed, 64 insertions(+), 63 deletions(-)
diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index 3bddf13794d9..75ae7fc86ae8 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -178,6 +178,7 @@ enum {
#define MAX_DISCARD_BLOCKS(sbi)BLKS_PER_SEC(sbi)
#define DEF_MAX_DISCARD_REQUEST8 /* issue 8 discards per
round */
+#define DEF_MAX_DISCARD_LEN512 /* Max. 2MB per discard */
#define DEF_MIN_DISCARD_ISSUE_TIME 50 /* 50 ms, if exists */
#define DEF_MID_DISCARD_ISSUE_TIME 500 /* 500 ms, if device busy */
#define DEF_MAX_DISCARD_ISSUE_TIME 6 /* 60 s, if no candidates */
@@ -698,7 +699,8 @@ static inline void set_extent_info(struct extent_info *ei,
unsigned int fofs,
static inline bool __is_discard_mergeable(struct discard_info *back,
struct discard_info *front)
{
- return back->lstart + back->len == front->lstart;
+ return (back->lstart + back->len == front->lstart) &&
+ (back->len + front->len < DEF_MAX_DISCARD_LEN);
}
static inline bool __is_discard_back_mergeable(struct discard_info *cur,
diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c
index 843fc2e6d41c..ba996d4091bc 100644
--- a/fs/f2fs/segment.c
+++ b/fs/f2fs/segment.c
@@ -1139,68 +1139,6 @@ static int __queue_discard_cmd(struct f2fs_sb_info *sbi,
return 0;
}
-static void __issue_discard_cmd_range(struct f2fs_sb_info *sbi,
- struct discard_policy *dpolicy,
- unsigned int start, unsigned int end)
-{
- struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info;
- struct discard_cmd *prev_dc = NULL, *next_dc = NULL;
- struct rb_node **insert_p = NULL, *insert_parent = NULL;
- struct discard_cmd *dc;
- struct blk_plug plug;
- int issued;
-
-next:
- issued = 0;
-
- mutex_lock(&dcc->cmd_lock);
- f2fs_bug_on(sbi, !__check_rb_tree_consistence(sbi, &dcc->root));
-
- dc = (struct discard_cmd *)__lookup_rb_tree_ret(&dcc->root,
- NULL, start,
- (struct rb_entry **)&prev_dc,
- (struct rb_entry **)&next_dc,
- &insert_p, &insert_parent, true);
- if (!dc)
- dc = next_dc;
-
- blk_start_plug(&plug);
-
- while (dc && dc->lstart <= end) {
- struct rb_node *node;
-
- if (dc->len < dpolicy->granularity)
- goto skip;
-
- if (dc->state != D_PREP) {
- list_move_tail(&dc->list, &dcc->fstrim_list);
- goto skip;
- }
-
- __submit_discard_cmd(sbi, dpolicy, dc);
-
- if (++issued >= dpolicy->max_requests) {
- start = dc->lstart + dc->len;
-
- blk_finish_plug(&plug);
- mutex_unlock(&dcc->cmd_lock);
-
- schedule();
-
- goto next;
- }
-skip:
- node = rb_next(&dc->rb_node);
- dc = rb_entry_safe(node, struct discard_cmd, rb_node);
-
- if (fatal_signal_pending(current))
- break;
- }
-
- blk_finish_plug(&plug);
- mutex_unlock(&dcc->cmd_lock);
-}
-
static int __issue_discard_cmd(struct f2fs_sb_info *sbi,
struct discard_policy *dpolicy)
{
@@ -2397,6 +2335,67 @@ bool exist_trim_candidates(struct f2fs_sb_info *sbi,
struct cp_control *cpc)
return has_candidate;
}
+static void __issue_discard_cmd_range(struct f2fs_sb_info *sbi,
+ struct discard_policy *dpolicy,
+ unsigned int start, unsigned int end)
+{
+ struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info;
+ struct discard_cmd *prev_dc = NULL, *next_dc = NULL;
+ struct rb_node **insert_p = NULL, *insert_parent = NULL;
+ struct discard_cmd *dc;
+ struct blk_plug plug;
+ int issued;
+
+next:
+ issued = 0;
+
+ mutex_lock(&dcc->cmd_lock);
+ f2fs_bug_on(sbi, !__check_rb_tree_consistence(sbi, &dcc->root));
+
+ dc = (struct discard_cmd *)__lookup_rb_tree_ret(&dcc->root,
+ NULL, start,
+
Re: [PATCH 8/9] regulator: bd71837: BD71837 PMIC regulator driver
On Thu, May 24, 2018 at 06:59:40PM +0100, Mark Brown wrote: > On Thu, May 24, 2018 at 05:51:27PM +, Vaittinen, Matti wrote: > > > > what is the lock doing and what is this wrapper function intended to do? > > > This was the other spot which I was unsure how to handle. Datasheet for > > the chip says that if voltage is to be changed, the regulator must be > > disabled. Thus my voltage changing function checks if regulator is enabled > > Ugh, this chip is not very good is it? I am not the correct guy to judge that as I don't have too wide experience on PMICs. (This is first PMIC I have been working with). Probably this chip has some other advantages and is thus used. > Don't bounce the supply to > change the voltage silently, that's clearly a bad idea - the devices > using the supply are going to get very upset when the power gets removed > just because they changed the voltage. Instead implement a custom set > operation that returns an error if the user attempts to change the > voltage while the regualtor is enabled. Makes perfect sense. I will change the operation to this. Br, Matti Vaittinen
Re: [PATCH 1/7] fs: allow per-device dax status checking for filesystems
On Thu, May 24, 2018 at 08:55:12PM -0600, Ross Zwisler wrote:
> From: "Darrick J. Wong"
>
> Remove __bdev_dax_supported and change to bdev_dax_supported that takes a
> bdev parameter. This enables multi-device filesystems like xfs to check
> that a dax device can work for the particular filesystem. Once that's
> in place, actually fix all the parts of XFS where we need to be able to
> distinguish between datadev and rtdev.
>
> This patch fixes the problem where we screw up the dax support checking
> in xfs if the datadev and rtdev have different dax capabilities.
>
> Signed-off-by: Darrick J. Wong
> Signed-off-by: Ross Zwisler
Reviewed-by: Darr...oh, I'm not allowed to do that, am I?
Would you mind (re)sending this to the xfs list so that someone else can
review it?
--D
> ---
> drivers/dax/super.c | 30 +++---
> fs/ext2/super.c | 2 +-
> fs/ext4/super.c | 2 +-
> fs/xfs/xfs_ioctl.c | 3 ++-
> fs/xfs/xfs_iops.c | 30 +-
> fs/xfs/xfs_super.c | 10 --
> include/linux/dax.h | 10 +++---
> 7 files changed, 55 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/dax/super.c b/drivers/dax/super.c
> index 2b2332b605e4..9206539c8330 100644
> --- a/drivers/dax/super.c
> +++ b/drivers/dax/super.c
> @@ -73,8 +73,8 @@ EXPORT_SYMBOL_GPL(fs_dax_get_by_bdev);
> #endif
>
> /**
> - * __bdev_dax_supported() - Check if the device supports dax for filesystem
> - * @sb: The superblock of the device
> + * bdev_dax_supported() - Check if the device supports dax for filesystem
> + * @bdev: block device to check
> * @blocksize: The block size of the device
> *
> * This is a library function for filesystems to check if the block device
> @@ -82,33 +82,33 @@ EXPORT_SYMBOL_GPL(fs_dax_get_by_bdev);
> *
> * Return: negative errno if unsupported, 0 if supported.
> */
> -int __bdev_dax_supported(struct super_block *sb, int blocksize)
> +int bdev_dax_supported(struct block_device *bdev, int blocksize)
> {
> - struct block_device *bdev = sb->s_bdev;
> struct dax_device *dax_dev;
> pgoff_t pgoff;
> int err, id;
> void *kaddr;
> pfn_t pfn;
> long len;
> + char buf[BDEVNAME_SIZE];
>
> if (blocksize != PAGE_SIZE) {
> - pr_debug("VFS (%s): error: unsupported blocksize for dax\n",
> - sb->s_id);
> + pr_debug("%s: error: unsupported blocksize for dax\n",
> + bdevname(bdev, buf));
> return -EINVAL;
> }
>
> err = bdev_dax_pgoff(bdev, 0, PAGE_SIZE, &pgoff);
> if (err) {
> - pr_debug("VFS (%s): error: unaligned partition for dax\n",
> - sb->s_id);
> + pr_debug("%s: error: unaligned partition for dax\n",
> + bdevname(bdev, buf));
> return err;
> }
>
> dax_dev = dax_get_by_host(bdev->bd_disk->disk_name);
> if (!dax_dev) {
> - pr_debug("VFS (%s): error: device does not support dax\n",
> - sb->s_id);
> + pr_debug("%s: error: device does not support dax\n",
> + bdevname(bdev, buf));
> return -EOPNOTSUPP;
> }
>
> @@ -119,8 +119,8 @@ int __bdev_dax_supported(struct super_block *sb, int
> blocksize)
> put_dax(dax_dev);
>
> if (len < 1) {
> - pr_debug("VFS (%s): error: dax access failed (%ld)\n",
> - sb->s_id, len);
> + pr_debug("%s: error: dax access failed (%ld)\n",
> + bdevname(bdev, buf), len);
> return len < 0 ? len : -EIO;
> }
>
> @@ -137,14 +137,14 @@ int __bdev_dax_supported(struct super_block *sb, int
> blocksize)
> } else if (pfn_t_devmap(pfn)) {
> /* pass */;
> } else {
> - pr_debug("VFS (%s): error: dax support not enabled\n",
> - sb->s_id);
> + pr_debug("%s: error: dax support not enabled\n",
> + bdevname(bdev, buf));
> return -EOPNOTSUPP;
> }
>
> return 0;
> }
> -EXPORT_SYMBOL_GPL(__bdev_dax_supported);
> +EXPORT_SYMBOL_GPL(bdev_dax_supported);
> #endif
>
> enum dax_device_flags {
> diff --git a/fs/ext2/super.c b/fs/ext2/super.c
> index de1694512f1f..9627c3054b5c 100644
> --- a/fs/ext2/super.c
> +++ b/fs/ext2/super.c
> @@ -961,7 +961,7 @@ static int ext2_fill_super(struct super_block *sb, void
> *data, int silent)
> blocksize = BLOCK_SIZE << le32_to_cpu(sbi->s_es->s_log_block_size);
>
> if (sbi->s_mount_opt & EXT2_MOUNT_DAX) {
> - err = bdev_dax_supported(sb, blocksize);
> + err = bdev_dax_supported(sb->s_bdev, blocksize);
> if (err) {
> ext2_msg(sb, KERN_ERR,
> "DAX unsupported by block device. Turning of
Re: [PATCH 2/7] dax: change bdev_dax_supported() to support boolean returns
On Thu, May 24, 2018 at 08:55:13PM -0600, Ross Zwisler wrote:
> From: Dave Jiang
>
> The function return values are confusing with the way the function is
> named. We expect a true or false return value but it actually returns
> 0/-errno. This makes the code very confusing. Changing the return values
> to return a bool where if DAX is supported then return true and no DAX
> support returns false.
>
> Signed-off-by: Dave Jiang
> Signed-off-by: Ross Zwisler
Looks ok,
Reviewed-by: Darrick J. Wong
--D
> ---
> drivers/dax/super.c | 16
> fs/ext2/super.c | 3 +--
> fs/ext4/super.c | 3 +--
> fs/xfs/xfs_ioctl.c | 4 ++--
> fs/xfs/xfs_super.c | 12 ++--
> include/linux/dax.h | 6 +++---
> 6 files changed, 21 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/dax/super.c b/drivers/dax/super.c
> index 9206539c8330..e5447eddecf8 100644
> --- a/drivers/dax/super.c
> +++ b/drivers/dax/super.c
> @@ -80,9 +80,9 @@ EXPORT_SYMBOL_GPL(fs_dax_get_by_bdev);
> * This is a library function for filesystems to check if the block device
> * can be mounted with dax option.
> *
> - * Return: negative errno if unsupported, 0 if supported.
> + * Return: true if supported, false if unsupported
> */
> -int bdev_dax_supported(struct block_device *bdev, int blocksize)
> +bool bdev_dax_supported(struct block_device *bdev, int blocksize)
> {
> struct dax_device *dax_dev;
> pgoff_t pgoff;
> @@ -95,21 +95,21 @@ int bdev_dax_supported(struct block_device *bdev, int
> blocksize)
> if (blocksize != PAGE_SIZE) {
> pr_debug("%s: error: unsupported blocksize for dax\n",
> bdevname(bdev, buf));
> - return -EINVAL;
> + return false;
> }
>
> err = bdev_dax_pgoff(bdev, 0, PAGE_SIZE, &pgoff);
> if (err) {
> pr_debug("%s: error: unaligned partition for dax\n",
> bdevname(bdev, buf));
> - return err;
> + return false;
> }
>
> dax_dev = dax_get_by_host(bdev->bd_disk->disk_name);
> if (!dax_dev) {
> pr_debug("%s: error: device does not support dax\n",
> bdevname(bdev, buf));
> - return -EOPNOTSUPP;
> + return false;
> }
>
> id = dax_read_lock();
> @@ -121,7 +121,7 @@ int bdev_dax_supported(struct block_device *bdev, int
> blocksize)
> if (len < 1) {
> pr_debug("%s: error: dax access failed (%ld)\n",
> bdevname(bdev, buf), len);
> - return len < 0 ? len : -EIO;
> + return false;
> }
>
> if (IS_ENABLED(CONFIG_FS_DAX_LIMITED) && pfn_t_special(pfn)) {
> @@ -139,10 +139,10 @@ int bdev_dax_supported(struct block_device *bdev, int
> blocksize)
> } else {
> pr_debug("%s: error: dax support not enabled\n",
> bdevname(bdev, buf));
> - return -EOPNOTSUPP;
> + return false;
> }
>
> - return 0;
> + return true;
> }
> EXPORT_SYMBOL_GPL(bdev_dax_supported);
> #endif
> diff --git a/fs/ext2/super.c b/fs/ext2/super.c
> index 9627c3054b5c..c09289a42dc5 100644
> --- a/fs/ext2/super.c
> +++ b/fs/ext2/super.c
> @@ -961,8 +961,7 @@ static int ext2_fill_super(struct super_block *sb, void
> *data, int silent)
> blocksize = BLOCK_SIZE << le32_to_cpu(sbi->s_es->s_log_block_size);
>
> if (sbi->s_mount_opt & EXT2_MOUNT_DAX) {
> - err = bdev_dax_supported(sb->s_bdev, blocksize);
> - if (err) {
> + if (!bdev_dax_supported(sb->s_bdev, blocksize)) {
> ext2_msg(sb, KERN_ERR,
> "DAX unsupported by block device. Turning off
> DAX.");
> sbi->s_mount_opt &= ~EXT2_MOUNT_DAX;
> diff --git a/fs/ext4/super.c b/fs/ext4/super.c
> index 089170e99895..2e1622907f4a 100644
> --- a/fs/ext4/super.c
> +++ b/fs/ext4/super.c
> @@ -3732,8 +3732,7 @@ static int ext4_fill_super(struct super_block *sb, void
> *data, int silent)
> " that may contain inline data");
> sbi->s_mount_opt &= ~EXT4_MOUNT_DAX;
> }
> - err = bdev_dax_supported(sb->s_bdev, blocksize);
> - if (err) {
> + if (!bdev_dax_supported(sb->s_bdev, blocksize)) {
> ext4_msg(sb, KERN_ERR,
> "DAX unsupported by block device. Turning off
> DAX.");
> sbi->s_mount_opt &= ~EXT4_MOUNT_DAX;
> diff --git a/fs/xfs/xfs_ioctl.c b/fs/xfs/xfs_ioctl.c
> index 0effd46b965f..2c70a0a4f59f 100644
> --- a/fs/xfs/xfs_ioctl.c
> +++ b/fs/xfs/xfs_ioctl.c
> @@ -1103,8 +1103,8 @@ xfs_ioctl_setattr_dax_invalidate(
> if (fa->fsx_xflags & FS_XFLAG_DAX) {
> if (!(S_ISREG(inode->i_mode) || S_ISDIR(inode->i_mode)))
> ret
Re: [PATCH v2 5/5] MAINTAINERS: Add Actions Semi S900 pinctrl entries
Hi Andreas, On Fri, May 25, 2018 at 06:12:00AM +0200, Andreas Färber wrote: > Am 23.05.2018 um 10:40 schrieb Linus Walleij: > > On Sun, May 20, 2018 at 7:17 AM, Manivannan Sadhasivam > > wrote: > > > >> Add S900 pinctrl entries under ARCH_ACTIONS > >> > >> Signed-off-by: Manivannan Sadhasivam > > > > Patch applied tentatively so we have some maintenance entry for this. > > > > Andreas expressed concerns about the driver earlier, so he might want it > > split from the platform parts and have a separate entry for the pinctrl+GPIO > > so Manivannan can maintain that part, also it makes sense to list > > Manivannan as comaintainer of ARCH_ACTIONS with this in. > > > > Andreas: how would you like to proceed? > > > > I understand that I was a bit pushy or even rude in my last message > > about the maintenance of this platform and the code structure of > > the pin control driver. I am sorry if it caused any bad feelings on your > > side :( social conflicts give me the creeps, I just try my best. Maybe > > my best isn't always what it should be. > > I fail to understand how splitting the MAINTAINERS section is going to > help with the pinctrl conflict at hand? The problem is that instead of > refactoring my S500 pinctrl driver to his liking, Mani has submitted a > competing S900 pinctrl driver that you went on to merge. The human > aspect is that merging his driver took the credit away from me having > written the earlier pinctrl driver (based on my rtd1295 pinctrl driver). > The practical aspect is that I can't drop my pinctrl driver from my work > branch until there is equivalent functionality in the merged driver. I > am lacking the time to rewrite S500 pin definitions on top of Mani's > myself at this time, and I haven't seen S500 patches from him yet. > I think we discussed this few more times before and I clearly mentioned this pinctrl driver confilct in my old pinctrl series cover letter. If you had submitted your pinctrl driver then Linus would had the option of picking up the most robust one. But sadly you didn't had any time to complete and submit yours and since there was only one pinctrl driver floating for Actions, Linus went and merged mine. Regarding the S500/S700 support, again I told you that my goal is to set up the base driver for Actions OWL series SoC first and then adding support for every other SoC's of the same family later. Now, I have succeeded in setting up the clock, pinctrl and gpio drivers, so I can now work on extending support for other SoC's as well. FYI, I have ordered S700 based Cubieboard and will work on adding support for that first. I still don't have access to S500 board yet since it is not available on my region. Will find a way to get this asap. > Also I had been investing efforts in explaining the upstreaming process > to Actions, last in November. I see Thomas Liau and Jeff Chen missing in > CC and I have not seen any Reviewed-by or Acked-by from anyone at > Actions on this and the preceding series. There are more chips than the > one on Linaro's 96board, so I would prefer to assure that the design > works for all. Thus I am very critical of you applying the patches > without waiting for review by Actions. > I don't think Actions would be interested in any upstreaming efforts. It is our (comunity) responsibility to add support for that in order to have our boards running mainline kernel and that's what we both have been doing. Moreover I only saw once David Liau responded to your patchset and there isn't much further. So how can you expect the subsystem maintainer's to hold the patch series waiting for a so far silent SoC manufacturer's response? We should get move on and since my drivers are completely tested, we can work on adding more SoC support later. And if something breaks on other SoC platform, we can always modify the base driver accordingly. > Other aspects are: The reason I wrote the pinctrl driver is that I > experienced a UART TX issue on the Sparky board and was hoping a pinctrl > driver might resolve that, but it didn't. So I still have a mix of > boards where some are working and some are pretty unusable, without any > clues on why. > > That said, I don't object to having a separate MAINTAINERS section for > the pinctrl driver(s) as long as I still get CC'ed on changes. We have > wanted to add Mani as R for Actions overall, so that would probably mean > adding me as R to an Actions pinctrl section, to avoid syncing the paths > between two sections. I had previously felt that it does not make sense > to list Mani as co-maintainer (M) for Actions overall since he can't tag > and submit from my repo. And for the record I have offered him to take > over which he didn't want to. I still hope to find some more time to > review and queue his SPS patches, a driver that I have designed and thus > understand and am much happier about the incremental additions there. > Yes I agree that you offered me to take the Maintainership once through IRC co
[PATCH v1] arch/x86/kernel/pci-dma: Remove useless parameter of arch_dma_alloc_attrs
From: Huaisheng Ye
arch_dma_alloc_attrs has parameter gfp which is not used at all.
Remove it.
Signed-off-by: Huaisheng Ye
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: "H. Peter Anvin"
Cc: Christoph Hellwig
Cc: Marek Szyprowski
Cc: Robin Murphy
Cc: Konrad Rzeszutek Wilk
Cc: Andrew Morton
Cc: Greg Kroah-Hartman
Cc: Tom Lendacky
Cc: Kate Stewart
Cc: Randy Dunlap
Cc: Michal Hocko
---
arch/x86/include/asm/dma-mapping.h | 2 +-
arch/x86/kernel/pci-dma.c | 2 +-
include/linux/dma-mapping.h| 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/dma-mapping.h
b/arch/x86/include/asm/dma-mapping.h
index 89ce4bf..ef59747 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -33,7 +33,7 @@ static inline const struct dma_map_ops
*get_arch_dma_ops(struct bus_type *bus)
int arch_dma_supported(struct device *dev, u64 mask);
#define arch_dma_supported arch_dma_supported
-bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp);
+bool arch_dma_alloc_attrs(struct device **dev);
#define arch_dma_alloc_attrs arch_dma_alloc_attrs
#endif
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 77625b6..94d1a49 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -76,7 +76,7 @@ void __init pci_iommu_alloc(void)
}
}
-bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp)
+bool arch_dma_alloc_attrs(struct device **dev)
{
if (!*dev)
*dev = &x86_dma_fallback_dev;
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index f8ab1c0..c80bb09 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
@@ -502,7 +502,7 @@ void *dma_common_pages_remap(struct page **pages, size_t
size,
#define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0)
#ifndef arch_dma_alloc_attrs
-#define arch_dma_alloc_attrs(dev, flag)(true)
+#define arch_dma_alloc_attrs(dev) (true)
#endif
static inline void *dma_alloc_attrs(struct device *dev, size_t size,
@@ -521,7 +521,7 @@ static inline void *dma_alloc_attrs(struct device *dev,
size_t size,
/* let the implementation decide on the zone to allocate from: */
flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
- if (!arch_dma_alloc_attrs(&dev, &flag))
+ if (!arch_dma_alloc_attrs(&dev))
return NULL;
if (!ops->alloc)
return NULL;
--
1.8.3.1
Re: [PATCH v3 8/8] drm/mediatek: add third ddp path
Hi, Stu: On Fri, 2018-05-25 at 10:34 +0800, stu.hs...@mediatek.com wrote: > From: Stu Hsieh > > This patch create third crtc by third ddp path > Apply this patch before the patch 'Add support for mediatek SOC MT2712' because this patch is necessary for mt2712. > Signed-off-by: Stu Hsieh > --- > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c > b/drivers/gpu/drm/mediatek/mtk_drm_drv.c > index b32c4cc8d051..3a866e1d6af4 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c > @@ -267,6 +267,11 @@ static int mtk_drm_kms_init(struct drm_device *drm) > if (ret < 0) > goto err_component_unbind; > > + ret = mtk_drm_crtc_create(drm, private->data->third_path, > + private->data->third_len); I think you should prevent doing this for mt8173 and mt2701 because that two SoC has only two ddp path. Regards, CK > + if (ret < 0) > + goto err_component_unbind; > + > /* Use OVL device for all DMA memory allocations */ > np = private->comp_node[private->data->main_path[0]] ?: >private->comp_node[private->data->ext_path[0]];
Re: [PATCH] kdump: add default crashkernel reserve kernel config options
V Thu, 24 May 2018 11:34:05 -0500 ebied...@xmission.com (Eric W. Biederman) napsáno: > Petr Tesarik writes: > > 2> On Thu, 24 May 2018 09:49:05 +0800 > > Dave Young wrote: > > > >> Hi Petr, > >> > >> On 05/23/18 at 10:22pm, Petr Tesarik wrote: > >>[...] > >> > In short, if one size fits none, what good is it to hardcode that "one > >> > size" into the kernel image? > >> > >> I agreed with all the things that we can not know the exact memory > >> requirement for 100% use cases. But that does not means this is useless > >> it is still useful for common use cases of no special and memory hog > >> requirements as I mentioned in another reply it can simplify the kdump > >> deployment for those people who do not need the special setup. > > > > I still tend to disagree. This "common-case" reservation depends on > > things that are defined by user space. It surely does not make it > > easier to build a distribution kernel. Today, I get bug reports that > > the number calculated and added to the boot loader configuration by the > > installer is inaccurate. If I put a fixed number into a kernel config > > option, I will start getting bugs that this number is incorrect (for > > some systems). > > > >> For example, if this is a workstation I just want to break into a shell > >> to collect some panic info, then I just need a very minimal initrd, then > >> the Kconfig will work just fine. > > > > What is "a very minimal initrd"? Last time I had to make a significant > > adjustment to the estimation for openSUSE, this was caused by growing > > user-space requirements (systemd in this case, but I don't want to > > start flamewars on that topic, please). > > > > Anyway, if you want to improve the "common case", then look how IBM > > tries to solve it for firmware-assisted dump (fadump) on powerpc: > > > > https://patchwork.ozlabs.org/patch/905026/ > > > > The main idea is: > > > >> Instead of setting aside a significant chunk of memory nobody can use, > >> [...] reserve a significant chunk of memory that the kernel is prevented > >> from using [...], but applications are free to use it. > > > > That works great, because user space pages are filtered out in the > > common case, so they can be used freely by the panic kernel. > > They absolutely can not be used in the kdump case. > > The kdump requirement is that they are pages no-one initiates any I/O > to. To avoid the problem of devices doing DMA as the new kernel starts > and runs. Good point. This means that memory reserved for this purpose would also have to be excluded from allocations that may be eventually used for DMA transfers. > Secondarily to avoid problems with cpus that refused to halt. Let's face it - if some CPUs refused to halt, all bets are off. The code running on such a CPU can break many other things besides memory, most importantly, it may meddle with the HW registers of crucial devices in the system. To be less abstract, I have seen a failure to stop a CPU in the crashed kernel a few times, and the panic kernel could never successfully save anything; it always crashed at boot or a little bit later. Anyway, of course we would still have to keep the current method, because user pages are not always filtered. For example, a major SUSE account runs a database in user space and also inspects its data structures in case of a system crash. Petr T
Re: [RESEND PATCH V5 00/33] block: support multipage bvec
On Fri, May 25, 2018 at 11:45:48AM +0800, Ming Lei wrote: > Hi, > > This patchset brings multipage bvec into block layer: patch series looks sane to me. goddamn that's a lot of renaming. Things are going to get interesting when we start sticking compound pages in the page cache, there'll be some interesting questions of semantics to deal with then but I think getting this will only help w.r.t. plumbing that through and not dealing with 4k pages unnecessarily - but I think even if we were to decide that merging in bio_add_page() is not the way to go when the upper layers are passing compound pages around already, this patch series helps because regardless at some point everything under generic_make_request() is going to have to deal with segments that are more than one page, and this patch series makes that happen. So incremental progress. Jens, any objections to getting this in?
Re: [PATCH v3 7/8] drm/mediatek: Add support for mediatek SOC MT2712
Hi, Stu:
I've some inline comment.
On Fri, 2018-05-25 at 10:34 +0800, stu.hs...@mediatek.com wrote:
> From: Stu Hsieh
>
> This patch add support for the Mediatek MT2712 DISP subsystem.
> There are two OVL engine and three disp output in MT2712.
>
> Signed-off-by: Stu Hsieh
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 46
> +++--
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 8 +++--
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 42 --
> drivers/gpu/drm/mediatek/mtk_drm_drv.h | 7 +++--
> 4 files changed, 94 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 0f568dd853d8..676726249ae0 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -61,6 +61,24 @@
> #define MT8173_MUTEX_MOD_DISP_PWM1 24
> #define MT8173_MUTEX_MOD_DISP_OD 25
>
> +#define MT2712_MUTEX_MOD_DISP_OVL0 11
> +#define MT2712_MUTEX_MOD_DISP_OVL1 12
> +#define MT2712_MUTEX_MOD_DISP_RDMA0 13
> +#define MT2712_MUTEX_MOD_DISP_RDMA1 14
> +#define MT2712_MUTEX_MOD_DISP_RDMA2 15
> +#define MT2712_MUTEX_MOD_DISP_WDMA0 16
> +#define MT2712_MUTEX_MOD_DISP_WDMA1 17
> +#define MT2712_MUTEX_MOD_DISP_COLOR0 18
> +#define MT2712_MUTEX_MOD_DISP_COLOR1 19
> +#define MT2712_MUTEX_MOD_DISP_AAL0 20
> +#define MT2712_MUTEX_MOD_DISP_UFOE 22
> +#define MT2712_MUTEX_MOD_DISP_PWM0 23
> +#define MT2712_MUTEX_MOD_DISP_PWM1 24
> +#define MT2712_MUTEX_MOD_DISP_PWM2 10
> +#define MT2712_MUTEX_MOD_DISP_OD025
> +#define MT2712_MUTEX_MOD2_DISP_AAL1 33
> +#define MT2712_MUTEX_MOD2_DISP_OD1 34
I would like this to be in the order by index.
> +
> #define MT2701_MUTEX_MOD_DISP_OVL3
> #define MT2701_MUTEX_MOD_DISP_WDMA 6
> #define MT2701_MUTEX_MOD_DISP_COLOR 7
> @@ -75,6 +93,7 @@
>
> #define OVL0_MOUT_EN_COLOR0 0x1
> #define OD_MOUT_EN_RDMA0 0x1
> +#define OD1_MOUT_EN_RDMA1BIT(16)
> #define UFOE_MOUT_EN_DSI00x1
> #define COLOR0_SEL_IN_OVL0 0x1
> #define OVL1_MOUT_EN_COLOR1 0x1
> @@ -109,12 +128,32 @@ static const unsigned int
> mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> [DDP_COMPONENT_WDMA0] = MT2701_MUTEX_MOD_DISP_WDMA,
> };
>
> +static const unsigned int mt2712_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> + [DDP_COMPONENT_AAL0] = MT2712_MUTEX_MOD_DISP_AAL0,
> + [DDP_COMPONENT_AAL1] = MT2712_MUTEX_MOD2_DISP_AAL1,
> + [DDP_COMPONENT_COLOR0] = MT2712_MUTEX_MOD_DISP_COLOR0,
> + [DDP_COMPONENT_COLOR1] = MT2712_MUTEX_MOD_DISP_COLOR1,
> + [DDP_COMPONENT_OD0] = MT2712_MUTEX_MOD_DISP_OD0,
> + [DDP_COMPONENT_OD1] = MT2712_MUTEX_MOD2_DISP_OD1,
> + [DDP_COMPONENT_OVL0] = MT2712_MUTEX_MOD_DISP_OVL0,
> + [DDP_COMPONENT_OVL1] = MT2712_MUTEX_MOD_DISP_OVL1,
> + [DDP_COMPONENT_PWM0] = MT2712_MUTEX_MOD_DISP_PWM0,
> + [DDP_COMPONENT_PWM1] = MT2712_MUTEX_MOD_DISP_PWM1,
> + [DDP_COMPONENT_PWM2] = MT2712_MUTEX_MOD_DISP_PWM2,
> + [DDP_COMPONENT_RDMA0] = MT2712_MUTEX_MOD_DISP_RDMA0,
> + [DDP_COMPONENT_RDMA1] = MT2712_MUTEX_MOD_DISP_RDMA1,
> + [DDP_COMPONENT_RDMA2] = MT2712_MUTEX_MOD_DISP_RDMA2,
> + [DDP_COMPONENT_UFOE] = MT2712_MUTEX_MOD_DISP_UFOE,
> + [DDP_COMPONENT_WDMA0] = MT2712_MUTEX_MOD_DISP_WDMA0,
> + [DDP_COMPONENT_WDMA1] = MT2712_MUTEX_MOD_DISP_WDMA1,
> +};
> +
> static const unsigned int mt8173_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> - [DDP_COMPONENT_AAL] = MT8173_MUTEX_MOD_DISP_AAL,
> + [DDP_COMPONENT_AAL0] = MT8173_MUTEX_MOD_DISP_AAL,
Move this to the patch 'add ddp component AAL1'.
> [DDP_COMPONENT_COLOR0] = MT8173_MUTEX_MOD_DISP_COLOR0,
> [DDP_COMPONENT_COLOR1] = MT8173_MUTEX_MOD_DISP_COLOR1,
> [DDP_COMPONENT_GAMMA] = MT8173_MUTEX_MOD_DISP_GAMMA,
> - [DDP_COMPONENT_OD] = MT8173_MUTEX_MOD_DISP_OD,
> + [DDP_COMPONENT_OD0] = MT8173_MUTEX_MOD_DISP_OD,
Move this to the patch 'add ddp component OD1'.
> [DDP_COMPONENT_OVL0] = MT8173_MUTEX_MOD_DISP_OVL0,
> [DDP_COMPONENT_OVL1] = MT8173_MUTEX_MOD_DISP_OVL1,
> [DDP_COMPONENT_PWM0] = MT8173_MUTEX_MOD_DISP_PWM0,
> @@ -139,7 +178,7 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id
> cur,
> } else if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_RDMA0) {
> *addr = DISP_REG_CONFIG_DISP_OVL_MOUT_EN;
> value = OVL_MOUT_EN_RDMA;
> - } else if (cur == DDP_COMPONENT_OD && next == DDP_COMPONENT_RDMA0) {
> + } else if (cur == DDP_COMPONENT_OD0 && next == DDP_COMPONENT_RDMA0) {
Move this to the patch 'add ddp component OD1'.
> *addr = DISP_REG_CONFIG_DISP_OD_MOUT_EN;
> value = OD_MOUT_EN_RDMA0;
> } else if (cur == DDP_COMPONENT_UFOE && next =
Re: [PATCH 2/2] mm: do not warn on offline nodes unless the specific node is explicitly requested
On 05/24/2018 01:30 PM, Michal Hocko wrote:
> On Thu 24-05-18 08:52:14, Anshuman Khandual wrote:
>> On 05/23/2018 07:36 PM, Michal Hocko wrote:
>>> On Wed 23-05-18 19:15:51, Anshuman Khandual wrote:
On 05/23/2018 06:25 PM, Michal Hocko wrote:
> when adding memory to a node that is currently offline.
>
> The VM_WARN_ON is just too loud without a good reason. In this
> particular case we are doing
> alloc_pages_node(node, GFP_KERNEL|__GFP_RETRY_MAYFAIL|__GFP_NOWARN,
> order)
>
> so we do not insist on allocating from the given node (it is more a
> hint) so we can fall back to any other populated node and moreover we
> explicitly ask to not warn for the allocation failure.
>
> Soften the warning only to cases when somebody asks for the given node
> explicitly by __GFP_THISNODE.
node hint passed here eventually goes into __alloc_pages_nodemask()
function which then picks up the applicable zonelist irrespective of
the GFP flag __GFP_THISNODE.
>>>
>>> __GFP_THISNODE should enforce the given node without any fallbacks
>>> unless something has changed recently.
>>
>> Right. I was just saying requiring given preferred node to be online
>> whose zonelist (hence allocation zone fallback order) is getting picked
>> up during allocation and warning when that is not online still makes
>> sense.
>
> Why? We have a fallback and that is expected to be used. How does
> offline differ from depleted node from the semantical point of view?
Hmm, right. I agree. Offlined and depleted nodes are same from memory
allocation semantics point of view. It will proceed picking up next
available zones on the zonelist in the fallback order exactly in the
same fashion either way.
>
>> We should only hide the warning if the allocation request has
>> __GFP_NOWARN.
>>
>>>
Though we can go into zones of other
nodes if the present node (whose zonelist got picked up) does not
have any memory in it's zones. So warning here might not be without
any reason.
>>>
>>> I am not sure I follow. Are you suggesting a different VM_WARN_ON?
>>
>> I am just suggesting this instead.
>>
>> diff --git a/include/linux/gfp.h b/include/linux/gfp.h
>> index 036846fc00a6..7f860ea29ec6 100644
>> --- a/include/linux/gfp.h
>> +++ b/include/linux/gfp.h
>> @@ -464,7 +464,7 @@ static inline struct page *
>> __alloc_pages_node(int nid, gfp_t gfp_mask, unsigned int order)
>> {
>> VM_BUG_ON(nid < 0 || nid >= MAX_NUMNODES);
>> -VM_WARN_ON(!node_online(nid));
>> +VM_WARN_ON(!(gfp_mask & __GFP_NOWARN) && !node_online(nid));
>>
>> return __alloc_pages(gfp_mask, order, nid);
>> }
>
> I have considered that but I fail to see why should we warn about
> regular GFP_KERNEL allocations as mentioned above. Just consider an
> allocation for the preffered node. Do you want to warn just because that
> node went offline?
As you have mentioned before, the semantics is similar when the node is
offlined compared to when its depleted. Right. I tend to agree with your
approach of not warning in such situations.
RE: [PATCH 5/5] MAINTAINERS: add myself as maintainer for QorIQ PTP clock driver
This patch has a dependency which is now on staging git tree. https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git/commit/?h=staging-next&id=7fd899fff5907dbb02089494102ef628988f2330 > -Original Message- > From: Yangbo Lu [mailto:yangbo...@nxp.com] > Sent: Friday, May 25, 2018 12:41 PM > To: net...@vger.kernel.org; devicet...@vger.kernel.org; > linux-kernel@vger.kernel.org; Richard Cochran ; > Claudiu Manoil ; Rob Herring > Cc: Y.b. Lu > Subject: [PATCH 5/5] MAINTAINERS: add myself as maintainer for QorIQ PTP > clock driver > > Added myself as maintainer for QorIQ PTP clock driver. > Since gianfar_ptp.c was renamed to ptp_qoriq.c, let's also maintain it under > QorIQ PTP clock driver. > > Signed-off-by: Yangbo Lu > --- > MAINTAINERS | 17 + > 1 files changed, 9 insertions(+), 8 deletions(-) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 4b65225..a71d4fa 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -4411,12 +4411,6 @@ L: linux-kernel@vger.kernel.org > S: Maintained > F: drivers/staging/fsl-dpaa2/ethsw > > -DPAA2 PTP CLOCK DRIVER > -M: Yangbo Lu > -L: linux-kernel@vger.kernel.org > -S: Maintained > -F: drivers/staging/fsl-dpaa2/rtc > - > DPT_I2O SCSI RAID DRIVER > M: Adaptec OEM Raid Solutions > L: linux-s...@vger.kernel.org > @@ -5648,7 +5642,6 @@ M: Claudiu Manoil > L: net...@vger.kernel.org > S: Maintained > F: drivers/net/ethernet/freescale/gianfar* > -X: drivers/net/ethernet/freescale/gianfar_ptp.c > F: Documentation/devicetree/bindings/net/fsl-tsec-phy.txt > > FREESCALE GPMI NAND DRIVER > @@ -5695,6 +5688,15 @@ S: Maintained > F: drivers/net/ethernet/freescale/fman > F: Documentation/devicetree/bindings/powerpc/fsl/fman.txt > > +FREESCALE QORIQ PTP CLOCK DRIVER > +M: Yangbo Lu > +L: linux-kernel@vger.kernel.org > +S: Maintained > +F: drivers/staging/fsl-dpaa2/rtc > +F: drivers/ptp/ptp_qoriq.c > +F: include/linux/fsl/ptp_qoriq.h > +F: Documentation/devicetree/bindings/ptp/ptp-qoriq.txt > + > FREESCALE QUAD SPI DRIVER > M: Han Xu > L: linux-...@lists.infradead.org > @@ -11429,7 +11431,6 @@ S:Maintained > W: > https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fli > nuxptp.sourceforge.net%2F&data=02%7C01%7Cyangbo.lu%40nxp.com%7Cd7 > 840089f091467d11de08d5c1f9e801%7C686ea1d3bc2b4c6fa92cd99c5c3016 > 35%7C0%7C0%7C636628201433493648&sdata=XhJjFQyrROZzMU7zUGsUkA > BjJD%2BJ25q2Jq77vdHoco0%3D&reserved=0 > F: Documentation/ABI/testing/sysfs-ptp > F: Documentation/ptp/* > -F: drivers/net/ethernet/freescale/gianfar_ptp.c > F: drivers/net/phy/dp83640* > F: drivers/ptp/* > F: include/linux/ptp_cl* > -- > 1.7.1
[PATCH 3/5] net: ethernet: gianfar_ethtool: get phc index through drvdata
Global variable gfar_phc_index was used to get and store
phc index through gianfar_ptp driver. However gianfar_ptp
had been renamed as ptp_qoriq for QorIQ common PTP driver.
This gfar_phc_index doesn't work any more, and the phc index
is stored in drvdata now. This patch is to support getting
phc index through ptp_qoriq drvdata.
Signed-off-by: Yangbo Lu
---
drivers/net/ethernet/freescale/gianfar.h |3 --
drivers/net/ethernet/freescale/gianfar_ethtool.c | 23 +
2 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/freescale/gianfar.h
b/drivers/net/ethernet/freescale/gianfar.h
index 5aa8147..8e42c02 100644
--- a/drivers/net/ethernet/freescale/gianfar.h
+++ b/drivers/net/ethernet/freescale/gianfar.h
@@ -1372,7 +1372,4 @@ struct filer_table {
struct gfar_filer_entry fe[MAX_FILER_CACHE_IDX + 20];
};
-/* The gianfar_ptp module will set this variable */
-extern int gfar_phc_index;
-
#endif /* __GIANFAR_H */
diff --git a/drivers/net/ethernet/freescale/gianfar_ethtool.c
b/drivers/net/ethernet/freescale/gianfar_ethtool.c
index a93e019..8cb98ca 100644
--- a/drivers/net/ethernet/freescale/gianfar_ethtool.c
+++ b/drivers/net/ethernet/freescale/gianfar_ethtool.c
@@ -41,6 +41,8 @@
#include
#include
#include
+#include
+#include
#include "gianfar.h"
@@ -1509,24 +1511,35 @@ static int gfar_get_nfc(struct net_device *dev, struct
ethtool_rxnfc *cmd,
return ret;
}
-int gfar_phc_index = -1;
-EXPORT_SYMBOL(gfar_phc_index);
-
static int gfar_get_ts_info(struct net_device *dev,
struct ethtool_ts_info *info)
{
struct gfar_private *priv = netdev_priv(dev);
+ struct platform_device *ptp_dev;
+ struct device_node *ptp_node;
+ struct qoriq_ptp *ptp = NULL;
+
+ info->phc_index = -1;
if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)) {
info->so_timestamping = SOF_TIMESTAMPING_RX_SOFTWARE |
SOF_TIMESTAMPING_SOFTWARE;
- info->phc_index = -1;
return 0;
}
+
+ ptp_node = of_find_compatible_node(NULL, NULL, "fsl,etsec-ptp");
+ if (ptp_node) {
+ ptp_dev = of_find_device_by_node(ptp_node);
+ if (ptp_dev)
+ ptp = platform_get_drvdata(ptp_dev);
+ }
+
+ if (ptp)
+ info->phc_index = ptp->phc_index;
+
info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
SOF_TIMESTAMPING_RX_HARDWARE |
SOF_TIMESTAMPING_RAW_HARDWARE;
- info->phc_index = gfar_phc_index;
info->tx_types = (1 << HWTSTAMP_TX_OFF) |
(1 << HWTSTAMP_TX_ON);
info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
--
1.7.1
[PATCH 1/5] ptp: rework gianfar_ptp as QorIQ common PTP driver
gianfar_ptp was the PTP clock driver for 1588 timer
module of Freescale QorIQ eTSEC (Enhanced Three-Speed
Ethernet Controllers) platforms. Actually QorIQ DPAA
(Data Path Acceleration Architecture) platforms is
also using the same 1588 timer module in hardware.
This patch is to rework gianfar_ptp as QorIQ common
PTP driver to support both DPAA and eTSEC. Moved
gianfar_ptp.c to drivers/ptp/, renamed it as
ptp_qoriq.c, and renamed many variables. There were
not any function changes.
Signed-off-by: Yangbo Lu
---
drivers/net/ethernet/freescale/Makefile|1 -
drivers/ptp/Kconfig| 14 +-
drivers/ptp/Makefile |1 +
.../freescale/gianfar_ptp.c => ptp/ptp_qoriq.c}| 320 ++--
4 files changed, 174 insertions(+), 162 deletions(-)
rename drivers/{net/ethernet/freescale/gianfar_ptp.c => ptp/ptp_qoriq.c} (58%)
diff --git a/drivers/net/ethernet/freescale/Makefile
b/drivers/net/ethernet/freescale/Makefile
index ed8ad0f..0914a3e 100644
--- a/drivers/net/ethernet/freescale/Makefile
+++ b/drivers/net/ethernet/freescale/Makefile
@@ -14,7 +14,6 @@ obj-$(CONFIG_FS_ENET) += fs_enet/
obj-$(CONFIG_FSL_PQ_MDIO) += fsl_pq_mdio.o
obj-$(CONFIG_FSL_XGMAC_MDIO) += xgmac_mdio.o
obj-$(CONFIG_GIANFAR) += gianfar_driver.o
-obj-$(CONFIG_PTP_1588_CLOCK_GIANFAR) += gianfar_ptp.o
gianfar_driver-objs := gianfar.o \
gianfar_ethtool.o
obj-$(CONFIG_UCC_GETH) += ucc_geth_driver.o
diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig
index a21ad10..474c988 100644
--- a/drivers/ptp/Kconfig
+++ b/drivers/ptp/Kconfig
@@ -41,19 +41,19 @@ config PTP_1588_CLOCK_DTE
To compile this driver as a module, choose M here: the module
will be called ptp_dte.
-config PTP_1588_CLOCK_GIANFAR
- tristate "Freescale eTSEC as PTP clock"
+config PTP_1588_CLOCK_QORIQ
+ tristate "Freescale QorIQ 1588 timer as PTP clock"
depends on GIANFAR
depends on PTP_1588_CLOCK
default y
help
- This driver adds support for using the eTSEC as a PTP
- clock. This clock is only useful if your PTP programs are
- getting hardware time stamps on the PTP Ethernet packets
- using the SO_TIMESTAMPING API.
+ This driver adds support for using the Freescale QorIQ 1588
+ timer as a PTP clock. This clock is only useful if your PTP
+ programs are getting hardware time stamps on the PTP Ethernet
+ packets using the SO_TIMESTAMPING API.
To compile this driver as a module, choose M here: the module
- will be called gianfar_ptp.
+ will be called ptp_qoriq.
config PTP_1588_CLOCK_IXP46X
tristate "Intel IXP46x as PTP clock"
diff --git a/drivers/ptp/Makefile b/drivers/ptp/Makefile
index fd28207..19efa9c 100644
--- a/drivers/ptp/Makefile
+++ b/drivers/ptp/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_PTP_1588_CLOCK_DTE)+= ptp_dte.o
obj-$(CONFIG_PTP_1588_CLOCK_IXP46X)+= ptp_ixp46x.o
obj-$(CONFIG_PTP_1588_CLOCK_PCH) += ptp_pch.o
obj-$(CONFIG_PTP_1588_CLOCK_KVM) += ptp_kvm.o
+obj-$(CONFIG_PTP_1588_CLOCK_QORIQ) += ptp_qoriq.o
diff --git a/drivers/net/ethernet/freescale/gianfar_ptp.c
b/drivers/ptp/ptp_qoriq.c
similarity index 58%
rename from drivers/net/ethernet/freescale/gianfar_ptp.c
rename to drivers/ptp/ptp_qoriq.c
index 9f8d4f8..5110cce 100644
--- a/drivers/net/ethernet/freescale/gianfar_ptp.c
+++ b/drivers/ptp/ptp_qoriq.c
@@ -1,5 +1,5 @@
/*
- * PTP 1588 clock using the eTSEC
+ * PTP 1588 clock for Freescale QorIQ 1588 timer
*
* Copyright (C) 2010 OMICRON electronics GmbH
*
@@ -29,16 +29,15 @@
#include
#include
#include
+#include
#include
-#include "gianfar.h"
-
/*
- * gianfar ptp registers
+ * qoriq ptp registers
* Generated by regen.tcl on Thu May 13 01:38:57 PM CEST 2010
*/
-struct gianfar_ptp_registers {
+struct qoriq_ptp_registers {
u32 tmr_ctrl; /* Timer control register */
u32 tmr_tevent; /* Timestamp event register */
u32 tmr_temask; /* Timer event mask register */
@@ -127,18 +126,19 @@ struct gianfar_ptp_registers {
#define PRSC_OCK_MASK (0x)
-#define DRIVER "gianfar_ptp"
+#define DRIVER "ptp_qoriq"
#define DEFAULT_CKSEL 1
#define N_EXT_TS 2
-#define REG_SIZE sizeof(struct gianfar_ptp_registers)
+#define REG_SIZE sizeof(struct qoriq_ptp_registers)
-struct etsects {
- struct gianfar_ptp_registers __iomem *regs;
+struct qoriq_ptp {
+ struct qoriq_ptp_registers __iomem *regs;
spinlock_t lock; /* protects regs */
struct ptp_clock *clock;
struct ptp_clock_info caps;
struct resource *rsrc;
int irq;
+ int phc_index;
u64 alarm_interval; /* for periodic alarm */
u64 alarm_value;
u32 tclk_period; /* nanoseconds */
@@ -149,54 +149,67 @@ struct etsects {
u32 tmr_fiper2;
};
+static inline u32 q
[PATCH 2/5] ptp_qoriq: move some definitions to header file
This patch is to move some definitions in ptp_qoriq.c
to the header file.
Signed-off-by: Yangbo Lu
---
drivers/ptp/ptp_qoriq.c | 132 +--
include/linux/fsl/ptp_qoriq.h | 141 +
2 files changed, 142 insertions(+), 131 deletions(-)
create mode 100644 include/linux/fsl/ptp_qoriq.h
diff --git a/drivers/ptp/ptp_qoriq.c b/drivers/ptp/ptp_qoriq.c
index 5110cce..1468a16 100644
--- a/drivers/ptp/ptp_qoriq.c
+++ b/drivers/ptp/ptp_qoriq.c
@@ -28,139 +28,9 @@
#include
#include
#include
-#include
#include
-#include
-
-/*
- * qoriq ptp registers
- * Generated by regen.tcl on Thu May 13 01:38:57 PM CEST 2010
- */
-struct qoriq_ptp_registers {
- u32 tmr_ctrl; /* Timer control register */
- u32 tmr_tevent; /* Timestamp event register */
- u32 tmr_temask; /* Timer event mask register */
- u32 tmr_pevent; /* Timestamp event register */
- u32 tmr_pemask; /* Timer event mask register */
- u32 tmr_stat; /* Timestamp status register */
- u32 tmr_cnt_h;/* Timer counter high register */
- u32 tmr_cnt_l;/* Timer counter low register */
- u32 tmr_add; /* Timer drift compensation addend register */
- u32 tmr_acc; /* Timer accumulator register */
- u32 tmr_prsc; /* Timer prescale */
- u8 res1[4];
- u32 tmroff_h; /* Timer offset high */
- u32 tmroff_l; /* Timer offset low */
- u8 res2[8];
- u32 tmr_alarm1_h; /* Timer alarm 1 high register */
- u32 tmr_alarm1_l; /* Timer alarm 1 high register */
- u32 tmr_alarm2_h; /* Timer alarm 2 high register */
- u32 tmr_alarm2_l; /* Timer alarm 2 high register */
- u8 res3[48];
- u32 tmr_fiper1; /* Timer fixed period interval */
- u32 tmr_fiper2; /* Timer fixed period interval */
- u32 tmr_fiper3; /* Timer fixed period interval */
- u8 res4[20];
- u32 tmr_etts1_h; /* Timestamp of general purpose external trigger */
- u32 tmr_etts1_l; /* Timestamp of general purpose external trigger */
- u32 tmr_etts2_h; /* Timestamp of general purpose external trigger */
- u32 tmr_etts2_l; /* Timestamp of general purpose external trigger */
-};
-
-/* Bit definitions for the TMR_CTRL register */
-#define ALM1P (1<<31) /* Alarm1 output polarity */
-#define ALM2P (1<<30) /* Alarm2 output polarity */
-#define FIPERST (1<<28) /* FIPER start indication */
-#define PP1L (1<<27) /* Fiper1 pulse loopback mode enabled. */
-#define PP2L (1<<26) /* Fiper2 pulse loopback mode enabled. */
-#define TCLK_PERIOD_SHIFT (16) /* 1588 timer reference clock period. */
-#define TCLK_PERIOD_MASK (0x3ff)
-#define RTPE (1<<15) /* Record Tx Timestamp to PAL Enable. */
-#define FRD (1<<14) /* FIPER Realignment Disable */
-#define ESFDP (1<<11) /* External Tx/Rx SFD Polarity. */
-#define ESFDE (1<<10) /* External Tx/Rx SFD Enable. */
-#define ETEP2 (1<<9) /* External trigger 2 edge polarity */
-#define ETEP1 (1<<8) /* External trigger 1 edge polarity */
-#define COPH (1<<7) /* Generated clock output phase. */
-#define CIPH (1<<6) /* External oscillator input clock phase
*/
-#define TMSR (1<<5) /* Timer soft reset. */
-#define BYP (1<<3) /* Bypass drift compensated clock */
-#define TE(1<<2) /* 1588 timer enable. */
-#define CKSEL_SHIFT (0)/* 1588 Timer reference clock source */
-#define CKSEL_MASK(0x3)
-
-/* Bit definitions for the TMR_TEVENT register */
-#define ETS2 (1<<25) /* External trigger 2 timestamp sampled
*/
-#define ETS1 (1<<24) /* External trigger 1 timestamp sampled
*/
-#define ALM2 (1<<17) /* Current time = alarm time register 2
*/
-#define ALM1 (1<<16) /* Current time = alarm time register 1
*/
-#define PP1 (1<<7) /* periodic pulse generated on FIPER1 */
-#define PP2 (1<<6) /* periodic pulse generated on FIPER2 */
-#define PP3 (1<<5) /* periodic pulse generated on FIPER3 */
-
-/* Bit definitions for the TMR_TEMASK register */
-#define ETS2EN(1<<25) /* External trigger 2 timestamp enable */
-#define ETS1EN(1<<24) /* External trigger 1 timestamp enable */
-#define ALM2EN(1<<17) /* Timer ALM2 event enable */
-#define ALM1EN(1<<16) /* Timer ALM1 event enable */
-#define PP1EN (1<<7) /* Periodic pulse event 1 enable */
-#define PP2EN (1<<6) /* Periodic pulse event 2 enable */
-
-/* Bit definitions for the TMR_PEVENT register */
-#define TXP2 (1<<9) /* PTP transmitted timestam
[PATCH 5/5] MAINTAINERS: add myself as maintainer for QorIQ PTP clock driver
Added myself as maintainer for QorIQ PTP clock driver. Since gianfar_ptp.c was renamed to ptp_qoriq.c, let's also maintain it under QorIQ PTP clock driver. Signed-off-by: Yangbo Lu --- MAINTAINERS | 17 + 1 files changed, 9 insertions(+), 8 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 4b65225..a71d4fa 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4411,12 +4411,6 @@ L: linux-kernel@vger.kernel.org S: Maintained F: drivers/staging/fsl-dpaa2/ethsw -DPAA2 PTP CLOCK DRIVER -M: Yangbo Lu -L: linux-kernel@vger.kernel.org -S: Maintained -F: drivers/staging/fsl-dpaa2/rtc - DPT_I2O SCSI RAID DRIVER M: Adaptec OEM Raid Solutions L: linux-s...@vger.kernel.org @@ -5648,7 +5642,6 @@ M:Claudiu Manoil L: net...@vger.kernel.org S: Maintained F: drivers/net/ethernet/freescale/gianfar* -X: drivers/net/ethernet/freescale/gianfar_ptp.c F: Documentation/devicetree/bindings/net/fsl-tsec-phy.txt FREESCALE GPMI NAND DRIVER @@ -5695,6 +5688,15 @@ S: Maintained F: drivers/net/ethernet/freescale/fman F: Documentation/devicetree/bindings/powerpc/fsl/fman.txt +FREESCALE QORIQ PTP CLOCK DRIVER +M: Yangbo Lu +L: linux-kernel@vger.kernel.org +S: Maintained +F: drivers/staging/fsl-dpaa2/rtc +F: drivers/ptp/ptp_qoriq.c +F: include/linux/fsl/ptp_qoriq.h +F: Documentation/devicetree/bindings/ptp/ptp-qoriq.txt + FREESCALE QUAD SPI DRIVER M: Han Xu L: linux-...@lists.infradead.org @@ -11429,7 +11431,6 @@ S: Maintained W: http://linuxptp.sourceforge.net/ F: Documentation/ABI/testing/sysfs-ptp F: Documentation/ptp/* -F: drivers/net/ethernet/freescale/gianfar_ptp.c F: drivers/net/phy/dp83640* F: drivers/ptp/* F: include/linux/ptp_cl* -- 1.7.1
[PATCH 4/5] dt-bindings: ptp: add ptp-qoriq.txt
This patch is to add a documentation for ptp_qoriq dt-bindings.
The description for ptp_qoriq dt-bindings was actually moved
from Documentation/devicetree/bindings/net/fsl-tsec-phy.txt,
since gianfar_ptp driver was moved to ptp_qoriq driver.
Signed-off-by: Yangbo Lu
---
.../devicetree/bindings/net/fsl-tsec-phy.txt | 68 +---
.../devicetree/bindings/ptp/ptp-qoriq.txt | 69
2 files changed, 70 insertions(+), 67 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ptp/ptp-qoriq.txt
diff --git a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
index 79bf352..047bdf7 100644
--- a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
+++ b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
@@ -86,70 +86,4 @@ Example:
* Gianfar PTP clock nodes
-General Properties:
-
- - compatible Should be "fsl,etsec-ptp"
- - reg Offset and length of the register set for the device
- - interrupts There should be at least two interrupts. Some devices
- have as many as four PTP related interrupts.
-
-Clock Properties:
-
- - fsl,ckselTimer reference clock source.
- - fsl,tclk-period Timer reference clock period in nanoseconds.
- - fsl,tmr-prsc Prescaler, divides the output clock.
- - fsl,tmr-add Frequency compensation value.
- - fsl,tmr-fiper1 Fixed interval period pulse generator.
- - fsl,tmr-fiper2 Fixed interval period pulse generator.
- - fsl,max-adj Maximum frequency adjustment in parts per billion.
-
- These properties set the operational parameters for the PTP
- clock. You must choose these carefully for the clock to work right.
- Here is how to figure good values:
-
- TimerOsc = selected reference clock MHz
- tclk_period = desired clock period nanoseconds
- NominalFreq = 1000 / tclk_period MHz
- FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
- tmr_add = ceil(2^32 / FreqDivRatio)
- OutputClock = NominalFreq / tmr_prsc MHz
- PulseWidth = 1 / OutputClockmicroseconds
- FiperFreq1 = desired frequency in Hz
- FiperDiv1= 100 * OutputClock / FiperFreq1
- tmr_fiper1 = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
- max_adj = 10 * (FreqDivRatio - 1.0) - 1
-
- The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
- driver expects that tmr_fiper1 will be correctly set to produce a 1
- Pulse Per Second (PPS) signal, since this will be offered to the PPS
- subsystem to synchronize the Linux clock.
-
- Reference clock source is determined by the value, which is holded
- in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the
- value, which will be directly written in those bits, that is why,
- according to reference manual, the next clock sources can be used:
-
- <0> - external high precision timer reference clock (TSEC_TMR_CLK
-input is used for this purpose);
- <1> - eTSEC system clock;
- <2> - eTSEC1 transmit clock;
- <3> - RTC clock input.
-
- When this attribute is not used, eTSEC system clock will serve as
- IEEE 1588 timer reference clock.
-
-Example:
-
- ptp_clock@24e00 {
- compatible = "fsl,etsec-ptp";
- reg = <0x24E00 0xB0>;
- interrupts = <12 0x8 13 0x8>;
- interrupt-parent = < &ipic >;
- fsl,cksel = <1>;
- fsl,tclk-period = <10>;
- fsl,tmr-prsc= <100>;
- fsl,tmr-add = <0x99A4>;
- fsl,tmr-fiper1 = <0x3B9AC9F6>;
- fsl,tmr-fiper2 = <0x00018696>;
- fsl,max-adj = <65998>;
- };
+Refer to Documentation/devicetree/bindings/ptp/ptp-qoriq.txt
diff --git a/Documentation/devicetree/bindings/ptp/ptp-qoriq.txt
b/Documentation/devicetree/bindings/ptp/ptp-qoriq.txt
new file mode 100644
index 000..0f569d8
--- /dev/null
+++ b/Documentation/devicetree/bindings/ptp/ptp-qoriq.txt
@@ -0,0 +1,69 @@
+* Freescale QorIQ 1588 timer based PTP clock
+
+General Properties:
+
+ - compatible Should be "fsl,etsec-ptp"
+ - reg Offset and length of the register set for the device
+ - interrupts There should be at least two interrupts. Some devices
+ have as many as four PTP related interrupts.
+
+Clock Properties:
+
+ - fsl,ckselTimer reference clock source.
+ - fsl,tclk-period Timer reference clock period in nanoseconds.
+ - fsl,tmr-prsc Prescaler, divides the output clock.
+ - fsl,tmr-add Frequency compensation value.
+ - fsl,tmr-fiper1 Fixed interval period pulse generator.
+ - fsl,tmr-fiper2 Fixed interval period pulse generator.
+ - fsl,max-adj Maximum frequency adjustment in parts per billion.
+
+ These properties set the operational parameters for the PTP
+ clock. You must choose these carefully for the clock to work right.
+ Her
Re: [RESEND PATCH V5 12/33] block: introduce bio_segments()
On Fri, May 25, 2018 at 11:46:00AM +0800, Ming Lei wrote:
> There are still cases in which we need to use bio_segments() for get the
> number of segment, so introduce it.
>
> Signed-off-by: Ming Lei
> ---
> include/linux/bio.h | 25 -
> 1 file changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/include/linux/bio.h b/include/linux/bio.h
> index 08af9272687f..b24c00f99c9c 100644
> --- a/include/linux/bio.h
> +++ b/include/linux/bio.h
> @@ -227,9 +227,9 @@ static inline bool bio_rewind_iter(struct bio *bio,
> struct bvec_iter *iter,
>
> #define bio_iter_last(bvec, iter) ((iter).bi_size == (bvec).bv_len)
>
> -static inline unsigned bio_pages(struct bio *bio)
> +static inline unsigned __bio_elements(struct bio *bio, bool seg)
This is a rather silly helper function, there isn't any actual code that's
shared, everything's behind an if () statement. Just open code it in bio_pages()
and bio_segments()
> {
> - unsigned segs = 0;
> + unsigned elems = 0;
> struct bio_vec bv;
> struct bvec_iter iter;
>
> @@ -249,10 +249,25 @@ static inline unsigned bio_pages(struct bio *bio)
> break;
> }
>
> - bio_for_each_page(bv, bio, iter)
> - segs++;
> + if (!seg) {
> + bio_for_each_page(bv, bio, iter)
> + elems++;
> + } else {
> + bio_for_each_segment(bv, bio, iter)
> + elems++;
> + }
> +
> + return elems;
> +}
> +
> +static inline unsigned bio_pages(struct bio *bio)
> +{
> + return __bio_elements(bio, false);
> +}
>
> - return segs;
> +static inline unsigned bio_segments(struct bio *bio)
> +{
> + return __bio_elements(bio, true);
> }
>
> /*
> --
> 2.9.5
>
Re: [PATCH v6 05/17] media: rkisp1: add Rockchip ISP1 subdev driver
On Thu, May 24, 2018 at 8:30 PM Baruch Siach wrote:
> Hi Tomasz,
> On Mon, May 07, 2018 at 06:41:50AM +, Tomasz Figa wrote:
> > On Mon, May 7, 2018 at 3:38 PM Baruch Siach wrote:
> > > On Mon, May 07, 2018 at 06:13:27AM +, Tomasz Figa wrote:
> > > > On Thu, May 3, 2018 at 6:09 PM Baruch Siach
wrote:
> > > > > On Thu, Mar 08, 2018 at 05:47:55PM +0800, Jacob Chen wrote:
> > > > > > +static int rkisp1_isp_sd_s_power(struct v4l2_subdev *sd, int
on)
> > > > > > +{
> > > > > > + struct rkisp1_device *isp_dev = sd_to_isp_dev(sd);
> > > > > > + int ret;
> > > > > > +
> > > > > > + v4l2_dbg(1, rkisp1_debug, &isp_dev->v4l2_dev, "s_power:
%d\n",
> > > > on);
> > > > > > +
> > > > > > + if (on) {
> > > > > > + ret = pm_runtime_get_sync(isp_dev->dev);
> > > > > > + if (ret < 0)
> > > > > > + return ret;
> > > > > > +
> > > > > > + rkisp1_config_clk(isp_dev);
> > > > > > + } else {
> > > > > > + ret = pm_runtime_put(isp_dev->dev);
> > > >
> > > > > I commented this line out to make more than one STREAMON work.
> > Otherwise,
> > > > > the second STREAMON hangs. I guess the bug is not this driver.
> > Probably
> > > > > something in drivers/soc/rockchip/pm_domains.c. Just noting that
in
> > case
> > > > > you or someone on Cc would like to investigate it further.
> > > > >
> > > > > I tested v4.16-rc4 on the Tinkerboard.
> > > >
> > > > Looks like that version doesn't include the IOMMU PM and clock
handling
> > > > rework [1], which should fix a lot of runtime PM issues. FWIW,
> > linux-next
> > > > seems to already include it.
> > > >
> > > > [1] https://lkml.org/lkml/2018/3/23/44
> >
> > > Thanks for the reference.
> >
> > > It looks like the iommu driver part is in Linus' tree already. The DT
> > part is
> > > in the v4.18-armsoc/dts32 branch of Heiko's tree. Am I missing
anything?
> >
> > You're right, most of the series made it in time for 4.17. However, the
DT
> > part (precisely, the clocks properties added to IOMMU nodes) is crucial
for
> > the fixes to be effective.
> >
> > > Anyway, I'll take a look.
> >
> > Thanks for testing. :) (Forgot to mention in my previous email...)
> I finally got around to testing. Unfortunately, kernel v4.17-rc6 with
> cherry-pick of commit c78751f91c0b (ARM: dts: rockchip: add clocks in
iommu
> nodes) from Heiko's tree still exhibit the same problem. STREAMON hangs on
> second try. The same workaround "fixes" it.
Thanks for testing. I'm out of ideas, since the same code seems to work
fine for us in Chrome OS 4.4 kernel. Maybe we could have someone from RK
take a look.
Best regards,
Tomasz
Re: [PATCH dts/arm/aspeed-g5 v1] ARM: dts: aspeed-g5: Add IPMI KCS node
Hello Andrew,
On 16 March 2018 at 11:17, Wang, Haiyue wrote:
> Hi Joel and Andrew,
>
> Have time to review this patch ? Hope for your comments. :-)
>
> BR,
> Haiyue
>
>
> On 2018-03-07 13:04, Haiyue Wang wrote:
>>
>> The IPMI KCS device part of the LPC interface and is used for
>> communication with the host processor.
>>
>> Signed-off-by: Haiyue Wang
Do you have time to take a look at these? The device tree doesn't make
sense to me.
Cheers,
Joel
>> ---
>> arch/arm/boot/dts/aspeed-g5.dtsi | 43
>> +++-
>> 1 file changed, 42 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi
>> b/arch/arm/boot/dts/aspeed-g5.dtsi
>> index 8eac57c..f443169 100644
>> --- a/arch/arm/boot/dts/aspeed-g5.dtsi
>> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
>> @@ -267,8 +267,40 @@
>> ranges = <0x0 0x1e789000 0x1000>;
>> lpc_bmc: lpc-bmc@0 {
>> - compatible =
>> "aspeed,ast2500-lpc-bmc";
>> + compatible =
>> "aspeed,ast2500-lpc-bmc", "simple-mfd", "syscon";
>> reg = <0x0 0x80>;
>> + reg-io-width = <4>;
>> +
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0x0 0x0 0x80>;
>> +
>> + kcs1: kcs1@0 {
>> + compatible =
>> "aspeed,ast2500-kcs-bmc";
>> + reg = <0x0 0x80>;
>> + interrupts = <8>;
>> + kcs_chan = <1>;
>> + kcs_addr = <0x0>;
>> + status = "disabled";
>> + };
>> +
>> + kcs2: kcs2@0 {
>> + compatible =
>> "aspeed,ast2500-kcs-bmc";
>> + reg = <0x0 0x80>;
>> + interrupts = <8>;
>> + kcs_chan = <2>;
>> + kcs_addr = <0x0>;
>> + status = "disabled";
>> + };
>> +
>> + kcs3: kcs3@0 {
>> + compatible =
>> "aspeed,ast2500-kcs-bmc";
>> + reg = <0x0 0x80>;
>> + interrupts = <8>;
>> + kcs_chan = <3>;
>> + kcs_addr = <0x0>;
>> + status = "disabled";
>> + };
>> };
>> lpc_host: lpc-host@80 {
>> @@ -294,6 +326,15 @@
>> status = "disabled";
>> };
>> + kcs4: kcs4@0 {
>> + compatible =
>> "aspeed,ast2500-kcs-bmc";
>> + reg = <0x0 0xa0>;
>> + interrupts = <8>;
>> + kcs_chan = <4>;
>> + kcs_addr = <0x0>;
>> + status = "disabled";
>> + };
>> +
>> lhc: lhc@20 {
>> compatible =
>> "aspeed,ast2500-lhc";
>> reg = <0x20 0x24 0x48
>> 0x8>;
>
>
Re: [PATCH v3 4/8] drm/mediatek: add ddp component AAL1
Hi, Stu:
On Fri, 2018-05-25 at 10:34 +0800, stu.hs...@mediatek.com wrote:
> From: Stu Hsieh
>
> This patch add component AAL1 and
> rename AAL to AAL0
>
> Signed-off-by: Stu Hsieh
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> index 0828cf8bf85c..eee3c0cc2632 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> @@ -41,7 +41,8 @@ enum mtk_ddp_comp_type {
> };
>
> enum mtk_ddp_comp_id {
> - DDP_COMPONENT_AAL,
> + DDP_COMPONENT_AAL0,
> + DDP_COMPONENT_AAL1,
Be sure compiling is success when you apply each patch of a series. I
think when you apply to this patch, it would cause compiling error
because some related modification is in the patch 'Add support for
mediatek SOC MT2712'. So move the modification from that patch to this
patch.
Regards,
CK
> DDP_COMPONENT_BLS,
> DDP_COMPONENT_COLOR0,
> DDP_COMPONENT_COLOR1,
Re: [PATCH v2 5/5] MAINTAINERS: Add Actions Semi S900 pinctrl entries
Am 23.05.2018 um 10:40 schrieb Linus Walleij: > On Sun, May 20, 2018 at 7:17 AM, Manivannan Sadhasivam > wrote: > >> Add S900 pinctrl entries under ARCH_ACTIONS >> >> Signed-off-by: Manivannan Sadhasivam > > Patch applied tentatively so we have some maintenance entry for this. > > Andreas expressed concerns about the driver earlier, so he might want it > split from the platform parts and have a separate entry for the pinctrl+GPIO > so Manivannan can maintain that part, also it makes sense to list > Manivannan as comaintainer of ARCH_ACTIONS with this in. > > Andreas: how would you like to proceed? > > I understand that I was a bit pushy or even rude in my last message > about the maintenance of this platform and the code structure of > the pin control driver. I am sorry if it caused any bad feelings on your > side :( social conflicts give me the creeps, I just try my best. Maybe > my best isn't always what it should be. I fail to understand how splitting the MAINTAINERS section is going to help with the pinctrl conflict at hand? The problem is that instead of refactoring my S500 pinctrl driver to his liking, Mani has submitted a competing S900 pinctrl driver that you went on to merge. The human aspect is that merging his driver took the credit away from me having written the earlier pinctrl driver (based on my rtd1295 pinctrl driver). The practical aspect is that I can't drop my pinctrl driver from my work branch until there is equivalent functionality in the merged driver. I am lacking the time to rewrite S500 pin definitions on top of Mani's myself at this time, and I haven't seen S500 patches from him yet. Also I had been investing efforts in explaining the upstreaming process to Actions, last in November. I see Thomas Liau and Jeff Chen missing in CC and I have not seen any Reviewed-by or Acked-by from anyone at Actions on this and the preceding series. There are more chips than the one on Linaro's 96board, so I would prefer to assure that the design works for all. Thus I am very critical of you applying the patches without waiting for review by Actions. Other aspects are: The reason I wrote the pinctrl driver is that I experienced a UART TX issue on the Sparky board and was hoping a pinctrl driver might resolve that, but it didn't. So I still have a mix of boards where some are working and some are pretty unusable, without any clues on why. That said, I don't object to having a separate MAINTAINERS section for the pinctrl driver(s) as long as I still get CC'ed on changes. We have wanted to add Mani as R for Actions overall, so that would probably mean adding me as R to an Actions pinctrl section, to avoid syncing the paths between two sections. I had previously felt that it does not make sense to list Mani as co-maintainer (M) for Actions overall since he can't tag and submit from my repo. And for the record I have offered him to take over which he didn't want to. I still hope to find some more time to review and queue his SPS patches, a driver that I have designed and thus understand and am much happier about the incremental additions there. A further side note is that I had reached out about setting up an infradead mailing list linux-actions, but there was no response from David or anyone. Having an L on the section(s) would avoid messing with R and hand-maintained CC lists. Any help with that appreciated. Regards, Andreas -- SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Felix Imendörffer, Jane Smithard, Graham Norton HRB 21284 (AG Nürnberg)
Re: [REVIEW][PATCH 0/6] Wrapping up the vfs support for unprivileged mounts
On Fri, May 25, 2018 at 01:57:16PM +1000, Dave Chinner wrote: > On Thu, May 24, 2018 at 06:23:30PM -0500, Eric W. Biederman wrote: > > "Theodore Y. Ts'o" writes: > > > > > On Wed, May 23, 2018 at 06:22:56PM -0500, Eric W. Biederman wrote: > > >> > > >> Very slowly the work has been progressing to ensure the vfs has the > > >> necessary support for mounting filesystems without privilege. > > > > > > What's the thinking behind how system administrators and/or file > > > systems would configure whether or not a particular file system type > > > will be allowed to be mounted w/o privilege? > > > > The mechanism is .fs_flags in file_system_type. If the FS_USERNS_MOUNT > > flag is set then root in a user namespace (AKA an unprivileged user) > > will be allowed to mount to mount the filesystem. > > > > There are very real concerns about attacking a filesystem with an > > invalid filesystem image, or by a malicious protocol speaker. So I > > don't want to enable anything without the file system maintainers > > consent and without a reasonable expecation that neither a system wide > > denial of service attack nor a privilege escalation attack is possible > > from if the filesystem is enabled. > > > > So at a practical level what we have in the vfs is the non-fuse specific > > bits that enable unprivileged mounts of fuse. Things like handling > > of unmapped uid and gids, how normally trusted xattrs are dealt with, > > etc. > > > > A big practical one for me is that if either the uid or gid is not > > mapped the vfs avoids writing to the inode. > > > > Right now my practical goal is to be able to say: "Go run your > > filesystem in userspace with fuse if you want stronger security > > guarantees." I think that will be enough to make removable media > > reasonably safe from privilege escalation attacks. > > > > There is enough code in most filesystems that I don't know what our > > chances of locking down very many of them are. But I figure a few more > > of them are possible. > > I'm not sure we need to - fusefs-lkl gives users the ability to > mount any of the kernel filesystems via fuse without us needing to > support unprivileged kernel mounts for those filesystems. /me wonders, is there a fusefs-lkl package for Linux? (He says, knowing that freebsd has one... :)) --D > Cheers, > > Dave. > -- > Dave Chinner > da...@fromorbit.com
Re: [PATCH v13 1/2] cpufreq: Add Kryo CPU scaling driver
On 25-05-18, 07:00, Ilia Lin wrote:
>
>
> On May 25, 2018 6:54:12 AM GMT+03:00, Viresh Kumar
> wrote:
> >On 24-05-18, 18:03, Ilia Lin wrote:
> >> +static int __init qcom_cpufreq_kryo_init(void)
> >> +{
> >> + struct device_node *np;
> >> + struct device *cpu_dev;
> >> + int ret;
> >> +
> >> + cpu_dev = get_cpu_device(0);
> >> + if (NULL == cpu_dev)
> >> + ret = -ENODEV;
> >> +
> >> + np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
> >> + if (IS_ERR(np))
> >> + return PTR_ERR(np);
> >> +
> >> + ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu");
> >> + of_node_put(np);
> >> + if (!ret)
> >> + return -ENOENT;
> >> +
> >
> >I hate the fact that it is taking so long to get done with this. But
> >can't you
> >just check machine compatibility instead of this complicated setup to
> >check OPP
> >node ? Like:
> >
> >if (!of_device_is_compatible("qcom,apq8096") &&
> >!of_device_is_compatible("qcom,msm8996"))
> >return;
>
> I have to check the "operating-points-v2-kryo-cpu" anyway, so I moved it from
> probe to the init.
Okay, leave it as is then. Don't send anything yet and wait for Sudeep to
respond.
> >
> >And please see if you can add an entry in MAINTAINERS and add your
> >working email
> >id there.
>
> Sure. Should this be part of the patch itself?
If you need to send another version of this series, then add it to this patch
itself. Else send it separately and don't resend this stuff.
--
viresh
[PATCH] arm64: defconfig: Enable UFS on msm8996
Enable GLINK RPM so that we get RPM regulators and clocks and enable the UFS host controller driver and the Qualcomm UFS platform driver. The UFS phy is selected by the Qualcomm UFS driver. The simple ondemand devfreq governor must be builtin, as there's no mechanism for automatically loading it, causing UFS HCD initialization to fail. Signed-off-by: Bjorn Andersson --- arch/arm64/configs/defconfig | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 329950545603..895b2d92124d 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -191,6 +191,9 @@ CONFIG_BLK_DEV_SD=y CONFIG_SCSI_SAS_ATA=y CONFIG_SCSI_HISI_SAS=y CONFIG_SCSI_HISI_SAS_PCI=y +CONFIG_SCSI_UFSHCD=m +CONFIG_SCSI_UFSHCD_PLATFORM=m +CONFIG_SCSI_UFS_QCOM=m CONFIG_ATA=y CONFIG_SATA_AHCI=y CONFIG_SATA_AHCI_PLATFORM=y @@ -574,6 +577,7 @@ CONFIG_TEGRA_IOMMU_SMMU=y CONFIG_ARM_SMMU=y CONFIG_ARM_SMMU_V3=y CONFIG_QCOM_IOMMU=y +CONFIG_RPMSG_QCOM_GLINK_RPM=y CONFIG_RPMSG_QCOM_SMD=y CONFIG_RASPBERRYPI_POWER=y CONFIG_QCOM_SMEM=y @@ -585,6 +589,7 @@ CONFIG_ARCH_TEGRA_132_SOC=y CONFIG_ARCH_TEGRA_210_SOC=y CONFIG_ARCH_TEGRA_186_SOC=y CONFIG_ARCH_TEGRA_194_SOC=y +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y CONFIG_EXTCON_USB_GPIO=y CONFIG_EXTCON_USBC_CROS_EC=y CONFIG_MEMORY=y -- 2.17.0
[PATCH v5 1/1] PCI: kirin: Add MSI support
Add support for MSI.
Signed-off-by: Xiaowei Song
---
drivers/pci/dwc/pcie-kirin.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/pci/dwc/pcie-kirin.c b/drivers/pci/dwc/pcie-kirin.c
index d2970a009eb5..6997276eb69c 100644
--- a/drivers/pci/dwc/pcie-kirin.c
+++ b/drivers/pci/dwc/pcie-kirin.c
@@ -430,6 +430,9 @@ static int kirin_pcie_host_init(struct pcie_port *pp)
{
kirin_pcie_establish_link(pp);
+ if (IS_ENABLED(CONFIG_PCI_MSI))
+ dw_pcie_msi_init(pp);
+
return 0;
}
@@ -445,9 +448,34 @@ static const struct dw_pcie_host_ops kirin_pcie_host_ops =
{
.host_init = kirin_pcie_host_init,
};
+static int kirin_pcie_add_msi(struct dw_pcie *pci,
+ struct platform_device *pdev)
+{
+ int ret = 0;
+
+ if (IS_ENABLED(CONFIG_PCI_MSI)) {
+ ret = platform_get_irq(pdev, 0);
+ if (ret < 0) {
+ dev_err(&pdev->dev,
+ "failed to get MSI IRQ (%d)\n", ret);
+ return ret;
+ }
+
+ pci->pp.msi_irq = ret;
+ }
+
+ return ret;
+}
+
static int __init kirin_add_pcie_port(struct dw_pcie *pci,
struct platform_device *pdev)
{
+ int ret;
+
+ ret = kirin_pcie_add_msi(pci, pdev);
+ if (ret)
+ return ret;
+
pci->pp.ops = &kirin_pcie_host_ops;
return dw_pcie_host_init(&pci->pp);
--
2.11.GIT
[PATCH v5 0/1] *** PCI: kirin: Add MSI support ***
Before Version Patches == patch v4 https://patchwork.kernel.org/patch/10402399/ patch v3 https://www.spinics.net/lists/linux-pci/msg72322.html patch v2 https://www.spinics.net/lists/kernel/msg2797610.html patch v1 https://www.spinics.net/lists/kernel/msg2796410.html Changes between V5 and V4 = 1. rebase the patch based on Linux next-version branch. 2. fix issues according to review comments from Andy Shevchenko and Lorenzo. (1) Del MSI irq handler for DW handle it, while Kirin only read the number from DT, (2) Use the function dw_pcie_msi_init directly if CONFIG_PCI_MSI is enabled. Changes between V4 and V3 = 1. remove DT binding patch, for Wei Xu had applied it. 2. fix issues according to review comments from Andy Shevchenko. (1) Take the msi number get and request as a seperate function, (2) Use the result of platform_get_irq as return val. Changes between V3 and V2 = 1. fix issues according to review comments (1)from Bjorn Helgaas: Check for 'pci->pp.msi_irq < 0'. (2)from Bjorn Helgaas: Update the message of 'msi irq' in dev_err(). Changes between V2 and V1 = 1. seperate DT binding patch. 2. fix issues according to review comments (1)from Bjorn Helgaas: Update the style of subject and changelog. (2)from Bjorn Helgaas: Add msi irq number in the message. (3)from Bjorn Helgaas: Delete unnecessary code 'pci->pp.root_bus_nr = -1'. (4)from Dmitry Shmidt: Fix typing error. Replace 'interrupts-names' of 'interrupt-names'. Xiaowei Song (1): PCI: kirin: Add MSI support drivers/pci/dwc/pcie-kirin.c | 28 1 file changed, 28 insertions(+) -- 2.11.GIT
Re: [REVIEW][PATCH 0/6] Wrapping up the vfs support for unprivileged mounts
On Thu, May 24, 2018 at 06:23:30PM -0500, Eric W. Biederman wrote: > "Theodore Y. Ts'o" writes: > > > On Wed, May 23, 2018 at 06:22:56PM -0500, Eric W. Biederman wrote: > >> > >> Very slowly the work has been progressing to ensure the vfs has the > >> necessary support for mounting filesystems without privilege. > > > > What's the thinking behind how system administrators and/or file > > systems would configure whether or not a particular file system type > > will be allowed to be mounted w/o privilege? > > The mechanism is .fs_flags in file_system_type. If the FS_USERNS_MOUNT > flag is set then root in a user namespace (AKA an unprivileged user) > will be allowed to mount to mount the filesystem. > > There are very real concerns about attacking a filesystem with an > invalid filesystem image, or by a malicious protocol speaker. So I > don't want to enable anything without the file system maintainers > consent and without a reasonable expecation that neither a system wide > denial of service attack nor a privilege escalation attack is possible > from if the filesystem is enabled. > > So at a practical level what we have in the vfs is the non-fuse specific > bits that enable unprivileged mounts of fuse. Things like handling > of unmapped uid and gids, how normally trusted xattrs are dealt with, > etc. > > A big practical one for me is that if either the uid or gid is not > mapped the vfs avoids writing to the inode. > > Right now my practical goal is to be able to say: "Go run your > filesystem in userspace with fuse if you want stronger security > guarantees." I think that will be enough to make removable media > reasonably safe from privilege escalation attacks. > > There is enough code in most filesystems that I don't know what our > chances of locking down very many of them are. But I figure a few more > of them are possible. I'm not sure we need to - fusefs-lkl gives users the ability to mount any of the kernel filesystems via fuse without us needing to support unprivileged kernel mounts for those filesystems. Cheers, Dave. -- Dave Chinner da...@fromorbit.com
Re: [PATCH -next 0/6] rhashtable: guarantee first allocation
On Thu, 24 May 2018, Linus Torvalds wrote: On Thu, May 24, 2018 at 2:28 PM Davidlohr Bueso wrote: 10 files changed, 79 insertions(+), 86 deletions(-) I certainly can't complain about this small code removal, but I think if we did the kvmalloc_node() cleanup, we'd be able to get rid of even more. For example, bucket_table_alloc() does that if (gfp != GFP_KERNEL) tbl = kzalloc(size, gfp | __GFP_NOWARN | __GFP_NORETRY); else tbl = kvzalloc(size, gfp); purely due to the kvalloc_node() oddity. Wouldn't it be nice to just write it as tbl = kvzalloc(size, gfp); knowing that the whole point of all the kv*alloc*() functions is to "just do the right thing given size, gpf mask, and ease of allocation". Yes this makes a lot of sense. I'll see about adding it on top. Thanks, Davidlohr
[RESEND PATCH V5 23/33] ext4: conver to bio_for_each_page_all2
bio_for_each_page_all() can't be used any more after multipage bvec is
enabled, so we have to convert to bio_for_each_page_all2().
Signed-off-by: Ming Lei
---
fs/ext4/page-io.c | 3 ++-
fs/ext4/readpage.c | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/fs/ext4/page-io.c b/fs/ext4/page-io.c
index 52f2937f5603..b56a733f33c0 100644
--- a/fs/ext4/page-io.c
+++ b/fs/ext4/page-io.c
@@ -63,8 +63,9 @@ static void ext4_finish_bio(struct bio *bio)
{
int i;
struct bio_vec *bvec;
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
struct page *page = bvec->bv_page;
#ifdef CONFIG_EXT4_FS_ENCRYPTION
struct page *data_page = NULL;
diff --git a/fs/ext4/readpage.c b/fs/ext4/readpage.c
index 572b6296f709..c46b5ff68fa8 100644
--- a/fs/ext4/readpage.c
+++ b/fs/ext4/readpage.c
@@ -72,6 +72,7 @@ static void mpage_end_io(struct bio *bio)
{
struct bio_vec *bv;
int i;
+ struct bvec_iter_all bia;
if (ext4_bio_encrypted(bio)) {
if (bio->bi_status) {
@@ -81,7 +82,7 @@ static void mpage_end_io(struct bio *bio)
return;
}
}
- bio_for_each_page_all(bv, bio, i) {
+ bio_for_each_page_all2(bv, bio, i, bia) {
struct page *page = bv->bv_page;
if (!bio->bi_status) {
--
2.9.5
Re: [PATCH v13 1/2] cpufreq: Add Kryo CPU scaling driver
On 24-05-18, 18:03, Ilia Lin wrote:
> +static int __init qcom_cpufreq_kryo_init(void)
> +{
> + struct device_node *np;
> + struct device *cpu_dev;
> + int ret;
> +
> + cpu_dev = get_cpu_device(0);
> + if (NULL == cpu_dev)
> + ret = -ENODEV;
> +
> + np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
> + if (IS_ERR(np))
> + return PTR_ERR(np);
> +
> + ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu");
> + of_node_put(np);
> + if (!ret)
> + return -ENOENT;
> +
I hate the fact that it is taking so long to get done with this. But can't you
just check machine compatibility instead of this complicated setup to check OPP
node ? Like:
if (!of_device_is_compatible("qcom,apq8096") &&
!of_device_is_compatible("qcom,msm8996"))
return;
And please see if you can add an entry in MAINTAINERS and add your working email
id there.
--
viresh
[RESEND PATCH V5 30/33] block: enable multipage bvecs
This patch pulls the trigger for multipage bvecs.
Now any request queue which supports queue cluster will see multipage
bvecs.
Signed-off-by: Ming Lei
---
block/bio.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/block/bio.c b/block/bio.c
index c160c143cc1b..bc3992f52fe8 100644
--- a/block/bio.c
+++ b/block/bio.c
@@ -876,6 +876,11 @@ int bio_add_page(struct bio *bio, struct page *page,
* a consecutive offset. Optimize this special case.
*/
if (bio->bi_vcnt > 0) {
+ struct request_queue *q = NULL;
+
+ if (bio->bi_disk)
+ q = bio->bi_disk->queue;
+
bv = &bio->bi_io_vec[bio->bi_vcnt - 1];
if (page == bv->bv_page &&
@@ -883,6 +888,14 @@ int bio_add_page(struct bio *bio, struct page *page,
bv->bv_len += len;
goto done;
}
+
+ /* disable multipage bvec too if cluster isn't enabled */
+ if (q && blk_queue_cluster(q) &&
+ (bvec_to_phys(bv) + bv->bv_len ==
+page_to_phys(page) + offset)) {
+ bv->bv_len += len;
+ goto done;
+ }
}
if (bio->bi_vcnt >= bio->bi_max_vecs)
--
2.9.5
[RESEND PATCH V5 29/33] block: rename bio_for_each_page_all2 as bio_for_each_page_all
Now bio_for_each_page_all() is gone, we can reuse the name to iterate
bio page by page, which is done via bio_for_each_page_all2() now.
Signed-off-by: Ming Lei
---
block/bio.c | 14 +++---
block/blk-zoned.c | 4 ++--
block/bounce.c| 4 ++--
drivers/md/bcache/btree.c | 2 +-
drivers/md/dm-crypt.c | 2 +-
drivers/md/raid1.c| 2 +-
fs/block_dev.c| 4 ++--
fs/btrfs/compression.c| 2 +-
fs/btrfs/disk-io.c| 2 +-
fs/btrfs/extent_io.c | 6 +++---
fs/btrfs/inode.c | 4 ++--
fs/btrfs/raid56.c | 2 +-
fs/crypto/bio.c | 2 +-
fs/direct-io.c| 2 +-
fs/exofs/ore.c| 2 +-
fs/exofs/ore_raid.c | 2 +-
fs/ext4/page-io.c | 2 +-
fs/ext4/readpage.c| 2 +-
fs/f2fs/data.c| 6 +++---
fs/gfs2/lops.c| 2 +-
fs/gfs2/meta_io.c | 2 +-
fs/iomap.c| 2 +-
fs/mpage.c| 2 +-
fs/xfs/xfs_aops.c | 2 +-
include/linux/bio.h | 4 ++--
include/linux/bvec.h | 2 +-
26 files changed, 41 insertions(+), 41 deletions(-)
diff --git a/block/bio.c b/block/bio.c
index a14c854b9111..c160c143cc1b 100644
--- a/block/bio.c
+++ b/block/bio.c
@@ -1121,7 +1121,7 @@ static int bio_copy_from_iter(struct bio *bio, struct
iov_iter *iter)
struct bio_vec *bvec;
struct bvec_iter_all bia;
- bio_for_each_page_all2(bvec, bio, i, bia) {
+ bio_for_each_page_all(bvec, bio, i, bia) {
ssize_t ret;
ret = copy_page_from_iter(bvec->bv_page,
@@ -1153,7 +1153,7 @@ static int bio_copy_to_iter(struct bio *bio, struct
iov_iter iter)
struct bio_vec *bvec;
struct bvec_iter_all bia;
- bio_for_each_page_all2(bvec, bio, i, bia) {
+ bio_for_each_page_all(bvec, bio, i, bia) {
ssize_t ret;
ret = copy_page_to_iter(bvec->bv_page,
@@ -1177,7 +1177,7 @@ void bio_free_pages(struct bio *bio)
int i;
struct bvec_iter_all bia;
- bio_for_each_page_all2(bvec, bio, i, bia)
+ bio_for_each_page_all(bvec, bio, i, bia)
__free_page(bvec->bv_page);
}
EXPORT_SYMBOL(bio_free_pages);
@@ -1417,7 +1417,7 @@ struct bio *bio_map_user_iov(struct request_queue *q,
return bio;
out_unmap:
- bio_for_each_page_all2(bvec, bio, j, bia) {
+ bio_for_each_page_all(bvec, bio, j, bia) {
put_page(bvec->bv_page);
}
bio_put(bio);
@@ -1433,7 +1433,7 @@ static void __bio_unmap_user(struct bio *bio)
/*
* make sure we dirty pages we wrote to
*/
- bio_for_each_page_all2(bvec, bio, i, bia) {
+ bio_for_each_page_all(bvec, bio, i, bia) {
if (bio_data_dir(bio) == READ)
set_page_dirty_lock(bvec->bv_page);
@@ -1527,7 +1527,7 @@ static void bio_copy_kern_endio_read(struct bio *bio)
int i;
struct bvec_iter_all bia;
- bio_for_each_page_all2(bvec, bio, i, bia) {
+ bio_for_each_page_all(bvec, bio, i, bia) {
memcpy(p, page_address(bvec->bv_page), bvec->bv_len);
p += bvec->bv_len;
}
@@ -1638,7 +1638,7 @@ void bio_set_pages_dirty(struct bio *bio)
int i;
struct bvec_iter_all bia;
- bio_for_each_page_all2(bvec, bio, i, bia) {
+ bio_for_each_page_all(bvec, bio, i, bia) {
struct page *page = bvec->bv_page;
if (page && !PageCompound(page))
diff --git a/block/blk-zoned.c b/block/blk-zoned.c
index a76053d6fd6c..b7c182b0d805 100644
--- a/block/blk-zoned.c
+++ b/block/blk-zoned.c
@@ -191,7 +191,7 @@ int blkdev_report_zones(struct block_device *bdev,
n = 0;
nz = 0;
nr_rep = 0;
- bio_for_each_page_all2(bv, bio, i, bia) {
+ bio_for_each_page_all(bv, bio, i, bia) {
if (!bv->bv_page)
break;
@@ -224,7 +224,7 @@ int blkdev_report_zones(struct block_device *bdev,
*nr_zones = nz;
out:
- bio_for_each_page_all2(bv, bio, i, bia)
+ bio_for_each_page_all(bv, bio, i, bia)
__free_page(bv->bv_page);
bio_put(bio);
diff --git a/block/bounce.c b/block/bounce.c
index 8b14683f4061..da9fcf1a07d7 100644
--- a/block/bounce.c
+++ b/block/bounce.c
@@ -148,7 +148,7 @@ static void bounce_end_io(struct bio *bio, mempool_t *pool)
/*
* free up bounce indirect pages used
*/
- bio_for_each_page_all2(bvec, bio, i, bia) {
+ bio_for_each_page_all(bvec, bio, i, bia) {
orig_vec = bio_iter_iovec(bio_orig, orig_iter);
if (bvec->bv_page != orig_vec.bv_page) {
dec_zone_page_state(bvec->bv_page, NR_BOUNCE);
@@ -224,7 +224,7 @@ static void __blk_queue_bounce(struct request_queue *q,
struct bio **bio_orig,
bio = bio_clone_bioset(*bio_orig, GFP_NOIO, passthrough ? NULL :
[PATCH net-next] net: dsa: dsa_loop: Make dynamic debugging helpful
Remove redundant debug prints from phy_read/write since we can trace those
calls through trace events. Enhance dynamic debug prints to print arguments
which helps figuring how what is going on at the driver level with higher level
configuration interfaces.
Signed-off-by: Florian Fainelli
---
drivers/net/dsa/dsa_loop.c | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/drivers/net/dsa/dsa_loop.c b/drivers/net/dsa/dsa_loop.c
index 58f14af04639..816f34d64736 100644
--- a/drivers/net/dsa/dsa_loop.c
+++ b/drivers/net/dsa/dsa_loop.c
@@ -67,7 +67,7 @@ static struct phy_device *phydevs[PHY_MAX_ADDR];
static enum dsa_tag_protocol dsa_loop_get_protocol(struct dsa_switch *ds,
int port)
{
- dev_dbg(ds->dev, "%s\n", __func__);
+ dev_dbg(ds->dev, "%s: port: %d\n", __func__, port);
return DSA_TAG_PROTO_NONE;
}
@@ -124,8 +124,6 @@ static int dsa_loop_phy_read(struct dsa_switch *ds, int
port, int regnum)
struct mii_bus *bus = ps->bus;
int ret;
- dev_dbg(ds->dev, "%s\n", __func__);
-
ret = mdiobus_read_nested(bus, ps->port_base + port, regnum);
if (ret < 0)
ps->ports[port].mib[DSA_LOOP_PHY_READ_ERR].val++;
@@ -142,8 +140,6 @@ static int dsa_loop_phy_write(struct dsa_switch *ds, int
port,
struct mii_bus *bus = ps->bus;
int ret;
- dev_dbg(ds->dev, "%s\n", __func__);
-
ret = mdiobus_write_nested(bus, ps->port_base + port, regnum, value);
if (ret < 0)
ps->ports[port].mib[DSA_LOOP_PHY_WRITE_ERR].val++;
@@ -156,7 +152,8 @@ static int dsa_loop_phy_write(struct dsa_switch *ds, int
port,
static int dsa_loop_port_bridge_join(struct dsa_switch *ds, int port,
struct net_device *bridge)
{
- dev_dbg(ds->dev, "%s\n", __func__);
+ dev_dbg(ds->dev, "%s: port: %d, bridge: %s\n",
+ __func__, port, bridge->name);
return 0;
}
@@ -164,19 +161,22 @@ static int dsa_loop_port_bridge_join(struct dsa_switch
*ds, int port,
static void dsa_loop_port_bridge_leave(struct dsa_switch *ds, int port,
struct net_device *bridge)
{
- dev_dbg(ds->dev, "%s\n", __func__);
+ dev_dbg(ds->dev, "%s: port: %d, bridge: %s\n",
+ __func__, port, bridge->name);
}
static void dsa_loop_port_stp_state_set(struct dsa_switch *ds, int port,
u8 state)
{
- dev_dbg(ds->dev, "%s\n", __func__);
+ dev_dbg(ds->dev, "%s: port: %d, state: %d\n",
+ __func__, port, state);
}
static int dsa_loop_port_vlan_filtering(struct dsa_switch *ds, int port,
bool vlan_filtering)
{
- dev_dbg(ds->dev, "%s\n", __func__);
+ dev_dbg(ds->dev, "%s: port: %d, vlan_filtering: %d\n",
+ __func__, port, vlan_filtering);
return 0;
}
@@ -188,7 +188,8 @@ dsa_loop_port_vlan_prepare(struct dsa_switch *ds, int port,
struct dsa_loop_priv *ps = ds->priv;
struct mii_bus *bus = ps->bus;
- dev_dbg(ds->dev, "%s\n", __func__);
+ dev_dbg(ds->dev, "%s: port: %d, vlan: %d-%d",
+ __func__, port, vlan->vid_begin, vlan->vid_end);
/* Just do a sleeping operation to make lockdep checks effective */
mdiobus_read(bus, ps->port_base + port, MII_BMSR);
@@ -209,8 +210,6 @@ static void dsa_loop_port_vlan_add(struct dsa_switch *ds,
int port,
struct dsa_loop_vlan *vl;
u16 vid;
- dev_dbg(ds->dev, "%s\n", __func__);
-
/* Just do a sleeping operation to make lockdep checks effective */
mdiobus_read(bus, ps->port_base + port, MII_BMSR);
@@ -222,6 +221,9 @@ static void dsa_loop_port_vlan_add(struct dsa_switch *ds,
int port,
vl->untagged |= BIT(port);
else
vl->untagged &= ~BIT(port);
+
+ dev_dbg(ds->dev, "%s: port: %d vlan: %d, %stagged, pvid: %d\n",
+ __func__, port, vid, untagged ? "un" : "", pvid);
}
if (pvid)
@@ -237,8 +239,6 @@ static int dsa_loop_port_vlan_del(struct dsa_switch *ds,
int port,
struct dsa_loop_vlan *vl;
u16 vid, pvid = ps->pvid;
- dev_dbg(ds->dev, "%s\n", __func__);
-
/* Just do a sleeping operation to make lockdep checks effective */
mdiobus_read(bus, ps->port_base + port, MII_BMSR);
@@ -251,6 +251,9 @@ static int dsa_loop_port_vlan_del(struct dsa_switch *ds,
int port,
if (pvid == vid)
pvid = 1;
+
+ dev_dbg(ds->dev, "%s: port: %d vlan: %d, %stagged, pvid: %d\n",
+ __func__, port, vid, untagged ? "un" : "", pvid);
}
ps->pvid = pvid;
--
2.14.1
[RESEND PATCH V5 28/33] block: kill bio_for_each_page_all()
No one uses it any more, so kill it and we can reuse this helper name. Signed-off-by: Ming Lei --- include/linux/bio.h | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/include/linux/bio.h b/include/linux/bio.h index 5ae2bc876295..c5e692d43f23 100644 --- a/include/linux/bio.h +++ b/include/linux/bio.h @@ -159,8 +159,10 @@ static inline void *bio_data(struct bio *bio) /* * drivers should _never_ use the all version - the bio may have been split * before it got to the driver and the driver won't own all of it + * + * This helper iterates bio segment by segment. */ -#define bio_for_each_page_all(bvl, bio, i) \ +#define bio_for_each_segment_all(bvl, bio, i) \ for (i = 0, bvl = (bio)->bi_io_vec; i < (bio)->bi_vcnt; i++, bvl++) static inline void __bio_advance_iter(struct bio *bio, struct bvec_iter *iter, @@ -225,9 +227,6 @@ static inline bool bio_rewind_iter(struct bio *bio, struct bvec_iter *iter, #define bio_for_each_segment(bvl, bio, iter) \ __bio_for_each_segment(bvl, bio, iter, (bio)->bi_iter) -#define bio_for_each_segment_all(bvl, bio, i) \ - bio_for_each_page_all((bvl), (bio), (i)) - /* * This helper returns singlepage bvec to caller, and the sp bvec is * generated in-flight from multipage bvec stored in bvec table. So we -- 2.9.5
[RESEND PATCH V5 31/33] block: bio: pass segments to bio if bio_add_page() is bypassed
Under some situations, such as block direct I/O, we can't use
bio_add_page() for merging pages into multipage bvec, so
a new function is implemented for converting page array into one
segment array, then these cases can benefit from multipage bvec
too.
Signed-off-by: Ming Lei
---
block/bio.c | 54 --
1 file changed, 48 insertions(+), 6 deletions(-)
diff --git a/block/bio.c b/block/bio.c
index bc3992f52fe8..b7d9089cb28f 100644
--- a/block/bio.c
+++ b/block/bio.c
@@ -913,6 +913,41 @@ int bio_add_page(struct bio *bio, struct page *page,
}
EXPORT_SYMBOL(bio_add_page);
+static unsigned convert_to_segs(struct bio* bio, struct page **pages,
+ unsigned char *page_cnt,
+ unsigned nr_pages)
+{
+
+ unsigned idx;
+ unsigned nr_seg = 0;
+ struct request_queue *q = NULL;
+
+ if (bio->bi_disk)
+ q = bio->bi_disk->queue;
+
+ if (!q || !blk_queue_cluster(q)) {
+ memset(page_cnt, 0, nr_pages);
+ return nr_pages;
+ }
+
+ page_cnt[nr_seg] = 0;
+ for (idx = 1; idx < nr_pages; idx++) {
+ struct page *pg_s = pages[nr_seg];
+ struct page *pg = pages[idx];
+
+ if (page_to_pfn(pg_s) + page_cnt[nr_seg] + 1 ==
+ page_to_pfn(pg)) {
+ page_cnt[nr_seg]++;
+ } else {
+ page_cnt[++nr_seg] = 0;
+ if (nr_seg < idx)
+ pages[nr_seg] = pg;
+ }
+ }
+
+ return nr_seg + 1;
+}
+
/**
* bio_iov_iter_get_pages - pin user or kernel pages and add them to a bio
* @bio: bio to add pages to
@@ -928,6 +963,8 @@ int bio_iov_iter_get_pages(struct bio *bio, struct iov_iter
*iter)
struct page **pages = (struct page **)bv;
size_t offset, diff;
ssize_t size;
+ unsigned short nr_segs;
+ unsigned char page_cnt[nr_pages]; /* at most 256 pages */
size = iov_iter_get_pages(iter, pages, LONG_MAX, nr_pages, &offset);
if (unlikely(size <= 0))
@@ -943,13 +980,18 @@ int bio_iov_iter_get_pages(struct bio *bio, struct
iov_iter *iter)
* need to be reflected here as well.
*/
bio->bi_iter.bi_size += size;
- bio->bi_vcnt += nr_pages;
-
diff = (nr_pages * PAGE_SIZE - offset) - size;
- while (nr_pages--) {
- bv[nr_pages].bv_page = pages[nr_pages];
- bv[nr_pages].bv_len = PAGE_SIZE;
- bv[nr_pages].bv_offset = 0;
+
+ /* convert into segments */
+ nr_segs = convert_to_segs(bio, pages, page_cnt, nr_pages);
+ bio->bi_vcnt += nr_segs;
+
+ while (nr_segs--) {
+ unsigned cnt = (unsigned)page_cnt[nr_segs] + 1;
+
+ bv[nr_segs].bv_page = pages[nr_segs];
+ bv[nr_segs].bv_len = PAGE_SIZE * cnt;
+ bv[nr_segs].bv_offset = 0;
}
bv[0].bv_offset += offset;
--
2.9.5
[RESEND PATCH V5 33/33] block: document usage of bio iterator helpers
Now multipage bvec is supported, and some helpers may return page by page, and some may return segment by segment, this patch documents the usage for helping us use them correctly. Signed-off-by: Ming Lei --- Documentation/block/biovecs.txt | 32 1 file changed, 32 insertions(+) diff --git a/Documentation/block/biovecs.txt b/Documentation/block/biovecs.txt index b4d238b8d9fc..32a6643caeca 100644 --- a/Documentation/block/biovecs.txt +++ b/Documentation/block/biovecs.txt @@ -117,3 +117,35 @@ Other implications: size limitations and the limitations of the underlying devices. Thus there's no need to define ->merge_bvec_fn() callbacks for individual block drivers. + +Usage of helpers: += + +* The following helpers which name has suffix of "_all" can only be used on +non-BIO_CLONED bio, and ususally they are used by filesystem code, and driver +shouldn't use them becasue bio may have been splitted before they got to the +driver: + + bio_for_each_segment_all() + bio_for_each_page_all() + bio_pages_all() + bio_first_bvec_all() + bio_first_page_all() + bio_last_bvec_all() + segment_for_each_page_all() + +* The following helpers iterate bio page by page, and the local variable of +'struct bio_vec' or the reference records single page io vector during the +itearation: + + bio_for_each_page() + bio_for_each_page_all() + segment_for_each_page_all() + +* The following helpers iterate bio segment by segment, and each segment may +include multiple physically contiguous pages, and the local variable of +'struct bio_vec' or the reference records multi page io vector during the +itearation: + + bio_for_each_segment() + bio_for_each_segment_all() -- 2.9.5
[RESEND PATCH V5 32/33] block: always define BIO_MAX_PAGES as 256
Now multipage bvec can cover CONFIG_THP_SWAP, so we don't need to increase BIO_MAX_PAGES for it. Signed-off-by: Ming Lei --- include/linux/bio.h | 8 1 file changed, 8 deletions(-) diff --git a/include/linux/bio.h b/include/linux/bio.h index fc8a8238805e..839dddf81d09 100644 --- a/include/linux/bio.h +++ b/include/linux/bio.h @@ -38,15 +38,7 @@ #define BIO_BUG_ON #endif -#ifdef CONFIG_THP_SWAP -#if HPAGE_PMD_NR > 256 -#define BIO_MAX_PAGES HPAGE_PMD_NR -#else #define BIO_MAX_PAGES 256 -#endif -#else -#define BIO_MAX_PAGES 256 -#endif #define bio_prio(bio) (bio)->bi_ioprio #define bio_set_prio(bio, prio)((bio)->bi_ioprio = prio) -- 2.9.5
[RESEND PATCH V5 22/33] btrfs: conver to bio_for_each_page_all2
bio_for_each_page_all() can't be used any more after multipage bvec is
enabled, so we have to convert to bio_for_each_page_all2().
Signed-off-by: Ming Lei
---
fs/btrfs/compression.c | 3 ++-
fs/btrfs/disk-io.c | 3 ++-
fs/btrfs/extent_io.c | 9 ++---
fs/btrfs/inode.c | 6 --
fs/btrfs/raid56.c | 3 ++-
5 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/fs/btrfs/compression.c b/fs/btrfs/compression.c
index be6b09dfd6a7..4cfe38feae3b 100644
--- a/fs/btrfs/compression.c
+++ b/fs/btrfs/compression.c
@@ -166,13 +166,14 @@ static void end_compressed_bio_read(struct bio *bio)
} else {
int i;
struct bio_vec *bvec;
+ struct bvec_iter_all bia;
/*
* we have verified the checksum already, set page
* checked so the end_io handlers know about it
*/
ASSERT(!bio_flagged(bio, BIO_CLONED));
- bio_for_each_page_all(bvec, cb->orig_bio, i)
+ bio_for_each_page_all2(bvec, cb->orig_bio, i, bia)
SetPageChecked(bvec->bv_page);
bio_endio(cb->orig_bio);
diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index c6dc8a636413..ef78fd71c2f7 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -829,9 +829,10 @@ static blk_status_t btree_csum_one_bio(struct bio *bio)
struct bio_vec *bvec;
struct btrfs_root *root;
int i, ret = 0;
+ struct bvec_iter_all bia;
ASSERT(!bio_flagged(bio, BIO_CLONED));
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
root = BTRFS_I(bvec->bv_page->mapping->host)->root;
ret = csum_dirty_buffer(root->fs_info, bvec->bv_page);
if (ret)
diff --git a/fs/btrfs/extent_io.c b/fs/btrfs/extent_io.c
index 3c9c91a1e3e9..383db7a7e5a4 100644
--- a/fs/btrfs/extent_io.c
+++ b/fs/btrfs/extent_io.c
@@ -2456,9 +2456,10 @@ static void end_bio_extent_writepage(struct bio *bio)
u64 start;
u64 end;
int i;
+ struct bvec_iter_all bia;
ASSERT(!bio_flagged(bio, BIO_CLONED));
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
struct page *page = bvec->bv_page;
struct inode *inode = page->mapping->host;
struct btrfs_fs_info *fs_info = btrfs_sb(inode->i_sb);
@@ -2527,9 +2528,10 @@ static void end_bio_extent_readpage(struct bio *bio)
int mirror;
int ret;
int i;
+ struct bvec_iter_all bia;
ASSERT(!bio_flagged(bio, BIO_CLONED));
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
struct page *page = bvec->bv_page;
struct inode *inode = page->mapping->host;
struct btrfs_fs_info *fs_info = btrfs_sb(inode->i_sb);
@@ -3681,9 +3683,10 @@ static void end_bio_extent_buffer_writepage(struct bio
*bio)
struct bio_vec *bvec;
struct extent_buffer *eb;
int i, done;
+ struct bvec_iter_all bia;
ASSERT(!bio_flagged(bio, BIO_CLONED));
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
struct page *page = bvec->bv_page;
eb = (struct extent_buffer *)page->private;
diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c
index 9d816dc725c4..8a73b26915bc 100644
--- a/fs/btrfs/inode.c
+++ b/fs/btrfs/inode.c
@@ -7883,6 +7883,7 @@ static void btrfs_retry_endio_nocsum(struct bio *bio)
struct bio_vec *bvec;
struct extent_io_tree *io_tree, *failure_tree;
int i;
+ struct bvec_iter_all bia;
if (bio->bi_status)
goto end;
@@ -7894,7 +7895,7 @@ static void btrfs_retry_endio_nocsum(struct bio *bio)
done->uptodate = 1;
ASSERT(!bio_flagged(bio, BIO_CLONED));
- bio_for_each_page_all(bvec, bio, i)
+ bio_for_each_page_all2(bvec, bio, i, bia)
clean_io_failure(BTRFS_I(inode)->root->fs_info, failure_tree,
io_tree, done->start, bvec->bv_page,
btrfs_ino(BTRFS_I(inode)), 0);
@@ -7973,6 +7974,7 @@ static void btrfs_retry_endio(struct bio *bio)
int uptodate;
int ret;
int i;
+ struct bvec_iter_all bia;
if (bio->bi_status)
goto end;
@@ -7986,7 +7988,7 @@ static void btrfs_retry_endio(struct bio *bio)
failure_tree = &BTRFS_I(inode)->io_failure_tree;
ASSERT(!bio_flagged(bio, BIO_CLONED));
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
ret = __readpage_endio_check(inode, io_bio, i, bvec->bv_page,
bvec->bv_offset, done->start,
bvec->bv_len);
diff
[PATCH] powerpc/modules: remove unused mod_arch_specific.toc field
The toc field in the mod_arch_specific struct isn't actually used
anywhere, so remove it.
Also the ftrace-specific fields are now common between 32-bit and
64-bit, so simplify the struct definition a bit by moving them out of
the __powerpc64__ #ifdef.
Signed-off-by: Josh Poimboeuf
---
arch/powerpc/include/asm/module.h | 13 +
arch/powerpc/kernel/module_64.c | 1 -
2 files changed, 5 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/module.h
b/arch/powerpc/include/asm/module.h
index 18f7214d68b7..d8374f984f39 100644
--- a/arch/powerpc/include/asm/module.h
+++ b/arch/powerpc/include/asm/module.h
@@ -50,13 +50,6 @@ struct mod_arch_specific {
unsigned int stubs_section; /* Index of stubs section in module */
unsigned int toc_section; /* What section is the TOC? */
bool toc_fixed; /* Have we fixed up .TOC.? */
-#ifdef CONFIG_DYNAMIC_FTRACE
- unsigned long toc;
- unsigned long tramp;
-#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS
- unsigned long tramp_regs;
-#endif
-#endif
/* For module function descriptor dereference */
unsigned long start_opd;
@@ -65,10 +58,14 @@ struct mod_arch_specific {
/* Indices of PLT sections within module. */
unsigned int core_plt_section;
unsigned int init_plt_section;
+#endif /* powerpc64 */
+
#ifdef CONFIG_DYNAMIC_FTRACE
unsigned long tramp;
+#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS
+ unsigned long tramp_regs;
+#endif
#endif
-#endif /* powerpc64 */
/* List of BUG addresses, source line numbers and filenames */
struct list_head bug_list;
diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c
index f7667e2ebfcb..1b7419579820 100644
--- a/arch/powerpc/kernel/module_64.c
+++ b/arch/powerpc/kernel/module_64.c
@@ -823,7 +823,6 @@ static unsigned long create_ftrace_stub(const Elf64_Shdr
*sechdrs,
int module_finalize_ftrace(struct module *mod, const Elf_Shdr *sechdrs)
{
- mod->arch.toc = my_r2(sechdrs, mod);
mod->arch.tramp = create_ftrace_stub(sechdrs, mod,
(unsigned long)ftrace_caller);
#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS
--
2.17.0
[RESEND PATCH V5 24/33] f2fs: conver to bio_for_each_page_all2
bio_for_each_page_all() can't be used any more after multipage bvec is
enabled, so we have to convert to bio_for_each_page_all2().
Signed-off-by: Ming Lei
---
fs/f2fs/data.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/fs/f2fs/data.c b/fs/f2fs/data.c
index 89da84b0f0bd..924284e2f358 100644
--- a/fs/f2fs/data.c
+++ b/fs/f2fs/data.c
@@ -54,6 +54,7 @@ static void f2fs_read_end_io(struct bio *bio)
{
struct bio_vec *bvec;
int i;
+ struct bvec_iter_all bia;
#ifdef CONFIG_F2FS_FAULT_INJECTION
if (time_to_inject(F2FS_P_SB(bio_first_page_all(bio)), FAULT_IO)) {
@@ -71,7 +72,7 @@ static void f2fs_read_end_io(struct bio *bio)
}
}
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
struct page *page = bvec->bv_page;
if (!bio->bi_status) {
@@ -91,8 +92,9 @@ static void f2fs_write_end_io(struct bio *bio)
struct f2fs_sb_info *sbi = bio->bi_private;
struct bio_vec *bvec;
int i;
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
struct page *page = bvec->bv_page;
enum count_type type = WB_DATA_TYPE(page);
@@ -267,6 +269,7 @@ static bool __has_merged_page(struct f2fs_bio_info *io,
struct bio_vec *bvec;
struct page *target;
int i;
+ struct bvec_iter_all bia;
if (!io->bio)
return false;
@@ -274,7 +277,7 @@ static bool __has_merged_page(struct f2fs_bio_info *io,
if (!inode && !ino)
return true;
- bio_for_each_page_all(bvec, io->bio, i) {
+ bio_for_each_page_all2(bvec, io->bio, i, bia) {
if (bvec->bv_page->mapping)
target = bvec->bv_page;
--
2.9.5
[RESEND PATCH V5 26/33] exofs: conver to bio_for_each_page_all2
bio_for_each_page_all() can't be used any more after multipage bvec is
enabled, so we have to convert to bio_for_each_page_all2().
Signed-off-by: Ming Lei
---
fs/exofs/ore.c | 3 ++-
fs/exofs/ore_raid.c | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/fs/exofs/ore.c b/fs/exofs/ore.c
index fe81fd6fe553..2a7e93f21695 100644
--- a/fs/exofs/ore.c
+++ b/fs/exofs/ore.c
@@ -406,8 +406,9 @@ static void _clear_bio(struct bio *bio)
{
struct bio_vec *bv;
unsigned i;
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bv, bio, i) {
+ bio_for_each_page_all2(bv, bio, i, bia) {
unsigned this_count = bv->bv_len;
if (likely(PAGE_SIZE == this_count))
diff --git a/fs/exofs/ore_raid.c b/fs/exofs/ore_raid.c
index 2c3346cd1b29..bb0cc314a987 100644
--- a/fs/exofs/ore_raid.c
+++ b/fs/exofs/ore_raid.c
@@ -433,11 +433,12 @@ static void _mark_read4write_pages_uptodate(struct
ore_io_state *ios, int ret)
/* loop on all devices all pages */
for (d = 0; d < ios->numdevs; d++) {
struct bio *bio = ios->per_dev[d].bio;
+ struct bvec_iter_all bia;
if (!bio)
continue;
- bio_for_each_page_all(bv, bio, i) {
+ bio_for_each_page_all2(bv, bio, i, bia) {
struct page *page = bv->bv_page;
SetPageUptodate(page);
--
2.9.5
[RESEND PATCH V5 25/33] xfs: conver to bio_for_each_page_all2
bio_for_each_page_all() can't be used any more after multipage bvec is
enabled, so we have to convert to bio_for_each_page_all2().
Given bvec can't be changed under bio_for_each_page_all2(), this patch
marks the bvec parameter as 'const' for xfs_finish_page_writeback().
Signed-off-by: Ming Lei
---
fs/xfs/xfs_aops.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/fs/xfs/xfs_aops.c b/fs/xfs/xfs_aops.c
index 13e2c167aec3..b5077eb4df51 100644
--- a/fs/xfs/xfs_aops.c
+++ b/fs/xfs/xfs_aops.c
@@ -107,7 +107,7 @@ xfs_find_daxdev_for_inode(
static void
xfs_finish_page_writeback(
struct inode*inode,
- struct bio_vec *bvec,
+ const struct bio_vec*bvec,
int error)
{
struct buffer_head *head = page_buffers(bvec->bv_page), *bh = head;
@@ -169,6 +169,7 @@ xfs_destroy_ioend(
for (bio = &ioend->io_inline_bio; bio; bio = next) {
struct bio_vec *bvec;
int i;
+ struct bvec_iter_all bia;
/*
* For the last bio, bi_private points to the ioend, so we
@@ -180,7 +181,7 @@ xfs_destroy_ioend(
next = bio->bi_private;
/* walk each page on bio, ending page IO on them */
- bio_for_each_page_all(bvec, bio, i)
+ bio_for_each_page_all2(bvec, bio, i, bia)
xfs_finish_page_writeback(inode, bvec, error);
bio_put(bio);
--
2.9.5
[RESEND PATCH V5 27/33] gfs2: conver to bio_for_each_page_all2
bio_for_each_page_all() can't be used any more after multipage bvec is
enabled, so we have to convert to bio_for_each_page_all2().
Given bvec can't be changed inside bio_for_each_page_all2(), this patch
marks the bvec parameter as 'const' for gfs2_end_log_write_bh().
Signed-off-by: Ming Lei
---
fs/gfs2/lops.c| 6 --
fs/gfs2/meta_io.c | 3 ++-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/fs/gfs2/lops.c b/fs/gfs2/lops.c
index a31b9b028957..0284cd66089c 100644
--- a/fs/gfs2/lops.c
+++ b/fs/gfs2/lops.c
@@ -168,7 +168,8 @@ u64 gfs2_log_bmap(struct gfs2_sbd *sdp)
* that is pinned in the pagecache.
*/
-static void gfs2_end_log_write_bh(struct gfs2_sbd *sdp, struct bio_vec *bvec,
+static void gfs2_end_log_write_bh(struct gfs2_sbd *sdp,
+ const struct bio_vec *bvec,
blk_status_t error)
{
struct buffer_head *bh, *next;
@@ -207,6 +208,7 @@ static void gfs2_end_log_write(struct bio *bio)
struct bio_vec *bvec;
struct page *page;
int i;
+ struct bvec_iter_all bia;
if (bio->bi_status) {
fs_err(sdp, "Error %d writing to journal, jid=%u\n",
@@ -214,7 +216,7 @@ static void gfs2_end_log_write(struct bio *bio)
wake_up(&sdp->sd_logd_waitq);
}
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
page = bvec->bv_page;
if (page_has_buffers(page))
gfs2_end_log_write_bh(sdp, bvec, bio->bi_status);
diff --git a/fs/gfs2/meta_io.c b/fs/gfs2/meta_io.c
index 1d720352310a..a945c9fa1dc6 100644
--- a/fs/gfs2/meta_io.c
+++ b/fs/gfs2/meta_io.c
@@ -190,8 +190,9 @@ static void gfs2_meta_read_endio(struct bio *bio)
{
struct bio_vec *bvec;
int i;
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
struct page *page = bvec->bv_page;
struct buffer_head *bh = page_buffers(page);
unsigned int len = bvec->bv_len;
--
2.9.5
[RESEND PATCH V5 20/33] md/dm/bcache: conver to bio_for_each_page_all2 and bio_for_each_segment
In bch_bio_alloc_pages(), bio_for_each_segment() is fine because this
helper can only be used on a freshly new bio.
For other cases, we conver to bio_for_each_page_all2() since they needn't
to update bvec table.
bio_for_each_page_all() can't be used any more after multipage bvec is
enabled, so we have to convert to bio_for_each_page_all2().
Signed-off-by: Ming Lei
---
drivers/md/bcache/btree.c | 3 ++-
drivers/md/bcache/util.c | 2 +-
drivers/md/dm-crypt.c | 3 ++-
drivers/md/raid1.c| 3 ++-
4 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/md/bcache/btree.c b/drivers/md/bcache/btree.c
index a9d82911c3d2..498f6b032b4c 100644
--- a/drivers/md/bcache/btree.c
+++ b/drivers/md/bcache/btree.c
@@ -423,8 +423,9 @@ static void do_btree_node_write(struct btree *b)
int j;
struct bio_vec *bv;
void *base = (void *) ((unsigned long) i & ~(PAGE_SIZE - 1));
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bv, b->bio, j)
+ bio_for_each_page_all2(bv, b->bio, j, bia)
memcpy(page_address(bv->bv_page),
base + j * PAGE_SIZE, PAGE_SIZE);
diff --git a/drivers/md/bcache/util.c b/drivers/md/bcache/util.c
index 77230973a110..74febd5230df 100644
--- a/drivers/md/bcache/util.c
+++ b/drivers/md/bcache/util.c
@@ -303,7 +303,7 @@ int bch_bio_alloc_pages(struct bio *bio, gfp_t gfp_mask)
int i;
struct bio_vec *bv;
- bio_for_each_page_all(bv, bio, i) {
+ bio_for_each_segment_all(bv, bio, i) {
bv->bv_page = alloc_page(gfp_mask);
if (!bv->bv_page) {
while (--bv >= bio->bi_io_vec)
diff --git a/drivers/md/dm-crypt.c b/drivers/md/dm-crypt.c
index 74737ae0ef11..8fdc8349fd72 100644
--- a/drivers/md/dm-crypt.c
+++ b/drivers/md/dm-crypt.c
@@ -1450,8 +1450,9 @@ static void crypt_free_buffer_pages(struct crypt_config
*cc, struct bio *clone)
{
unsigned int i;
struct bio_vec *bv;
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bv, clone, i) {
+ bio_for_each_page_all2(bv, clone, i, bia) {
BUG_ON(!bv->bv_page);
mempool_free(bv->bv_page, cc->page_pool);
}
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c
index e318a0c19eb0..8b2b071619a2 100644
--- a/drivers/md/raid1.c
+++ b/drivers/md/raid1.c
@@ -2117,13 +2117,14 @@ static void process_checks(struct r1bio *r1_bio)
struct page **spages = get_resync_pages(sbio)->pages;
struct bio_vec *bi;
int page_len[RESYNC_PAGES] = { 0 };
+ struct bvec_iter_all bia;
if (sbio->bi_end_io != end_sync_read)
continue;
/* Now we can 'fixup' the error value */
sbio->bi_status = 0;
- bio_for_each_page_all(bi, sbio, j)
+ bio_for_each_page_all2(bi, sbio, j, bia)
page_len[j] = bi->bv_len;
if (!status) {
--
2.9.5
[RESEND PATCH V5 21/33] fs: conver to bio_for_each_page_all2
bio_for_each_page_all() can't be used any more after multipage bvec is
enabled, so we have to convert to bio_for_each_page_all2().
Signed-off-by: Ming Lei
---
fs/block_dev.c | 6 --
fs/crypto/bio.c | 3 ++-
fs/direct-io.c | 4 +++-
fs/iomap.c | 3 ++-
fs/mpage.c | 3 ++-
5 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/fs/block_dev.c b/fs/block_dev.c
index 65498a34efa9..f581fc0a6142 100644
--- a/fs/block_dev.c
+++ b/fs/block_dev.c
@@ -197,6 +197,7 @@ __blkdev_direct_IO_simple(struct kiocb *iocb, struct
iov_iter *iter,
ssize_t ret;
blk_qc_t qc;
int i;
+ struct bvec_iter_all bia;
if ((pos | iov_iter_alignment(iter)) &
(bdev_logical_block_size(bdev) - 1))
@@ -242,7 +243,7 @@ __blkdev_direct_IO_simple(struct kiocb *iocb, struct
iov_iter *iter,
}
__set_current_state(TASK_RUNNING);
- bio_for_each_page_all(bvec, &bio, i) {
+ bio_for_each_page_all2(bvec, &bio, i, bia) {
if (should_dirty && !PageCompound(bvec->bv_page))
set_page_dirty_lock(bvec->bv_page);
put_page(bvec->bv_page);
@@ -309,8 +310,9 @@ static void blkdev_bio_end_io(struct bio *bio)
} else {
struct bio_vec *bvec;
int i;
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bvec, bio, i)
+ bio_for_each_page_all2(bvec, bio, i, bia)
put_page(bvec->bv_page);
bio_put(bio);
}
diff --git a/fs/crypto/bio.c b/fs/crypto/bio.c
index 2dda77c3a89a..743c3ecb7f97 100644
--- a/fs/crypto/bio.c
+++ b/fs/crypto/bio.c
@@ -37,8 +37,9 @@ static void completion_pages(struct work_struct *work)
struct bio *bio = ctx->r.bio;
struct bio_vec *bv;
int i;
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bv, bio, i) {
+ bio_for_each_page_all2(bv, bio, i, bia) {
struct page *page = bv->bv_page;
int ret = fscrypt_decrypt_page(page->mapping->host, page,
PAGE_SIZE, 0, page->index);
diff --git a/fs/direct-io.c b/fs/direct-io.c
index bbf25b0de9f8..e6a6dd560da2 100644
--- a/fs/direct-io.c
+++ b/fs/direct-io.c
@@ -551,7 +551,9 @@ static blk_status_t dio_bio_complete(struct dio *dio,
struct bio *bio)
if (dio->is_async && dio->op == REQ_OP_READ && dio->should_dirty) {
bio_check_pages_dirty(bio); /* transfers ownership */
} else {
- bio_for_each_page_all(bvec, bio, i) {
+ struct bvec_iter_all bia;
+
+ bio_for_each_page_all2(bvec, bio, i, bia) {
struct page *page = bvec->bv_page;
if (dio->op == REQ_OP_READ && !PageCompound(page) &&
diff --git a/fs/iomap.c b/fs/iomap.c
index 42b0b1697b3d..31d19f8f0aac 100644
--- a/fs/iomap.c
+++ b/fs/iomap.c
@@ -817,8 +817,9 @@ static void iomap_dio_bio_end_io(struct bio *bio)
} else {
struct bio_vec *bvec;
int i;
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bvec, bio, i)
+ bio_for_each_page_all2(bvec, bio, i, bia)
put_page(bvec->bv_page);
bio_put(bio);
}
diff --git a/fs/mpage.c b/fs/mpage.c
index 1cf322c4d6f8..f2da0f9ec0f2 100644
--- a/fs/mpage.c
+++ b/fs/mpage.c
@@ -48,8 +48,9 @@ static void mpage_end_io(struct bio *bio)
{
struct bio_vec *bv;
int i;
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bv, bio, i) {
+ bio_for_each_page_all2(bv, bio, i, bia) {
struct page *page = bv->bv_page;
page_endio(page, op_is_write(bio_op(bio)),
blk_status_to_errno(bio->bi_status));
--
2.9.5
[RESEND PATCH V5 19/33] block: convert to bio_for_each_page_all2()
We have to convert to bio_for_each_page_all2() for iterating page by
page.
bio_for_each_page_all() can't be used any more after multipage bvec is
enabled.
Signed-off-by: Ming Lei
---
block/bio.c | 18 --
block/blk-zoned.c | 5 +++--
block/bounce.c | 6 --
include/linux/bio.h | 3 ++-
4 files changed, 21 insertions(+), 11 deletions(-)
diff --git a/block/bio.c b/block/bio.c
index a200c42e55dc..a14c854b9111 100644
--- a/block/bio.c
+++ b/block/bio.c
@@ -1119,8 +1119,9 @@ static int bio_copy_from_iter(struct bio *bio, struct
iov_iter *iter)
{
int i;
struct bio_vec *bvec;
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
ssize_t ret;
ret = copy_page_from_iter(bvec->bv_page,
@@ -1150,8 +1151,9 @@ static int bio_copy_to_iter(struct bio *bio, struct
iov_iter iter)
{
int i;
struct bio_vec *bvec;
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
ssize_t ret;
ret = copy_page_to_iter(bvec->bv_page,
@@ -1173,8 +1175,9 @@ void bio_free_pages(struct bio *bio)
{
struct bio_vec *bvec;
int i;
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bvec, bio, i)
+ bio_for_each_page_all2(bvec, bio, i, bia)
__free_page(bvec->bv_page);
}
EXPORT_SYMBOL(bio_free_pages);
@@ -1340,6 +1343,7 @@ struct bio *bio_map_user_iov(struct request_queue *q,
struct bio *bio;
int ret;
struct bio_vec *bvec;
+ struct bvec_iter_all bia;
if (!iov_iter_count(iter))
return ERR_PTR(-EINVAL);
@@ -1413,7 +1417,7 @@ struct bio *bio_map_user_iov(struct request_queue *q,
return bio;
out_unmap:
- bio_for_each_page_all(bvec, bio, j) {
+ bio_for_each_page_all2(bvec, bio, j, bia) {
put_page(bvec->bv_page);
}
bio_put(bio);
@@ -1424,11 +1428,12 @@ static void __bio_unmap_user(struct bio *bio)
{
struct bio_vec *bvec;
int i;
+ struct bvec_iter_all bia;
/*
* make sure we dirty pages we wrote to
*/
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
if (bio_data_dir(bio) == READ)
set_page_dirty_lock(bvec->bv_page);
@@ -1520,8 +1525,9 @@ static void bio_copy_kern_endio_read(struct bio *bio)
char *p = bio->bi_private;
struct bio_vec *bvec;
int i;
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
memcpy(p, page_address(bvec->bv_page), bvec->bv_len);
p += bvec->bv_len;
}
diff --git a/block/blk-zoned.c b/block/blk-zoned.c
index 77f3cecfaa7d..a76053d6fd6c 100644
--- a/block/blk-zoned.c
+++ b/block/blk-zoned.c
@@ -123,6 +123,7 @@ int blkdev_report_zones(struct block_device *bdev,
unsigned int ofst;
void *addr;
int ret;
+ struct bvec_iter_all bia;
if (!q)
return -ENXIO;
@@ -190,7 +191,7 @@ int blkdev_report_zones(struct block_device *bdev,
n = 0;
nz = 0;
nr_rep = 0;
- bio_for_each_page_all(bv, bio, i) {
+ bio_for_each_page_all2(bv, bio, i, bia) {
if (!bv->bv_page)
break;
@@ -223,7 +224,7 @@ int blkdev_report_zones(struct block_device *bdev,
*nr_zones = nz;
out:
- bio_for_each_page_all(bv, bio, i)
+ bio_for_each_page_all2(bv, bio, i, bia)
__free_page(bv->bv_page);
bio_put(bio);
diff --git a/block/bounce.c b/block/bounce.c
index f4ee4b81f7a2..8b14683f4061 100644
--- a/block/bounce.c
+++ b/block/bounce.c
@@ -143,11 +143,12 @@ static void bounce_end_io(struct bio *bio, mempool_t
*pool)
struct bio_vec *bvec, orig_vec;
int i;
struct bvec_iter orig_iter = bio_orig->bi_iter;
+ struct bvec_iter_all bia;
/*
* free up bounce indirect pages used
*/
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
orig_vec = bio_iter_iovec(bio_orig, orig_iter);
if (bvec->bv_page != orig_vec.bv_page) {
dec_zone_page_state(bvec->bv_page, NR_BOUNCE);
@@ -203,6 +204,7 @@ static void __blk_queue_bounce(struct request_queue *q,
struct bio **bio_orig,
bool bounce = false;
int sectors = 0;
bool passthrough = bio_is_passthrough(*bio_orig);
+ struct bvec_iter_all bia;
bio_for_each_page(from, *bio_orig, iter) {
if (i++ < BIO_MAX_PAGES)
@@ -222,7 +224,7 @@ static void __blk_queue_bounce(struct request_queue *q,
struct bio **bio_orig,
bio = bio_clone_bioset(*bi
Re: Wrong -dirty suffix set by setlocalversion (was: BUG in git diff-index)
On 24/05/2018 16:03, Mike Mason wrote: > diff --git a/scripts/setlocalversion b/scripts/setlocalversion > index 71f39410691b..9da4c5e83285 100755 > --- a/scripts/setlocalversion > +++ b/scripts/setlocalversion > @@ -73,8 +73,10 @@ scm_version() > printf -- '-svn%s' "`git svn find-rev $head`" > fi > > - # Check for uncommitted changes > - if git diff-index --name-only HEAD | grep -qv > "^scripts/package"; then > + # Check for uncommitted changes. Only check mtime and size. > + # Ignore insequential ctime, uid, gid and inode differences. > + if git -c "core.checkstat=minimal" diff-index --name-only HEAD > | \ > + grep -qv "^scripts/package"; then > printf '%s' -dirty > fi FWIW: Reported-by: marc.herb...@intel.com Reviewed-by: marc.herb...@intel.com (assuming a future and decent commit message) Tested-by: marc.herb...@intel.com So the real use case is making a copy of a whole tree before building. Typical in automated builds, old example: https://groups.google.com/a/chromium.org/d/msg/chromium-os-dev/zxOa0OLWFkw/N_Sb7EZOBwAJ Here's a more complex but faster and more transparent way to test Mike's fix than copying an entire tree: # Make sure you start from a clean state git describe --dirty # must not -dirty make prepare # Simulate a copy of the tree but with just one file rsync --perms --times README README.mtime_backup rm README rsync --perms --times README.mtime_backup README stat README README.mtime_backup # Demo the BUG fixed by Mike ./scripts/setlocalversion # -dirty BUG! because spurious inode ctime difference git diff-index HEAD git describe --dirty # not -dirty ./scripts/setlocalversion # not -dirty any more cause describe refreshed index # Make sure mtime still causes -dirty with AND without Mike's fix touch README ./scripts/setlocalversion # -dirty
[RESEND PATCH V5 18/33] block: deal with dirtying pages for multipage bvec
In bio_check_pages_dirty(), bvec->bv_page is used as flag for marking
if the page has been dirtied & released, and if no, it will be dirtied
in deferred workqueue.
With multipage bvec, we can't do that any more, so change the logic into
checking all pages in one mp bvec, and only release all these pages if all
are dirtied, otherwise dirty them all in deferred wrokqueue.
This patch introduces segment_for_each_page_all() to deal with the case
a bit easier.
Signed-off-by: Ming Lei
---
block/bio.c | 45 +
include/linux/bvec.h | 7 +++
2 files changed, 44 insertions(+), 8 deletions(-)
diff --git a/block/bio.c b/block/bio.c
index 63d4fe85f42e..a200c42e55dc 100644
--- a/block/bio.c
+++ b/block/bio.c
@@ -1630,8 +1630,9 @@ void bio_set_pages_dirty(struct bio *bio)
{
struct bio_vec *bvec;
int i;
+ struct bvec_iter_all bia;
- bio_for_each_page_all(bvec, bio, i) {
+ bio_for_each_page_all2(bvec, bio, i, bia) {
struct page *page = bvec->bv_page;
if (page && !PageCompound(page))
@@ -1640,16 +1641,26 @@ void bio_set_pages_dirty(struct bio *bio)
}
EXPORT_SYMBOL_GPL(bio_set_pages_dirty);
+static inline void release_mp_bvec_pages(struct bio_vec *bvec)
+{
+ struct bio_vec bv;
+ struct bvec_iter iter;
+
+ segment_for_each_page_all(bv, bvec, iter)
+ put_page(bv.bv_page);
+}
+
static void bio_release_pages(struct bio *bio)
{
struct bio_vec *bvec;
int i;
- bio_for_each_page_all(bvec, bio, i) {
+ /* iterate each mp bvec */
+ bio_for_each_segment_all(bvec, bio, i) {
struct page *page = bvec->bv_page;
if (page)
- put_page(page);
+ release_mp_bvec_pages(bvec);
}
}
@@ -1693,20 +1704,38 @@ static void bio_dirty_fn(struct work_struct *work)
}
}
+static inline void check_mp_bvec_pages(struct bio_vec *bvec,
+ int *nr_dirty, int *nr_pages)
+{
+ struct bio_vec bv;
+ struct bvec_iter iter;
+
+ segment_for_each_page_all(bv, bvec, iter) {
+ struct page *page = bv.bv_page;
+
+ if (PageDirty(page) || PageCompound(page))
+ (*nr_dirty)++;
+ (*nr_pages)++;
+ }
+}
+
void bio_check_pages_dirty(struct bio *bio)
{
struct bio_vec *bvec;
int nr_clean_pages = 0;
int i;
- bio_for_each_page_all(bvec, bio, i) {
- struct page *page = bvec->bv_page;
+ bio_for_each_segment_all(bvec, bio, i) {
+ int nr_dirty = 0, nr_pages = 0;
+
+ check_mp_bvec_pages(bvec, &nr_dirty, &nr_pages);
- if (PageDirty(page) || PageCompound(page)) {
- put_page(page);
+ /* release all pages in the mp bvec if all are dirtied */
+ if (nr_dirty == nr_pages) {
+ release_mp_bvec_pages(bvec);
bvec->bv_page = NULL;
} else {
- nr_clean_pages++;
+ nr_clean_pages += nr_pages;
}
}
diff --git a/include/linux/bvec.h b/include/linux/bvec.h
index 2deee87b823e..893e8fef0dd0 100644
--- a/include/linux/bvec.h
+++ b/include/linux/bvec.h
@@ -225,6 +225,13 @@ static inline bool bvec_iter_seg_advance(const struct
bio_vec *bv,
.bi_bvec_done = 0,\
}
+#define segment_for_each_page_all(pg_bvl, seg_bvec, iter) \
+ for (iter = BVEC_ITER_ALL_INIT, \
+(iter).bi_size = (seg_bvec)->bv_len - (iter).bi_bvec_done;\
+(iter).bi_size && \
+ ((pg_bvl = bvec_iter_bvec((seg_bvec), (iter))), 1); \
+bvec_iter_advance((seg_bvec), &(iter), (pg_bvl).bv_len))
+
/* get the last page from the multipage bvec and store it in @pg */
static inline void segment_last_page(const struct bio_vec *seg,
struct bio_vec *pg)
--
2.9.5
[RESEND PATCH V5 17/33] block: bio: introduce bio_for_each_page_all2 and bio_for_each_segment_all
This patch introduces bio_for_each_page_all2(), which is for replacing
bio_for_each_page_all() in case that the returned bvec has to be single
page bvec.
Given the interface type has to be changed for passing one local iterator
variable of 'bvec_iter_all', and doing all changes in one single patch
isn't realistic, so use the name of bio_for_each_page_all2() temporarily
for conversion, and once all bio_for_each_page_all() is converted, the
original name of bio_for_each_page_all() will be recovered finally.
This patch introduce bio_for_each_segment_all too, which is used for
updating bvec table directly, and users should be carful about this
helper since it returns real multipage segment now.
Signed-off-by: Ming Lei
---
include/linux/bio.h | 18 ++
include/linux/bvec.h | 6 ++
2 files changed, 24 insertions(+)
diff --git a/include/linux/bio.h b/include/linux/bio.h
index 61a04c131641..75baad77d9a8 100644
--- a/include/linux/bio.h
+++ b/include/linux/bio.h
@@ -225,6 +225,24 @@ static inline bool bio_rewind_iter(struct bio *bio, struct
bvec_iter *iter,
#define bio_for_each_segment(bvl, bio, iter) \
__bio_for_each_segment(bvl, bio, iter, (bio)->bi_iter)
+#define bio_for_each_segment_all(bvl, bio, i) \
+ bio_for_each_page_all((bvl), (bio), (i))
+
+/*
+ * This helper returns singlepage bvec to caller, and the sp bvec is
+ * generated in-flight from multipage bvec stored in bvec table. So we
+ * can _not_ change the bvec stored in bio->bi_io_vec[] via this helper.
+ *
+ * If bvec need to be updated in the table, please use
+ * bio_for_each_segment_all() and make sure it is correctly used since
+ * bvec may points to one multipage bvec.
+ */
+#define bio_for_each_page_all2(bvl, bio, i, bi)\
+ for ((bi).iter = BVEC_ITER_ALL_INIT, i = 0, bvl = &(bi).bv; \
+(bi).iter.bi_idx < (bio)->bi_vcnt && \
+ (((bi).bv = bio_iter_iovec((bio), (bi).iter)), 1); \
+bio_advance_iter((bio), &(bi).iter, (bi).bv.bv_len), i++)
+
#define bio_iter_last(bvec, iter) ((iter).bi_size == (bvec).bv_len)
static inline unsigned __bio_elements(struct bio *bio, bool seg)
diff --git a/include/linux/bvec.h b/include/linux/bvec.h
index 217afcd83a15..2deee87b823e 100644
--- a/include/linux/bvec.h
+++ b/include/linux/bvec.h
@@ -84,6 +84,12 @@ struct bvec_iter {
current bvec */
};
+/* this iter is only for implementing bio_for_each_page_all2() */
+struct bvec_iter_all {
+ struct bvec_iteriter;
+ struct bio_vec bv; /* in-flight singlepage bvec */
+};
+
/*
* various member access, note that bio_data should of course not be used
* on highmem page vectors
--
2.9.5
[RESEND PATCH V5 13/33] block: introduce rq_for_each_segment()
There are still cases in which rq_for_each_segment() is required, for
example, loop.
Signed-off-by: Ming Lei
---
include/linux/blkdev.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index 1e8e9b430008..0b15bc625bd7 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -953,6 +953,10 @@ struct req_iterator {
__rq_for_each_bio(_iter.bio, _rq) \
bio_for_each_page(bvl, _iter.bio, _iter.iter)
+#define rq_for_each_segment(bvl, _rq, _iter) \
+ __rq_for_each_bio(_iter.bio, _rq) \
+ bio_for_each_segment(bvl, _iter.bio, _iter.iter)
+
#define rq_iter_last(bvec, _iter) \
(_iter.bio->bi_next == NULL && \
bio_iter_last(bvec, _iter.iter))
--
2.9.5
