On Tue, Jul 24, 2018 at 1:39 PM Jae Hyun Yoo
wrote:
>
> This commit fixes this sparse warning:
> drivers/i2c/busses/i2c-aspeed.c:875:38: warning: incorrect type in assignment
> (different modifiers)
> drivers/i2c/busses/i2c-aspeed.c:875:38:expected unsigned int (
> *get_clk_reg_val )( ... )
Hi Miguel,
On Mon, Jul 30, 2018 at 6:05 PM Miguel Ojeda
wrote:
> On Mon, Jul 30, 2018 at 8:46 AM, Geert Uytterhoeven
> wrote:
> > Below is the list of build error/warning regressions/improvements in
> > v4.18-rc7[1] compared to v4.17[2].
> Also, a suggestion for Geert (or whoever is maintaining
On Tue, Jul 24, 2018 at 10:31 AM Jae Hyun Yoo
wrote:
>
> In most of cases, interrupt bits are set one by one but there are
> also a lot of other cases that Aspeed I2C IP sends multiple
> interrupt bits with combining master and slave events using a
> single interrupt call. It happens much more in
Hi.
I tested this on AMD Ryzen & Intel Broadwell system and dumped the
boot_cpu_data before and after a microcode update. On the Intel
system I also did a fatal MCE using mce-inject to confirm the output
from the mce handling code.
P.
---8<---
On systems where a runtime microcode update has
On 8/1/2018 10:20 AM, Takashi Iwai wrote:
On Wed, 01 Aug 2018 05:46:48 +0200,
kbuild test robot wrote:
Hi Rohit,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on asoc/for-next]
[also build test WARNING on next-20180731]
[cannot apply to v4.18-rc7]
[if your
On Wed, 01 Aug 2018 03:00:18 +0100,
Lina Iyer wrote:
>
> QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
> domain can wakeup the SoC, when interrupts and GPIOs are routed to the
> its interrupt controller. Select GPIOs that are deemed wakeup capable are
> routed to specif
From: Jason Gunthorpe
Add shift_overflow() helper to assist driver authors in ensuring that
shift operations don't cause overflows or other odd conditions.
Signed-off-by: Jason Gunthorpe
Signed-off-by: Leon Romanovsky
[kees: tweaked comments and commit log, dropped unneeded assignment]
Signed-
This adds the shift overflow helper, selftests, and first usage.
-Kees
v3:
- add even more test cases (type mismatches, more signed overflows).
- fix documentation typo on argument name.
v2:
- swap out selftests with framework from Rasmus, add lots more tests.
- drop double-assignment in helper.
This adds overflow tests for the new check_shift_overflow() helper to
validate overflow, signedness glitches, storage glitches, etc.
Co-developed-by: Rasmus Villemoes
Signed-off-by: Kees Cook
---
lib/test_overflow.c | 198 +++-
1 file changed, 197 inserti
From: Leon Romanovsky
[ 61.182439] UBSAN: Undefined behaviour in
drivers/infiniband/hw/mlx5/qp.c:5366:34
[ 61.183673] shift exponent 4294967288 is too large for 32-bit type 'unsigned
int'
[ 61.185530] CPU: 0 PID: 639 Comm: qp Not tainted
4.18.0-rc1-00037-g4aa1d69a9c60-dirty #96
[ 61.18
On Wed, 2018-08-01 at 06:35 +0100, Marc Zyngier wrote:
>
> Is it something that is reproducible with the current mainline (non-RT)?
These waters are a bit muddy, it's config dependent. I'm trying to
generate a reproducing !RT config for -rc7 as we speak. If I build
openSUSE/master-default, it d
our NAND SPI
NAND is supported, if it's not add support for it, and if you find a
bug report/fix it.
Thanks,
Boris
[1]https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/drivers/mtd/nand/spi?h=next-20180731
>
> Signed-off-by: Jheng-Jhong Wu
> ---
> drivers/stagi
The "array_index_mask_nospec" code has been updated to allow index
argument to have const-qualified type.
Now the stack variable "idx" is no longer required and can be removed.
We should directly pass the const variable "id" to array_index_mask_nospec
Signed-off-by: Aashish Lakhwara
Signed-off-by
On Tue 31-07-18 18:14:48, Roman Gushchin wrote:
> On Tue, Jul 31, 2018 at 11:07:00AM +0200, Michal Hocko wrote:
> > On Mon 30-07-18 11:01:00, Roman Gushchin wrote:
> > > For some workloads an intervention from the OOM killer
> > > can be painful. Killing a random task can bring
> > > the workload i
Hi YueHaibing,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on pinctrl/devel]
[also build test ERROR on v4.18-rc7 next-20180731]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
On Tue 31-07-18 07:58:00, Shakeel Butt wrote:
> On Tue, Jul 31, 2018 at 1:45 AM Michal Hocko wrote:
> >
> > On Mon 30-07-18 11:00:58, Roman Gushchin wrote:
> > > Introduce the mem_cgroup_put() helper, which helps to eliminate guarding
> > > memcg css release with "#ifdef CONFIG_MEMCG" in multiple
On Tue, Jul 31, 2018 at 7:13 PM, Jason Gunthorpe wrote:
> On Tue, Jul 31, 2018 at 05:00:38PM -0700, Kees Cook wrote:
>> + /* Overflow: high bit falls off. */
>> + /* 10010110 */
>> + err |= TEST_ONE_SHIFT(150, 1, u8, 0, true);
>> + /* 1000100010010110 */
>> + err |= TEST_ONE_SH
Hi Alan Tull,
Thanks for the quick response.
Please find my Comments inline...
> -Original Message-
> From: Alan Tull [mailto:at...@kernel.org]
> Sent: Tuesday, July 31, 2018 8:52 PM
> To: Nava kishore Manne
> Cc: robh...@kernel.org; mark.rutl...@arm.com; Michal Simek
> ; Soren Brinkmann
From: Vitaly Kuznetsov Sent: Tuesday, July 31, 2018 4:20
AM
>
> Reviewed-by: Vitaly Kuznetsov
Thanks for the review
>
> Alternatively, we can get rid of synic_initialized flag altogether:
> hv_synic_init() never fails in the first place but we can always
> implement something like:
>
> int
Hi Mathieu,
All but the last 9 commits in the coresight tree have been merged into
the char-misc tree as different commits (they were sent to Greg as a
patch series rather than a merge request). Can you please rebase your
tree into commit ccff2dfaceac ("coresight: tpiu: Fix disabling timeouts")
f
Byungchul Park writes:
> I think rcu list also works well. But I decided to use llist because
> llist is simpler and has one less pointer.
>
> Just to be sure, let me explain my use case more:
>
>1. Introduced a global list where single linked list is sufficient.
>2. All operations I need
On Tue, 31 Jul 2018 16:09:06 -0700
Nick Desaulniers wrote:
> + More maintainers and lists for visibility
>
> On Tue, Jul 31, 2018 at 3:32 PM Nick Desaulniers
> wrote:
> >
> > I'm currently looking into cleaning up the code duplication between
> > current_text_addr() and _THIS_IP_, virtually eve
Signed-off-by: Mike Shettel
---
.../devicetree/bindings/i3c/qcom,geni-i3c.txt | 44 ++
1 file changed, 44 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt
diff --git a/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt
b/Doc
This patch series is a proposal for the I3C master driver for the
Qualcomm GENI IP. This patch is to be applied on top of the I3C
subsystem patchset v6 submitted by Boris Brezillon.
Features supported:
Regular CCC commands
I3C private transfers
I2C transfers
Features not yet supported:
Ho
Signed-off-by: Mike Shettel
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 622327b..775829c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10943,6 +10943,14 @@ L: net...@vger.kernel.org
S: Supported
F: drivers/net/ethernet
Signed-off-by: Mike Shettel
---
This patch is to be applied on top of the I3C subsystem patchset v6.
drivers/i3c/master/Kconfig| 13 +
drivers/i3c/master/Makefile |1 +
drivers/i3c/master/i3c-master-qcom-geni.c | 1243 +
3 files chan
On Tue, 31 Jul 2018 19:28:49 +0100,
Mike Galbraith wrote:
Hi Mike,
>
> [1 ]
> On Mon, 2018-07-30 at 18:24 +0200, Mike Galbraith wrote:
> > On Sun, 2018-07-29 at 13:47 +0200, Mike Galbraith wrote:
> > > FYI, per kvm unit tests, 4.16-rt definitely has more kvm issues.
>
> But it's not RT, or ra
On Tue, Jul 31, 2018 at 09:46:16AM -0400, Steven Rostedt wrote:
> On Tue, 31 Jul 2018 18:38:09 +0900
> Byungchul Park wrote:
>
> > On Tue, Jul 31, 2018 at 10:52:57AM +0200, Peter Zijlstra wrote:
> > > On Tue, Jul 31, 2018 at 09:58:36AM +0900, Byungchul Park wrote:
> > > > In restrictive cases l
On Tue, Jul 31, 2018 at 07:30:52AM -0700, Paul E. McKenney wrote:
> On Tue, Jul 31, 2018 at 06:29:50PM +0900, Byungchul Park wrote:
> > On Mon, Jul 30, 2018 at 09:30:42PM -0700, Paul E. McKenney wrote:
> > > On Tue, Jul 31, 2018 at 09:58:36AM +0900, Byungchul Park wrote:
> > > > Hello folks,
> > >
On Wed, 1 Aug 2018 13:10:49 +0800 YueHaibing wrote:
> fixes following Smatch static check warning:
>
> drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
> warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
>
> As we will be calling krealloc() on pointer 'pctrl->
fixes following Smatch static check warning:
drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
As we will be calling krealloc() on pointer 'pctrl->functions', which means
kfree() will be called in there, devm_kza
Sorry, I send a wrong patch, pls ignore this.
On 2018/8/1 13:02, YueHaibing wrote:
> fixes following Smatch static check warning:
>
> drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
> warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
>
> As we will be calling
fixes following Smatch static check warning:
drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
As we will be calling krealloc() on pointer 'pctrl->functions', which means
kfree() will be called in there, devm_kza
On Tue, Jul 31, 2018 at 7:07 PM, Ming Lei wrote:
> On Sun, Jul 29, 2018 at 5:09 PM, Jeff Chua wrote:
>> I'm testing the USB3-to-PCI-E NVME SSD. It's works using uas module,
>> recognized it as /dev/sda.
>>
>> Since it's an USB device, the nvme-cli tools won't work, nor does
>> hdparm, as it's a N
Hi Arnaldo,
On Tue, Jul 31, 2018 at 10:59 PM, Arnaldo Carvalho de Melo
wrote:
> Em Tue, Jul 31, 2018 at 08:40:51PM +0530, Ganapatrao Kulkarni escreveu:
>> Hi Arnaldo,
>>
>> On Tue, Jul 31, 2018 at 7:58 PM, Arnaldo Carvalho de Melo
>> wrote:
>> > Em Tue, Jul 31, 2018 at 03:32:51PM +0530, Ganapat
Hi Wolfram,
On Tue, Jul 31, 2018 at 10:09:32PM +0200, Wolfram Sang wrote:
> Hi Manivannan,
>
> On Thu, Jul 26, 2018 at 09:16:02PM +0530, Manivannan Sadhasivam wrote:
> > Add Actions Semiconductor Owl family S900 I2C driver.
> >
> > Signed-off-by: Manivannan Sadhasivam
> > Acked-by: Peter Rosin
On Wed, 01 Aug 2018 05:46:48 +0200,
kbuild test robot wrote:
>
> Hi Rohit,
>
> Thank you for the patch! Perhaps something to improve:
>
> [auto build test WARNING on asoc/for-next]
> [also build test WARNING on next-20180731]
> [cannot apply to v4.18-rc7]
> [if y
On Tue, Jul 31, 2018 at 7:15 PM, Jason Gunthorpe wrote:
> On Tue, Jul 31, 2018 at 05:00:37PM -0700, Kees Cook wrote:
>> From: Jason Gunthorpe
>>
>> Add shift_overflow() helper to assist driver authors in ensuring that
>> shift operations don't cause overflows or other odd conditions.
>>
>> Signed
We found the PCIe driver doesn't really work with
the mpll3 clock which is actually reserved for debug,
So drop it from the mux list.
Fixes: 33b89db68236 ("clk: meson-axg: add clocks required by pcie driver")
Tested-by: Jianxin Qin
Signed-off-by: Yixun Lan
---
hi Jerome:
I'm sorry we found th
On 2018/8/1 10:36, Jisheng Zhang wrote:
> Hi,
>
> On Tue, 31 Jul 2018 22:25:01 +0800 YueHaibing wrote:
>
>> fixes following Smatch static check warning:
>>
>> drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
>> warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
On 7/31/2018 8:10 PM, Mark Brown wrote:
> On Tue, Jul 31, 2018 at 03:56:52PM +0200, Takashi Iwai wrote:
>> Mark Brown wrote:
>
>>> Yes. I'm saying that if the CPU DAI thinks it can figure out the base
>>> delay something is confused.
>
>> Then basically Akshu's patch does the correct thing, I
Hi Rohit,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on asoc/for-next]
[also build test WARNING on next-20180731]
[cannot apply to v4.18-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
Add Reset Management Unit (RMU) support for Actions Semi S700 SoC
of the Owl family series. RMU belongs to the Owl SoCs system-controller
which also includes CMU (Clock Management Unit).
Signed-off-by: Manivannan Sadhasivam
---
drivers/reset/reset-owl.c | 33 +
1
Add entry for Actions Semi Reset Management Unit driver and its
bindings under ARCH_ACTIONS. Currently only S700 and S900 SoCs
of the Owl family are supported.
Signed-off-by: Manivannan Sadhasivam
---
MAINTAINERS | 4
1 file changed, 4 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
i
Add Reset Management Unit (RMU) support for Actions Semi S900 SoC
of the Owl family series. RMU belongs to the Owl SoCs system-controller
which also includes CMU (Clock Management Unit).
Signed-off-by: Manivannan Sadhasivam
---
drivers/reset/Kconfig | 6 ++
drivers/reset/Makefile| 1
Add Reset Controller Unit (RMU) node under the system-controller node
for Actions Semi S700 SoC. Also add the bindings constant header to
be used by clients.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s700.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/a
Add Reset Controller Unit (RMU) node under the system-controller node
for Actions Semi S900 SoC. Also add the bindings constant header to
be used by clients.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s900.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/a
Add RMU (Reset Management Unit) support for the Actions Semi S700
SoC which is a part of the Actions Semi Owl family series.
Signed-off-by: Manivannan Sadhasivam
---
.../bindings/reset/actions,owl-reset.txt | 8 +++--
include/dt-bindings/reset/actions,s700-rmu.h | 34 +++
Add RMU (Reset Management Unit) support for the Actions Semi S900
SoC which is a part of the Actions Semi Owl family series.
Signed-off-by: Manivannan Sadhasivam
---
.../bindings/reset/actions,owl-reset.txt | 33 ++
include/dt-bindings/reset/actions,s900-rmu.h | 65
Since the clock and reset management units are sharing the same memory
map, convert the Owl common clock driver to support System Controller so
that the reset driver can reuse the same memory region.
Signed-off-by: Manivannan Sadhasivam
---
drivers/clk/actions/owl-common.c | 20 +++--
Since the clock and reset management units are sharing the same memory
map, document the clock bindings to support System Controller.
Signed-off-by: Manivannan Sadhasivam
---
.../bindings/clock/actions,owl-cmu.txt| 21 +--
1 file changed, 15 insertions(+), 6 deletions(-)
Since clock and reset management units are sharing the same memory map,
Owl SoCs clock-controller nodes needs to be converted to syscon so that
the corresponding reset drivers can also reuse the same memory region.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s700.dtsi |
This patchset adds Reset Controller (RMU) support for Actions Semi
Owl SoCs, S900 and S700. For the Owl SoCs, RMU's registers has been
integrated into the CMU memory map in hardware. Hence, in this patchset
the CMU driver has been converted to syscon so that the same memory map
can be resued by bot
Hi Philipp,
On Mon, Jul 30, 2018 at 12:21:52PM +0200, Philipp Zabel wrote:
> Hi Manivannan,
>
> Thank you for the patch, a few small comments below:
>
> On Sat, 2018-07-28 at 00:15 +0530, Manivannan Sadhasivam wrote:
> > Add Reset Management Unit (RMU) support for Actions Semi Owl SoCs.
> >
> >
Hallo, ich bin Herr Tayeb Souami, New Jersey, Vereinigte Staaten von Amerika,
Sie haben eine Wohltätigkeitsspende in Höhe von € 2.000.000,00, ich habe die
America Lotterie in Amerika im Wert von $ 315 Millionen gewonnen, und ich gebe
einen Teil davon an fünf glückliche Menschen und wohltätige Hä
In JFFS2, the process of creating a new file is split into two parts.
First, create the inode, name it "Part A", then create the dirent,
named it "Part B", both need reserve space. In Part A, a inode with
I_NEW state has been written in the block, we name it "block_a".
The inode I_NEW state will be
For NAND flash chips with more than 1Gbit (e.g. MT29F2G) more than 16 bits
are necessary to address the correct page. The driver sets the address for
more than 16 bits, but it uses 16-bit arguments and variables (these are
page_id, block_id, row) to do address operations. Obviously, these
arguments
On 8/1/18 4:55 AM, Cong Wang wrote:
> On Tue, Jul 31, 2018 at 10:13 AM wrote:
>>
>> Xunlei Pang writes:
>>
>>> On 7/31/18 1:55 AM, Cong Wang wrote:
On Sun, Jul 29, 2018 at 10:29 PM Xunlei Pang
wrote:
>
> Hi Cong,
>
> On 7/28/18 8:24 AM, Cong Wang wrote:
>> Each tim
On Tue, Jul 24, 2018 at 12:07:05PM +0100, Julien Thierry wrote:
> Add support for percpu_devid interrupts treated as NMIs.
>
> Percpu_devid NMIs need to be setup/torn down on each CPU they target.
>
> The same restrictions as for global NMIs still apply for percpu_devid NMIs.
>
> Signed-off-by:
On Tue, Jul 24, 2018 at 12:07:04PM +0100, Julien Thierry wrote:
Hi Julien,
Many thanks for your patchset and I apologize for the late reply. I tried
to use your patches on my own use case and I have the following
comments...
> Add functionality to allocate interrupt lines that will deliver IRQs
I need your help which will be of mutual benefit, please reply for further
details. Thank You
De informatie verzonden in dit e-mailbericht is voor zover mogelijk in
overeenstemming met de waarden van OSG Sevenwolden, vertrouwelijk en is
uitsluitend bestemd voor de geadresseerde(n).
On 2018/7/31 22:34, Thomas Gleixner wrote:
>
>
> On Tue, 31 Jul 2018, Thomas Gleixner wrote:
>
>> On Tue, 31 Jul 2018, Xu YiPing wrote:
>>> On 2018/7/30 19:03, Thomas Gleixner wrote:
__internal_add_timer(base, timer)
{
idx = calc_wheel_index(1, 1)
{
Hi,
On Tue, 31 Jul 2018 22:25:01 +0800 YueHaibing wrote:
> fixes following Smatch static check warning:
>
> drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
> warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
>
> As we will be calling krealloc() on pointer 'p
OK, no problems.
-邮件原件-
发件人: Michal Hocko
发送时间: 2018年7月31日 14:55
收件人: David Rientjes ; 禹舟健(基础平台部)
抄送: kernel test robot ; Stephen Rothwell
; Kirill A. Shutemov ;
Andrea Arcangeli ; Tetsuo Handa
; Roman Gushchin ; Yang Shi
; Andrew Morton ; LKML
; l...@01.org
主题: [此邮件疑似为垃圾邮件] Re: [
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Warning level 2 was used: -Wimplicit-fallthrough=2
Signed-off-by: Gustavo A. R. Silva
---
fs/nfsd/nfs4callback.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fs/nfsd/nfs4callback.
On 2018-07-31 18:09, Can Guo wrote:
This patch series adds support for UFS QMP PHY on SDM845 and the
compatible string for it. This patch series depends on the current
proposed QMP V3 USB3 UNI PHY support for sdm845 driver [1], on
the DT bindings for the QMP V3 USB3 PHYs based dirver [2], and als
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Warning level 2 was used: -Wimplicit-fallthrough=2
Signed-off-by: Gustavo A. R. Silva
---
fs/nfs/blocklayout/blocklayout.c | 1 +
fs/nfs/nfs3acl.c | 2 ++
fs/nfs/nfs4file
On Tue, Jul 31, 2018 at 05:00:37PM -0700, Kees Cook wrote:
> From: Jason Gunthorpe
>
> Add shift_overflow() helper to assist driver authors in ensuring that
> shift operations don't cause overflows or other odd conditions.
>
> Signed-off-by: Jason Gunthorpe
> Signed-off-by: Leon Romanovsky
> [
On Tue, Jul 31, 2018 at 05:00:38PM -0700, Kees Cook wrote:
> + /* Overflow: high bit falls off. */
> + /* 10010110 */
> + err |= TEST_ONE_SHIFT(150, 1, u8, 0, true);
> + /* 1000100010010110 */
> + err |= TEST_ONE_SHIFT(34966, 1, u16, 0, true);
> + /* 1100100010001000
Hi,
On Tue, Jul 31, 2018 at 1:39 AM, Masahiro Yamada
wrote:
> Hi Olof,
>
>
> 2018-07-22 8:24 GMT+09:00 Masahiro Yamada :
>> Hi Olof,
>>
>> 2018-07-22 6:24 GMT+09:00 Olof Johansson :
>>> On Thu, Jul 19, 2018 at 08:05:03AM +0900, Masahiro Yamada wrote:
Hi Arnd, Olof,
Please pull UniP
GPIOs that are wakeup capable have interrupt lines that are routed to
the always-on interrupt controller (PDC) in parallel to the pinctrl. The
interrupts listed here are the wake up lines corresponding to GPIOs.
Signed-off-by: Lina Iyer
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 69 +
Hi,
This is an attempt at a solution to enable wake up from suspend and deep idle
using GPIO as a wakeup source. The 845 uses a new interrupt controller (PDC)
that lies in the always-on domain and can sense interrupts that are routed to
it, when the GIC is powered off. It would then wakeup the GIC
Add GPIO to PDC pin map for the SDM845 SoC.
Signed-off-by: Lina Iyer
---
drivers/pinctrl/qcom/pinctrl-sdm845.c | 76 +++
1 file changed, 76 insertions(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-sdm845.c
b/drivers/pinctrl/qcom/pinctrl-sdm845.c
index 2ab7a8885757..e9366
QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
domain can wakeup the SoC, when interrupts and GPIOs are routed to the
its interrupt controller. Select GPIOs that are deemed wakeup capable are
routed to specific PDC pins. The PDC wakes up the GIC and replays the
interrupt a
Add PDC interrupt controller device bindings for SDM845.
Signed-off-by: Lina Iyer
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 2acc17ce1a9c..8ccce42885c1 10
On 07/31/2018 05:00 PM, Kees Cook wrote:
> From: Jason Gunthorpe
>
> Add shift_overflow() helper to assist driver authors in ensuring that
> shift operations don't cause overflows or other odd conditions.
>
> Signed-off-by: Jason Gunthorpe
> Signed-off-by: Leon Romanovsky
> [kees: tweaked comm
On 07/31/2018 04:09 PM, Nick Desaulniers wrote:
> + More maintainers and lists for visibility
>
Ideally the linux-a...@vger.kernel.org mailing list would be sufficient,
but I doubt that it is. :(
--
~Randy
On 2018년 08월 01일 04:39, Matthias Kaehlcke wrote:
> On Mon, Jul 16, 2018 at 10:50:50AM -0700, Matthias Kaehlcke wrote:
>> On Thu, Jul 12, 2018 at 05:44:33PM +0900, Chanwoo Choi wrote:
>>> Hi Matthias,
>>>
>>> On 2018년 07월 07일 02:53, Matthias Kaehlcke wrote:
Hi Chanwoo,
On Wed, Jul 04,
On Tue, Jul 31, 2018 at 11:07:00AM +0200, Michal Hocko wrote:
> On Mon 30-07-18 11:01:00, Roman Gushchin wrote:
> > For some workloads an intervention from the OOM killer
> > can be painful. Killing a random task can bring
> > the workload into an inconsistent state.
> >
> > Historically, there ar
Darrick J. Wong wrote:
> I only have time today to review the user interface bits...
Thanks:-)
> > + fsinfo_attr_volume_id = 7,/* Volume ID (string) */
> > + fsinfo_attr_volume_uuid = 8,/* Volume UUID (LE uuid) */
> > + fsinfo_attr_volume_name = 9,/*
Hi Evan,
Thanks for taking the time to review and feedback!
On 7/27/2018 2:12 PM, Evan Green wrote:
Hi David,
On Thu, Jul 26, 2018 at 4:30 PM David Dai wrote:
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Signed-off-by: David Dai
---
.../bindings/i
Dear RT Folks,
I'm pleased to announce the 4.14.59-rt37 stable release.
This release is just an update to the new stable 4.14.59 version
and no RT specific changes have been made.
You can get this release via the git tree at:
git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-stable-r
Hi Saravanan,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on pinctrl/devel]
[also build test ERROR on next-20180731]
[cannot apply to v4.18-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
Hi Bjorn,
Today's linux-next merge of the pci tree got a conflict in:
drivers/pci/pci.h
between commit:
44bda4b7d26e ("PCI: Fix is_added/is_busmaster race condition")
from the pci-current tree and commit:
1e4511604dfa ("PCI/AER: Expose internal API for obtaining AER information")
from
From: Roman Kiryanov
Not used by goldfish.
Signed-off-by: Roman Kiryanov
---
drivers/platform/goldfish/Kconfig| 5 -
drivers/platform/goldfish/Makefile | 1 -
drivers/platform/goldfish/pdev_bus.c | 232 ---
3 files changed, 238 deletions(-)
delete mode 100644
On 7/31/18 9:52 AM, Christoph Hellwig wrote:
On Mon, Jul 30, 2018 at 08:21:33PM -0700, Atish Patra wrote:
I found the issue. As per PLIC documentation, a hart context is a given
privilege mode on a given hart. Thus, cpu context ID & cpu numbers are not
same. Here is the PLIC register Maps in U54
On Tue, 31 Jul 2018, Kirill A. Shutemov wrote:
> On Tue, Jul 31, 2018 at 09:29:27AM +0300, Kirill A. Shutemov wrote:
> > On Mon, Jul 30, 2018 at 06:01:26PM -0700, Linus Torvalds wrote:
> > >
> > > So to me it looks like a historical check that simply doesn't
> > > "normally" trigger, but there's n
This adds the shift overflow helper, selftests, and first usage.
-Kees
Jason Gunthorpe (1):
overflow.h: Add arithmetic shift helper
Kees Cook (1):
test_overflow: Add shift overflow tests
Leon Romanovsky (1):
RDMA/mlx5: Fix shift overflow in mlx5_ib_create_wq
drivers/infiniband/hw/mlx5/q
From: Jason Gunthorpe
Add shift_overflow() helper to assist driver authors in ensuring that
shift operations don't cause overflows or other odd conditions.
Signed-off-by: Jason Gunthorpe
Signed-off-by: Leon Romanovsky
[kees: tweaked comments and commit log, dropped unneeded assignment]
Signed-
This adds overflow tests for the new check_shift_overflow() helper to
validate overflow, signedness glitches, storage glitches, etc.
Co-developed-by: Rasmus Villemoes
Signed-off-by: Kees Cook
---
lib/test_overflow.c | 140 +++-
1 file changed, 139 inserti
From: Leon Romanovsky
[ 61.182439] UBSAN: Undefined behaviour in
drivers/infiniband/hw/mlx5/qp.c:5366:34
[ 61.183673] shift exponent 4294967288 is too large for 32-bit type 'unsigned
int'
[ 61.185530] CPU: 0 PID: 639 Comm: qp Not tainted
4.18.0-rc1-00037-g4aa1d69a9c60-dirty #96
[ 61.18
On Mon, Jul 30, 2018 at 06:49:31PM -0700, David Rientjes wrote:
> On Mon, 30 Jul 2018, Roman Gushchin wrote:
>
> > This is a tiny implementation of cgroup-aware OOM killer,
> > which adds an ability to kill a cgroup as a single unit
> > and so guarantee the integrity of the workload.
> >
> > Alth
On Fri, Jul 27, 2018 at 06:35:10PM +0100, David Howells wrote:
> Add a system call to allow filesystem information to be queried. A request
> value can be given to indicate the desired attribute. Support is provided
> for enumerating multi-value attributes.
>
> ===
> NEW SYSTEM CALL
Added missing maintainers from the previous reply
On Sunday, 23 July 2017 16:26:55 UTC-7, Andre Przywara wrote:
>
> This mailbox driver implements a mailbox which signals transmitted data
> via an ARM smc (secure monitor call) instruction. The mailbox receiver
> is implemented in firmware and can
On Mon, 30 Jul 2018 11:31:13 -0400 Johannes Weiner wrote:
> Subject: [PATCH] mm: memcontrol: simplify memcg idr allocation and error
> unwinding
>
> The memcg ID is allocated early in the multi-step memcg creation
> process, which needs 2-step ID allocation and IDR publishing, as well
> as two
The set*uid system calls all call an LSM fixup hook called
security_task_fix_setuid, which allows for altering the behavior of those
calls by a security module. Comments explaining the LSM_SETID_* constants
in /include/linux/security.h imply that the constants are to be used for
both the set*uid an
+ More maintainers and lists for visibility
On Tue, Jul 31, 2018 at 3:32 PM Nick Desaulniers
wrote:
>
> I'm currently looking into cleaning up the code duplication between
> current_text_addr() and _THIS_IP_, virtually every implementation of
> current_text_addr() and _THIS_IP_ itself are basical
my x86 report
isPrevious: true
Build:
Android-x86/android_x86/x86:8.1.0/OPM6.171019.030.B1/cwhuang0618:userdebug/test-keys
Hardware: unknown
Revision: 0
Bootloader: unknown
Radio: unknown
Kernel: Linux version 4.18.0-rc7-android-x86_64+ (root@localhost) (gcc
version 8.2.0 (Ubuntu 8.2.0-1ubuntu2))
On 07/31/2018 06:46 PM, Mathieu Poirier wrote:
On Thu, Jul 26, 2018 at 01:54:43PM +0100, Suzuki K Poulose wrote:
At the moment, if there is no CPU specified for a given
event, we use cpu_online_mask and try to build path for
each of the CPUs in the mask. This could prevent any CPU
that is turned
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