[PATCH 0/2] add the Amlogic Meson PCIe phy driver.

This patcheset add the driver and dt-bindings for the Meson-PCIE-PHY controller. Yue Wang (2): dt-bindings: PCI: meson: add DT bindings for Amlogic Meson PCIe Phy controller PCI: meson: add the Amlogic Meson PCIe phy driver .../bindings/phy/amlogic,meson-pcie-phy.txt| 31

[PATCH 2/2] PCI: meson: add the Amlogic Meson PCIe phy driver

From: Yue Wang The Meson-PCIE-PHY controller supports the 5-Gbps data rate of the PCI Express Gen 2 specification and is backwardcompatible with the 2.5-Gbps Gen 1.1 specification with only inferred idle detection supported on AMLOGIC SoCs. Signed-off-by: Yue Wang Signed-off-by: Hanjie Lin

[PATCH 1/2] dt-bindings: PCI: meson: add DT bindings for Amlogic Meson PCIe Phy controller

From: Yue Wang The Meson-PCIE-PHY controller supports the 5-Gbps data rate of the PCI Express Gen 2 specification and is backwardcompatible with the 2.5-Gbps Gen 1.1 specification with only inferred idle detection supported on AMLOGIC SoCs. Signed-off-by: Hanjie Lin Signed-off-by: Yue Wang

Re: [PATCH] bluetooth: hci_h5: avoid unused variable warnings

Hi Arnd, > When CONFIG_BT_HCIUART_RTL is disabled, the hci_h5 driver produces a build > warning because of an incorrect set of #ifdef guards: > > drivers/bluetooth/hci_h5.c:920:22: error: 'rtl_vnd' defined but not used > [-Werror=unused-variable] > > Replacing the #ifdef with an IS_ENABLED()

Re: [PATCH] Use default .cfg file name for RTL8723BS devices with id of OBDA8723

Hi Ian, > For RTL8723BS devices the current config file name is a composite of > both the config name (rtl8723bs) and a postfix of the device-id. > > Given the majority of RTL8723BS devices use a device-id of OBDA8723 > this simplifies the config file name to use "rtl8723bs_config.bin" > as a

Re: [PATCH] mmc: Move the mmc driver init earlier

On Tue, Aug 14, 2018 at 02:39:59PM +0800, Feng Tang wrote: > Hi Greg, Ulf > > Could you help to review this? many thanks! Review what? I see no patch here. And why would I need to review a mmc patch in the middle of the merge window? totally confused, greg k-h

Re: [PATCH 1/2] perf tools: Make check-headers.sh check based on kernel dir

On Tue, Aug 14, 2018 at 11:47:39AM +1000, Michael Ellerman wrote: > Jiri Olsa writes: > > diff --git a/tools/perf/check-headers.sh b/tools/perf/check-headers.sh > > index ea48aa6f8d19..9d466e853aec 100755 > > --- a/tools/perf/check-headers.sh > > +++ b/tools/perf/check-headers.sh > > @@ -88,6

Re: [PATCH v2] ASoC: wm9712: fix replace codec to component

On Tue, Aug 14, 2018 at 12:35:56AM +0200, Marcel Ziswiler wrote: > From: Marcel Ziswiler > > Since commit 143b44845d87 ("ASoC: wm9712: replace codec to component") > "wm9712-codec" got renamed to "wm9712-component", however, this change > never got propagated down to the actual board/platform

[PATCH 2/2] bcache: add undef for macro in function

add undef for macro d_strtoul,d_strtoul_nonzero and d_strtoi_h Signed-off-by: Dongbo Cao --- drivers/md/bcache/sysfs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/md/bcache/sysfs.c b/drivers/md/bcache/sysfs.c index 225b15aa..ed67a290 100644 --- a/drivers/md/bcache/sysfs.c +++

[PATCH 2/2] PCI: meson: add the Amlogic Meson PCIe controller driver

From: Yue Wang The Amlogic Meson PCIe host controller is based on the Synopsys DesignWare PCI core. This patch adds the driver support for Meson PCIe controller. Signed-off-by: Yue Wang Signed-off-by: Hanjie Lin --- drivers/pci/controller/dwc/Kconfig | 12 +

Re: [f2fs-dev] [PATCH v3] f2fs: fix performance issue observed with multi-thread sequential read

On 2018/8/14 12:04, Jaegeuk Kim wrote: > On 08/14, Chao Yu wrote: >> On 2018/8/14 4:11, Jaegeuk Kim wrote: >>> On 08/13, Chao Yu wrote: Hi Jaegeuk, On 2018/8/11 2:56, Jaegeuk Kim wrote: > This reverts the commit - "b93f771 - f2fs: remove writepages lock" > to fix the drop in

[PATCH 0/2] add the Amlogic Meson PCIe controller driver.

The Amlogic Meson PCIe host controller is based on the Synopsys DesignWare PCI core. This patchset add the driver and dt-bindings of the controller. Yue Wang (2): dt-bindings: PCI: meson: add DT bindings for Amlogic Meson PCIe controller PCI: meson: add the Amlogic Meson PCIe controller

[PATCH 1/2] dt-bindings: PCI: meson: add DT bindings for Amlogic Meson PCIe controller

From: Yue Wang The Amlogic Meson PCIe host controller is based on the Synopsys DesignWare PCI core. This patch adds documentation for the DT bindings in Meson PCIe controller. Signed-off-by: Yue Wang Signed-off-by: Hanjie Lin --- .../devicetree/bindings/pci/amlogic,meson-pcie.txt | 57

Re: [PATCH v2] mm: migration: fix migration of huge PMD shared pages

On Mon, Aug 13, 2018 at 05:30:58PM -0700, Mike Kravetz wrote: > The page migration code employs try_to_unmap() to try and unmap the > source page. This is accomplished by using rmap_walk to find all > vmas where the page is mapped. This search stops when page mapcount > is zero. For shared PMD

[PATCH 1/2] kconfig: report recursive dependency involving 'imply'

Currently, Kconfig does not report anything about the recursive dependency where 'imply' keywords are involved. [Test Code] config A bool "a" config B bool "b" imply A depends on A In the code above, Kconfig cannot calculate the symbol values

[PATCH 2/2] kconfig: improve the recursive dependency report

This commit improves the warning messages of the recursive dependency. Currently, sym->dir_dep.expr is not checked. Hence, any dependency in property visibility is regarded as the dependency of the symbol. [Test Code 1] config A bool "a" depends on B config B

Re: [PATCH] drivers/thermal/tegra: fix a doule free devce node

On 2018/8/14 14:39, Daniel Lezcano wrote: > On 09/08/2018 15:40, zhong jiang wrote: >> Device node iterators will get the return node. Meawhile, It is >> also put the previous device node. An explicit put will cause >> a double put. > What about: > > Subject: drivers/thermal/tegra: Fix a double

Re: [PATCH] mmc: Move the mmc driver init earlier

Hi Greg, On Tue, Aug 14, 2018 at 09:18:34AM +0200, Greg Kroah-Hartman wrote: > On Tue, Aug 14, 2018 at 02:39:59PM +0800, Feng Tang wrote: > > Hi Greg, Ulf > > > > Could you help to review this? many thanks! > > Review what? I see no patch here. And why would I need to review a mmc > patch in

Re: [PATCH] perf tools: Fix check-headers.sh AND list path of execution

On Mon, Aug 13, 2018 at 9:58 PM Arnaldo Carvalho de Melo wrote: > Thanks, applied the three patches to acme/perf/core. > > - Arnaldo Thanks.

Re: [PATCH] mmc: Move the mmc driver init earlier

Hi Greg, Ulf Could you help to review this? many thanks! - Feng On Thu, Aug 02, 2018 at 05:15:39PM +0800, Feng Tang wrote: > Hi Ulf, > > On Tue, Jun 12, 2018 at 12:29:50PM +0200, Ulf Hansson wrote: > > On 12 June 2018 at 10:42, Feng Tang wrote: > > > Hi Ulf, > > > > > > Thanks for the review.

Re: [PATCH] perf tools: Add struct ordered_events_buffer layer

Jiri, On Mon, Aug 13, 2018 at 6:04 AM Jiri Olsa wrote: > > On Fri, Aug 10, 2018 at 01:54:31PM +0200, Jiri Olsa wrote: > > On Fri, Aug 10, 2018 at 01:21:18AM -0700, Stephane Eranian wrote: > > > On Thu, Aug 9, 2018 at 1:07 AM Jiri Olsa wrote: > > > > > > > > On Wed, Aug 08, 2018 at 03:33:20PM

RE: [PATCH 2/2] clk: imx: imx7d: remove clks_init_on array

Hi, Peng Anson Huang Best Regards! > -Original Message- > From: Peng Fan > Sent: Monday, August 13, 2018 9:16 AM > To: Anson Huang ; shawn...@kernel.org; > s.ha...@pengutronix.de; ker...@pengutronix.de; Fabio Estevam > ; mturque...@baylibre.com; sb...@kernel.org; >

general protection fault in kvm_ioapic_scan_entry

Hello, syzbot found the following crash on: HEAD commit:1c2f2531cf8b Add linux-next specific files for 20180809 git tree: linux-next console output: https://syzkaller.appspot.com/x/log.txt?x=16016cf840 kernel config: https://syzkaller.appspot.com/x/.config?x=44657afb75515c8b

Re: [PATCH] bitfield: avoid gcc-8 -Wint-in-bool-context warning

On Tue, 2018-08-14 at 08:57 +0900, Masahiro Yamada wrote: > 2018-08-14 7:09 GMT+09:00 Arnd Bergmann : > > Passing an enum into FIELD_GET() produces a long but harmless warning on > > newer compilers: > > > > from include/linux/linkage.h:7, > > from

[PATCH] arm64: lib: use c string functions for KASAN support

Assembly optimized string functions cannot detect KASan bug. This might have been the intention of the original author. (not too much important to catch) But, I found the obvious uaf problem in strcmp() function. - in this case, using 32bit KASan patchset helps Since I used c string function, I

[PATCH] Use default .cfg file name for RTL8723BS devices with id of OBDA8723

For RTL8723BS devices the current config file name is a composite of both the config name (rtl8723bs) and a postfix of the device-id. Given the majority of RTL8723BS devices use a device-id of OBDA8723 this simplifies the config file name to use "rtl8723bs_config.bin" as a default of for these

Re: [PATCH] Use default .cfg file name for RTL8723BS devices with id of OBDA8723

Hi, On 14-08-18 08:47, Ian W MORRISON wrote: For RTL8723BS devices the current config file name is a composite of both the config name (rtl8723bs) and a postfix of the device-id. Given the majority of RTL8723BS devices use a device-id of OBDA8723 this simplifies the config file name to use

Re: [PATCH] android: binder: no outgoing transaction when thread todo has transaction

Sherry, this was found by syzkaller, right? In that case, can you add the tag so the issue gets closed automatically when this gets merged? On Tue, Aug 14, 2018 at 2:28 AM, Sherry Yang wrote: > When a process dies, failed reply is sent to the sender of any transaction > queued on a dead

Re: [PATCH] mmc: Move the mmc driver init earlier

Hi Greg, Thanks for the prompt review. On Tue, Aug 14, 2018 at 09:40:41AM +0200, Greg Kroah-Hartman wrote: > On Tue, Aug 14, 2018 at 03:38:10PM +0800, Feng Tang wrote: > > Hi Greg, > > > > On Tue, Aug 14, 2018 at 09:18:34AM +0200, Greg Kroah-Hartman wrote: > > > On Tue, Aug 14, 2018 at

linux-next: Tree for Aug 14

Hi all, Please do not add any v4.20 material to your linux-next included branches until after v4.19-rc1 has been released. Changes since 20180813: Non-merge commits (relative to Linus' tree): 12053 10771 files changed, 512108 insertions(+), 210583 deletions(-)

Re: [RFC PATCH 1/2] ARM: dt: fpga: Added binding docs for Xilinx zynqmp FPGA manager

On Wed, Aug 01, 2018 at 03:34:56PM +0530, Nava kishore Manne wrote: > New bindings document for zynqmp fpga manager. > > Signed-off-by: Nava kishore Manne > --- > .../devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt | 9 + > 1 file changed, 9 insertions(+) > create mode 100644 >

Re: Warning when using eMMC and partprobe: generic_make_request: Trying to write to read-only block-device

On 8/14/18 10:51 AM, Linus Torvalds wrote: > On Tue, Aug 14, 2018 at 9:26 AM Jens Axboe wrote: >> >>> >>> We probably just want to special case a flush for this check. In other >>> situations, like resource allocation and issue, we'd want to consider >>> it a write. >> >> Ala: > > Ack, looks

Re: Build failures with gcc 4.5 and older

On Tue, Aug 14, 2018 at 10:09 AM Guenter Roeck wrote: > > Does that mean that gcc 4.5 and older are now officially no longer > supported for compiling the kernel ? I guess we might as well make this the excuse for making that official. Maybe it's trivially fixable, but I don't even want to look

[PATCH 4.18 09/79] x86/speculation/l1tf: Make sure the first page is always reserved

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen The L1TF workaround doesn't make any attempt to mitigate speculate accesses to the first physical page for zeroed PTEs. Normally it only contains some data from the early real mode

[PATCH 4.18 06/79] x86/speculation/l1tf: Change order of offset/type in swap entry

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Linus Torvalds If pages are swapped out, the swap entry is stored in the corresponding PTE, which has the Present bit cleared. CPUs vulnerable to L1TF speculate on PTE entries which have the

[PATCH 4.18 00/79] 4.18.1-stable review

This is the start of the stable review cycle for the 4.18.1 release. There are 79 patches in this series, all will be posted as a response to this one. If anyone has any issues with these being applied, please let me know. Responses should be made by Thu Aug 16 17:13:16 UTC 2018. Anything

[PATCH 4.18 08/79] x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen When PTEs are set to PROT_NONE the kernel just clears the Present bit and preserves the PFN, which creates attack surface for L1TF speculation speculation attacks. This is

[PATCH 4.18 07/79] x86/speculation/l1tf: Protect swap entries against L1TF

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Linus Torvalds With L1 terminal fault the CPU speculates into unmapped PTEs, and resulting side effects allow to read the memory the PTE is pointing too, if its values are still in the L1

[PATCH 4.18 04/79] x86/irqflags: Provide a declaration for native_save_fl

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Nick Desaulniers commit 208cbb32558907f68b3b2a081ca2337ac3744794 upstream. It was reported that the commit d0a8d9378d16 is causing users of gcc < 4.9 to observe -Werror=missing-prototypes

[PATCH 4.18 45/79] cpu/hotplug: Online siblings when SMT control is turned on

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner Writing 'off' to /sys/devices/system/cpu/smt/control offlines all SMT siblings. Writing 'on' merily enables the abilify to online them, but does not online them automatically.

[PATCH 4.18 44/79] x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk If the L1D flush module parameter is set to 'always' and the IA32_FLUSH_CMD MSR is available, optimize the VMENTER code with the MSR save list. Signed-off-by: Konrad

[PATCH 4.18 46/79] x86/litf: Introduce vmx status variable

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner Store the effective mitigation of VMX in a status variable and use it to report the VMX state in the l1tf sysfs file. Signed-off-by: Thomas Gleixner Tested-by: Jiri Kosina

[PATCH 4.18 05/79] x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen L1 Terminal Fault (L1TF) is a speculation related vulnerability. The CPU speculates on PTE entries which do not have the PRESENT bit set, if the content of the resulting physical

[PATCH 4.18 30/79] x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Borislav Petkov The TOPOEXT reenablement is a workaround for broken BIOSen which didn't enable the CPUID bit. amd_get_topology_early(), however, relies on that bit being set so that it can

[PATCH 4.18 43/79] x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk The IA32_FLUSH_CMD MSR needs only to be written on VMENTER. Extend add_atomic_switch_msr() with an entry_only parameter to allow storing the MSR only in the guest (ENTRY)

[PATCH 4.18 42/79] x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk This allows to load a different number of MSRs depending on the context: VMEXIT or VMENTER. Signed-off-by: Konrad Rzeszutek Wilk Signed-off-by: Thomas Gleixner

[PATCH 4.18 48/79] x86/l1tf: Handle EPT disabled state proper

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner If Extended Page Tables (EPT) are disabled or not supported, no L1D flushing is required. The setup function can just avoid setting up the L1D flush for the EPT=n case. Invoke

[PATCH 4.18 49/79] x86/kvm: Move l1tf setup function

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner In preparation of allowing run time control for L1D flushing, move the setup code to the module parameter handler. In case of pre module init parsing, just store the value and

[PATCH 4.18 47/79] x86/kvm: Drop L1TF MSR list approach

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner The VMX module parameter to control the L1D flush should become writeable. The MSR list is set up at VM init per guest VCPU, but the run time switching is based on a static

[PATCH 4.18 29/79] x86/cpufeatures: Add detection of L1D cache flush support.

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk 336996-Speculative-Execution-Side-Channel-Mitigations.pdf defines a new MSR (IA32_FLUSH_CMD) which is detected by CPUID.7.EDX[28]=1 bit being set. This new MSR "gives

[PATCH 4.18 03/79] kprobes/x86: Fix %p uses in error messages

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Masami Hiramatsu commit 0ea063306eecf300fcf06d2f5917474b580f666f upstream. Remove all %p uses in error messages in kprobes/x86. Signed-off-by: Masami Hiramatsu Cc: Ananth N

[PATCH 4.18 32/79] x86/speculation/l1tf: Fix up pte->pfn conversion for PAE

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Michal Hocko Jan has noticed that pte_pfn and co. resp. pfn_pte are incorrect for CONFIG_PAE because phys_addr_t is wider than unsigned long and so the pte_val reps. shift left would get

[PATCH 4.18 41/79] x86/KVM/VMX: Add find_msr() helper function

4.18-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk .. to help find the MSR on either the guest or host MSR list. Signed-off-by: Konrad Rzeszutek Wilk Signed-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman

[PATCH 4.14 040/104] cpu/hotplug: Provide knobs to control SMT

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 05736e4ac13c08a4a9b1ef2de26dd31a32cbee57 upstream Provide a command line and a sysfs knob to control SMT. The command line options are: 'nosmt': Enumerate

[PATCH 4.14 068/104] x86/kvm: Drop L1TF MSR list approach

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 2f055947ae5e2741fb2dc5bba1033c417ccf4faa upstream The VMX module parameter to control the L1D flush should become writeable. The MSR list is set up at VM init per

[PATCH 4.14 071/104] x86/kvm: Add static key for flush always

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 4c6523ec59fe895ea352a650218a6be0653910b1 upstream Avoid the conditional in the L1D flush control path. Signed-off-by: Thomas Gleixner Tested-by: Jiri Kosina

[PATCH 4.14 066/104] cpu/hotplug: Online siblings when SMT control is turned on

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 215af5499d9e2b55f111d2431ea20218115f29b3 upstream Writing 'off' to /sys/devices/system/cpu/smt/control offlines all SMT siblings. Writing 'on' merily enables the

[PATCH 4.14 073/104] x86/kvm: Allow runtime control of L1D flush

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 895ae47f9918833c3a880fbccd41e0692b37e7d9 upstream All mitigation modes can be switched at run time with a static key now: - Use sysfs_streq() instead of strcmp() to

[PATCH 4.14 035/104] sched/smt: Update sched_smt_present at runtime

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Peter Zijlstra commit ba2591a5993eabcc8e874e30f361d8ffbb10d6d4 upstream The static key sched_smt_present is only updated at boot time when SMT siblings have been detected. Booting with

[PATCH 4.14 072/104] x86/kvm: Serialize L1D flush parameter setter

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit dd4bfa739a72508b75760b393d129ed7b431daab upstream Writes to the parameter files are not serialized at the sysfs core level, so local serialization is required.

[PATCH 4.14 037/104] x86/topology: Provide topology_smt_supported()

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit f048c399e0f7490ab7296bc2c255d37eb14a9675 upstream Provide information whether SMT is supoorted by the CPUs. Preparatory patch for SMT control mechanism. Suggested-by:

[PATCH 4.14 036/104] x86/smp: Provide topology_is_primary_thread()

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 6a4d2657e048f096c7ffcad254010bd94891c8c0 upstream If the CPU is supporting SMT then the primary thread can be found by checking the lower APIC ID bits for zero.

[PATCH 4.14 070/104] x86/kvm: Move l1tf setup function

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 7db92e165ac814487264632ab2624e832f20ae38 upstream In preparation of allowing run time control for L1D flushing, move the setup code to the module parameter handler. In

[PATCH 4.14 031/104] x86/speculation/l1tf: Add sysfs reporting for l1tf

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Andi Kleen commit 17dbca119312b4e8173d4e25ff64262119fcef38 upstream L1TF core kernel workarounds are cheap and normally always enabled, However they still should be reported in sysfs if the

[PATCH 4.14 087/104] x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Nicolai Stange commit ffcba43ff66c7dab34ec700debd491d2a4d319b4 upstream The last missing piece to having vmx_l1d_flush() take interrupts after VMEXIT into account is to set the

[PATCH 4.14 086/104] x86: Dont include linux/irq.h from asm/hardirq.h

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Nicolai Stange commit 447ae316670230d7d29430e2cbf1f5db4f49d14c upstream The next patch in this series will have to make the definition of irq_cpustat_t available to entering_irq(). Inclusion

[PATCH 4.14 088/104] x86/KVM/VMX: Dont set l1tf_flush_l1d from vmx_handle_external_intr()

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Nicolai Stange commit 18b57ce2eb8c8b9a24174a89250cf5f57c76ecdc upstream For VMEXITs caused by external interrupts, vmx_handle_external_intr() indirectly calls into the interrupt handlers

[PATCH 4.14 089/104] Documentation/l1tf: Remove Yonah processors from not vulnerable list

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 58331136136935c631c2b5f06daf4c3006416e91 upstream Dave reported, that it's not confirmed that Yonah processors are unaffected. Remove them from the list. Reported-by:

[PATCH 4.14 096/104] x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Paolo Bonzini commit 8e0b2b916662e09dd4d09e5271cdf214c6b80e62 upstream Bit 3 of ARCH_CAPABILITIES tells a hypervisor that L1D flush on vmentry is not needed. Add a new value to enum

[PATCH 4.14 095/104] x86/speculation: Simplify sysfs report of VMX L1TF vulnerability

4.14-stable review patch. If anyone has any objections, please let me know. -- From: Paolo Bonzini commit ea156d192f5257a5bf393d33910d3b481bf8a401 upstream Three changes to the content of the sysfs file: - If EPT is disabled, L1TF cannot be exploited even across threads on

[PATCH 4.9 078/107] x86/bugs, kvm: Introduce boot-time control of L1TF mitigations

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Jiri Kosina commit d90a7a0ec83fb86622cd7dae23255d3c50a99ec8 upstream Introduce the 'l1tf=' kernel command line option to allow for boot-time switching of mitigation that is used on processors

[PATCH 4.9 083/107] x86/KVM/VMX: Dont set l1tf_flush_l1d to true from vmx_l1d_flush()

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Nicolai Stange commit 379fd0c7e6a391e5565336a646f19f218fb98c6c upstream vmx_l1d_flush() gets invoked only if l1tf_flush_l1d is true. There's no point in setting l1tf_flush_l1d to true from

[PATCH v2 1/2] WIP: 9p: rename p9_free_req() function

In sight of the next patch to add a refcount in p9_req_t, rename the p9_free_req() function in p9_release_req(). In the next patch the actual kfree will be moved to another function. Signed-off-by: Tomas Bortoli Signed-off-by: Dominique Martinet --- net/9p/client.c | 100

[PATCH 4.9 084/107] x86/KVM/VMX: Replace vmx_l1d_flush_always with vmx_l1d_flush_cond

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Nicolai Stange commit 427362a142441f08051369db6fbe7f61c73b3dca upstream The vmx_l1d_flush_always static key is only ever evaluated if vmx_l1d_should_flush is enabled. In that case however,

[PATCH 4.9 085/107] x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Nicolai Stange commit 5b6ccc6c3b1a477fbac9ec97a0b4c1c48e765209 upstream Currently, vmx_vcpu_run() checks if l1tf_flush_l1d is set and invokes vmx_l1d_flush() if so. This test is unncessary

[PATCH 4.9 076/107] cpu/hotplug: Expose SMT control init function

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Jiri Kosina commit 8e1b706b6e819bed215c0db16345568864660393 upstream The L1TF mitigation will gain a commend line parameter which allows to set a combination of hypervisor mitigation and SMT

[PATCH 4.9 079/107] Documentation: Add section about CPU vulnerabilities

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 3ec8ce5d866ec6a08a9cfab82b62acf4a830b35f upstream Add documentation for the L1TF vulnerability and the mitigation mechanisms: - Explain the problem and risks -

[PATCH 4.9 086/107] x86/irq: Demote irq_cpustat_t::__softirq_pending to u16

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Nicolai Stange commit 9aee5f8a7e30330d0a8f4c626dc924ca5590aba5 upstream An upcoming patch will extend KVM's L1TF mitigation in conditional mode to also cover interrupts after VMEXITs. For

[PATCH 4.9 082/107] cpu/hotplug: detect SMT disabled by BIOS

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Josh Poimboeuf commit 73d5e2b472640b1fcdb61ae8be389912ef211bda upstream If SMT is disabled in BIOS, the CPU code doesn't properly detect it. The /sys/devices/system/cpu/smt/control file shows

[PATCH 4.9 088/107] x86: Dont include linux/irq.h from asm/hardirq.h

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Nicolai Stange commit 447ae316670230d7d29430e2cbf1f5db4f49d14c upstream The next patch in this series will have to make the definition of irq_cpustat_t available to entering_irq(). Inclusion

[PATCH 4.9 087/107] x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Nicolai Stange commit 45b575c00d8e72d69d75dd8c112f044b7b01b069 upstream Part of the L1TF mitigation for vmx includes flushing the L1D cache upon VMENTRY. L1D flushes are costly and two modes

[PATCH 4.9 090/107] x86/KVM/VMX: Dont set l1tf_flush_l1d from vmx_handle_external_intr()

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Nicolai Stange commit 18b57ce2eb8c8b9a24174a89250cf5f57c76ecdc upstream For VMEXITs caused by external interrupts, vmx_handle_external_intr() indirectly calls into the interrupt handlers

[PATCH 4.9 091/107] Documentation/l1tf: Remove Yonah processors from not vulnerable list

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 58331136136935c631c2b5f06daf4c3006416e91 upstream Dave reported, that it's not confirmed that Yonah processors are unaffected. Remove them from the list. Reported-by:

[PATCH 4.9 055/107] Revert "x86/apic: Ignore secondary threads if nosmt=force"

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 506a66f374891ff08e064a058c446b336c5ac760 upstream Dave Hansen reported, that it's outright dangerous to keep SMT siblings disabled completely so they are stuck in the

[PATCH 4.9 081/107] Documentation/l1tf: Fix typos

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Tony Luck commit 1949f9f49792d65dba2090edddbe36a5f02e3ba3 upstream Fix spelling and other typos Signed-off-by: Tony Luck Signed-off-by: Thomas Gleixner Signed-off-by: David Woodhouse

[PATCH 4.9 089/107] x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Nicolai Stange commit ffcba43ff66c7dab34ec700debd491d2a4d319b4 upstream The last missing piece to having vmx_l1d_flush() take interrupts after VMEXIT into account is to set the

[PATCH 4.9 054/107] x86/speculation/l1tf: Fix up pte->pfn conversion for PAE

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Michal Hocko commit e14d7dfb41f5807a0c1c26a13f2b8ef16af24935 upstream Jan has noticed that pte_pfn and co. resp. pfn_pte are incorrect for CONFIG_PAE because phys_addr_t is wider than unsigned

[PATCH 4.9 080/107] x86/KVM/VMX: Initialize the vmx_l1d_flush_pages content

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Nicolai Stange commit 288d152c23dcf3c09da46c5c481903ca10ebfef7 upstream The slow path in vmx_l1d_flush() reads from vmx_l1d_flush_pages in order to evict the L1d cache. However, these pages

[PATCH 4.9 051/107] x86/cpufeatures: Add detection of L1D cache flush support.

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk commit 11e34e64e4103955fc4568750914c75d65ea87ee upstream 336996-Speculative-Execution-Side-Channel-Mitigations.pdf defines a new MSR (IA32_FLUSH_CMD) which is detected by

[PATCH 4.9 056/107] cpu/hotplug: Boot HT siblings at least once

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 0cc3cd21657be04cb0559fe8063f2130493f92cf upstream Due to the way Machine Check Exceptions work on X86 hyperthreads it's required to boot up _all_ logical cores at least

[PATCH 4.9 058/107] x86/KVM/VMX: Add module argument for L1TF mitigation

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk commit a399477e52c17e148746d3ce9a483f681c2aa9a0 upstream Add a mitigation mode parameter "vmentry_l1d_flush" for CVE-2018-3620, aka L1 terminal fault. The valid arguments

[PATCH 4.9 059/107] x86/KVM/VMX: Add L1D flush algorithm

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Paolo Bonzini commit a47dd5f06714c844b33f3b5f517b6f3e81ce57b5 upstream To mitigate the L1 Terminal Fault vulnerability it's required to flush L1D on VMENTER to prevent rogue guests from

[PATCH 4.9 071/107] x86/l1tf: Handle EPT disabled state proper

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit a7b9020b06ec6d7c3f3b0d4ef1a9eba12654f4f7 upstream If Extended Page Tables (EPT) are disabled or not supported, no L1D flushing is required. The setup function can just

[PATCH 4.9 069/107] x86/litf: Introduce vmx status variable

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 72c6d2db64fa18c996ece8f06e499509e6c9a37e upstream Store the effective mitigation of VMX in a status variable and use it to report the VMX state in the l1tf sysfs file.

[PATCH 4.9 072/107] x86/kvm: Move l1tf setup function

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit 7db92e165ac814487264632ab2624e832f20ae38 upstream In preparation of allowing run time control for L1D flushing, move the setup code to the module parameter handler. In

[PATCH 4.9 057/107] x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Konrad Rzeszutek Wilk commit 26acfb666a473d960f0fd971fe68f3e3ad16c70b upstream If the L1TF CPU bug is present we allow the KVM module to be loaded as the major of users that use Linux and KVM

[PATCH 4.9 077/107] cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Thomas Gleixner commit fee0aede6f4739c87179eca76136f83210953b86 upstream The CPU_SMT_NOT_SUPPORTED state is set (if the processor does not support SMT) when the sysfs SMT control file is

[PATCH 4.9 017/107] proc: Fix proc_sys_prune_dcache to hold a sb reference

4.9-stable review patch. If anyone has any objections, please let me know. -- From: Eric W. Biederman commit 2fd1d2c4ceb2248a727696962cf3370dc9f5a0a4 upstream. Andrei Vagin writes: FYI: This bug has been reproduced on 4.11.7 > BUG: Dentry 895a3dd01240{i=4e7c09a,n=lo}

[PATCH] x86/kvm/vmx: Remove duplicate l1d flush definitions

These are already defined higher up in the file. Cc: sta...@vger.kernel.org Signed-off-by: Josh Poimboeuf --- arch/x86/kvm/vmx.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 58bba7a7572a..e7691e666479 100644 --- a/arch/x86/kvm/vmx.c +++

[PATCH 4.17 45/97] x86/speculation/l1tf: Extend 64bit swap file size limit

4.17-stable review patch. If anyone has any objections, please let me know. -- From: Vlastimil Babka commit 1a7ed1ba4bba6c075d5ad61bb75e3fbc870840d6 upstream The previous patch has limited swap file size so that large offsets cannot clear bits above MAX_PA/2 in the pte and

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