Hi Sibi,
On Fri, Aug 24, 2018 at 06:48:55PM +0530, Sibi Sankar wrote:
> Add PDC Global(Power Domain Controller) binding for SDM845 SoCs.
nit: missing blank before the opening parenthesis.
>
> Signed-off-by: Sibi Sankar
> ---
> .../bindings/reset/qcom,pdc-global.txt| 52
Hi Sibi,
On Fri, Aug 24, 2018 at 06:48:55PM +0530, Sibi Sankar wrote:
> Add PDC Global(Power Domain Controller) binding for SDM845 SoCs.
nit: missing blank before the opening parenthesis.
>
> Signed-off-by: Sibi Sankar
> ---
> .../bindings/reset/qcom,pdc-global.txt| 52
On Fri, Aug 24, 2018 at 08:05:46PM -0400, Zi Yan wrote:
> Hi Jérôme,
>
> On 24 Aug 2018, at 15:25, jgli...@redhat.com wrote:
>
> > From: Jérôme Glisse
> >
> > Before this patch migration pmd entry (!pmd_present()) would have
> > been treated as a bad entry (pmd_bad() returns true on migration
>
On Fri, Aug 24, 2018 at 08:05:46PM -0400, Zi Yan wrote:
> Hi Jérôme,
>
> On 24 Aug 2018, at 15:25, jgli...@redhat.com wrote:
>
> > From: Jérôme Glisse
> >
> > Before this patch migration pmd entry (!pmd_present()) would have
> > been treated as a bad entry (pmd_bad() returns true on migration
>
On Fri 24 Aug 06:18 PDT 2018, Sibi Sankar wrote:
> Add PDC Global(Power Domain Controller) binding for SDM845 SoCs.
>
> Signed-off-by: Sibi Sankar
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> .../bindings/reset/qcom,pdc-global.txt| 52 +++
>
On Fri 24 Aug 06:18 PDT 2018, Sibi Sankar wrote:
> Add PDC Global(Power Domain Controller) binding for SDM845 SoCs.
>
> Signed-off-by: Sibi Sankar
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> .../bindings/reset/qcom,pdc-global.txt| 52 +++
>
--
Dear Assalamu Alaikum,
I came across your contact during my private search
Mrs Aisha Al-Qaddafi is my name, the only daughter of late Libyan
president, I have funds the sum
of $27.5 million USD for investment, I am interested in you for
investment project assistance in your country,
i shall
--
Dear Assalamu Alaikum,
I came across your contact during my private search
Mrs Aisha Al-Qaddafi is my name, the only daughter of late Libyan
president, I have funds the sum
of $27.5 million USD for investment, I am interested in you for
investment project assistance in your country,
i shall
On Fri 24 Aug 13:01 PDT 2018, Lina Iyer wrote:
> Enable TLMM IRQs to be sensed by PDC when we enter suspend. It is
> possible that the TLMM may be powered off and not detect GPIOs that are
> configured as wake up interrupts. By hooking into suspend callbacks, we
> allow PDC IRQs to take over and
On Fri 24 Aug 13:01 PDT 2018, Lina Iyer wrote:
> Enable TLMM IRQs to be sensed by PDC when we enter suspend. It is
> possible that the TLMM may be powered off and not detect GPIOs that are
> configured as wake up interrupts. By hooking into suspend callbacks, we
> allow PDC IRQs to take over and
_FP_ROUND_ZERO is defined as 0 and used as a statemente in macro
_FP_ROUND. This will generate "error: statement with no effect
[-Werror=unused-value]" from gcc when compiling. Defining
_FP_ROUND_ZERO as (void)0 to fix it.
This modification references the content of glibc 'commit
_FP_ROUND_ZERO is defined as 0 and used as a statemente in macro
_FP_ROUND. This will generate "error: statement with no effect
[-Werror=unused-value]" from gcc when compiling. Defining
_FP_ROUND_ZERO as (void)0 to fix it.
This modification references the content of glibc 'commit
This modification references the content of glibc 'commit <
sysdeps/unix/sysv/linux/sparc/sparc64/dl-procinfo.c: Moved to>
(fe0b1e854ad32a69b260)'
Signed-off-by: Vincent Chen
---
include/math-emu/op-2.h | 97 ++
1 files changed, 46 insertions(+), 51
This modification references the content of glibc 'commit <
sysdeps/unix/sysv/linux/sparc/sparc64/dl-procinfo.c: Moved to>
(fe0b1e854ad32a69b260)'
Signed-off-by: Vincent Chen
---
include/math-emu/op-2.h | 97 ++
1 files changed, 46 insertions(+), 51
On Mon 27 Aug 09:56 PDT 2018, Lina Iyer wrote:
> On Sun, Aug 26 2018 at 08:33 -0600, Linus Walleij wrote:
> > On Fri, Aug 17, 2018 at 6:39 PM Lina Iyer wrote:
> >
> > > QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
> > > domain can wakeup the SoC, when interrupts and
On Mon 27 Aug 09:56 PDT 2018, Lina Iyer wrote:
> On Sun, Aug 26 2018 at 08:33 -0600, Linus Walleij wrote:
> > On Fri, Aug 17, 2018 at 6:39 PM Lina Iyer wrote:
> >
> > > QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
> > > domain can wakeup the SoC, when interrupts and
Hi Sibi,
On Fri, Aug 24, 2018 at 06:48:56PM +0530, Sibi Sankar wrote:
> Add reset controller for SDM845 SoCs to control reset signals provided
> by PDC Global for Modem, Compute, Display, GPU, Debug, AOP, Sensors,
> Audio, SP and APPS
>
> Signed-off-by: Sibi Sankar
> ---
>
Hi Sibi,
On Fri, Aug 24, 2018 at 06:48:56PM +0530, Sibi Sankar wrote:
> Add reset controller for SDM845 SoCs to control reset signals provided
> by PDC Global for Modem, Compute, Display, GPU, Debug, AOP, Sensors,
> Audio, SP and APPS
>
> Signed-off-by: Sibi Sankar
> ---
>
> +#define X86_FEATURE_SGX_LC (16*32+30) /* supports SGX launch
> configuration */
Sorry if it was me who wrote the comment "SGX launch configuration". I think we
should just use "SGX launch control". :)
Thanks,
-Kai
>
> /* AMD-defined CPU features, CPUID level 0x8007 (EBX),
> +#define X86_FEATURE_SGX_LC (16*32+30) /* supports SGX launch
> configuration */
Sorry if it was me who wrote the comment "SGX launch configuration". I think we
should just use "SGX launch control". :)
Thanks,
-Kai
>
> /* AMD-defined CPU features, CPUID level 0x8007 (EBX),
On Tue, Aug 28, 2018 at 1:26 AM Andy Lutomirski wrote:
>
> On Mon, Aug 27, 2018 at 4:12 PM, Jann Horn wrote:
> > On Tue, Aug 28, 2018 at 1:04 AM Andy Lutomirski wrote:
> >>
> >> In NMI context, we might be in the middle of context switching or in
> >> the middle of switch_mm_irqs_off(). In
On Tue, Aug 28, 2018 at 1:26 AM Andy Lutomirski wrote:
>
> On Mon, Aug 27, 2018 at 4:12 PM, Jann Horn wrote:
> > On Tue, Aug 28, 2018 at 1:04 AM Andy Lutomirski wrote:
> >>
> >> In NMI context, we might be in the middle of context switching or in
> >> the middle of switch_mm_irqs_off(). In
On 8/23/18 2:25 PM, Masayoshi Mizuma wrote:
> From: Naoya Horiguchi
>
> There is a kernel panic that is triggered when reading /proc/kpageflags
> on the kernel booted with kernel parameter 'memmap=nn[KMG]!ss[KMG]':
>
> BUG: unable to handle kernel paging request at fffe
> PGD
On 8/23/18 2:25 PM, Masayoshi Mizuma wrote:
> From: Naoya Horiguchi
>
> There is a kernel panic that is triggered when reading /proc/kpageflags
> on the kernel booted with kernel parameter 'memmap=nn[KMG]!ss[KMG]':
>
> BUG: unable to handle kernel paging request at fffe
> PGD
On Mon, Aug 27, 2018 at 02:04:32PM -0700, Andrew Morton wrote:
> On Mon, 27 Aug 2018 09:26:21 -0700 Roman Gushchin wrote:
>
> > I've noticed, that dying memory cgroups are often pinned
> > in memory by a single pagecache page. Even under moderate
> > memory pressure they sometimes stayed in
On Mon, Aug 27, 2018 at 02:04:32PM -0700, Andrew Morton wrote:
> On Mon, 27 Aug 2018 09:26:21 -0700 Roman Gushchin wrote:
>
> > I've noticed, that dying memory cgroups are often pinned
> > in memory by a single pagecache page. Even under moderate
> > memory pressure they sometimes stayed in
On Mon, Aug 27, 2018 at 4:12 PM, Jann Horn wrote:
> On Tue, Aug 28, 2018 at 1:04 AM Andy Lutomirski wrote:
>>
>> In NMI context, we might be in the middle of context switching or in
>> the middle of switch_mm_irqs_off(). In either case, CR3 might not
>> match current->mm, which could cause
On Mon, Aug 27, 2018 at 4:12 PM, Jann Horn wrote:
> On Tue, Aug 28, 2018 at 1:04 AM Andy Lutomirski wrote:
>>
>> In NMI context, we might be in the middle of context switching or in
>> the middle of switch_mm_irqs_off(). In either case, CR3 might not
>> match current->mm, which could cause
On Mon, Aug 27, 2018 at 02:01:43PM -0700, Andrew Morton wrote:
> On Mon, 27 Aug 2018 09:26:19 -0700 Roman Gushchin wrote:
>
> > If CONFIG_VMAP_STACK is set, kernel stacks are allocated
> > using __vmalloc_node_range() with __GFP_ACCOUNT. So kernel
> > stack pages are charged against
On Mon, Aug 27, 2018 at 02:01:43PM -0700, Andrew Morton wrote:
> On Mon, 27 Aug 2018 09:26:19 -0700 Roman Gushchin wrote:
>
> > If CONFIG_VMAP_STACK is set, kernel stacks are allocated
> > using __vmalloc_node_range() with __GFP_ACCOUNT. So kernel
> > stack pages are charged against
On 8/23/18 2:25 PM, Masayoshi Mizuma wrote:
> From: Masayoshi Mizuma
>
> commit 124049decbb1 ("x86/e820: put !E820_TYPE_RAM regions into
> memblock.reserved") breaks movable_node kernel option because it
> changed the memory gap range to reserved memblock. So, the node
> is marked as Normal zone
On 8/23/18 2:25 PM, Masayoshi Mizuma wrote:
> From: Masayoshi Mizuma
>
> commit 124049decbb1 ("x86/e820: put !E820_TYPE_RAM regions into
> memblock.reserved") breaks movable_node kernel option because it
> changed the memory gap range to reserved memblock. So, the node
> is marked as Normal zone
seq_puts() is faster than seq_printf() because it doesn't search for
format specifiers.
Signed-off-by: Alexey Dobriyan
---
fs/proc/array.c | 16
fs/proc/base.c | 2 +-
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/fs/proc/array.c b/fs/proc/array.c
index
seq_puts() is faster than seq_printf() because it doesn't search for
format specifiers.
Signed-off-by: Alexey Dobriyan
---
fs/proc/array.c | 16
fs/proc/base.c | 2 +-
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/fs/proc/array.c b/fs/proc/array.c
index
---
fs/proc/base.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/fs/proc/base.c b/fs/proc/base.c
index 33f444721965..668e465c86b3 100644
--- a/fs/proc/base.c
+++ b/fs/proc/base.c
@@ -3549,11 +3549,11 @@ static int proc_task_readdir(struct file *file, struct
C lacks a capable preprocess to turn
snprintf(buf, sizeof(buf), "%u", x);
into
print_integer_u32(buf, x);
so vsnprintf() is forced to have a million branches.
Benchmark anything which uses /proc and look for format_decode().
This unfortunate situation was partially fixed by
Announcing a new -ck release, 4.18-ck1 with the latest version of the
Multiple Queue Skiplist Scheduler, version 0.173. These are patches designed
to improve system responsiveness and interactivity with specific emphasis on
the desktop, but configurable for any workload.
linux-4.18-ck1:
-ck1
Benchmark fork+exit+waitpid 2^16 times:
6.579161299 seconds time elapsed ( +- 0.24% )
6.482729157 seconds time elapsed ( +- 0.42% )
-1.5%
Dentry flushing is very small part of exit(2), effects should be more
visible on a tiny 1-page process which doesn't uses libc.
Benchmark pread /proc/1/task/1/children 2^21 times on the same system:
6.766400479 s
4.328648442
-36%
(need to remeasure on a controlled set of children)
Signed-off-by: Alexey Dobriyan
---
fs/proc/array.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
---
fs/proc/base.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/fs/proc/base.c b/fs/proc/base.c
index 33f444721965..668e465c86b3 100644
--- a/fs/proc/base.c
+++ b/fs/proc/base.c
@@ -3549,11 +3549,11 @@ static int proc_task_readdir(struct file *file, struct
C lacks a capable preprocess to turn
snprintf(buf, sizeof(buf), "%u", x);
into
print_integer_u32(buf, x);
so vsnprintf() is forced to have a million branches.
Benchmark anything which uses /proc and look for format_decode().
This unfortunate situation was partially fixed by
Announcing a new -ck release, 4.18-ck1 with the latest version of the
Multiple Queue Skiplist Scheduler, version 0.173. These are patches designed
to improve system responsiveness and interactivity with specific emphasis on
the desktop, but configurable for any workload.
linux-4.18-ck1:
-ck1
Benchmark fork+exit+waitpid 2^16 times:
6.579161299 seconds time elapsed ( +- 0.24% )
6.482729157 seconds time elapsed ( +- 0.42% )
-1.5%
Dentry flushing is very small part of exit(2), effects should be more
visible on a tiny 1-page process which doesn't uses libc.
Benchmark pread /proc/1/task/1/children 2^21 times on the same system:
6.766400479 s
4.328648442
-36%
(need to remeasure on a controlled set of children)
Signed-off-by: Alexey Dobriyan
---
fs/proc/array.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
Use slightly more obvious "tsk" and prepare for changes in printing.
Signed-off-by: Alexey Dobriyan
---
fs/proc/fd.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/fs/proc/fd.c b/fs/proc/fd.c
index 81882a13212d..e098302b5101 100644
--- a/fs/proc/fd.c
+++
Benchmark readlink("/proc/thread-self") 2^23 times:
9.447948508 seconds time elapsed ( +- 0.06% )
7.846435274 seconds time elapsed ( +- 0.07% )
-17%
---
fs/proc/thread_self.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
Use slightly more obvious "tsk" and prepare for changes in printing.
Signed-off-by: Alexey Dobriyan
---
fs/proc/fd.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/fs/proc/fd.c b/fs/proc/fd.c
index 81882a13212d..e098302b5101 100644
--- a/fs/proc/fd.c
+++
Benchmark readlink("/proc/thread-self") 2^23 times:
9.447948508 seconds time elapsed ( +- 0.06% )
7.846435274 seconds time elapsed ( +- 0.07% )
-17%
---
fs/proc/thread_self.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
Benchmark readdir("/proc") 2^13 times with 2K processes in a pid
namespace:
850.3750 us per readdir
786.5625
-7.5%
Signed-off-by: Alexey Dobriyan
---
fs/proc/base.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/fs/proc/base.c
Use "mfi", add "const" and move structure definition closer while I'm at it.
Note: moving "struct map_files_info info;" declaration to the scope
where it is used bloats the code by ~90 bytes. I'm not sure what's
going on.
Signed-off-by: Alexey Dobriyan
---
fs/proc/base.c | 20
Benchmark readdir("/proc") 2^13 times with 2K processes in a pid
namespace:
850.3750 us per readdir
786.5625
-7.5%
Signed-off-by: Alexey Dobriyan
---
fs/proc/base.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/fs/proc/base.c
Use "mfi", add "const" and move structure definition closer while I'm at it.
Note: moving "struct map_files_info info;" declaration to the scope
where it is used bloats the code by ~90 bytes. I'm not sure what's
going on.
Signed-off-by: Alexey Dobriyan
---
fs/proc/base.c | 20
Benchmark readlink("/proc/self") 2^23 times:
8.205992458 seconds time elapsed ( +- 0.15% )
7.535168869 seconds time elapsed ( +- 0.09% )
-8.2%
Signed-off-by: Alexey Dobriyan
---
fs/proc/self.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git
Benchmark pread("/proc/self/statm") 2^23 times:
6.135596793 seconds time elapsed ( +- 0.11% )
5.685442773 seconds time elapsed ( +- 0.11% )
-7.3%
Signed-off-by: Alexey Dobriyan
---
fs/proc/array.c | 30 +++---
1 file changed, 15 insertions(+),
Benchmark opendir+readdir("/proc/self/fd")+closedir 2^21 times
with 4 descriptors (0, 1, 2, 3 from opendir):
11.802099126 seconds time elapsed ( +- 0.23% )
10.950810068 seconds time elapsed ( +- 0.23% )
-7.2%
Benchmark the same thing with 1000 descriptors:
Benchmark readlink("/proc/self") 2^23 times:
8.205992458 seconds time elapsed ( +- 0.15% )
7.535168869 seconds time elapsed ( +- 0.09% )
-8.2%
Signed-off-by: Alexey Dobriyan
---
fs/proc/self.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git
Benchmark pread("/proc/self/statm") 2^23 times:
6.135596793 seconds time elapsed ( +- 0.11% )
5.685442773 seconds time elapsed ( +- 0.11% )
-7.3%
Signed-off-by: Alexey Dobriyan
---
fs/proc/array.c | 30 +++---
1 file changed, 15 insertions(+),
Benchmark opendir+readdir("/proc/self/fd")+closedir 2^21 times
with 4 descriptors (0, 1, 2, 3 from opendir):
11.802099126 seconds time elapsed ( +- 0.23% )
10.950810068 seconds time elapsed ( +- 0.23% )
-7.2%
Benchmark the same thing with 1000 descriptors:
Space savings -- 42 bytes!
seq_puts71 29 [-42]
Signed-off-by: Alexey Dobriyan
---
fs/seq_file.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/fs/seq_file.c b/fs/seq_file.c
index 1dea7a8a5255..0c282a88a896 100644
--- a/fs/seq_file.c
+++
Space savings -- 42 bytes!
seq_puts71 29 [-42]
Signed-off-by: Alexey Dobriyan
---
fs/seq_file.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/fs/seq_file.c b/fs/seq_file.c
index 1dea7a8a5255..0c282a88a896 100644
--- a/fs/seq_file.c
+++
On Tue, Aug 28, 2018 at 1:04 AM Andy Lutomirski wrote:
>
> In NMI context, we might be in the middle of context switching or in
> the middle of switch_mm_irqs_off(). In either case, CR3 might not
> match current->mm, which could cause copy_from_user_nmi() and
> friends to read the wrong memory.
On Tue, Aug 28, 2018 at 1:04 AM Andy Lutomirski wrote:
>
> In NMI context, we might be in the middle of context switching or in
> the middle of switch_mm_irqs_off(). In either case, CR3 might not
> match current->mm, which could cause copy_from_user_nmi() and
> friends to read the wrong memory.
In NMI context, we might be in the middle of context switching or in
the middle of switch_mm_irqs_off(). In either case, CR3 might not
match current->mm, which could cause copy_from_user_nmi() and
friends to read the wrong memory.
Fix it by adding a new nmi_uaccess_okay() helper and checking it
In NMI context, we might be in the middle of context switching or in
the middle of switch_mm_irqs_off(). In either case, CR3 might not
match current->mm, which could cause copy_from_user_nmi() and
friends to read the wrong memory.
Fix it by adding a new nmi_uaccess_okay() helper and checking it
On Mon, Aug 27, 2018 at 3:51 PM Andrey Smirnov wrote:
>
> On Sun, Aug 5, 2018 at 11:45 PM Anson Huang wrote:
> >
> > i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they
> > can reuse gpcv2 pgc driver for power domain control, this
> > patch renames all functions and structure definitions
On Mon, Aug 27, 2018 at 3:51 PM Andrey Smirnov wrote:
>
> On Sun, Aug 5, 2018 at 11:45 PM Anson Huang wrote:
> >
> > i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they
> > can reuse gpcv2 pgc driver for power domain control, this
> > patch renames all functions and structure definitions
On Mon, Aug 27, 2018 at 3:54 PM, Nadav Amit wrote:
> at 3:32 PM, Andy Lutomirski wrote:
>
>> On Mon, Aug 27, 2018 at 2:55 PM, Nadav Amit wrote:
>>> at 1:16 PM, Nadav Amit wrote:
>>>
at 12:58 PM, Andy Lutomirski wrote:
> On Mon, Aug 27, 2018 at 12:43 PM, Nadav Amit wrote:
>>
On Mon, Aug 27, 2018 at 3:54 PM, Nadav Amit wrote:
> at 3:32 PM, Andy Lutomirski wrote:
>
>> On Mon, Aug 27, 2018 at 2:55 PM, Nadav Amit wrote:
>>> at 1:16 PM, Nadav Amit wrote:
>>>
at 12:58 PM, Andy Lutomirski wrote:
> On Mon, Aug 27, 2018 at 12:43 PM, Nadav Amit wrote:
>>
On Tue, Aug 21, 2018 at 1:00 AM Akshu Agrawal wrote:
>
> 25Mhz MCLK which was earlier used was of spread type.
> Thus, we were not getting accurate rate. The 48Mhz system
> clk is of non-spread type and we are changing to it to get
> accurate rate.
>
> Signed-off-by: Akshu Agrawal
Reviewed-by:
On Tue, Aug 21, 2018 at 1:00 AM Akshu Agrawal wrote:
>
> 25Mhz MCLK which was earlier used was of spread type.
> Thus, we were not getting accurate rate. The 48Mhz system
> clk is of non-spread type and we are changing to it to get
> accurate rate.
>
> Signed-off-by: Akshu Agrawal
Reviewed-by:
On Tue, Aug 21, 2018 at 12:55 AM Akshu Agrawal wrote:
>
> We support dual channel, 48Khz. This constraint was set only for
> da7219. It is being extended to DMIC and MAX98357a.
>
> Signed-off-by: Akshu Agrawal
Reviewed-by: Daniel Kurtz
> ---
> sound/soc/amd/acp-da7219-max98357a.c | 33
On Tue, Aug 21, 2018 at 12:53 AM Akshu Agrawal wrote:
>
> System clk provided in ST soc can be set to:
> 48Mhz, non-spread
> 25Mhz, spread
> To get accurate rate, we need it to set it at non-spread
> option which is 48Mhz.
>
> Signed-off-by: Akshu Agrawal
Reviewed-by: Daniel Kurtz
> ---
>
On Tue, Aug 21, 2018 at 12:55 AM Akshu Agrawal wrote:
>
> We support dual channel, 48Khz. This constraint was set only for
> da7219. It is being extended to DMIC and MAX98357a.
>
> Signed-off-by: Akshu Agrawal
Reviewed-by: Daniel Kurtz
> ---
> sound/soc/amd/acp-da7219-max98357a.c | 33
On Tue, Aug 21, 2018 at 12:53 AM Akshu Agrawal wrote:
>
> System clk provided in ST soc can be set to:
> 48Mhz, non-spread
> 25Mhz, spread
> To get accurate rate, we need it to set it at non-spread
> option which is 48Mhz.
>
> Signed-off-by: Akshu Agrawal
Reviewed-by: Daniel Kurtz
> ---
>
Hi Lina,
On Fri, Aug 24, 2018 at 02:01:55PM -0600, Lina Iyer wrote:
> During suspend the system may power down some of the system rails. As a
> result, the TLMM hw block may not be operational anymore and wakeup
> capable GPIOs will not be detected. The PDC however will be operational
> and the
Hi Lina,
On Fri, Aug 24, 2018 at 02:01:55PM -0600, Lina Iyer wrote:
> During suspend the system may power down some of the system rails. As a
> result, the TLMM hw block may not be operational anymore and wakeup
> capable GPIOs will not be detected. The PDC however will be operational
> and the
On Sun, Aug 26, 2018 at 7:14 PM Shawn Guo wrote:
>
> Andrey,
>
> Are you fine with these two patches?
>
I made a small comment on 2/2, but otherwise both patches seem
reasonable (Acks provided in separate reply).
Let me know if you need anything else from me.
Thanks,
Andrey Smirnov
at 3:32 PM, Andy Lutomirski wrote:
> On Mon, Aug 27, 2018 at 2:55 PM, Nadav Amit wrote:
>> at 1:16 PM, Nadav Amit wrote:
>>
>>> at 12:58 PM, Andy Lutomirski wrote:
>>>
On Mon, Aug 27, 2018 at 12:43 PM, Nadav Amit wrote:
> at 12:10 PM, Nadav Amit wrote:
>
>> at 11:58 AM,
On Sun, Aug 26, 2018 at 7:14 PM Shawn Guo wrote:
>
> Andrey,
>
> Are you fine with these two patches?
>
I made a small comment on 2/2, but otherwise both patches seem
reasonable (Acks provided in separate reply).
Let me know if you need anything else from me.
Thanks,
Andrey Smirnov
at 3:32 PM, Andy Lutomirski wrote:
> On Mon, Aug 27, 2018 at 2:55 PM, Nadav Amit wrote:
>> at 1:16 PM, Nadav Amit wrote:
>>
>>> at 12:58 PM, Andy Lutomirski wrote:
>>>
On Mon, Aug 27, 2018 at 12:43 PM, Nadav Amit wrote:
> at 12:10 PM, Nadav Amit wrote:
>
>> at 11:58 AM,
On Sun, Aug 5, 2018 at 11:46 PM Anson Huang wrote:
>
> gpcv2 driver is NOT just used on i.MX7D which has Cortex-A7
> cores, but also on i.MX8MQ/i.MX8MM platforms which use Cortex-A53
> cores, so let's use A_CORE instread of A7 to avoid confusion.
>
> Signed-off-by: Anson Huang
Looks reasonable
On Sun, Aug 5, 2018 at 11:46 PM Anson Huang wrote:
>
> gpcv2 driver is NOT just used on i.MX7D which has Cortex-A7
> cores, but also on i.MX8MQ/i.MX8MM platforms which use Cortex-A53
> cores, so let's use A_CORE instread of A7 to avoid confusion.
>
> Signed-off-by: Anson Huang
Looks reasonable
Hi Rafael,
Thanks for the ping.
On 08/09/2018 02:21 PM, Rafael David Tinoco wrote:
> Makes membarrier_test compatible with older kernels (LTS) by checking if
> the membarrier features exist before running the tests.
>
> Link: https://bugs.linaro.org/show_bug.cgi?id=3771
> Signed-off-by: Rafael
Hi Rafael,
Thanks for the ping.
On 08/09/2018 02:21 PM, Rafael David Tinoco wrote:
> Makes membarrier_test compatible with older kernels (LTS) by checking if
> the membarrier features exist before running the tests.
>
> Link: https://bugs.linaro.org/show_bug.cgi?id=3771
> Signed-off-by: Rafael
On Sun, Aug 5, 2018 at 11:45 PM Anson Huang wrote:
>
> i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they
> can reuse gpcv2 pgc driver for power domain control, this
> patch renames all functions and structure definitions started
> with "imx7" to "imx", and check machine type to pass
On Sun, Aug 5, 2018 at 11:45 PM Anson Huang wrote:
>
> i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they
> can reuse gpcv2 pgc driver for power domain control, this
> patch renames all functions and structure definitions started
> with "imx7" to "imx", and check machine type to pass
On 08/27/2018 11:53 AM, Jarkko Sakkinen wrote:
> +enum sgx_alloc_flags {
> + SGX_ALLOC_ATOMIC= BIT(0),
> +};
Doing this with enums is unprecedented IMNHO. Why are you doing it this
way for simple, one-off constants?
On 08/27/2018 11:53 AM, Jarkko Sakkinen wrote:
> +enum sgx_alloc_flags {
> + SGX_ALLOC_ATOMIC= BIT(0),
> +};
Doing this with enums is unprecedented IMNHO. Why are you doing it this
way for simple, one-off constants?
On Mon, 27 Aug 2018 15:55:33 +0800 Huang Ying wrote:
> The code path to reclaim the swap entry in free_swap_and_cache() is
> almost same as that of __try_to_reclaim_swap(). The largest
> difference is just coding style. So the support to the additional
> requirement of free_swap_and_cache() is
On Mon, 27 Aug 2018 15:55:33 +0800 Huang Ying wrote:
> The code path to reclaim the swap entry in free_swap_and_cache() is
> almost same as that of __try_to_reclaim_swap(). The largest
> difference is just coding style. So the support to the additional
> requirement of free_swap_and_cache() is
On 08/27/2018 06:24 AM, Brijesh Singh wrote:
> kvmclock defines few static variables which are shared with hypervisor
> during the kvmclock initialization.
>
> When SEV is active, memory is encrypted with a guest-specific key, and
> if guest OS wants to share the memory region with hypervisor
On 08/27/2018 06:24 AM, Brijesh Singh wrote:
> kvmclock defines few static variables which are shared with hypervisor
> during the kvmclock initialization.
>
> When SEV is active, memory is encrypted with a guest-specific key, and
> if guest OS wants to share the memory region with hypervisor
On 08/27/2018 03:26 PM, Russell King - ARM Linux wrote:
> On Mon, Aug 27, 2018 at 01:03:42PM -0700, Florian Fainelli wrote:
>> Enable the SFP connected to port 5 of the switch and wire up all GPIOs
>> to the SFP cage. Because of a hardware limitation of the i2c controller
>> on the iProc SoCs
On 08/27/2018 03:26 PM, Russell King - ARM Linux wrote:
> On Mon, Aug 27, 2018 at 01:03:42PM -0700, Florian Fainelli wrote:
>> Enable the SFP connected to port 5 of the switch and wire up all GPIOs
>> to the SFP cage. Because of a hardware limitation of the i2c controller
>> on the iProc SoCs
Hi Lina,
On Fri, Aug 24, 2018 at 02:01:53PM -0600, Lina Iyer wrote:
> QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
> domain can wakeup the SoC, when interrupts and GPIOs are routed to the
> its interrupt controller. Only select GPIOs that are deemed wakeup
wording
Hi Lina,
On Fri, Aug 24, 2018 at 02:01:53PM -0600, Lina Iyer wrote:
> QCOM SoC's that have Power Domain Controller (PDC) chip in the always-on
> domain can wakeup the SoC, when interrupts and GPIOs are routed to the
> its interrupt controller. Only select GPIOs that are deemed wakeup
wording
On Mon, Aug 27, 2018 at 2:55 PM, Nadav Amit wrote:
> at 1:16 PM, Nadav Amit wrote:
>
>> at 12:58 PM, Andy Lutomirski wrote:
>>
>>> On Mon, Aug 27, 2018 at 12:43 PM, Nadav Amit wrote:
at 12:10 PM, Nadav Amit wrote:
> at 11:58 AM, Andy Lutomirski wrote:
>
>> On Mon, Aug
On Mon, Aug 27, 2018 at 2:55 PM, Nadav Amit wrote:
> at 1:16 PM, Nadav Amit wrote:
>
>> at 12:58 PM, Andy Lutomirski wrote:
>>
>>> On Mon, Aug 27, 2018 at 12:43 PM, Nadav Amit wrote:
at 12:10 PM, Nadav Amit wrote:
> at 11:58 AM, Andy Lutomirski wrote:
>
>> On Mon, Aug
On Mon, Aug 27, 2018 at 01:03:42PM -0700, Florian Fainelli wrote:
> Enable the SFP connected to port 5 of the switch and wire up all GPIOs
> to the SFP cage. Because of a hardware limitation of the i2c controller
> on the iProc SoCs which prevents large i2c (> 256 bytes) transactions to
> work, we
On Mon, Aug 27, 2018 at 01:03:42PM -0700, Florian Fainelli wrote:
> Enable the SFP connected to port 5 of the switch and wire up all GPIOs
> to the SFP cage. Because of a hardware limitation of the i2c controller
> on the iProc SoCs which prevents large i2c (> 256 bytes) transactions to
> work, we
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