Re: [BUG -next 20181008] list corruption with "mm/slub: remove useless condition in deactivate_slab"
On Tue, Oct 9, 2018 at 2:35 PM Heiko Carstens wrote:
>
> Hello,
>
> with linux-next for 20181008 I can reliably crash my system with lot's of
> debugging options enabled on s390. List debugging triggers the list
> corruption below, which I could bisect down to this commit:
>
> fde06e07750477f049f12d7d471ffa505338a3e7 is the first bad commit
> commit fde06e07750477f049f12d7d471ffa505338a3e7
> Author: Pingfan Liu
> Date: Thu Oct 4 07:43:01 2018 +1000
>
> mm/slub: remove useless condition in deactivate_slab
>
> The var l should be used to reflect the original list, on which the page
> should be. But c->page is not on any list. Furthermore, the current code
> does not update the value of l. Hence remove the related logic
>
> Link:
> http://lkml.kernel.org/r/1537941430-16217-1-git-send-email-kernelf...@gmail.com
> Signed-off-by: Pingfan Liu
> Acked-by: Christoph Lameter
> Cc: Pekka Enberg
> Cc: David Rientjes
> Cc: Joonsoo Kim
> Signed-off-by: Andrew Morton
> Signed-off-by: Stephen Rothwell
>
> list_add double add: new=03d1029ecc08,
> prev=8ff846d0,next=03d1029ecc08.
> [ cut here ]
> kernel BUG at lib/list_debug.c:31!
> illegal operation: 0001 ilc:1 [#1] PREEMPT SMP
> Modules linked in:
> CPU: 3 PID: 106 Comm: (sd-executor) Not tainted
> 4.19.0-rc6-00291-gfde06e077504 #21
> Hardware name: IBM 2964 NC9 702 (z/VM 6.4.0)
> Krnl PSW : (ptrval) (ptrval) (__list_add_valid+0x98/0xa8)
>R:0 T:1 IO:0 EX:0 Key:0 M:1 W:0 P:0 AS:3 CC:1 PM:0 RI:0 EA:3
> Krnl GPRS: 74311fdf 8001 0058 00e7b8b2
> 75438c64 a7b31928 001c007b
>8fe99d00 a7b31b40 03d1029ecc08 a7c03a80
>03d1029ecc08 8ff84680 007b5674 a7c03960
> Krnl Code: 007b5668: c0200034734alarl%r2,e43cfc
>007b566e: c0e5ffd0cf51brasl %r14,1cf510
> #007b5674: a7f40001brc 15,7b5676
> >007b5678: a7290001lghi%r2,1
>007b567c: ebcff0a4lmg %r12,%r15,160(%r15)
>007b5682: 07febcr 15,%r14
>007b5684: 0707bcr 0,%r7
>007b5686: 0707bcr 0,%r7
> Call Trace:
> ([<007b5674>] __list_add_valid+0x94/0xa8)
> [<0037d30e>] deactivate_slab.isra.15+0x45e/0x810
> [<0037ede4>] ___slab_alloc+0x76c/0x7c0
> [<0037eeb0>] __slab_alloc.isra.16+0x78/0xa8
> [<003808c8>] kmem_cache_alloc+0x160/0x458
> [<00141a3a>] vm_area_dup+0x3a/0x60
> [<00142f0a>] copy_process+0xd72/0x2100
> [<0014449a>] _do_fork+0xba/0x688
> [<00144bb0>] sys_clone+0x48/0x50
> [<00b8faf0>] system_call+0xd8/0x2d0
> INFO: lockdep is turned off.
> Last Breaking-Event-Address:
> [<007b5674>] __list_add_valid+0x94/0xa8
>
> Kernel panic - not syncing: Fatal exception: panic_on_oops
>
Sorry that just see this email, and reply late.
I think it is caused by the uinon page->lru and page->next. It can be fixed by:
diff --git a/include/linux/slub_def.h b/include/linux/slub_def.h
index 3a1a1db..4aa0fb5 100644
--- a/include/linux/slub_def.h
+++ b/include/linux/slub_def.h
@@ -56,6 +56,7 @@ struct kmem_cache_cpu {
#define slub_set_percpu_partial(c, p) \
({ \
slub_percpu_partial(c) = (p)->next; \
+ p->next = NULL; \
})
I will do some test and post the fix.
Thanks,
Pingfan
Re: [BUG -next 20181008] list corruption with "mm/slub: remove useless condition in deactivate_slab"
On Tue, Oct 9, 2018 at 2:35 PM Heiko Carstens wrote:
>
> Hello,
>
> with linux-next for 20181008 I can reliably crash my system with lot's of
> debugging options enabled on s390. List debugging triggers the list
> corruption below, which I could bisect down to this commit:
>
> fde06e07750477f049f12d7d471ffa505338a3e7 is the first bad commit
> commit fde06e07750477f049f12d7d471ffa505338a3e7
> Author: Pingfan Liu
> Date: Thu Oct 4 07:43:01 2018 +1000
>
> mm/slub: remove useless condition in deactivate_slab
>
> The var l should be used to reflect the original list, on which the page
> should be. But c->page is not on any list. Furthermore, the current code
> does not update the value of l. Hence remove the related logic
>
> Link:
> http://lkml.kernel.org/r/1537941430-16217-1-git-send-email-kernelf...@gmail.com
> Signed-off-by: Pingfan Liu
> Acked-by: Christoph Lameter
> Cc: Pekka Enberg
> Cc: David Rientjes
> Cc: Joonsoo Kim
> Signed-off-by: Andrew Morton
> Signed-off-by: Stephen Rothwell
>
> list_add double add: new=03d1029ecc08,
> prev=8ff846d0,next=03d1029ecc08.
> [ cut here ]
> kernel BUG at lib/list_debug.c:31!
> illegal operation: 0001 ilc:1 [#1] PREEMPT SMP
> Modules linked in:
> CPU: 3 PID: 106 Comm: (sd-executor) Not tainted
> 4.19.0-rc6-00291-gfde06e077504 #21
> Hardware name: IBM 2964 NC9 702 (z/VM 6.4.0)
> Krnl PSW : (ptrval) (ptrval) (__list_add_valid+0x98/0xa8)
>R:0 T:1 IO:0 EX:0 Key:0 M:1 W:0 P:0 AS:3 CC:1 PM:0 RI:0 EA:3
> Krnl GPRS: 74311fdf 8001 0058 00e7b8b2
> 75438c64 a7b31928 001c007b
>8fe99d00 a7b31b40 03d1029ecc08 a7c03a80
>03d1029ecc08 8ff84680 007b5674 a7c03960
> Krnl Code: 007b5668: c0200034734alarl%r2,e43cfc
>007b566e: c0e5ffd0cf51brasl %r14,1cf510
> #007b5674: a7f40001brc 15,7b5676
> >007b5678: a7290001lghi%r2,1
>007b567c: ebcff0a4lmg %r12,%r15,160(%r15)
>007b5682: 07febcr 15,%r14
>007b5684: 0707bcr 0,%r7
>007b5686: 0707bcr 0,%r7
> Call Trace:
> ([<007b5674>] __list_add_valid+0x94/0xa8)
> [<0037d30e>] deactivate_slab.isra.15+0x45e/0x810
> [<0037ede4>] ___slab_alloc+0x76c/0x7c0
> [<0037eeb0>] __slab_alloc.isra.16+0x78/0xa8
> [<003808c8>] kmem_cache_alloc+0x160/0x458
> [<00141a3a>] vm_area_dup+0x3a/0x60
> [<00142f0a>] copy_process+0xd72/0x2100
> [<0014449a>] _do_fork+0xba/0x688
> [<00144bb0>] sys_clone+0x48/0x50
> [<00b8faf0>] system_call+0xd8/0x2d0
> INFO: lockdep is turned off.
> Last Breaking-Event-Address:
> [<007b5674>] __list_add_valid+0x94/0xa8
>
> Kernel panic - not syncing: Fatal exception: panic_on_oops
>
Sorry that just see this email, and reply late.
I think it is caused by the uinon page->lru and page->next. It can be fixed by:
diff --git a/include/linux/slub_def.h b/include/linux/slub_def.h
index 3a1a1db..4aa0fb5 100644
--- a/include/linux/slub_def.h
+++ b/include/linux/slub_def.h
@@ -56,6 +56,7 @@ struct kmem_cache_cpu {
#define slub_set_percpu_partial(c, p) \
({ \
slub_percpu_partial(c) = (p)->next; \
+ p->next = NULL; \
})
I will do some test and post the fix.
Thanks,
Pingfan
Re: linux-next: manual merge of the userns tree with the tip tree
Stephen Rothwell writes:
> Hi all,
>
> On Mon, 15 Oct 2018 15:11:59 +1100 Stephen Rothwell
> wrote:
>>
>> Today's linux-next merge of the userns tree got a conflict in:
>>
>> arch/x86/mm/fault.c
>>
>> between commit:
>>
>> 164477c2331b ("x86/mm: Clarify hardware vs. software "error_code"")
>> (and others from that series)
>>
>> from the tip tree and commits:
>>
>> 768fd9c69bb5 ("signal/x86: Remove pkey parameter from
>> bad_area_nosemaphore")
>> 25c102d803ea ("signal/x86: Remove pkey parameter from mm_fault_error")
>>
>> from the userns tree.
>>
>> I fixed it up (I think - see below) and can carry the fix as
>> necessary. This is now fixed as far as linux-next is concerned, but any
>> non trivial conflicts should be mentioned to your upstream maintainer
>> when your tree is submitted for merging. You may also want to consider
>> cooperating with the maintainer of the conflicting tree to minimise any
>> particularly complex conflicts.
>>
>> --
>> Cheers,
>> Stephen Rothwell
>>
>> diff --cc arch/x86/mm/fault.c
>> index c2e3e5127ebc,8d77700a7883..
>> --- a/arch/x86/mm/fault.c
>> +++ b/arch/x86/mm/fault.c
>> +/* Handle faults in the user portion of the address space */
>> +static inline
>> +void do_user_addr_fault(struct pt_regs *regs,
>> + unsigned long hw_error_code,
>> + unsigned long address)
>> +{
>> + unsigned long sw_error_code;
>> + struct vm_area_struct *vma;
>> + struct task_struct *tsk;
>> + struct mm_struct *mm;
>> + vm_fault_t fault, major = 0;
>> + unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
>> + u32 pkey;
>
> I missed removing the above line.
Yes. At first glance with the above change it looks like you got it.
Eric
Re: linux-next: manual merge of the userns tree with the tip tree
Stephen Rothwell writes:
> Hi all,
>
> On Mon, 15 Oct 2018 15:11:59 +1100 Stephen Rothwell
> wrote:
>>
>> Today's linux-next merge of the userns tree got a conflict in:
>>
>> arch/x86/mm/fault.c
>>
>> between commit:
>>
>> 164477c2331b ("x86/mm: Clarify hardware vs. software "error_code"")
>> (and others from that series)
>>
>> from the tip tree and commits:
>>
>> 768fd9c69bb5 ("signal/x86: Remove pkey parameter from
>> bad_area_nosemaphore")
>> 25c102d803ea ("signal/x86: Remove pkey parameter from mm_fault_error")
>>
>> from the userns tree.
>>
>> I fixed it up (I think - see below) and can carry the fix as
>> necessary. This is now fixed as far as linux-next is concerned, but any
>> non trivial conflicts should be mentioned to your upstream maintainer
>> when your tree is submitted for merging. You may also want to consider
>> cooperating with the maintainer of the conflicting tree to minimise any
>> particularly complex conflicts.
>>
>> --
>> Cheers,
>> Stephen Rothwell
>>
>> diff --cc arch/x86/mm/fault.c
>> index c2e3e5127ebc,8d77700a7883..
>> --- a/arch/x86/mm/fault.c
>> +++ b/arch/x86/mm/fault.c
>> +/* Handle faults in the user portion of the address space */
>> +static inline
>> +void do_user_addr_fault(struct pt_regs *regs,
>> + unsigned long hw_error_code,
>> + unsigned long address)
>> +{
>> + unsigned long sw_error_code;
>> + struct vm_area_struct *vma;
>> + struct task_struct *tsk;
>> + struct mm_struct *mm;
>> + vm_fault_t fault, major = 0;
>> + unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
>> + u32 pkey;
>
> I missed removing the above line.
Yes. At first glance with the above change it looks like you got it.
Eric
[PATCH v7 6/9] PCI: mediatek: Fixup enable MSI logic by enable MSI after clock enabled
From: Honghui Zhang
The commit 43e6409db64d ("PCI: mediatek: Add MSI support for MT2712 and
MT7622") added MSI support but enable MSI in wrong place, clocks was not
enabled when enable MSI. This patch fix this issue by calling
mtk_pcie_enable_msi in mtk_pcie_startup_port_v2 since the clock was all
enabled at that time.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index 654a63e..d3f4694 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -568,8 +568,6 @@ static int mtk_pcie_init_irq_domain(struct mtk_pcie_port
*port,
ret = mtk_pcie_allocate_msi_domains(port);
if (ret)
return ret;
-
- mtk_pcie_enable_msi(port);
}
return 0;
@@ -690,6 +688,9 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port
*port)
val &= ~INTX_MASK;
writel(val, port->base + PCIE_INT_MASK);
+ if (IS_ENABLED(CONFIG_PCI_MSI))
+ mtk_pcie_enable_msi(port);
+
/* Set AHB to PCIe translation windows */
size = mem->end - mem->start;
val = lower_32_bits(mem->start) | AHB2PCIE_SIZE(fls(size));
--
2.6.4
[PATCH v7 3/9] PCI: mediatek: Remove the redundant dev->pm_domain check
From: Honghui Zhang
It's no needed to check whether device have pm_domain attached before
calling the pm_runtime_XXX interface, remove it.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 18 ++
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index bcdac9b..59fdb60 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -225,10 +225,8 @@ static void mtk_pcie_subsys_powerdown(struct mtk_pcie
*pcie)
clk_disable_unprepare(pcie->free_ck);
- if (dev->pm_domain) {
- pm_runtime_put_sync(dev);
- pm_runtime_disable(dev);
- }
+ pm_runtime_put_sync(dev);
+ pm_runtime_disable(dev);
}
static void mtk_pcie_port_free(struct mtk_pcie_port *port)
@@ -998,10 +996,8 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie)
pcie->free_ck = NULL;
}
- if (dev->pm_domain) {
- pm_runtime_enable(dev);
- pm_runtime_get_sync(dev);
- }
+ pm_runtime_enable(dev);
+ pm_runtime_get_sync(dev);
/* enable top level clock */
err = clk_prepare_enable(pcie->free_ck);
@@ -1013,10 +1009,8 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie)
return 0;
err_free_ck:
- if (dev->pm_domain) {
- pm_runtime_put_sync(dev);
- pm_runtime_disable(dev);
- }
+ pm_runtime_put_sync(dev);
+ pm_runtime_disable(dev);
return err;
}
--
2.6.4
[PATCH v7 6/9] PCI: mediatek: Fixup enable MSI logic by enable MSI after clock enabled
From: Honghui Zhang
The commit 43e6409db64d ("PCI: mediatek: Add MSI support for MT2712 and
MT7622") added MSI support but enable MSI in wrong place, clocks was not
enabled when enable MSI. This patch fix this issue by calling
mtk_pcie_enable_msi in mtk_pcie_startup_port_v2 since the clock was all
enabled at that time.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index 654a63e..d3f4694 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -568,8 +568,6 @@ static int mtk_pcie_init_irq_domain(struct mtk_pcie_port
*port,
ret = mtk_pcie_allocate_msi_domains(port);
if (ret)
return ret;
-
- mtk_pcie_enable_msi(port);
}
return 0;
@@ -690,6 +688,9 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port
*port)
val &= ~INTX_MASK;
writel(val, port->base + PCIE_INT_MASK);
+ if (IS_ENABLED(CONFIG_PCI_MSI))
+ mtk_pcie_enable_msi(port);
+
/* Set AHB to PCIe translation windows */
size = mem->end - mem->start;
val = lower_32_bits(mem->start) | AHB2PCIE_SIZE(fls(size));
--
2.6.4
[PATCH v7 3/9] PCI: mediatek: Remove the redundant dev->pm_domain check
From: Honghui Zhang
It's no needed to check whether device have pm_domain attached before
calling the pm_runtime_XXX interface, remove it.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 18 ++
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index bcdac9b..59fdb60 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -225,10 +225,8 @@ static void mtk_pcie_subsys_powerdown(struct mtk_pcie
*pcie)
clk_disable_unprepare(pcie->free_ck);
- if (dev->pm_domain) {
- pm_runtime_put_sync(dev);
- pm_runtime_disable(dev);
- }
+ pm_runtime_put_sync(dev);
+ pm_runtime_disable(dev);
}
static void mtk_pcie_port_free(struct mtk_pcie_port *port)
@@ -998,10 +996,8 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie)
pcie->free_ck = NULL;
}
- if (dev->pm_domain) {
- pm_runtime_enable(dev);
- pm_runtime_get_sync(dev);
- }
+ pm_runtime_enable(dev);
+ pm_runtime_get_sync(dev);
/* enable top level clock */
err = clk_prepare_enable(pcie->free_ck);
@@ -1013,10 +1009,8 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie)
return 0;
err_free_ck:
- if (dev->pm_domain) {
- pm_runtime_put_sync(dev);
- pm_runtime_disable(dev);
- }
+ pm_runtime_put_sync(dev);
+ pm_runtime_disable(dev);
return err;
}
--
2.6.4
[PATCH v7 8/9] PCI: mediatek: Save the GIC IRQ in mtk_pcie_port
From: Honghui Zhang
Need to save the PCIe's GIC IRQ for dispose_irq, this is a prepare
patch for add mediatek PCIe module support to tear down the IRQ, no
functional changed.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index 42cf2a4..daba78f 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -162,6 +162,7 @@ struct mtk_pcie_soc {
* @phy: pointer to PHY control block
* @lane: lane count
* @slot: port slot
+ * @irq: GIC irq
* @irq_domain: legacy INTx IRQ domain
* @inner_domain: inner IRQ domain
* @msi_domain: MSI IRQ domain
@@ -182,6 +183,7 @@ struct mtk_pcie_port {
struct phy *phy;
u32 lane;
u32 slot;
+ int irq;
struct irq_domain *irq_domain;
struct irq_domain *inner_domain;
struct irq_domain *msi_domain;
@@ -620,7 +622,7 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port,
struct mtk_pcie *pcie = port->pcie;
struct device *dev = pcie->dev;
struct platform_device *pdev = to_platform_device(dev);
- int err, irq;
+ int err;
err = mtk_pcie_init_irq_domain(port, node);
if (err) {
@@ -628,8 +630,9 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port,
return err;
}
- irq = platform_get_irq(pdev, port->slot);
- irq_set_chained_handler_and_data(irq, mtk_pcie_intr_handler, port);
+ port->irq = platform_get_irq(pdev, port->slot);
+ irq_set_chained_handler_and_data(port->irq,
+mtk_pcie_intr_handler, port);
return 0;
}
--
2.6.4
[PATCH v7 8/9] PCI: mediatek: Save the GIC IRQ in mtk_pcie_port
From: Honghui Zhang
Need to save the PCIe's GIC IRQ for dispose_irq, this is a prepare
patch for add mediatek PCIe module support to tear down the IRQ, no
functional changed.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index 42cf2a4..daba78f 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -162,6 +162,7 @@ struct mtk_pcie_soc {
* @phy: pointer to PHY control block
* @lane: lane count
* @slot: port slot
+ * @irq: GIC irq
* @irq_domain: legacy INTx IRQ domain
* @inner_domain: inner IRQ domain
* @msi_domain: MSI IRQ domain
@@ -182,6 +183,7 @@ struct mtk_pcie_port {
struct phy *phy;
u32 lane;
u32 slot;
+ int irq;
struct irq_domain *irq_domain;
struct irq_domain *inner_domain;
struct irq_domain *msi_domain;
@@ -620,7 +622,7 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port,
struct mtk_pcie *pcie = port->pcie;
struct device *dev = pcie->dev;
struct platform_device *pdev = to_platform_device(dev);
- int err, irq;
+ int err;
err = mtk_pcie_init_irq_domain(port, node);
if (err) {
@@ -628,8 +630,9 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port,
return err;
}
- irq = platform_get_irq(pdev, port->slot);
- irq_set_chained_handler_and_data(irq, mtk_pcie_intr_handler, port);
+ port->irq = platform_get_irq(pdev, port->slot);
+ irq_set_chained_handler_and_data(port->irq,
+mtk_pcie_intr_handler, port);
return 0;
}
--
2.6.4
[PATCH v7 5/9] PCI: mediatek: Move the mtk_pcie_startup_port_v2 function's define after mtk_pcie_setup_irq
From: Honghui Zhang
This is a prepare patch to fix enable MSI logic, move the function's
define later to avoid forward declaration of mtk_pcie_enable_msi in
the future. No functional changed.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 138 -
1 file changed, 69 insertions(+), 69 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index ead6005..654a63e 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -392,75 +392,6 @@ static struct pci_ops mtk_pcie_ops_v2 = {
.write = mtk_pcie_config_write,
};
-static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
-{
- struct mtk_pcie *pcie = port->pcie;
- struct resource *mem = >mem;
- const struct mtk_pcie_soc *soc = port->pcie->soc;
- u32 val;
- size_t size;
- int err;
-
- /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */
- if (pcie->base) {
- val = readl(pcie->base + PCIE_SYS_CFG_V2);
- val |= PCIE_CSR_LTSSM_EN(port->slot) |
- PCIE_CSR_ASPM_L1_EN(port->slot);
- writel(val, pcie->base + PCIE_SYS_CFG_V2);
- }
-
- /* Assert all reset signals */
- writel(0, port->base + PCIE_RST_CTRL);
-
- /*
-* Enable PCIe link down reset, if link status changed from link up to
-* link down, this will reset MAC control registers and configuration
-* space.
-*/
- writel(PCIE_LINKDOWN_RST_EN, port->base + PCIE_RST_CTRL);
-
- /* De-assert PHY, PE, PIPE, MAC and configuration reset */
- val = readl(port->base + PCIE_RST_CTRL);
- val |= PCIE_PHY_RSTB | PCIE_PERSTB | PCIE_PIPE_SRSTB |
- PCIE_MAC_SRSTB | PCIE_CRSTB;
- writel(val, port->base + PCIE_RST_CTRL);
-
- /* Set up vendor ID and class code */
- if (soc->need_fix_class_id) {
- val = PCI_VENDOR_ID_MEDIATEK;
- writew(val, port->base + PCIE_CONF_VEND_ID);
-
- val = PCI_CLASS_BRIDGE_PCI;
- writew(val, port->base + PCIE_CONF_CLASS_ID);
- }
-
- /* 100ms timeout value should be enough for Gen1/2 training */
- err = readl_poll_timeout(port->base + PCIE_LINK_STATUS_V2, val,
-!!(val & PCIE_PORT_LINKUP_V2), 20,
-100 * USEC_PER_MSEC);
- if (err)
- return -ETIMEDOUT;
-
- /* Set INTx mask */
- val = readl(port->base + PCIE_INT_MASK);
- val &= ~INTX_MASK;
- writel(val, port->base + PCIE_INT_MASK);
-
- /* Set AHB to PCIe translation windows */
- size = mem->end - mem->start;
- val = lower_32_bits(mem->start) | AHB2PCIE_SIZE(fls(size));
- writel(val, port->base + PCIE_AHB_TRANS_BASE0_L);
-
- val = upper_32_bits(mem->start);
- writel(val, port->base + PCIE_AHB_TRANS_BASE0_H);
-
- /* Set PCIe to AXI translation memory space.*/
- val = fls(0x) | WIN_ENABLE;
- writel(val, port->base + PCIE_AXI_WINDOW0);
-
- return 0;
-}
-
static void mtk_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
{
struct mtk_pcie_port *port = irq_data_get_irq_chip_data(data);
@@ -705,6 +636,75 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port,
return 0;
}
+static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
+{
+ struct mtk_pcie *pcie = port->pcie;
+ struct resource *mem = >mem;
+ const struct mtk_pcie_soc *soc = port->pcie->soc;
+ u32 val;
+ size_t size;
+ int err;
+
+ /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */
+ if (pcie->base) {
+ val = readl(pcie->base + PCIE_SYS_CFG_V2);
+ val |= PCIE_CSR_LTSSM_EN(port->slot) |
+ PCIE_CSR_ASPM_L1_EN(port->slot);
+ writel(val, pcie->base + PCIE_SYS_CFG_V2);
+ }
+
+ /* Assert all reset signals */
+ writel(0, port->base + PCIE_RST_CTRL);
+
+ /*
+* Enable PCIe link down reset, if link status changed from link up to
+* link down, this will reset MAC control registers and configuration
+* space.
+*/
+ writel(PCIE_LINKDOWN_RST_EN, port->base + PCIE_RST_CTRL);
+
+ /* De-assert PHY, PE, PIPE, MAC and configuration reset */
+ val = readl(port->base + PCIE_RST_CTRL);
+ val |= PCIE_PHY_RSTB | PCIE_PERSTB | PCIE_PIPE_SRSTB |
+ PCIE_MAC_SRSTB | PCIE_CRSTB;
+ writel(val, port->base + PCIE_RST_CTRL);
+
+ /* Set up vendor ID and class code */
+ if (soc->need_fix_class_id) {
+ val = PCI_VENDOR_ID_MEDIATEK;
+ writew(val, port->base + PCIE_CONF_VEND_ID);
+
+ val = PCI_CLASS_BRIDGE_PCI;
+ writew(val, port->base + PCIE_CONF_CLASS_ID);
+ }
[PATCH v7 2/9] PCI: mediatek: Fix class type for MT7622 as PCI_CLASS_BRIDGE_PCI
From: Honghui Zhang
The commit 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class
type for MT7622") have set the class type for MT7622 as un-properly
value of PCI_CLASS_BRIDGE_HOST.
The PCIe controller of MT7622 is complexed with Root Port and PCI-to-PCI
bridge, the bridge has type 1 configuration space header and related bridge
windows. The HW default value of this bridge's class type is invalid. Fix
its class type as PCI_CLASS_BRIDGE_PCI since it is HW defines.
Making the bridge visiable to PCI framework by setting its class type
properly will get its bridge windows configurated during PCI device
enumerate.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index 288b8e2..bcdac9b 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -432,7 +432,7 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port
*port)
val = PCI_VENDOR_ID_MEDIATEK;
writew(val, port->base + PCIE_CONF_VEND_ID);
- val = PCI_CLASS_BRIDGE_HOST;
+ val = PCI_CLASS_BRIDGE_PCI;
writew(val, port->base + PCIE_CONF_CLASS_ID);
}
--
2.6.4
[PATCH v7 9/9] PCI: mediatek: Add loadable kernel module support
From: Honghui Zhang
Implement remove callback function for Mediatek PCIe driver to add
loadable kernel module support.
Signed-off-by: Honghui Zhang
Reviewed-by: Ryder Lee
---
drivers/pci/controller/Kconfig | 2 +-
drivers/pci/controller/pcie-mediatek.c | 51 +-
2 files changed, 51 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig
index 028b287..465790f 100644
--- a/drivers/pci/controller/Kconfig
+++ b/drivers/pci/controller/Kconfig
@@ -231,7 +231,7 @@ config PCIE_ROCKCHIP_EP
available to support GEN2 with 4 slots.
config PCIE_MEDIATEK
- bool "MediaTek PCIe controller"
+ tristate "MediaTek PCIe controller"
depends on ARCH_MEDIATEK || COMPILE_TEST
depends on OF
depends on PCI_MSI_IRQ_DOMAIN
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index daba78f..5048adb 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -532,6 +533,27 @@ static void mtk_pcie_enable_msi(struct mtk_pcie_port *port)
writel(val, port->base + PCIE_INT_MASK);
}
+static void mtk_pcie_irq_teardown(struct mtk_pcie *pcie)
+{
+ struct mtk_pcie_port *port, *tmp;
+
+ list_for_each_entry_safe(port, tmp, >ports, list) {
+ irq_set_chained_handler_and_data(port->irq, NULL, NULL);
+
+ if (port->irq_domain)
+ irq_domain_remove(port->irq_domain);
+
+ if (IS_ENABLED(CONFIG_PCI_MSI)) {
+ if (port->msi_domain)
+ irq_domain_remove(port->msi_domain);
+ if (port->inner_domain)
+ irq_domain_remove(port->inner_domain);
+ }
+
+ irq_dispose_mapping(port->irq);
+ }
+}
+
static int mtk_pcie_intx_map(struct irq_domain *domain, unsigned int irq,
irq_hw_number_t hwirq)
{
@@ -1171,6 +1193,31 @@ static int mtk_pcie_probe(struct platform_device *pdev)
return err;
}
+
+static void mtk_pcie_free_resources(struct mtk_pcie *pcie)
+{
+ struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie);
+ struct list_head *windows = >windows;
+
+ pci_free_resource_list(windows);
+}
+
+static int mtk_pcie_remove(struct platform_device *pdev)
+{
+ struct mtk_pcie *pcie = platform_get_drvdata(pdev);
+ struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie);
+
+ pci_stop_root_bus(host->bus);
+ pci_remove_root_bus(host->bus);
+ mtk_pcie_free_resources(pcie);
+
+ mtk_pcie_irq_teardown(pcie);
+
+ mtk_pcie_put_resources(pcie);
+
+ return 0;
+}
+
static int __maybe_unused mtk_pcie_suspend_noirq(struct device *dev)
{
struct mtk_pcie *pcie = dev_get_drvdata(dev);
@@ -1248,6 +1295,7 @@ static const struct of_device_id mtk_pcie_ids[] = {
static struct platform_driver mtk_pcie_driver = {
.probe = mtk_pcie_probe,
+ .remove = mtk_pcie_remove,
.driver = {
.name = "mtk-pcie",
.of_match_table = mtk_pcie_ids,
@@ -1255,4 +1303,5 @@ static struct platform_driver mtk_pcie_driver = {
.pm = _pcie_pm_ops,
},
};
-builtin_platform_driver(mtk_pcie_driver);
+module_platform_driver(mtk_pcie_driver);
+MODULE_LICENSE("GPL v2");
--
2.6.4
Re: [PATCH v4 3/6] parisc: add system call table generation support
Hi Eike,
On Mon, 15 Oct 2018 at 10:47, Rolf Eike Beer wrote:
>
> Firoz Khan wrote:
> > Hi Rolf,
> >
> > On Fri, 12 Oct 2018 at 17:37, Rolf Eike Beer wrote:
> > > Firoz Khan wrote:
>
> > > > +prefix="$4"
> > > > +offset="$5"
> > > > +
> > > > +fileguard=_UAPI_ASM_PARISC_`basename "$out" | sed \
> > > > +-e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/' \
> > > > +-e 's/[^A-Z0-9_]/_/g' -e 's/__/_/g'`
> > > > +grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | (
> > > > +echo "#ifndef ${fileguard}"
> > > > +echo "#define ${fileguard}"
> > > > +echo ""
> > > > +
> > > > +nxt=0
> > > > +while read nr abi name entry compat ; do
> > > > + if [ -z "$offset" ]; then
> > > > + echo -e "#define __NR_${prefix}${name}\t$nr"
> > >
> > > This mixed indentation with both tabs and spaces is a bit messy.
> >
> > Is this what you suggested?
> > - echo -e "#define __NR_${prefix}${name}\t$nr"
> > + echo "#define __NR_${prefix}${name} $nr"
>
> No, this was actually only about the script itself. Looks like your editor has
> tab-width 8 and indentation 4 or so.
Ok. Something is going bad while creating the patch series. That's why this
mixed indentation with both tabs and spaces.Will fix now.
It will be ok to have indentation of 4 character?
https://github.com/torvalds/linux/blob/master/arch/x86/entry/syscalls/syscalltbl.sh
https://github.com/torvalds/linux/blob/master/arch/arm/tools/syscalltbl.sh
Thanks
Firoz
>
> Eike
[PATCH v7 5/9] PCI: mediatek: Move the mtk_pcie_startup_port_v2 function's define after mtk_pcie_setup_irq
From: Honghui Zhang
This is a prepare patch to fix enable MSI logic, move the function's
define later to avoid forward declaration of mtk_pcie_enable_msi in
the future. No functional changed.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 138 -
1 file changed, 69 insertions(+), 69 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index ead6005..654a63e 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -392,75 +392,6 @@ static struct pci_ops mtk_pcie_ops_v2 = {
.write = mtk_pcie_config_write,
};
-static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
-{
- struct mtk_pcie *pcie = port->pcie;
- struct resource *mem = >mem;
- const struct mtk_pcie_soc *soc = port->pcie->soc;
- u32 val;
- size_t size;
- int err;
-
- /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */
- if (pcie->base) {
- val = readl(pcie->base + PCIE_SYS_CFG_V2);
- val |= PCIE_CSR_LTSSM_EN(port->slot) |
- PCIE_CSR_ASPM_L1_EN(port->slot);
- writel(val, pcie->base + PCIE_SYS_CFG_V2);
- }
-
- /* Assert all reset signals */
- writel(0, port->base + PCIE_RST_CTRL);
-
- /*
-* Enable PCIe link down reset, if link status changed from link up to
-* link down, this will reset MAC control registers and configuration
-* space.
-*/
- writel(PCIE_LINKDOWN_RST_EN, port->base + PCIE_RST_CTRL);
-
- /* De-assert PHY, PE, PIPE, MAC and configuration reset */
- val = readl(port->base + PCIE_RST_CTRL);
- val |= PCIE_PHY_RSTB | PCIE_PERSTB | PCIE_PIPE_SRSTB |
- PCIE_MAC_SRSTB | PCIE_CRSTB;
- writel(val, port->base + PCIE_RST_CTRL);
-
- /* Set up vendor ID and class code */
- if (soc->need_fix_class_id) {
- val = PCI_VENDOR_ID_MEDIATEK;
- writew(val, port->base + PCIE_CONF_VEND_ID);
-
- val = PCI_CLASS_BRIDGE_PCI;
- writew(val, port->base + PCIE_CONF_CLASS_ID);
- }
-
- /* 100ms timeout value should be enough for Gen1/2 training */
- err = readl_poll_timeout(port->base + PCIE_LINK_STATUS_V2, val,
-!!(val & PCIE_PORT_LINKUP_V2), 20,
-100 * USEC_PER_MSEC);
- if (err)
- return -ETIMEDOUT;
-
- /* Set INTx mask */
- val = readl(port->base + PCIE_INT_MASK);
- val &= ~INTX_MASK;
- writel(val, port->base + PCIE_INT_MASK);
-
- /* Set AHB to PCIe translation windows */
- size = mem->end - mem->start;
- val = lower_32_bits(mem->start) | AHB2PCIE_SIZE(fls(size));
- writel(val, port->base + PCIE_AHB_TRANS_BASE0_L);
-
- val = upper_32_bits(mem->start);
- writel(val, port->base + PCIE_AHB_TRANS_BASE0_H);
-
- /* Set PCIe to AXI translation memory space.*/
- val = fls(0x) | WIN_ENABLE;
- writel(val, port->base + PCIE_AXI_WINDOW0);
-
- return 0;
-}
-
static void mtk_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
{
struct mtk_pcie_port *port = irq_data_get_irq_chip_data(data);
@@ -705,6 +636,75 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port,
return 0;
}
+static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
+{
+ struct mtk_pcie *pcie = port->pcie;
+ struct resource *mem = >mem;
+ const struct mtk_pcie_soc *soc = port->pcie->soc;
+ u32 val;
+ size_t size;
+ int err;
+
+ /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */
+ if (pcie->base) {
+ val = readl(pcie->base + PCIE_SYS_CFG_V2);
+ val |= PCIE_CSR_LTSSM_EN(port->slot) |
+ PCIE_CSR_ASPM_L1_EN(port->slot);
+ writel(val, pcie->base + PCIE_SYS_CFG_V2);
+ }
+
+ /* Assert all reset signals */
+ writel(0, port->base + PCIE_RST_CTRL);
+
+ /*
+* Enable PCIe link down reset, if link status changed from link up to
+* link down, this will reset MAC control registers and configuration
+* space.
+*/
+ writel(PCIE_LINKDOWN_RST_EN, port->base + PCIE_RST_CTRL);
+
+ /* De-assert PHY, PE, PIPE, MAC and configuration reset */
+ val = readl(port->base + PCIE_RST_CTRL);
+ val |= PCIE_PHY_RSTB | PCIE_PERSTB | PCIE_PIPE_SRSTB |
+ PCIE_MAC_SRSTB | PCIE_CRSTB;
+ writel(val, port->base + PCIE_RST_CTRL);
+
+ /* Set up vendor ID and class code */
+ if (soc->need_fix_class_id) {
+ val = PCI_VENDOR_ID_MEDIATEK;
+ writew(val, port->base + PCIE_CONF_VEND_ID);
+
+ val = PCI_CLASS_BRIDGE_PCI;
+ writew(val, port->base + PCIE_CONF_CLASS_ID);
+ }
[PATCH v7 2/9] PCI: mediatek: Fix class type for MT7622 as PCI_CLASS_BRIDGE_PCI
From: Honghui Zhang
The commit 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class
type for MT7622") have set the class type for MT7622 as un-properly
value of PCI_CLASS_BRIDGE_HOST.
The PCIe controller of MT7622 is complexed with Root Port and PCI-to-PCI
bridge, the bridge has type 1 configuration space header and related bridge
windows. The HW default value of this bridge's class type is invalid. Fix
its class type as PCI_CLASS_BRIDGE_PCI since it is HW defines.
Making the bridge visiable to PCI framework by setting its class type
properly will get its bridge windows configurated during PCI device
enumerate.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index 288b8e2..bcdac9b 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -432,7 +432,7 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port
*port)
val = PCI_VENDOR_ID_MEDIATEK;
writew(val, port->base + PCIE_CONF_VEND_ID);
- val = PCI_CLASS_BRIDGE_HOST;
+ val = PCI_CLASS_BRIDGE_PCI;
writew(val, port->base + PCIE_CONF_CLASS_ID);
}
--
2.6.4
[PATCH v7 9/9] PCI: mediatek: Add loadable kernel module support
From: Honghui Zhang
Implement remove callback function for Mediatek PCIe driver to add
loadable kernel module support.
Signed-off-by: Honghui Zhang
Reviewed-by: Ryder Lee
---
drivers/pci/controller/Kconfig | 2 +-
drivers/pci/controller/pcie-mediatek.c | 51 +-
2 files changed, 51 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig
index 028b287..465790f 100644
--- a/drivers/pci/controller/Kconfig
+++ b/drivers/pci/controller/Kconfig
@@ -231,7 +231,7 @@ config PCIE_ROCKCHIP_EP
available to support GEN2 with 4 slots.
config PCIE_MEDIATEK
- bool "MediaTek PCIe controller"
+ tristate "MediaTek PCIe controller"
depends on ARCH_MEDIATEK || COMPILE_TEST
depends on OF
depends on PCI_MSI_IRQ_DOMAIN
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index daba78f..5048adb 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -532,6 +533,27 @@ static void mtk_pcie_enable_msi(struct mtk_pcie_port *port)
writel(val, port->base + PCIE_INT_MASK);
}
+static void mtk_pcie_irq_teardown(struct mtk_pcie *pcie)
+{
+ struct mtk_pcie_port *port, *tmp;
+
+ list_for_each_entry_safe(port, tmp, >ports, list) {
+ irq_set_chained_handler_and_data(port->irq, NULL, NULL);
+
+ if (port->irq_domain)
+ irq_domain_remove(port->irq_domain);
+
+ if (IS_ENABLED(CONFIG_PCI_MSI)) {
+ if (port->msi_domain)
+ irq_domain_remove(port->msi_domain);
+ if (port->inner_domain)
+ irq_domain_remove(port->inner_domain);
+ }
+
+ irq_dispose_mapping(port->irq);
+ }
+}
+
static int mtk_pcie_intx_map(struct irq_domain *domain, unsigned int irq,
irq_hw_number_t hwirq)
{
@@ -1171,6 +1193,31 @@ static int mtk_pcie_probe(struct platform_device *pdev)
return err;
}
+
+static void mtk_pcie_free_resources(struct mtk_pcie *pcie)
+{
+ struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie);
+ struct list_head *windows = >windows;
+
+ pci_free_resource_list(windows);
+}
+
+static int mtk_pcie_remove(struct platform_device *pdev)
+{
+ struct mtk_pcie *pcie = platform_get_drvdata(pdev);
+ struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie);
+
+ pci_stop_root_bus(host->bus);
+ pci_remove_root_bus(host->bus);
+ mtk_pcie_free_resources(pcie);
+
+ mtk_pcie_irq_teardown(pcie);
+
+ mtk_pcie_put_resources(pcie);
+
+ return 0;
+}
+
static int __maybe_unused mtk_pcie_suspend_noirq(struct device *dev)
{
struct mtk_pcie *pcie = dev_get_drvdata(dev);
@@ -1248,6 +1295,7 @@ static const struct of_device_id mtk_pcie_ids[] = {
static struct platform_driver mtk_pcie_driver = {
.probe = mtk_pcie_probe,
+ .remove = mtk_pcie_remove,
.driver = {
.name = "mtk-pcie",
.of_match_table = mtk_pcie_ids,
@@ -1255,4 +1303,5 @@ static struct platform_driver mtk_pcie_driver = {
.pm = _pcie_pm_ops,
},
};
-builtin_platform_driver(mtk_pcie_driver);
+module_platform_driver(mtk_pcie_driver);
+MODULE_LICENSE("GPL v2");
--
2.6.4
Re: [PATCH v4 3/6] parisc: add system call table generation support
Hi Eike,
On Mon, 15 Oct 2018 at 10:47, Rolf Eike Beer wrote:
>
> Firoz Khan wrote:
> > Hi Rolf,
> >
> > On Fri, 12 Oct 2018 at 17:37, Rolf Eike Beer wrote:
> > > Firoz Khan wrote:
>
> > > > +prefix="$4"
> > > > +offset="$5"
> > > > +
> > > > +fileguard=_UAPI_ASM_PARISC_`basename "$out" | sed \
> > > > +-e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/' \
> > > > +-e 's/[^A-Z0-9_]/_/g' -e 's/__/_/g'`
> > > > +grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | (
> > > > +echo "#ifndef ${fileguard}"
> > > > +echo "#define ${fileguard}"
> > > > +echo ""
> > > > +
> > > > +nxt=0
> > > > +while read nr abi name entry compat ; do
> > > > + if [ -z "$offset" ]; then
> > > > + echo -e "#define __NR_${prefix}${name}\t$nr"
> > >
> > > This mixed indentation with both tabs and spaces is a bit messy.
> >
> > Is this what you suggested?
> > - echo -e "#define __NR_${prefix}${name}\t$nr"
> > + echo "#define __NR_${prefix}${name} $nr"
>
> No, this was actually only about the script itself. Looks like your editor has
> tab-width 8 and indentation 4 or so.
Ok. Something is going bad while creating the patch series. That's why this
mixed indentation with both tabs and spaces.Will fix now.
It will be ok to have indentation of 4 character?
https://github.com/torvalds/linux/blob/master/arch/x86/entry/syscalls/syscalltbl.sh
https://github.com/torvalds/linux/blob/master/arch/arm/tools/syscalltbl.sh
Thanks
Firoz
>
> Eike
[PATCH v7 1/9] PCI: mediatek: Using slot's devfn for compare to fix mtk_pcie_find_port logic
From: Honghui Zhang
The Mediatek's host controller has two slots, each with it's own control
registers. The host driver need to identify which slot was connected
in order to access the device's configuration space. There's problem
for current host driver to find out which slot was connected to for
a given EP device.
Assuming each slot have connect with one EP device as below:
host bridge
bus 0 --> __|___
| |
| |
slot 0 slot 1
bus 1 -->|bus 2 --> |
| |
EP 0 EP 1
During PCI enumeration, system software will scan all the PCI device
starting from devfn 0. So it will get the proper port for slot0 and
slot1 device when using PCI_SLOT(devfn) for match. But it will get
the wrong slot for EP1: The devfn will be start from 0 when scanning
EP1 behind slot1, it will get port0 since the PCI_SLOT(EP1) is match
for port0's slot value. So the host driver should not using EP's devfn
but the slot's devfn(the slot which EP was connected to) for match.
This patch fix the mtk_pcie_find_port's logic by using the slot's
devfn for match if finding device connected to the subordinate bus.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index dae..288b8e2 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -337,6 +337,17 @@ static struct mtk_pcie_port *mtk_pcie_find_port(struct
pci_bus *bus,
{
struct mtk_pcie *pcie = bus->sysdata;
struct mtk_pcie_port *port;
+ struct pci_dev *dev = NULL;
+
+ /*
+* Walk the bus hierarchy to get the devfn value
+* of the port in the root bus.
+*/
+ while (bus && bus->number) {
+ dev = bus->self;
+ bus = dev->bus;
+ devfn = dev->devfn;
+ }
list_for_each_entry(port, >ports, list)
if (port->slot == PCI_SLOT(devfn))
--
2.6.4
[PATCH v7 1/9] PCI: mediatek: Using slot's devfn for compare to fix mtk_pcie_find_port logic
From: Honghui Zhang
The Mediatek's host controller has two slots, each with it's own control
registers. The host driver need to identify which slot was connected
in order to access the device's configuration space. There's problem
for current host driver to find out which slot was connected to for
a given EP device.
Assuming each slot have connect with one EP device as below:
host bridge
bus 0 --> __|___
| |
| |
slot 0 slot 1
bus 1 -->|bus 2 --> |
| |
EP 0 EP 1
During PCI enumeration, system software will scan all the PCI device
starting from devfn 0. So it will get the proper port for slot0 and
slot1 device when using PCI_SLOT(devfn) for match. But it will get
the wrong slot for EP1: The devfn will be start from 0 when scanning
EP1 behind slot1, it will get port0 since the PCI_SLOT(EP1) is match
for port0's slot value. So the host driver should not using EP's devfn
but the slot's devfn(the slot which EP was connected to) for match.
This patch fix the mtk_pcie_find_port's logic by using the slot's
devfn for match if finding device connected to the subordinate bus.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index dae..288b8e2 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -337,6 +337,17 @@ static struct mtk_pcie_port *mtk_pcie_find_port(struct
pci_bus *bus,
{
struct mtk_pcie *pcie = bus->sysdata;
struct mtk_pcie_port *port;
+ struct pci_dev *dev = NULL;
+
+ /*
+* Walk the bus hierarchy to get the devfn value
+* of the port in the root bus.
+*/
+ while (bus && bus->number) {
+ dev = bus->self;
+ bus = dev->bus;
+ devfn = dev->devfn;
+ }
list_for_each_entry(port, >ports, list)
if (port->slot == PCI_SLOT(devfn))
--
2.6.4
[PATCH v7 7/9] PCI: mediatek: Add system PM support for MT2712 and MT7622
From: Honghui Zhang
In order to reduce the PCIe power consuming while system suspend,
the physical layer should be gated. And the PCIe link should be
re-established and the related control register values should be
re-initialized after system resume.
Register suspend_noirq & resume_noirq callback functions to allow
PCIe to come up after resume from RAM.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 50 ++
1 file changed, 50 insertions(+)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index d3f4694..42cf2a4 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -1168,6 +1168,55 @@ static int mtk_pcie_probe(struct platform_device *pdev)
return err;
}
+static int __maybe_unused mtk_pcie_suspend_noirq(struct device *dev)
+{
+ struct mtk_pcie *pcie = dev_get_drvdata(dev);
+ struct mtk_pcie_port *port;
+
+ if (list_empty(>ports))
+ return 0;
+
+ list_for_each_entry(port, >ports, list) {
+ clk_disable_unprepare(port->pipe_ck);
+ clk_disable_unprepare(port->obff_ck);
+ clk_disable_unprepare(port->axi_ck);
+ clk_disable_unprepare(port->aux_ck);
+ clk_disable_unprepare(port->ahb_ck);
+ clk_disable_unprepare(port->sys_ck);
+ phy_power_off(port->phy);
+ phy_exit(port->phy);
+ }
+
+ clk_disable_unprepare(pcie->free_ck);
+
+ return 0;
+}
+
+static int __maybe_unused mtk_pcie_resume_noirq(struct device *dev)
+{
+ struct mtk_pcie *pcie = dev_get_drvdata(dev);
+ struct mtk_pcie_port *port, *tmp;
+
+ if (list_empty(>ports))
+ return 0;
+
+ clk_prepare_enable(pcie->free_ck);
+
+ list_for_each_entry_safe(port, tmp, >ports, list)
+ mtk_pcie_enable_port(port);
+
+ /* In case of EP was removed while system suspend. */
+ if (list_empty(>ports))
+ clk_disable_unprepare(pcie->free_ck);
+
+ return 0;
+}
+
+static const struct dev_pm_ops mtk_pcie_pm_ops = {
+ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(mtk_pcie_suspend_noirq,
+ mtk_pcie_resume_noirq)
+};
+
static const struct mtk_pcie_soc mtk_pcie_soc_v1 = {
.ops = _pcie_ops,
.startup = mtk_pcie_startup_port,
@@ -1200,6 +1249,7 @@ static struct platform_driver mtk_pcie_driver = {
.name = "mtk-pcie",
.of_match_table = mtk_pcie_ids,
.suppress_bind_attrs = true,
+ .pm = _pcie_pm_ops,
},
};
builtin_platform_driver(mtk_pcie_driver);
--
2.6.4
[PATCH v7 0/9] PCI: mediatek: fixup find_port, enable_msi and add PM, module support
From: Honghui Zhang This patchset includes misc patchs: The patch 1 fixup the mtk_pcie_find_port logic which will cause system could not touch the EP's configuration space that connected to PCIe slot 1. The patch 2 fixup the class type for MT7622. The patch 6 fixup the enable msi logic, the operation to enable MSI should be after system clock is enabled. Call mtk_pcie_enable_msi in mtk_pcie_startup_port_v2 since the clock was all enabled at that time. The patch 7 was rebased and refactor of the v4 patch[1], changes are: -Add PM support for MT7622. -Using mtk_pcie_enable_port to re-establish the link when resumed. -Rebased on this patchset. The patch 9 add loadable kernel module support. [1] https://patchwork.kernel.org/patch/10479079 Change since v6: - Remove the pci_unmap_iospace when remove the device since the devm_pci_remap_iospace is an devm_ version. - Commit message changed for patch 2(Fix class type for MT7622 as PCI_CLASS_BRIDGE_PCI). - Capitilizing "MSI" and "PM" in the patch title. Change since v5: - A bit improvement of mtk_pcie_find_port suggest by Lorenzo. - Add fixup tags of fix enable MSI logic in patch 6. - Add Acked-by tags from Ryder. Change since v4: - Add patch 2 to fixup class type for MT7622. - Add patch 3 to remove the redundant dev->pm_domain check - Add patch 4 to covert to use pci_host_probe - Add patch 5 to re-arrange the function define, this is a prepare patch for fixup the enable_msi logic, no functional changed have been made by this one. - Add patch 8 to save the GIC IRQ in mtk_pcie_port as a prepare patch for tear down the irq when remove the kernel module. - Re-arrange the find_port flow suggest by Lorenzo to make the code parse easier for the patch 1. - Remove the .pm_support in mtk_pcie_soc in patch 7 since if system pm was not supported, then those pm callbacks will never be executed for MT7622. So the .pm_support is not needed. Change since v3: - Remove pm_runtime_XXX ops in suspend and resume callbacks in the third patch. - Rebase to 4.19-rc1. Change since v2: - Fix the list_for_each_entry_safe parameter error. - Add Ryder's Acked-by flag. Change since v1: - A bit of code refact of the first patch suggested by Andy Shevchenko, and commit message updated. Honghui Zhang (9): PCI: mediatek: Using slot's devfn for compare to fix mtk_pcie_find_port logic PCI: mediatek: Fix class type for MT7622 as PCI_CLASS_BRIDGE_PCI PCI: mediatek: Remove the redundant dev->pm_domain check PCI: mediatek: Convert to use pci_host_probe() PCI: mediatek: Move the mtk_pcie_startup_port_v2 function's define after mtk_pcie_setup_irq PCI: mediatek: Fixup enable MSI logic by enable MSI after clock enabled PCI: mediatek: Add system PM support for MT2712 and MT7622 PCI: mediatek: Save the GIC IRQ in mtk_pcie_port PCI: mediatek: Add loadable kernel module support drivers/pci/controller/Kconfig | 2 +- drivers/pci/controller/pcie-mediatek.c | 319 + 2 files changed, 204 insertions(+), 117 deletions(-) -- 2.6.4
[PATCH v7 4/9] PCI: mediatek: Convert to use pci_host_probe()
From: Honghui Zhang
Part of mtk_pcie_register_host is an open-coded version of
pci_host_probe(). So instead of duplicating this code, use
pci_host_probe() directly and remove mtk_pcie_register_host.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 37 --
1 file changed, 8 insertions(+), 29 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index 59fdb60..ead6005 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -1121,34 +1121,6 @@ static int mtk_pcie_request_resources(struct mtk_pcie
*pcie)
return 0;
}
-static int mtk_pcie_register_host(struct pci_host_bridge *host)
-{
- struct mtk_pcie *pcie = pci_host_bridge_priv(host);
- struct pci_bus *child;
- int err;
-
- host->busnr = pcie->busn.start;
- host->dev.parent = pcie->dev;
- host->ops = pcie->soc->ops;
- host->map_irq = of_irq_parse_and_map_pci;
- host->swizzle_irq = pci_common_swizzle;
- host->sysdata = pcie;
-
- err = pci_scan_root_bus_bridge(host);
- if (err < 0)
- return err;
-
- pci_bus_size_bridges(host->bus);
- pci_bus_assign_resources(host->bus);
-
- list_for_each_entry(child, >bus->children, node)
- pcie_bus_configure_settings(child);
-
- pci_bus_add_devices(host->bus);
-
- return 0;
-}
-
static int mtk_pcie_probe(struct platform_device *pdev)
{
struct device *dev = >dev;
@@ -1175,7 +1147,14 @@ static int mtk_pcie_probe(struct platform_device *pdev)
if (err)
goto put_resources;
- err = mtk_pcie_register_host(host);
+ host->busnr = pcie->busn.start;
+ host->dev.parent = pcie->dev;
+ host->ops = pcie->soc->ops;
+ host->map_irq = of_irq_parse_and_map_pci;
+ host->swizzle_irq = pci_common_swizzle;
+ host->sysdata = pcie;
+
+ err = pci_host_probe(host);
if (err)
goto put_resources;
--
2.6.4
[PATCH v7 7/9] PCI: mediatek: Add system PM support for MT2712 and MT7622
From: Honghui Zhang
In order to reduce the PCIe power consuming while system suspend,
the physical layer should be gated. And the PCIe link should be
re-established and the related control register values should be
re-initialized after system resume.
Register suspend_noirq & resume_noirq callback functions to allow
PCIe to come up after resume from RAM.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 50 ++
1 file changed, 50 insertions(+)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index d3f4694..42cf2a4 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -1168,6 +1168,55 @@ static int mtk_pcie_probe(struct platform_device *pdev)
return err;
}
+static int __maybe_unused mtk_pcie_suspend_noirq(struct device *dev)
+{
+ struct mtk_pcie *pcie = dev_get_drvdata(dev);
+ struct mtk_pcie_port *port;
+
+ if (list_empty(>ports))
+ return 0;
+
+ list_for_each_entry(port, >ports, list) {
+ clk_disable_unprepare(port->pipe_ck);
+ clk_disable_unprepare(port->obff_ck);
+ clk_disable_unprepare(port->axi_ck);
+ clk_disable_unprepare(port->aux_ck);
+ clk_disable_unprepare(port->ahb_ck);
+ clk_disable_unprepare(port->sys_ck);
+ phy_power_off(port->phy);
+ phy_exit(port->phy);
+ }
+
+ clk_disable_unprepare(pcie->free_ck);
+
+ return 0;
+}
+
+static int __maybe_unused mtk_pcie_resume_noirq(struct device *dev)
+{
+ struct mtk_pcie *pcie = dev_get_drvdata(dev);
+ struct mtk_pcie_port *port, *tmp;
+
+ if (list_empty(>ports))
+ return 0;
+
+ clk_prepare_enable(pcie->free_ck);
+
+ list_for_each_entry_safe(port, tmp, >ports, list)
+ mtk_pcie_enable_port(port);
+
+ /* In case of EP was removed while system suspend. */
+ if (list_empty(>ports))
+ clk_disable_unprepare(pcie->free_ck);
+
+ return 0;
+}
+
+static const struct dev_pm_ops mtk_pcie_pm_ops = {
+ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(mtk_pcie_suspend_noirq,
+ mtk_pcie_resume_noirq)
+};
+
static const struct mtk_pcie_soc mtk_pcie_soc_v1 = {
.ops = _pcie_ops,
.startup = mtk_pcie_startup_port,
@@ -1200,6 +1249,7 @@ static struct platform_driver mtk_pcie_driver = {
.name = "mtk-pcie",
.of_match_table = mtk_pcie_ids,
.suppress_bind_attrs = true,
+ .pm = _pcie_pm_ops,
},
};
builtin_platform_driver(mtk_pcie_driver);
--
2.6.4
[PATCH v7 0/9] PCI: mediatek: fixup find_port, enable_msi and add PM, module support
From: Honghui Zhang This patchset includes misc patchs: The patch 1 fixup the mtk_pcie_find_port logic which will cause system could not touch the EP's configuration space that connected to PCIe slot 1. The patch 2 fixup the class type for MT7622. The patch 6 fixup the enable msi logic, the operation to enable MSI should be after system clock is enabled. Call mtk_pcie_enable_msi in mtk_pcie_startup_port_v2 since the clock was all enabled at that time. The patch 7 was rebased and refactor of the v4 patch[1], changes are: -Add PM support for MT7622. -Using mtk_pcie_enable_port to re-establish the link when resumed. -Rebased on this patchset. The patch 9 add loadable kernel module support. [1] https://patchwork.kernel.org/patch/10479079 Change since v6: - Remove the pci_unmap_iospace when remove the device since the devm_pci_remap_iospace is an devm_ version. - Commit message changed for patch 2(Fix class type for MT7622 as PCI_CLASS_BRIDGE_PCI). - Capitilizing "MSI" and "PM" in the patch title. Change since v5: - A bit improvement of mtk_pcie_find_port suggest by Lorenzo. - Add fixup tags of fix enable MSI logic in patch 6. - Add Acked-by tags from Ryder. Change since v4: - Add patch 2 to fixup class type for MT7622. - Add patch 3 to remove the redundant dev->pm_domain check - Add patch 4 to covert to use pci_host_probe - Add patch 5 to re-arrange the function define, this is a prepare patch for fixup the enable_msi logic, no functional changed have been made by this one. - Add patch 8 to save the GIC IRQ in mtk_pcie_port as a prepare patch for tear down the irq when remove the kernel module. - Re-arrange the find_port flow suggest by Lorenzo to make the code parse easier for the patch 1. - Remove the .pm_support in mtk_pcie_soc in patch 7 since if system pm was not supported, then those pm callbacks will never be executed for MT7622. So the .pm_support is not needed. Change since v3: - Remove pm_runtime_XXX ops in suspend and resume callbacks in the third patch. - Rebase to 4.19-rc1. Change since v2: - Fix the list_for_each_entry_safe parameter error. - Add Ryder's Acked-by flag. Change since v1: - A bit of code refact of the first patch suggested by Andy Shevchenko, and commit message updated. Honghui Zhang (9): PCI: mediatek: Using slot's devfn for compare to fix mtk_pcie_find_port logic PCI: mediatek: Fix class type for MT7622 as PCI_CLASS_BRIDGE_PCI PCI: mediatek: Remove the redundant dev->pm_domain check PCI: mediatek: Convert to use pci_host_probe() PCI: mediatek: Move the mtk_pcie_startup_port_v2 function's define after mtk_pcie_setup_irq PCI: mediatek: Fixup enable MSI logic by enable MSI after clock enabled PCI: mediatek: Add system PM support for MT2712 and MT7622 PCI: mediatek: Save the GIC IRQ in mtk_pcie_port PCI: mediatek: Add loadable kernel module support drivers/pci/controller/Kconfig | 2 +- drivers/pci/controller/pcie-mediatek.c | 319 + 2 files changed, 204 insertions(+), 117 deletions(-) -- 2.6.4
[PATCH v7 4/9] PCI: mediatek: Convert to use pci_host_probe()
From: Honghui Zhang
Part of mtk_pcie_register_host is an open-coded version of
pci_host_probe(). So instead of duplicating this code, use
pci_host_probe() directly and remove mtk_pcie_register_host.
Signed-off-by: Honghui Zhang
---
drivers/pci/controller/pcie-mediatek.c | 37 --
1 file changed, 8 insertions(+), 29 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c
b/drivers/pci/controller/pcie-mediatek.c
index 59fdb60..ead6005 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -1121,34 +1121,6 @@ static int mtk_pcie_request_resources(struct mtk_pcie
*pcie)
return 0;
}
-static int mtk_pcie_register_host(struct pci_host_bridge *host)
-{
- struct mtk_pcie *pcie = pci_host_bridge_priv(host);
- struct pci_bus *child;
- int err;
-
- host->busnr = pcie->busn.start;
- host->dev.parent = pcie->dev;
- host->ops = pcie->soc->ops;
- host->map_irq = of_irq_parse_and_map_pci;
- host->swizzle_irq = pci_common_swizzle;
- host->sysdata = pcie;
-
- err = pci_scan_root_bus_bridge(host);
- if (err < 0)
- return err;
-
- pci_bus_size_bridges(host->bus);
- pci_bus_assign_resources(host->bus);
-
- list_for_each_entry(child, >bus->children, node)
- pcie_bus_configure_settings(child);
-
- pci_bus_add_devices(host->bus);
-
- return 0;
-}
-
static int mtk_pcie_probe(struct platform_device *pdev)
{
struct device *dev = >dev;
@@ -1175,7 +1147,14 @@ static int mtk_pcie_probe(struct platform_device *pdev)
if (err)
goto put_resources;
- err = mtk_pcie_register_host(host);
+ host->busnr = pcie->busn.start;
+ host->dev.parent = pcie->dev;
+ host->ops = pcie->soc->ops;
+ host->map_irq = of_irq_parse_and_map_pci;
+ host->swizzle_irq = pci_common_swizzle;
+ host->sysdata = pcie;
+
+ err = pci_host_probe(host);
if (err)
goto put_resources;
--
2.6.4
Re: [tip:x86/mm] x86/mm: Break out user address space handling
tip-bot for Dave Hansen writes:
> Commit-ID: aa37c51b9421d66f7931c5fdcb9ce80c450974be
> Gitweb:
> https://git.kernel.org/tip/aa37c51b9421d66f7931c5fdcb9ce80c450974be
> Author: Dave Hansen
> AuthorDate: Fri, 28 Sep 2018 09:02:23 -0700
> Committer: Peter Zijlstra
> CommitDate: Tue, 9 Oct 2018 16:51:15 +0200
>
> x86/mm: Break out user address space handling
>
> The last patch broke out kernel address space handing into its own
> helper. Now, do the same for user address space handling.
>
> Cc: x...@kernel.org
> Cc: Jann Horn
> Cc: Sean Christopherson
> Cc: Thomas Gleixner
> Cc: Andy Lutomirski
> Signed-off-by: Dave Hansen
> Signed-off-by: Peter Zijlstra (Intel)
> Link: http://lkml.kernel.org/r/20180928160223.9c4f6...@viggo.jf.intel.com
> ---
> arch/x86/mm/fault.c | 47 ---
> 1 file changed, 28 insertions(+), 19 deletions(-)
>
> diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
> index c7e32f453852..0d1f5d39fc63 100644
> --- a/arch/x86/mm/fault.c
> +++ b/arch/x86/mm/fault.c
> @@ -966,6 +966,7 @@ bad_area_access_error(struct pt_regs *regs, unsigned long
> error_code,
> __bad_area(regs, error_code, address, vma, SEGV_ACCERR);
> }
>
> +/* Handle faults in the kernel portion of the address space */
^^
I believe you mean the __user__ portion of the address space.
Given that the call chain is:
do_user_addr_fault
handle_mm_fault
do_sigbus
> static void
> do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long
> address,
> u32 *pkey, unsigned int fault)
> @@ -1254,14 +1255,11 @@ do_kern_addr_fault(struct pt_regs *regs, unsigned
> long hw_error_code,
> }
> NOKPROBE_SYMBOL(do_kern_addr_fault);
>
> -/*
> - * This routine handles page faults. It determines the address,
> - * and the problem, and then passes it off to one of the appropriate
> - * routines.
> - */
> -static noinline void
> -__do_page_fault(struct pt_regs *regs, unsigned long hw_error_code,
> - unsigned long address)
> +/* Handle faults in the user portion of the address space */
> +static inline
> +void do_user_addr_fault(struct pt_regs *regs,
> + unsigned long hw_error_code,
> + unsigned long address)
> {
> unsigned long sw_error_code;
> struct vm_area_struct *vma;
> @@ -1274,17 +1272,6 @@ __do_page_fault(struct pt_regs *regs, unsigned long
> hw_error_code,
> tsk = current;
> mm = tsk->mm;
>
> - prefetchw(>mmap_sem);
> -
> - if (unlikely(kmmio_fault(regs, address)))
> - return;
> -
> - /* Was the fault on kernel-controlled part of the address space? */
> - if (unlikely(fault_in_kernel_space(address))) {
> - do_kern_addr_fault(regs, hw_error_code, address);
> - return;
> - }
> -
> /* kprobes don't want to hook the spurious faults: */
> if (unlikely(kprobes_fault(regs)))
> return;
> @@ -1488,6 +1475,28 @@ good_area:
>
> check_v8086_mode(regs, address, tsk);
> }
> +NOKPROBE_SYMBOL(do_user_addr_fault);
> +
> +/*
> + * This routine handles page faults. It determines the address,
> + * and the problem, and then passes it off to one of the appropriate
> + * routines.
> + */
> +static noinline void
> +__do_page_fault(struct pt_regs *regs, unsigned long hw_error_code,
> + unsigned long address)
> +{
> + prefetchw(>mm->mmap_sem);
> +
> + if (unlikely(kmmio_fault(regs, address)))
> + return;
> +
> + /* Was the fault on kernel-controlled part of the address space? */
> + if (unlikely(fault_in_kernel_space(address)))
> + do_kern_addr_fault(regs, hw_error_code, address);
> + else
> + do_user_addr_fault(regs, hw_error_code, address);
> +}
> NOKPROBE_SYMBOL(__do_page_fault);
>
> static nokprobe_inline void
Eric
Re: [tip:x86/mm] x86/mm: Break out user address space handling
tip-bot for Dave Hansen writes:
> Commit-ID: aa37c51b9421d66f7931c5fdcb9ce80c450974be
> Gitweb:
> https://git.kernel.org/tip/aa37c51b9421d66f7931c5fdcb9ce80c450974be
> Author: Dave Hansen
> AuthorDate: Fri, 28 Sep 2018 09:02:23 -0700
> Committer: Peter Zijlstra
> CommitDate: Tue, 9 Oct 2018 16:51:15 +0200
>
> x86/mm: Break out user address space handling
>
> The last patch broke out kernel address space handing into its own
> helper. Now, do the same for user address space handling.
>
> Cc: x...@kernel.org
> Cc: Jann Horn
> Cc: Sean Christopherson
> Cc: Thomas Gleixner
> Cc: Andy Lutomirski
> Signed-off-by: Dave Hansen
> Signed-off-by: Peter Zijlstra (Intel)
> Link: http://lkml.kernel.org/r/20180928160223.9c4f6...@viggo.jf.intel.com
> ---
> arch/x86/mm/fault.c | 47 ---
> 1 file changed, 28 insertions(+), 19 deletions(-)
>
> diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
> index c7e32f453852..0d1f5d39fc63 100644
> --- a/arch/x86/mm/fault.c
> +++ b/arch/x86/mm/fault.c
> @@ -966,6 +966,7 @@ bad_area_access_error(struct pt_regs *regs, unsigned long
> error_code,
> __bad_area(regs, error_code, address, vma, SEGV_ACCERR);
> }
>
> +/* Handle faults in the kernel portion of the address space */
^^
I believe you mean the __user__ portion of the address space.
Given that the call chain is:
do_user_addr_fault
handle_mm_fault
do_sigbus
> static void
> do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long
> address,
> u32 *pkey, unsigned int fault)
> @@ -1254,14 +1255,11 @@ do_kern_addr_fault(struct pt_regs *regs, unsigned
> long hw_error_code,
> }
> NOKPROBE_SYMBOL(do_kern_addr_fault);
>
> -/*
> - * This routine handles page faults. It determines the address,
> - * and the problem, and then passes it off to one of the appropriate
> - * routines.
> - */
> -static noinline void
> -__do_page_fault(struct pt_regs *regs, unsigned long hw_error_code,
> - unsigned long address)
> +/* Handle faults in the user portion of the address space */
> +static inline
> +void do_user_addr_fault(struct pt_regs *regs,
> + unsigned long hw_error_code,
> + unsigned long address)
> {
> unsigned long sw_error_code;
> struct vm_area_struct *vma;
> @@ -1274,17 +1272,6 @@ __do_page_fault(struct pt_regs *regs, unsigned long
> hw_error_code,
> tsk = current;
> mm = tsk->mm;
>
> - prefetchw(>mmap_sem);
> -
> - if (unlikely(kmmio_fault(regs, address)))
> - return;
> -
> - /* Was the fault on kernel-controlled part of the address space? */
> - if (unlikely(fault_in_kernel_space(address))) {
> - do_kern_addr_fault(regs, hw_error_code, address);
> - return;
> - }
> -
> /* kprobes don't want to hook the spurious faults: */
> if (unlikely(kprobes_fault(regs)))
> return;
> @@ -1488,6 +1475,28 @@ good_area:
>
> check_v8086_mode(regs, address, tsk);
> }
> +NOKPROBE_SYMBOL(do_user_addr_fault);
> +
> +/*
> + * This routine handles page faults. It determines the address,
> + * and the problem, and then passes it off to one of the appropriate
> + * routines.
> + */
> +static noinline void
> +__do_page_fault(struct pt_regs *regs, unsigned long hw_error_code,
> + unsigned long address)
> +{
> + prefetchw(>mm->mmap_sem);
> +
> + if (unlikely(kmmio_fault(regs, address)))
> + return;
> +
> + /* Was the fault on kernel-controlled part of the address space? */
> + if (unlikely(fault_in_kernel_space(address)))
> + do_kern_addr_fault(regs, hw_error_code, address);
> + else
> + do_user_addr_fault(regs, hw_error_code, address);
> +}
> NOKPROBE_SYMBOL(__do_page_fault);
>
> static nokprobe_inline void
Eric
[PATCH v9 2/6] dt: bindings: Document ZynqMP DDRC in Synopsys documentation
Add information of ZynqMP DDRC which reports the single bit errors that
are corrected and the double bit errors that are detected.
Signed-off-by: Manish Narani
Reviewed-by: Rob Herring
---
.../bindings/memory-controllers/synopsys.txt | 27 ++
1 file changed, 22 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
index a43d26d..9d32762 100644
--- a/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
@@ -1,15 +1,32 @@
Binding for Synopsys IntelliDDR Multi Protocol Memory Controller
-This controller has an optional ECC support in half-bus width (16-bit)
-configuration. The ECC controller corrects one bit error and detects
-two bit errors.
+The ZynqMP DDR ECC controller has an optional ECC support in 64-bit and 32-bit
+bus width configurations.
+
+The Zynq DDR ECC controller has an optional ECC support in half-bus width
+(16-bit) configuration.
+
+These both ECC controllers correct single bit ECC errors and detect double bit
+ECC errors.
Required properties:
- - compatible: Should be 'xlnx,zynq-ddrc-a05'
- - reg: Base address and size of the controllers memory area
+ - compatible: One of:
+ - 'xlnx,zynq-ddrc-a05' : Zynq DDR ECC controller
+ - 'xlnx,zynqmp-ddrc-2.40a' : ZynqMP DDR ECC controller
+ - reg: Should contain DDR controller registers location and length.
+
+Required properties for "xlnx,zynqmp-ddrc-2.40a":
+ - interrupts: Property with a value describing the interrupt number.
Example:
memory-controller@f8006000 {
compatible = "xlnx,zynq-ddrc-a05";
reg = <0xf8006000 0x1000>;
};
+
+ mc: memory-controller@fd07 {
+ compatible = "xlnx,zynqmp-ddrc-2.40a";
+ reg = <0x0 0xfd07 0x0 0x3>;
+ interrupt-parent = <>;
+ interrupts = <0 112 4>;
+ };
--
2.1.1
[PATCH v9 2/6] dt: bindings: Document ZynqMP DDRC in Synopsys documentation
Add information of ZynqMP DDRC which reports the single bit errors that
are corrected and the double bit errors that are detected.
Signed-off-by: Manish Narani
Reviewed-by: Rob Herring
---
.../bindings/memory-controllers/synopsys.txt | 27 ++
1 file changed, 22 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
index a43d26d..9d32762 100644
--- a/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
@@ -1,15 +1,32 @@
Binding for Synopsys IntelliDDR Multi Protocol Memory Controller
-This controller has an optional ECC support in half-bus width (16-bit)
-configuration. The ECC controller corrects one bit error and detects
-two bit errors.
+The ZynqMP DDR ECC controller has an optional ECC support in 64-bit and 32-bit
+bus width configurations.
+
+The Zynq DDR ECC controller has an optional ECC support in half-bus width
+(16-bit) configuration.
+
+These both ECC controllers correct single bit ECC errors and detect double bit
+ECC errors.
Required properties:
- - compatible: Should be 'xlnx,zynq-ddrc-a05'
- - reg: Base address and size of the controllers memory area
+ - compatible: One of:
+ - 'xlnx,zynq-ddrc-a05' : Zynq DDR ECC controller
+ - 'xlnx,zynqmp-ddrc-2.40a' : ZynqMP DDR ECC controller
+ - reg: Should contain DDR controller registers location and length.
+
+Required properties for "xlnx,zynqmp-ddrc-2.40a":
+ - interrupts: Property with a value describing the interrupt number.
Example:
memory-controller@f8006000 {
compatible = "xlnx,zynq-ddrc-a05";
reg = <0xf8006000 0x1000>;
};
+
+ mc: memory-controller@fd07 {
+ compatible = "xlnx,zynqmp-ddrc-2.40a";
+ reg = <0x0 0xfd07 0x0 0x3>;
+ interrupt-parent = <>;
+ interrupts = <0 112 4>;
+ };
--
2.1.1
[PATCH v9 5/6] arm64: zynqmp: Add DDRC node
Add ddrc memory controller node in dts. The size mentioned in dts is
0x3, because we need to access DDR_QOS INTR registers located at
0xFD090208 from this driver.
Signed-off-by: Manish Narani
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 29ce234..a81d3b16 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -355,6 +355,13 @@
xlnx,bus-width = <64>;
};
+ mc: memory-controller@fd07 {
+ compatible = "xlnx,zynqmp-ddrc-2.40a";
+ reg = <0x0 0xfd07 0x0 0x3>;
+ interrupt-parent = <>;
+ interrupts = <0 112 4>;
+ };
+
gem0: ethernet@ff0b {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
--
2.1.1
[PATCH v9 1/6] edac: synopsys: Add error handling for NULL in probe()
The function of_device_get_match_data() can return NULL in case of
error. Add error handling for the same in probe().
Signed-off-by: Manish Narani
---
drivers/edac/synopsys_edac.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
index 1c3795d..0005ef3 100644
--- a/drivers/edac/synopsys_edac.c
+++ b/drivers/edac/synopsys_edac.c
@@ -477,6 +477,9 @@ static int mc_probe(struct platform_device *pdev)
return PTR_ERR(baseaddr);
p_data = of_device_get_match_data(>dev);
+ if (!p_data)
+ return -ENODEV;
+
if (!p_data->get_ecc_state(baseaddr)) {
edac_printk(KERN_INFO, EDAC_MC, "ECC not enabled\n");
return -ENXIO;
--
2.1.1
[PATCH v9 5/6] arm64: zynqmp: Add DDRC node
Add ddrc memory controller node in dts. The size mentioned in dts is
0x3, because we need to access DDR_QOS INTR registers located at
0xFD090208 from this driver.
Signed-off-by: Manish Narani
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 29ce234..a81d3b16 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -355,6 +355,13 @@
xlnx,bus-width = <64>;
};
+ mc: memory-controller@fd07 {
+ compatible = "xlnx,zynqmp-ddrc-2.40a";
+ reg = <0x0 0xfd07 0x0 0x3>;
+ interrupt-parent = <>;
+ interrupts = <0 112 4>;
+ };
+
gem0: ethernet@ff0b {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
--
2.1.1
[PATCH v9 1/6] edac: synopsys: Add error handling for NULL in probe()
The function of_device_get_match_data() can return NULL in case of
error. Add error handling for the same in probe().
Signed-off-by: Manish Narani
---
drivers/edac/synopsys_edac.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
index 1c3795d..0005ef3 100644
--- a/drivers/edac/synopsys_edac.c
+++ b/drivers/edac/synopsys_edac.c
@@ -477,6 +477,9 @@ static int mc_probe(struct platform_device *pdev)
return PTR_ERR(baseaddr);
p_data = of_device_get_match_data(>dev);
+ if (!p_data)
+ return -ENODEV;
+
if (!p_data->get_ecc_state(baseaddr)) {
edac_printk(KERN_INFO, EDAC_MC, "ECC not enabled\n");
return -ENXIO;
--
2.1.1
[PATCH v9 0/6] EDAC: Enhancements to Synopsys EDAC driver
This patch series enhances the current EDAC driver to support different platforms. This series adds support for ZynqMP DDRC controller in synopsys EDAC driver. This series also adds Device tree properties and relevant binding documentation. Changes in v2: - Moved checking of DDR_ECC_INTR_SUPPORT from (1/4) to (3/4) as it is a feature of ZynqMP DDRC - The Binding Documentation in (2/4) is modified as per the review comments Changes in v3: - The commit message in (2/4) is modified (Synopsys EDAC Driver --> ZynqMP DDRC) Changes in v4: - Updated the commit message in (1/4) - Renamed function pointer names removing 'synps_' in (1/4) - Shortened unnecessary long lines as per the review comment on (1/4) Changes in v5: - Updated the commit message in (2/4) and (4/4). - Removed the unnecessary check for match data in probe() in (1/4) - Some Indentation changes for better readability in (1/4) and (3/4) - Removed repeated code in (3/4) - Used 'zynq' and 'zynqmp' instead of 'synps_enh_edac' in function names Changes in v6: - Splitted the patches according to functionalities - Addressed code style comments from v5 review - Moved the Error Injection to CONFIG_EDAC_DEBUG mode Changes in v7: - Included DTS patch (6/7) which was missed in v6 patch set Changes in v8: - patch (1/7) from v7 is split in to 3 different logically different patches 1. functional changes like code cleanup 2. functions renaming 3. comments cleanup - Added a separate patch (4) for making always successful functions as void - Corrected 'Too many parentheses' review comment in patch (5) - Corrected comments as per the v7 review feedback - Made dedicated functions for IRQ setup, IRQ enable and IRQ disable in patch (8) - Addressed review comments in patch (10) Changes in v9: - Added check for return value of of_device_get_match_data() function in (1/6). - From v8 the first 5 patches are removed in this series as they are applied on: https://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git/?h=edac-for-4.20-synps - Updated Kconfig to check for ARCH_ZYNQMP instead of ARM64 Manish Narani (6): edac: synopsys: Add error handling for NULL in probe() dt: bindings: Document ZynqMP DDRC in Synopsys documentation edac: synopsys: Add macro defines for ZynqMP DDRC edac: synopsys: Add EDAC ECC support for ZynqMP DDRC arm64: zynqmp: Add DDRC node edac: synopsys: Add Error Injection support for ZynqMP DDRC .../bindings/memory-controllers/synopsys.txt | 27 +- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 + drivers/edac/Kconfig | 2 +- drivers/edac/synopsys_edac.c | 913 - 4 files changed, 920 insertions(+), 29 deletions(-) -- 2.1.1
[PATCH v9 4/6] edac: synopsys: Add EDAC ECC support for ZynqMP DDRC
Add EDAC ECC support for ZynqMP DDRC IP. The IP supports interrupts for
corrected and uncorrected errors. Add interrupt handlers for the same.
Signed-off-by: Manish Narani
---
drivers/edac/Kconfig | 2 +-
drivers/edac/synopsys_edac.c | 324 ---
2 files changed, 308 insertions(+), 18 deletions(-)
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 57304b2..7c40eb2 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -441,7 +441,7 @@ config EDAC_ALTERA_SDMMC
config EDAC_SYNOPSYS
tristate "Synopsys DDR Memory Controller"
- depends on ARCH_ZYNQ
+ depends on ARCH_ZYNQ || ARCH_ZYNQMP
help
Support for error detection and correction on the Synopsys DDR
memory controller.
diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
index d1999e0..603c4bd 100644
--- a/drivers/edac/synopsys_edac.c
+++ b/drivers/edac/synopsys_edac.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include
@@ -272,6 +273,8 @@
* @bank: Bank number.
* @bitpos:Bit position.
* @data: Data causing the error.
+ * @bankgrpnr: Bank group number.
+ * @blknr: Block number.
*/
struct ecc_error_info {
u32 row;
@@ -279,6 +282,8 @@ struct ecc_error_info {
u32 bank;
u32 bitpos;
u32 data;
+ u32 bankgrpnr;
+ u32 blknr;
};
/**
@@ -385,6 +390,66 @@ static int zynq_get_error_info(struct synps_edac_priv
*priv)
}
/**
+ * zynqmp_get_error_info - Get the current ECC error info.
+ * @priv: DDR memory controller private instance data.
+ *
+ * Return: one if there is no error otherwise returns zero.
+ */
+static int zynqmp_get_error_info(struct synps_edac_priv *priv)
+{
+ struct synps_ecc_status *p;
+ u32 regval, clearval = 0;
+ void __iomem *base;
+
+ base = priv->baseaddr;
+ p = >stat;
+
+ regval = readl(base + ECC_STAT_OFST);
+ if (!regval)
+ return 1;
+
+ p->ce_cnt = (regval & ECC_STAT_CECNT_MASK) >> ECC_STAT_CECNT_SHIFT;
+ p->ue_cnt = (regval & ECC_STAT_UECNT_MASK) >> ECC_STAT_UECNT_SHIFT;
+ p->ceinfo.bitpos = (regval & ECC_STAT_BITNUM_MASK);
+
+ regval = readl(base + ECC_CEADDR0_OFST);
+ if (!p->ce_cnt)
+ goto ue_err;
+
+ p->ceinfo.row = (regval & ECC_CEADDR0_RW_MASK);
+ regval = readl(base + ECC_CEADDR1_OFST);
+ p->ceinfo.bank = (regval & ECC_CEADDR1_BNKNR_MASK) >>
+ ECC_CEADDR1_BNKNR_SHIFT;
+ p->ceinfo.bankgrpnr = (regval & ECC_CEADDR1_BNKGRP_MASK) >>
+ ECC_CEADDR1_BNKGRP_SHIFT;
+ p->ceinfo.blknr = (regval & ECC_CEADDR1_BLKNR_MASK);
+ p->ceinfo.data = readl(base + ECC_CSYND0_OFST);
+ edac_dbg(2, "ECCCSYN0: 0x%08X ECCCSYN1: 0x%08X ECCCSYN2: 0x%08X\n",
+readl(base + ECC_CSYND0_OFST), readl(base + ECC_CSYND1_OFST),
+readl(base + ECC_CSYND2_OFST));
+ue_err:
+ regval = readl(base + ECC_UEADDR0_OFST);
+ if (!p->ue_cnt)
+ goto out;
+
+ p->ueinfo.row = (regval & ECC_CEADDR0_RW_MASK);
+ regval = readl(base + ECC_UEADDR1_OFST);
+ p->ueinfo.bankgrpnr = (regval & ECC_CEADDR1_BNKGRP_MASK) >>
+ ECC_CEADDR1_BNKGRP_SHIFT;
+ p->ueinfo.bank = (regval & ECC_CEADDR1_BNKNR_MASK) >>
+ ECC_CEADDR1_BNKNR_SHIFT;
+ p->ueinfo.blknr = (regval & ECC_CEADDR1_BLKNR_MASK);
+ p->ueinfo.data = readl(base + ECC_UESYND0_OFST);
+out:
+ clearval = ECC_CTRL_CLR_CE_ERR | ECC_CTRL_CLR_CE_ERRCNT;
+ clearval |= ECC_CTRL_CLR_UE_ERR | ECC_CTRL_CLR_UE_ERRCNT;
+ writel(clearval, base + ECC_CLR_OFST);
+ writel(0x0, base + ECC_CLR_OFST);
+
+ return 0;
+}
+
+/**
* handle_error - Handle Correctable and Uncorrectable errors.
* @mci: EDAC memory controller instance.
* @p: Synopsys ECC status structure.
@@ -398,9 +463,25 @@ static void handle_error(struct mem_ctl_info *mci, struct
synps_ecc_status *p)
if (p->ce_cnt) {
pinf = >ceinfo;
- snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
-"DDR ECC error type :%s Row %d Bank %d Col %d ",
-"CE", pinf->row, pinf->bank, pinf->col);
+ if (!priv->p_data->quirks) {
+ snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
+"DDR ECC error type:%s Row %d Bank %d Col %d ",
+ "CE", pinf->row, pinf->bank, pinf->col);
+ snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
+"Bit Position: %d Data: 0x%08x\n",
+pinf->bitpos, pinf->data);
+ } else {
+ snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
+
[PATCH v9 6/6] edac: synopsys: Add Error Injection support for ZynqMP DDRC
Add support for Error Injection for ZynqMP DDRC IP. For injecting
errors, the Row, Column, Bank, Bank Group and Rank bits positions are
determined via Address Map registers of Synopsys DDRC.
Signed-off-by: Manish Narani
---
drivers/edac/synopsys_edac.c | 420 ++-
1 file changed, 413 insertions(+), 7 deletions(-)
diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
index 603c4bd..1f86d5e 100644
--- a/drivers/edac/synopsys_edac.c
+++ b/drivers/edac/synopsys_edac.c
@@ -302,12 +302,18 @@ struct synps_ecc_status {
/**
* struct synps_edac_priv - DDR memory controller private instance data.
- * @baseaddr: Base address of the DDR controller.
- * @message: Buffer for framing the event specific info.
- * @stat: ECC status information.
- * @p_data:Platform data.
- * @ce_cnt:Correctable Error count.
- * @ue_cnt:Uncorrectable Error count.
+ * @baseaddr: Base address of the DDR controller.
+ * @message: Buffer for framing the event specific info.
+ * @stat: ECC status information.
+ * @p_data:Platform data.
+ * @ce_cnt:Correctable Error count.
+ * @ue_cnt:Uncorrectable Error count.
+ * @poison_addr: Data poison address.
+ * @row_shift: Bit shifts for row bit.
+ * @col_shift: Bit shifts for column bit.
+ * @bank_shift:Bit shifts for bank bit.
+ * @bankgrp_shift: Bit shifts for bank group bit.
+ * @rank_shift:Bit shifts for rank bit.
*/
struct synps_edac_priv {
void __iomem *baseaddr;
@@ -316,6 +322,14 @@ struct synps_edac_priv {
const struct synps_platform_data *p_data;
u32 ce_cnt;
u32 ue_cnt;
+#ifdef CONFIG_EDAC_DEBUG
+ ulong poison_addr;
+ u32 row_shift[18];
+ u32 col_shift[14];
+ u32 bank_shift[3];
+ u32 bankgrp_shift[2];
+ u32 rank_shift[1];
+#endif
};
/**
@@ -877,7 +891,11 @@ static const struct synps_platform_data zynqmp_edac_def = {
.get_mtype = zynqmp_get_mtype,
.get_dtype = zynqmp_get_dtype,
.get_ecc_state = zynqmp_get_ecc_state,
- .quirks = DDR_ECC_INTR_SUPPORT,
+ .quirks = (DDR_ECC_INTR_SUPPORT
+#ifdef CONFIG_EDAC_DEBUG
+ | DDR_ECC_DATA_POISON_SUPPORT
+#endif
+ ),
};
static const struct of_device_id synps_edac_match[] = {
@@ -896,6 +914,375 @@ static const struct of_device_id synps_edac_match[] = {
MODULE_DEVICE_TABLE(of, synps_edac_match);
+#ifdef CONFIG_EDAC_DEBUG
+#define to_mci(k) container_of(k, struct mem_ctl_info, dev)
+
+/**
+ * ddr_poison_setup - Update poison registers.
+ * @priv: DDR memory controller private instance data.
+ *
+ * Update poison registers as per DDR mapping.
+ * Return: none.
+ */
+static void ddr_poison_setup(struct synps_edac_priv *priv)
+{
+ int col = 0, row = 0, bank = 0, bankgrp = 0, rank = 0, regval;
+ int index;
+ ulong hif_addr = 0;
+
+ hif_addr = priv->poison_addr >> 3;
+
+ for (index = 0; index < DDR_MAX_ROW_SHIFT; index++) {
+ if (priv->row_shift[index])
+ row |= (((hif_addr >> priv->row_shift[index]) &
+ BIT(0)) << index);
+ else
+ break;
+ }
+
+ for (index = 0; index < DDR_MAX_COL_SHIFT; index++) {
+ if (priv->col_shift[index] || index < 3)
+ col |= (((hif_addr >> priv->col_shift[index]) &
+ BIT(0)) << index);
+ else
+ break;
+ }
+
+ for (index = 0; index < DDR_MAX_BANK_SHIFT; index++) {
+ if (priv->bank_shift[index])
+ bank |= (((hif_addr >> priv->bank_shift[index]) &
+ BIT(0)) << index);
+ else
+ break;
+ }
+
+ for (index = 0; index < DDR_MAX_BANKGRP_SHIFT; index++) {
+ if (priv->bankgrp_shift[index])
+ bankgrp |= (((hif_addr >> priv->bankgrp_shift[index])
+ & BIT(0)) << index);
+ else
+ break;
+ }
+
+ if (priv->rank_shift[0])
+ rank = (hif_addr >> priv->rank_shift[0]) & BIT(0);
+
+ regval = (rank << ECC_POISON0_RANK_SHIFT) & ECC_POISON0_RANK_MASK;
+ regval |= (col << ECC_POISON0_COLUMN_SHIFT) & ECC_POISON0_COLUMN_MASK;
+ writel(regval, priv->baseaddr + ECC_POISON0_OFST);
+
+ regval = (bankgrp << ECC_POISON1_BG_SHIFT) & ECC_POISON1_BG_MASK;
+ regval |= (bank << ECC_POISON1_BANKNR_SHIFT) & ECC_POISON1_BANKNR_MASK;
+ regval |= (row << ECC_POISON1_ROW_SHIFT) & ECC_POISON1_ROW_MASK;
+ writel(regval, priv->baseaddr + ECC_POISON1_OFST);
+}
+
+static ssize_t
[PATCH v9 0/6] EDAC: Enhancements to Synopsys EDAC driver
This patch series enhances the current EDAC driver to support different platforms. This series adds support for ZynqMP DDRC controller in synopsys EDAC driver. This series also adds Device tree properties and relevant binding documentation. Changes in v2: - Moved checking of DDR_ECC_INTR_SUPPORT from (1/4) to (3/4) as it is a feature of ZynqMP DDRC - The Binding Documentation in (2/4) is modified as per the review comments Changes in v3: - The commit message in (2/4) is modified (Synopsys EDAC Driver --> ZynqMP DDRC) Changes in v4: - Updated the commit message in (1/4) - Renamed function pointer names removing 'synps_' in (1/4) - Shortened unnecessary long lines as per the review comment on (1/4) Changes in v5: - Updated the commit message in (2/4) and (4/4). - Removed the unnecessary check for match data in probe() in (1/4) - Some Indentation changes for better readability in (1/4) and (3/4) - Removed repeated code in (3/4) - Used 'zynq' and 'zynqmp' instead of 'synps_enh_edac' in function names Changes in v6: - Splitted the patches according to functionalities - Addressed code style comments from v5 review - Moved the Error Injection to CONFIG_EDAC_DEBUG mode Changes in v7: - Included DTS patch (6/7) which was missed in v6 patch set Changes in v8: - patch (1/7) from v7 is split in to 3 different logically different patches 1. functional changes like code cleanup 2. functions renaming 3. comments cleanup - Added a separate patch (4) for making always successful functions as void - Corrected 'Too many parentheses' review comment in patch (5) - Corrected comments as per the v7 review feedback - Made dedicated functions for IRQ setup, IRQ enable and IRQ disable in patch (8) - Addressed review comments in patch (10) Changes in v9: - Added check for return value of of_device_get_match_data() function in (1/6). - From v8 the first 5 patches are removed in this series as they are applied on: https://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git/?h=edac-for-4.20-synps - Updated Kconfig to check for ARCH_ZYNQMP instead of ARM64 Manish Narani (6): edac: synopsys: Add error handling for NULL in probe() dt: bindings: Document ZynqMP DDRC in Synopsys documentation edac: synopsys: Add macro defines for ZynqMP DDRC edac: synopsys: Add EDAC ECC support for ZynqMP DDRC arm64: zynqmp: Add DDRC node edac: synopsys: Add Error Injection support for ZynqMP DDRC .../bindings/memory-controllers/synopsys.txt | 27 +- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 + drivers/edac/Kconfig | 2 +- drivers/edac/synopsys_edac.c | 913 - 4 files changed, 920 insertions(+), 29 deletions(-) -- 2.1.1
[PATCH v9 4/6] edac: synopsys: Add EDAC ECC support for ZynqMP DDRC
Add EDAC ECC support for ZynqMP DDRC IP. The IP supports interrupts for
corrected and uncorrected errors. Add interrupt handlers for the same.
Signed-off-by: Manish Narani
---
drivers/edac/Kconfig | 2 +-
drivers/edac/synopsys_edac.c | 324 ---
2 files changed, 308 insertions(+), 18 deletions(-)
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 57304b2..7c40eb2 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -441,7 +441,7 @@ config EDAC_ALTERA_SDMMC
config EDAC_SYNOPSYS
tristate "Synopsys DDR Memory Controller"
- depends on ARCH_ZYNQ
+ depends on ARCH_ZYNQ || ARCH_ZYNQMP
help
Support for error detection and correction on the Synopsys DDR
memory controller.
diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
index d1999e0..603c4bd 100644
--- a/drivers/edac/synopsys_edac.c
+++ b/drivers/edac/synopsys_edac.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include
@@ -272,6 +273,8 @@
* @bank: Bank number.
* @bitpos:Bit position.
* @data: Data causing the error.
+ * @bankgrpnr: Bank group number.
+ * @blknr: Block number.
*/
struct ecc_error_info {
u32 row;
@@ -279,6 +282,8 @@ struct ecc_error_info {
u32 bank;
u32 bitpos;
u32 data;
+ u32 bankgrpnr;
+ u32 blknr;
};
/**
@@ -385,6 +390,66 @@ static int zynq_get_error_info(struct synps_edac_priv
*priv)
}
/**
+ * zynqmp_get_error_info - Get the current ECC error info.
+ * @priv: DDR memory controller private instance data.
+ *
+ * Return: one if there is no error otherwise returns zero.
+ */
+static int zynqmp_get_error_info(struct synps_edac_priv *priv)
+{
+ struct synps_ecc_status *p;
+ u32 regval, clearval = 0;
+ void __iomem *base;
+
+ base = priv->baseaddr;
+ p = >stat;
+
+ regval = readl(base + ECC_STAT_OFST);
+ if (!regval)
+ return 1;
+
+ p->ce_cnt = (regval & ECC_STAT_CECNT_MASK) >> ECC_STAT_CECNT_SHIFT;
+ p->ue_cnt = (regval & ECC_STAT_UECNT_MASK) >> ECC_STAT_UECNT_SHIFT;
+ p->ceinfo.bitpos = (regval & ECC_STAT_BITNUM_MASK);
+
+ regval = readl(base + ECC_CEADDR0_OFST);
+ if (!p->ce_cnt)
+ goto ue_err;
+
+ p->ceinfo.row = (regval & ECC_CEADDR0_RW_MASK);
+ regval = readl(base + ECC_CEADDR1_OFST);
+ p->ceinfo.bank = (regval & ECC_CEADDR1_BNKNR_MASK) >>
+ ECC_CEADDR1_BNKNR_SHIFT;
+ p->ceinfo.bankgrpnr = (regval & ECC_CEADDR1_BNKGRP_MASK) >>
+ ECC_CEADDR1_BNKGRP_SHIFT;
+ p->ceinfo.blknr = (regval & ECC_CEADDR1_BLKNR_MASK);
+ p->ceinfo.data = readl(base + ECC_CSYND0_OFST);
+ edac_dbg(2, "ECCCSYN0: 0x%08X ECCCSYN1: 0x%08X ECCCSYN2: 0x%08X\n",
+readl(base + ECC_CSYND0_OFST), readl(base + ECC_CSYND1_OFST),
+readl(base + ECC_CSYND2_OFST));
+ue_err:
+ regval = readl(base + ECC_UEADDR0_OFST);
+ if (!p->ue_cnt)
+ goto out;
+
+ p->ueinfo.row = (regval & ECC_CEADDR0_RW_MASK);
+ regval = readl(base + ECC_UEADDR1_OFST);
+ p->ueinfo.bankgrpnr = (regval & ECC_CEADDR1_BNKGRP_MASK) >>
+ ECC_CEADDR1_BNKGRP_SHIFT;
+ p->ueinfo.bank = (regval & ECC_CEADDR1_BNKNR_MASK) >>
+ ECC_CEADDR1_BNKNR_SHIFT;
+ p->ueinfo.blknr = (regval & ECC_CEADDR1_BLKNR_MASK);
+ p->ueinfo.data = readl(base + ECC_UESYND0_OFST);
+out:
+ clearval = ECC_CTRL_CLR_CE_ERR | ECC_CTRL_CLR_CE_ERRCNT;
+ clearval |= ECC_CTRL_CLR_UE_ERR | ECC_CTRL_CLR_UE_ERRCNT;
+ writel(clearval, base + ECC_CLR_OFST);
+ writel(0x0, base + ECC_CLR_OFST);
+
+ return 0;
+}
+
+/**
* handle_error - Handle Correctable and Uncorrectable errors.
* @mci: EDAC memory controller instance.
* @p: Synopsys ECC status structure.
@@ -398,9 +463,25 @@ static void handle_error(struct mem_ctl_info *mci, struct
synps_ecc_status *p)
if (p->ce_cnt) {
pinf = >ceinfo;
- snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
-"DDR ECC error type :%s Row %d Bank %d Col %d ",
-"CE", pinf->row, pinf->bank, pinf->col);
+ if (!priv->p_data->quirks) {
+ snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
+"DDR ECC error type:%s Row %d Bank %d Col %d ",
+ "CE", pinf->row, pinf->bank, pinf->col);
+ snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
+"Bit Position: %d Data: 0x%08x\n",
+pinf->bitpos, pinf->data);
+ } else {
+ snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
+
[PATCH v9 6/6] edac: synopsys: Add Error Injection support for ZynqMP DDRC
Add support for Error Injection for ZynqMP DDRC IP. For injecting
errors, the Row, Column, Bank, Bank Group and Rank bits positions are
determined via Address Map registers of Synopsys DDRC.
Signed-off-by: Manish Narani
---
drivers/edac/synopsys_edac.c | 420 ++-
1 file changed, 413 insertions(+), 7 deletions(-)
diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
index 603c4bd..1f86d5e 100644
--- a/drivers/edac/synopsys_edac.c
+++ b/drivers/edac/synopsys_edac.c
@@ -302,12 +302,18 @@ struct synps_ecc_status {
/**
* struct synps_edac_priv - DDR memory controller private instance data.
- * @baseaddr: Base address of the DDR controller.
- * @message: Buffer for framing the event specific info.
- * @stat: ECC status information.
- * @p_data:Platform data.
- * @ce_cnt:Correctable Error count.
- * @ue_cnt:Uncorrectable Error count.
+ * @baseaddr: Base address of the DDR controller.
+ * @message: Buffer for framing the event specific info.
+ * @stat: ECC status information.
+ * @p_data:Platform data.
+ * @ce_cnt:Correctable Error count.
+ * @ue_cnt:Uncorrectable Error count.
+ * @poison_addr: Data poison address.
+ * @row_shift: Bit shifts for row bit.
+ * @col_shift: Bit shifts for column bit.
+ * @bank_shift:Bit shifts for bank bit.
+ * @bankgrp_shift: Bit shifts for bank group bit.
+ * @rank_shift:Bit shifts for rank bit.
*/
struct synps_edac_priv {
void __iomem *baseaddr;
@@ -316,6 +322,14 @@ struct synps_edac_priv {
const struct synps_platform_data *p_data;
u32 ce_cnt;
u32 ue_cnt;
+#ifdef CONFIG_EDAC_DEBUG
+ ulong poison_addr;
+ u32 row_shift[18];
+ u32 col_shift[14];
+ u32 bank_shift[3];
+ u32 bankgrp_shift[2];
+ u32 rank_shift[1];
+#endif
};
/**
@@ -877,7 +891,11 @@ static const struct synps_platform_data zynqmp_edac_def = {
.get_mtype = zynqmp_get_mtype,
.get_dtype = zynqmp_get_dtype,
.get_ecc_state = zynqmp_get_ecc_state,
- .quirks = DDR_ECC_INTR_SUPPORT,
+ .quirks = (DDR_ECC_INTR_SUPPORT
+#ifdef CONFIG_EDAC_DEBUG
+ | DDR_ECC_DATA_POISON_SUPPORT
+#endif
+ ),
};
static const struct of_device_id synps_edac_match[] = {
@@ -896,6 +914,375 @@ static const struct of_device_id synps_edac_match[] = {
MODULE_DEVICE_TABLE(of, synps_edac_match);
+#ifdef CONFIG_EDAC_DEBUG
+#define to_mci(k) container_of(k, struct mem_ctl_info, dev)
+
+/**
+ * ddr_poison_setup - Update poison registers.
+ * @priv: DDR memory controller private instance data.
+ *
+ * Update poison registers as per DDR mapping.
+ * Return: none.
+ */
+static void ddr_poison_setup(struct synps_edac_priv *priv)
+{
+ int col = 0, row = 0, bank = 0, bankgrp = 0, rank = 0, regval;
+ int index;
+ ulong hif_addr = 0;
+
+ hif_addr = priv->poison_addr >> 3;
+
+ for (index = 0; index < DDR_MAX_ROW_SHIFT; index++) {
+ if (priv->row_shift[index])
+ row |= (((hif_addr >> priv->row_shift[index]) &
+ BIT(0)) << index);
+ else
+ break;
+ }
+
+ for (index = 0; index < DDR_MAX_COL_SHIFT; index++) {
+ if (priv->col_shift[index] || index < 3)
+ col |= (((hif_addr >> priv->col_shift[index]) &
+ BIT(0)) << index);
+ else
+ break;
+ }
+
+ for (index = 0; index < DDR_MAX_BANK_SHIFT; index++) {
+ if (priv->bank_shift[index])
+ bank |= (((hif_addr >> priv->bank_shift[index]) &
+ BIT(0)) << index);
+ else
+ break;
+ }
+
+ for (index = 0; index < DDR_MAX_BANKGRP_SHIFT; index++) {
+ if (priv->bankgrp_shift[index])
+ bankgrp |= (((hif_addr >> priv->bankgrp_shift[index])
+ & BIT(0)) << index);
+ else
+ break;
+ }
+
+ if (priv->rank_shift[0])
+ rank = (hif_addr >> priv->rank_shift[0]) & BIT(0);
+
+ regval = (rank << ECC_POISON0_RANK_SHIFT) & ECC_POISON0_RANK_MASK;
+ regval |= (col << ECC_POISON0_COLUMN_SHIFT) & ECC_POISON0_COLUMN_MASK;
+ writel(regval, priv->baseaddr + ECC_POISON0_OFST);
+
+ regval = (bankgrp << ECC_POISON1_BG_SHIFT) & ECC_POISON1_BG_MASK;
+ regval |= (bank << ECC_POISON1_BANKNR_SHIFT) & ECC_POISON1_BANKNR_MASK;
+ regval |= (row << ECC_POISON1_ROW_SHIFT) & ECC_POISON1_ROW_MASK;
+ writel(regval, priv->baseaddr + ECC_POISON1_OFST);
+}
+
+static ssize_t
[PATCH v9 3/6] edac: synopsys: Add macro defines for ZynqMP DDRC
Add macro defines for ZynqMP DDR controller. These macros will be used for ZynqMP ECC operations. Signed-off-by: Manish Narani --- drivers/edac/synopsys_edac.c | 168 +++ 1 file changed, 168 insertions(+) diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c index 0005ef3..d1999e0 100644 --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -97,6 +97,174 @@ #define SCRUB_MODE_MASK0x7 #define SCRUB_MODE_SECDED 0x4 +/* DDR ECC Quirks */ +#define DDR_ECC_INTR_SUPPORT BIT(0) +#define DDR_ECC_DATA_POISON_SUPPORTBIT(1) + +/* ZynqMP Enhanced DDR memory controller registers that are relevant to ECC */ +/* ECC Configuration Registers */ +#define ECC_CFG0_OFST 0x70 +#define ECC_CFG1_OFST 0x74 + +/* ECC Status Register */ +#define ECC_STAT_OFST 0x78 + +/* ECC Clear Register */ +#define ECC_CLR_OFST 0x7C + +/* ECC Error count Register */ +#define ECC_ERRCNT_OFST0x80 + +/* ECC Corrected Error Address Register */ +#define ECC_CEADDR0_OFST 0x84 +#define ECC_CEADDR1_OFST 0x88 + +/* ECC Syndrome Registers */ +#define ECC_CSYND0_OFST0x8C +#define ECC_CSYND1_OFST0x90 +#define ECC_CSYND2_OFST0x94 + +/* ECC Bit Mask0 Address Register */ +#define ECC_BITMASK0_OFST 0x98 +#define ECC_BITMASK1_OFST 0x9C +#define ECC_BITMASK2_OFST 0xA0 + +/* ECC UnCorrected Error Address Register */ +#define ECC_UEADDR0_OFST 0xA4 +#define ECC_UEADDR1_OFST 0xA8 + +/* ECC Syndrome Registers */ +#define ECC_UESYND0_OFST 0xAC +#define ECC_UESYND1_OFST 0xB0 +#define ECC_UESYND2_OFST 0xB4 + +/* ECC Poison Address Reg */ +#define ECC_POISON0_OFST 0xB8 +#define ECC_POISON1_OFST 0xBC + +#define ECC_ADDRMAP0_OFFSET0x200 + +/* Control register bitfield definitions */ +#define ECC_CTRL_BUSWIDTH_MASK 0x3000 +#define ECC_CTRL_BUSWIDTH_SHIFT12 +#define ECC_CTRL_CLR_CE_ERRCNT BIT(2) +#define ECC_CTRL_CLR_UE_ERRCNT BIT(3) + +/* DDR Control Register width definitions */ +#define DDRCTL_EWDTH_162 +#define DDRCTL_EWDTH_321 +#define DDRCTL_EWDTH_640 + +/* ECC status register definitions */ +#define ECC_STAT_UECNT_MASK0xF +#define ECC_STAT_UECNT_SHIFT 16 +#define ECC_STAT_CECNT_MASK0xF00 +#define ECC_STAT_CECNT_SHIFT 8 +#define ECC_STAT_BITNUM_MASK 0x7F + +/* DDR QOS Interrupt register definitions */ +#define DDR_QOS_IRQ_STAT_OFST 0x20200 +#define DDR_QOSUE_MASK 0x4 +#defineDDR_QOSCE_MASK 0x2 +#defineECC_CE_UE_INTR_MASK 0x6 +#define DDR_QOS_IRQ_EN_OFST0x20208 +#define DDR_QOS_IRQ_DB_OFST0x2020C + +/* ECC Corrected Error Register Mask and Shifts*/ +#define ECC_CEADDR0_RW_MASK0x3 +#define ECC_CEADDR0_RNK_MASK BIT(24) +#define ECC_CEADDR1_BNKGRP_MASK0x300 +#define ECC_CEADDR1_BNKNR_MASK 0x7 +#define ECC_CEADDR1_BLKNR_MASK 0xFFF +#define ECC_CEADDR1_BNKGRP_SHIFT 24 +#define ECC_CEADDR1_BNKNR_SHIFT16 + +/* ECC Poison register shifts */ +#define ECC_POISON0_RANK_SHIFT 24 +#define ECC_POISON0_RANK_MASK BIT(24) +#define ECC_POISON0_COLUMN_SHIFT 0 +#define ECC_POISON0_COLUMN_MASK0xFFF +#define ECC_POISON1_BG_SHIFT 28 +#define ECC_POISON1_BG_MASK0x3000 +#define ECC_POISON1_BANKNR_SHIFT 24 +#define ECC_POISON1_BANKNR_MASK0x700 +#define ECC_POISON1_ROW_SHIFT 0 +#define ECC_POISON1_ROW_MASK 0x3 + +/* DDR Memory type defines */ +#define MEM_TYPE_DDR3 0x1 +#define MEM_TYPE_LPDDR30x8 +#define MEM_TYPE_DDR2 0x4 +#define MEM_TYPE_DDR4 0x10 +#define MEM_TYPE_LPDDR40x20 + +/* DDRC Software control register */ +#define DDRC_SWCTL 0x320 + +/* DDRC ECC CE & UE poison mask */ +#define ECC_CEPOISON_MASK 0x3 +#define ECC_UEPOISON_MASK 0x1 + +/* DDRC Device config masks */ +#define DDRC_MSTR_CFG_MASK 0xC000 +#define DDRC_MSTR_CFG_SHIFT30 +#define DDRC_MSTR_CFG_X4_MASK 0x0 +#define DDRC_MSTR_CFG_X8_MASK 0x1 +#define DDRC_MSTR_CFG_X16_MASK 0x2 +#define DDRC_MSTR_CFG_X32_MASK 0x3 + +#define DDR_MAX_ROW_SHIFT 18 +#define DDR_MAX_COL_SHIFT 14 +#define DDR_MAX_BANK_SHIFT 3 +#define DDR_MAX_BANKGRP_SHIFT 2 + +#define
[PATCH v9 3/6] edac: synopsys: Add macro defines for ZynqMP DDRC
Add macro defines for ZynqMP DDR controller. These macros will be used for ZynqMP ECC operations. Signed-off-by: Manish Narani --- drivers/edac/synopsys_edac.c | 168 +++ 1 file changed, 168 insertions(+) diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c index 0005ef3..d1999e0 100644 --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -97,6 +97,174 @@ #define SCRUB_MODE_MASK0x7 #define SCRUB_MODE_SECDED 0x4 +/* DDR ECC Quirks */ +#define DDR_ECC_INTR_SUPPORT BIT(0) +#define DDR_ECC_DATA_POISON_SUPPORTBIT(1) + +/* ZynqMP Enhanced DDR memory controller registers that are relevant to ECC */ +/* ECC Configuration Registers */ +#define ECC_CFG0_OFST 0x70 +#define ECC_CFG1_OFST 0x74 + +/* ECC Status Register */ +#define ECC_STAT_OFST 0x78 + +/* ECC Clear Register */ +#define ECC_CLR_OFST 0x7C + +/* ECC Error count Register */ +#define ECC_ERRCNT_OFST0x80 + +/* ECC Corrected Error Address Register */ +#define ECC_CEADDR0_OFST 0x84 +#define ECC_CEADDR1_OFST 0x88 + +/* ECC Syndrome Registers */ +#define ECC_CSYND0_OFST0x8C +#define ECC_CSYND1_OFST0x90 +#define ECC_CSYND2_OFST0x94 + +/* ECC Bit Mask0 Address Register */ +#define ECC_BITMASK0_OFST 0x98 +#define ECC_BITMASK1_OFST 0x9C +#define ECC_BITMASK2_OFST 0xA0 + +/* ECC UnCorrected Error Address Register */ +#define ECC_UEADDR0_OFST 0xA4 +#define ECC_UEADDR1_OFST 0xA8 + +/* ECC Syndrome Registers */ +#define ECC_UESYND0_OFST 0xAC +#define ECC_UESYND1_OFST 0xB0 +#define ECC_UESYND2_OFST 0xB4 + +/* ECC Poison Address Reg */ +#define ECC_POISON0_OFST 0xB8 +#define ECC_POISON1_OFST 0xBC + +#define ECC_ADDRMAP0_OFFSET0x200 + +/* Control register bitfield definitions */ +#define ECC_CTRL_BUSWIDTH_MASK 0x3000 +#define ECC_CTRL_BUSWIDTH_SHIFT12 +#define ECC_CTRL_CLR_CE_ERRCNT BIT(2) +#define ECC_CTRL_CLR_UE_ERRCNT BIT(3) + +/* DDR Control Register width definitions */ +#define DDRCTL_EWDTH_162 +#define DDRCTL_EWDTH_321 +#define DDRCTL_EWDTH_640 + +/* ECC status register definitions */ +#define ECC_STAT_UECNT_MASK0xF +#define ECC_STAT_UECNT_SHIFT 16 +#define ECC_STAT_CECNT_MASK0xF00 +#define ECC_STAT_CECNT_SHIFT 8 +#define ECC_STAT_BITNUM_MASK 0x7F + +/* DDR QOS Interrupt register definitions */ +#define DDR_QOS_IRQ_STAT_OFST 0x20200 +#define DDR_QOSUE_MASK 0x4 +#defineDDR_QOSCE_MASK 0x2 +#defineECC_CE_UE_INTR_MASK 0x6 +#define DDR_QOS_IRQ_EN_OFST0x20208 +#define DDR_QOS_IRQ_DB_OFST0x2020C + +/* ECC Corrected Error Register Mask and Shifts*/ +#define ECC_CEADDR0_RW_MASK0x3 +#define ECC_CEADDR0_RNK_MASK BIT(24) +#define ECC_CEADDR1_BNKGRP_MASK0x300 +#define ECC_CEADDR1_BNKNR_MASK 0x7 +#define ECC_CEADDR1_BLKNR_MASK 0xFFF +#define ECC_CEADDR1_BNKGRP_SHIFT 24 +#define ECC_CEADDR1_BNKNR_SHIFT16 + +/* ECC Poison register shifts */ +#define ECC_POISON0_RANK_SHIFT 24 +#define ECC_POISON0_RANK_MASK BIT(24) +#define ECC_POISON0_COLUMN_SHIFT 0 +#define ECC_POISON0_COLUMN_MASK0xFFF +#define ECC_POISON1_BG_SHIFT 28 +#define ECC_POISON1_BG_MASK0x3000 +#define ECC_POISON1_BANKNR_SHIFT 24 +#define ECC_POISON1_BANKNR_MASK0x700 +#define ECC_POISON1_ROW_SHIFT 0 +#define ECC_POISON1_ROW_MASK 0x3 + +/* DDR Memory type defines */ +#define MEM_TYPE_DDR3 0x1 +#define MEM_TYPE_LPDDR30x8 +#define MEM_TYPE_DDR2 0x4 +#define MEM_TYPE_DDR4 0x10 +#define MEM_TYPE_LPDDR40x20 + +/* DDRC Software control register */ +#define DDRC_SWCTL 0x320 + +/* DDRC ECC CE & UE poison mask */ +#define ECC_CEPOISON_MASK 0x3 +#define ECC_UEPOISON_MASK 0x1 + +/* DDRC Device config masks */ +#define DDRC_MSTR_CFG_MASK 0xC000 +#define DDRC_MSTR_CFG_SHIFT30 +#define DDRC_MSTR_CFG_X4_MASK 0x0 +#define DDRC_MSTR_CFG_X8_MASK 0x1 +#define DDRC_MSTR_CFG_X16_MASK 0x2 +#define DDRC_MSTR_CFG_X32_MASK 0x3 + +#define DDR_MAX_ROW_SHIFT 18 +#define DDR_MAX_COL_SHIFT 14 +#define DDR_MAX_BANK_SHIFT 3 +#define DDR_MAX_BANKGRP_SHIFT 2 + +#define
Re: [PATCH] x86/mm: annotate no_context with UNWIND_HINTS
On Sun, Oct 14, 2018 at 08:43:18PM -0700, Andy Lutomirski wrote:
> On Sun, Oct 14, 2018 at 5:37 PM Nick Desaulniers
> wrote:
> >
> > Fixes the objtool warning:
> > arch/x86/mm/fault.o: warning: objtool: no_context()+0x220: unreachable
> > instruction
> >
> > Link: https://github.com/ClangBuiltLinux/linux/issues/204
> > Signed-off-by: Nick Desaulniers
> > ---
> > arch/x86/mm/fault.c | 6 --
> > 1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
> > index 47bebfe6efa7..057d2178fa19 100644
> > --- a/arch/x86/mm/fault.c
> > +++ b/arch/x86/mm/fault.c
> > @@ -760,9 +760,11 @@ no_context(struct pt_regs *regs, unsigned long
> > error_code,
> > * and then double-fault, though, because we're likely to
> > * break the console driver and lose most of the stack dump.
> > */
> > - asm volatile ("movq %[stack], %%rsp\n\t"
> > + asm volatile (UNWIND_HINT_SAVE
> > + "movq %[stack], %%rsp\n\t"
> > "call handle_stack_overflow\n\t"
> > - "1: jmp 1b"
> > + "1: jmp 1b\n\t"
> > + UNWIND_HINT_RESTORE
> > : ASM_CALL_CONSTRAINT
> > : "D" ("kernel stack overflow (page fault)"),
> > "S" (regs), "d" (address),
>
> NAK. Just below this snippet is unreachable();
>
> Can you reply with objtool -dr output on a problematic fault.o? Josh,
> it *looks* like annotate_unreachable() should be doing the right
> thing, but something is clearly busted.
>
> Also, shouldn't compiler-clang.h contain a reasonable definition of
> unreachable()?
>
> --Andy
Hi Andy,
Did you mean 'objdump -dr'? If so, here you go (rather long, sorry if I
should have pasted it here instead):
https://gist.github.com/nathanchance/f038bb0a6653b975bb8a4e64fcd5503e
Nathan
Re: [PATCH] x86/mm: annotate no_context with UNWIND_HINTS
On Sun, Oct 14, 2018 at 08:43:18PM -0700, Andy Lutomirski wrote:
> On Sun, Oct 14, 2018 at 5:37 PM Nick Desaulniers
> wrote:
> >
> > Fixes the objtool warning:
> > arch/x86/mm/fault.o: warning: objtool: no_context()+0x220: unreachable
> > instruction
> >
> > Link: https://github.com/ClangBuiltLinux/linux/issues/204
> > Signed-off-by: Nick Desaulniers
> > ---
> > arch/x86/mm/fault.c | 6 --
> > 1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
> > index 47bebfe6efa7..057d2178fa19 100644
> > --- a/arch/x86/mm/fault.c
> > +++ b/arch/x86/mm/fault.c
> > @@ -760,9 +760,11 @@ no_context(struct pt_regs *regs, unsigned long
> > error_code,
> > * and then double-fault, though, because we're likely to
> > * break the console driver and lose most of the stack dump.
> > */
> > - asm volatile ("movq %[stack], %%rsp\n\t"
> > + asm volatile (UNWIND_HINT_SAVE
> > + "movq %[stack], %%rsp\n\t"
> > "call handle_stack_overflow\n\t"
> > - "1: jmp 1b"
> > + "1: jmp 1b\n\t"
> > + UNWIND_HINT_RESTORE
> > : ASM_CALL_CONSTRAINT
> > : "D" ("kernel stack overflow (page fault)"),
> > "S" (regs), "d" (address),
>
> NAK. Just below this snippet is unreachable();
>
> Can you reply with objtool -dr output on a problematic fault.o? Josh,
> it *looks* like annotate_unreachable() should be doing the right
> thing, but something is clearly busted.
>
> Also, shouldn't compiler-clang.h contain a reasonable definition of
> unreachable()?
>
> --Andy
Hi Andy,
Did you mean 'objdump -dr'? If so, here you go (rather long, sorry if I
should have pasted it here instead):
https://gist.github.com/nathanchance/f038bb0a6653b975bb8a4e64fcd5503e
Nathan
net: dsa: b53: Keep CPU port as tagged in all VLANs - merge request
Hello David, The dsa b53 net driver is broken since 4.15 kernels. This patch hasn't been merged into 4.18.latest yet (is already in net.git). Can you please integrate it in 4.18.15. https://git.kernel.org/pub/scm/linux/kernel/git/davem/net.git/commit/drivers/net/dsa/b53/b53_common.c?id=ca8931948344c485569b04821d1f6bcebccd376b References: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/log/drivers/net/dsa/b53/b53_common.c?h=v4.18.14 Thank you. Ciao, Gerhard
net: dsa: b53: Keep CPU port as tagged in all VLANs - merge request
Hello David, The dsa b53 net driver is broken since 4.15 kernels. This patch hasn't been merged into 4.18.latest yet (is already in net.git). Can you please integrate it in 4.18.15. https://git.kernel.org/pub/scm/linux/kernel/git/davem/net.git/commit/drivers/net/dsa/b53/b53_common.c?id=ca8931948344c485569b04821d1f6bcebccd376b References: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/log/drivers/net/dsa/b53/b53_common.c?h=v4.18.14 Thank you. Ciao, Gerhard
[PATCH V13 4/4] dt-bindings: timer: gx6605s SOC timer
Dt-bindings doc for gx6605s SOC's system timer.
Signed-off-by: Guo Ren
Reviewed-by: Rob Herring
---
.../bindings/timer/csky,gx6605s-timer.txt | 42 ++
1 file changed, 42 insertions(+)
create mode 100644
Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt
diff --git a/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt
b/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt
new file mode 100644
index 000..6b04344
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt
@@ -0,0 +1,42 @@
+=
+gx6605s SOC Timer
+=
+
+The timer is used in gx6605s soc as system timer and the driver
+contain clk event and clk source.
+
+==
+timer node bindings definition
+==
+
+ Description: Describes gx6605s SOC timer
+
+ PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type:
+ Definition: must be "csky,gx6605s-timer"
+ - reg
+ Usage: required
+ Value type:
+ Definition: in soc from cpu view
+ - clocks
+ Usage: required
+ Value type: phandle + clock specifier cells
+ Definition: must be input clk node
+ - interrupt
+ Usage: required
+ Value type:
+ Definition: must be timer irq num defined by soc
+
+Examples:
+-
+
+ timer0: timer@20a000 {
+ compatible = "csky,gx6605s-timer";
+ reg = <0x0020a000 0x400>;
+ clocks = <_apb_clk>;
+ interrupts = <10>;
+ interrupt-parent = <>;
+ };
--
2.7.4
[PATCH V13 3/4] clocksource: add gx6605s SOC system timer
The driver is for gx6605s SOC system timer and there are two
same timers in gx6605s. We use one for clkevt and another one for
clksrc.
The timer is mmio map to access, so we need give mmio address in dts.
The counter at 0x0 offset is clock event.
The counter at 0x40 offset is clock source.
Signed-off-by: Guo Ren
Cc: Daniel Lezcano
---
Changelog:
- pass checkpatch.pl
- Add COMIPLE_TEST in Kconfig
- no cast is needed for "struct clock_event_device *ce = dev"
- remove: extra space after (u64)
- Add License and Copyright
- Use timer-of framework
- Change name with upstream feedback
- Use clksource_mmio framework
---
---
drivers/clocksource/Kconfig | 8 ++
drivers/clocksource/Makefile| 1 +
drivers/clocksource/timer-gx6605s.c | 154
3 files changed, 163 insertions(+)
create mode 100644 drivers/clocksource/timer-gx6605s.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 591c9a8..55c77e4 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -630,4 +630,12 @@ config CSKY_MP_TIMER
csky,mptimer is not only used in SMP system, it also could be used
single core system. It's not a mmio reg and it use mtcr/mfcr
instruction.
+config GX6605S_TIMER
+ bool "Gx6605s SOC system timer driver" if COMPILE_TEST
+ depends on CSKY
+ select CLKSRC_MMIO
+ select TIMER_OF
+ help
+ This option enables support for gx6605s SOC's timer.
+
endmenu
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 5ce82d3..9196331 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -80,3 +80,4 @@ obj-$(CONFIG_X86_NUMACHIP)+= numachip.o
obj-$(CONFIG_ATCPIT100_TIMER) += timer-atcpit100.o
obj-$(CONFIG_RISCV_TIMER) += riscv_timer.o
obj-$(CONFIG_CSKY_MP_TIMER)+= timer-mp-csky.o
+obj-$(CONFIG_GX6605S_TIMER)+= timer-gx6605s.o
diff --git a/drivers/clocksource/timer-gx6605s.c
b/drivers/clocksource/timer-gx6605s.c
new file mode 100644
index 000..80d0939
--- /dev/null
+++ b/drivers/clocksource/timer-gx6605s.c
@@ -0,0 +1,154 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+
+#include "timer-of.h"
+
+#define CLKSRC_OFFSET 0x40
+
+#define TIMER_STATUS 0x00
+#define TIMER_VALUE0x04
+#define TIMER_CONTRL 0x10
+#define TIMER_CONFIG 0x20
+#define TIMER_DIV 0x24
+#define TIMER_INI 0x28
+
+#define GX6605S_STATUS_CLR BIT(0)
+#define GX6605S_CONTRL_RST BIT(0)
+#define GX6605S_CONTRL_START BIT(1)
+#define GX6605S_CONFIG_EN BIT(0)
+#define GX6605S_CONFIG_IRQ_EN BIT(1)
+
+static irqreturn_t gx6605s_timer_interrupt(int irq, void *dev)
+{
+ struct clock_event_device *ce = dev;
+ void __iomem *base = timer_of_base(to_timer_of(ce));
+
+ writel_relaxed(GX6605S_STATUS_CLR, base + TIMER_STATUS);
+
+ ce->event_handler(ce);
+
+ return IRQ_HANDLED;
+}
+
+static int gx6605s_timer_set_oneshot(struct clock_event_device *ce)
+{
+ void __iomem *base = timer_of_base(to_timer_of(ce));
+
+ /* reset and stop counter */
+ writel_relaxed(GX6605S_CONTRL_RST, base + TIMER_CONTRL);
+
+ /* enable with irq and start */
+ writel_relaxed(GX6605S_CONFIG_EN | GX6605S_CONFIG_IRQ_EN,
+ base + TIMER_CONFIG);
+
+ return 0;
+}
+
+static int gx6605s_timer_set_next_event(unsigned long delta,
+ struct clock_event_device *ce)
+{
+ void __iomem *base = timer_of_base(to_timer_of(ce));
+
+ /* use reset to pause timer */
+ writel_relaxed(GX6605S_CONTRL_RST, base + TIMER_CONTRL);
+
+ /* config next timeout value */
+ writel_relaxed(ULONG_MAX - delta, base + TIMER_INI);
+ writel_relaxed(GX6605S_CONTRL_START, base + TIMER_CONTRL);
+
+ return 0;
+}
+
+static int gx6605s_timer_shutdown(struct clock_event_device *ce)
+{
+ void __iomem *base = timer_of_base(to_timer_of(ce));
+
+ writel_relaxed(0, base + TIMER_CONTRL);
+ writel_relaxed(0, base + TIMER_CONFIG);
+
+ return 0;
+}
+
+static struct timer_of to = {
+ .flags = TIMER_OF_IRQ | TIMER_OF_BASE | TIMER_OF_CLOCK,
+ .clkevt = {
+ .rating = 300,
+ .features = CLOCK_EVT_FEAT_DYNIRQ |
+ CLOCK_EVT_FEAT_ONESHOT,
+ .set_state_shutdown = gx6605s_timer_shutdown,
+ .set_state_oneshot = gx6605s_timer_set_oneshot,
+ .set_next_event = gx6605s_timer_set_next_event,
+ .cpumask= cpu_possible_mask,
+ },
+ .of_irq = {
+ .handler= gx6605s_timer_interrupt,
+ .flags = IRQF_TIMER | IRQF_IRQPOLL,
+ },
+};
+
[PATCH V13 2/4] dt-bindings: timer: C-SKY Multi-processor timer
Dt-bingdings doc for C-SKY SMP system setting.
Signed-off-by: Guo Ren
Reviewed-by: Rob Herring
---
Changelog:
- Drop the interrupt-parent.
---
---
.../devicetree/bindings/timer/csky,mptimer.txt | 42 ++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/csky,mptimer.txt
diff --git a/Documentation/devicetree/bindings/timer/csky,mptimer.txt
b/Documentation/devicetree/bindings/timer/csky,mptimer.txt
new file mode 100644
index 000..15cfec0
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/csky,mptimer.txt
@@ -0,0 +1,42 @@
+
+C-SKY Multi-processors Timer
+
+
+C-SKY multi-processors timer is designed for C-SKY SMP system and the
+regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
+
+ - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
+ - PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg.
+ - PTIM_CCVR "cr<3, 14>" Current counter value reg.
+ - PTIM_LVR "cr<6, 14>" Window value reg to triger next event.
+
+==
+timer node bindings definition
+==
+
+ Description: Describes SMP timer
+
+ PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type:
+ Definition: must be "csky,mptimer"
+ - clocks
+ Usage: required
+ Value type:
+ Definition: must be input clk node
+ - interrupts
+ Usage: required
+ Value type:
+ Definition: must be timer irq num defined by soc
+
+Examples:
+-
+
+ timer: timer {
+ compatible = "csky,mptimer";
+ clocks = <_apb_clk>;
+ interrupts = <16>;
+ interrupt-parent = <>;
+ };
--
2.7.4
[PATCH V13 3/4] clocksource: add gx6605s SOC system timer
The driver is for gx6605s SOC system timer and there are two
same timers in gx6605s. We use one for clkevt and another one for
clksrc.
The timer is mmio map to access, so we need give mmio address in dts.
The counter at 0x0 offset is clock event.
The counter at 0x40 offset is clock source.
Signed-off-by: Guo Ren
Cc: Daniel Lezcano
---
Changelog:
- pass checkpatch.pl
- Add COMIPLE_TEST in Kconfig
- no cast is needed for "struct clock_event_device *ce = dev"
- remove: extra space after (u64)
- Add License and Copyright
- Use timer-of framework
- Change name with upstream feedback
- Use clksource_mmio framework
---
---
drivers/clocksource/Kconfig | 8 ++
drivers/clocksource/Makefile| 1 +
drivers/clocksource/timer-gx6605s.c | 154
3 files changed, 163 insertions(+)
create mode 100644 drivers/clocksource/timer-gx6605s.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 591c9a8..55c77e4 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -630,4 +630,12 @@ config CSKY_MP_TIMER
csky,mptimer is not only used in SMP system, it also could be used
single core system. It's not a mmio reg and it use mtcr/mfcr
instruction.
+config GX6605S_TIMER
+ bool "Gx6605s SOC system timer driver" if COMPILE_TEST
+ depends on CSKY
+ select CLKSRC_MMIO
+ select TIMER_OF
+ help
+ This option enables support for gx6605s SOC's timer.
+
endmenu
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 5ce82d3..9196331 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -80,3 +80,4 @@ obj-$(CONFIG_X86_NUMACHIP)+= numachip.o
obj-$(CONFIG_ATCPIT100_TIMER) += timer-atcpit100.o
obj-$(CONFIG_RISCV_TIMER) += riscv_timer.o
obj-$(CONFIG_CSKY_MP_TIMER)+= timer-mp-csky.o
+obj-$(CONFIG_GX6605S_TIMER)+= timer-gx6605s.o
diff --git a/drivers/clocksource/timer-gx6605s.c
b/drivers/clocksource/timer-gx6605s.c
new file mode 100644
index 000..80d0939
--- /dev/null
+++ b/drivers/clocksource/timer-gx6605s.c
@@ -0,0 +1,154 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+
+#include "timer-of.h"
+
+#define CLKSRC_OFFSET 0x40
+
+#define TIMER_STATUS 0x00
+#define TIMER_VALUE0x04
+#define TIMER_CONTRL 0x10
+#define TIMER_CONFIG 0x20
+#define TIMER_DIV 0x24
+#define TIMER_INI 0x28
+
+#define GX6605S_STATUS_CLR BIT(0)
+#define GX6605S_CONTRL_RST BIT(0)
+#define GX6605S_CONTRL_START BIT(1)
+#define GX6605S_CONFIG_EN BIT(0)
+#define GX6605S_CONFIG_IRQ_EN BIT(1)
+
+static irqreturn_t gx6605s_timer_interrupt(int irq, void *dev)
+{
+ struct clock_event_device *ce = dev;
+ void __iomem *base = timer_of_base(to_timer_of(ce));
+
+ writel_relaxed(GX6605S_STATUS_CLR, base + TIMER_STATUS);
+
+ ce->event_handler(ce);
+
+ return IRQ_HANDLED;
+}
+
+static int gx6605s_timer_set_oneshot(struct clock_event_device *ce)
+{
+ void __iomem *base = timer_of_base(to_timer_of(ce));
+
+ /* reset and stop counter */
+ writel_relaxed(GX6605S_CONTRL_RST, base + TIMER_CONTRL);
+
+ /* enable with irq and start */
+ writel_relaxed(GX6605S_CONFIG_EN | GX6605S_CONFIG_IRQ_EN,
+ base + TIMER_CONFIG);
+
+ return 0;
+}
+
+static int gx6605s_timer_set_next_event(unsigned long delta,
+ struct clock_event_device *ce)
+{
+ void __iomem *base = timer_of_base(to_timer_of(ce));
+
+ /* use reset to pause timer */
+ writel_relaxed(GX6605S_CONTRL_RST, base + TIMER_CONTRL);
+
+ /* config next timeout value */
+ writel_relaxed(ULONG_MAX - delta, base + TIMER_INI);
+ writel_relaxed(GX6605S_CONTRL_START, base + TIMER_CONTRL);
+
+ return 0;
+}
+
+static int gx6605s_timer_shutdown(struct clock_event_device *ce)
+{
+ void __iomem *base = timer_of_base(to_timer_of(ce));
+
+ writel_relaxed(0, base + TIMER_CONTRL);
+ writel_relaxed(0, base + TIMER_CONFIG);
+
+ return 0;
+}
+
+static struct timer_of to = {
+ .flags = TIMER_OF_IRQ | TIMER_OF_BASE | TIMER_OF_CLOCK,
+ .clkevt = {
+ .rating = 300,
+ .features = CLOCK_EVT_FEAT_DYNIRQ |
+ CLOCK_EVT_FEAT_ONESHOT,
+ .set_state_shutdown = gx6605s_timer_shutdown,
+ .set_state_oneshot = gx6605s_timer_set_oneshot,
+ .set_next_event = gx6605s_timer_set_next_event,
+ .cpumask= cpu_possible_mask,
+ },
+ .of_irq = {
+ .handler= gx6605s_timer_interrupt,
+ .flags = IRQF_TIMER | IRQF_IRQPOLL,
+ },
+};
+
[PATCH V13 2/4] dt-bindings: timer: C-SKY Multi-processor timer
Dt-bingdings doc for C-SKY SMP system setting.
Signed-off-by: Guo Ren
Reviewed-by: Rob Herring
---
Changelog:
- Drop the interrupt-parent.
---
---
.../devicetree/bindings/timer/csky,mptimer.txt | 42 ++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/csky,mptimer.txt
diff --git a/Documentation/devicetree/bindings/timer/csky,mptimer.txt
b/Documentation/devicetree/bindings/timer/csky,mptimer.txt
new file mode 100644
index 000..15cfec0
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/csky,mptimer.txt
@@ -0,0 +1,42 @@
+
+C-SKY Multi-processors Timer
+
+
+C-SKY multi-processors timer is designed for C-SKY SMP system and the
+regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
+
+ - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
+ - PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg.
+ - PTIM_CCVR "cr<3, 14>" Current counter value reg.
+ - PTIM_LVR "cr<6, 14>" Window value reg to triger next event.
+
+==
+timer node bindings definition
+==
+
+ Description: Describes SMP timer
+
+ PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type:
+ Definition: must be "csky,mptimer"
+ - clocks
+ Usage: required
+ Value type:
+ Definition: must be input clk node
+ - interrupts
+ Usage: required
+ Value type:
+ Definition: must be timer irq num defined by soc
+
+Examples:
+-
+
+ timer: timer {
+ compatible = "csky,mptimer";
+ clocks = <_apb_clk>;
+ interrupts = <16>;
+ interrupt-parent = <>;
+ };
--
2.7.4
[PATCH V13 4/4] dt-bindings: timer: gx6605s SOC timer
Dt-bindings doc for gx6605s SOC's system timer.
Signed-off-by: Guo Ren
Reviewed-by: Rob Herring
---
.../bindings/timer/csky,gx6605s-timer.txt | 42 ++
1 file changed, 42 insertions(+)
create mode 100644
Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt
diff --git a/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt
b/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt
new file mode 100644
index 000..6b04344
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt
@@ -0,0 +1,42 @@
+=
+gx6605s SOC Timer
+=
+
+The timer is used in gx6605s soc as system timer and the driver
+contain clk event and clk source.
+
+==
+timer node bindings definition
+==
+
+ Description: Describes gx6605s SOC timer
+
+ PROPERTIES
+
+ - compatible
+ Usage: required
+ Value type:
+ Definition: must be "csky,gx6605s-timer"
+ - reg
+ Usage: required
+ Value type:
+ Definition: in soc from cpu view
+ - clocks
+ Usage: required
+ Value type: phandle + clock specifier cells
+ Definition: must be input clk node
+ - interrupt
+ Usage: required
+ Value type:
+ Definition: must be timer irq num defined by soc
+
+Examples:
+-
+
+ timer0: timer@20a000 {
+ compatible = "csky,gx6605s-timer";
+ reg = <0x0020a000 0x400>;
+ clocks = <_apb_clk>;
+ interrupts = <10>;
+ interrupt-parent = <>;
+ };
--
2.7.4
[PATCH V13 1/4] clocksource: add C-SKY SMP timer
The driver is for C-SKY SMP timer. It only support oneshot event
and 32bit overflow for clocksource. Per cpu core has one timer and
all timers share one clock-counter-input the same clocksource.
This use mfcr instructions to access the regs.
Signed-off-by: Guo Ren
Cc: Daniel Lezcano
---
Changelog:
- Add COMPILE_TEST
- Fixup smp boot error, cpuhp_setup_state must after timer_of_init()
- Add rollback for timer_of_cleanup.
- Use request_percpu_irq separate from time_of.
- Remove #define CPUHP_AP_CSKY_TIMER_STARTING.
- Add CPUHP_AP_CSKY_TIMER_STARTING in cpuhotplug.h.
- Support csky mp timer alpha version.
- Just use low-counter with 32bit width as clocksource.
- Coding convention with upstream feed-back.
---
---
drivers/clocksource/Kconfig | 10 +++
drivers/clocksource/Makefile| 1 +
drivers/clocksource/timer-mp-csky.c | 173
include/linux/cpuhotplug.h | 1 +
4 files changed, 185 insertions(+)
create mode 100644 drivers/clocksource/timer-mp-csky.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index a11f4ba..591c9a8 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -620,4 +620,14 @@ config RISCV_TIMER
is accessed via both the SBI and the rdcycle instruction. This is
required for all RISC-V systems.
+config CSKY_MP_TIMER
+ bool "SMP Timer for the C-SKY platform" if COMPILE_TEST
+ depends on CSKY
+ select TIMER_OF
+ help
+ Say yes here to enable C-SKY SMP timer driver used for C-SKY SMP
+ system.
+ csky,mptimer is not only used in SMP system, it also could be used
+ single core system. It's not a mmio reg and it use mtcr/mfcr
instruction.
+
endmenu
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index db51b24..5ce82d3 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -79,3 +79,4 @@ obj-$(CONFIG_CLKSRC_ST_LPC) += clksrc_st_lpc.o
obj-$(CONFIG_X86_NUMACHIP) += numachip.o
obj-$(CONFIG_ATCPIT100_TIMER) += timer-atcpit100.o
obj-$(CONFIG_RISCV_TIMER) += riscv_timer.o
+obj-$(CONFIG_CSKY_MP_TIMER)+= timer-mp-csky.o
diff --git a/drivers/clocksource/timer-mp-csky.c
b/drivers/clocksource/timer-mp-csky.c
new file mode 100644
index 000..a8acc43
--- /dev/null
+++ b/drivers/clocksource/timer-mp-csky.c
@@ -0,0 +1,173 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "timer-of.h"
+
+#define PTIM_CCVR "cr<3, 14>"
+#define PTIM_CTLR "cr<0, 14>"
+#define PTIM_LVR "cr<6, 14>"
+#define PTIM_TSR "cr<1, 14>"
+
+static int csky_mptimer_irq;
+
+static int csky_mptimer_set_next_event(unsigned long delta,
+ struct clock_event_device *ce)
+{
+ mtcr(PTIM_LVR, delta);
+
+ return 0;
+}
+
+static int csky_mptimer_shutdown(struct clock_event_device *ce)
+{
+ mtcr(PTIM_CTLR, 0);
+
+ return 0;
+}
+
+static int csky_mptimer_oneshot(struct clock_event_device *ce)
+{
+ mtcr(PTIM_CTLR, 1);
+
+ return 0;
+}
+
+static int csky_mptimer_oneshot_stopped(struct clock_event_device *ce)
+{
+ mtcr(PTIM_CTLR, 0);
+
+ return 0;
+}
+
+static DEFINE_PER_CPU(struct timer_of, csky_to) = {
+ .flags = TIMER_OF_CLOCK,
+ .clkevt = {
+ .rating = 300,
+ .features = CLOCK_EVT_FEAT_PERCPU |
+ CLOCK_EVT_FEAT_ONESHOT,
+ .set_state_shutdown = csky_mptimer_shutdown,
+ .set_state_oneshot = csky_mptimer_oneshot,
+ .set_state_oneshot_stopped = csky_mptimer_oneshot_stopped,
+ .set_next_event = csky_mptimer_set_next_event,
+ },
+};
+
+static irqreturn_t csky_timer_interrupt(int irq, void *dev)
+{
+ struct timer_of *to = this_cpu_ptr(_to);
+
+ mtcr(PTIM_TSR, 0);
+
+ to->clkevt.event_handler(>clkevt);
+
+ return IRQ_HANDLED;
+}
+
+/*
+ * clock event for percpu
+ */
+static int csky_mptimer_starting_cpu(unsigned int cpu)
+{
+ struct timer_of *to = per_cpu_ptr(_to, cpu);
+
+ to->clkevt.cpumask = cpumask_of(cpu);
+
+ clockevents_config_and_register(>clkevt, timer_of_rate(to),
+ 2, ULONG_MAX);
+
+ enable_percpu_irq(csky_mptimer_irq, 0);
+
+ return 0;
+}
+
+static int csky_mptimer_dying_cpu(unsigned int cpu)
+{
+ disable_percpu_irq(csky_mptimer_irq);
+
+ return 0;
+}
+
+/*
+ * clock source
+ */
+static u64 sched_clock_read(void)
+{
+ return (u64)mfcr(PTIM_CCVR);
+}
+
+static u64 clksrc_read(struct clocksource *c)
+{
+ return
[PATCH V13 1/4] clocksource: add C-SKY SMP timer
The driver is for C-SKY SMP timer. It only support oneshot event
and 32bit overflow for clocksource. Per cpu core has one timer and
all timers share one clock-counter-input the same clocksource.
This use mfcr instructions to access the regs.
Signed-off-by: Guo Ren
Cc: Daniel Lezcano
---
Changelog:
- Add COMPILE_TEST
- Fixup smp boot error, cpuhp_setup_state must after timer_of_init()
- Add rollback for timer_of_cleanup.
- Use request_percpu_irq separate from time_of.
- Remove #define CPUHP_AP_CSKY_TIMER_STARTING.
- Add CPUHP_AP_CSKY_TIMER_STARTING in cpuhotplug.h.
- Support csky mp timer alpha version.
- Just use low-counter with 32bit width as clocksource.
- Coding convention with upstream feed-back.
---
---
drivers/clocksource/Kconfig | 10 +++
drivers/clocksource/Makefile| 1 +
drivers/clocksource/timer-mp-csky.c | 173
include/linux/cpuhotplug.h | 1 +
4 files changed, 185 insertions(+)
create mode 100644 drivers/clocksource/timer-mp-csky.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index a11f4ba..591c9a8 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -620,4 +620,14 @@ config RISCV_TIMER
is accessed via both the SBI and the rdcycle instruction. This is
required for all RISC-V systems.
+config CSKY_MP_TIMER
+ bool "SMP Timer for the C-SKY platform" if COMPILE_TEST
+ depends on CSKY
+ select TIMER_OF
+ help
+ Say yes here to enable C-SKY SMP timer driver used for C-SKY SMP
+ system.
+ csky,mptimer is not only used in SMP system, it also could be used
+ single core system. It's not a mmio reg and it use mtcr/mfcr
instruction.
+
endmenu
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index db51b24..5ce82d3 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -79,3 +79,4 @@ obj-$(CONFIG_CLKSRC_ST_LPC) += clksrc_st_lpc.o
obj-$(CONFIG_X86_NUMACHIP) += numachip.o
obj-$(CONFIG_ATCPIT100_TIMER) += timer-atcpit100.o
obj-$(CONFIG_RISCV_TIMER) += riscv_timer.o
+obj-$(CONFIG_CSKY_MP_TIMER)+= timer-mp-csky.o
diff --git a/drivers/clocksource/timer-mp-csky.c
b/drivers/clocksource/timer-mp-csky.c
new file mode 100644
index 000..a8acc43
--- /dev/null
+++ b/drivers/clocksource/timer-mp-csky.c
@@ -0,0 +1,173 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "timer-of.h"
+
+#define PTIM_CCVR "cr<3, 14>"
+#define PTIM_CTLR "cr<0, 14>"
+#define PTIM_LVR "cr<6, 14>"
+#define PTIM_TSR "cr<1, 14>"
+
+static int csky_mptimer_irq;
+
+static int csky_mptimer_set_next_event(unsigned long delta,
+ struct clock_event_device *ce)
+{
+ mtcr(PTIM_LVR, delta);
+
+ return 0;
+}
+
+static int csky_mptimer_shutdown(struct clock_event_device *ce)
+{
+ mtcr(PTIM_CTLR, 0);
+
+ return 0;
+}
+
+static int csky_mptimer_oneshot(struct clock_event_device *ce)
+{
+ mtcr(PTIM_CTLR, 1);
+
+ return 0;
+}
+
+static int csky_mptimer_oneshot_stopped(struct clock_event_device *ce)
+{
+ mtcr(PTIM_CTLR, 0);
+
+ return 0;
+}
+
+static DEFINE_PER_CPU(struct timer_of, csky_to) = {
+ .flags = TIMER_OF_CLOCK,
+ .clkevt = {
+ .rating = 300,
+ .features = CLOCK_EVT_FEAT_PERCPU |
+ CLOCK_EVT_FEAT_ONESHOT,
+ .set_state_shutdown = csky_mptimer_shutdown,
+ .set_state_oneshot = csky_mptimer_oneshot,
+ .set_state_oneshot_stopped = csky_mptimer_oneshot_stopped,
+ .set_next_event = csky_mptimer_set_next_event,
+ },
+};
+
+static irqreturn_t csky_timer_interrupt(int irq, void *dev)
+{
+ struct timer_of *to = this_cpu_ptr(_to);
+
+ mtcr(PTIM_TSR, 0);
+
+ to->clkevt.event_handler(>clkevt);
+
+ return IRQ_HANDLED;
+}
+
+/*
+ * clock event for percpu
+ */
+static int csky_mptimer_starting_cpu(unsigned int cpu)
+{
+ struct timer_of *to = per_cpu_ptr(_to, cpu);
+
+ to->clkevt.cpumask = cpumask_of(cpu);
+
+ clockevents_config_and_register(>clkevt, timer_of_rate(to),
+ 2, ULONG_MAX);
+
+ enable_percpu_irq(csky_mptimer_irq, 0);
+
+ return 0;
+}
+
+static int csky_mptimer_dying_cpu(unsigned int cpu)
+{
+ disable_percpu_irq(csky_mptimer_irq);
+
+ return 0;
+}
+
+/*
+ * clock source
+ */
+static u64 sched_clock_read(void)
+{
+ return (u64)mfcr(PTIM_CCVR);
+}
+
+static u64 clksrc_read(struct clocksource *c)
+{
+ return
[PATCH 07/11] staging: gasket: page_table: fix comment in components_to_dev_address
From: Nick Ewalt Comments in components_to_dev_address() describing examples are inconsistent, fix these to be accurate. Signed-off-by: Nick Ewalt Signed-off-by: Todd Poynor --- drivers/staging/gasket/gasket_page_table.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/staging/gasket/gasket_page_table.c b/drivers/staging/gasket/gasket_page_table.c index a88f2ae0cee8b..ec9359576ea7c 100644 --- a/drivers/staging/gasket/gasket_page_table.c +++ b/drivers/staging/gasket/gasket_page_table.c @@ -687,13 +687,13 @@ static inline bool gasket_addr_is_simple(struct gasket_page_table *pg_tbl, * Convert (simple, page, offset) into a device address. * Examples: * Simple page 0, offset 32: - * Input (0, 0, 32), Output 0x20 + * Input (1, 0, 32), Output 0x20 * Simple page 1000, offset 511: - * Input (0, 1000, 512), Output 0x3E81FF + * Input (1, 1000, 511), Output 0x3E81FF * Extended page 0, offset 32: * Input (0, 0, 32), Output 0x800020 * Extended page 1000, offset 511: - * Input (1, 1000, 512), Output 0x8003E81FF + * Input (0, 1000, 511), Output 0x8003E81FF */ static ulong gasket_components_to_dev_address(struct gasket_page_table *pg_tbl, int is_simple, uint page_index, -- 2.19.0.605.g01d371f741-goog
[PATCH 07/11] staging: gasket: page_table: fix comment in components_to_dev_address
From: Nick Ewalt Comments in components_to_dev_address() describing examples are inconsistent, fix these to be accurate. Signed-off-by: Nick Ewalt Signed-off-by: Todd Poynor --- drivers/staging/gasket/gasket_page_table.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/staging/gasket/gasket_page_table.c b/drivers/staging/gasket/gasket_page_table.c index a88f2ae0cee8b..ec9359576ea7c 100644 --- a/drivers/staging/gasket/gasket_page_table.c +++ b/drivers/staging/gasket/gasket_page_table.c @@ -687,13 +687,13 @@ static inline bool gasket_addr_is_simple(struct gasket_page_table *pg_tbl, * Convert (simple, page, offset) into a device address. * Examples: * Simple page 0, offset 32: - * Input (0, 0, 32), Output 0x20 + * Input (1, 0, 32), Output 0x20 * Simple page 1000, offset 511: - * Input (0, 1000, 512), Output 0x3E81FF + * Input (1, 1000, 511), Output 0x3E81FF * Extended page 0, offset 32: * Input (0, 0, 32), Output 0x800020 * Extended page 1000, offset 511: - * Input (1, 1000, 512), Output 0x8003E81FF + * Input (0, 1000, 511), Output 0x8003E81FF */ static ulong gasket_components_to_dev_address(struct gasket_page_table *pg_tbl, int is_simple, uint page_index, -- 2.19.0.605.g01d371f741-goog
[PATCH 04/11] staging: gasket: page_table: remove unnecessary PTE status set to free
From: Nick Ewalt Remove unnecessary ptes[i].status update in gasket_perform_unmapping. The vaaue will be cleared in the following memset. Signed-off-by: Nick Ewalt Signed-off-by: Todd Poynor --- drivers/staging/gasket/gasket_page_table.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/staging/gasket/gasket_page_table.c b/drivers/staging/gasket/gasket_page_table.c index 985a3a93499d5..d2e115d2dba30 100644 --- a/drivers/staging/gasket/gasket_page_table.c +++ b/drivers/staging/gasket/gasket_page_table.c @@ -623,7 +623,6 @@ static void gasket_perform_unmapping(struct gasket_page_table *pg_tbl, if (gasket_release_page(ptes[i].page)) --pg_tbl->num_active_pages; } - ptes[i].status = PTE_FREE; /* and clear the PTE. */ memset([i], 0, sizeof(struct gasket_page_table_entry)); -- 2.19.0.605.g01d371f741-goog
[PATCH 11/11] staging: gasket: Update device virtual address comment
From: Nick Ewalt Add that number of page table entries and extended address bit offset are configurable. Update example virtual address format to be more consistent with typical usage. Signed-off-by: Nick Ewalt Signed-off-by: Todd Poynor --- drivers/staging/gasket/gasket_page_table.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/staging/gasket/gasket_page_table.c b/drivers/staging/gasket/gasket_page_table.c index c2fbab74194f8..5b398b7ba81d3 100644 --- a/drivers/staging/gasket/gasket_page_table.c +++ b/drivers/staging/gasket/gasket_page_table.c @@ -10,10 +10,18 @@ * * This file assumes 4kB pages throughout; can be factored out when necessary. * - * Address format is as follows: + * There is a configurable number of page table entries, as well as a + * configurable bit index for the extended address flag. Both of these are + * specified in gasket_page_table_init through the page_table_config parameter. + * + * The following example assumes: + * page_table_config->total_entries = 8192 + * page_table_config->extended_bit = 63 + * + * Address format: * Simple addresses - those whose containing pages are directly placed in the * device's address translation registers - are laid out as: - * [ 63 - 40: Unused | 39 - 28: 0 | 27 - 12: page index | 11 - 0: page offset ] + * [ 63 - 25: 0 | 24 - 12: page index | 11 - 0: page offset ] * page index: The index of the containing page in the device's address * translation registers. * page offset: The index of the address into the containing page. @@ -21,7 +29,7 @@ * Extended address - those whose containing pages are contained in a second- * level page table whose address is present in the device's address translation * registers - are laid out as: - * [ 63 - 40: Unused | 39: flag | 38 - 37: 0 | 36 - 21: dev/level 0 index | + * [ 63: flag | 62 - 34: 0 | 33 - 21: dev/level 0 index | * 20 - 12: host/level 1 index | 11 - 0: page offset ] * flag:Marker indicating that this is an extended address. Always 1. * dev index: The index of the first-level page in the device's extended -- 2.19.0.605.g01d371f741-goog
[PATCH 02/11] staging: gasket: page table: return valid error code on map fail
From: Todd Poynor Return -EINVAL on mapping failures, instead of -1, which triggers a checkpatch error. Signed-off-by: Todd Poynor --- drivers/staging/gasket/gasket_page_table.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/staging/gasket/gasket_page_table.c b/drivers/staging/gasket/gasket_page_table.c index 964146f0df526..2e1de8ad4a2c6 100644 --- a/drivers/staging/gasket/gasket_page_table.c +++ b/drivers/staging/gasket/gasket_page_table.c @@ -514,13 +514,12 @@ static int gasket_perform_mapping(struct gasket_page_table *pg_tbl, (void *)page_to_pfn(page), (void *)page_to_phys(page)); - /* clean up */ if (gasket_release_page(ptes[i].page)) --pg_tbl->num_active_pages; memset([i], 0, sizeof(struct gasket_page_table_entry)); - return -1; + return -EINVAL; } } @@ -1165,7 +1164,7 @@ int gasket_page_table_lookup_page( *ppage = NULL; *poffset = 0; mutex_unlock(_tbl->mutex); - return -1; + return -EINVAL; } /* See gasket_page_table.h for description. */ -- 2.19.0.605.g01d371f741-goog
[PATCH 08/11] staging: gasket: page_table: simplify gasket_components_to_dev_address
From: Nick Ewalt
Refactor gasket_components_to_dev_address to be faster and easier to
understand. The old implementation was unnecessarily complex and masked
the page_index for simple addresses but not extended ones. It makes the
most sense for this function to perform no such masking.
Signed-off-by: Nick Ewalt
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/gasket_page_table.c | 21 ++---
1 file changed, 2 insertions(+), 19 deletions(-)
diff --git a/drivers/staging/gasket/gasket_page_table.c
b/drivers/staging/gasket/gasket_page_table.c
index ec9359576ea7c..c2fbab74194f8 100644
--- a/drivers/staging/gasket/gasket_page_table.c
+++ b/drivers/staging/gasket/gasket_page_table.c
@@ -699,26 +699,9 @@ static ulong gasket_components_to_dev_address(struct
gasket_page_table *pg_tbl,
int is_simple, uint page_index,
uint offset)
{
- ulong lvl0_index, lvl1_index;
+ ulong dev_addr = (page_index << GASKET_SIMPLE_PAGE_SHIFT) | offset;
- if (is_simple) {
- /* Return simple addresses directly. */
- lvl0_index = page_index & (pg_tbl->config.total_entries - 1);
- return (lvl0_index << GASKET_SIMPLE_PAGE_SHIFT) | offset;
- }
-
- /*
-* This could be compressed into fewer statements, but
-* A) the compiler should optimize it
-* B) this is not slow
-* C) this is an uncommon operation
-* D) this is actually readable this way.
-*/
- lvl0_index = page_index / GASKET_PAGES_PER_SUBTABLE;
- lvl1_index = page_index & (GASKET_PAGES_PER_SUBTABLE - 1);
- return (pg_tbl)->extended_flag |
- (lvl0_index << GASKET_EXTENDED_LVL0_SHIFT) |
- (lvl1_index << GASKET_EXTENDED_LVL1_SHIFT) | offset;
+ return is_simple ? dev_addr : (pg_tbl->extended_flag | dev_addr);
}
/*
--
2.19.0.605.g01d371f741-goog
[PATCH 04/11] staging: gasket: page_table: remove unnecessary PTE status set to free
From: Nick Ewalt Remove unnecessary ptes[i].status update in gasket_perform_unmapping. The vaaue will be cleared in the following memset. Signed-off-by: Nick Ewalt Signed-off-by: Todd Poynor --- drivers/staging/gasket/gasket_page_table.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/staging/gasket/gasket_page_table.c b/drivers/staging/gasket/gasket_page_table.c index 985a3a93499d5..d2e115d2dba30 100644 --- a/drivers/staging/gasket/gasket_page_table.c +++ b/drivers/staging/gasket/gasket_page_table.c @@ -623,7 +623,6 @@ static void gasket_perform_unmapping(struct gasket_page_table *pg_tbl, if (gasket_release_page(ptes[i].page)) --pg_tbl->num_active_pages; } - ptes[i].status = PTE_FREE; /* and clear the PTE. */ memset([i], 0, sizeof(struct gasket_page_table_entry)); -- 2.19.0.605.g01d371f741-goog
[PATCH 11/11] staging: gasket: Update device virtual address comment
From: Nick Ewalt Add that number of page table entries and extended address bit offset are configurable. Update example virtual address format to be more consistent with typical usage. Signed-off-by: Nick Ewalt Signed-off-by: Todd Poynor --- drivers/staging/gasket/gasket_page_table.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/staging/gasket/gasket_page_table.c b/drivers/staging/gasket/gasket_page_table.c index c2fbab74194f8..5b398b7ba81d3 100644 --- a/drivers/staging/gasket/gasket_page_table.c +++ b/drivers/staging/gasket/gasket_page_table.c @@ -10,10 +10,18 @@ * * This file assumes 4kB pages throughout; can be factored out when necessary. * - * Address format is as follows: + * There is a configurable number of page table entries, as well as a + * configurable bit index for the extended address flag. Both of these are + * specified in gasket_page_table_init through the page_table_config parameter. + * + * The following example assumes: + * page_table_config->total_entries = 8192 + * page_table_config->extended_bit = 63 + * + * Address format: * Simple addresses - those whose containing pages are directly placed in the * device's address translation registers - are laid out as: - * [ 63 - 40: Unused | 39 - 28: 0 | 27 - 12: page index | 11 - 0: page offset ] + * [ 63 - 25: 0 | 24 - 12: page index | 11 - 0: page offset ] * page index: The index of the containing page in the device's address * translation registers. * page offset: The index of the address into the containing page. @@ -21,7 +29,7 @@ * Extended address - those whose containing pages are contained in a second- * level page table whose address is present in the device's address translation * registers - are laid out as: - * [ 63 - 40: Unused | 39: flag | 38 - 37: 0 | 36 - 21: dev/level 0 index | + * [ 63: flag | 62 - 34: 0 | 33 - 21: dev/level 0 index | * 20 - 12: host/level 1 index | 11 - 0: page offset ] * flag:Marker indicating that this is an extended address. Always 1. * dev index: The index of the first-level page in the device's extended -- 2.19.0.605.g01d371f741-goog
[PATCH 02/11] staging: gasket: page table: return valid error code on map fail
From: Todd Poynor Return -EINVAL on mapping failures, instead of -1, which triggers a checkpatch error. Signed-off-by: Todd Poynor --- drivers/staging/gasket/gasket_page_table.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/staging/gasket/gasket_page_table.c b/drivers/staging/gasket/gasket_page_table.c index 964146f0df526..2e1de8ad4a2c6 100644 --- a/drivers/staging/gasket/gasket_page_table.c +++ b/drivers/staging/gasket/gasket_page_table.c @@ -514,13 +514,12 @@ static int gasket_perform_mapping(struct gasket_page_table *pg_tbl, (void *)page_to_pfn(page), (void *)page_to_phys(page)); - /* clean up */ if (gasket_release_page(ptes[i].page)) --pg_tbl->num_active_pages; memset([i], 0, sizeof(struct gasket_page_table_entry)); - return -1; + return -EINVAL; } } @@ -1165,7 +1164,7 @@ int gasket_page_table_lookup_page( *ppage = NULL; *poffset = 0; mutex_unlock(_tbl->mutex); - return -1; + return -EINVAL; } /* See gasket_page_table.h for description. */ -- 2.19.0.605.g01d371f741-goog
[PATCH 08/11] staging: gasket: page_table: simplify gasket_components_to_dev_address
From: Nick Ewalt
Refactor gasket_components_to_dev_address to be faster and easier to
understand. The old implementation was unnecessarily complex and masked
the page_index for simple addresses but not extended ones. It makes the
most sense for this function to perform no such masking.
Signed-off-by: Nick Ewalt
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/gasket_page_table.c | 21 ++---
1 file changed, 2 insertions(+), 19 deletions(-)
diff --git a/drivers/staging/gasket/gasket_page_table.c
b/drivers/staging/gasket/gasket_page_table.c
index ec9359576ea7c..c2fbab74194f8 100644
--- a/drivers/staging/gasket/gasket_page_table.c
+++ b/drivers/staging/gasket/gasket_page_table.c
@@ -699,26 +699,9 @@ static ulong gasket_components_to_dev_address(struct
gasket_page_table *pg_tbl,
int is_simple, uint page_index,
uint offset)
{
- ulong lvl0_index, lvl1_index;
+ ulong dev_addr = (page_index << GASKET_SIMPLE_PAGE_SHIFT) | offset;
- if (is_simple) {
- /* Return simple addresses directly. */
- lvl0_index = page_index & (pg_tbl->config.total_entries - 1);
- return (lvl0_index << GASKET_SIMPLE_PAGE_SHIFT) | offset;
- }
-
- /*
-* This could be compressed into fewer statements, but
-* A) the compiler should optimize it
-* B) this is not slow
-* C) this is an uncommon operation
-* D) this is actually readable this way.
-*/
- lvl0_index = page_index / GASKET_PAGES_PER_SUBTABLE;
- lvl1_index = page_index & (GASKET_PAGES_PER_SUBTABLE - 1);
- return (pg_tbl)->extended_flag |
- (lvl0_index << GASKET_EXTENDED_LVL0_SHIFT) |
- (lvl1_index << GASKET_EXTENDED_LVL1_SHIFT) | offset;
+ return is_simple ? dev_addr : (pg_tbl->extended_flag | dev_addr);
}
/*
--
2.19.0.605.g01d371f741-goog
[PATCH 01/11] staging: gasket: core: debug log updates
From: Todd Poynor
Add debug logs for device enable/disable events, remove logs for
callbacks (the called functions can generate their own logs if needed).
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/gasket_core.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/staging/gasket/gasket_core.c
b/drivers/staging/gasket/gasket_core.c
index f230bec76ae4e..62a7515915e59 100644
--- a/drivers/staging/gasket/gasket_core.c
+++ b/drivers/staging/gasket/gasket_core.c
@@ -109,8 +109,6 @@ check_and_invoke_callback(struct gasket_dev *gasket_dev,
{
int ret = 0;
- dev_dbg(gasket_dev->dev, "check_and_invoke_callback %p\n",
- cb_function);
if (cb_function) {
mutex_lock(_dev->mutex);
ret = cb_function(gasket_dev);
@@ -126,11 +124,8 @@ gasket_check_and_invoke_callback_nolock(struct gasket_dev
*gasket_dev,
{
int ret = 0;
- if (cb_function) {
- dev_dbg(gasket_dev->dev,
- "Invoking device-specific callback.\n");
+ if (cb_function)
ret = cb_function(gasket_dev);
- }
return ret;
}
@@ -633,6 +628,7 @@ void gasket_disable_device(struct gasket_dev *gasket_dev)
gasket_dev->internal_desc->driver_desc;
int i;
+ dev_dbg(gasket_dev->dev, "disabling device\n");
/* Only delete the device if it has been successfully added. */
if (gasket_dev->dev_info.cdev_added)
cdev_del(_dev->dev_info.cdev);
@@ -1357,6 +1353,7 @@ int gasket_enable_device(struct gasket_dev *gasket_dev)
const struct gasket_driver_desc *driver_desc =
gasket_dev->internal_desc->driver_desc;
+ dev_dbg(gasket_dev->dev, "enabling device\n");
ret = gasket_interrupt_init(gasket_dev);
if (ret) {
dev_err(gasket_dev->dev,
--
2.19.0.605.g01d371f741-goog
[PATCH 09/11] staging: gasket: apex: fix sysfs_show
From: Nick Ewalt
sysfs_show was incorrectly extracting the sysfs_attribute_type from the
gasket_sysfs_attribute. This prevented dispatch from working properly.
Signed-off-by: Nick Ewalt
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/apex_driver.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/gasket/apex_driver.c
b/drivers/staging/gasket/apex_driver.c
index 6dca3b177863c..3c7a13a4798ef 100644
--- a/drivers/staging/gasket/apex_driver.c
+++ b/drivers/staging/gasket/apex_driver.c
@@ -526,7 +526,7 @@ static ssize_t sysfs_show(struct device *device, struct
device_attribute *attr,
return -ENODEV;
}
- type = (enum sysfs_attribute_type)gasket_sysfs_get_attr(device, attr);
+ type = (enum sysfs_attribute_type)gasket_attr->data.attr_type;
switch (type) {
case ATTR_KERNEL_HIB_PAGE_TABLE_SIZE:
ret = scnprintf(buf, PAGE_SIZE, "%u\n",
--
2.19.0.605.g01d371f741-goog
[PATCH 03/11] staging: gasket: page table: remove dead code in coherent mem alloc
From: Todd Poynor
gasket_alloc_coherent_memory() has some unnecessary code related to out
of memory checking that will never hit the condition checked, remove.
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/gasket_page_table.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/staging/gasket/gasket_page_table.c
b/drivers/staging/gasket/gasket_page_table.c
index 2e1de8ad4a2c6..985a3a93499d5 100644
--- a/drivers/staging/gasket/gasket_page_table.c
+++ b/drivers/staging/gasket/gasket_page_table.c
@@ -1316,7 +1316,6 @@ int gasket_alloc_coherent_memory(struct gasket_dev
*gasket_dev, u64 size,
GFP_KERNEL);
if (!gasket_dev->page_table[index]->coherent_pages)
goto nomem;
- *dma_address = 0;
gasket_dev->coherent_buffer.length_bytes =
PAGE_SIZE * (num_pages);
@@ -1331,15 +1330,12 @@ int gasket_alloc_coherent_memory(struct gasket_dev
*gasket_dev, u64 size,
(u64)mem + j * PAGE_SIZE;
}
- if (*dma_address == 0)
- goto nomem;
return 0;
nomem:
- if (mem) {
+ if (mem)
dma_free_coherent(gasket_get_device(gasket_dev),
num_pages * PAGE_SIZE, mem, handle);
- }
kfree(gasket_dev->page_table[index]->coherent_pages);
gasket_dev->page_table[index]->coherent_pages = NULL;
--
2.19.0.605.g01d371f741-goog
[PATCH 06/11] staging: gasket: page table: fixup error path allocating coherent mem
From: Nick Ewalt
Correctly clean up data structure state in gasket_alloc_coherent_memory
error path, to ensure no double free on the stale pointer value.
Signed-off-by: Nick Ewalt
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/gasket_page_table.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/gasket/gasket_page_table.c
b/drivers/staging/gasket/gasket_page_table.c
index 9c2f8671216b5..a88f2ae0cee8b 100644
--- a/drivers/staging/gasket/gasket_page_table.c
+++ b/drivers/staging/gasket/gasket_page_table.c
@@ -1332,9 +1332,13 @@ int gasket_alloc_coherent_memory(struct gasket_dev
*gasket_dev, u64 size,
return 0;
nomem:
- if (mem)
+ if (mem) {
dma_free_coherent(gasket_get_device(gasket_dev),
num_pages * PAGE_SIZE, mem, handle);
+ gasket_dev->coherent_buffer.length_bytes = 0;
+ gasket_dev->coherent_buffer.virt_base = NULL;
+ gasket_dev->coherent_buffer.phys_base = 0;
+ }
kfree(gasket_dev->page_table[index]->coherent_pages);
gasket_dev->page_table[index]->coherent_pages = NULL;
--
2.19.0.605.g01d371f741-goog
[PATCH 00/11] staging: gasket: fixes
From: Todd Poynor Various fixes for gasket/apex drivers. Nick Ewalt (8): staging: gasket: page_table: remove unnecessary PTE status set to free staging: gasket: page_table: rearrange gasket_page_table_entry staging: gasket: page table: fixup error path allocating coherent mem staging: gasket: page_table: fix comment in components_to_dev_address staging: gasket: page_table: simplify gasket_components_to_dev_address staging: gasket: apex: fix sysfs_show staging: gasket: sysfs: fix attribute release comment staging: gasket: Update device virtual address comment Todd Poynor (3): staging: gasket: core: debug log updates staging: gasket: page table: return valid error code on map fail staging: gasket: page table: remove dead code in coherent mem alloc drivers/staging/gasket/apex_driver.c | 2 +- drivers/staging/gasket/gasket_core.c | 9 +-- drivers/staging/gasket/gasket_page_table.c | 65 +- drivers/staging/gasket/gasket_sysfs.h | 4 +- 4 files changed, 33 insertions(+), 47 deletions(-) -- 2.19.0.605.g01d371f741-goog
[PATCH 01/11] staging: gasket: core: debug log updates
From: Todd Poynor
Add debug logs for device enable/disable events, remove logs for
callbacks (the called functions can generate their own logs if needed).
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/gasket_core.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/staging/gasket/gasket_core.c
b/drivers/staging/gasket/gasket_core.c
index f230bec76ae4e..62a7515915e59 100644
--- a/drivers/staging/gasket/gasket_core.c
+++ b/drivers/staging/gasket/gasket_core.c
@@ -109,8 +109,6 @@ check_and_invoke_callback(struct gasket_dev *gasket_dev,
{
int ret = 0;
- dev_dbg(gasket_dev->dev, "check_and_invoke_callback %p\n",
- cb_function);
if (cb_function) {
mutex_lock(_dev->mutex);
ret = cb_function(gasket_dev);
@@ -126,11 +124,8 @@ gasket_check_and_invoke_callback_nolock(struct gasket_dev
*gasket_dev,
{
int ret = 0;
- if (cb_function) {
- dev_dbg(gasket_dev->dev,
- "Invoking device-specific callback.\n");
+ if (cb_function)
ret = cb_function(gasket_dev);
- }
return ret;
}
@@ -633,6 +628,7 @@ void gasket_disable_device(struct gasket_dev *gasket_dev)
gasket_dev->internal_desc->driver_desc;
int i;
+ dev_dbg(gasket_dev->dev, "disabling device\n");
/* Only delete the device if it has been successfully added. */
if (gasket_dev->dev_info.cdev_added)
cdev_del(_dev->dev_info.cdev);
@@ -1357,6 +1353,7 @@ int gasket_enable_device(struct gasket_dev *gasket_dev)
const struct gasket_driver_desc *driver_desc =
gasket_dev->internal_desc->driver_desc;
+ dev_dbg(gasket_dev->dev, "enabling device\n");
ret = gasket_interrupt_init(gasket_dev);
if (ret) {
dev_err(gasket_dev->dev,
--
2.19.0.605.g01d371f741-goog
[PATCH 09/11] staging: gasket: apex: fix sysfs_show
From: Nick Ewalt
sysfs_show was incorrectly extracting the sysfs_attribute_type from the
gasket_sysfs_attribute. This prevented dispatch from working properly.
Signed-off-by: Nick Ewalt
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/apex_driver.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/gasket/apex_driver.c
b/drivers/staging/gasket/apex_driver.c
index 6dca3b177863c..3c7a13a4798ef 100644
--- a/drivers/staging/gasket/apex_driver.c
+++ b/drivers/staging/gasket/apex_driver.c
@@ -526,7 +526,7 @@ static ssize_t sysfs_show(struct device *device, struct
device_attribute *attr,
return -ENODEV;
}
- type = (enum sysfs_attribute_type)gasket_sysfs_get_attr(device, attr);
+ type = (enum sysfs_attribute_type)gasket_attr->data.attr_type;
switch (type) {
case ATTR_KERNEL_HIB_PAGE_TABLE_SIZE:
ret = scnprintf(buf, PAGE_SIZE, "%u\n",
--
2.19.0.605.g01d371f741-goog
[PATCH 03/11] staging: gasket: page table: remove dead code in coherent mem alloc
From: Todd Poynor
gasket_alloc_coherent_memory() has some unnecessary code related to out
of memory checking that will never hit the condition checked, remove.
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/gasket_page_table.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/staging/gasket/gasket_page_table.c
b/drivers/staging/gasket/gasket_page_table.c
index 2e1de8ad4a2c6..985a3a93499d5 100644
--- a/drivers/staging/gasket/gasket_page_table.c
+++ b/drivers/staging/gasket/gasket_page_table.c
@@ -1316,7 +1316,6 @@ int gasket_alloc_coherent_memory(struct gasket_dev
*gasket_dev, u64 size,
GFP_KERNEL);
if (!gasket_dev->page_table[index]->coherent_pages)
goto nomem;
- *dma_address = 0;
gasket_dev->coherent_buffer.length_bytes =
PAGE_SIZE * (num_pages);
@@ -1331,15 +1330,12 @@ int gasket_alloc_coherent_memory(struct gasket_dev
*gasket_dev, u64 size,
(u64)mem + j * PAGE_SIZE;
}
- if (*dma_address == 0)
- goto nomem;
return 0;
nomem:
- if (mem) {
+ if (mem)
dma_free_coherent(gasket_get_device(gasket_dev),
num_pages * PAGE_SIZE, mem, handle);
- }
kfree(gasket_dev->page_table[index]->coherent_pages);
gasket_dev->page_table[index]->coherent_pages = NULL;
--
2.19.0.605.g01d371f741-goog
[PATCH 06/11] staging: gasket: page table: fixup error path allocating coherent mem
From: Nick Ewalt
Correctly clean up data structure state in gasket_alloc_coherent_memory
error path, to ensure no double free on the stale pointer value.
Signed-off-by: Nick Ewalt
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/gasket_page_table.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/gasket/gasket_page_table.c
b/drivers/staging/gasket/gasket_page_table.c
index 9c2f8671216b5..a88f2ae0cee8b 100644
--- a/drivers/staging/gasket/gasket_page_table.c
+++ b/drivers/staging/gasket/gasket_page_table.c
@@ -1332,9 +1332,13 @@ int gasket_alloc_coherent_memory(struct gasket_dev
*gasket_dev, u64 size,
return 0;
nomem:
- if (mem)
+ if (mem) {
dma_free_coherent(gasket_get_device(gasket_dev),
num_pages * PAGE_SIZE, mem, handle);
+ gasket_dev->coherent_buffer.length_bytes = 0;
+ gasket_dev->coherent_buffer.virt_base = NULL;
+ gasket_dev->coherent_buffer.phys_base = 0;
+ }
kfree(gasket_dev->page_table[index]->coherent_pages);
gasket_dev->page_table[index]->coherent_pages = NULL;
--
2.19.0.605.g01d371f741-goog
[PATCH 00/11] staging: gasket: fixes
From: Todd Poynor Various fixes for gasket/apex drivers. Nick Ewalt (8): staging: gasket: page_table: remove unnecessary PTE status set to free staging: gasket: page_table: rearrange gasket_page_table_entry staging: gasket: page table: fixup error path allocating coherent mem staging: gasket: page_table: fix comment in components_to_dev_address staging: gasket: page_table: simplify gasket_components_to_dev_address staging: gasket: apex: fix sysfs_show staging: gasket: sysfs: fix attribute release comment staging: gasket: Update device virtual address comment Todd Poynor (3): staging: gasket: core: debug log updates staging: gasket: page table: return valid error code on map fail staging: gasket: page table: remove dead code in coherent mem alloc drivers/staging/gasket/apex_driver.c | 2 +- drivers/staging/gasket/gasket_core.c | 9 +-- drivers/staging/gasket/gasket_page_table.c | 65 +- drivers/staging/gasket/gasket_sysfs.h | 4 +- 4 files changed, 33 insertions(+), 47 deletions(-) -- 2.19.0.605.g01d371f741-goog
[PATCH 10/11] staging: gasket: sysfs: fix attribute release comment
From: Nick Ewalt Comments for gasket_sysfs_get_attr() incorrectly describe reference release procedure. Signed-off-by: Nick Ewalt Signed-off-by: Todd Poynor --- drivers/staging/gasket/gasket_sysfs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/gasket/gasket_sysfs.h b/drivers/staging/gasket/gasket_sysfs.h index f32eaf89e056b..151e8edd28ea6 100644 --- a/drivers/staging/gasket/gasket_sysfs.h +++ b/drivers/staging/gasket/gasket_sysfs.h @@ -152,8 +152,8 @@ void gasket_sysfs_put_device_data(struct device *device, * Returns the Gasket sysfs attribute associated with the kernel device * attribute and device structure itself. Upon success, this call will take a * reference to internal sysfs data that must be released with a call to - * gasket_sysfs_get_device_data. While this reference is held, the underlying - * device sysfs information/structure will remain valid/will not be deleted. + * gasket_sysfs_put_attr. While this reference is held, the underlying device + * sysfs information/structure will remain valid/will not be deleted. */ struct gasket_sysfs_attribute * gasket_sysfs_get_attr(struct device *device, struct device_attribute *attr); -- 2.19.0.605.g01d371f741-goog
[PATCH 05/11] staging: gasket: page_table: rearrange gasket_page_table_entry
From: Nick Ewalt
Rearrange gasket_page_table entry to reduce padding slop.
Signed-off-by: Nick Ewalt
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/gasket_page_table.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/staging/gasket/gasket_page_table.c
b/drivers/staging/gasket/gasket_page_table.c
index d2e115d2dba30..9c2f8671216b5 100644
--- a/drivers/staging/gasket/gasket_page_table.c
+++ b/drivers/staging/gasket/gasket_page_table.c
@@ -103,12 +103,6 @@ struct gasket_page_table_entry {
/* The status of this entry/slot: free or in use. */
enum pte_status status;
- /* Address of the page in DMA space. */
- dma_addr_t dma_addr;
-
- /* Linux page descriptor for the page described by this structure. */
- struct page *page;
-
/*
* Index for alignment into host vaddrs.
* When a user specifies a host address for a mapping, that address may
@@ -119,6 +113,12 @@ struct gasket_page_table_entry {
*/
int offset;
+ /* Address of the page in DMA space. */
+ dma_addr_t dma_addr;
+
+ /* Linux page descriptor for the page described by this structure. */
+ struct page *page;
+
/*
* If this is an extended and first-level entry, sublevel points
* to the second-level entries underneath this entry.
--
2.19.0.605.g01d371f741-goog
[PATCH 10/11] staging: gasket: sysfs: fix attribute release comment
From: Nick Ewalt Comments for gasket_sysfs_get_attr() incorrectly describe reference release procedure. Signed-off-by: Nick Ewalt Signed-off-by: Todd Poynor --- drivers/staging/gasket/gasket_sysfs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/gasket/gasket_sysfs.h b/drivers/staging/gasket/gasket_sysfs.h index f32eaf89e056b..151e8edd28ea6 100644 --- a/drivers/staging/gasket/gasket_sysfs.h +++ b/drivers/staging/gasket/gasket_sysfs.h @@ -152,8 +152,8 @@ void gasket_sysfs_put_device_data(struct device *device, * Returns the Gasket sysfs attribute associated with the kernel device * attribute and device structure itself. Upon success, this call will take a * reference to internal sysfs data that must be released with a call to - * gasket_sysfs_get_device_data. While this reference is held, the underlying - * device sysfs information/structure will remain valid/will not be deleted. + * gasket_sysfs_put_attr. While this reference is held, the underlying device + * sysfs information/structure will remain valid/will not be deleted. */ struct gasket_sysfs_attribute * gasket_sysfs_get_attr(struct device *device, struct device_attribute *attr); -- 2.19.0.605.g01d371f741-goog
[PATCH 05/11] staging: gasket: page_table: rearrange gasket_page_table_entry
From: Nick Ewalt
Rearrange gasket_page_table entry to reduce padding slop.
Signed-off-by: Nick Ewalt
Signed-off-by: Todd Poynor
---
drivers/staging/gasket/gasket_page_table.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/staging/gasket/gasket_page_table.c
b/drivers/staging/gasket/gasket_page_table.c
index d2e115d2dba30..9c2f8671216b5 100644
--- a/drivers/staging/gasket/gasket_page_table.c
+++ b/drivers/staging/gasket/gasket_page_table.c
@@ -103,12 +103,6 @@ struct gasket_page_table_entry {
/* The status of this entry/slot: free or in use. */
enum pte_status status;
- /* Address of the page in DMA space. */
- dma_addr_t dma_addr;
-
- /* Linux page descriptor for the page described by this structure. */
- struct page *page;
-
/*
* Index for alignment into host vaddrs.
* When a user specifies a host address for a mapping, that address may
@@ -119,6 +113,12 @@ struct gasket_page_table_entry {
*/
int offset;
+ /* Address of the page in DMA space. */
+ dma_addr_t dma_addr;
+
+ /* Linux page descriptor for the page described by this structure. */
+ struct page *page;
+
/*
* If this is an extended and first-level entry, sublevel points
* to the second-level entries underneath this entry.
--
2.19.0.605.g01d371f741-goog
Re: [PATCH 1/2] sysctl: add overflow detection to proc_get_long()
On October 15, 2018 2:03:10 AM GMT+02:00, Al Viro
wrote:
>On Sun, Oct 14, 2018 at 08:53:46PM +0200, Christian Brauner wrote:
>
>> > Yecchh... First of all, the cast back to unsigned long long is
>completely
>> > pointless. What's more,
>>
>> Sorry, seriously asking: why? This was meant to handle the case where
>> sizeof(unsigned long long) != sizeof(unsigned long) and I just looked
>at
>> _kstrtoul() which does the same:
>>
>> int _kstrtoul(const char *s, unsigned int base, unsigned long *res)
>> {
>> unsigned long long tmp;
>> int rv;
>>
>> rv = kstrtoull(s, base, );
>> if (rv < 0)
>> return rv;
>> if (tmp != (unsigned long long)(unsigned long)tmp)
>> return -ERANGE;
>> *res = tmp;
>> return 0;
>> }
>>
>> Sorry, if I'm being dense here.
>
>C quiz:
> given that type of e1 is unsigned long long and type of e2 -
>unsigned long, what conversions are going to happen in e1 == e2?
Yeah, I know that.
As I said in my reply to Alexey before: I
thought you were saying the whole right
side of the disjunction was not needed.
I also do like the explicit recast and
followed what all of the other kstr*()
functions are doing.
Alexey sent a fix for all of them just
a few hours ago [1] which - imho - is
really not necessary. There's no harm
done by this and it's a fairly widely used
pattern.
That being said, happy to remove the
second explicit cast.
[1]: https://lkml.org/lkml/2018/10/15/22
>
>[relevant part of C standard: 6.5.9 (Equality operators),
>6.3.1.8 (Usual arithmetic conversions)]
Re: [PATCH 1/2] sysctl: add overflow detection to proc_get_long()
On October 15, 2018 2:03:10 AM GMT+02:00, Al Viro
wrote:
>On Sun, Oct 14, 2018 at 08:53:46PM +0200, Christian Brauner wrote:
>
>> > Yecchh... First of all, the cast back to unsigned long long is
>completely
>> > pointless. What's more,
>>
>> Sorry, seriously asking: why? This was meant to handle the case where
>> sizeof(unsigned long long) != sizeof(unsigned long) and I just looked
>at
>> _kstrtoul() which does the same:
>>
>> int _kstrtoul(const char *s, unsigned int base, unsigned long *res)
>> {
>> unsigned long long tmp;
>> int rv;
>>
>> rv = kstrtoull(s, base, );
>> if (rv < 0)
>> return rv;
>> if (tmp != (unsigned long long)(unsigned long)tmp)
>> return -ERANGE;
>> *res = tmp;
>> return 0;
>> }
>>
>> Sorry, if I'm being dense here.
>
>C quiz:
> given that type of e1 is unsigned long long and type of e2 -
>unsigned long, what conversions are going to happen in e1 == e2?
Yeah, I know that.
As I said in my reply to Alexey before: I
thought you were saying the whole right
side of the disjunction was not needed.
I also do like the explicit recast and
followed what all of the other kstr*()
functions are doing.
Alexey sent a fix for all of them just
a few hours ago [1] which - imho - is
really not necessary. There's no harm
done by this and it's a fairly widely used
pattern.
That being said, happy to remove the
second explicit cast.
[1]: https://lkml.org/lkml/2018/10/15/22
>
>[relevant part of C standard: 6.5.9 (Equality operators),
>6.3.1.8 (Usual arithmetic conversions)]
Re: linux-next: manual merge of the userns tree with the tip tree
Hi all,
On Mon, 15 Oct 2018 15:11:59 +1100 Stephen Rothwell
wrote:
>
> Today's linux-next merge of the userns tree got a conflict in:
>
> arch/x86/mm/fault.c
>
> between commit:
>
> 164477c2331b ("x86/mm: Clarify hardware vs. software "error_code"")
> (and others from that series)
>
> from the tip tree and commits:
>
> 768fd9c69bb5 ("signal/x86: Remove pkey parameter from bad_area_nosemaphore")
> 25c102d803ea ("signal/x86: Remove pkey parameter from mm_fault_error")
>
> from the userns tree.
>
> I fixed it up (I think - see below) and can carry the fix as
> necessary. This is now fixed as far as linux-next is concerned, but any
> non trivial conflicts should be mentioned to your upstream maintainer
> when your tree is submitted for merging. You may also want to consider
> cooperating with the maintainer of the conflicting tree to minimise any
> particularly complex conflicts.
>
> --
> Cheers,
> Stephen Rothwell
>
> diff --cc arch/x86/mm/fault.c
> index c2e3e5127ebc,8d77700a7883..
> --- a/arch/x86/mm/fault.c
> +++ b/arch/x86/mm/fault.c
> +/* Handle faults in the user portion of the address space */
> +static inline
> +void do_user_addr_fault(struct pt_regs *regs,
> +unsigned long hw_error_code,
> +unsigned long address)
> +{
> +unsigned long sw_error_code;
> +struct vm_area_struct *vma;
> +struct task_struct *tsk;
> +struct mm_struct *mm;
> +vm_fault_t fault, major = 0;
> +unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
> +u32 pkey;
I missed removing the above line.
--
Cheers,
Stephen Rothwell
pgpyWC9PVw9ze.pgp
Description: OpenPGP digital signature
Re: linux-next: manual merge of the userns tree with the tip tree
Hi all,
On Mon, 15 Oct 2018 15:11:59 +1100 Stephen Rothwell
wrote:
>
> Today's linux-next merge of the userns tree got a conflict in:
>
> arch/x86/mm/fault.c
>
> between commit:
>
> 164477c2331b ("x86/mm: Clarify hardware vs. software "error_code"")
> (and others from that series)
>
> from the tip tree and commits:
>
> 768fd9c69bb5 ("signal/x86: Remove pkey parameter from bad_area_nosemaphore")
> 25c102d803ea ("signal/x86: Remove pkey parameter from mm_fault_error")
>
> from the userns tree.
>
> I fixed it up (I think - see below) and can carry the fix as
> necessary. This is now fixed as far as linux-next is concerned, but any
> non trivial conflicts should be mentioned to your upstream maintainer
> when your tree is submitted for merging. You may also want to consider
> cooperating with the maintainer of the conflicting tree to minimise any
> particularly complex conflicts.
>
> --
> Cheers,
> Stephen Rothwell
>
> diff --cc arch/x86/mm/fault.c
> index c2e3e5127ebc,8d77700a7883..
> --- a/arch/x86/mm/fault.c
> +++ b/arch/x86/mm/fault.c
> +/* Handle faults in the user portion of the address space */
> +static inline
> +void do_user_addr_fault(struct pt_regs *regs,
> +unsigned long hw_error_code,
> +unsigned long address)
> +{
> +unsigned long sw_error_code;
> +struct vm_area_struct *vma;
> +struct task_struct *tsk;
> +struct mm_struct *mm;
> +vm_fault_t fault, major = 0;
> +unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
> +u32 pkey;
I missed removing the above line.
--
Cheers,
Stephen Rothwell
pgpyWC9PVw9ze.pgp
Description: OpenPGP digital signature
RE: issues with suspend on Dell XPS 13 2-in-1
> El vie, 12-10-2018 a las 17:46 +, mario.limoncie...@dell.com
> escribió:
> > > -Original Message-
> > > From: Dennis Gilmore
> > > Sent: Friday, October 12, 2018 8:39 AM
> > > To: Pandruvada, Srinivas
> > > Cc: linux-kernel@vger.kernel.org; linux-a...@vger.kernel.org;
> > > Limonciello, Mario
> > > Subject: Re: issues with suspend on Dell XPS 13 2-in-1
> > >
> >
> > It appears I'm being added to this thread late. Can you give me some
> > more context?
> > Which XPS 2-in-1 is this (model number)? And what are the issues?
> >
> > I'm "guessing" high power consumption over S2I?
>
> Sorry we had a discussion back in April about high power consumption
> when suspending. The conversation stopped when the debugging steps did
> not work. Which turns out to be due to secure boot. I have just dealt
> with it by shutting down, but as I am currently travelling it annoyed
> me enough to try and figure out what is happening again. I have a 9635
> and esentially I get the same battery use regardless of if I suspend or
> not.
>
> Dennis
>
I see.
Can you remove those patches for now and perform those debugging steps?
>
> > >
> > > El jue, 26-04-2018 a las 15:09 +, Pandruvada, Srinivas
> > > escribió:
> > > > On Thu, 2018-04-26 at 07:42 -0500, Dennis Gilmore wrote:
> > > > > Hi Srinivas,
> > > > >
> > > > > El jue, 26-04-2018 a las 05:34 +, Pandruvada, Srinivas
> > > > > escribió:
> > > > > > Hi Dennis,
> > > > > >
> > > > > > On Wed, 2018-04-25 at 22:06 -0500, Dennis Gilmore wrote:
> > > > > > > Hi Srinivas,
> > > > > > >
> > > > > > > Yes I have latest bios, I have version 1.3.1 that was
> > > > > > > released
> > > > > > > on
> > > > > > > 18th
> > > > > > > of Feb.
> > > > > >
> > > > > > Can you try these commands and repeat the test?
> > > > > >
> > > > > > # cd /sys/kernel/debug/pmc_core/
> > > > > > # for i in {0..32}; do echo $i > ltr_ignore; done
> > > > >
> > > > > # for i in {0..32}; do echo $i > ltr_ignore; done
> > > > > -bash: ltr_ignore: Operación no permitida
> > >
> > > After some digging i figured out that the patches fedora has for
> > > secureboot caused the access to ltr_ignore to not work.
> > >
> >
> > If you are trying to debug high power consumption and those patches
> > are causing
> > problems, can you please remove those patches?
> >
> > LTR ignoring is an important debugging tactic to find problems with
> > S2I consuming
> > too much power.
> >
> > Additionally if you can read
> > /sys/kernel/debug/pmc_core/pch_ip_power_gating_status
> > That may help to point out what is wrong.
> >
> > > # turbostat
> > > turbostat version 18.07.27 - Len Brown
> > > CPUID(0): GenuineIntel 22 CPUID levels; family:model:stepping
> > > 0x6:8e:9
> > > (6:142:9)
> > > CPUID(1): SSE3 MONITOR SMX EIST TM2 TSC MSR ACPI-TM HT TM
> > > CPUID(6): APERF, TURBO, DTS, PTM, HWP, HWPnotify, HWPwindow,
> > > HWPepp,
> > > No-HWPpkg, EPB
> > > cpu1: MSR_IA32_MISC_ENABLE: 0x00850089 (TCC EIST MWAIT PREFETCH
> > > TURBO)
> > > CPUID(7): SGX
> > > cpu1: MSR_IA32_FEATURE_CONTROL: 0xff07 (Locked )
> > > CPUID(0x15): eax_crystal: 2 ebx_tsc: 134 ecx_crystal_hz: 0
> > > TSC: 1608 MHz (2400 Hz * 134 / 2 / 100)
> > > CPUID(0x16): base_mhz: 1600 max_mhz: 3600 bus_mhz: 100
> > > cpu1: MSR_MISC_PWR_MGMT: 0x00401cc0 (ENable-EIST_Coordination
> > > DISable-
> > > EPB DISable-OOB)
> > > RAPL: 58254 sec. Joule Counter Range, at 4 Watts
> > > cpu1: MSR_PLATFORM_INFO: 0x804043df1011000
> > > 4 * 100.0 = 400.0 MHz max efficiency frequency
> > > 16 * 100.0 = 1600.0 MHz base frequency
> > > cpu1: MSR_IA32_POWER_CTL: 0x0024005d (C1E auto-promotion: DISabled)
> > > cpu1: MSR_TURBO_RATIO_LIMIT: 0x2224
> > > 34 * 100.0 = 3400.0 MHz max turbo 4 active cores
> > > 34 * 100.0 = 3400.0 MHz max turbo 3 active cores
> > > 34 * 100.0 = 3400.0 MHz max turbo 2 active cores
> > > 36 * 100.0 = 3600.0 MHz max turbo 1 active cores
> > > cpu1: MSR_CONFIG_TDP_NOMINAL: 0x000d (base_ratio=13)
> > > cpu1: MSR_CONFIG_TDP_LEVEL_1: 0x0006001c (PKG_MIN_PWR_LVL1=0
> > > PKG_MAX_PWR_LVL1=0 LVL1_RATIO=6 PKG_TDP_LVL1=28)
> > > cpu1: MSR_CONFIG_TDP_LEVEL_2: 0x00100038 (PKG_MIN_PWR_LVL2=0
> > > PKG_MAX_PWR_LVL2=0 LVL2_RATIO=16 PKG_TDP_LVL2=56)
> > > cpu1: MSR_CONFIG_TDP_CONTROL: 0x ( lock=0)
> > > cpu1: MSR_TURBO_ACTIVATION_RATIO: 0x000c
> > > (MAX_NON_TURBO_RATIO=12
> > > lock=0)
> > > cpu1: MSR_PKG_CST_CONFIG_CONTROL: 0x1e008008 (UNdemote-C3,
> > > UNdemote-
> > > C1,
> > > demote-C3, demote-C1, locked, pkg-cstate-limit=8 (unlimited))
> > > cpu1: POLL: CPUIDLE CORE POLL IDLE
> > > cpu1: C1: MWAIT 0x00
> > > cpu1: C1E: MWAIT 0x01
> > > cpu1: C3: MWAIT 0x10
> > > cpu1: C6: MWAIT 0x20
> > > cpu1: C7s: MWAIT 0x33
> > > cpu1: C8: MWAIT 0x40
> > > cpu1: C9: MWAIT 0x50
> > > cpu1: C10: MWAIT 0x60
> > > cpu1: cpufreq driver: intel_pstate
> > > cpu1: cpufreq governor: powersave
> > > cpufreq intel_pstate no_turbo: 0
> > > cpu1: MSR_MISC_FEATURE_CONTROL: 0x (L2-Prefetch L2-
> > > Prefetch-
> > > pair L1-Prefetch
RE: issues with suspend on Dell XPS 13 2-in-1
> El vie, 12-10-2018 a las 17:46 +, mario.limoncie...@dell.com
> escribió:
> > > -Original Message-
> > > From: Dennis Gilmore
> > > Sent: Friday, October 12, 2018 8:39 AM
> > > To: Pandruvada, Srinivas
> > > Cc: linux-kernel@vger.kernel.org; linux-a...@vger.kernel.org;
> > > Limonciello, Mario
> > > Subject: Re: issues with suspend on Dell XPS 13 2-in-1
> > >
> >
> > It appears I'm being added to this thread late. Can you give me some
> > more context?
> > Which XPS 2-in-1 is this (model number)? And what are the issues?
> >
> > I'm "guessing" high power consumption over S2I?
>
> Sorry we had a discussion back in April about high power consumption
> when suspending. The conversation stopped when the debugging steps did
> not work. Which turns out to be due to secure boot. I have just dealt
> with it by shutting down, but as I am currently travelling it annoyed
> me enough to try and figure out what is happening again. I have a 9635
> and esentially I get the same battery use regardless of if I suspend or
> not.
>
> Dennis
>
I see.
Can you remove those patches for now and perform those debugging steps?
>
> > >
> > > El jue, 26-04-2018 a las 15:09 +, Pandruvada, Srinivas
> > > escribió:
> > > > On Thu, 2018-04-26 at 07:42 -0500, Dennis Gilmore wrote:
> > > > > Hi Srinivas,
> > > > >
> > > > > El jue, 26-04-2018 a las 05:34 +, Pandruvada, Srinivas
> > > > > escribió:
> > > > > > Hi Dennis,
> > > > > >
> > > > > > On Wed, 2018-04-25 at 22:06 -0500, Dennis Gilmore wrote:
> > > > > > > Hi Srinivas,
> > > > > > >
> > > > > > > Yes I have latest bios, I have version 1.3.1 that was
> > > > > > > released
> > > > > > > on
> > > > > > > 18th
> > > > > > > of Feb.
> > > > > >
> > > > > > Can you try these commands and repeat the test?
> > > > > >
> > > > > > # cd /sys/kernel/debug/pmc_core/
> > > > > > # for i in {0..32}; do echo $i > ltr_ignore; done
> > > > >
> > > > > # for i in {0..32}; do echo $i > ltr_ignore; done
> > > > > -bash: ltr_ignore: Operación no permitida
> > >
> > > After some digging i figured out that the patches fedora has for
> > > secureboot caused the access to ltr_ignore to not work.
> > >
> >
> > If you are trying to debug high power consumption and those patches
> > are causing
> > problems, can you please remove those patches?
> >
> > LTR ignoring is an important debugging tactic to find problems with
> > S2I consuming
> > too much power.
> >
> > Additionally if you can read
> > /sys/kernel/debug/pmc_core/pch_ip_power_gating_status
> > That may help to point out what is wrong.
> >
> > > # turbostat
> > > turbostat version 18.07.27 - Len Brown
> > > CPUID(0): GenuineIntel 22 CPUID levels; family:model:stepping
> > > 0x6:8e:9
> > > (6:142:9)
> > > CPUID(1): SSE3 MONITOR SMX EIST TM2 TSC MSR ACPI-TM HT TM
> > > CPUID(6): APERF, TURBO, DTS, PTM, HWP, HWPnotify, HWPwindow,
> > > HWPepp,
> > > No-HWPpkg, EPB
> > > cpu1: MSR_IA32_MISC_ENABLE: 0x00850089 (TCC EIST MWAIT PREFETCH
> > > TURBO)
> > > CPUID(7): SGX
> > > cpu1: MSR_IA32_FEATURE_CONTROL: 0xff07 (Locked )
> > > CPUID(0x15): eax_crystal: 2 ebx_tsc: 134 ecx_crystal_hz: 0
> > > TSC: 1608 MHz (2400 Hz * 134 / 2 / 100)
> > > CPUID(0x16): base_mhz: 1600 max_mhz: 3600 bus_mhz: 100
> > > cpu1: MSR_MISC_PWR_MGMT: 0x00401cc0 (ENable-EIST_Coordination
> > > DISable-
> > > EPB DISable-OOB)
> > > RAPL: 58254 sec. Joule Counter Range, at 4 Watts
> > > cpu1: MSR_PLATFORM_INFO: 0x804043df1011000
> > > 4 * 100.0 = 400.0 MHz max efficiency frequency
> > > 16 * 100.0 = 1600.0 MHz base frequency
> > > cpu1: MSR_IA32_POWER_CTL: 0x0024005d (C1E auto-promotion: DISabled)
> > > cpu1: MSR_TURBO_RATIO_LIMIT: 0x2224
> > > 34 * 100.0 = 3400.0 MHz max turbo 4 active cores
> > > 34 * 100.0 = 3400.0 MHz max turbo 3 active cores
> > > 34 * 100.0 = 3400.0 MHz max turbo 2 active cores
> > > 36 * 100.0 = 3600.0 MHz max turbo 1 active cores
> > > cpu1: MSR_CONFIG_TDP_NOMINAL: 0x000d (base_ratio=13)
> > > cpu1: MSR_CONFIG_TDP_LEVEL_1: 0x0006001c (PKG_MIN_PWR_LVL1=0
> > > PKG_MAX_PWR_LVL1=0 LVL1_RATIO=6 PKG_TDP_LVL1=28)
> > > cpu1: MSR_CONFIG_TDP_LEVEL_2: 0x00100038 (PKG_MIN_PWR_LVL2=0
> > > PKG_MAX_PWR_LVL2=0 LVL2_RATIO=16 PKG_TDP_LVL2=56)
> > > cpu1: MSR_CONFIG_TDP_CONTROL: 0x ( lock=0)
> > > cpu1: MSR_TURBO_ACTIVATION_RATIO: 0x000c
> > > (MAX_NON_TURBO_RATIO=12
> > > lock=0)
> > > cpu1: MSR_PKG_CST_CONFIG_CONTROL: 0x1e008008 (UNdemote-C3,
> > > UNdemote-
> > > C1,
> > > demote-C3, demote-C1, locked, pkg-cstate-limit=8 (unlimited))
> > > cpu1: POLL: CPUIDLE CORE POLL IDLE
> > > cpu1: C1: MWAIT 0x00
> > > cpu1: C1E: MWAIT 0x01
> > > cpu1: C3: MWAIT 0x10
> > > cpu1: C6: MWAIT 0x20
> > > cpu1: C7s: MWAIT 0x33
> > > cpu1: C8: MWAIT 0x40
> > > cpu1: C9: MWAIT 0x50
> > > cpu1: C10: MWAIT 0x60
> > > cpu1: cpufreq driver: intel_pstate
> > > cpu1: cpufreq governor: powersave
> > > cpufreq intel_pstate no_turbo: 0
> > > cpu1: MSR_MISC_FEATURE_CONTROL: 0x (L2-Prefetch L2-
> > > Prefetch-
> > > pair L1-Prefetch
linux-next: manual merge of the userns tree with the tip tree
Hi Eric,
Today's linux-next merge of the userns tree got a conflict in:
arch/x86/mm/fault.c
between commit:
164477c2331b ("x86/mm: Clarify hardware vs. software "error_code"")
(and others from that series)
from the tip tree and commits:
768fd9c69bb5 ("signal/x86: Remove pkey parameter from bad_area_nosemaphore")
25c102d803ea ("signal/x86: Remove pkey parameter from mm_fault_error")
from the userns tree.
I fixed it up (I think - see below) and can carry the fix as
necessary. This is now fixed as far as linux-next is concerned, but any
non trivial conflicts should be mentioned to your upstream maintainer
when your tree is submitted for merging. You may also want to consider
cooperating with the maintainer of the conflicting tree to minimise any
particularly complex conflicts.
--
Cheers,
Stephen Rothwell
diff --cc arch/x86/mm/fault.c
index c2e3e5127ebc,8d77700a7883..
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@@ -968,19 -884,40 +892,41 @@@ bad_area_access_error(struct pt_regs *r
* But, doing it this way allows compiler optimizations
* if pkeys are compiled out.
*/
- if (bad_area_access_from_pkeys(error_code, vma))
- __bad_area(regs, error_code, address, vma, SEGV_PKUERR);
- else
- __bad_area(regs, error_code, address, vma, SEGV_ACCERR);
+ if (bad_area_access_from_pkeys(error_code, vma)) {
+ /*
+* A protection key fault means that the PKRU value did not
allow
+* access to some PTE. Userspace can figure out what PKRU was
+* from the XSAVE state. This function captures the pkey from
+* the vma and passes it to userspace so userspace can discover
+* which protection key was set on the PTE.
+*
+* If we get here, we know that the hardware signaled a
X86_PF_PK
+* fault and that there was a VMA once we got in the fault
+* handler. It does *not* guarantee that the VMA we find here
+* was the one that we faulted on.
+*
+* 1. T1 : mprotect_key(foo, PAGE_SIZE, pkey=4);
+* 2. T1 : set PKRU to deny access to pkey=4, touches page
+* 3. T1 : faults...
+* 4.T2: mprotect_key(foo, PAGE_SIZE, pkey=5);
+* 5. T1 : enters fault handler, takes mmap_sem, etc...
+* 6. T1 : reaches here, sees vma_pkey(vma)=5, when we really
+* faulted on a pte with its pkey=4.
+*/
+ u32 pkey = vma_pkey(vma);
+
+ __bad_area(regs, error_code, address, pkey, SEGV_PKUERR);
+ } else {
+ __bad_area(regs, error_code, address, 0, SEGV_ACCERR);
+ }
}
+/* Handle faults in the kernel portion of the address space */
static void
do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long
address,
- u32 *pkey, unsigned int fault)
+ unsigned int fault)
{
struct task_struct *tsk = current;
- int code = BUS_ADRERR;
/* Kernel mode? Handle exceptions or die: */
if (!(error_code & X86_PF_USER)) {
@@@ -1238,74 -1187,41 +1191,74 @@@ do_kern_addr_fault(struct pt_regs *regs
* only copy the information from the master page table,
* nothing more.
*
- * This verifies that the fault happens in kernel space
- * (error_code & 4) == 0, and that the fault was not a
- * protection error (error_code & 9) == 0.
+ * Before doing this on-demand faulting, ensure that the
+ * fault is not any of the following:
+ * 1. A fault on a PTE with a reserved bit set.
+ * 2. A fault caused by a user-mode access. (Do not demand-
+ *fault kernel memory due to user-mode accesses).
+ * 3. A fault caused by a page-level protection violation.
+ *(A demand fault would be on a non-present page which
+ * would have X86_PF_PROT==0).
*/
- if (unlikely(fault_in_kernel_space(address))) {
- if (!(error_code & (X86_PF_RSVD | X86_PF_USER | X86_PF_PROT))) {
- if (vmalloc_fault(address) >= 0)
- return;
- }
-
- /* Can handle a stale RO->RW TLB: */
- if (spurious_fault(error_code, address))
+ if (!(hw_error_code & (X86_PF_RSVD | X86_PF_USER | X86_PF_PROT))) {
+ if (vmalloc_fault(address) >= 0)
return;
+ }
- /* kprobes don't want to hook the spurious faults: */
- if (kprobes_fault(regs))
- return;
- /*
- * Don't take the mm semaphore here. If we fixup a prefetch
- * fault we could otherwise deadlock:
- */
-
linux-next: manual merge of the userns tree with the tip tree
Hi Eric,
Today's linux-next merge of the userns tree got a conflict in:
arch/x86/mm/fault.c
between commit:
164477c2331b ("x86/mm: Clarify hardware vs. software "error_code"")
(and others from that series)
from the tip tree and commits:
768fd9c69bb5 ("signal/x86: Remove pkey parameter from bad_area_nosemaphore")
25c102d803ea ("signal/x86: Remove pkey parameter from mm_fault_error")
from the userns tree.
I fixed it up (I think - see below) and can carry the fix as
necessary. This is now fixed as far as linux-next is concerned, but any
non trivial conflicts should be mentioned to your upstream maintainer
when your tree is submitted for merging. You may also want to consider
cooperating with the maintainer of the conflicting tree to minimise any
particularly complex conflicts.
--
Cheers,
Stephen Rothwell
diff --cc arch/x86/mm/fault.c
index c2e3e5127ebc,8d77700a7883..
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@@ -968,19 -884,40 +892,41 @@@ bad_area_access_error(struct pt_regs *r
* But, doing it this way allows compiler optimizations
* if pkeys are compiled out.
*/
- if (bad_area_access_from_pkeys(error_code, vma))
- __bad_area(regs, error_code, address, vma, SEGV_PKUERR);
- else
- __bad_area(regs, error_code, address, vma, SEGV_ACCERR);
+ if (bad_area_access_from_pkeys(error_code, vma)) {
+ /*
+* A protection key fault means that the PKRU value did not
allow
+* access to some PTE. Userspace can figure out what PKRU was
+* from the XSAVE state. This function captures the pkey from
+* the vma and passes it to userspace so userspace can discover
+* which protection key was set on the PTE.
+*
+* If we get here, we know that the hardware signaled a
X86_PF_PK
+* fault and that there was a VMA once we got in the fault
+* handler. It does *not* guarantee that the VMA we find here
+* was the one that we faulted on.
+*
+* 1. T1 : mprotect_key(foo, PAGE_SIZE, pkey=4);
+* 2. T1 : set PKRU to deny access to pkey=4, touches page
+* 3. T1 : faults...
+* 4.T2: mprotect_key(foo, PAGE_SIZE, pkey=5);
+* 5. T1 : enters fault handler, takes mmap_sem, etc...
+* 6. T1 : reaches here, sees vma_pkey(vma)=5, when we really
+* faulted on a pte with its pkey=4.
+*/
+ u32 pkey = vma_pkey(vma);
+
+ __bad_area(regs, error_code, address, pkey, SEGV_PKUERR);
+ } else {
+ __bad_area(regs, error_code, address, 0, SEGV_ACCERR);
+ }
}
+/* Handle faults in the kernel portion of the address space */
static void
do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long
address,
- u32 *pkey, unsigned int fault)
+ unsigned int fault)
{
struct task_struct *tsk = current;
- int code = BUS_ADRERR;
/* Kernel mode? Handle exceptions or die: */
if (!(error_code & X86_PF_USER)) {
@@@ -1238,74 -1187,41 +1191,74 @@@ do_kern_addr_fault(struct pt_regs *regs
* only copy the information from the master page table,
* nothing more.
*
- * This verifies that the fault happens in kernel space
- * (error_code & 4) == 0, and that the fault was not a
- * protection error (error_code & 9) == 0.
+ * Before doing this on-demand faulting, ensure that the
+ * fault is not any of the following:
+ * 1. A fault on a PTE with a reserved bit set.
+ * 2. A fault caused by a user-mode access. (Do not demand-
+ *fault kernel memory due to user-mode accesses).
+ * 3. A fault caused by a page-level protection violation.
+ *(A demand fault would be on a non-present page which
+ * would have X86_PF_PROT==0).
*/
- if (unlikely(fault_in_kernel_space(address))) {
- if (!(error_code & (X86_PF_RSVD | X86_PF_USER | X86_PF_PROT))) {
- if (vmalloc_fault(address) >= 0)
- return;
- }
-
- /* Can handle a stale RO->RW TLB: */
- if (spurious_fault(error_code, address))
+ if (!(hw_error_code & (X86_PF_RSVD | X86_PF_USER | X86_PF_PROT))) {
+ if (vmalloc_fault(address) >= 0)
return;
+ }
- /* kprobes don't want to hook the spurious faults: */
- if (kprobes_fault(regs))
- return;
- /*
- * Don't take the mm semaphore here. If we fixup a prefetch
- * fault we could otherwise deadlock:
- */
-
possible deadlock in percpu_down_write
Hello,
syzbot found the following crash on:
HEAD commit:7ec21823634d Merge tag 'for-linus' of git://git.kernel.org..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=14ceda0940
kernel config: https://syzkaller.appspot.com/x/.config?x=88e9a8a39dc0be2d
dashboard link: https://syzkaller.appspot.com/bug?extid=7bf81a3e18fab8a61966
compiler: gcc (GCC) 8.0.1 20180413 (experimental)
Unfortunately, I don't have any reproducer for this crash yet.
IMPORTANT: if you fix the bug, please add the following tag to the commit:
Reported-by: syzbot+7bf81a3e18fab8a61...@syzkaller.appspotmail.com
==
WARNING: possible circular locking dependency detected
4.19.0-rc7+ #282 Not tainted
--
syz-executor4/9907 is trying to acquire lock:
3db358c5 (_mmap_sem){}, at: percpu_down_write+0xaf/0x540
kernel/locking/percpu-rwsem.c:145
but task is already holding lock:
3d2ff532 (>register_rwsem){+.+.}, at: __uprobe_register
kernel/events/uprobes.c:922 [inline]
3d2ff532 (>register_rwsem){+.+.}, at:
uprobe_register+0x3dd/0x7c0 kernel/events/uprobes.c:941
which lock already depends on the new lock.
the existing dependency chain (in reverse order) is:
-> #3 (>register_rwsem){+.+.}:
down_write+0x8a/0x130 kernel/locking/rwsem.c:70
__uprobe_register kernel/events/uprobes.c:922 [inline]
uprobe_register+0x3dd/0x7c0 kernel/events/uprobes.c:941
probe_event_enable+0x5f5/0xf30 kernel/trace/trace_uprobe.c:908
trace_uprobe_register+0x4c9/0xcf0 kernel/trace/trace_uprobe.c:1193
perf_trace_event_reg kernel/trace/trace_event_perf.c:124 [inline]
perf_trace_event_init+0x50b/0x990 kernel/trace/trace_event_perf.c:199
perf_uprobe_init+0x1e5/0x280 kernel/trace/trace_event_perf.c:328
perf_uprobe_event_init+0xff/0x190 kernel/events/core.c:8474
perf_try_init_event+0x137/0x2f0 kernel/events/core.c:9741
perf_init_event kernel/events/core.c:9772 [inline]
perf_event_alloc.part.93+0x23e6/0x35f0 kernel/events/core.c:10045
perf_event_alloc kernel/events/core.c:10401 [inline]
__do_sys_perf_event_open+0xa9c/0x2f30 kernel/events/core.c:10502
__se_sys_perf_event_open kernel/events/core.c:10391 [inline]
__x64_sys_perf_event_open+0xbe/0x150 kernel/events/core.c:10391
do_syscall_64+0x1b9/0x820 arch/x86/entry/common.c:290
entry_SYSCALL_64_after_hwframe+0x49/0xbe
-> #2 (event_mutex){+.+.}:
__mutex_lock_common kernel/locking/mutex.c:925 [inline]
__mutex_lock+0x166/0x1700 kernel/locking/mutex.c:1072
mutex_lock_nested+0x16/0x20 kernel/locking/mutex.c:1087
perf_trace_destroy+0x28/0x100 kernel/trace/trace_event_perf.c:236
tp_perf_event_destroy+0x15/0x20 kernel/events/core.c:8336
_free_event+0x414/0x1610 kernel/events/core.c:4446
put_event+0x48/0x60 kernel/events/core.c:4532
perf_mmap_close+0x62f/0x1220 kernel/events/core.c:5515
remove_vma+0xb1/0x180 mm/mmap.c:181
remove_vma_list mm/mmap.c:2550 [inline]
do_munmap+0x72d/0xf50 mm/mmap.c:2786
mmap_region+0x6a4/0x1cd0 mm/mmap.c:1705
do_mmap+0xa22/0x1230 mm/mmap.c:1535
do_mmap_pgoff include/linux/mm.h:2298 [inline]
vm_mmap_pgoff+0x213/0x2c0 mm/util.c:357
ksys_mmap_pgoff+0x4da/0x660 mm/mmap.c:1585
__do_sys_mmap arch/x86/kernel/sys_x86_64.c:100 [inline]
__se_sys_mmap arch/x86/kernel/sys_x86_64.c:91 [inline]
__x64_sys_mmap+0xe9/0x1b0 arch/x86/kernel/sys_x86_64.c:91
do_syscall_64+0x1b9/0x820 arch/x86/entry/common.c:290
entry_SYSCALL_64_after_hwframe+0x49/0xbe
-> #1 (>mmap_sem){}:
down_write_killable+0x8d/0x150 kernel/locking/rwsem.c:84
dup_mmap kernel/fork.c:431 [inline]
dup_mm kernel/fork.c:1274 [inline]
copy_mm kernel/fork.c:1329 [inline]
copy_process+0x3648/0x8780 kernel/fork.c:1869
_do_fork+0x1cb/0x11d0 kernel/fork.c:2166
__do_sys_clone kernel/fork.c:2273 [inline]
__se_sys_clone kernel/fork.c:2267 [inline]
__x64_sys_clone+0xbf/0x150 kernel/fork.c:2267
do_syscall_64+0x1b9/0x820 arch/x86/entry/common.c:290
entry_SYSCALL_64_after_hwframe+0x49/0xbe
-> #0 (_mmap_sem){}:
lock_acquire+0x1ed/0x520 kernel/locking/lockdep.c:3900
down_write+0x8a/0x130 kernel/locking/rwsem.c:70
percpu_down_write+0xaf/0x540 kernel/locking/percpu-rwsem.c:145
register_for_each_vma+0xa0/0xee0 kernel/events/uprobes.c:797
__uprobe_register kernel/events/uprobes.c:926 [inline]
uprobe_register+0x47c/0x7c0 kernel/events/uprobes.c:941
probe_event_enable+0x5f5/0xf30 kernel/trace/trace_uprobe.c:908
trace_uprobe_register+0x4c9/0xcf0 kernel/trace/trace_uprobe.c:1193
perf_trace_event_reg kernel/trace/trace_event_perf.c:124 [inline]
perf_trace_event_init+0x50b/0x990
possible deadlock in percpu_down_write
Hello,
syzbot found the following crash on:
HEAD commit:7ec21823634d Merge tag 'for-linus' of git://git.kernel.org..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=14ceda0940
kernel config: https://syzkaller.appspot.com/x/.config?x=88e9a8a39dc0be2d
dashboard link: https://syzkaller.appspot.com/bug?extid=7bf81a3e18fab8a61966
compiler: gcc (GCC) 8.0.1 20180413 (experimental)
Unfortunately, I don't have any reproducer for this crash yet.
IMPORTANT: if you fix the bug, please add the following tag to the commit:
Reported-by: syzbot+7bf81a3e18fab8a61...@syzkaller.appspotmail.com
==
WARNING: possible circular locking dependency detected
4.19.0-rc7+ #282 Not tainted
--
syz-executor4/9907 is trying to acquire lock:
3db358c5 (_mmap_sem){}, at: percpu_down_write+0xaf/0x540
kernel/locking/percpu-rwsem.c:145
but task is already holding lock:
3d2ff532 (>register_rwsem){+.+.}, at: __uprobe_register
kernel/events/uprobes.c:922 [inline]
3d2ff532 (>register_rwsem){+.+.}, at:
uprobe_register+0x3dd/0x7c0 kernel/events/uprobes.c:941
which lock already depends on the new lock.
the existing dependency chain (in reverse order) is:
-> #3 (>register_rwsem){+.+.}:
down_write+0x8a/0x130 kernel/locking/rwsem.c:70
__uprobe_register kernel/events/uprobes.c:922 [inline]
uprobe_register+0x3dd/0x7c0 kernel/events/uprobes.c:941
probe_event_enable+0x5f5/0xf30 kernel/trace/trace_uprobe.c:908
trace_uprobe_register+0x4c9/0xcf0 kernel/trace/trace_uprobe.c:1193
perf_trace_event_reg kernel/trace/trace_event_perf.c:124 [inline]
perf_trace_event_init+0x50b/0x990 kernel/trace/trace_event_perf.c:199
perf_uprobe_init+0x1e5/0x280 kernel/trace/trace_event_perf.c:328
perf_uprobe_event_init+0xff/0x190 kernel/events/core.c:8474
perf_try_init_event+0x137/0x2f0 kernel/events/core.c:9741
perf_init_event kernel/events/core.c:9772 [inline]
perf_event_alloc.part.93+0x23e6/0x35f0 kernel/events/core.c:10045
perf_event_alloc kernel/events/core.c:10401 [inline]
__do_sys_perf_event_open+0xa9c/0x2f30 kernel/events/core.c:10502
__se_sys_perf_event_open kernel/events/core.c:10391 [inline]
__x64_sys_perf_event_open+0xbe/0x150 kernel/events/core.c:10391
do_syscall_64+0x1b9/0x820 arch/x86/entry/common.c:290
entry_SYSCALL_64_after_hwframe+0x49/0xbe
-> #2 (event_mutex){+.+.}:
__mutex_lock_common kernel/locking/mutex.c:925 [inline]
__mutex_lock+0x166/0x1700 kernel/locking/mutex.c:1072
mutex_lock_nested+0x16/0x20 kernel/locking/mutex.c:1087
perf_trace_destroy+0x28/0x100 kernel/trace/trace_event_perf.c:236
tp_perf_event_destroy+0x15/0x20 kernel/events/core.c:8336
_free_event+0x414/0x1610 kernel/events/core.c:4446
put_event+0x48/0x60 kernel/events/core.c:4532
perf_mmap_close+0x62f/0x1220 kernel/events/core.c:5515
remove_vma+0xb1/0x180 mm/mmap.c:181
remove_vma_list mm/mmap.c:2550 [inline]
do_munmap+0x72d/0xf50 mm/mmap.c:2786
mmap_region+0x6a4/0x1cd0 mm/mmap.c:1705
do_mmap+0xa22/0x1230 mm/mmap.c:1535
do_mmap_pgoff include/linux/mm.h:2298 [inline]
vm_mmap_pgoff+0x213/0x2c0 mm/util.c:357
ksys_mmap_pgoff+0x4da/0x660 mm/mmap.c:1585
__do_sys_mmap arch/x86/kernel/sys_x86_64.c:100 [inline]
__se_sys_mmap arch/x86/kernel/sys_x86_64.c:91 [inline]
__x64_sys_mmap+0xe9/0x1b0 arch/x86/kernel/sys_x86_64.c:91
do_syscall_64+0x1b9/0x820 arch/x86/entry/common.c:290
entry_SYSCALL_64_after_hwframe+0x49/0xbe
-> #1 (>mmap_sem){}:
down_write_killable+0x8d/0x150 kernel/locking/rwsem.c:84
dup_mmap kernel/fork.c:431 [inline]
dup_mm kernel/fork.c:1274 [inline]
copy_mm kernel/fork.c:1329 [inline]
copy_process+0x3648/0x8780 kernel/fork.c:1869
_do_fork+0x1cb/0x11d0 kernel/fork.c:2166
__do_sys_clone kernel/fork.c:2273 [inline]
__se_sys_clone kernel/fork.c:2267 [inline]
__x64_sys_clone+0xbf/0x150 kernel/fork.c:2267
do_syscall_64+0x1b9/0x820 arch/x86/entry/common.c:290
entry_SYSCALL_64_after_hwframe+0x49/0xbe
-> #0 (_mmap_sem){}:
lock_acquire+0x1ed/0x520 kernel/locking/lockdep.c:3900
down_write+0x8a/0x130 kernel/locking/rwsem.c:70
percpu_down_write+0xaf/0x540 kernel/locking/percpu-rwsem.c:145
register_for_each_vma+0xa0/0xee0 kernel/events/uprobes.c:797
__uprobe_register kernel/events/uprobes.c:926 [inline]
uprobe_register+0x47c/0x7c0 kernel/events/uprobes.c:941
probe_event_enable+0x5f5/0xf30 kernel/trace/trace_uprobe.c:908
trace_uprobe_register+0x4c9/0xcf0 kernel/trace/trace_uprobe.c:1193
perf_trace_event_reg kernel/trace/trace_event_perf.c:124 [inline]
perf_trace_event_init+0x50b/0x990
Re: [PATCH] x86/mm: annotate no_context with UNWIND_HINTS
On Sun, Oct 14, 2018 at 5:37 PM Nick Desaulniers
wrote:
>
> Fixes the objtool warning:
> arch/x86/mm/fault.o: warning: objtool: no_context()+0x220: unreachable
> instruction
>
> Link: https://github.com/ClangBuiltLinux/linux/issues/204
> Signed-off-by: Nick Desaulniers
> ---
> arch/x86/mm/fault.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
> index 47bebfe6efa7..057d2178fa19 100644
> --- a/arch/x86/mm/fault.c
> +++ b/arch/x86/mm/fault.c
> @@ -760,9 +760,11 @@ no_context(struct pt_regs *regs, unsigned long
> error_code,
> * and then double-fault, though, because we're likely to
> * break the console driver and lose most of the stack dump.
> */
> - asm volatile ("movq %[stack], %%rsp\n\t"
> + asm volatile (UNWIND_HINT_SAVE
> + "movq %[stack], %%rsp\n\t"
> "call handle_stack_overflow\n\t"
> - "1: jmp 1b"
> + "1: jmp 1b\n\t"
> + UNWIND_HINT_RESTORE
> : ASM_CALL_CONSTRAINT
> : "D" ("kernel stack overflow (page fault)"),
> "S" (regs), "d" (address),
NAK. Just below this snippet is unreachable();
Can you reply with objtool -dr output on a problematic fault.o? Josh,
it *looks* like annotate_unreachable() should be doing the right
thing, but something is clearly busted.
Also, shouldn't compiler-clang.h contain a reasonable definition of
unreachable()?
--Andy
Re: [PATCH] x86/mm: annotate no_context with UNWIND_HINTS
On Sun, Oct 14, 2018 at 5:37 PM Nick Desaulniers
wrote:
>
> Fixes the objtool warning:
> arch/x86/mm/fault.o: warning: objtool: no_context()+0x220: unreachable
> instruction
>
> Link: https://github.com/ClangBuiltLinux/linux/issues/204
> Signed-off-by: Nick Desaulniers
> ---
> arch/x86/mm/fault.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
> index 47bebfe6efa7..057d2178fa19 100644
> --- a/arch/x86/mm/fault.c
> +++ b/arch/x86/mm/fault.c
> @@ -760,9 +760,11 @@ no_context(struct pt_regs *regs, unsigned long
> error_code,
> * and then double-fault, though, because we're likely to
> * break the console driver and lose most of the stack dump.
> */
> - asm volatile ("movq %[stack], %%rsp\n\t"
> + asm volatile (UNWIND_HINT_SAVE
> + "movq %[stack], %%rsp\n\t"
> "call handle_stack_overflow\n\t"
> - "1: jmp 1b"
> + "1: jmp 1b\n\t"
> + UNWIND_HINT_RESTORE
> : ASM_CALL_CONSTRAINT
> : "D" ("kernel stack overflow (page fault)"),
> "S" (regs), "d" (address),
NAK. Just below this snippet is unreachable();
Can you reply with objtool -dr output on a problematic fault.o? Josh,
it *looks* like annotate_unreachable() should be doing the right
thing, but something is clearly busted.
Also, shouldn't compiler-clang.h contain a reasonable definition of
unreachable()?
--Andy
Re: [PATCH v2] HID: i2c-hid: Add a small delay after sleep command for Raydium touchpanel
Hi Jiri and Benjamin,
> On Oct 5, 2018, at 12:46, Kai-Heng Feng wrote:
>
> Raydium touchpanel (2386:4B33) sometimes does not work in desktop session
> although it works in display manager.
>
> During user logging, the display manager exits, close the HID device,
> then the device gets runtime suspended and powered off. The desktop
> session begins shortly after, opens the HID device, then the device gets
> runtime resumed and powered on.
>
> If the trasition from display manager to desktop sesesion is fast, the
> touchpanel cannot switch from powered off to powered on in short
> timeframe. So add a small delay to workaround the issue.
Please review my patch and let me know if the approach is okay, thanks!
Kai-Heng
>
> Signed-off-by: Kai-Heng Feng
> ---
> v2:
> - Use quirk to only match affected touchpanel
> - Only delay the next power on if the time hasn't elapsed
>
> drivers/hid/hid-ids.h | 3 +++
> drivers/hid/i2c-hid/i2c-hid-core.c | 19 +++
> 2 files changed, 22 insertions(+)
>
> diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
> index 16342188df19..c1b5f03eb630 100644
> --- a/drivers/hid/hid-ids.h
> +++ b/drivers/hid/hid-ids.h
> @@ -926,6 +926,9 @@
> #define USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3003 0x3003
> #define USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3008 0x3008
>
> +#define I2C_VENDOR_ID_RAYDIUM0x2386
> +#define I2C_PRODUCT_ID_RAYDIUM_4B33 0x4b33
> +
> #define USB_VENDOR_ID_RAZER0x1532
> #define USB_DEVICE_ID_RAZER_BLADE_14 0x011D
>
> diff --git a/drivers/hid/i2c-hid/i2c-hid-core.c
> b/drivers/hid/i2c-hid/i2c-hid-core.c
> index 4aab96cf0818..3cde7c1b9c33 100644
> --- a/drivers/hid/i2c-hid/i2c-hid-core.c
> +++ b/drivers/hid/i2c-hid/i2c-hid-core.c
> @@ -49,6 +49,7 @@
> #define I2C_HID_QUIRK_SET_PWR_WAKEUP_DEV BIT(0)
> #define I2C_HID_QUIRK_NO_IRQ_AFTER_RESET BIT(1)
> #define I2C_HID_QUIRK_NO_RUNTIME_PM BIT(2)
> +#define I2C_HID_QUIRK_DELAY_AFTER_SLEEP BIT(3)
>
> /* flags */
> #define I2C_HID_STARTED 0
> @@ -158,6 +159,8 @@ struct i2c_hid {
>
> boolirq_wake_enabled;
> struct mutexreset_lock;
> +
> + unsigned long sleep_delay;
> };
>
> static const struct i2c_hid_quirks {
> @@ -172,6 +175,8 @@ static const struct i2c_hid_quirks {
> { I2C_VENDOR_ID_HANTICK, I2C_PRODUCT_ID_HANTICK_5288,
> I2C_HID_QUIRK_NO_IRQ_AFTER_RESET |
> I2C_HID_QUIRK_NO_RUNTIME_PM },
> + { I2C_VENDOR_ID_RAYDIUM, I2C_PRODUCT_ID_RAYDIUM_4B33,
> + I2C_HID_QUIRK_DELAY_AFTER_SLEEP },
> { 0, 0 }
> };
>
> @@ -387,6 +392,7 @@ static int i2c_hid_set_power(struct i2c_client *client,
> int power_state)
> {
> struct i2c_hid *ihid = i2c_get_clientdata(client);
> int ret;
> + unsigned long now, delay;
>
> i2c_hid_dbg(ihid, "%s\n", __func__);
>
> @@ -404,9 +410,22 @@ static int i2c_hid_set_power(struct i2c_client *client,
> int power_state)
> goto set_pwr_exit;
> }
>
> + if (ihid->quirks & I2C_HID_QUIRK_DELAY_AFTER_SLEEP &&
> + power_state == I2C_HID_PWR_ON) {
> + now = jiffies;
> + if (time_after(ihid->sleep_delay, now)) {
> + delay = jiffies_to_usecs(ihid->sleep_delay - now);
> + usleep_range(delay, delay + 1);
> + }
> + }
> +
> ret = __i2c_hid_command(client, _set_power_cmd, power_state,
> 0, NULL, 0, NULL, 0);
>
> + if (ihid->quirks & I2C_HID_QUIRK_DELAY_AFTER_SLEEP &&
> + power_state == I2C_HID_PWR_SLEEP)
> + ihid->sleep_delay = jiffies + msecs_to_jiffies(20);
> +
> if (ret)
> dev_err(>dev, "failed to change power setting.\n");
>
> --
> 2.17.1
>
Re: [PATCH v2] HID: i2c-hid: Add a small delay after sleep command for Raydium touchpanel
Hi Jiri and Benjamin,
> On Oct 5, 2018, at 12:46, Kai-Heng Feng wrote:
>
> Raydium touchpanel (2386:4B33) sometimes does not work in desktop session
> although it works in display manager.
>
> During user logging, the display manager exits, close the HID device,
> then the device gets runtime suspended and powered off. The desktop
> session begins shortly after, opens the HID device, then the device gets
> runtime resumed and powered on.
>
> If the trasition from display manager to desktop sesesion is fast, the
> touchpanel cannot switch from powered off to powered on in short
> timeframe. So add a small delay to workaround the issue.
Please review my patch and let me know if the approach is okay, thanks!
Kai-Heng
>
> Signed-off-by: Kai-Heng Feng
> ---
> v2:
> - Use quirk to only match affected touchpanel
> - Only delay the next power on if the time hasn't elapsed
>
> drivers/hid/hid-ids.h | 3 +++
> drivers/hid/i2c-hid/i2c-hid-core.c | 19 +++
> 2 files changed, 22 insertions(+)
>
> diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
> index 16342188df19..c1b5f03eb630 100644
> --- a/drivers/hid/hid-ids.h
> +++ b/drivers/hid/hid-ids.h
> @@ -926,6 +926,9 @@
> #define USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3003 0x3003
> #define USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3008 0x3008
>
> +#define I2C_VENDOR_ID_RAYDIUM0x2386
> +#define I2C_PRODUCT_ID_RAYDIUM_4B33 0x4b33
> +
> #define USB_VENDOR_ID_RAZER0x1532
> #define USB_DEVICE_ID_RAZER_BLADE_14 0x011D
>
> diff --git a/drivers/hid/i2c-hid/i2c-hid-core.c
> b/drivers/hid/i2c-hid/i2c-hid-core.c
> index 4aab96cf0818..3cde7c1b9c33 100644
> --- a/drivers/hid/i2c-hid/i2c-hid-core.c
> +++ b/drivers/hid/i2c-hid/i2c-hid-core.c
> @@ -49,6 +49,7 @@
> #define I2C_HID_QUIRK_SET_PWR_WAKEUP_DEV BIT(0)
> #define I2C_HID_QUIRK_NO_IRQ_AFTER_RESET BIT(1)
> #define I2C_HID_QUIRK_NO_RUNTIME_PM BIT(2)
> +#define I2C_HID_QUIRK_DELAY_AFTER_SLEEP BIT(3)
>
> /* flags */
> #define I2C_HID_STARTED 0
> @@ -158,6 +159,8 @@ struct i2c_hid {
>
> boolirq_wake_enabled;
> struct mutexreset_lock;
> +
> + unsigned long sleep_delay;
> };
>
> static const struct i2c_hid_quirks {
> @@ -172,6 +175,8 @@ static const struct i2c_hid_quirks {
> { I2C_VENDOR_ID_HANTICK, I2C_PRODUCT_ID_HANTICK_5288,
> I2C_HID_QUIRK_NO_IRQ_AFTER_RESET |
> I2C_HID_QUIRK_NO_RUNTIME_PM },
> + { I2C_VENDOR_ID_RAYDIUM, I2C_PRODUCT_ID_RAYDIUM_4B33,
> + I2C_HID_QUIRK_DELAY_AFTER_SLEEP },
> { 0, 0 }
> };
>
> @@ -387,6 +392,7 @@ static int i2c_hid_set_power(struct i2c_client *client,
> int power_state)
> {
> struct i2c_hid *ihid = i2c_get_clientdata(client);
> int ret;
> + unsigned long now, delay;
>
> i2c_hid_dbg(ihid, "%s\n", __func__);
>
> @@ -404,9 +410,22 @@ static int i2c_hid_set_power(struct i2c_client *client,
> int power_state)
> goto set_pwr_exit;
> }
>
> + if (ihid->quirks & I2C_HID_QUIRK_DELAY_AFTER_SLEEP &&
> + power_state == I2C_HID_PWR_ON) {
> + now = jiffies;
> + if (time_after(ihid->sleep_delay, now)) {
> + delay = jiffies_to_usecs(ihid->sleep_delay - now);
> + usleep_range(delay, delay + 1);
> + }
> + }
> +
> ret = __i2c_hid_command(client, _set_power_cmd, power_state,
> 0, NULL, 0, NULL, 0);
>
> + if (ihid->quirks & I2C_HID_QUIRK_DELAY_AFTER_SLEEP &&
> + power_state == I2C_HID_PWR_SLEEP)
> + ihid->sleep_delay = jiffies + msecs_to_jiffies(20);
> +
> if (ret)
> dev_err(>dev, "failed to change power setting.\n");
>
> --
> 2.17.1
>
[PATCH] of: Documentation: remove unmaintained todo file
From: Frank Rowand The todo.txt file was created by a previous maintainer and has never been updated by the current OPEN FIRMWARE AND FLATTENED DEVICE TREE maintainers. Remove the out of date file. Signed-off-by: Frank Rowand --- Documentation/devicetree/todo.txt | 10 -- 1 file changed, 10 deletions(-) delete mode 100644 Documentation/devicetree/todo.txt diff --git a/Documentation/devicetree/todo.txt b/Documentation/devicetree/todo.txt deleted file mode 100644 index b5139d1de811.. --- a/Documentation/devicetree/todo.txt +++ /dev/null @@ -1,10 +0,0 @@ -Todo list for devicetree: - -=== General structure === -- Switch from custom lists to (h)list_head for nodes and properties structure - -=== CONFIG_OF_DYNAMIC === -- Switch to RCU for tree updates and get rid of global spinlock -- Document node lifecycle for CONFIG_OF_DYNAMIC -- Always set ->full_name at of_attach_node() time -- pseries: Get rid of open-coded tree modification from arch/powerpc/platforms/pseries/dlpar.c -- Frank Rowand
[PATCH] of: Documentation: remove unmaintained todo file
From: Frank Rowand The todo.txt file was created by a previous maintainer and has never been updated by the current OPEN FIRMWARE AND FLATTENED DEVICE TREE maintainers. Remove the out of date file. Signed-off-by: Frank Rowand --- Documentation/devicetree/todo.txt | 10 -- 1 file changed, 10 deletions(-) delete mode 100644 Documentation/devicetree/todo.txt diff --git a/Documentation/devicetree/todo.txt b/Documentation/devicetree/todo.txt deleted file mode 100644 index b5139d1de811.. --- a/Documentation/devicetree/todo.txt +++ /dev/null @@ -1,10 +0,0 @@ -Todo list for devicetree: - -=== General structure === -- Switch from custom lists to (h)list_head for nodes and properties structure - -=== CONFIG_OF_DYNAMIC === -- Switch to RCU for tree updates and get rid of global spinlock -- Document node lifecycle for CONFIG_OF_DYNAMIC -- Always set ->full_name at of_attach_node() time -- pseries: Get rid of open-coded tree modification from arch/powerpc/platforms/pseries/dlpar.c -- Frank Rowand
[PATCH] of: overlay: update documentation to match current implementation
From: Frank Rowand
The overlay information in Documentation/devicetree/ is out of date.
Signed-off-by: Frank Rowand
---
.../devicetree/dynamic-resolution-notes.txt| 24 --
Documentation/devicetree/overlay-notes.txt | 93 ++
2 files changed, 42 insertions(+), 75 deletions(-)
delete mode 100644 Documentation/devicetree/dynamic-resolution-notes.txt
diff --git a/Documentation/devicetree/dynamic-resolution-notes.txt
b/Documentation/devicetree/dynamic-resolution-notes.txt
deleted file mode 100644
index c24ec366c5dc..
--- a/Documentation/devicetree/dynamic-resolution-notes.txt
+++ /dev/null
@@ -1,24 +0,0 @@
-Device Tree Dynamic Resolver Notes
---
-
-This document describes the implementation of the in-kernel
-Device Tree resolver, residing in drivers/of/resolver.c
-
-How the resolver works
---
-
-The resolver is given as an input an arbitrary tree compiled with the
-proper dtc option and having a /plugin/ tag. This generates the
-appropriate __fixups__ & __local_fixups__ nodes.
-
-In sequence the resolver works by the following steps:
-
-1. Get the maximum device tree phandle value from the live tree + 1.
-2. Adjust all the local phandles of the tree to resolve by that amount.
-3. Using the __local__fixups__ node information adjust all local references
- by the same amount.
-4. For each property in the __fixups__ node locate the node it references
- in the live tree. This is the label used to tag the node.
-5. Retrieve the phandle of the target of the fixup.
-6. For each fixup in the property locate the node:property:offset location
- and replace it with the phandle value.
diff --git a/Documentation/devicetree/overlay-notes.txt
b/Documentation/devicetree/overlay-notes.txt
index 725fb8d255c1..5b34b2318c59 100644
--- a/Documentation/devicetree/overlay-notes.txt
+++ b/Documentation/devicetree/overlay-notes.txt
@@ -2,8 +2,8 @@ Device Tree Overlay Notes
-
This document describes the implementation of the in-kernel
-device tree overlay functionality residing in drivers/of/overlay.c and is a
-companion document to Documentation/devicetree/dynamic-resolution-notes.txt[1]
+device tree overlay functionality residing in drivers/of/overlay.c and
+drivers/of/resolver.c.
How overlays work
-
@@ -34,26 +34,23 @@ Lets take an example where we have a foo board with the
following base tree:
};
foo.dts -
-The overlay bar.dts, when loaded (and resolved as described in [1]) should
+The overlay bar.dts, when processed by the devicetree resolver (as described
+later in this document) and applied to the live devicetree) will result in a
+live devicetree that is equivalent to foo+bar.dts.
bar.dts -
/plugin/; /* allow undefined label references and record them */
/ {
- /* various properties for loader use; i.e. part id etc. */
- fragment@0 {
- target = <>;
- __overlay__ {
- /* bar peripheral */
- bar {
- compatible = "corp,bar";
- ... /* various properties and child nodes */
- }
- };
+ : {
+ /* bar peripheral */
+ bar {
+ compatible = "corp,bar";
+ ... /* various properties and child nodes */
+ }
};
};
bar.dts -
-result in foo+bar.dts
foo+bar.dts -
/* FOO platform + bar peripheral */
@@ -78,14 +75,16 @@ result in foo+bar.dts
};
foo+bar.dts -
-As a result of the overlay, a new device node (bar) has been created
-so a bar platform device will be registered and if a matching device driver
-is loaded the device will be created as expected.
+As a result of the overlay, a new device node (bar) has been created. Thus
+a bar platform device will have been registered. If a matching device
+driver is loaded the device will have been created as expected.
-Overlay in-kernel API
-
+An overlay may specify the location of a node in the overlay with path
+notation as the label reference. In the bar.dts example above, ':'
+can also be expressed as '&{/ocp/}'.
-The API is quite easy to use.
+Overlay in-kernel API
+-
1. Call of_overlay_fdt_apply() to create and apply an overlay changeset. The
return value is an error or a cookie identifying this overlay.
@@ -106,34 +105,26 @@ Note that a notifier callback is not supposed to store
pointers to a device
tree node or its
[PATCH] of: overlay: update documentation to match current implementation
From: Frank Rowand
The overlay information in Documentation/devicetree/ is out of date.
Signed-off-by: Frank Rowand
---
.../devicetree/dynamic-resolution-notes.txt| 24 --
Documentation/devicetree/overlay-notes.txt | 93 ++
2 files changed, 42 insertions(+), 75 deletions(-)
delete mode 100644 Documentation/devicetree/dynamic-resolution-notes.txt
diff --git a/Documentation/devicetree/dynamic-resolution-notes.txt
b/Documentation/devicetree/dynamic-resolution-notes.txt
deleted file mode 100644
index c24ec366c5dc..
--- a/Documentation/devicetree/dynamic-resolution-notes.txt
+++ /dev/null
@@ -1,24 +0,0 @@
-Device Tree Dynamic Resolver Notes
---
-
-This document describes the implementation of the in-kernel
-Device Tree resolver, residing in drivers/of/resolver.c
-
-How the resolver works
---
-
-The resolver is given as an input an arbitrary tree compiled with the
-proper dtc option and having a /plugin/ tag. This generates the
-appropriate __fixups__ & __local_fixups__ nodes.
-
-In sequence the resolver works by the following steps:
-
-1. Get the maximum device tree phandle value from the live tree + 1.
-2. Adjust all the local phandles of the tree to resolve by that amount.
-3. Using the __local__fixups__ node information adjust all local references
- by the same amount.
-4. For each property in the __fixups__ node locate the node it references
- in the live tree. This is the label used to tag the node.
-5. Retrieve the phandle of the target of the fixup.
-6. For each fixup in the property locate the node:property:offset location
- and replace it with the phandle value.
diff --git a/Documentation/devicetree/overlay-notes.txt
b/Documentation/devicetree/overlay-notes.txt
index 725fb8d255c1..5b34b2318c59 100644
--- a/Documentation/devicetree/overlay-notes.txt
+++ b/Documentation/devicetree/overlay-notes.txt
@@ -2,8 +2,8 @@ Device Tree Overlay Notes
-
This document describes the implementation of the in-kernel
-device tree overlay functionality residing in drivers/of/overlay.c and is a
-companion document to Documentation/devicetree/dynamic-resolution-notes.txt[1]
+device tree overlay functionality residing in drivers/of/overlay.c and
+drivers/of/resolver.c.
How overlays work
-
@@ -34,26 +34,23 @@ Lets take an example where we have a foo board with the
following base tree:
};
foo.dts -
-The overlay bar.dts, when loaded (and resolved as described in [1]) should
+The overlay bar.dts, when processed by the devicetree resolver (as described
+later in this document) and applied to the live devicetree) will result in a
+live devicetree that is equivalent to foo+bar.dts.
bar.dts -
/plugin/; /* allow undefined label references and record them */
/ {
- /* various properties for loader use; i.e. part id etc. */
- fragment@0 {
- target = <>;
- __overlay__ {
- /* bar peripheral */
- bar {
- compatible = "corp,bar";
- ... /* various properties and child nodes */
- }
- };
+ : {
+ /* bar peripheral */
+ bar {
+ compatible = "corp,bar";
+ ... /* various properties and child nodes */
+ }
};
};
bar.dts -
-result in foo+bar.dts
foo+bar.dts -
/* FOO platform + bar peripheral */
@@ -78,14 +75,16 @@ result in foo+bar.dts
};
foo+bar.dts -
-As a result of the overlay, a new device node (bar) has been created
-so a bar platform device will be registered and if a matching device driver
-is loaded the device will be created as expected.
+As a result of the overlay, a new device node (bar) has been created. Thus
+a bar platform device will have been registered. If a matching device
+driver is loaded the device will have been created as expected.
-Overlay in-kernel API
-
+An overlay may specify the location of a node in the overlay with path
+notation as the label reference. In the bar.dts example above, ':'
+can also be expressed as '&{/ocp/}'.
-The API is quite easy to use.
+Overlay in-kernel API
+-
1. Call of_overlay_fdt_apply() to create and apply an overlay changeset. The
return value is an error or a cookie identifying this overlay.
@@ -106,34 +105,26 @@ Note that a notifier callback is not supposed to store
pointers to a device
tree node or its
Re: [PATCH 0/2] mmc: uniphier-sd: two bug-fixes
On Mon, Oct 15, 2018 at 7:33 AM Wolfram Sang wrote: > > > > In further testing in uniphier-sd.c, > > I found my stupid mistakes. > > I don't have the uniphier HW but I still had a look at these patches. > You never know if there is something interesting for SDHI in there :) > > > Can you squash this series into > > 3fd784f745dd > > "mmc: uniphier-sd: add UniPhier SD/eMMC controller driver" > > if you have a chance to do rebase? > > Please don't rebase! Some sub-systems rebase, and some do not. It is up to the sub-system maintainer. I am not asking to rebase just for my two fixes. I see linux-mmc regularly rebase anyway. I'd prefer cleaner git history if Ulf just happens to do one more rebase in this cycle. > We actually develop on top of mmc/next and rebasing > creates a lot of pain because we lose the base for that work. I know what you are saying, but this is how we develop in linux-next. You need to use "git rebase --onto". -- Best Regards Masahiro Yamada
Re: [PATCH 0/2] mmc: uniphier-sd: two bug-fixes
On Mon, Oct 15, 2018 at 7:33 AM Wolfram Sang wrote: > > > > In further testing in uniphier-sd.c, > > I found my stupid mistakes. > > I don't have the uniphier HW but I still had a look at these patches. > You never know if there is something interesting for SDHI in there :) > > > Can you squash this series into > > 3fd784f745dd > > "mmc: uniphier-sd: add UniPhier SD/eMMC controller driver" > > if you have a chance to do rebase? > > Please don't rebase! Some sub-systems rebase, and some do not. It is up to the sub-system maintainer. I am not asking to rebase just for my two fixes. I see linux-mmc regularly rebase anyway. I'd prefer cleaner git history if Ulf just happens to do one more rebase in this cycle. > We actually develop on top of mmc/next and rebasing > creates a lot of pain because we lose the base for that work. I know what you are saying, but this is how we develop in linux-next. You need to use "git rebase --onto". -- Best Regards Masahiro Yamada
Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI
On Fri, 2018-10-12 at 09:12 -0500, Bjorn Helgaas wrote:
> On Fri, Oct 12, 2018 at 11:22:30AM +0100, Lorenzo Pieralisi wrote:
> > On Fri, Oct 12, 2018 at 04:01:29PM +0800, Honghui Zhang wrote:
> >> On Thu, 2018-10-11 at 12:38 +0100, Lorenzo Pieralisi wrote:
> >>> On Tue, Oct 09, 2018 at 11:08:15AM +0800, Honghui Zhang wrote:
> On Mon, 2018-10-08 at 18:23 +0100, Lorenzo Pieralisi wrote:
> > On Mon, Oct 08, 2018 at 11:24:41AM +0800, honghui.zh...@mediatek.com
> > wrote:
> >> From: Honghui Zhang
> >>
> >> The PCIe controller of MT7622 has TYPE 1 configuration
> >> space type, but the HW default class type values is
> >> invalid.
> >>
> >> The commit 101c92dc80c8 ("PCI: mediatek: Set up vendor ID
> >> and class type for MT7622") have set the class ID for
> >> MT7622 as PCI_CLASS_BRIDGE_HOSTe, but it's not workable
> >> for MT7622:
> >>
> >> In __pci_bus_assign_resources, the framework only setup
> >> bridge's resource window only if class type is
> >> PCI_CLASS_BRIDGE_PCI. Or it will leave the subordinary PCIe
> >> device's MMIO window un-touched.
>
> I think __pci_bus_assign_resources() should be testing dev->hdr_type
> instead of dev->class. The connection between "Header Type" and the
> layout of the rest of the header is very explicit (PCI r3.0 sec 6.1,
> PCIe r4.0 sec 7.5.1.1.9), and the reason for the switch statement in
> __pci_bus_assign_resources() is precisely to determine which layout to
> use.
>
> There are several other uses of dev->class in setup-bus.c that I think
> should also be changed to use dev->hdr_type.
>
> If we make these changes in setup-bus.c, I suspect the class code you
> assign won't matter too much. There are a few other tests of the
> class code to figure out whether to leave certain things untouched.
> These seem a little hacky to me, but we're probably stuck with them
> for now, so you should look and see whether they apply to your
> situation.
If these change could be made in the PCI core, then the class code is no
matter what will be workable for MT7622.
As Lorenzo point it out, it's more reasonable for MT7622 to defined as a
PCI-to-PCI class code since the IP is defined as that. I intend to
following Lorenzo's suggest to update the commit message and re-send
this patch set for current solution.
>
> And for MT7622, it integrated with block of internal control
> registers, type 1 configuration space, and is considered as a
> root complex.
> >>>
> >>> I assume you mean a type 1 config header here. I do not think it
> >>> is mandatory for a host bridge to have a type 1 config header (and
> >>> related bridge windows + primary/secondary/subordinate bus
> >>> numbers) but I do not know how the IP you are programming is
> >>> designed.
>
> It is definitely not mandatory for a host bridge to have a type 1
> header. I'm not even sure that would make sense: the "Primary Bus
> Number" would not apply to a host bridge (since a host bridge's
> primary bus is some sort of CPU bus, not a PCI bus), and a type 1
> device cannot perform address translation between its primary and
> secondary buses, while a host bridge can.
>
> A Root Port is a type 1 device where the primary bus is logically
> internal to the Root Complex. A host bridge bridges from the CPU bus
> to that internal bus and might perform address translation. The Root
> Port must be a PCI device. A host bridge, being a bridge *to* the PCI
> domain, is not itself generally programmed via PCI config space and
> might not even be visible as a device in PCI config space.
>
Thanks for the explain. Per my understanding, MT7622 is more like a
complex of Root Port and PCI-to-PCI bridge. It has type 1 header and has
the ability to translate address between its primary and secondary
buses. I guess apply the class type as PCI_CLASS_BRIDGE_PCI is
reasonable way to make its integrated internal bridge workable.
Thanks.
> Bjorn
Re: [PATCH v6 2/9] PCI: mediatek: Fixup class ID for MT7622 as PCI_CLASS_BRIDGE_PCI
On Fri, 2018-10-12 at 09:12 -0500, Bjorn Helgaas wrote:
> On Fri, Oct 12, 2018 at 11:22:30AM +0100, Lorenzo Pieralisi wrote:
> > On Fri, Oct 12, 2018 at 04:01:29PM +0800, Honghui Zhang wrote:
> >> On Thu, 2018-10-11 at 12:38 +0100, Lorenzo Pieralisi wrote:
> >>> On Tue, Oct 09, 2018 at 11:08:15AM +0800, Honghui Zhang wrote:
> On Mon, 2018-10-08 at 18:23 +0100, Lorenzo Pieralisi wrote:
> > On Mon, Oct 08, 2018 at 11:24:41AM +0800, honghui.zh...@mediatek.com
> > wrote:
> >> From: Honghui Zhang
> >>
> >> The PCIe controller of MT7622 has TYPE 1 configuration
> >> space type, but the HW default class type values is
> >> invalid.
> >>
> >> The commit 101c92dc80c8 ("PCI: mediatek: Set up vendor ID
> >> and class type for MT7622") have set the class ID for
> >> MT7622 as PCI_CLASS_BRIDGE_HOSTe, but it's not workable
> >> for MT7622:
> >>
> >> In __pci_bus_assign_resources, the framework only setup
> >> bridge's resource window only if class type is
> >> PCI_CLASS_BRIDGE_PCI. Or it will leave the subordinary PCIe
> >> device's MMIO window un-touched.
>
> I think __pci_bus_assign_resources() should be testing dev->hdr_type
> instead of dev->class. The connection between "Header Type" and the
> layout of the rest of the header is very explicit (PCI r3.0 sec 6.1,
> PCIe r4.0 sec 7.5.1.1.9), and the reason for the switch statement in
> __pci_bus_assign_resources() is precisely to determine which layout to
> use.
>
> There are several other uses of dev->class in setup-bus.c that I think
> should also be changed to use dev->hdr_type.
>
> If we make these changes in setup-bus.c, I suspect the class code you
> assign won't matter too much. There are a few other tests of the
> class code to figure out whether to leave certain things untouched.
> These seem a little hacky to me, but we're probably stuck with them
> for now, so you should look and see whether they apply to your
> situation.
If these change could be made in the PCI core, then the class code is no
matter what will be workable for MT7622.
As Lorenzo point it out, it's more reasonable for MT7622 to defined as a
PCI-to-PCI class code since the IP is defined as that. I intend to
following Lorenzo's suggest to update the commit message and re-send
this patch set for current solution.
>
> And for MT7622, it integrated with block of internal control
> registers, type 1 configuration space, and is considered as a
> root complex.
> >>>
> >>> I assume you mean a type 1 config header here. I do not think it
> >>> is mandatory for a host bridge to have a type 1 config header (and
> >>> related bridge windows + primary/secondary/subordinate bus
> >>> numbers) but I do not know how the IP you are programming is
> >>> designed.
>
> It is definitely not mandatory for a host bridge to have a type 1
> header. I'm not even sure that would make sense: the "Primary Bus
> Number" would not apply to a host bridge (since a host bridge's
> primary bus is some sort of CPU bus, not a PCI bus), and a type 1
> device cannot perform address translation between its primary and
> secondary buses, while a host bridge can.
>
> A Root Port is a type 1 device where the primary bus is logically
> internal to the Root Complex. A host bridge bridges from the CPU bus
> to that internal bus and might perform address translation. The Root
> Port must be a PCI device. A host bridge, being a bridge *to* the PCI
> domain, is not itself generally programmed via PCI config space and
> might not even be visible as a device in PCI config space.
>
Thanks for the explain. Per my understanding, MT7622 is more like a
complex of Root Port and PCI-to-PCI bridge. It has type 1 header and has
the ability to translate address between its primary and secondary
buses. I guess apply the class type as PCI_CLASS_BRIDGE_PCI is
reasonable way to make its integrated internal bridge workable.
Thanks.
> Bjorn
