On Wed, 2018-11-28 at 23:20 +0100, Sebastian Andrzej Siewior wrote:
> Every user of user_insn() passes an user memory pointer to this
> macro.
>
> Add might_fault() to user_insn() so we can spot users which are using
> this macro in sections where page faulting is not allowed.
Nice catch.
>
On Wed, 2018-11-28 at 23:20 +0100, Sebastian Andrzej Siewior wrote:
> Every user of user_insn() passes an user memory pointer to this
> macro.
>
> Add might_fault() to user_insn() so we can spot users which are using
> this macro in sections where page faulting is not allowed.
Nice catch.
>
On Wed, 2018-11-28 at 23:20 +0100, Sebastian Andrzej Siewior wrote:
> There is no user of _TIF_ALLWORK_MASK since commit 21d375b6b34ff
> ("x86/entry/64: Remove the SYSCALL64 fast path").
> Remove unused define _TIF_ALLWORK_MASK.
>
> Reviewed-by: Borislav Petkov
> Signed-off-by: Sebastian Andrzej
On Wed, 2018-11-28 at 23:20 +0100, Sebastian Andrzej Siewior wrote:
> The variable init_pkru_value isn't used outside of this file.
> Make init_pkru_value static.
>
> Acked-by: Dave Hansen
> Signed-off-by: Sebastian Andrzej Siewior
Reviewed-by: Rik van Riel
--
All Rights Reversed.
On Wed, 2018-11-28 at 23:20 +0100, Sebastian Andrzej Siewior wrote:
> There is no user of _TIF_ALLWORK_MASK since commit 21d375b6b34ff
> ("x86/entry/64: Remove the SYSCALL64 fast path").
> Remove unused define _TIF_ALLWORK_MASK.
>
> Reviewed-by: Borislav Petkov
> Signed-off-by: Sebastian Andrzej
On Wed, 2018-11-28 at 23:20 +0100, Sebastian Andrzej Siewior wrote:
> The variable init_pkru_value isn't used outside of this file.
> Make init_pkru_value static.
>
> Acked-by: Dave Hansen
> Signed-off-by: Sebastian Andrzej Siewior
Reviewed-by: Rik van Riel
--
All Rights Reversed.
On Wed, 2018-11-28 at 23:20 +0100, Sebastian Andrzej Siewior wrote:
> The math_emu.h header files contains the definition of struct
> math_emu_info. It is not used in this file.
>
> Remove asm/math_emu.h include.
>
> Reviewed-by: Andy Lutomirski
> Signed-off-by: Sebastian Andrzej Siewior
Use kmemdup rather than duplicating its implementation
Signed-off-by: YueHaibing
---
fs/ocfs2/localalloc.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/fs/ocfs2/localalloc.c b/fs/ocfs2/localalloc.c
index 308f05b..3572204 100644
--- a/fs/ocfs2/localalloc.c
+++
On Wed, 2018-11-28 at 23:20 +0100, Sebastian Andrzej Siewior wrote:
> The math_emu.h header files contains the definition of struct
> math_emu_info. It is not used in this file.
>
> Remove asm/math_emu.h include.
>
> Reviewed-by: Andy Lutomirski
> Signed-off-by: Sebastian Andrzej Siewior
Use kmemdup rather than duplicating its implementation
Signed-off-by: YueHaibing
---
fs/ocfs2/localalloc.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/fs/ocfs2/localalloc.c b/fs/ocfs2/localalloc.c
index 308f05b..3572204 100644
--- a/fs/ocfs2/localalloc.c
+++
On Wed, 2018-11-28 at 23:20 +0100, Sebastian Andrzej Siewior wrote:
> The xfeature mask is 64bit so a shift from a number to its mask
> should
> have LL prefix or else nr > 31 will be lost. This is not a problem
> now
> but should XFEATURE_MASK_SUPERVISOR gain a bit >31 then this check
> won't
>
On Wed, 2018-11-28 at 23:20 +0100, Sebastian Andrzej Siewior wrote:
> The xfeature mask is 64bit so a shift from a number to its mask
> should
> have LL prefix or else nr > 31 will be lost. This is not a problem
> now
> but should XFEATURE_MASK_SUPERVISOR gain a bit >31 then this check
> won't
>
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and secure rtc etc..
This patch adds i.MX system controller RTC driver support,
Linux kernel has to communicate with system controller via MU
(message unit) IPC
This patch enables CONFIG_RTC_DRV_IMX_SC as module by default.
Signed-off-by: Anson Huang
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 10fade8..9f12324 100644
---
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and secure RTC etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC to do RTC operation, this patch adds binding
This patch enables CONFIG_RTC_DRV_IMX_SC as module by default.
Signed-off-by: Anson Huang
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 10fade8..9f12324 100644
---
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and secure RTC etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC to do RTC operation, this patch adds binding
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and secure rtc etc..
This patch adds i.MX system controller RTC driver support,
Linux kernel has to communicate with system controller via MU
(message unit) IPC
Add i.MX8QXP system controller RTC support.
Signed-off-by: Anson Huang
---
ChangeLog:
V3->V4:
*move sc rtc to inside of SCU node.
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and secure RTC etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC to do RTC operation.
Since the RTC set time
Add i.MX8QXP system controller RTC support.
Signed-off-by: Anson Huang
---
ChangeLog:
V3->V4:
*move sc rtc to inside of SCU node.
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and secure RTC etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC to do RTC operation.
Since the RTC set time
Hi Jerome,
I made some modifications as you suggested， could you please take a look?
On 2018/11/15 20:18, Jianxin Pan wrote:
> This driver will add a MMC clock controller driver support.
> The original idea about adding a clock controller is during the
> discussion in the NAND driver mainline
Hi Jerome,
I made some modifications as you suggested， could you please take a look?
On 2018/11/15 20:18, Jianxin Pan wrote:
> This driver will add a MMC clock controller driver support.
> The original idea about adding a clock controller is during the
> discussion in the NAND driver mainline
On Wed, Nov 28, 2018 at 03:30:21PM -0800, Andrew Morton wrote:
> On Tue, 27 Nov 2018 11:07:54 +0900 Minchan Kim wrote:
>
> > On Mon, Nov 26, 2018 at 12:58:33PM -0800, Andrew Morton wrote:
> > > On Mon, 26 Nov 2018 17:28:12 +0900 Minchan Kim wrote:
> > >
> > > > +File /sys/block/zram/bd_stat
>
On Wed, Nov 28, 2018 at 03:30:21PM -0800, Andrew Morton wrote:
> On Tue, 27 Nov 2018 11:07:54 +0900 Minchan Kim wrote:
>
> > On Mon, Nov 26, 2018 at 12:58:33PM -0800, Andrew Morton wrote:
> > > On Mon, 26 Nov 2018 17:28:12 +0900 Minchan Kim wrote:
> > >
> > > > +File /sys/block/zram/bd_stat
>
sizeof(mclk) is 4 or 8 as it is the size of a pointer,
but we want to reserve space for the pointed data.
This issue was detected by using the Coccinelle software.
v2: use subject lines matching the style for the subsystem.
Signed-off-by: Wen Yang
CC: Mark Brown
CC: Olivier Moysan
CC: Arnaud
sizeof(mclk) is 4 or 8 as it is the size of a pointer,
but we want to reserve space for the pointed data.
This issue was detected by using the Coccinelle software.
v2: use subject lines matching the style for the subsystem.
Signed-off-by: Wen Yang
CC: Mark Brown
CC: Olivier Moysan
CC: Arnaud
On Wed, Nov 28, 2018 at 4:38 PM Josh Poimboeuf wrote:
>
> On Wed, Nov 28, 2018 at 07:34:52PM +, Nadav Amit wrote:
> > > On Nov 28, 2018, at 8:08 AM, Josh Poimboeuf wrote:
> > >
> > > On Wed, Oct 17, 2018 at 05:54:15PM -0700, Nadav Amit wrote:
> > >> This RFC introduces indirect call
On Wed, Nov 28, 2018 at 4:38 PM Josh Poimboeuf wrote:
>
> On Wed, Nov 28, 2018 at 07:34:52PM +, Nadav Amit wrote:
> > > On Nov 28, 2018, at 8:08 AM, Josh Poimboeuf wrote:
> > >
> > > On Wed, Oct 17, 2018 at 05:54:15PM -0700, Nadav Amit wrote:
> > >> This RFC introduces indirect call
Hi Andrew,
On Wed, Nov 28, 2018 at 03:35:59PM -0800, Andrew Morton wrote:
> On Tue, 27 Nov 2018 14:54:27 +0900 Minchan Kim wrote:
>
> > This patch supports new feature "zram idle/huge page writeback".
> > On zram-swap usecase, zram has usually many idle/huge swap pages.
> > It's pointless to
Hi Andrew,
On Wed, Nov 28, 2018 at 03:35:59PM -0800, Andrew Morton wrote:
> On Tue, 27 Nov 2018 14:54:27 +0900 Minchan Kim wrote:
>
> > This patch supports new feature "zram idle/huge page writeback".
> > On zram-swap usecase, zram has usually many idle/huge swap pages.
> > It's pointless to
> On Nov 28, 2018, at 4:49 PM, Logan Gunthorpe wrote:
>
>
>
> On 2018-11-28 5:38 p.m., Nadav Amit wrote:
>> So what’s your take? Would you think this patch is still needed? Should it
>> only be enabled automatically for distcc and not for distcc-pump?
>
> Not sure. The patch will probably
> On Nov 28, 2018, at 4:49 PM, Logan Gunthorpe wrote:
>
>
>
> On 2018-11-28 5:38 p.m., Nadav Amit wrote:
>> So what’s your take? Would you think this patch is still needed? Should it
>> only be enabled automatically for distcc and not for distcc-pump?
>
> Not sure. The patch will probably
Hi Greg,
On Tue, Nov 27, 2018 at 9:52 AM Greg Kroah-Hartman
wrote:
>
> On Tue, Nov 27, 2018 at 09:29:38AM -0800, Guenter Roeck wrote:
> > Hi Enric,
> >
> > On Tue, Nov 27, 2018 at 4:19 AM Enric Balletbo i Serra
> > wrote:
> > >
> > > Devices are required to provide a release method. This patch
Hi Greg,
On Tue, Nov 27, 2018 at 9:52 AM Greg Kroah-Hartman
wrote:
>
> On Tue, Nov 27, 2018 at 09:29:38AM -0800, Guenter Roeck wrote:
> > Hi Enric,
> >
> > On Tue, Nov 27, 2018 at 4:19 AM Enric Balletbo i Serra
> > wrote:
> > >
> > > Devices are required to provide a release method. This patch
Hi Masami,
On Wed, 2018-11-28 at 11:15 +0900, Masami Hiramatsu wrote:
> Hi Tom,
>
> On Tue, 27 Nov 2018 16:53:45 -0600
> Tom Zanussi wrote:
>
> > > > +ping $LOCALHOST -c 3
> > > > +nice -n 1 ping $LOCALHOST -c 3
> > > > +
> > > > +echo 0 > /sys/kernel/debug/tracing/events/sched/enable
> > >
>
Hi Masami,
On Wed, 2018-11-28 at 11:15 +0900, Masami Hiramatsu wrote:
> Hi Tom,
>
> On Tue, 27 Nov 2018 16:53:45 -0600
> Tom Zanussi wrote:
>
> > > > +ping $LOCALHOST -c 3
> > > > +nice -n 1 ping $LOCALHOST -c 3
> > > > +
> > > > +echo 0 > /sys/kernel/debug/tracing/events/sched/enable
> > >
>
On Fri, 2018-11-23 at 20:15 -0800, Joe Perches wrote:
> On Fri, 2018-11-23 at 03:19 -0800, tip-bot for Thomas Gleixner wrote:
> > The SPDX
> > identifier is a legally binding shorthand, which can be used instead of the
> > full boiler plate text.
>
> Is the "legally binding shorthand" actually
On Fri, 2018-11-23 at 20:15 -0800, Joe Perches wrote:
> On Fri, 2018-11-23 at 03:19 -0800, tip-bot for Thomas Gleixner wrote:
> > The SPDX
> > identifier is a legally binding shorthand, which can be used instead of the
> > full boiler plate text.
>
> Is the "legally binding shorthand" actually
Neil Armstrong writes:
> The Amlogic Meson GX SoCs embeds a clock measurer IP to measure the internal
> clocks frequencies.
> The precision is determined by stepping into the duration until the counter
> overflows.
> The debugfs shows a pretty summary and each clock can be measured
>
Neil Armstrong writes:
> The Amlogic Meson GX SoCs embeds a clock measurer IP to measure the internal
> clocks frequencies.
> The precision is determined by stepping into the duration until the counter
> overflows.
> The debugfs shows a pretty summary and each clock can be measured
>
Martin Blumenstingl writes:
> This is a follow-up of my series "meson6_timer: dt-bindings updates"
> from [0].
> We were missing the interrupts for timer B, C and D. This is harmless
> so far because the meson6_timer driver only implements timer A. Timer
> E doesn't have any interrupt.
>
>
Martin Blumenstingl writes:
> This is a follow-up of my series "meson6_timer: dt-bindings updates"
> from [0].
> We were missing the interrupts for timer B, C and D. This is harmless
> so far because the meson6_timer driver only implements timer A. Timer
> E doesn't have any interrupt.
>
>
On 2018-11-28 5:38 p.m., Nadav Amit wrote:
> So what’s your take? Would you think this patch is still needed? Should it
> only be enabled automatically for distcc and not for distcc-pump?
Not sure. The patch will probably slow things down a lot (seeing
assembly is always done locally and there
On 2018-11-28 5:38 p.m., Nadav Amit wrote:
> So what’s your take? Would you think this patch is still needed? Should it
> only be enabled automatically for distcc and not for distcc-pump?
Not sure. The patch will probably slow things down a lot (seeing
assembly is always done locally and there
From: Bart Van Assche
Date: Wed, 28 Nov 2018 15:43:10 -0800
> This patch makes lockdep reports about devnet_rename_seq more informative.
>
> Cc: David S. Miller
> Signed-off-by: Bart Van Assche
Acked-by: David S. Miller
From: Bart Van Assche
Date: Wed, 28 Nov 2018 15:43:10 -0800
> This patch makes lockdep reports about devnet_rename_seq more informative.
>
> Cc: David S. Miller
> Signed-off-by: Bart Van Assche
Acked-by: David S. Miller
Martin Blumenstingl writes:
> On Fri, Nov 9, 2018 at 3:05 PM Jerome Brunet wrote:
>>
>> On Amlogic chipsets, the bias set through pinconf applies to the pad
>> itself, not only the GPIO function. This means that even when we change
>> the function of the pad from GPIO to anything else, the bias
Martin Blumenstingl writes:
> On Fri, Nov 9, 2018 at 3:05 PM Jerome Brunet wrote:
>>
>> On Amlogic chipsets, the bias set through pinconf applies to the pad
>> itself, not only the GPIO function. This means that even when we change
>> the function of the pad from GPIO to anything else, the bias
Quoting Abel Vesa (2018-11-13 08:19:56)
> Here is a link to the 12th version:
> https://lkml.org/lkml/2018/11/7/642
>
> Changes since v12:
> * replaced the division in clk_pll_recalc_rate in clk-frac
>with do_div as suggested by Stephen
>
> Abel Vesa (2):
> clk: imx: Add imx composite
Quoting Abel Vesa (2018-11-13 08:19:56)
> Here is a link to the 12th version:
> https://lkml.org/lkml/2018/11/7/642
>
> Changes since v12:
> * replaced the division in clk_pll_recalc_rate in clk-frac
>with do_div as suggested by Stephen
>
> Abel Vesa (2):
> clk: imx: Add imx composite
On Wed, Nov 28, 2018 at 07:34:52PM +, Nadav Amit wrote:
> > On Nov 28, 2018, at 8:08 AM, Josh Poimboeuf wrote:
> >
> > On Wed, Oct 17, 2018 at 05:54:15PM -0700, Nadav Amit wrote:
> >> This RFC introduces indirect call promotion in runtime, which for the
> >> matter of simplification (and
On Wed, Nov 28, 2018 at 07:34:52PM +, Nadav Amit wrote:
> > On Nov 28, 2018, at 8:08 AM, Josh Poimboeuf wrote:
> >
> > On Wed, Oct 17, 2018 at 05:54:15PM -0700, Nadav Amit wrote:
> >> This RFC introduces indirect call promotion in runtime, which for the
> >> matter of simplification (and
> On Nov 28, 2018, at 3:09 PM, Logan Gunthorpe wrote:
>
>
>
> On 2018-11-14 6:57 p.m., Nadav Amit wrote:
>> Eventually, if you get a fix into icecc, we will need to change the
>> Makefile, consider the version number and act accordingly.
>
> I got a fix pulled into icecc[1] and it works quite
> On Nov 28, 2018, at 3:09 PM, Logan Gunthorpe wrote:
>
>
>
> On 2018-11-14 6:57 p.m., Nadav Amit wrote:
>> Eventually, if you get a fix into icecc, we will need to change the
>> Makefile, consider the version number and act accordingly.
>
> I got a fix pulled into icecc[1] and it works quite
Viresh Kumar writes:
> Each CPU can (and does) participate in cooling down the system but the
> DT only captures a handful of them, normally CPU0, in the cooling maps.
> Things work by chance currently as under normal circumstances its the
> first CPU of each cluster which is used by the
Viresh Kumar writes:
> Each CPU can (and does) participate in cooling down the system but the
> DT only captures a handful of them, normally CPU0, in the cooling maps.
> Things work by chance currently as under normal circumstances its the
> first CPU of each cluster which is used by the
Martin Blumenstingl writes:
> Some Meson8b boards (Odroid-C1, EC-100) use a PWM regulator which is the
> voltage supply of the CPU cores (this regulator is typically called
> "VCCK").
> Now that we are preparing support for CPU frequency scaling on Meson8,
> Meson8b and Meson8m2 we should build
Martin Blumenstingl writes:
> Some Meson8b boards (Odroid-C1, EC-100) use a PWM regulator which is the
> voltage supply of the CPU cores (this regulator is typically called
> "VCCK").
> Now that we are preparing support for CPU frequency scaling on Meson8,
> Meson8b and Meson8m2 we should build
Quoting Rob Herring :
On Mon, Nov 26, 2018 at 9:57 PM tom burkart wrote:
Quoting Rob Herring :
> On Sat, Nov 17, 2018 at 6:35 PM tom burkart wrote:
>>
>> Quoting Rob Herring :
>>
>> > On Sat, Nov 17, 2018 at 4:35 AM tom burkart wrote:
>> >>
>> >> Quoting Rob Herring :
>> >>
>> >> > On
Quoting Rob Herring :
On Mon, Nov 26, 2018 at 9:57 PM tom burkart wrote:
Quoting Rob Herring :
> On Sat, Nov 17, 2018 at 6:35 PM tom burkart wrote:
>>
>> Quoting Rob Herring :
>>
>> > On Sat, Nov 17, 2018 at 4:35 AM tom burkart wrote:
>> >>
>> >> Quoting Rob Herring :
>> >>
>> >> > On
This patch changes the GPIO access for the pps-gpio driver from the
integer based ABI to the descriptor based ABI.
Reviewed-by: Philipp Zabel
Signed-off-by: Tom Burkart
---
drivers/pps/clients/pps-gpio.c | 67 +++---
include/linux/pps-gpio.h | 3 +-
2
This patch implements the device tree changes required for the pps
echo functionality for pps-gpio, that sysfs claims is available
already.
This patch was originally written by Lukas Senger as part of a masters
thesis project and modified for inclusion into the linux kernel by Tom
Burkart.
This patch implements the pps echo functionality for pps-gpio, that
sysfs claims is available already.
Configuration is done via device tree bindings.
This patch was originally written by Lukas Senger as part of a masters
thesis project and modified for inclusion into the linux kernel by Tom
Hi all,
please find attached the PPS-GPIO PPS ECHO implementation patch. The
driver claims to have echo functionality in the sysfs interface but this
functionality is not present. This patch provides this functionality.
Part 1 of the patch change the original driver from the number
based GPIO
This patch changes the GPIO access for the pps-gpio driver from the
integer based ABI to the descriptor based ABI.
Reviewed-by: Philipp Zabel
Signed-off-by: Tom Burkart
---
drivers/pps/clients/pps-gpio.c | 67 +++---
include/linux/pps-gpio.h | 3 +-
2
This patch implements the device tree changes required for the pps
echo functionality for pps-gpio, that sysfs claims is available
already.
This patch was originally written by Lukas Senger as part of a masters
thesis project and modified for inclusion into the linux kernel by Tom
Burkart.
This patch implements the pps echo functionality for pps-gpio, that
sysfs claims is available already.
Configuration is done via device tree bindings.
This patch was originally written by Lukas Senger as part of a masters
thesis project and modified for inclusion into the linux kernel by Tom
Hi all,
please find attached the PPS-GPIO PPS ECHO implementation patch. The
driver claims to have echo functionality in the sysfs interface but this
functionality is not present. This patch provides this functionality.
Part 1 of the patch change the original driver from the number
based GPIO
On Wed 28 Nov 09:39 PST 2018, Lina Iyer wrote:
> On Tue, Nov 27 2018 at 14:45 -0700, Stephen Boyd wrote:
> > Quoting Lina Iyer (2018-11-27 10:21:23)
> > > On Tue, Nov 27 2018 at 02:12 -0700, Stephen Boyd wrote:
> > > >
> > > >Two reasons. First, simplicity. The TLMM driver just needs to pass the
On Wed 28 Nov 09:39 PST 2018, Lina Iyer wrote:
> On Tue, Nov 27 2018 at 14:45 -0700, Stephen Boyd wrote:
> > Quoting Lina Iyer (2018-11-27 10:21:23)
> > > On Tue, Nov 27 2018 at 02:12 -0700, Stephen Boyd wrote:
> > > >
> > > >Two reasons. First, simplicity. The TLMM driver just needs to pass the
On Sat, Dec 09, 2017 at 01:32:29PM -0800, Andy Lutomirski wrote:
> On Fri, Dec 8, 2017 at 7:41 PM, wrote:
> >>> On Dec 8, 2017, at 6:34 PM, Mario Limonciello
> >>> wrote:
> >>>
> >>> It's possible for the same GUID to show up on as system twice.
> >>> This means using solely the GUID for
On Sat, Dec 09, 2017 at 01:32:29PM -0800, Andy Lutomirski wrote:
> On Fri, Dec 8, 2017 at 7:41 PM, wrote:
> >>> On Dec 8, 2017, at 6:34 PM, Mario Limonciello
> >>> wrote:
> >>>
> >>> It's possible for the same GUID to show up on as system twice.
> >>> This means using solely the GUID for
Jerome Brunet writes:
> This patchset adds support for the libretech aml-s805x-ac, aka 'La Frite'
>
> Changes since v1: [0]
> * Update gpio line names to align on Neil's recent series [1]
> * (really) fix typo in comment
Queued for v4.21 (branch: v4.21/dt64),
Thanks!
Kevin
Jerome Brunet writes:
> This patchset adds support for the libretech aml-s805x-ac, aka 'La Frite'
>
> Changes since v1: [0]
> * Update gpio line names to align on Neil's recent series [1]
> * (really) fix typo in comment
Queued for v4.21 (branch: v4.21/dt64),
Thanks!
Kevin
On Wed, Nov 28, 2018 at 5:04 AM Arnaldo Carvalho de Melo
wrote:
>
> Em Tue, Nov 27, 2018 at 11:41:19PM -0800, Ivan Babrou escreveu:
> > Hey Arnaldo,
> >
> > Thanks for the quick response. I've tried your patch and it works as
> > expected with perf top.
>
> Ok, I'll add the patch to my perf/core
On Wed, Nov 28, 2018 at 5:04 AM Arnaldo Carvalho de Melo
wrote:
>
> Em Tue, Nov 27, 2018 at 11:41:19PM -0800, Ivan Babrou escreveu:
> > Hey Arnaldo,
> >
> > Thanks for the quick response. I've tried your patch and it works as
> > expected with perf top.
>
> Ok, I'll add the patch to my perf/core
Hi, Dave:
Thanks for your comments. You have indeed missed some of the prior reviews
and discussions. But that is OK.
Please see my replies inline.
On 11/28/18 7:19 AM, Dave Martin wrote:
> On Tue, Nov 27, 2018 at 10:54:41PM +, Enke Chen wrote:
>> [Repost as a series, as suggested by Andrew
Hi, Dave:
Thanks for your comments. You have indeed missed some of the prior reviews
and discussions. But that is OK.
Please see my replies inline.
On 11/28/18 7:19 AM, Dave Martin wrote:
> On Tue, Nov 27, 2018 at 10:54:41PM +, Enke Chen wrote:
>> [Repost as a series, as suggested by Andrew
On Thu, Jul 05, 2018 at 03:38:07PM -0500, Gustavo A. R. Silva wrote:
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Signed-off-by: Gustavo A. R. Silva
I've applied this patch, but not the acer or sony fall through patches
due
On Thu, Jul 05, 2018 at 03:38:07PM -0500, Gustavo A. R. Silva wrote:
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Signed-off-by: Gustavo A. R. Silva
I've applied this patch, but not the acer or sony fall through patches
due
On Wed, 2018-11-28 at 21:05 +0200, Andy Shevchenko wrote:
> Since we put static variable to a header file it's copied to each module
> that includes the header. But not all of them are actually using it.
>
> Mark nvmem_type_str array with __maybe_unused to make a compiler happy:
>
> In file
On Wed, 2018-11-28 at 21:05 +0200, Andy Shevchenko wrote:
> Since we put static variable to a header file it's copied to each module
> that includes the header. But not all of them are actually using it.
>
> Mark nvmem_type_str array with __maybe_unused to make a compiler happy:
>
> In file
He Yangxuan writes:
> This patch adds support for the Phicomm N1. This device based on P230
> reference design.
> The phy is RTL8211F, need to disable Energy Efficient Ethernet (EEE) to make
> it stable.
> And this box doesn't have cvbs, so disable related section in device tree.
Thanks for
He Yangxuan writes:
> This patch adds support for the Phicomm N1. This device based on P230
> reference design.
> The phy is RTL8211F, need to disable Energy Efficient Ethernet (EEE) to make
> it stable.
> And this box doesn't have cvbs, so disable related section in device tree.
Thanks for
A warning is generated when a PCIe device is probed with a degraded
link, but there was no similar mechanism to warn when the link becomes
degraded after probing. The Link Bandwidth Notification provides this
mechanism.
Use the link bandwidth notification interrupt to detect bandwidth
changes,
A warning is generated when a PCIe device is probed with a degraded
link, but there was no similar mechanism to warn when the link becomes
degraded after probing. The Link Bandwidth Notification provides this
mechanism.
Use the link bandwidth notification interrupt to detect bandwidth
changes,
On Mon 05 Nov 13:09 PST 2018, Douglas Anderson wrote:
> As per upstream discussion [1], we should have an SoC-specific
> compatible string for Qualcomm's SDHCI nodes. Let's add it.
>
> [1] https://lkml.kernel.org/r/20181105203657.GA32282@bogus
>
> Signed-off-by: Douglas Anderson
Acked-by:
On Mon 05 Nov 13:09 PST 2018, Douglas Anderson wrote:
> As per upstream discussion [1], we should have an SoC-specific
> compatible string for Qualcomm's SDHCI nodes. Let's add it.
>
> [1] https://lkml.kernel.org/r/20181105203657.GA32282@bogus
>
> Signed-off-by: Douglas Anderson
Acked-by:
On Mon 05 Nov 13:09 PST 2018, Douglas Anderson wrote:
> As per upstream discussion [1], we should have an SoC-specific
> compatible string for Qualcomm's SDHCI nodes. Let's add it.
>
> [1] https://lkml.kernel.org/r/20181105203657.GA32282@bogus
>
> Signed-off-by: Douglas Anderson
Acked-by:
On Mon 05 Nov 13:09 PST 2018, Douglas Anderson wrote:
> As per upstream discussion [1], we should have an SoC-specific
> compatible string for Qualcomm's SDHCI nodes. Let's add it.
>
> [1] https://lkml.kernel.org/r/20181105203657.GA32282@bogus
>
> Signed-off-by: Douglas Anderson
Acked-by:
Pagetable page doesn't touch page->mapping or have any used field
that overlaps with it. No need to clear mapping in dtor. In fact,
doing so might mask problems that otherwise would be detected by
bad_page().
Signed-off-by: Yu Zhao
---
include/linux/mm.h | 11 ++-
1 file changed, 2
Pagetable page doesn't touch page->mapping or have any used field
that overlaps with it. No need to clear mapping in dtor. In fact,
doing so might mask problems that otherwise would be detected by
bad_page().
Signed-off-by: Yu Zhao
---
include/linux/mm.h | 11 ++-
1 file changed, 2
Transfers were being divided into device FIFO sized (64 byte max)
operations which would poll for completion within a spin_lock_irqsave /
spin_unlock_irqrestore block. This both made things slow by waiting for
the FIFO to completely drain before adding further data and would also
result in
Transfers were being divided into device FIFO sized (64 byte max)
operations which would poll for completion within a spin_lock_irqsave /
spin_unlock_irqrestore block. This both made things slow by waiting for
the FIFO to completely drain before adding further data and would also
result in
> > > On Mon, 26 Nov 2018 06:36:37 +0100,
> > > Chanho Min wrote:
> > > >
> > > > Commit 67ec1072b053 ("ALSA: pcm: Fix rwsem deadlock for non-atomic
> > > > PCM
> > > > stream") fixes deadlock for non-atomic PCM stream. But, This patch
> > > causes antother stuck.
> > > > If writer is RT thread
> > > On Mon, 26 Nov 2018 06:36:37 +0100,
> > > Chanho Min wrote:
> > > >
> > > > Commit 67ec1072b053 ("ALSA: pcm: Fix rwsem deadlock for non-atomic
> > > > PCM
> > > > stream") fixes deadlock for non-atomic PCM stream. But, This patch
> > > causes antother stuck.
> > > > If writer is RT thread
If compilation of liblockdep fails, display an error message and exit
immediately. Display compiler warning and error messages that are
generated while building a test. Only run a test if compilation
succeeded.
Signed-off-by: Bart Van Assche
---
tools/lib/lockdep/run_tests.sh | 13 -
If compilation of liblockdep fails, display an error message and exit
immediately. Display compiler warning and error messages that are
generated while building a test. Only run a test if compilation
succeeded.
Signed-off-by: Bart Van Assche
---
tools/lib/lockdep/run_tests.sh | 13 -
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