Document the multimedia clock controller found on MSM8998
Signed-off-by: Jeffrey Hugo
---
Documentation/devicetree/bindings/clock/qcom,mmcc.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.txt
Add a driver for the multimedia clock controller found on MSM8998
based devices. This should allow most multimedia device drivers
to probe and control their clocks.
Signed-off-by: Jeffrey Hugo
---
drivers/clk/qcom/Kconfig |9 +
drivers/clk/qcom/Makefile
Add MSM8998 Multimedia Clock Controller DT node.
Signed-off-by: Jeffrey Hugo
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 7136ab1..5673a65
On Thu, 24 Jan 2019 15:24:08 +, Srinivas Kandagatla wrote:
> The FastRPC driver implements an IPC (Inter-Processor Communication)
> mechanism that allows for clients to transparently make remote method
> invocations across DSP and APPS boundaries. This enables developers
> to offload tasks to
On Wed, Jan 30, 2019 at 02:48:27PM +, Carlos Henrique Lima Melara wrote:
> This patch fix the checkpatch.p1 warning:
>
> WARNING: Missing or malformed SPDX-License-Identifier tag in line 1
> +/*
>
> It includes the SPDX expression for GPL-2.0 and corrects the comment
According to the chipidea driver bindings, the USB PHY is specified via
the "phys" phandle node. However, this only takes effect for USB PHYs
that use the common PHY framework. For legacy USB PHYs, a simple lookup
based on the USB PHY type is done instead.
This does not play out well when more
Add & enable stm32 factory-programmed memory. Describe temperature sensor
calibration cells. Non-volatile calibration data is made available by
stm32mp157c bootrom in bsec_dataX registers.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157c.dtsi | 13 +
1 file changed,
Add a read only nvmem driver for STM32 factory-programmed memory area
(on-chip non-volatile storage).
Signed-off-by: Fabrice Gasnier
---
drivers/nvmem/Kconfig | 10 ++
drivers/nvmem/Makefile | 2 ++
drivers/nvmem/stm32-romem.c | 78 +
On STM32MP15, OTP area may be read/written by using BSEC (boot, security
and OTP control). BSEC registers set is composed of various regions, among
which control registers and OTP shadow registers.
Secure monitor calls are involved in this process to allow (or deny)
access to the full range of OTP
Non volatile memory area is available on STM32. It contains various
factory programmed information such as unique device ID, analog calibration...
This patchset adds NVMEM support to access these data.
Fabrice Gasnier (4):
dt-bindings: nvmem: Add STM32 factory-programmed romem
nvmem: Add
Add documentation for STMicroelectronics STM32 Factory-programmed
read only memory area.
Signed-off-by: Fabrice Gasnier
---
.../devicetree/bindings/nvmem/st,stm32-romem.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644
From: Joerg Roedel
Segments can't be larger than the maximum DMA mapping size
supported on the platform. Take that into account when
setting the maximum segment size for a block device.
Reviewed-by: Konrad Rzeszutek Wilk
Reviewed-by: Christoph Hellwig
Signed-off-by: Joerg Roedel
---
From: Joerg Roedel
This function will be used from dma_direct code to determine
the maximum segment size of a dma mapping.
Reviewed-by: Konrad Rzeszutek Wilk
Reviewed-by: Christoph Hellwig
Signed-off-by: Joerg Roedel
---
include/linux/swiotlb.h | 6 ++
kernel/dma/swiotlb.c| 9
From: Joerg Roedel
The function returns the maximum size that can be mapped
using DMA-API functions. The patch also adds the
implementation for direct DMA and a new dma_map_ops pointer
so that other implementations can expose their limit.
Reviewed-by: Konrad Rzeszutek Wilk
Reviewed-by:
Hi,
here is the next version of this patch-set. Previous
versions can be found here:
V1: https://lore.kernel.org/lkml/20190110134433.15672-1-j...@8bytes.org/
V2: https://lore.kernel.org/lkml/20190115132257.6426-1-j...@8bytes.org/
V3:
On Wed, 30 Jan 2019 13:45:49 +0100,
Jon Hunter wrote:
>
>
> On 25/01/2019 11:06, Sameer Pujar wrote:
> > If CONFIG_PM is disabled or runtime PM calls are forbidden, the clocks
> > will not be ON. This could cause issue during probe, where hda init
> > setup is done. This patch enables clocks
From: Joerg Roedel
The function returns the maximum size that can be remapped
by the SWIOTLB implementation. This function will be later
exposed to users through the DMA-API.
Reviewed-by: Konrad Rzeszutek Wilk
Reviewed-by: Christoph Hellwig
Signed-off-by: Joerg Roedel
---
On 01/15/2019 04:27 PM, Waiman Long wrote:
> On 12/16/2018 02:37 PM, Linus Torvalds wrote:
>> On Fri, Dec 14, 2018 at 1:53 PM Waiman Long wrote:
>>> This patchset addresses 2 issues found in the dentry code and adds a
>>> new nr_dentry_negative per-cpu counter to track the total number of
>>>
From: Joerg Roedel
This function returns the maximum segment size for a single
dma transaction of a virtio device. The possible limit comes
from the SWIOTLB implementation in the Linux kernel, that
has an upper limit of (currently) 256kb of contiguous
memory it can map. Other DMA-API
From: Julian Stecklina
When the user passes a memmap=%-+
parameter to the kernel to reclassify some memory, this information is
ignored during the randomization of the kernel base address. This in
turn leads to cases where the kernel is unpacked to memory regions that
the user marked as
On 30/01/2019 08:24, Jason Yan wrote:
sas_rediscover() returns error code if discover failed for a expander
phy. And sas_ex_revalidate_domain() only returns the last phy's error
code. So when sas_revalidate_domain() prints the return value of the
discover process, we do not know if the
From: Julian Stecklina
The boot code has a limit of 4 "non-standard" regions to avoid for
KASLR. This limit is easy to reach when supplying memmap= parameters to
the kernel. In this case, KASLR would be disabled.
Increase the limit to avoid turning off KASLR even when the user is
heavily
On Thu, Jan 24, 2019 at 11:27:30AM +0800, Jiaxun Yang wrote:
> Dt-bindings doc about Loongson-1 interrupt controller
>
> Signed-off-by: Jiaxun Yang
> ---
> .../loongson,ls1x-intc.txt| 24 +++
> 1 file changed, 24 insertions(+)
> create mode 100644
>
On 30.01.19 17:24, Pierre Morel wrote:
On 29/01/2019 16:29, Michael Mueller wrote:
On 29.01.19 14:26, Halil Pasic wrote:
On Thu, 24 Jan 2019 13:59:38 +0100
Michael Mueller wrote:
The patch implements a handler for GIB alert interruptions
on the host. Its task is to alert guests that
On Thu, 24 Jan 2019 13:59:56 +0530, Kishon Vijay Abraham I wrote:
> Add syscon properties required for configuring PCIe in x2 lane mode.
>
> Signed-off-by: Kishon Vijay Abraham I
> Signed-off-by: Sekhar Nori
> ---
> Documentation/devicetree/bindings/pci/ti-pci.txt | 3 +++
> 1 file changed, 3
On 1/30/2019 8:42 AM, Rob Herring wrote:
On Mon, Jan 21, 2019 at 02:32:46PM -0700, Jeffrey Hugo wrote:
msm8998 USB has a dwc3 controller just like the existing sdm845 support.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Bjorn Andersson
---
Documentation/devicetree/bindings/usb/qcom,dwc3.txt |
On Mon, Jan 21, 2019 at 8:39 AM Baolin Wang wrote:
>
> Add charger device node and related battery node for SC2731 PMIC.
>
> Signed-off-by: Baolin Wang
> ---
> arch/arm64/boot/dts/sprd/sc2731.dtsi |6 ++
> arch/arm64/boot/dts/sprd/sp9860g-1h10.dts | 16
> 2 files
On Tue, 2019-01-29 at 21:44 +, Vineet Gupta wrote:
> On 1/29/19 2:49 AM, Eugeniy Paltsev wrote:
> > As of today we enable unaligned access unconditionally on ARCv2.
> > Lets move it under Kconfig option so we can disable it in case of
> > using HW configuration which lacks of it.
> >
> >
On Wed, Jan 30, 2019 at 12:08:45AM +0100, Borislav Petkov wrote:
> On Tue, Jan 29, 2019 at 05:52:18PM -0500, Johannes Weiner wrote:
> > "Resource Control" is a very broad term for this CPU feature, and a
> > term that is also associated with containers, cgroups etc. This can
> > easily cause
On Mon, Jan 21, 2019 at 8:39 AM Baolin Wang wrote:
>
> This patch set adds charger and fuel gauge device nodes for Spreadtrum
> SC2731 PMIC, it also removes redundant irq trigger setting for PMIC
> devices and adds nvmem cells for ADC to calibrate the ADC channel scales.
>
> Baolin Wang (4):
>
On 1/30/19 8:44 AM, Eugeniy Paltsev wrote:
>> I'd prefer to change the define of STATUS_AD_MASK itself and keep all of this
>> unchanged !
>>
> Actually I'd prefer to leave STATUS_AD_MASK untouched. Otherwise we will
> implicitly assign
> wrong value to STATUS_AD_MASK which is quite misleading.
>
On Tue 29-01-19 06:52:40, Tejun Heo wrote:
> Hello,
>
> On Tue, Jan 29, 2019 at 03:43:06PM +0100, Michal Hocko wrote:
> > All memcg events are represented non-hierarchical AFAICS
> > memcg_memory_event() simply accounts at the level when it happens. Or do
> > I miss something? Or are you talking
On Thu, Jan 24, 2019 at 04:45:20PM +0100, Kamil Konieczny wrote:
> Document DT bindings for crypto Samsung Exynos5433 SlimSSS (Slim Security
> SubSystem) IP.
>
> Reviewed-by: Krzysztof Kozlowski
> Signed-off-by: Kamil Konieczny
> ---
> .../devicetree/bindings/crypto/samsung-sss.txt | 14
On Tue, Jan 22, 2019 at 2:21 PM Baolin Wang wrote:
>
> The DMA engine clients can trigger DMA engine automatically by setting
> the corresponding hardware slave id for the DMA engine. Thus add one
> cell to present the hardware slave id for DMA clients.
>
> Signed-off-by: Baolin Wang
> ---
>
On Wed, Jan 30, 2019 at 6:03 PM Heikki Krogerus
wrote:
>
> When the connections are defined in firmware, struct
> device_connection will have the fwnode member pointing to
> the device node (struct fwnode_handle) of the requested
> device, and the endpoint will not be used at all in that
> case.
Hi Roman,
On 01/28, Roman Gushchin wrote:
>
> Yes, I think you're right: cgroup_exit() should check CGRP_FREEZE bit,
> not CGRP_FROZEN. Like cgroup_post_fork() does (a one-liner change below).
but this won't fix all problems? it seems that you missed my other concerns.
Firstly, this doesn't
On Sat, Oct 13, 2018 at 08:49:19AM +0800, changbin...@gmail.com wrote:
> From: Du Changbin
>
> Currently, the pci_size() function actually return 'size-1'.
> Make it return real size to avoid confusing.
>
> Signed-off-by: Du Changbin
Applied to pci/enumeration for v5.1, thanks!
I think it's
On Sun, Jan 27, 2019 at 09:09:14AM -0800, Robert Eshleman wrote:
> This patch adds device tree documentation for the max44009 ambient light
> sensor.
Wrap long lines.
Follow the subject style used for the directory (git log --oneline
). In this case, 'dt-bindings: iio: light: Add max44009'
>
On 15/01/2019 13:58, Julien Thierry wrote:
[...]> @@ -6151,6 +6159,20 @@ void ___might_sleep(const char *file, int line,
int preempt_offset)
> EXPORT_SYMBOL(___might_sleep);
> #endif
>
> +#ifdef CONFIG_DEBUG_UACCESS_SLEEP
> +void __might_resched(const char *file, int line)
> +{
> + if
On Wed, Jan 30, 2019 at 04:48:47PM +0100, Vincent Guittot wrote:
> On Wed, 30 Jan 2019 at 14:40, Peter Zijlstra wrote:
> >
>
> >
> > static inline void list_del_leaf_cfs_rq(struct cfs_rq *cfs_rq)
> > @@ -352,7 +354,12 @@ static inline void list_del_leaf_cfs_rq(struct cfs_rq
> > *cfs_rq)
> >
On 1/30/19 10:35 AM, Daniel Vetter wrote:
> On Tue, Jan 29, 2019 at 02:20:06PM -0600, Gustavo A. R. Silva wrote:
>> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
>> where we are expecting to fall through.
>>
>> This patch fixes the following warnings:
>>
>>
On Wed, Jan 30, 2019 at 03:24:12PM +0100, Greg KH wrote:
> On Wed, Jan 23, 2019 at 12:41:16PM +0100, Christian Brauner wrote:
> > binderfs should not have a separate device_initcall(). When a kernel is
> > compiled with CONFIG_ANDROID_BINDERFS register the filesystem alongside
> >
On 19/01/19 21:04, Luwei Kang wrote:
> static struct pt_pmu pt_pmu;
>
> @@ -1260,6 +1262,14 @@ void intel_pt_interrupt(void)
> struct pt_buffer *buf;
> struct perf_event *event = pt->handle.event;
>
> + if (pt->vcpu) {
> + /* Inject PMI to Guest */
> +
On Mon, Jan 28 2019 at 07:19 -0700, Linus Walleij wrote:
On Thu, Jan 24, 2019 at 9:22 PM Lina Iyer wrote:
This is a bug fix submission of the v1 posted here [1]. The discussion on how
to represent the wakeup-parent interrupt controller is on-going [2] here. The
reiew comments in [1], from
Now that PM_OPP provides a helper function to estimate the power
consumed by CPUs, make sure to try and register an Energy Model (EM)
from cpufreq-dt, hence ensuring interested subsystems (the task
scheduler, for example) can make use of that information when available.
Signed-off-by: Quentin
The Energy Model (EM) framework provides an API to let drivers register
the active power of CPUs. The drivers are expected to provide a callback
method which estimates the power consumed by a CPU at each available
performance levels. How exactly this should be implemented, however,
depends on the
Now that PM_OPP provides a helper function to estimate the power
consumed by CPUs, make sure to try and register an Energy Model (EM)
from scpi-cpufreq, hence ensuring interested subsystems (the task
scheduler, for example) can make use of that information when available.
Signed-off-by: Quentin
The Energy Model (EM) framework provides an API to register the active
power of CPUs. Call this API from the scmi-cpufreq driver by using the
power costs obtained from firmware. This is done to ensure interested
subsystems (the task scheduler, for example) can make use of the EM
when available.
The Energy Model (EM) framework feeds interested subsystems (the
scheduler/EAS as of now) with power costs provided by drivers. Yet, no
driver is actually doing that upstream yet. This series updates a set of
CPUFreq drivers in order to register power costs in the EM framework for
some of the Arm
From: Dietmar Eggemann
Now that PM_OPP provides a helper function to estimate the power
consumed by CPUs, make sure to try and register an Energy Model (EM)
from the arm_big_little CPUFreq driver, hence ensuring interested
subsystems (the task scheduler, for example) can make use of that
Hello, Michal.
On Wed, Jan 30, 2019 at 05:50:58PM +0100, Michal Hocko wrote:
> > Yeah, cgroup.events and .stat files as some of the local stats would
> > be useful too, so if we don't flip memory.events we'll end up with sth
> > like cgroup.events.local, memory.events.tree and memory.stats.local,
On Tue, Oct 16, 2018 at 06:44:43PM +0800, honghui.zh...@mediatek.com wrote:
> From: Honghui Zhang
>
> The PCI configuration space header type defines the layout of the rest
> of the header (PCI r3.0 sec 6.1, PCIe r4.0 sec 7.5.1.1.9) while the
> resource assignment is based on the configuration
On Mon, Jan 28, 2019 at 10:49:31AM +0100, Ricardo Ribalda Delgado wrote:
> Bindings for dac7612.
>
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Ricardo Ribalda Delgado
> ---
> .../bindings/iio/dac/ti,dac7612.txt | 29 +++
> MAINTAINERS
On 1/30/19 4:36 AM, Andrew Morton wrote:
> On Fri, 11 Jan 2019 22:01:16 +0300 Andrey Ryabinin
> wrote:
>
>>
>>
>> On 12/17/18 6:03 PM, Anders Roxell wrote:
>>> When booting an allmodconfig kernel, there are a lot of false-positives.
>>> With a message like this 'UBSAN: Undefined behaviour
On Wed, Jan 30, 2019 at 11:13:53AM +0800, Kyle Tso wrote:
> When Sink negotiates PPS, the voltage range of selected PPS APDO might
> not cover the previous voltage (out_volt). If the previous out_volt is
> lower than the new min_volt, the output voltage in RDO might be set to
> an invalid value.
On 23/01/19 18:50, Konrad Rzeszutek Wilk wrote:
>> +if (dirty)
>> +kvm_release_pfn_dirty(map->pfn);
>> +else
>> +kvm_release_pfn_clean(map->pfn);
>> +map->hva = NULL;
> I keep on having this gnawing feeling that we MUST set map->page to
> NULL.
>
> That is I
On 25/01/19 19:28, Raslan, KarimAllah wrote:
> So the simple way to do it is:
>
> 1- Pass 'mem=' in the kernel command-line to limit the amount of memory
> managed
> by the kernel.
> 2- Map this physical memory you want to give to the guest with
> mmap("/dev/mem",
On Wed, 30 Jan 2019 15:08:29 +
wrote:
> From: Tudor Ambarus
>
> Set the QSPI controller in Serial Memory Mode at init and not
> at each exec_op() call.
If you ever want to support regular SPI you'll have to put it back to
atmel_qspi_exec_op(), so I'm not sure this is a good move. Another
On 30/11/18 21:41, Eric Northup wrote:
> On Mon, Nov 5, 2018 at 10:01 PM Liu Jingqi wrote:
>>
>> Direct stores instructions MOVDIRI and MOVDIR64B will be available in
>> Tremont and other future x86 processors,
>> and need to be exposed to guest VM.
>
> It seems like KVM's emulator should be
On 06/11/18 06:55, Liu Jingqi wrote:
> Direct stores instructions MOVDIRI and MOVDIR64B will be available in
> Tremont and other future x86 processors,
> and need to be exposed to guest VM.
>
> The release document ref below link:
> https://software.intel.com/sites/default/files/managed/c5/15/\
>
On Wed, 30 Jan 2019 15:08:31 +
wrote:
> From: Tudor Ambarus
>
> Cosmetic change, no functional change.
>
> Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
> ---
> drivers/spi/atmel-quadspi.c | 9 -
> 1 file changed, 4 insertions(+), 5 deletions(-)
>
> diff --git
Michael Ellerman writes:
> Joe Lawrence writes:
>> From: Nicolai Stange
>>
>> The ppc64 specific implementation of the reliable stacktracer,
>> save_stack_trace_tsk_reliable(), bails out and reports an "unreliable
>> trace" whenever it finds an exception frame on the stack. Stack frames
>> are
On Wed, 30 Jan 2019 15:08:33 +
wrote:
> From: Tudor Ambarus
>
> Let general names to core drivers.
>
> Signed-off-by: Tudor Ambarus
> ---
> drivers/spi/atmel-quadspi.c | 52
> ++---
> 1 file changed, 26 insertions(+), 26 deletions(-)
>
> diff
On Wed, 30 Jan 2019 15:08:35 +
wrote:
> From: Tudor Ambarus
>
> The cast is done implicitly.
>
> Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
> ---
> drivers/spi/atmel-quadspi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
On Wed, 30 Jan 2019 15:08:38 +
wrote:
> From: Tudor Ambarus
>
> Return -ENOTSUPP when atmel_qspi_find_mode() fails. Propagate
> the error in atmel_qspi_exec_op().
>
> Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
> ---
> drivers/spi/atmel-quadspi.c | 4 ++--
> 1 file
On 30/01/2019 08:24, Jason Yan wrote:
Now if a new device replaced a old device, the sas address will change.
Hmmm... not if it's a SATA disk, which would have some same invented SAS
address.
We unregister the old device and discover the new device in one
revalidation process. But after we
On Wed, Jan 30, 2019 at 09:14:45AM -0700, Jeremy Gebben wrote:
>
> Allow support for chips that support more than 8 frequencies.
> The size still must be a power of two.
>
This is risky. Someone later may not know/remember and
expand the table without maintaining that restriction.
I would
On 2019-01-29 9:18 p.m., Jason Gunthorpe wrote:
> Every attempt to give BAR memory to struct page has run into major
> trouble, IMHO, so I like that this approach avoids that.
>
> And if you don't have struct page then the only kernel object left to
> hang meta data off is the VMA itself.
>
>
I have a good faith belief that use of the copyrighted materials
described above on the infringing web pages is not authorized by the
copyright owner, or its agent, or the law. I have taken fair use into
consideration.
I swear, under penalty of perjury, that the information in this
Hi Sakari,
> -Original Message-
> From: Sakari Ailus [mailto:sakari.ai...@linux.intel.com]
> Sent: Wednesday, January 30, 2019 12:59 AM
> To: Mani, Rajmohan
> Cc: Mauro Carvalho Chehab ; Greg Kroah-Hartman
> ; linux-me...@vger.kernel.org;
> de...@driverdev.osuosl.org;
On Wed, 30 Jan 2019 15:08:40 +
wrote:
> From: Tudor Ambarus
>
> Adopt the SPDX license identifiers to ease license compliance
> management.
>
> Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
> ---
> drivers/spi/atmel-quadspi.c | 13 +
> 1 file changed, 1
On Wed, Jan 30, 2019 at 11:46:26AM -0500, Johannes Weiner wrote:
> This is still awefully close to the cgroup CPU resource
> controller. Since it's more hardware-specific, and the config symbol
> also has the x86 in it, how about "x86 CPU resource control support"?
Fine by me.
What about
On Wed, 30 Jan 2019 01:17:06 -0800
Christoph Hellwig wrote:
> On Tue, Jan 29, 2019 at 04:24:45PM +0100, Thomas Bogendoerfer wrote:
> > > From an abstraction point of view this doesn't really belong into
> > > a bridge driver as it is a global exported function. I guess we can
> > > keep it here
On Tue, Jan 29, 2019 at 7:03 PM Jerome Glisse wrote:
[..]
> > > 1) Convert ODP to use HMM underneath so that we share code between
> > > infiniband ODP and GPU drivers. ODP do support DAX today so i can
> > > not convert ODP to HMM without also supporting DAX in HMM otherwise
> > >
On Wed, 30 Jan 2019 15:08:43 +
wrote:
> From: Tudor Ambarus
>
> Introduced in:
> commit b60557876849 ("ARM: dts: at91: sama5d2: switch to new clock binding")
>
> Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
> ---
> Documentation/devicetree/bindings/spi/atmel-quadspi.txt
A deadlock has been seen when swicthing clocksources which use PM runtime.
The call path is:
change_clocksource
...
write_seqcount_begin
...
timekeeping_update
...
sh_cmt_clocksource_enable
...
rpm_resume
Recently, Free Electrons was renamed to Bootlin[1]. Less recently, the
Linux Cross Reference (LXR) at lxr.free-electrons.com was replaced by
Elixir[2], and lxr.free-electrons.com redirected first to
elixir.free-electrons.com and now to elixir.bootlin.com.
[1]:
On Wed, Jan 30, 2019 at 10:55:43AM -0500, Jerome Glisse wrote:
> Even outside GPU driver, device driver like RDMA just want to share their
> doorbell to other device and they do not want to see those doorbell page
> use in direct I/O or anything similar AFAICT.
At least Mellanox HCA support and
Hi folks,
I would like to attend the LSF/MM Summit 2019. I'm interested in most MM
topics, particularly the NUMA API topic proposed by Jerome since it is
related to my below proposal.
I would like to share some our usecases, needs and approaches about
using NVDIMM as a NUMA node.
We
On Wed, Jan 30, 2019 at 04:07:05PM +0100, Stefan Wahren wrote:
> This adds the tachometer interrupt to the pwm-fan binding, which is
> necessary for RPM support.
>
> Signed-off-by: Stefan Wahren
> ---
> Documentation/devicetree/bindings/hwmon/pwm-fan.txt | 3 +++
> 1 file changed, 3
On 30/01/2019 08:24, Jason Yan wrote:
When we failed to discover the device, the phy address is still kept
in ex_phy. So when the next time we revalidate this phy the
address and device type is the same, it will be considered as flutter
and will not be discovered again. So the device will not be
On 2019-01-30 10:26 a.m., Christoph Hellwig wrote:
> On Wed, Jan 30, 2019 at 10:55:43AM -0500, Jerome Glisse wrote:
>> Even outside GPU driver, device driver like RDMA just want to share their
>> doorbell to other device and they do not want to see those doorbell page
>> use in direct I/O or
On Wed, 30 Jan 2019 15:08:45 +
wrote:
> From: Tudor Ambarus
>
> The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
> access, the other for the qspi core and phy. Both are mandatory.
>
> Signed-off-by: Tudor Ambarus
> ---
>
In function ts2020_set_tuner_rf(), local variable "utmp" could
be uninitialized if function regmap_read() returns -EINVAL.
However, this value is used in if statement and written to
the register, which is potentially unsafe.
Signed-off-by: Yizhuo
---
drivers/media/dvb-frontends/ts2020.c | 5
On Wed, Jan 30, 2019 at 06:25:20PM +0100, Thomas Bogendoerfer wrote:
>
> and it's already there:-) Each struct device has a field numa_node and
> pci_bus has
> contains a struct device. arm64 is already using it only not so nice part is
> the
> usage of pcibios_root_bridge_prepare() to set the
On Wed, Jan 30, 2019 at 06:26:53PM +0100, Christoph Hellwig wrote:
> On Wed, Jan 30, 2019 at 10:55:43AM -0500, Jerome Glisse wrote:
> > Even outside GPU driver, device driver like RDMA just want to share their
> > doorbell to other device and they do not want to see those doorbell page
> > use in
On Wed, 30 Jan 2019 at 15:27, Vincent Guittot
wrote:
>
> On Wed, 30 Jan 2019 at 15:01, Peter Zijlstra wrote:
> >
> > On Wed, Jan 30, 2019 at 03:01:04PM +0100, Peter Zijlstra wrote:
> > > --- a/kernel/sched/fair.c
> > > +++ b/kernel/sched/fair.c
> > > @@ -282,13 +282,15 @@ static inline struct
Hi David,
On Tue, Jan 29, 2019 at 06:18:30PM +0100, David Sterba wrote:
> On Mon, Jan 28, 2019 at 04:24:26PM -0500, Dennis Zhou wrote:
> > As mentioned above, a requirement that differs zstd from zlib is that
> > higher levels of compression require more memory. To manage this, each
> >
On Wed 30-01-19 09:06:58, Tejun Heo wrote:
> Hello, Michal.
>
> On Wed, Jan 30, 2019 at 05:50:58PM +0100, Michal Hocko wrote:
> > > Yeah, cgroup.events and .stat files as some of the local stats would
> > > be useful too, so if we don't flip memory.events we'll end up with sth
> > > like
Do you need to make white background for your photos?
Adding clipping path, or retouching?
We can do it for you.
Let's start with testing for your photos.
Thanks,
Jane
Do you need to make white background for your photos?
Adding clipping path, or retouching?
We can do it for you.
Let's start with testing for your photos.
Thanks,
Jane
Hi Mathieu,
On 01/22/2019 06:11 PM, Mathieu Poirier wrote:
Add a "sinks" directory entry so that users can see all the sinks
available in the system in a single place. Individual sink are added
as they are registered with the coresight bus.
A couple of minor comments.
Signed-off-by:
On Wed, 30 Jan 2019 15:08:47 +
wrote:
> +static int atmel_sam9x60_qspi_clk_prepare_enable(struct atmel_qspi *aq)
> +{
> + struct device *dev = >pdev->dev;
> + int ret;
> +
> + if (!aq->clk) {
> + /* Get the peripheral clock */
> + aq->clk =
On Wed, Jan 30, 2019 at 01:01:54PM +, David Howells wrote:
> Karel Zak wrote:
>
> > It seems more elegant is to ask for Nth option as expected by fsinfo().
>
> More elegant yes, but there's an issue with atomiticity[*]. I'm in the
> process of switching to something that returns you a
On Wed, Jan 30, 2019 at 09:02:08AM +0100, Christoph Hellwig wrote:
> On Tue, Jan 29, 2019 at 08:58:35PM +, Jason Gunthorpe wrote:
> > On Tue, Jan 29, 2019 at 01:39:49PM -0700, Logan Gunthorpe wrote:
> >
> > > implement the mapping. And I don't think we should have 'special' vma's
> > > for
The pull request you sent on Wed, 30 Jan 2019 10:08:56 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git
> tags/gpio-v5.0-3
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/877ef51d53abfdadabc64809d045d9c27c1cf757
Thank you!
--
The pull request you sent on Wed, 30 Jan 2019 16:06:23 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
> tags/iommu-fixes-v5.0-rc4
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/1c0490ce902206f4685f812fa81304fd1adf4e35
Thank you!
--
From: Sandesh Kenjana Ashok
Lines over 80 characters are adjusted according to standards
Signed-off-by: Sandesh Kenjana Ashok
---
drivers/staging/wlan-ng/cfg80211.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/staging/wlan-ng/cfg80211.c
On 01/22/2019 06:11 PM, Mathieu Poirier wrote:
This patch uses the information conveyed by perf_event::attr::config2
to select a sink to use for the session. That way a sink can easily be
selected to be used by more than one source, something that isn't currently
possible with the sysfs
On 01/22/2019 06:11 PM, Mathieu Poirier wrote:
Moving definition of EVENT_SOURCE_DEVICE_PATH to pmu.h so that it can be
used by other files than pmu.c
Signed-off-by: Mathieu Poirier
---
tools/perf/util/pmu.c | 2 --
tools/perf/util/pmu.h | 1 +
2 files changed, 1 insertion(+), 2
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