On Tue, May 14, 2019 at 09:00:19AM +0530, Vidya Sagar wrote:
> There is nothing broken in Tegra194 root port as such, rather, this is more
> of software configuration choice and we are going with legacy interrupts than
> MSI interrupts (as Tegra194 doesn't support raising PME interrupts through
On 5/13/19 7:47 AM, Roberto Sassu wrote:
> On 5/13/2019 11:07 AM, Rob Landley wrote:
Wouldn't the below work even before enforcing signatures on external
initramfs:
1. Create an embedded initramfs with an /init that does the xattr
parsing/setting. This will be verified as part
On 5/13/19 5:09 PM, Mimi Zohar wrote:
>> Ok, but wouldn't my idea still work? Leave the default compiled-in
>> policy set to not appraise initramfs. The embedded /init sets all the
>> xattrs, changes the policy to appraise tmpfs, and then exec's the real
>> init? Then everything except the
Unnecessary blank lines do NOT help readability, so remove them.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index
On Mon, May 13, 2019 at 06:01:39PM +, mario.limoncie...@dell.com wrote:
> When using HMB the SSD will be writing to some memory mapped region.
> Writing to
> that region would use DMA to access host memory, no?
Memory mapped region? It will use the devices DMA engine to write
host memory,
On Mon, 13 May 2019 at 21:35, Radim Krčmář wrote:
>
> 2019-05-13 17:46+0800, Wanpeng Li:
> > From: Wanpeng Li
> >
> > MSR IA32_MSIC_ENABLE bit 18, according to SDM:
> >
> > | When this bit is set to 0, the MONITOR feature flag is not set
> > (CPUID.01H:ECX[bit 3] = 0).
> > | This indicates
This patch add debugfs for mipicsi driver.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 65 +++
1 file changed, 65 insertions(+)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
b/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
This patch get the w/h/bytepwerline to save in mtk_mipicsi.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 41 +++
1 file changed, 41 insertions(+)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
This patch add debug message for mipicsi driver.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 58 ++-
1 file changed, 56 insertions(+), 2 deletions(-)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
Add MIPI-CSI2 dt-binding for Mediatek MT2712 SoC
Signed-off-by: Stu Hsieh
---
.../bindings/media/mediatek-mipicsi-camsv.txt | 53 ++
.../media/mediatek-mipicsi-common.txt | 19 +++
.../bindings/media/mediatek-mipicsi.txt | 54 +++
3 files
This patch add ISR for writing the data to buffer
When mipicsi HW complete to write the data in buffer,
the interrupt woulb be trigger.
So, the ISR need to clear interrupt status for next interrupt.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 110
This patch add function to support SerDes for link number.
Mt2712 can server at most four camera link for each mipicsi port.
Therefore, driver need to know how many camera link in SerDes and
set the mipicsi HW to serve.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c
This patch add mediatek mipicsi driver for mt2712,
including probe function to get the value from device tree,
and register to v4l2 the host device.
Signed-off-by: Stu Hsieh
---
drivers/media/platform/mtk-mipicsi/Makefile | 4 +
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 587
Hello Angus,
I'll add the linux list and Mark to CC as this sounds like a regression
which may impact to other regulator drivers too. Mark, please let me
know if you don't feel adding you to discussions like this are
appropriate so I don't do it in the future.
On Mon, 2019-05-13 at 17:21 -0700,
This patch add the check for non-supported color format
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 20 +++
1 file changed, 20 insertions(+)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
This patch set the output address in HW reg when buffer queue and ISR.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
This patch enable/disable cmos setting for mt2712 when
vb2 start/stop streaming.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
This patch enable/disable ana clk when power on/off
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
This patch register the soc_camera host for mt2712 mipicsi.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 417 ++
1 file changed, 417 insertions(+)
diff --git a/drivers/media/platform/mtk-mipicsi/mtk_mipicsi.c
Add mediatek mipicsi driver for Mediatek SOC MT2712
Change in v3:
- Move register setting to the bottom of this patch series
and merge the patch "[media] mtk-mipicsi: add pm function" to
"[media] mtk-mipicsi: add mediatek mipicsi driver for mt2712"
- Remove the patch
"[media] mtk-mipicsi:
This patch add function to get the format
This function can get the subdev format and host format.
Calculate the number of format which intersection of subdev and host.
Signed-off-by: Stu Hsieh
---
.../media/platform/mtk-mipicsi/mtk_mipicsi.c | 151 ++
1 file changed, 151
Yury Norov writes:
> On Fri, May 10, 2019 at 01:32:22PM +1000, Michael Ellerman wrote:
>> Yury Norov writes:
>> > On Tue, May 07, 2019 at 08:54:31AM -0400, Rafael Aquini wrote:
>> >> On Mon, May 06, 2019 at 11:53:43AM -0400, Joel Savitz wrote:
>> >> > There is currently no easy and
On 5/13/2019 8:50 PM, Rob Herring wrote:
On Tue, May 7, 2019 at 4:20 AM Vidya Sagar wrote:
On 4/26/2019 9:13 PM, Rob Herring wrote:
On Wed, Apr 24, 2019 at 10:49:58AM +0530, Vidya Sagar wrote:
Add support for Tegra194 PCIe controllers. These controllers are based
on Synopsys DesignWare core
On Mon 13-05-19 21:36:59, Yang Shi wrote:
> On Mon, May 13, 2019 at 2:45 PM Michal Hocko wrote:
> >
> > On Mon 13-05-19 14:09:59, Yang Shi wrote:
> > [...]
> > > I think we can just account 512 base pages for nr_scanned for
> > > isolate_lru_pages() to make the counters sane since
Hi.
On Mon, May 13, 2019 at 03:37:56PM +0300, Kirill Tkhai wrote:
> > Yes, I get your point. But the intention is to avoid another hacky trick
> > (LD_PRELOAD), thus *something* should *preferably* be done on the
> > kernel level instead.
>
> I don't think so. Does userspace hack introduce some
On 5/3/19 14:19, Krzysztof Kozlowski wrote:
> On Wed, 13 Mar 2019 at 20:35, Alexandre Bailon wrote:
>>
>> This series implements busfreq, a framework used in MXP's
>> tree to scale the interconnect and dram frequencies.
>> In the vendor tree, device's driver request for a
>> performance level,
Hi Henry,
On 4/30/19 11:51, Henry Chen wrote:
> Introduce Mediatek MT8183 specific provider driver using the
> interconnect framework.
>
> Signed-off-by: Henry Chen
> ---
> drivers/interconnect/Kconfig | 1 +
> drivers/interconnect/Makefile | 1 +
>
Borislav Petkov writes:
> On Fri, May 10, 2019 at 04:13:20PM +0200, Borislav Petkov wrote:
>> On Fri, May 10, 2019 at 08:50:52PM +1000, Michael Ellerman wrote:
>> > Yeah that looks better to me. I didn't think about the case where EDAC
>> > core is modular.
>> >
>> > Do you want me to send a new
On Wed, 24 Apr 2019, Mason Yang wrote:
> Add a driver for Renesas R-Car Gen3 RPC-IF SPI controller.
>
> Signed-off-by: Mason Yang
> Signed-off-by: Sergei Shtylyov
> ---
> drivers/spi/Kconfig | 6 +
> drivers/spi/Makefile | 1 +
> drivers/spi/spi-renesas-rpc.c | 571
>
On Mon, May 13, 2019 at 04:10:35PM +0200, Radim Krčmář wrote:
> 2019-05-12 13:53+0200, Marc Haber:
> > since updating my home desktop machine to kernel 5.1.1, KVM guests
> > started on that machine segfault after booting:
> [...]
> > Any idea short of bisecting?
>
> It has also been spotted by
Christophe Leroy writes:
> Some SCC functions like the QMC requires an extended parameter RAM.
> On modern 8xx (ie 866 and 885), SPI area can already be relocated,
> allowing the use of those functions on SCC2. But SCC3 and SCC4
> parameter RAM collide with SMC1 and SMC2 parameter RAMs.
>
> This
"Gautham R. Shenoy" writes:
> From: "Gautham R. Shenoy"
>
> During a memory hotplug operations involving resizing of the HPT, we
> invoke a stop_machine() to perform the resizing. In this code path, we
> end up recursively taking the cpu_hotplug_lock, first in
> memory_hotplug_begin() and then
"Gautham R. Shenoy" writes:
> From: "Gautham R. Shenoy"
>
> Subject: Re: [RESEND PATCH] powerpc/pseries: Fix cpu_hotplug_lock acquisition
> in resize_hpt
ps. A "RESEND" implies the patch is unchanged and you're just resending
it because it was ignored.
In this case it should have just been
On Mon, May 13, 2019 at 11:13:34AM -0700, Andy Lutomirski wrote:
> On Mon, May 13, 2019 at 9:28 AM Alexandre Chartre
> wrote:
> > Actually, I am not sure this is effectively useful because the IRQ
> > handler is probably faulting before it tries to exit isolation, so
> > the isolation exit will
On Tue, May 14, 2019 at 11:32:19AM +0800, Kefeng Wang wrote:
> After commit 415b43bdb008 "tty: serial: uartlite: Move uart register to
> probe", calling uart_unregister_driver unconditionally will trigger a
> null pointer dereference due to ulite_uart_driver may not registed.
>
> CPU: 1 PID:
On Mon, May 13, 2019 at 11:18:41AM -0700, Andy Lutomirski wrote:
> On Mon, May 13, 2019 at 7:39 AM Alexandre Chartre
> wrote:
> >
> > pcpu_base_addr is already mapped to the KVM address space, but this
> > represents the first percpu chunk. To access a per-cpu buffer not
> > allocated in the
Commit-ID: c7a286577d7592720c2f179aadfb325a1ff48c95
Gitweb: https://git.kernel.org/tip/c7a286577d7592720c2f179aadfb325a1ff48c95
Author: Stephane Eranian
AuthorDate: Mon, 13 May 2019 17:34:00 -0700
Committer: Ingo Molnar
CommitDate: Tue, 14 May 2019 09:07:58 +0200
perf/x86/intel: Allow
- Original Message -
>
>
> On May 13, 2019 4:01 PM, Yang Shi wrote:
>
>
> On 5/13/19 9:38 AM, Will Deacon wrote:
> > On Fri, May 10, 2019 at 07:26:54AM +0800, Yang Shi wrote:
> >> diff --git a/mm/mmu_gather.c b/mm/mmu_gather.c
> >> index 99740e1..469492d 100644
> >> ---
Hi Eduardo,
On Monday 13 May 2019 at 20:40:59 (-0700), Eduardo Valentin wrote:
> On Fri, May 03, 2019 at 10:44:09AM +0100, Quentin Perret wrote:
> > The newly introduced Energy Model framework manages power cost tables in
> > a generic way. Moreover, it supports a several types of models since
Hi Oleksandr,
On Mon, May 13, 2019 at 6:00 PM Oleksandr wrote:
> On 13.05.19 18:13, Geert Uytterhoeven wrote:
> >> So, if the DT bindings for the counter module is not an option (if I
> >> correctly understood a discussion pointed by Geert in another letter),
> >> we should probably prevent all
> On May 14, 2019, at 12:15 AM, Jan Stancek wrote:
>
>
> - Original Message -
>> On May 13, 2019 4:01 PM, Yang Shi wrote:
>>
>>
>> On 5/13/19 9:38 AM, Will Deacon wrote:
>>> On Fri, May 10, 2019 at 07:26:54AM +0800, Yang Shi wrote:
diff --git a/mm/mmu_gather.c b/mm/mmu_gather.c
On Mon, May 13, 2019 at 07:02:30PM -0700, Andy Lutomirski wrote:
> This sounds like a great use case for static_call(). PeterZ, do you
> suppose we could wire up static_call() with the module infrastructure
> to make it easy to do "static_call to such-and-such GPL module symbol
> if that symbol
Andy Shevchenko writes:
> On Tue, May 07, 2019 at 02:22:18PM +0200, Esben Haabendal wrote:
>> Andy Shevchenko writes:
>> > On Tue, May 07, 2019 at 01:35:58PM +0200, Esben Haabendal wrote:
>> >> Lee Jones writes:
>> >> > On Thu, 02 May 2019, Esben Haabendal wrote:
>> >> >
>> >> >> Could you
* Masami Hiramatsu wrote:
> +/* Return the length of string -- including null terminal byte */
> +static nokprobe_inline int
> +fetch_store_strlen_user(unsigned long addr)
> +{
> + return strnlen_unsafe_user((__force const void __user *)addr,
> +
The function should return NULL in case no device is found, but it
always returns the last checked mc device from the list even if the
index did not match. This patch fixes this.
I did some analysis why this did not raise any issues for about 3
years and the reason is that edac_mc_find() is
(please, wrap our emails at 78 chars)
On Tue, May 14, 2019 at 12:08:23AM +0300, Liran Alon wrote:
> 3) From (2), we should have theoretically deduced that for every
> #VMExit, there is a need to kick the sibling hyperthread also outside
> of guest until the #VMExit is completed.
That's not in
On Thu, May 09, 2019 at 01:42:39PM +0800, Lanqing Liu wrote:
> When userspace opens a serial port for console, uart_port_startup()
> is called. This function assigns the uport->cons->cflag value to
> TTY->termios.c_cflag, then it is cleared to 0. When the user space
> closes this serial port, the
Andy Shevchenko writes:
> On Tue, May 07, 2019 at 02:22:18PM +0200, Esben Haabendal wrote:
>> Andy Shevchenko writes:
>> > On Tue, May 07, 2019 at 01:35:58PM +0200, Esben Haabendal wrote:
>> >> Lee Jones writes:
>> >> > On Thu, 02 May 2019, Esben Haabendal wrote:
>> >> >
>> >> >> Could you
On Mon, May 13, 2019 at 07:07:36PM -0700, Andy Lutomirski wrote:
> On Mon, May 13, 2019 at 2:09 PM Liran Alon wrote:
> > The hope is that the very vast majority of #VMExit handlers will be
> > able to completely run without requiring to switch to full address
> > space. Therefore, avoiding the
Hello,
On Tue, 14 May 2019 09:53:16 +0800
masonccy...@mxic.com.tw wrote:
> > > ---
> > > static void macronix_nand_onfi_init(struct nand_chip *chip)
> > > {
> > > struct nand_parameters *p = >parameters;
> > >
Hi Linus,
Please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/fuse.git
tags/fuse-update-5.2
Add more caching controls for userspace filesystems to use, as well as bug
fixes and cleanups.
Thanks,
Miklos
---
Alan Somers (3):
fuse: document fuse_fsync_in.fsync_flags
Hi Linus,
Please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/vfs.git
tags/ovl-update-5.2
Just bug fixes in this small update.
Thanks,
Miklos
---
Amir Goldstein (4):
ovl: fix missing upper fs freeze protection on copy up for ioctl
ovl: support stacked
> On 14 May 2019, at 10:29, Peter Zijlstra wrote:
>
>
> (please, wrap our emails at 78 chars)
>
> On Tue, May 14, 2019 at 12:08:23AM +0300, Liran Alon wrote:
>
>> 3) From (2), we should have theoretically deduced that for every
>> #VMExit, there is a need to kick the sibling hyperthread
Lee Jones writes:
> On Tue, 07 May 2019, Esben Haabendal wrote:
>
>> Lee Jones writes:
>>
>> > On Fri, 26 Apr 2019, Esben Haabendal wrote:
>> >
>> >> The serial8250-mfd driver is for adding 8250/16550 UART ports as functions
>> >> to an MFD driver.
>> >>
>> >> When calling mfd_add_device(),
On 5/14/19 9:07 AM, Peter Zijlstra wrote:
On Mon, May 13, 2019 at 11:13:34AM -0700, Andy Lutomirski wrote:
On Mon, May 13, 2019 at 9:28 AM Alexandre Chartre
wrote:
Actually, I am not sure this is effectively useful because the IRQ
handler is probably faulting before it tries to exit
On Sat, May 11, 2019 at 08:43:23AM +0200, Knut Omang wrote:
> On Fri, 2019-05-10 at 14:59 -0700, Frank Rowand wrote:
> > On 5/10/19 3:23 AM, Brendan Higgins wrote:
> > >> On Fri, May 10, 2019 at 7:49 AM Knut Omang wrote:
> > >>>
> > >>> On Thu, 2019-05-09 at 22:18 -0700, Frank Rowand wrote:
> >
From: Nadav Amit
Date: Fri, May 10, 2019 at 7:45 PM
To:
Cc: Borislav Petkov, , Nadav Amit, Andy
Lutomirsky, Ingo Molnar, Peter Zijlstra, Thomas Gleixner, Jann Horn
> It may be useful to check in runtime whether certain assertions are
> violated even during speculative execution. This can allow
> On 14 May 2019, at 5:07, Andy Lutomirski wrote:
>
> On Mon, May 13, 2019 at 2:09 PM Liran Alon wrote:
>>
>>
>>
>>> On 13 May 2019, at 21:17, Andy Lutomirski wrote:
>>>
I expect that the KVM address space can eventually be expanded to include
the ioctl syscall entries. By
On Mon, May 13, 2019 at 9:23 PM Ulf Hansson wrote:
>
> This series enables support for hierarchical CPU arrangement, managed by PSCI
> for ARM/ARM64. It's based on using the generic PM domain (genpd), which
> recently was extended to manage devices belonging to CPUs.
ACK for the patches touching
Hi Michael,
On Tue, Apr 30, 2019 at 07:34:12PM +0200, Michael Tretter wrote:
> On Thu, 24 Jan 2019 19:04:19 +0900, Tomasz Figa wrote:
[snip]
> > +State machine
> > +=
> > +
> > +.. kernel-render:: DOT
> > + :alt: DOT digraph of encoder state machine
> > + :caption: Encoder state
On Mon, May 13, 2019 at 5:10 PM Keith Busch wrote:
>
> On Mon, May 13, 2019 at 03:05:42PM +, mario.limoncie...@dell.com wrote:
> > This system power state - suspend to idle is going to freeze threads.
> > But we're talking a multi threaded kernel. Can't there be a timing problem
> > going
>
BUG: unable to handle kernel paging request at a018f000
PGD 3270067 P4D 3270067 PUD 3271063 PMD 2307eb067 PTE 0
Oops: [#1] PREEMPT SMP
CPU: 0 PID: 4138 Comm: modprobe Not tainted 5.1.0-rc7+ #1
Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS
Add optional drive-strength-microamp property
Signed-off-by: Guillaume La Roque
Reviewed-by: Martin Blumenstingl
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 4
1 file changed, 4 insertions(+)
diff --git
add drive-strength bank regiter and bit value for G12A SoC
Signed-off-by: Guillaume La Roque
Reviewed-by: Martin Blumenstingl
---
drivers/pinctrl/meson/pinctrl-meson-g12a.c | 36 +++---
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git
drive-strength-microamp is a new feature needed for G12A SoC.
the default DS setting after boot is usually 500uA and it is not enough for
many functions. We need to be able to set the drive strength to reliably
enable things like MMC, I2C, etc ...
Signed-off-by: Guillaume La Roque
Reviewed-by:
This property allow drive-strength parameter in uA instead of mA.
Signed-off-by: Guillaume La Roque
Acked-by: Martin Blumenstingl
Reviewed-by: Martin Blumenstingl
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt | 3 +++
1 file changed, 3
rework bias enable/disable part to prepare drive-strength integration
no functional changes
Signed-off-by: Guillaume La Roque
Reviewed-by: Martin Blumenstingl
Tested-by: Martin Blumenstingl
---
drivers/pinctrl/meson/pinctrl-meson.c | 85 +++
1 file changed, 49
On 5/14/19 9:09 AM, Peter Zijlstra wrote:
On Mon, May 13, 2019 at 11:18:41AM -0700, Andy Lutomirski wrote:
On Mon, May 13, 2019 at 7:39 AM Alexandre Chartre
wrote:
pcpu_base_addr is already mapped to the KVM address space, but this
represents the first percpu chunk. To access a per-cpu
Add drive-strength-microamp property support to allow drive strength in uA
Signed-off-by: Guillaume La Roque
---
drivers/pinctrl/pinconf-generic.c | 2 ++
include/linux/pinctrl/pinconf-generic.h | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/pinctrl/pinconf-generic.c
This patch introduces a new remoteproc driver to control Cortex-M4
co-processor of the STM32 family.
It provides with the following features:
- start and stop
- dedicated co-processor memory regions registration
- coredump and recovery
Signed-off-by: Fabien Dessenne
Signed-off-by: Ludovic Barre
Add the device tree bindings document for the stm32 remoteproc devices.
Signed-off-by: Fabien Dessenne
---
.../devicetree/bindings/remoteproc/stm32-rproc.txt | 63 ++
1 file changed, 63 insertions(+)
create mode 100644
The purpose of this patchset is to add drive-strength support in meson pinconf
driver. This is a new feature that was added on the g12a. It is critical for us
to support this since many functions are failing with default pad
drive-strength.
The value achievable by the SoC are 0.5mA, 2.5mA, 3mA
On Tue, May 14, 2019 at 9:09 AM Anson Huang wrote:
>
> Unnecessary blank lines do NOT help readability, so remove them.
>
> Signed-off-by: Anson Huang
Reviewed-by: Daniel Baluta
Enable m4 coprocessor for STM32MP157c-ed1 board.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index acfc5cd..e5a6f40 100644
STMicrolectronics STM32MP157 MPU are based on a Dual Arm Cortex-A7 core and a
Cortex-M4.
This patchset adds the support of the stm32_rproc driver allowing to control
the M4 remote processor.
Changes since v3:
-Replaced "st,auto_boot" with "st,auto-boot"
-Update m4 reg values and align with
Declare reserved memories shared by the processors for STM32MP157a-dk1
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157a-dk1.dts | 42 +++
1 file changed, 42 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts
Declare reserved memories shared by the processors for STM32MP157c-ed1
board.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 42 +++
1 file changed, 42 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
Enable m4 coprocessor for STM32MP157a-dk1 board.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157a-dk1.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts
b/arch/arm/boot/dts/stm32mp157a-dk1.dts
index 26ce8de..da64ee2 100644
Declare the M4 remote processor in a sub-node of the mlahb simple bus.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157c.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index
Document the ML-AHB interconnect for stm32 SoCs.
Signed-off-by: Fabien Dessenne
---
.../devicetree/bindings/arm/stm32/mlahb.txt| 37 ++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/stm32/mlahb.txt
diff --git
> And I like Steven's "(fault)" idea.
> How about this:
>
> if ptr < PAGE_SIZE -> "(null)"
> if IS_ERR_VALUE(ptr)-> "(fault)"
>
> -ss
Or:
if (ptr < PAGE_SIZE)
return ptr ? "(null+)" : "(null)";
if IS_ERR_VALUE(ptr)
Hi George,
On Mon, May 13, 2019 at 5:48 PM George G. Davis wrote:
> As noted in commit 84b40e3b57ee ("serial: 8250: omap: Disable DMA for
> console UART"), UART console lines use low-level PIO only access functions
> which will conflict with use of the line when DMA is enabled, e.g. when
> the
Le 14/05/2019 à 08:56, Michael Ellerman a écrit :
Christophe Leroy writes:
Some SCC functions like the QMC requires an extended parameter RAM.
On modern 8xx (ie 866 and 885), SPI area can already be relocated,
allowing the use of those functions on SCC2. But SCC3 and SCC4
parameter RAM
On Tue, May 14, 2019 at 04:50:49PM +1000, Michael Ellerman wrote:
> Looks good. I even booted it :)
Cool, thanks!
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
On Sat, 2019-04-27 at 22:41 +0200, Erik Stromdahl wrote:
> This patch fixes a possible deadlock when updating the TX statistics
> (when calling into ieee80211_tx_stats()) from ieee80211_tx_dequeue().
>
> ieee80211_tx_dequeue() might be called from process context.
I think this really is the
> On May 14, 2019, at 1:25 AM, Alexandre Chartre
> wrote:
>
>
>> On 5/14/19 9:09 AM, Peter Zijlstra wrote:
>>> On Mon, May 13, 2019 at 11:18:41AM -0700, Andy Lutomirski wrote:
>>> On Mon, May 13, 2019 at 7:39 AM Alexandre Chartre
>>> wrote:
pcpu_base_addr is already mapped to
On 5/13/19 11:08 PM, Liran Alon wrote:
On 13 May 2019, at 21:17, Andy Lutomirski wrote:
I expect that the KVM address space can eventually be expanded to include
the ioctl syscall entries. By doing so, and also adding the KVM page table
to the process userland page table (which should be
Le 14/05/2019 à 10:31, Christophe Leroy a écrit :
Le 14/05/2019 à 08:56, Michael Ellerman a écrit :
Christophe Leroy writes:
Some SCC functions like the QMC requires an extended parameter RAM.
On modern 8xx (ie 866 and 885), SPI area can already be relocated,
allowing the use of those
On Tue, May 14, 2019 at 2:34 AM Anson Huang wrote:
>
> Hi, Daniel
>
> > -Original Message-
> > From: Daniel Baluta [mailto:daniel.bal...@gmail.com]
> > Sent: Monday, May 13, 2019 10:30 PM
> > To: Anson Huang
> > Cc: catalin.mari...@arm.com; will.dea...@arm.com;
> > shawn...@kernel.org;
On Sat, May 04, 2019 at 05:28:51AM +0530, Raag Jadav wrote:
> On Thu, May 02, 2019 at 04:01:16PM +0200, Ludovic Desroches wrote:
> > On Tue, Apr 30, 2019 at 04:03:32AM +0530, Raag Jadav wrote:
> > > External E-Mail
> > >
> > >
> > > On Mon, Apr 29, 2019 at 11:00:05AM +0200, Ludovic Desroches
On Thu, May 09, 2019 at 06:19:25PM +0200, Sebastian Andrzej Siewior wrote:
> On 2019-05-08 15:57:28 [-0500], miny...@acm.org wrote:
> > kernel/sched/completion.c | 8
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/kernel/sched/completion.c
> -Original Message-
> From: Daniel Baluta [mailto:daniel.bal...@gmail.com]
> Sent: Tuesday, May 14, 2019 4:39 PM
> To: Anson Huang
> Cc: catalin.mari...@arm.com; will.dea...@arm.com;
> shawn...@kernel.org; s.ha...@pengutronix.de; ker...@pengutronix.de;
> feste...@gmail.com;
Make the naming of units consistent with common practices:
- Do not capitalize the first character of units ("Celsius" is
special, as it is not the unit name, but a reference to its
proposer),
- Do not use plural for units,
- Do not abbreviate "ampere",
- Concatenate prefixes and
On Mon, May 06, 2019 at 10:19:01AM +0200, Eugen Hristev - M18282 wrote:
>
>
> On 04.05.2019 02:58, Raag Jadav wrote:
>
> > On Thu, May 02, 2019 at 04:01:16PM +0200, Ludovic Desroches wrote:
> >> On Tue, Apr 30, 2019 at 04:03:32AM +0530, Raag Jadav wrote:
> >>> External E-Mail
> >>>
> >>>
> >>>
Hi Stanimir,
On 4/12/19 5:59 PM, Stanimir Varbanov wrote:
> This changes v4l2_pix_format and v4l2_plane_pix_format sizeimage
> field description to allow v4l clients to set bigger image size
> in case of variable length compressed data.
I've been reconsidering this change. The sizeimage value in
On Mon, May 13, 2019 at 19:37:28, Arnaldo Carvalho de Melo
wrote:
Hi Arnaldo,
I think Kishon has already dispatched a patch fixing this issue.
Kishon, can you confirm it?
Regards,
Gustavo
> Hi,
>
> I have this in my local perf/core branch, lined up for 5.2,
> please let me know if
On Mon, May 13, 2019 at 05:06:03PM +, Nadav Amit wrote:
> > On May 13, 2019, at 9:37 AM, Will Deacon wrote:
> >
> > On Mon, May 13, 2019 at 09:11:38AM +, Nadav Amit wrote:
> >>> On May 13, 2019, at 1:36 AM, Peter Zijlstra wrote:
> >>>
> >>> On Thu, May 09, 2019 at 09:21:35PM +,
On Tue, 14 May 2019 at 10:08, Rafael J. Wysocki wrote:
>
> On Mon, May 13, 2019 at 9:23 PM Ulf Hansson wrote:
> >
> > This series enables support for hierarchical CPU arrangement, managed by
> > PSCI
> > for ARM/ARM64. It's based on using the generic PM domain (genpd), which
> > recently was
Memory hot remove uses get_nid_for_pfn() while tearing down linked sysfs
entries between memory block and node. It first checks pfn validity with
pfn_valid_within() before fetching nid. With CONFIG_HOLES_IN_ZONE config
(arm64 has this enabled) pfn_valid_within() calls pfn_valid().
pfn_valid() is
From: Mark Rutland
The arm64 ptdump code can race with concurrent modification of the
kernel page tables. At the time this was added, this was sound as:
* Modifications to leaf entries could result in stale information being
logged, but would not result in a functional problem.
* Boot time
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