Export all configuration space access APIs and also other APIs to
support host controller drivers of DesignWare core based implementations
while adding support for .remove() hook to build their respective drivers
as modules
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
---
Changes from
Hi,
On 09/05/19 9:41 PM, Dan Murphy wrote:
> Rename the common m_can_priv class structure to
> m_can_classdev as this is more descriptive.
>
> Acked-by: Wolfgang Grandegger
> Signed-off-by: Dan Murphy
Acked-by: Faiz Abbas
Thanks,
Faiz
Hi,
On 09/05/19 9:41 PM, Dan Murphy wrote:
> Fix checkpatch issues found during the m_can framework creation.
> The code the issues were in, was in untouched code and these
> changes should be done separately as to not be confused with the
> framework changes.
>
> Fix these 3 check issues:
>
On Mon, Jun 24, 2019 at 7:40 AM Enrico Weigelt, metux IT consult
wrote:
> From: Enrico Weigelt
>
> Add more helper macros for trivial driver init cases, similar to the
> already existing module_platform_driver() or module_i2c_driver().
>
> This helps to reduce driver init boilerplate.
>
>
On Mon, Jun 24, 2019 at 03:09:14PM +0100, David Howells wrote:
> Allow fsinfo() to be used to query the filesystem attached to an fs_context
> once a superblock has been created or if it comes from fspick().
>
> The caller must specify AT_FSINFO_FROM_FSOPEN in the parameters and must
Yeah, I
>> +if (change_interface) {
>> +bp->phy_interface = state->interface;
>> +gem_writel(bp, NCR, ~GEM_BIT(TWO_PT_FIVE_GIG) &
>> + gem_readl(bp, NCR));
>This could do with a comment, such as the one I gave in my example.
Sure. I will add a comment
On 06/25/19 10:17, Nicholas Piggin wrote:
> With the change to allow the boot CPU0 to be isolated, it is possible
> to specify command line options that result in no housekeeping CPU
> online at boot.
>
> An 8 CPU system booted with "nohz_full=0-6 maxcpus=4", for example.
>
> It is not easily
>> >> switch (state->interface) {
>> >> case PHY_INTERFACE_MODE_NA:
>> >> + case PHY_INTERFACE_MODE_USXGMII:
>> >> + case PHY_INTERFACE_MODE_10GKR:
>> >> + if (bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE) {
>> >> + phylink_set(mask, 1baseCR_Full);
>> >> +
On 25/06/2019 11:53:49+1000, Finn Thain wrote:
> On Mon, 24 Jun 2019, Alexandre Belloni wrote:
>
> > On 21/06/2019 11:51:26+1000, Finn Thain wrote:
> > > Some machines store local time in the Real Time Clock. The hard-coded
> > > "UTC" string is wrong on those machines so just omit that string.
On Mon, Jun 24, 2019 at 7:40 AM Enrico Weigelt, metux IT consult
wrote:
> From: Enrico Weigelt
>
> Reduce driver init boilerplate by using the new
> module_siox_driver() macro.
>
> Signed-off-by: Enrico Weigelt
Patch applied.
Yours,
Linus Walleij
On Tue, Jun 25, 2019 at 09:26:29AM +, Parshuram Raju Thombare wrote:
> >In which case, gem_phylink_validate() must clear the support mask when
> >SGMII mode is requested to indicate that the interface mode is not
> >supported.
> >The same goes for _all_ other PHY link modes that the hardware
On Mon, Jun 24, 2019 at 03:09:05PM +0100, David Howells wrote:
> Add the fsinfo syscall to the other arches.
>
> Signed-off-by: David Howells
> ---
>
> arch/alpha/kernel/syscalls/syscall.tbl |1 +
> arch/arm/tools/syscall.tbl |1 +
>
As per the convention for any SOC device with external connection,
define only device DT node in SOC DTSi file with status = "disabled"
and enable device in Board DTS file with status = "okay"
Reported-by: Anup Patel
Signed-off-by: Yash Shah
---
arch/riscv/boot/dts/sifive/fu540-c000.dtsi
On 24-Jun 10:52, Tejun Heo wrote:
> Hey, Patrick.
Hi,
> On Mon, Jun 24, 2019 at 06:29:06PM +0100, Patrick Bellasi wrote:
> > > I kinda wonder whether the term bandwidth is a bit confusing because
> > > it's also used for cpu.max/min. Would just calling it frequency be
> > > clearer?
> >
> >
On 25/06/2019 09:14:13+, eugen.hris...@microchip.com wrote:
> > Perhaps
> >
> > microchip,digital-filter;
> > microchip,analog-filter;
> >
> > ?
>
> Hi Peter,
>
> Thanks for reviewing. The name of the property does not matter much to
> me, and we have properties prefixed with
On Mon, Jun 24, 2019 at 09:54:05AM -0700, Yang Shi wrote:
>
>
> On 6/13/19 10:13 AM, Yang Shi wrote:
> >
> >
> > On 6/13/19 4:39 AM, Kirill A. Shutemov wrote:
> > > On Thu, Jun 13, 2019 at 05:56:47AM +0800, Yang Shi wrote:
> > > > The later patch would make THP deferred split shrinker memcg
On 06/25/2019 10:29 AM, Yauheni Kaliuta wrote:
> Hi!
>
> I'm wondering, how the sanitaion tests (#903 5.2-rc6 for example)
> are supposed to work on BE arches:
>
> {
> "sanitation: alu with different scalars 1",
> .insns = {
> BPF_MOV64_IMM(BPF_REG_0, 1),
>
On Mon, Jun 24, 2019 at 12:28:44PM +0100, Daniel Thompson wrote:
> On Fri, Jun 21, 2019 at 03:56:08PM +0200, Thierry Reding wrote:
> > On Fri, Jun 21, 2019 at 01:41:45PM +0100, Daniel Thompson wrote:
> > > On 22/05/2019 17:34, Paul Cercueil wrote:
> > > > When the driver probes, the PWM pin is
>> >In which case, gem_phylink_validate() must clear the support mask when
>> >SGMII mode is requested to indicate that the interface mode is not
>> >supported.
>> >The same goes for _all_ other PHY link modes that the hardware does not
>> >actually support, such as PHY_INTERFACE_MODE_10GKR...
On Mon, 24 Jun 2019 15:38:19 PDT (-0700), Atish Patra wrote:
Currently, there is no CPU topology defined for RISC-V.
The following series adds topology support in RISC-V.
http://lists.infradead.org/pipermail/linux-riscv/2019-June/005072.html
Add a DT node for unleashed that describes the CPU
On Mon, Jun 24, 2019 at 03:09:21PM +0100, David Howells wrote:
> Provide fsinfo() attributes that can be used to query a filesystem
> parameter description. To do this, fsinfo() can be called on an
Can you give a usecase for this?
Wouldn't it be more helpful if fsinfo() when used to query a
Hi Jeff,
On 18.06.19 19:08, Jeff Kletsky wrote:
> From: Jeff Kletsky
>
> Add initial support for Paragon Technology
> PN26G01Ax and PN26G02Ax SPI NAND
>
> Datasheets available at
> http://www.xtxtech.com/upfile/2016082517274590.pdf
> http://www.xtxtech.com/upfile/2016082517282329.pdf
>
From: Robin Gong
Add edma2 for i.mx7ulp by version v3, since v2 has already
been used by mcf-edma.
The big changes based on v1 are belows:
1. only one dmamux.
2. another clock dma_clk except dmamux clk.
3. 16 independent interrupts instead of only one interrupt for
all channels.
Signed-off-by:
From: Robin Gong
Add edma device node in dts.
Signed-off-by: Robin Gong
---
arch/arm/boot/dts/imx7ulp.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index dc5bc32..97496cf 100644
---
From: Robin Gong
There are some differences between vf610 and next i.mx7ulp. Put such
differences into static driver data for distinguishing easily at
driver level. Change mcf-edma accordingly.
Signed-off-by: Robin Gong
---
drivers/dma/fsl-edma-common.c | 29 +++--
From: Robin Gong
This patch set add new version of edma for i.mx7ulp, the main changes
are as belows:
1. only one dmamux.
2. another clock dma_clk except dmamux clk.
3. 16 independent interrupts instead of only one interrupt for
all channels
For the first change, need modify
From: Robin Gong
More channel interrupts, one more clock, and only one
dmamux on i.mx7ulp-edma.
Signed-off-by: Robin Gong
---
Documentation/devicetree/bindings/dma/fsl-edma.txt | 44 +++---
1 file changed, 39 insertions(+), 5 deletions(-)
diff --git
From: Robin Gong
Prepare for edmav2 on i.mx7ulp whose dmamux register is 32bit. No function
impacted.
Signed-off-by: Robin Gong
---
drivers/dma/fsl-edma-common.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/fsl-edma-common.c
From: Robin Gong
The next v3 i.mx7ulp edma is based on v1, so change version
check logic for v2 instead.
Signed-off-by: Robin Gong
---
drivers/dma/fsl-edma-common.c | 40
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git
On Mon, Jun 24, 2019 at 03:09:33PM +0100, David Howells wrote:
> Implement parameter value retrieval with fsinfo() - akin to parsing
> /proc/mounts.
>
> This allows all the parameters to be retrieved in one go with:
>
> struct fsinfo_params params = {
> .request=
[+Marc]
Hi again, Vicente,
On Mon, Jun 24, 2019 at 12:47:41PM +0100, Will Deacon wrote:
> On Sat, Jun 22, 2019 at 08:02:19PM +0200, Vicente Bergas wrote:
> > Hi Al,
> > i think have a hint of what is going on.
> > With the last kernel built with your sentinels at hlist_bl_*lock
> > it is very
Hi,
Any feedback on this patch?
Thanks,
Matt
On 24/04/2019 14:22, Matthew Redfearn wrote:
> In contrast to all of the DSI panel drivers in drivers/gpu/drm/panel
> which attach to the DSI host via mipi_dsi_attach() at probe time, the
> ADV7533 bridge device does not. Instead it defers this to
On Fri, May 31, 2019 at 12:27:47PM +0200, Thomas Bogendoerfer wrote:
> Starting with SGI Origin machines nearly every new SGI ASIC contains
> an 1-Wire master. They are used for attaching One-Wire prom devices,
> which contain information about part numbers, revision numbers,
> serial number etc.
On Thu, Jun 13, 2019 at 07:06:31PM +0200, Thomas Bogendoerfer wrote:
> SGI IOC3 chip has integrated ethernet, keyboard and mouse interface.
> It also supports connecting a SuperIO chip for serial and parallel
> interfaces. IOC3 is used inside various SGI systemboards and add-on
> cards with
On 6/12/19 9:32 PM, Rik van Riel wrote:
[...]
> @@ -410,6 +412,11 @@ static inline struct sched_entity *parent_entity(struct
> sched_entity *se)
> return se->parent;
> }
>
> +static inline bool task_se_in_cgroup(struct sched_entity *se)
> +{
> + return parent_entity(se);
> +}
On 2019/06/25 17:55, syzbot wrote:
> syzbot has bisected this bug to:
>
> commit e80b18599a39a625bc8b2e39ba3004a62f78805a
> Author: Tetsuo Handa
> Date: Fri Apr 12 11:04:54 2019 +
>
> tomoyo: Add a kernel config option for fuzzing testing.
>
> bisection log:
The patch
ASoC: rk3399_gru_sound: Support 32, 44.1 and 88.2 kHz sample rates
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.3
All being well this means that it will be integrated into the linux-next
tree (usually sometime in
The patch
regulator: qcom_spmi: Do NULL check for lvs
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-5.3
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24
The patch
spi: spi-stm32-qspi: Remove CR_FTHRES_MASK usage
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.2
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
The patch
regulator: s2mps11: Reduce number of rdev_get_id() calls
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-5.3
All being well this means that it will be integrated into the linux-next
tree (usually sometime in
The patch
regulator: s2mps11: Add support for disabling S2MPS11 regulators in suspend
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-5.3
All being well this means that it will be integrated into the linux-next
tree
The patch
ASoC: SOF: Intel: hda: remove duplicated include from hda.c
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.3
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next
On Tue, Jun 25, 2019 at 11:31:56AM +0200, Alexandre Belloni wrote:
> On 25/06/2019 09:14:13+, eugen.hris...@microchip.com wrote:
> > > Perhaps
> > >
> > > microchip,digital-filter;
> > > microchip,analog-filter;
> > >
> > > ?
> >
> > Hi Peter,
> >
> > Thanks for reviewing. The name of
Hello
On Fri, Jun 21, 2019 at 01:30:01PM +0200, Soeren Moch wrote:
> On 18.06.19 11:34, Stanislaw Gruszka wrote:
> > Hi
> >
> > On Mon, Jun 17, 2019 at 11:46:56AM +0200, Soeren Moch wrote:
> >> Since commit ed194d136769 ("usb: core: remove local_irq_save() around
> >> ->complete() handler") the
On Tue, Jun 25, 2019 at 09:42:20AM +0200, Uwe Kleine-König wrote:
> On Wed, May 22, 2019 at 06:34:28PM +0200, Paul Cercueil wrote:
> > When the driver probes, the PWM pin is automatically configured to its
> > default state, which should be the "pwm" function. However, at this
> > point we don't
Hi John,
On 6/24/2019 3:35 PM, John Garry wrote:
> As reported in [1], the hisi-lpc driver has certain issues in handling
> logical PIO regions, specifically unregistering regions.
>
> This series add a method to unregister a logical PIO region, and fixes up
> the driver to use them.
>
> RCU
On 24/06/2019 10:55, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.19.56 release.
> There are 90 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
On 24/06/2019 10:56, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.130 release.
> There are 51 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
On 24/06/2019 10:55, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.1.15 release.
> There are 121 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses
On (06/25/19 11:06), Petr Mladek wrote:
> On Tue 2019-06-25 10:44:19, John Ogness wrote:
> > On 2019-06-25, Sergey Senozhatsky wrote:
> > > In vprintk_emit(), are we going to always reserve 1024-byte
> > > records, since we don't know the size in advance, e.g.
> > >
> > > printk("%pS %s\n",
Hi Sebastian, Pavel,
Missatge de Benson Leung del dia dj., 23 de maig
2019 a les 21:55:
>
> Hi Enric,
>
> On Tue, May 07, 2019 at 11:52:47AM +0200, Enric Balletbo i Serra wrote:
> > For thermal management strategy you might be interested on limit the
> > input power for a power supply. We
On 6/24/2019 7:53 PM, David Miller wrote:
From: Keerthy
Date: Mon, 24 Jun 2019 10:46:19 +0530
Commit bfe59032bd6127ee190edb30be9381a01765b958 ("net: ethernet:
ti: cpsw: use cpsw as drv data")changes
the driver data to struct cpsw_common *cpsw. This is done
only in probe/remove but the
On Mon, Jun 24, 2019 at 08:51:37AM -0700, Matthew Wilcox wrote:
> The usual convention in list.h is that list_foo uses the list head and
> list_foo_entry uses the container type. So I think this should be
> renamed to list_pop_entry() at least. Do we also want:
>
> static inline struct
On Mon, Jun 24, 2019 at 07:57:07AM -0700, Darrick J. Wong wrote:
> On Mon, Jun 24, 2019 at 07:52:45AM +0200, Christoph Hellwig wrote:
> > Currently we don't overwrite the flags field in the iomap in
> > xfs_bmbt_to_iomap. This works fine with 0-initialized iomaps on stack,
> > but is harmful once
DIV_ROUND_UP_ULL adds the two arguments and then invokes
DIV_ROUND_DOWN_ULL. But on a 32bit system the addition of two 32 bit
values can overflow. DIV_ROUND_DOWN_ULL does it correctly and stashes
the addition into a unsigned long long so cast the result to unsigned
long long here to avoid the
On Mon, Jun 24, 2019 at 08:46:01AM -0700, Darrick J. Wong wrote:
> This looks like a straight code copy from fs/xfs/ into fs/iomap.c.
> That's fine with me, but seeing as this file is now ~2700 lines long,
> perhaps we should break this up among major functional lines?
>
> Looking at fs/iomap.c,
On Tue, Jun 25, 2019 at 09:43:04AM +1000, Dave Chinner wrote:
> I'm a little concerned this is going to limit what we can do
> with the XFS IO path because now we can't change this code without
> considering the direct impact on other filesystems. The QA burden of
> changing the XFS writeback code
On Mon, Jun 24, 2019 at 02:38:28PM +, Hoan Tran OS wrote:
> Some NUMA nodes have memory ranges that span other nodes.
> Even though a pfn is valid and between a node's start and end pfns,
> it may not reside on that node.
>
> This patch enables NODES_SPAN_OTHER_NODES config for NUMA to
On Tue, Jun 25, 2019 at 08:59:04AM +1000, Dave Chinner wrote:
> On Mon, Jun 24, 2019 at 07:52:47AM +0200, Christoph Hellwig wrote:
> > Instead of a magic flag for xfs_trans_alloc, just ensure all callers
> > that can't relclaim through the file system use memalloc_nofs_save to
> > set the per-task
On Mon, Jun 24, 2019 at 07:06:22PM +0300, Nikolay Borisov wrote:
> > +{
> > + struct list_headtmp;
> > +
> > + list_replace_init(>io_list, );
> > + xfs_destroy_ioend(ioend, error);
> > + while ((ioend = list_pop(, struct xfs_ioend, io_list)))
> > +
Hi Russell,
W dniu 25.06.2019 o 12:03, Russell King - ARM Linux admin pisze:
On Tue, Jun 25, 2019 at 11:46:34AM +0200, Andrzej Pietrasiewicz wrote:
It is difficult for a user to know which of the i2c adapters is for which
drm connector. This series addresses this problem.
The idea is to have
On Tue, Jun 25, 2019 at 09:49:21AM +1000, Dave Chinner wrote:
> > +#undef TRACE_SYSTEM
> > +#define TRACE_SYSTEM iomap
>
> Can you add a comment somewhere here that says these tracepoints are
> volatile and we reserve the right to change them at any time so they
> don't form any sort of
On Tue, Jun 25, 2019 at 10:19 AM Jason A. Donenfeld wrote:
>
> Hi Thomas,
>
> When Arnd and I discussed this prior, he thought it best that I separate
> these two commits out into a separate patchset, because they might
> require additional discussion or consideration from you. They seem
>
Yauheni Kaliuta writes:
> Hi!
>
> Looks like the code:
>
>ALU_ARSH_X:
>DST = (u64) (u32) ((*(s32 *) ) >> SRC);
>CONT;
>ALU_ARSH_K:
>DST = (u64) (u32) ((*(s32 *) ) >> IMM);
>CONT;
>
> works incorrectly on BE arches
Hi ARM-SoC team,
Please consider to pull the following changes.
Thanks!
Best Regards,
Wei
---
The following changes since commit a188339ca5a396acc588e5851ed7e19f66b0ebd9:
Linux 5.2-rc1 (2019-05-19 15:47:09 -0700)
are available in the Git repository at:
On 6/24/2019 18:06, Kai-Heng Feng wrote:
at 19:56, Neftin, Sasha wrote:
On 6/24/2019 10:03, Kai-Heng Feng wrote:
Hi Jeffrey,
at 19:08, Kai-Heng Feng wrote:
Hi Jeffrey,
There are several platforms that uses e1000e can’t enter
Opportunistic S0ix (PC10) when the ethernet has a link partner.
On Tue, Jun 25, 2019 at 09:15:23AM +1000, Dave Chinner wrote:
> > So, uh, how much of a hit do we take for having to allocate a
> > transaction for a file size extension? Particularly since we can
> > combine those things now?
>
> Unless we are out of log space, the transaction allocation and
On 6/25/19 2:28 PM, Linus Walleij wrote:
On Mon, Jun 17, 2019 at 11:35 AM Neeraj Upadhyay wrote:
From: Srinivas Ramana
Introduce the irq_enable callback which will be same as irq_unmask
except that it will also clear the status bit before unmask.
This will help in clearing any erroneous
Hello!
On 25.06.2019 11:19, Jose Abreu wrote:
Some DT bindings do not have the PHY handle. Let's fallback to manually
discovery in case phylink_of_phy_connect() fails.
Reported-by: Katsuhiro Suzuki
Fixes: 74371272f97f ("net: stmmac: Convert to phylink and remove phylib logic")
Signed-off-by:
Hi all,
below are a few cleanups for the DMA mask handling. I came up with these
untested patches after looking through the code to debug the 32-bit pmac
30-bit dma issue involving b43legacy.
On Tue, Jun 25, 2019 at 10:57:07AM +0530, Anshuman Khandual wrote:
> On 06/24/2019 10:22 PM, Mark Rutland wrote:
> > On Fri, Jun 21, 2019 at 03:35:53PM +0100, Steve Capper wrote:
> >> On Wed, Jun 19, 2019 at 09:47:40AM +0530, Anshuman Khandual wrote:
> >>> +static void
On Mon, Jun 24, 2019 at 02:25:42PM +, Song Liu wrote:
>
>
> > On Jun 24, 2019, at 6:19 AM, Kirill A. Shutemov
> > wrote:
> >
> > On Sat, Jun 22, 2019 at 10:48:28PM -0700, Song Liu wrote:
> >> khugepaged needs exclusive mmap_sem to access page table. When it fails
> >> to lock mmap_sem,
On Tue, Jun 25, 2019 at 09:38:37AM +, Parshuram Raju Thombare wrote:
>
> >> >In which case, gem_phylink_validate() must clear the support mask when
> >> >SGMII mode is requested to indicate that the interface mode is not
> >> >supported.
> >> >The same goes for _all_ other PHY link modes that
Hi,
Linux kernel recently got a bugfix 1fde6f21d90f ("proc: fix /proc/net/* after
setns(2)"),
but unfortunately it only solves the issue for procfs net file inodes so they
get correct
content after a process change namespace.
Checking on a v5.2-rc6 kernel :
sh-4.4# sh netns_procfs_test.sh
[
On Tue 04-06-19 07:31:58, Steve Magnani wrote:
> In some cases, using the 'truncate' command to extend a UDF file results
> in a mismatch between the length of the file's extents (specifically, due
> to incorrect length of the final NOT_ALLOCATED extent) and the information
> (file) length. The
On Fri, Jun 21, 2019 at 04:56:50PM -0700, Darrick J. Wong wrote:
> Hi all,
>
> The chattr(1) manpage has this to say about the immutable bit that
> system administrators can set on files:
>
> "A file with the 'i' attribute cannot be modified: it cannot be deleted
> or renamed, no link can be
Hi all,
Changes since 20190624:
The arm64 tree gained a conflict against Linus' tree.
The samsung-krzk tree gained conflicts against the arm-soc tree.
The tegra tree gained a conflict against the arm-soc tree.
The fbdev tree gained a conflict against the v4l-dvb tree and still had
its build
Hi ARM-SoC team,
Sorry, I forgot to mention that one or two patches in this patch set
are not pure fix.
We are also OK to queue for v5.3.
Thanks!
Best Regards,
Wei
On 6/25/2019 11:23 AM, Wei Xu wrote:
> Hi ARM-SoC team,
>
> Please consider to pull the following changes.
> Thanks!
>
> Best
Hi, Jiong!
> On Tue, 25 Jun 2019 11:20:07 +0100, Jiong Wang wrote:
> Yauheni Kaliuta writes:
>> Hi!
>>
>> Looks like the code:
>>
>> ALU_ARSH_X:
>> DST = (u64) (u32) ((*(s32 *) ) >> SRC);
>> CONT;
>> ALU_ARSH_K:
>> DST = (u64) (u32) ((*(s32 *) ) >> IMM);
>> CONT;
>>
>>
From: sudheer veliseti
UART driver for Aspeed's bmc chip AST2500
Design approch:
AST2500 has dedicated Uart DMA controller which has 12 sets of Tx and RX
channels
connected to UART controller directly.
Since the DMA controller have dedicated buffers and registers,
there would be little benifit
From: sudheer veliseti
build config for DMA based UART driver in AST2500.
Total Available UARTs in AST2500 are 4
Signed-off-by: sudheer veliseti
---
Changes in v3:
- change logs added
drivers/tty/serial/8250/Kconfig | 35 +++-
drivers/tty/serial/8250/Makefile |
From: sudheer veliseti
defconfig changes to add DMA based UART in AST2500
Maintainers File updated.
Signed-off-by: sudheer veliseti
---
Changes in v3:
- Added changes logs
MAINTAINERS | 13 +
arch/arm/configs/aspeed_g5_defconfig | 1 +
2 files changed,
From: sudheer veliseti
Hi,
AST2500 has dedicated Uart DMA controller which has 12 sets of
Tx and RX channels connected to UART controller directly.
Since the DMA controller have dedicated buffers and registers,
there would be little benifit in adding DMA framework overhead.
So the software for
From: sudheer veliseti
DT node for DMA controller(ast_uart_sdma) doesn't bind to any DMA controller
driver.
This is because Software for DMA controller is not based on DMA framework,but
is dedicated
and serves only UARTs in AST2500. ast_uart_sdma node is searched by compatible
string in the
From: sudheer veliseti
documentation for Dt bindings for DMA based UARTs in AST2500
Signed-off-by: sudheer veliseti
---
Changes in v3:
- change logs added
.../bindings/serial/ast2500-dma-uart.txt | 40 +++
1 file changed, 40 insertions(+)
create mode 100644
Syzcaller reported the following Use-after-Free issue:
close() clone()
copy_process()
perf_event_init_task()
On 25/06/2019 11:39, Wei Xu wrote:
Hi ARM-SoC team,
Sorry, I forgot to mention that one or two patches in this patch set
are not pure fix.
We are also OK to queue for v5.3.
Thanks!
Yes, specifically patch "lib: logic_pio: Enforce LOGIC_PIO_INDIRECT
region ops are set at registration" is a
On Tuesday, June 25, 2019 11:46:02 AM CEST, Will Deacon wrote:
[+Marc]
Hi again, Vicente,
On Mon, Jun 24, 2019 at 12:47:41PM +0100, Will Deacon wrote:
On Sat, Jun 22, 2019 at 08:02:19PM +0200, Vicente Bergas wrote: ...
Before you rush over to LAKML, please could you provide your full dmesg
On Tue, Jun 25, 2019 at 11:44 AM David Laight wrote:
>
> From: Dmitry Torokhov
> > Sent: 23 June 2019 07:32
> >
> > Instead of doing conversion by hand, let's use the proper accessors.
> >
> > Signed-off-by: Dmitry Torokhov
> > ---
> > drivers/input/touchscreen/edt-ft5x06.c | 5 +++--
> > 1
On Tue, Jun 25, 2019 at 08:26:29AM +, Parshuram Raju Thombare wrote:
> Hi Andrew,
>
> >What i'm saying is that the USXGMII rate is fixed. So why do you need a
> >device
> >tree property for the SERDES rate?
> This is based on Cisco USXGMII specification, it specify USXGMII 5G and
> USXGMII
Use BIT(x) instead of (1<
---
drivers/staging/media/davinci_vpfe/dm365_ipipe.h | 2 +-
drivers/staging/media/davinci_vpfe/dm365_isif.h | 4 ++--
drivers/staging/media/davinci_vpfe/dm365_isif_regs.h | 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git
On 25.06.2019 13:29, Sergei Shtylyov wrote:
Some DT bindings do not have the PHY handle. Let's fallback to manually
discovery in case phylink_of_phy_connect() fails.
Reported-by: Katsuhiro Suzuki
Fixes: 74371272f97f ("net: stmmac: Convert to phylink and remove phylib logic")
Signed-off-by:
Hello Christoph,
On 25/06/2019 10:15, Christoph Hellwig wrote:
> This function has never been used anywhere in the kernel tree since it
> was added to the tree. We also now have proper PCIe P2P APIs in the core
> kernel, and any new P2P support should be using those.
>
> Signed-off-by:
On Mon, Jun 17, 2019 at 01:16:53PM +0200, Arnd Bergmann wrote:
> The ttpci driver now uses the rc-core, so we need to ensure it
> is enabled:
>
> ERROR: "rc_unregister_device" [drivers/media/pci/ttpci/dvb-ttpci.ko]
> undefined!
> ERROR: "rc_allocate_device" [drivers/media/pci/ttpci/dvb-ttpci.ko]
In order to allow splitting of ptrace depending on the
different CONFIG_ options, create a subdirectory dedicated to
ptrace and move ptrace.c and ptrace32.c into it.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/Makefile| 7 +++
arch/powerpc/kernel/ptrace/Makefile
PARAMETER_SAVE_AREA_OFFSET is not used, drop it.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/ptrace/ptrace.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace/ptrace.c
b/arch/powerpc/kernel/ptrace/ptrace.c
index 0afb223c4d57..cc8efcb404d6
On Fri, Jun 21, 2019 at 04:56:29PM -0700, Darrick J. Wong wrote:
> From: Darrick J. Wong
>
> Create a generic checking function for the incoming FS_IOC_FSSETXATTR
> fsxattr values so that we can standardize some of the implementation
> behaviors.
>
> Signed-off-by: Darrick J. Wong
>
Drop a bunch of #ifdefs CONFIG_PPC64 that are not vital.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/ptrace.h | 9 -
arch/powerpc/include/uapi/asm/ptrace.h | 12
arch/powerpc/kernel/ptrace/ptrace.c| 24 +++-
3 files changed, 11
Move TRANSACTIONAL_MEM functions out of ptrace.c, into
ptrace-tm.c
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/ptrace/Makefile | 1 +
arch/powerpc/kernel/ptrace/ptrace-decl.h | 63 +++
arch/powerpc/kernel/ptrace/ptrace-tm.c | 877 ++
Create ippc_gethwdinfo() to handle PPC_PTRACE_GETHWDBGINFO and
reduce ifdef mess
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/ptrace/ptrace-adv.c | 15 +++
arch/powerpc/kernel/ptrace/ptrace-decl.h | 1 +
arch/powerpc/kernel/ptrace/ptrace-noadv.c | 20
301 - 400 of 1265 matches
Mail list logo
