Hi all,
Today's linux-next merge of the akpm-current tree got a conflict in:
arch/riscv/Kconfig
between commit:
d95f1a542c3d ("RISC-V: Implement sparsemem")
from the risc-v tree and commit:
f6a9089b8915 ("riscv: make mmap allocation top-down by default")
from the akpm-current tree.
I
Hi Nayna,
Some more comments below.
Nayna Jain writes:
> POWER secure boot relies on the kernel IMA security subsystem to
> perform the OS kernel image signature verification.
Again this is just a design choice we've made, it's not specified
anywhere or anything like that. And it only applies
First, for AUTONEG_DISABLE, we only need to modify MII_BMCR.
Second, add advertising parameter for rtl8152_set_speed(). Add
RTL_ADVERTISED_xxx for advertising parameter of rtl8152_set_speed().
Then, the advertising settings from ethtool could be saved.
Signed-off-by: Hayes Wang
---
Hi Nayna,
Sorry I've taken so long to get to this series, there's just too many
patches that need reviewing :/
Nayna Jain writes:
> Secure boot on POWER defines different IMA policies based on the secure
> boot state of the system.
The terminology throughout is a bit vague, we have POWER,
On Mon, Sep 02, 2019 at 09:40:11PM +1000, Stephen Rothwell wrote:
> Hi all,
>
> After merging the powerpc tree, today's linux-next build (powerpc
> ppc44x_defconfig) failed like this:
Yes, this conflict is expected and we dicussed it before. I'll make
sure Linus is in the loop when sending the
Hi Chunfeng,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[cannot apply to v5.3-rc6 next-20190830]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
On Mon, Sep 02, 2019 at 11:17:13AM +0800, Xiaowei Bao wrote:
> dw_pcie_ep_raise_msix_irq was never called in the exisitng driver
> before, because the ls1046a platform don't support the MSIX feature
> and msix_capable was always set to false.
> Now that add the ls1088a platform with MSIX support,
On Sun, Sep 01, 2019 at 01:26:48AM +0900, Katsuhiro Suzuki wrote:
> This patch change the judge timing about playing/capturing PCM rate.
>
> Original code set constraints list of PCM rate limits at set_sysclk.
> This strategy works well if system is using fixed rate clock.
>
> But some boards
Hi Lucas, Eduardo,
Thank you for the patch!
Some comments below:
On 9/1/19 11:11 PM, Lucas A. M. Magalhães wrote:
> From: Lucas A. M. Magalhaes
>
> Add a virtual subdevice to simulate the flash control API.
> Those are the supported controls:
> v4l2-ctl -d /dev/v4l-subdev6 -L
> Flash Controls
On Mon, Sep 02, 2019 at 12:24:34PM +0200, Marco Ammon wrote:
> In the documentation for text_poke_early, "protected again" should
> actually be "protected against". This patch fixes the spelling mistake.
For the future:
Avoid having "This patch" or "This commit" in the commit message. It is
Adding new --per-numa option to aggregate counts per NUMA
nodes for system-wide mode measurements.
You can specify --per-numa in live mode:
# perf stat -a -I 1000 -e cycles --per-numa
# time numa cpus counts unit events
1.000542550 N0 20
hi,
adding --per-numa option to aggregate stats per NUMA nodes,
you can get now use stat command like:
# perf stat -a -I 1000 -e cycles --per-numa
# time numa cpus counts unit events
1.000542550 N0 20 6,202,097 cycles
1.000542550
So it can be used from multiple places.
Link: http://lkml.kernel.org/n/tip-yp3h5rl9e8piybufq41zq...@git.kernel.org
Signed-off-by: Jiri Olsa
---
tools/perf/builtin-stat.c| 14 +-
tools/perf/lib/cpumap.c | 12
tools/perf/lib/include/perf/cpumap.h
To speed up cpu to node lookup, adding perf_env__numa_node
function, that creates cpu array on the first lookup, that
holds numa nodes for each stored cpu.
Link: http://lkml.kernel.org/n/tip-qqwxklhissf3yjyuaszh6...@git.kernel.org
Signed-off-by: Jiri Olsa
---
tools/perf/util/env.c | 35
The following commit has been merged into the x86/cleanups branch of tip:
Commit-ID: 32b1cbe380417f2ed80f758791179de6b05795ab
Gitweb:
https://git.kernel.org/tip/32b1cbe380417f2ed80f758791179de6b05795ab
Author:Marco Ammon
AuthorDate:Mon, 02 Sep 2019 14:02:59 +02:00
Tony Chuang writes:
>> From: Jian-Hong Pan
>> Subject: [PATCH v4] rtw88: pci: Move a mass of jobs in hw IRQ to soft IRQ
>>
>> There is a mass of jobs between spin lock and unlock in the hardware
>> IRQ which will occupy much time originally. To make system work more
>> efficiently, this patch
On 9/1/19 9:40 PM, Arthur Moraes do Lago wrote:
> Add mean window size parameter for debayer filter as a control in
> vimc-debayer.
>
> vimc-debayer was patched to allow changing mean windows parameter
> of the filter without needing to reload the driver. The parameter
> can now be set using a
On Mon, Sep 02, 2019 at 03:43:13PM +0800, Tanwar, Rahul wrote:
> On 28/8/2019 11:09 PM, Andy Shevchenko wrote:
> > On Wed, Aug 28, 2019 at 03:00:17PM +0800, Rahul Tanwar wrote:
> > > drivers/clk/intel/Kconfig | 13 +
> > > drivers/clk/intel/Makefile | 4 +
> > Any plans what to do
The patch
regulator: provide regulator_bulk_set_supply_names()
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-5.4
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the
On Mon, Sep 02, 2019 at 03:20:30PM +0300, Andy Shevchenko wrote:
> On Mon, Sep 02, 2019 at 03:43:13PM +0800, Tanwar, Rahul wrote:
> > On 28/8/2019 11:09 PM, Andy Shevchenko wrote:
> > > On Wed, Aug 28, 2019 at 03:00:17PM +0800, Rahul Tanwar wrote:
> > > Does val == 0 follows the table, i.e. makes
On Mon, Sep 02, 2019 at 11:32:40AM +0300, Sakari Ailus wrote:
> Add a test for the %pfw printk modifier using software nodes.
> + const struct software_node softnodes[] = {
> + { .name = "first", },
> + { .name = "second", .parent = [0], },
> + { .name =
On Mon, Sep 02, 2019 at 11:16:23AM +0200, Peter Zijlstra wrote:
> On Sat, Aug 31, 2019 at 03:41:17PM +0100, Alessio Balsini wrote:
> > Right!
> >
> > Verified that sysctl_sched_dl_period_max and sysctl_sched_dl_period_min
> > values
> > are now always consistent.
> >
> > I spent some time in
On Mon, Sep 02, 2019 at 11:17:10AM +0800, Xiaowei Bao wrote:
> Add compatible strings for ls1088a and ls2088a.
>
> Signed-off-by: Xiaowei Bao
> ---
> v2:
> - No change.
> v3:
> - Use one valid combination of compatible strings.
>
> Documentation/devicetree/bindings/pci/layerscape-pci.txt | 4
Struct member dev_ch_attribute->channel is always used as unsigned
int. Change type to unsigned int to avoid type casts.
Signed-off-by: Robert Richter
---
drivers/edac/edac_mc_sysfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/edac/edac_mc_sysfs.c
Debug messages are inconsistently used in the error handlers. Some
lack an error message, some are called regardless the return status,
messages for the same error are at different locations in the code
depending on the error code. This happens esp. near put_device()
calls. Make those debug
A bunch of cleanups and fixes for issues found while working with the
code. Changes are individual and independent from each other. They can
be applied separately (only #4 depends on #3).
Also updating the reviewer's entry as I will be able to do some
reviews for edac code.
Note that patch #3 is
Use direct returns instead of gotos. Error handling code becomes
smaller and better readable.
Signed-off-by: Robert Richter
---
drivers/edac/edac_mc_sysfs.c | 20 +++-
1 file changed, 7 insertions(+), 13 deletions(-)
diff --git a/drivers/edac/edac_mc_sysfs.c
I did some significant work with code in edac_mc.c and ghes_edac.c
already, so I guess I can probably helping out a bit as code reviewer
here.
Signed-off-by: Robert Richter
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index
Use of 'unsigned int' instead of bare use of 'unsigned'. Fix this for
edac_mc*, ghes and the i5100 driver.
Depending on the compiler's warning level it can throw messages like
this:
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
#235: FILE: drivers/edac/i5100_edac.c:854:
+
Hi Andy,
On Mon, Sep 02, 2019 at 01:14:26PM +0300, Andy Shevchenko wrote:
> On Mon, Sep 02, 2019 at 11:32:33AM +0300, Sakari Ailus wrote:
> > Add two convenience functions for accessing node's parents:
> >
> > fwnode_count_parents() returns the number of parent nodes a given node
> > has.
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 9b8bd476e78e89c9ea26c3b435ad0201c3d7dbf5
Gitweb:
https://git.kernel.org/tip/9b8bd476e78e89c9ea26c3b435ad0201c3d7dbf5
Author:Peter Zijlstra
AuthorDate:Thu, 29 Aug 2019 10:24:45 +02:00
From: Bartosz Golaszewski
This field is unused outside of probe(). There's no need to store it.
We can make it into a local variable.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: Andy Shevchenko
Reviewed-by: Linus Walleij
Reviewed-by: Daniel Thompson
---
From: Hillf Danton
If a request_key authentication token key gets revoked, there's a window in
which request_key_auth_describe() can see it with a NULL payload - but it
makes no check for this and something like the following oops may occur:
BUG: Kernel NULL pointer dereference at
On Fri, Aug 30, 2019 at 03:23:53PM -0400, Andrew F. Davis wrote:
> On 8/29/19 5:47 AM, Mark Rutland wrote:
> > On Wed, Aug 28, 2019 at 01:33:18PM -0400, Andrew F. Davis wrote:
> We are seeing is a write-back from L3 cache. Our bootloader writes the
> kernel image with caches on, then after
On Sat, Aug 31, 2019 at 01:55:14AM +0300, Daniel Baluta wrote:
> Fix this by setting CHMOD to Output Mode so that pins will output zero
> when slots are masked or channels are disabled.
This patch seems to do this unconditionally. This is fine for
configurations where the SoC is the only thing
Hi all,
News: I will only be doing 2 more releases before I leave for Kernel
Summit (there may be some reports on Thursday, but I doubt I will have
time to finish the full release) and then no more until Sept 30.
Changes since 20190830:
The compiler-attributes tree lost its build failure.
The
From: Tianyu Lan
When the 'start' parameter is >= 0xFF00 on 32-bit
systems, or >= 0x'FF00 on 64-bit systems,
fill_gva_list gets into an infinite loop. With such inputs,
'cur' overflows after adding HV_TLB_FLUSH_UNIT and always
compares as less than end. Memory is filled with
Switch qxl to use drm_gem_object_funcs callbacks
instead of drm_driver callbacks.
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/qxl/qxl_drv.c| 8
drivers/gpu/drm/qxl/qxl_object.c | 12
2 files changed, 12 insertions(+), 8 deletions(-)
diff --git
This is dead code since 3.15. If their is no plan to
use it further, these can be removed forever.
Signed-off-by: Souptick Joarder
---
drivers/video/fbdev/68328fb.c | 12
1 file changed, 12 deletions(-)
diff --git a/drivers/video/fbdev/68328fb.c b/drivers/video/fbdev/68328fb.c
On GPD P2 Max, the firmware could not reset the touch panel correctly.
The kernel needs to take on the job instead, but the GpioInt definition
in DSDT specifies ActiveHigh while the GPIO pin should actually be
ActiveLow.
We need to override the polarity defined by DSDT. The GPIO driver
already
On Mon, Sep 02, 2019 at 11:17:14AM +0800, Xiaowei Bao wrote:
> Add PCIe EP mode support for ls1088a and ls2088a, there are some
> difference between LS1 and LS2 platform, so refactor the code of
> the EP driver.
>
> Signed-off-by: Xiaowei Bao
> ---
> v2:
> - This is a new patch for supporting
The firmware of GPD P2 Max could not handle panel resets although code
is present in DSDT. The kernel needs to take on this job instead, but
the DSDT does not provide _DSD, rendering kernel helpless when trying to
find the respective GPIO pins.
Fortunately, this time GPD has proper DMI vendor /
On Mon, Sep 02, 2019 at 03:34:31PM +0300, Sakari Ailus wrote:
> Hi Andy,
>
> On Mon, Sep 02, 2019 at 01:14:26PM +0300, Andy Shevchenko wrote:
> > On Mon, Sep 02, 2019 at 11:32:33AM +0300, Sakari Ailus wrote:
> > > Add two convenience functions for accessing node's parents:
> > >
> > >
On Sat, Aug 31, 2019 at 1:41 AM Michael Kelley wrote:
>
> From: lantianyu1...@gmail.com Sent: Thursday, August 29, 2019 11:16 PM
> >
> > From: Tianyu Lan
> >
> > fill_gva_list() populates gva list and adds offset
> > HV_TLB_FLUSH_UNIT(0x100) to variable "cur"
> > in the each loop. When diff
On Mon, 26 Aug 2019 at 14:06, Rob Herring wrote:
>
> On Fri, Aug 23, 2019 at 9:54 AM Krzysztof Kozlowski wrote:
> >
> > Convert Samsung S3C/Exynos Real Time Clock bindings to DT schema format
> > using json-schema.
> >
> > Signed-off-by: Krzysztof Kozlowski
> > ---
> >
On Fri 2019-08-30 16:37:10, Brendan Higgins wrote:
> On Fri, Aug 30, 2019 at 11:22:43PM +, tim.b...@sony.com wrote:
> > > -Original Message-
> > > From: Brendan Higgins
> > >
> > > On Fri, Aug 30, 2019 at 3:46 PM Joe Perches wrote:
> > > >
> > > > On Fri, 2019-08-30 at 21:58 +,
On Sun, Sep 01, 2019 at 05:34:00PM +0800, Gao Xiang wrote:
> > > + return iget5_locked(sb, hashval, erofs_ilookup_test_actor,
> > > + erofs_iget_set_actor, );
> > > +#endif
> >
> > Just use the slightly more complicated 32-bit version everywhere so that
> > you have a single actually
On Fri, Aug 30, 2019 at 04:25:08PM +0100, Steven Price wrote:
> On 30/08/2019 15:47, Andrew Jones wrote:
> > On Fri, Aug 30, 2019 at 09:42:46AM +0100, Steven Price wrote:
> >> Introduce a paravirtualization interface for KVM/arm64 based on the
> >> "Arm Paravirtualized Time for Arm-Base Systems"
On Mon, Sep 02, 2019 at 11:17:16AM +0800, Xiaowei Bao wrote:
> Add LS1088a in pci_device_id table so that pci-epf-test can be used
> for testing PCIe EP in LS1088a.
>
> Signed-off-by: Xiaowei Bao
> ---
> v2:
> - No change.
> v3:
> - No change.
>
> drivers/misc/pci_endpoint_test.c | 1 +
> 1
As per Intel's documentation, those 2 registers are starting from offset 47 and
not 48.
As a result, the reported values were incorrect.
Signed-off-by: Erwan Velu
---
tools/power/x86/turbostat/turbostat.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Trivial patch which just corrects error message.
Fixes: 371bb20d6927 ("power: Add simple gpio-restart driver")
Signed-off-by: Michal Simek
---
drivers/power/reset/gpio-restart.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/power/reset/gpio-restart.c
On Mon, Sep 02, 2019 at 12:03:12PM +1000, Michael Ellerman wrote:
> Michal Suchanek writes:
> > On bigendian ppc64 it is common to have 32bit legacy binaries but much
> > less so on littleendian.
>
> I think the toolchain people will tell you that there is no 32-bit
> little endian ABI defined
Hi Jonas,
Thanks for the series, I'll be reviewing this shortly.
On Sun, 2019-09-01 at 12:42 +, Jonas Karlman wrote:
> This series contains fixes and improvements for the hantro H264 decoder.
>
> Patch 1-6 fixes issues and limitations observed when preparing support
> for field encoded
On Mon, Sep 02, 2019 at 12:33:43PM +, Robert Richter wrote:
> Struct member dev_ch_attribute->channel is always used as unsigned
> int. Change type to unsigned int to avoid type casts.
>
> Signed-off-by: Robert Richter
> ---
> drivers/edac/edac_mc_sysfs.c | 2 +-
> 1 file changed, 1
On Sun, 2019-09-01 at 21:59 -0300, Rodrigo Carvalho wrote:
> This patch add device tree binding documentation for ADIS16240.
>
> Signed-off-by: Rodrigo Ribeiro Carvalho
> ---
> I have doubt about what maintainer I may to put in that documentation. I
> put Alexandru as maintainer because he
On Mon, Sep 02, 2019 at 11:17:15AM +0800, Xiaowei Bao wrote:
> Add PCIe EP node for ls1088a to support EP mode.
>
> Signed-off-by: Xiaowei Bao
> ---
> v2:
> - Remove the pf-offset proparty.
> v3:
> - No change.
>
> arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31
>
Hi Hillf,
Sorry for the late reply.
I have noticed that i didn't answer your question while preparing v3
On Fri, 9 Aug 2019 at 07:21, Hillf Danton wrote:
>
>
> On Thu, 1 Aug 2019 16:40:21 +0200 Vincent Guittot wrote:
> >
> > cfs load_balance only takes care of CFS tasks whereas CPUs can be
Tested on the Lenovo Yoga C630 where this patch enables the
keyboard, touchpad and touchscreen.
Signed-off-by: Lee Jones
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index
Tested on the Lenovo Yoga C630 where this patch enables USB.
Without it USB devices are not enumerated.
Signed-off-by: Lee Jones
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index
Tested on the Lenovo Yoga C630 where this patch enables the
framebuffer (screen/monitor). Without it the device appears
not to boot.
Signed-off-by: Lee Jones
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig
This patch will add a system calibration attribute for each channel. Using
this option the user will have the ability to calibrate each channel for
zero scale and full scale. It uses the iio_chan_spec_ext_info and IIO_ENUM
to implement the functionality.
Signed-off-by: Mircea Caprioru
---
On Mon, Sep 02, 2019 at 03:26:27PM +0300, Andy Shevchenko wrote:
> On Mon, Sep 02, 2019 at 11:32:40AM +0300, Sakari Ailus wrote:
> > Add a test for the %pfw printk modifier using software nodes.
>
> > + const struct software_node softnodes[] = {
> > + { .name = "first", },
> > +
Add initial ABI documentation for ad7192 adc sysfs interfaces.
Signed-off-by: Mircea Caprioru
---
Changelog V2:
- no changes here
Changelog V3:
- no changes here
Changelog V4:
- added sysfs ABI documentation
.../ABI/testing/sysfs-bus-iio-adc-ad7192 | 15 +++
1 file
This patch add device tree binding documentation for AD7192 adc in YAML
format.
Signed-off-by: Mircea Caprioru
---
Changelog V2:
- no changes here
Changelog V3:
- no changes here
Changelog V4:
- remove the const value from avdd and dvdd supply
.../bindings/iio/adc/adi,ad7192.yaml |
This patch exports the ad_sd_calibrate function in order to be able to
call it from outside ad_sigma_delta.
There are cases where the option to calibrate one channel at a time is
necessary (ex. system calibration for zero scale and full scale).
Signed-off-by: Mircea Caprioru
---
Changelog V2:
-
On 9/2/19 12:55 AM, Christoph Hellwig wrote:
On Sun, Sep 01, 2019 at 11:22:26AM -0700, Guenter Roeck wrote:
On Sat, Aug 31, 2019 at 12:36:13AM +1000, Stephen Rothwell wrote:
Hi all,
Changes since 20190829:
The compiler-attributes tree gained a build failure for which I reverted
a commit.
On Mon, Sep 02, 2019 at 09:38:59AM +0100, Lee Jones wrote:
> On Thu, 01 Aug 2019, Andy Shevchenko wrote:
>
> > Add an MFD driver for Intel Merrifield Basin Cove PMIC.
> >
> > Firmware on the platforms which are using Basin Cove PMIC is "smarter"
> > than on the rest supported by vanilla kernel.
On 02. 09. 19 6:58, Linus Torvalds wrote:
> On Sun, Sep 1, 2019 at 7:10 PM Randy Dunlap wrote:
>>
>> I guess we need a way to coerce that to call get_user_1(),
>> such as a typecast. This _seems_ to work (i.e., call get_user_1()):
>
> No, I oversimplified.
>
> Try this slightly modified patch
On Mon, Aug 19, 2019 at 01:52:52PM +0300, Andy Shevchenko wrote:
> It seems the commit bb475230b8e5
> ("reset: make optional functions really optional")
> brought couple of redundant lines in the comments.
>
> Drop them here.
Any comment on this?
>
> Cc: Ramiro Oliveira
> Signed-off-by: Andy
Hallo, wie geht es dir? Hoffe, du hast meine Nachricht erhalten. Ich
brauche jetzt deine dringende Antwort
Vielen Dank
Michelle
On Mon, Sep 02, 2019 at 09:20:24PM +1000, Daniel Axtens wrote:
> Hook into vmalloc and vmap, and dynamically allocate real shadow
> memory to back the mappings.
>
> Most mappings in vmalloc space are small, requiring less than a full
> page of shadow space. Allocating a full shadow page per
From: Bjorn Andersson
The Lenovo Yoga C630 is built on the SDM850 from Qualcomm, but this seem
to be similar enough to the SDM845 that we can reuse the sdm845.dtsi.
Supported by this patch is: keyboard, battery monitoring, UFS storage,
USB host and Bluetooth.
Signed-off-by: Bjorn Andersson
On Sun, 2019-09-01 at 21:59 -0300, Rodrigo Carvalho wrote:
> Move ADIS16240 driver from staging to mainline.
>
> The ADIS16240 is a fully integrated digital shock detection
> and recorder system.
Hey,
Comments inline.
I'll probably take a look in the next days again.
There seem to be some
Replace existing TPM 1.x version structs with new structs that consolidate
the common parts into a single struct so that code duplication is no longer
needed in caps_show().
Cc: Jerry Snitselaar
Signed-off-by: Jarkko Sakkinen
---
v2: Give back the TPM 1.1 version only if tpm1_getcap() returns
On Fri, Aug 30, 2019 at 09:09:02AM -0700, Jerry Snitselaar wrote:
> On Thu Aug 29 19, Jarkko Sakkinen wrote:
> + /* TPM 1.1 */
> > + if (tpm1_getcap(chip, TPM_CAP_VERSION_1_1, ,
> > + "attempting to determine the 1.1 version",
> > + sizeof(cap.version1)))
The actual code is reporting the EPB mode by considering a single value,
while Intel's specfication defines ranges.
This patch is about to report the EPB by considering ranges of energy_policy
to actually report the state of the processor.
This avoids reporting a "custom" value while the
On Mon, Sep 2, 2019 at 3:42 PM Mark Brown wrote:
>
> On Sat, Aug 31, 2019 at 01:55:14AM +0300, Daniel Baluta wrote:
>
> > Fix this by setting CHMOD to Output Mode so that pins will output zero
> > when slots are masked or channels are disabled.
>
> This patch seems to do this unconditionally.
On Fri, Aug 23, 2019 at 04:13:30AM +, Xiaowei Bao wrote:
>
>
> > -Original Message-
> > From: Kishon Vijay Abraham I
> > Sent: 2019年8月23日 11:40
> > To: Xiaowei Bao ; bhelg...@google.com;
> > robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo Li
> > ;
On Mon, Sep 2, 2019 at 12:01 PM Andy Shevchenko
wrote:
> On Sat, Aug 31, 2019 at 11:09:14AM +0800, Peter Cai wrote:
> > On GPD P2 Max, the firmware could not reset the touch panel correctly.
> > The kernel needs to take on the job instead, but the GpioInt definition
> > in DSDT specifies
On Mon, Sep 02, 2019 at 11:17:12AM +0800, Xiaowei Bao wrote:
> The different PCIe controller in one board may be have different
> capability of MSI or MSIX, so change the way of getting the MSI
> capability, make it more flexible.
>
> Signed-off-by: Xiaowei Bao
Please see the comments I just
On Wed, 28 Aug 2019 16:22:12 +0800, Chunfeng Yun wrote:
> This patch adds binding of pericfg for MT8183.
>
> Signed-off-by: Chunfeng Yun
> ---
> v2: no changes
> ---
> .../devicetree/bindings/arm/mediatek/mediatek,pericfg.txt| 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob
On Fri, 30 Aug 2019 12:32:27 +0800, Jiaxun Yang wrote:
> Loongson is a MIPS-compatible processor vendor.
>
> Signed-off-by: Jiaxun Yang
> ---
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring
On Sat, 31 Aug 2019 00:07:29 +0200, Lubomir Rintel wrote:
> Convert Marvell MMP SoC bindings to DT schema format using json-schema.
>
> Signed-off-by: Lubomir Rintel
>
> ---
> Changes since v2:
> - Add mrvl,pxa910
> - s/MMP2 Brownstone Board/MMP2 based boards/
>
> Changes since v1:
> - Added
On Thu, 29 Aug 2019 22:50:27 +0800, wrote:
> From: Yongqiang Niu
>
> This patch add mutex description for mt8183 display
>
> Signed-off-by: Yongqiang Niu
> ---
> Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob
On Tue, 27 Aug 2019 11:58:25 +0800, "Ramuthevar,Vadivel MuruganX"
wrote:
> From: Ramuthevar Vadivel Murugan
>
> Add new vendor specific compatible string to check Intel's Lightning
> Mountain(LGM) QSPI features enablement in cadence-quadspi driver.
>
> Signed-off-by: Ramuthevar
On Fri, 30 Aug 2019 15:40:49 +0800, Chunfeng Yun wrote:
> Support USB wakeup by ip-sleep mode for MT8183
>
> Signed-off-by: Chunfeng Yun
> ---
> v2~v3: no changes
> ---
> Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob
On Wed, Aug 28, 2019 at 08:43:14PM +0800, Ramuthevar,Vadivel MuruganX wrote:
> From: Ramuthevar Vadivel Murugan
>
> Add a YAML schema to use the host controller driver with the
> SDXC PHY on Intel's Lightning Mountain SoC.
>
> Signed-off-by: Ramuthevar Vadivel Murugan
>
> ---
>
On Wed, Aug 28, 2019 at 03:02:58AM +, Peng Fan wrote:
> From: Peng Fan
>
> The ARM SMC/HVC mailbox binding describes a firmware interface to trigger
> actions in software layers running in the EL2 or EL3 exception levels.
> The term "ARM" here relates to the SMC instruction as part of the
On Thu, Aug 29, 2019 at 12:11:54PM -0600, Lina Iyer wrote:
> In addition to configuring the PDC, additional registers that interface
> the GIC have to be configured to match the GPIO type. The registers on
> some QCOM SoCs are access restricted, while on other SoCs are not. They
> SoCs with access
On Wed, Aug 28, 2019 at 08:28:46PM +0800, Henry Chen wrote:
> Add interconnect provider dt-bindings for MT8183.
>
> Signed-off-by: Henry Chen
> ---
> .../devicetree/bindings/soc/mediatek/dvfsrc.txt| 9 +
> include/dt-bindings/interconnect/mtk,mt8183-emi.h | 18
>
On Fri, Aug 30, 2019 at 04:53:45PM -0400, Anson Huang wrote:
> NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
> system controller, the system controller is in charge of system
> power, clock and power key event etc. management, Linux kernel
> has to communicate with system controller
On Wed, 28 Aug 2019 12:17:55 -0700, Bjorn Andersson wrote:
> The UFS_RESET pin on Qualcomm SoCs are controlled by TLMM and exposed
> through the GPIO framework. Acquire the device-reset GPIO and use this
> to implement the device_reset vops, to allow resetting the attached
> memory.
>
> Based on
On Thu, 29 Aug 2019 17:22:30 +0800, Chunfeng Yun wrote:
> It's used to support dual role switch via GPIO when use Type-B
> receptacle, typically the USB ID pin is connected to an input
> GPIO, and also used to enable/disable device when the USB Vbus
> pin is connected to an input GPIO.
>
>
On Sun, Sep 01, 2019 at 12:39:21PM +0530, Pragnesh Patel wrote:
> Convert the riscv,sifive-serial binding to DT schema using json-schema.
>
> Signed-off-by: Pragnesh Patel
> ---
> .../devicetree/bindings/serial/sifive-serial.txt | 33
>
On Fri, Aug 30, 2019 at 12:32:20PM +0800, Jiaxun Yang wrote:
> Document Loongson-3 I/O Interrupt controller.
>
> Signed-off-by: Jiaxun Yang
> ---
> .../loongson,ls3-iointc.yaml | 75 +++
> 1 file changed, 75 insertions(+)
> create mode 100644
>
On 08/30, Eric W. Biederman wrote:
>
> --- a/kernel/exit.c
> +++ b/kernel/exit.c
> @@ -182,6 +182,24 @@ static void delayed_put_task_struct(struct rcu_head *rhp)
> put_task_struct(tsk);
> }
>
> +void put_dead_task_struct(struct task_struct *task)
> +{
> + bool delay = false;
> +
On 30/08/2019 19:16, Krishna Reddy wrote:
+ARM_SMMU_MATCH_DATA(nvidia_smmuv2, ARM_SMMU_V2, NVIDIA_SMMUV2);
From the previous discussions, I got the impression that other than the
'novel' way they're integrated, the actual SMMU implementations were unmodified
Arm MMU-500s. Is that the case,
On Thu, 29 Aug 2019 13:14:06 +0200, Thierry Reding wrote:
> From: Thierry Reding
>
> This is an implementation that IOMMU drivers can use to obtain reserved
> memory regions from a device tree node. It uses the reserved-memory DT
> bindings to find the regions associated with a given device.
On Fri, 30 Aug 2019 12:32:22 +0800, Jiaxun Yang wrote:
> Document Loongson-3 HyperTransport Interrupt controller.
>
> Signed-off-by: Jiaxun Yang
> ---
> .../loongson,ls3-htintc.yaml | 55 +++
> 1 file changed, 55 insertions(+)
> create mode 100644
>
On Fri, 30 Aug 2019 15:40:48 +0800, Chunfeng Yun wrote:
> Support USB wakeup by ip-sleep mode for MT8183
>
> Signed-off-by: Chunfeng Yun
> ---
> v2~v3: no changes
> ---
> Documentation/devicetree/bindings/usb/mediatek,mtu3.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring
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