On Thu, 14 May 2020 12:18:58 +0200 Ulf Hansson wrote:
>
>
> On Thu, 14 May 2020 at 07:45, Jisheng Zhang
> wrote:
> >
> > On Wed, 13 May 2020 14:15:21 +0200 Ulf Hansson wrote:
> >
> > >
> > >
> > > On Wed, 13 May 2020 at 11:47, Jisheng Zhang
> > > wrote:
> > > >
> > > > This reverts
Hi all,
After merging the tip tree, today's linux-next build (x86_64 allmodconfig)
failed like this:
arch/x86/kernel/ftrace.c: In function 'set_ftrace_ops_ro':
arch/x86/kernel/ftrace.c:444:32: error: 'ftrace_epilogue' undeclared (first use
in this function)
444 |end_offset = (unsigned
Hi Jiri,
On 5/9/2020 3:37 PM, Jin, Yao wrote:
Hi Jiri,
On 5/5/2020 8:03 AM, Jiri Olsa wrote:
On Sat, May 02, 2020 at 10:33:59AM +0800, Jin, Yao wrote:
SNIP
@@ -1461,6 +1461,9 @@ static int get_group_fd(struct evsel *evsel, int cpu, int
thread)
BUG_ON(!leader->core.fd);
fd =
Gustavo A. R. Silva wrote:
> The current codebase makes use of the zero-length array language
> extension to the C90 standard, but the preferred mechanism to declare
> variable-length types such as these ones is a flexible array member[1][2],
> introduced in C99:
>
> struct foo {
>int
On 12-05-20, 15:38, Andy Shevchenko wrote:
> On Tue, May 12, 2020 at 02:49:46PM +0300, Serge Semin wrote:
> > On Tue, May 12, 2020 at 12:08:04PM +0300, Andy Shevchenko wrote:
> > > On Tue, May 12, 2020 at 12:35:31AM +0300, Serge Semin wrote:
> > > > On Tue, May 12, 2020 at 12:01:38AM +0300, Andy
Hi,
On 5/15/20 08:54, Felipe Balbi wrote:
>
> Hi,
>
> Georgi Djakov writes:
>> On 5/14/20 20:13, Matthias Kaehlcke wrote:
>>> On Thu, May 14, 2020 at 02:30:28PM +0300, Felipe Balbi wrote:
Felipe Balbi writes:
> Hi,
>
> Sandeep Maheswaram writes:
>> +static int
Hey Linus,
As mentioned last week an i915 PR came in late, but I left it, so the
i915 bits of this cover 2 weeks, which is why it's likely a bit larger
than usual. Otherwise it's mostly amdgpu fixes, one tegra fix, one
meson fix.
Regards,
Dave.
drm-fixes-2020-05-15:
drm fixes for v5.7-rc6
i915
On 12-05-20, 15:35, Andy Shevchenko wrote:
> On Tue, May 12, 2020 at 12:16:22AM +0300, Serge Semin wrote:
> > On Fri, May 08, 2020 at 02:21:52PM +0300, Andy Shevchenko wrote:
> > > On Fri, May 08, 2020 at 01:53:01PM +0300, Serge Semin wrote:
> > > > Maximum block size DW DMAC configuration
This patch allows users to swap the Fn and left Control keys on all Apple
keyboards: internal (e.g. Macbooks) and external (both wired and wireless).
The patch adds a new hid-apple module param: swap_fn_leftctrl (off by default).
Signed-off-by: Zakhar Semenov
---
This patch was created to
On Sat, May 09, 2020 at 12:34:58AM +0200, Rikard Falkeborn wrote:
> A small series constifying struct debugfs_reg32 where it can be made
> const. There's no dependency between the patches.
>
> Rikard Falkeborn (4):
> crypto: ccree - constify struct debugfs_reg32
> crypto: hisilicon/hpre -
On Tue, May 05, 2020 at 03:53:45PM +0200, Arnd Bergmann wrote:
> When building for ARMv7-M, clang-9 or higher tries to unroll some loops,
> which ends up confusing the register allocator to the point of generating
> rather bad code and using more than the warning limit for stack frames:
>
>
Change since v7:
- specify compatible property as const string
- add maxItem in required property
- squash keypad example nodes
- sort header file with alphabetic order
- align all define values and add MTK_ prefix to make more uniform
- change debounce value to default 16ms if not specified in
Add dwcmshc specific system-level suspend and resume support.
Signed-off-by: Jisheng Zhang
---
drivers/mmc/host/sdhci-of-dwcmshc.c | 43 +
1 file changed, 43 insertions(+)
diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
b/drivers/mmc/host/sdhci-of-dwcmshc.c
index
On 2020/5/15 12:06, Matthew Wilcox wrote:
> On Thu, May 07, 2020 at 03:50:56PM +0800, Zhen Lei wrote:
>> @@ -266,7 +266,7 @@ int swap_writepage(struct page *page, struct
>> writeback_control *wbc)
>>
>> static sector_t swap_page_sector(struct page *page)
>> {
>> -return
On 2020/5/15 10:15, Jaegeuk Kim wrote:
> Let's guarantee flusing dirty meta pages to avoid infinite loop.
What's the root cause? Race case or meta page flush failure?
Thanks,
>
> Signed-off-by: Jaegeuk Kim
> ---
> fs/f2fs/checkpoint.c | 5 +++--
> 1 file changed, 3 insertions(+), 2
Hi,
Georgi Djakov writes:
>> Sandeep Maheswaram writes:
>>> +static int dwc3_qcom_interconnect_init(struct dwc3_qcom *qcom)
>>> +{
>>> + struct device *dev = qcom->dev;
>>> + int ret;
>>> +
>>> + if (!device_is_bound(>dwc3->dev))
>>> +
Hi Serge,
On 12-05-20, 15:42, Serge Semin wrote:
> Vinod,
>
> Could you join the discussion for a little bit?
>
> In order to properly fix the problem discussed in this topic, we need to
> introduce an additional capability exported by DMA channel handlers on
> per-channel
> basis. It must be
On Thu, May 14, 2020 at 05:53:55PM -0700, David Miller wrote:
> You're not undoing one, but two levels of abstraction here.
>
> Is this "ipip6_tunnel_locate()" call part of the SIT ioctl implementation?
Yes. Take a look at the convoluted case handling the
SIOCADDTUNNEL and SIOCCHGTUNNEL
On Thu, May 14, 2020 at 06:43:06PM -0600, Jeffrey Hugo wrote:
> On 5/14/2020 8:07 AM, Jeffrey Hugo wrote:
> > +#define QAIC_NAME "Qualcomm Cloud AI 100"
>
> > +static struct pci_driver qaic_pci_driver = {
> > + .name = QAIC_NAME,
>
> A question about the community's preference
On 12-05-20, 22:12, Andy Shevchenko wrote:
> On Tue, May 12, 2020 at 05:08:20PM +0300, Serge Semin wrote:
> > On Fri, May 08, 2020 at 02:41:53PM +0300, Andy Shevchenko wrote:
> > > On Fri, May 08, 2020 at 01:53:03PM +0300, Serge Semin wrote:
> > > > IP core of the DW DMA controller may be
On Tue, May 12, 2020 at 6:56 PM Neil Armstrong wrote:
>
> The new Khadas VIM2 and VIM3 boards controls the cooling fan via the
> on-board microcontroller.
>
> This implements the FAN control as thermal devices and as cell of the Khadas
> MCU MFD driver.
>
> Signed-off-by: Neil Armstrong
> ---
>
+CC: fstests
On Thu, May 14, 2020 at 4:15 PM Jeff Layton wrote:
>
> On Thu, 2020-05-14 at 13:48 +0100, Luis Henriques wrote:
> > On Thu, May 14, 2020 at 08:10:09AM -0400, Jeff Layton wrote:
> > > On Thu, 2020-05-14 at 12:14 +0100, Luis Henriques wrote:
> > > > Similarly to commit 03f219041fdb
On 2020/5/15 12:14, Matthew Wilcox wrote:
> On Thu, May 07, 2020 at 03:50:56PM +0800, Zhen Lei wrote:
>> +++ b/mm/page_io.c
>> @@ -38,7 +38,7 @@ static struct bio *get_swap_bio(gfp_t gfp_flags,
>>
>> bio->bi_iter.bi_sector = map_swap_page(page, );
>> bio_set_dev(bio,
On Tue, May 12, 2020 at 6:56 PM Neil Armstrong wrote:
>
> This Microcontroller is present on the Khadas VIM1, VIM2, VIM3 and Edge
> boards.
>
> It has multiple boot control features like password check, power-on
> options, power-off control and system FAN control on recent boards.
>
>
On 15.5.2020 8.45, jiahao wrote:
> It is obvious that XCHI_MAX_HALT_USEC is usec,
> not milliseconds; Replace 'milliseconds' with
> 'usec' of the debug message.
>
> Signed-off-by: jiahao
> ---
> drivers/usb/host/xhci.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
Hi Rik,
Commit 145f573b89a62 ("Make lazy TLB mode lazier").
A couple of questions here (and I don't know the x86 architecture too
well let alone the ASID stuff, so bear with me). I'm assuming, and it
appears to be in the x86 manual that you can't map the same physical
page with conflicting
On 2020/5/15 12:19, Matthew Wilcox wrote:
> On Thu, May 07, 2020 at 03:50:57PM +0800, Zhen Lei wrote:
>> +++ b/block/blk-settings.c
>> @@ -150,7 +150,7 @@ void blk_queue_max_hw_sectors(struct request_queue *q,
>> unsigned int max_hw_secto
>> unsigned int max_sectors;
>>
>> if
'--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url:
https://github.com/0day-ci/linux/commits/Kunihiko-Hayashi/PCI-uniphier-Add-features-for-UniPhier-PCIe-host-controller/20200515-125031
base: https://git.kernel.org/pub/scm/linux
Hi Mason,
On 15/05/20 10:26AM, masonccy...@mxic.com.tw wrote:
>
> Hi Pratyush,
>
> > > > > I can't apply your patches to enable xSPI Octal mode for
> > > > > mx25uw51245g because your patches set up Octal protocol first and
> > > > > then using Octal protocol to write Configuration Register
From: Andrii Nakryiko
Fix memory leak in hashmap_clear() not freeing hashmap_entry structs for each
of the remaining entries. Also NULL-out bucket list to prevent possible
double-free between hashmap__clear() and hashmap__free().
Running test_progs-asan flavor clearly showed this problem.
Allow use of hashmap in more than just libbpf, where it isn't an
exported symbol. Place in libapi as that is a required part of
tools/perf whereas libbpf is currently optional.
Modify perf's check-headers.sh script to check that the files are kept
in sync, in the same way kernel headers are
Break pmu-events test into 2 and add a test to verify that all pmu
metric expressions simply parse. Try to parse all metric ids/events,
skip/warn if metrics for the current architecture fail to parse. To
support warning for a skip, and an ability for a subtest to describe why
it skips.
Tested on
Remove #include of libbpf_internal.h that is unused.
Discussed in this thread:
https://lore.kernel.org/lkml/caef4bzzrmieds_8r8g4vaaewvjzpb4xylnpf0x2vny8otzk...@mail.gmail.com/
Signed-off-by: Ian Rogers
---
tools/lib/bpf/hashmap.h | 1 -
1 file changed, 1 deletion(-)
diff --git
Fixes the following warnings:
hashmap.c: In function ‘hashmap__clear’:
hashmap.h:150:20: error: comparison of integer expressions of different
signedness: ‘int’ and ‘size_t’ {aka ‘long unsigned int’} [-Werror=sign-compare]
150 | for (bkt = 0; bkt < map->cap; bkt++)\
hashmap.c: In
Localize the hashmap__* symbols in libbpf.a. To allow for a version in
libapi.
Before:
$ nm libbpf.a
...
0002088a t hashmap_add_entry
0001712a t hashmap__append
00020aa3 T hashmap__capacity
0002099c T hashmap__clear
000208b3 t hashmap_del_entry
Use a hashmap between a char* string and a double* value. While bpf's
hashmap entries are size_t in size, we can't guarantee sizeof(size_t) >=
sizeof(double). Avoid a memory allocation when gathering ids by making 0.0
a special value encoded as NULL.
Original map suggestion by Andi Kleen:
Now subtests can inform why a test was skipped. The upcoming patch
improvint PMU event metric testing will use it.
Signed-off-by: Ian Rogers
Cc: Adrian Hunter
Cc: Alexander Shishkin
Cc: Andi Kleen
Cc: Jin Yao
Cc: Jiri Olsa
Cc: John Garry
Cc: Kajol Jain
Cc: Kan Liang
Cc: Leo Yan
Cc: Mark
Perf's expr code currently builds an array of strings then removes
duplicates. The array is larger than necessary and has recently been
increased in size. When this was done it was commented that a hashmap
would be preferable.
libbpf has a hashmap but libbpf isn't currently required to build
On Thu, May 14, 2020 at 02:51:01PM -0400, Sasha Levin wrote:
> From: Christian Gromm
>
> [ Upstream commit 5e56bc06e18dfc8a66180fa369384b36e2ab621a ]
>
> This patch replaces function module_init() with subsys_initcall().
> It is needed to ensure that the core module of the driver is
>
On 14.05.20 01:34, Dongli Zhang wrote:
The systemd may be configured to mask ctrl-alt-del via "systemctl mask
ctrl-alt-del.target". As a result, the pv reboot would not work as signal
is ignored.
This patch always enables C_A_D before the call of ctrl_alt_del() in order
to force the reboot.
On Fri, 15 May 2020 at 08:00, Jisheng Zhang wrote:
>
> On Thu, 14 May 2020 12:18:58 +0200 Ulf Hansson wrote:
>
> >
> >
> > On Thu, 14 May 2020 at 07:45, Jisheng Zhang
> > wrote:
> > >
> > > On Wed, 13 May 2020 14:15:21 +0200 Ulf Hansson wrote:
> > >
> > > >
> > > >
> > > > On Wed, 13 May 2020
Hi Sagar,
On 14/05/20 04:50AM, Sagar Shrikant Kadam wrote:
> During SFDP parsing it is seen that the IS25WP256d device is missing 4BAIT
> (4-Byte address instruction table), due to which it's page program
> capacity doesn't get correctly populated and the device gets configured
> with 4-byte
On Fri, May 15, 2020 at 12:09:39PM +0800, Brent Lu wrote:
> The hw_base will be increased by runtime->buffer_size frames
> unconditionally if the runtime->status->hw_ptr is not updated for over
> half of buffer time. As the hw_base increases, so does the
> runtime->status->hw_ptr which could lead
This is the initial amplifier driver for max98390.
Signed-off-by: Steve Lee
---
Changes since V4:
* Revert return calibration status in max98390_dsm_calib_get:
There is no need to return calibration status in get function
because there is mixer control
Add documentation for DT binding of max98390 amplifier driver.
Signed-off-by: Steve Lee
---
Changed since V4:
* No changes.
Changed since V3:
* No changes.
Changed since V2:
* No changes.
Changed since V1:
* Modified sample text in example
Hi John,
On 2020/3/28 0:06, John Garry wrote:
> Since commits a7851aa54c0c ("io: change outX() to have their own IO
> barrier overrides") and 87fe2d543f81 ("io: change inX() to have their own
> IO barrier overrides"), the outX() and inX() functions have memory
> barriers which can be overridden
On Mon, 11 May 2020 at 18:19, Jerome Pouiller
wrote:
>
> From: Jérôme Pouiller
>
> The definitions of MMC_IOC_CMD and of MMC_IOC_MULTI_CMD rely on
> MMC_BLOCK_MAJOR:
>
> #define MMC_IOC_CMD _IOWR(MMC_BLOCK_MAJOR, 0, struct mmc_ioc_cmd)
> #define MMC_IOC_MULTI_CMD
On Wed, 13 May 2020 at 12:26, Jisheng Zhang wrote:
>
> We need a different set_uhs_signaling implementation for
> MMC_TIMING_MMC_HS and MMC_TIMING_MMC_HS400.
>
> Signed-off-by: Jisheng Zhang
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/sdhci-of-dwcmshc.c | 31
On Fri, 8 May 2020 at 08:42, Ben Chuang wrote:
>
> From: Ben Chuang
>
> GL9763E supports High Speed SDR, High Speed DDR, HS200, HS400, Enhanced
> Strobe in HS400 mode, 1/4/8 bits data bus and 3.3/1.8V.
>
> Signed-off-by: Ben Chuang
Applied for next, thanks!
Kind regards
Uffe
> ---
>
On Mon, 11 May 2020 at 08:22, Masahiro Yamada
wrote:
>
> Currently, tmio_mmc_irq() handler is registered before the host is
> fully initialized by tmio_mmc_host_probe(). I did not previously notice
> this problem.
>
> The boot ROM of a new Socionext SoC unmasks interrupts (CTL_IRQ_MASK)
>
On Fri, 15 May 2020 at 08:19, Jisheng Zhang wrote:
>
> Add dwcmshc specific system-level suspend and resume support.
>
> Signed-off-by: Jisheng Zhang
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/sdhci-of-dwcmshc.c | 43 +
> 1 file changed,
On Mon, 11 May 2020 at 08:29, Masahiro Yamada
wrote:
>
> Use FIELD_GET and FIELD_PREP to get access to the register fields. Delete
> the shift macros and use GENMASK() for the touched macros.
>
> Note that, this has the side-effect of changing the constants to 64-bit on
> 64-bit platforms.
>
>
On Tue, 12 May 2020 at 22:42, Martin Blumenstingl
wrote:
>
> Hello,
>
> this is the patchset for a driver for the Amlogic "SDHC" MMC controller
> found on Meson6, Meson8, Meson8b and Meson8m2 SoCs.
>
> The public S805 (Meson8b) datasheet has some documentation starting on
> page 74: [0]
>
> It's
On Fri, May 15, 2020 at 07:48:47AM +0300, Georgi Djakov wrote:
> On 9/12/19 19:33, Bjorn Andersson wrote:
> > On Thu, Aug 29, 2019 at 1:07 AM Viresh Kumar
> > wrote:
> >>
> >> Building individual drivers as modules is fine but allowing a core
> >> framework to be built as a module makes it
czw., 14 maj 2020 o 18:19 Arnd Bergmann napisał(a):
>
> On Thu, May 14, 2020 at 10:00 AM Bartosz Golaszewski wrote:
> >
> > From: Bartosz Golaszewski
> >
> > This adds the driver for the MediaTek Ethernet MAC used on the MT8* SoC
> > family. For now we only support full-duplex.
> >
> >
Hey Alex,
Just a small question...
> From: linux-iio-ow...@vger.kernel.org
> On Behalf Of Alexandru Ardelean
> Sent: Donnerstag, 14. Mai 2020 15:17
> To: linux-...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> st...@st-md-mailman.stormreply.com; linux-kernel@vger.kernel.org
>
Hi Paul & Paul,
> Am 03.05.2020 um 18:41 schrieb H. Nikolaus Schaller :
>
> Hi Paul and Paul,
>
>> Am 03.05.2020 um 16:18 schrieb Paul Cercueil :
>>
>>
>>
>> Le dim. 3 mai 2020 à 15:31, H. Nikolaus Schaller a
>> écrit :
>>> Hi Paul,
Am 03.05.2020 um 14:52 schrieb Paul Cercueil :
On Fri, 15 May 2020 06:09:39 +0200,
Brent Lu wrote:
>
> The hw_base will be increased by runtime->buffer_size frames
> unconditionally if the runtime->status->hw_ptr is not updated for over
> half of buffer time. As the hw_base increases, so does the
> runtime->status->hw_ptr which could lead to
On Fri 08-05-20 15:25:15, Feng Tang wrote:
> Use the existing vm_memory_committed() instead, which is also
> convenient for future change.
>
> Signed-off-by: Feng Tang
Acked-by: Michal Hocko
> ---
> fs/proc/meminfo.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
On Fri 08-05-20 15:25:16, Feng Tang wrote:
> percpu_counter_sum_positive() will provide more accurate info.
Why do we need that?
> Its time cost is about 800 nanoseconds on a 2C/4T platform and
> 2~3 microseconds on a 2S/36C/72T server in normal case, and in
> worst case where vm_committed_as's
Hi Prabhakar,
On Fri, May 15, 2020 at 12:10 AM Lad Prabhakar
wrote:
> config option PCIE_RCAR internally selects PCIE_RCAR_HOST which builds the
> same driver. So this patch renames CONFIG_PCIE_RCAR to
> CONFIG_PCIE_RCAR_HOST so that PCIE_RCAR can be safely dropped from Kconfig
> file.
>
>
On Mon, May 04, 2020 at 10:50:17AM -0700, Douglas Anderson wrote:
> cpu_pm_notify() is basically a wrapper of notifier_call_chain().
> notifier_call_chain() doesn't initialize *nr_calls to 0 before it
> starts incrementing it--presumably it's up to the callers to do this.
>
> Unfortunately the
On Thu, May 14, 2020 at 07:32:53PM -0700, Doug Anderson wrote:
> Hi,
>
> On Mon, May 4, 2020 at 10:50 AM Douglas Anderson
> wrote:
> >
> > cpu_pm_notify() is basically a wrapper of notifier_call_chain().
> > notifier_call_chain() doesn't initialize *nr_calls to 0 before it
> > starts
> > + if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_UUID)) {
> > + vgdev->has_resource_assign_uuid = true;
> > + }
>
>
> Just a question: this relies on DMA bufs so I assume it is
> not really assumed to work when DMA API is bypassed, right?
> Rather than worry what
On Thu, May 14, 2020 at 04:34:00PM +0200, Thomas Bogendoerfer wrote:
> With the change of platform file inclusion object were included via
> platform-y and core-y. Remove the core-y part to fix it.
>
> Fixes: 26bff9eb49201aeb ("MIPS: Only include the platformfile needed")
> Signed-off-by: Thomas
On Thu, May 14, 2020 at 01:12:34PM +0200, Thomas Bogendoerfer wrote:
> Changing inclusion of Platform files, broke VR41xx platforms. Add Makefile
> to vr41xx directory and traverse subdirs from it.
>
> Fixes: 26bff9eb49201aeb ("MIPS: Only include the platformfile needed")
> Signed-off-by: Thomas
Excerpts from Leonardo Bras's message of May 15, 2020 9:51 am:
> Implement rtas_call_reentrant() for reentrant rtas-calls:
> "ibm,int-on", "ibm,int-off",ibm,get-xive" and "ibm,set-xive".
>
> On LoPAPR Version 1.1 (March 24, 2016), from 7.3.10.1 to 7.3.10.4,
> items 2 and 3 say:
>
> 2 - For the
On Thu, May 14, 2020 at 04:22:10PM -0700, rana...@codeaurora.org wrote:
> On 2020-05-13 00:04, Greg KH wrote:
> > On Tue, May 12, 2020 at 02:39:50PM -0700, rana...@codeaurora.org wrote:
> > > On 2020-05-12 01:25, Greg KH wrote:
> > > > On Tue, May 12, 2020 at 09:22:15AM +0200, Jiri Slaby wrote:
>
Hi Poonam,
Poonam Aggrwal wrote on Fri, 15 May 2020
05:29:07 +:
> Adding Ashish.
>
> Regards
> Poonam
>
> > -Original Message-
> > From: Naresh Kamboju
> > Sent: Friday, May 15, 2020 10:57 AM
> > To: shiva.linuxwo...@gmail.com; Miquel Raynal ;
> > Shivamurthy Shastri
> > Cc:
On 2020/5/14 23:42, Hillf Danton wrote:
On Thu, 14 May 2020 13:12:18 +0800 Rong Chen wrote:
On 5/14/20 12:27 PM, Christian Kujau wrote:
On Tue, 12 May 2020, kernel test robot wrote:
FYI, we noticed a -71.8% regression of netperf.Throughput_total_tps due to
commit:
As noted in this
Hi, Alex,
When working on an updated version Yi and I found an design open
which needs your guidance.
In concept nested translation can be incarnated as one GPA->HPA page
table and multiple GVA->GPA page tables per VM. It means one container
is sufficient to include all SVA-capable devices
On 15-05-20, 12:30, Dilip Kota wrote:
> ComboPhy subsystem provides PHYs for various
> controllers like PCIe, SATA and EMAC.
>
> Signed-off-by: Dilip Kota
> ---
> Changes on v8:
> As per PHY Maintainer's request add description for doing register access
> through regmap in comments.
I dont
On Fri, May 15, 2020 at 11:23:05AM +0800, Tiezhu Yang wrote:
> When CONFIG_HAVE_STD_PC_SERIAL_PORT is set, include linux/module.h to fix
> the following build errors:
how are you doing this ? To me it looks like this CONFIG option isn't
used anymore.
Thomas.
--
Crap can work. Given enough
On Thu, 14 May 2020 21:50:53 +0200 Heiner Kallweit wrote:
>
>
> On 14.05.2020 08:25, Jisheng Zhang wrote:
> > On Wed, 13 May 2020 20:45:13 +0200 Heiner Kallweit wrote:
> >
> >>
> >> On 13.05.2020 08:51, Jisheng Zhang wrote:
> >>> Hi,
> >>>
> >>> On Tue, 12 May 2020 20:43:40 +0200 Heiner
On Fri 08-05-20 15:25:17, Feng Tang wrote:
> When checking a performance change for will-it-scale scalability
> mmap test [1], we found very high lock contention for spinlock of
> percpu counter 'vm_committed_as':
>
> 94.14% 0.35% [kernel.kallsyms] [k] _raw_spin_lock_irqsave
>
This document has below numbering of its sections:
1. Introduction
2. Using Event Tracing
2.1 Via the 'set_event' interface
2.2 Via the 'enable' toggle
2.3 Boot option
3. Defining an event-enabled tracepoint
4. Event formats
5. Event filtering
5.1 Expression syntax
5.2 Setting filters
5.3
On 05/15/20 06:41 am, Ian Rogers wrote:
>
> If you are looking at this code I believe there is a bug in that the
> loop handling jvmtiCompiledMethodLoadInlineRecord is writing out the
> entire line number table before a pc and not just the line number
> table at the pc. This loop in
On Fri 08-05-20 15:25:17, Feng Tang wrote:
> When checking a performance change for will-it-scale scalability
> mmap test [1], we found very high lock contention for spinlock of
> percpu counter 'vm_committed_as':
Btw. you are focusing on a microbenchmark here but I believe that there
are
On Tue, 2020-04-14 at 15:15 +0200, Joerg Roedel wrote:
> From: Joerg Roedel
>
> Convert the Mediatek-v1 IOMMU driver to use the probe_device() and
> release_device() call-backs of iommu_ops, so that the iommu core code
> does the group and sysfs setup.
>
> Signed-off-by: Joerg Roedel
> ---
>
Thomas,
Could you take a look at my comment below so I could proceed with the
patchset v3 development?
-Sergey
On Mon, May 11, 2020 at 04:31:21PM +0300, Serge Semin wrote:
> On Fri, May 08, 2020 at 05:41:50PM +0200, Thomas Bogendoerfer wrote:
> > On Wed, May 06, 2020 at 08:42:36PM +0300,
On 13-05-20, 00:24, Martin Blumenstingl wrote:
> This is a batch of fixes and improvements for the phy-meson8b-usb2
> driver:
> - convert the existing dt-bindings to json-schema and add a fallback
> compatible string which is already in existing .dtsi files
> - differentiate between Meson8 and
> From: Sudeep Holla
>
> Hi,
>
> This patch series adds support for SMCCCv1.2 ARCH_SOC_ID.
> This doesn't add other changes added in SMCCC v1.2 yet. They will
> follow these soon along with its first user SPCI/PSA-FF.
>
> This is tested using upstream TF-A + the patch[2] fixing the original
>
On 05/15/2020 03:39 PM, Thomas Bogendoerfer wrote:
On Fri, May 15, 2020 at 11:23:05AM +0800, Tiezhu Yang wrote:
When CONFIG_HAVE_STD_PC_SERIAL_PORT is set, include linux/module.h to fix
the following build errors:
how are you doing this ? To me it looks like this CONFIG option isn't
used
Hi,
This series reintroduces the usage of regulator_enable/disable() to the
OPP core after the previous attempt was reverted [1] shortly after getting
applied. This time the regulator is enabled only after it is configured
by the OPP core.
Marek, Kamil and Clément: Can you guys please test this
Reorder the code a bit to make it more readable. Add additional comment
as well.
Signed-off-by: Viresh Kumar
---
drivers/opp/core.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/opp/core.c b/drivers/opp/core.c
index e4f01e7771a2..dda8164fad56 100644
From: Kamil Konieczny
Add enable regulators to dev_pm_opp_set_regulators() and disable
regulators to dev_pm_opp_put_regulators(). Even if bootloader
leaves regulators enabled, they should be enabled in kernel in
order to increase the reference count.
Signed-off-by: Kamil Konieczny
[ Viresh:
Hi Tony,
> Am 03.05.2020 um 17:01 schrieb Tony Lindgren :
>
> * Paul Cercueil [200503 14:19]:
>> You have a new SoC with a SGX, and you only need to enable one clock to get
>> it to work. So you create a devicetree node which receives only one clock.
>>
>> Turns out, that the bootloader was
The mwifiex_cfg80211_dump_station() uses static variable for iterating
over a linked list of all associated stations (when the driver is in UAP
role). This has a race condition if .dump_station is called in parallel
for multiple interfaces. This corruption can be triggered by registering
multiple
> Am 05.05.2020 um 17:53 schrieb Rob Herring :
>
> On Fri, Apr 24, 2020 at 10:34:04PM +0200, H. Nikolaus Schaller wrote:
>> The Imagination PVR/SGX GPU is part of several SoC from
>> multiple vendors, e.g. TI OMAP, Ingenic JZ4780, Intel Poulsbo,
>> Allwinner A83 and others.
>>
>> With this
Hi Michal,
Thanks for the thorough reviews for these 3 patches!
On Fri, May 15, 2020 at 03:41:25PM +0800, Michal Hocko wrote:
> On Fri 08-05-20 15:25:17, Feng Tang wrote:
> > When checking a performance change for will-it-scale scalability
> > mmap test [1], we found very high lock contention
On Thu, May 14, 2020 at 09:16:13PM +0200, Mickaël Salaün wrote:
> On 14/05/2020 18:10, Stephen Smalley wrote:
> > On Thu, May 14, 2020 at 11:45 AM Kees Cook wrote:
> >> So, it looks like adding FMODE_EXEC into f_flags in do_open() is needed in
> >> addition to injecting MAY_EXEC into acc_mode in
On 14/05/2020 14:59, Felipe Balbi wrote:
> Neil Armstrong writes:
>
>> Hi,
>>
>> On 14/05/2020 12:23, Felipe Balbi wrote:
>>> Felipe Balbi writes:
>>>
Neil Armstrong writes:
> The USB support was initialy done with a set of PHYs and dwc3-of-simple
> because the architecture
A: http://en.wikipedia.org/wiki/Top_post
Q: Were do I find info about this thing called top-posting?
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing in e-mail?
A: No.
Q: Should I
On Fri, May 15, 2020 at 12:33:41PM +0800, Xiaoming Ni wrote:
> Move hung_task sysctl interface to hung_task_sysctl.c.
> Use register_sysctl() to register the sysctl interface to avoid
> merge conflicts when different features modify sysctl.c at the same time.
>
> Signed-off-by: Xiaoming Ni
> ---
On 15/05/2020 08:41, Amit Kucheria wrote:
> On Tue, May 12, 2020 at 6:56 PM Neil Armstrong
> wrote:
>>
>> The new Khadas VIM2 and VIM3 boards controls the cooling fan via the
>> on-board microcontroller.
>>
>> This implements the FAN control as thermal devices and as cell of the Khadas
>> MCU
On Fri, May 15, 2020 at 12:33:42PM +0800, Xiaoming Ni wrote:
> Add the shared variable SYSCTL_NEG_ONE to replace the variable neg_one
> used in both sysctl_writes_strict and hung_task_warnings.
>
> Signed-off-by: Xiaoming Ni
> ---
> fs/proc/proc_sysctl.c | 2 +-
> include/linux/sysctl.h
Hi Rob,
On 15/5/2020 10:08 am, Ramuthevar, Vadivel MuruganX wrote:
Hi Rob,
On 14/5/2020 8:57 pm, Rob Herring wrote:
On Wed, 13 May 2020 18:46:14 +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Add YAML file for dt-bindings to support NAND Flash Controller
on
On Fri, May 15, 2020 at 12:33:43PM +0800, Xiaoming Ni wrote:
> +static int sixty = 60;
This should be const. (Which will require a cast during extra2
assignment.)
--
Kees Cook
The MediaTek V1 IOMMU is arm32 whose default domain type is
IOMMU_DOMAIN_UNMANAGED. Add this to satisfy the bus_iommu_probe to
enter "probe_finalize".
The iommu framework will create a iommu domain for each a device.
But all the devices share a iommu domain here, thus we skip all the
other
On Fri, May 15, 2020 at 12:33:44PM +0800, Xiaoming Ni wrote:
> In order to eliminate the duplicate code for registering the sysctl
> interface during the initialization of each feature, add the
> register_sysctl_init() interface
I think this should come before the code relocations.
--
Kees Cook
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