On Mon, 29 Jun 2020 12:05:36 +0200, Krzysztof Kozlowski wrote:
> The driver supports also BMC156B and BMM150B. Add existing compatibles
> marking the BMM150B one as deprecated (due to redundant suffix "_magn"
> because the device unlike two others is a magnetometer only). Introduce
> a new,
On Wed, 24 Jun 2020 18:56:31 +0300, Iskren Chernev wrote:
> To compensate for the battery chemistry and operating conditions the
> chips support a compensation value. Specify one or two byte compensation
> via the maxim,rcomp byte array.
>
> Signed-off-by: Iskren Chernev
> ---
>
On Sat, 20 Jun 2020 18:36:51 +0200, Martin Blumenstingl wrote:
> Amlogic Meson6/8/8b/8m2 SoCs have two built-in MMC controllers:
> - SDIO (which is supported on mainline for a long time now but is
> limited to ~40MHz bus frequency)
> - SDHC (which supports up to HS-200 modes at ~100MHz bus
On Sat, 20 Jun 2020 18:23:47 +0200, Martin Blumenstingl wrote:
> Add the "timing-adjustment" clock now that we know how it is connected
> to the PRG_ETHERNET registers. It is used internally to generate the
> RGMII RX delay on the MAC side (if needed).
Applied, thanks!
[1/1] arm64: dts: amlogic:
On Sat, 20 Jun 2020 18:12:11 +0200, Martin Blumenstingl wrote:
> The "amlogic,meson-gx-pwrc-vpu" binding only supports the VPU power
> domain, while actually there are more power domains behind that set of
> registers. Switch to the new bindings so we can add more power domains
> as needed.
On Mon, Jul 13, 2020 at 08:34:12PM +0200, Daniel Vetter wrote:
> On Mon, Jul 13, 2020 at 5:57 PM Greg Kroah-Hartman
> wrote:
> >
> > On Mon, Jul 13, 2020 at 06:54:22PM +0300, Oded Gabbay wrote:
> > > From: Ofir Bitton
> > >
> > > Instead of using standard dma-fence mechanism designed for GPU's,
On Mon, Jul 13, 2020 at 11:00:32AM -0600, Jordan Crouse wrote:
> On Mon, Jul 13, 2020 at 04:11:23PM +0100, Will Deacon wrote:
> > On Thu, Jun 11, 2020 at 04:36:56PM -0600, Jordan Crouse wrote:
> > > Add a new implementation hook to allow the implementation specific code
> > > to tweek the context
On Sat, 20 Jun 2020 18:10:07 +0200, Martin Blumenstingl wrote:
> Now that the meson-ee-pwrc driver has gained support for the power
> domains on Meson8/Meson8b/Meson8m2 we can add it to the corresponding
> .dtsi files.
>
> So far this doesn't fix (or break) anything for me (probably because all
>
On Wed, Jun 24, 2020 at 06:56:29PM +0300, Iskren Chernev wrote:
> Maxim max17040 is a fuel gauge from a larger family utilising the Model
> Gauge technology. Document all different compatible strings that the
> max17040 driver recognizes.
>
> Some devices in the wild report double the capacity.
On Sun 12 Jul 19:00 PDT 2020, Kefeng Wang wrote:
> drivers/remoteproc/qcom_common.c: In function ‘qcom_ssr_get_subsys’:
> drivers/remoteproc/qcom_common.c:210:9: error: implicit declaration of
> function ‘kzalloc’; did you mean ‘vzalloc’?
> [-Werror=implicit-function-declaration]
> info =
On Wed, 24 Jun 2020 17:01:03 +0200, Konrad Dybcio wrote:
> MSM8994 has an APCS block similar to 8916, but
> with a different clock driver due to the former
> one having 2 clusters.
>
> Signed-off-by: Konrad Dybcio
> ---
> .../devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 +
>
From: Weilong Chen
Date: Mon, 13 Jul 2020 15:55:28 +0800
> When vlan_newlink call register_vlan_dev fails, it might return error
> with dev->reg_state = NETREG_UNREGISTERED. The rtnl_newlink should
> free the memory. But currently rtnl_newlink only free the memory which
> state is
On Wed, 24 Jun 2020 17:00:59 +0200, Konrad Dybcio wrote:
> This change adds a compatible for msm8994,
> which requires no additional clocks for
> scm to probe correctly.
>
> Signed-off-by: Konrad Dybcio
> ---
> Documentation/devicetree/bindings/firmware/qcom,scm.txt | 1 +
>
On Mon, Jun 22, 2020 at 10:43:27PM +0200, Luca Ceresoli wrote:
> The definition of "xxx-in-supply" was generic, thus define in detail the
> possible cases for each chip variant.
>
> Also document that the only possible I2C slave address is 0x60 as per the
> datasheet and fix the second example
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On 7/12/20 9:00 PM, Kefeng Wang wrote:
> drivers/remoteproc/qcom_common.c: In function ‘qcom_ssr_get_subsys’:
> drivers/remoteproc/qcom_common.c:210:9: error: implicit declaration of
> function ‘kzalloc’; did you mean ‘vzalloc’?
> [-Werror=implicit-function-declaration]
> info =
On Mon, 22 Jun 2020 21:25:57 +0200, Konrad Dybcio wrote:
> The Qualcomm SDM660 platform has a APCS HMSS GLOBAL block, add the
> compatible for this.
>
> Signed-off-by: Konrad Dybcio
> ---
> .../devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 +
>
From: "Alexander A. Klimov"
Date: Mon, 13 Jul 2020 09:51:08 +0200
> Rationale:
> Reduces attack surface on kernel devs opening the links for MITM
> as HTTPS traffic is much harder to manipulate.
>
> Deterministic algorithm:
> For each file:
> If not .svg:
> For each line:
> If
On 12/07/2020 17:05, Horatiu Vultur wrote:
> Thie patch adds support for MRP Interconnect. Similar with the MRP ring,
> if the HW can't generate MRP_InTest frames, then the SW will try to
> generate them. And if also the SW fails to generate the frames then an
> error is return to userspace.
>
>
On Thu, Jun 18, 2020 at 11:03:03AM +0530, Vishal Sagar wrote:
> Add bindings documentation for Xilinx UHD-SDI Receiver Subsystem.
>
> The Xilinx UHD-SDI Receiver Subsystem consists of SMPTE UHD-SDI (RX) IP
> core, an SDI RX to Video Bridge IP core to convert SDI video to native
> video and a
On Mon, 13 Jul 2020 08:59:31 +0200, Neil Armstrong wrote:
> Add the Khadas MCU node with active FAN thermal nodes for all the
> Khadas VIM3 variants.
Applied, thanks!
[1/1] arm64: dts: meson-khadas-vim3: add Khadas MCU nodes
commit: cabb1f3827109372dcb80081cc654eb54f997afc
Best regards,
Anybody help take a look at this deadlock?
Issue happened when raid_check was running, at that time, system memory
was not enough, one process which was doing path lookup from sysfs
triggered the direct memory reclaim, it was holding filesystem mutex
'kernelfs_mutex' and hung by io. The io
Em Mon, Jul 13, 2020 at 03:37:51PM +0300, Alexey Budankov escreveu:
>
> On 13.07.2020 15:17, Arnaldo Carvalho de Melo wrote:
> > Em Mon, Jul 13, 2020 at 12:48:25PM +0300, Alexey Budankov escreveu:
> >>
> >> On 10.07.2020 20:09, Arnaldo Carvalho de Melo wrote:
> >>> Em Fri, Jul 10, 2020 at
On Wed, 17 Jun 2020 00:33:52 +0200, Lubomir Rintel wrote:
> Convert the sa1100-rtc binding to DT schema format using json-schema.
> While add that, add clocks and resets that are actually used.
>
> Signed-off-by: Lubomir Rintel
>
> ---
> Changes since v1:
> - Remove interrupts/maxItems
> -
On Wed, 17 Jun 2020 00:33:51 +0200, Lubomir Rintel wrote:
> Convert the mrvl,intc binding to DT schema format using json-schema.
>
> Signed-off-by: Lubomir Rintel
>
> ---
> Changes since v1:
> - Move minItems/maxItems to main reg property definition from the
> conditional one
> - Drop the
On Wed, 17 Jun 2020 00:33:53 +0200, Lubomir Rintel wrote:
> A straightforward conversion of the mrvl,mmp-timer binding to DT schema
> format using json-schema.
>
> Signed-off-by: Lubomir Rintel
>
> ---
> Changes since v1:
> - Add default GPL-2.0-only license tag
> - Fill in maintainers from
Hi "周琰杰,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on balbi-usb/testing/next]
[also build test WARNING on usb/usb-testing robh/for-next v5.8-rc5
next-20200713]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting
On Wed, 17 Jun 2020 00:33:50 +0200, Lubomir Rintel wrote:
> A conversion of the i2c-pxa binding to DT schema format using json-schema.
>
> This also cleans ups some errors in the binding: The compatible string
> description suggested that "mmp" in "mrvl,mmp-twsi" is to be substituted
> with a
On Wed, 17 Jun 2020 00:33:49 +0200, Lubomir Rintel wrote:
> This converts the mrvl-gpio binding to DT schema format using json-schema.
>
> Various fixes were done during the conversion, such as adding more
> properties that are in fact mandatory or extending the examples to
> include child nodes
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On Mon 13 Jul 09:35 PDT 2020, Elliot Berman wrote:
> For the Qualcomm TrustZone firmwares which I am familiar with:
>
> Reviewed-by: Elliot Berman
>
Thanks for the patch Jonathan and thanks for the review Elliot!
Applied
Regards,
Bjorn
> On 7/4/2020 10:23 AM, Jonathan McDowell wrote:
> >
Matt Bennett writes:
> On Thu, 2020-07-02 at 13:59 -0500, Eric W. Biederman wrote:
>> Matt Bennett writes:
>>
>> > Previously the connector functionality could only be used by processes
>> > running in the
>> > default network namespace. This meant that any process that uses the
>> >
On Mon, 15 Jun 2020 15:32:39 +0200, Lars Povlsen wrote:
> The Sparx5 support 9 different clock outputs. This include file has
> defines for each supported clock ordinal.
>
> Reviewed-by: Stephen Boyd
> Reviewed-by: Alexandre Belloni
> Signed-off-by: Lars Povlsen
> ---
>
On Mon, 15 Jun 2020 15:32:38 +0200, Lars Povlsen wrote:
> This add the DT bindings documentation for the Sparx5 SoC DPLL clock
>
> Reviewed-by: Alexandre Belloni
> Signed-off-by: Lars Povlsen
> ---
> .../bindings/clock/microchip,sparx5-dpll.yaml | 52 +++
> 1 file changed, 52
On Mon, 15 Jun 2020 15:32:33 +0200, Lars Povlsen wrote:
> This adds the main Sparx5 SoC DT documentation file, with information
> abut the supported board types.
>
> Reviewed-by: Alexandre Belloni
> Signed-off-by: Lars Povlsen
> ---
> .../bindings/arm/microchip,sparx5.yaml| 65
- On Jul 11, 2020, at 11:54 AM, Christian Brauner
christian.brau...@ubuntu.com wrote:
>
> The registration is a thread-group property I'll assume, right, i.e. all
> threads will have rseq TLS or no thread will have it?
No, rseq registration is a per-thread property, but it would arguably
* Alexander A. Klimov [200712 23:49]:
> Rationale:
> Reduces attack surface on kernel devs opening the links for MITM
> as HTTPS traffic is much harder to manipulate.
Thanks applying into omap-for-v5.9/soc.
Tony
This patch uses the RVC support and encodings from bpf_jit.h to optimize
the rv64 jit.
The optimizations work by replacing emit(rv_X(...)) with a call to a
helper function emit_X, which will emit a compressed version of the
instruction when possible, and when RVC is enabled.
The JIT continues to
This patch adds functions for encoding and emitting compressed riscv
(RVC) instructions to the BPF JIT.
Some regular riscv instructions can be compressed into an RVC instruction
if the instruction fields meet some requirements. For example, "add rd,
rs1, rs2" can be compressed into "c.add rd,
Matt Bennett writes:
> On Thu, 2020-07-02 at 21:10 +0200, Christian Brauner wrote:
>> On Thu, Jul 02, 2020 at 08:17:38AM -0500, Eric W. Biederman wrote:
>> > Matt Bennett writes:
>> >
>> > > Previously the connector functionality could only be used by processes
>> > > running in the
>> > >
This patch makes the necessary changes to struct rv_jit_context and to
bpf_int_jit_compile to support compressed riscv (RVC) instructions in
the BPF JIT.
It changes the JIT image to be u16 instead of u32, since RVC instructions
are 2 bytes as opposed to 4.
It also changes ctx->offset and
This patch series enables using compressed riscv (RVC) instructions
in the rv64 BPF JIT.
RVC is a standard riscv extension that adds a set of compressed,
2-byte instructions that can replace some regular 4-byte instructions
for improved code density.
This series first modifies the JIT to support
Am 2020-07-13 20:23, schrieb Russell King - ARM Linux admin:
On Thu, Jul 09, 2020 at 11:35:23PM +0200, Michael Walle wrote:
The constants are taken from the USXGMII Singleport Copper Interface
specification. The naming are based on the SGMII ones, but with an
MDIO_
prefix.
Signed-off-by:
On 7/13/20 2:13 PM, Saheed Bolarinwa wrote:
Hello Larry,
On 7/13/20 7:16 PM, Larry Finger wrote:
On 7/13/20 7:22 AM, Saheed O. Bolarinwa wrote:
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.
Change all PCIBIOS_SUCCESSFUL
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On Mon, Jul 13, 2020 at 7:08 PM Mike Rapoport wrote:
>
> Any comments?
Looks good to me. I actually have a similar patch in my backlog, but
I never got around to sending that, so let's take your version.
Acked-by: Arnd Bergmann
>
> Shall I put it into the patch system or will it go via
On Mon, Jul 13, 2020 at 5:57 PM Greg Kroah-Hartman
wrote:
>
> On Mon, Jul 13, 2020 at 06:54:22PM +0300, Oded Gabbay wrote:
> > From: Ofir Bitton
> >
> > Instead of using standard dma-fence mechanism designed for GPU's, we
> > introduce our own implementation based on the former one. This
> >
On Fri, Jul 10, 2020 at 05:48:09PM +0200, Mohammed Gamal wrote:
> Check guest physical address against it's maximum physical memory. If
> the guest's physical address exceeds the maximum (i.e. has reserved bits
> set), inject a guest page fault with PFERR_RSVD_MASK set.
>
> This has to be done
On 7/7/20 00:13, Abel Vesa wrote:
> From: Leonard Crestez
>
> Add nodes for the main interconnect of the imx8m series chips.
>
> These nodes are bound to by devfreq and interconnect drivers.
>
> Signed-off-by: Leonard Crestez
> Signed-off-by: Abel Vesa
> Tested-by: Martin Kepplinger
>
On Mon, Jul 13, 2020 at 12:30 PM Rob Herring wrote:
>
> On Fri, 12 Jun 2020 17:49:11 -0500, Suman Anna wrote:
> > Add a bindings document that lists the common TI SCI properties
> > used by the K3 R5F and DSP remoteproc devices.
> >
> > Signed-off-by: Suman Anna
> > ---
> > v3: New Patch
On Fri, 12 Jun 2020 17:49:12 -0500, Suman Anna wrote:
> Some Texas Instruments K3 family of SoCs have one of more Digital Signal
> Processor (DSP) subsystems that are comprised of either a TMS320C66x
> CorePac and/or a next-generation TMS320C71x CorePac processor subsystem.
> Add the device tree
On Fri, 12 Jun 2020 17:49:11 -0500, Suman Anna wrote:
> Add a bindings document that lists the common TI SCI properties
> used by the K3 R5F and DSP remoteproc devices.
>
> Signed-off-by: Suman Anna
> ---
> v3: New Patch refactoring out the common ti-sci-proc properties
>
>
On Mon, Jul 13, 2020 at 8:13 PM Saheed Bolarinwa
wrote:
> On 7/13/20 7:16 PM, Larry Finger wrote:
>
> > Why is your name inside quotes in your s-o-b?
> >
> To keep me company before I get to know my way within the kernel.
>
> I saw people with >2 names do it, so I did! Please let me know if it is
On Fri, Jun 12, 2020 at 05:49:11PM -0500, Suman Anna wrote:
> Add a bindings document that lists the common TI SCI properties
> used by the K3 R5F and DSP remoteproc devices.
>
> Signed-off-by: Suman Anna
> ---
> v3: New Patch refactoring out the common ti-sci-proc properties
>
>
On 13/07/20 10:20 pm, Nicholas Piggin wrote:
Excerpts from Pratik Sampat's message of July 13, 2020 8:02 pm:
Thank you for your comments,
On 13/07/20 10:53 am, Nicholas Piggin wrote:
Excerpts from Pratik Rajesh Sampat's message of July 10, 2020 3:22 pm:
Changelog v1 --> v2:
1.
* Alexander A. Klimov [200708 02:35]:
> Rationale:
> Reduces attack surface on kernel devs opening the links for MITM
> as HTTPS traffic is much harder to manipulate.
...
> If you apply the patch, please let me know.
I'm applying this into omap-for-v5.9/dt thanks.
Tony
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On Mon, Jul 13, 2020 at 9:22 AM Vitaly Kuznetsov wrote:
>
> Before commit 850448f35aaf ("KVM: nVMX: Fix VMX preemption timer
> migration") struct kvm_vmx_nested_state_hdr looked like:
>
> struct kvm_vmx_nested_state_hdr {
> __u64 vmxon_pa;
> __u64 vmcs12_pa;
> struct {
>
On Fri, Jun 12, 2020 at 07:13:25PM +0200, Nicolas Saenz Julienne wrote:
> The firmware running on the RPi VideoCore can be used to reset and
> initialize HW controlled by the firmware.
>
> Signed-off-by: Nicolas Saenz Julienne
> Reviewed-by: Florian Fainelli
>
> ---
> Changes since v2:
> -
On 7/13/20 5:23 PM, Dan Carpenter wrote:
On Mon, Jul 13, 2020 at 04:16:07PM +0300, Dan Carpenter wrote:
On Sun, Jul 12, 2020 at 03:38:21PM +0300, Ivan Safonov wrote:
Remove unused members of struct xmit_buf: alloc_sz, ff_hwaddr,
dma_transfer_addr, bpending and last.
Signed-off-by: Ivan
On Thu, Jul 09, 2020 at 11:35:23PM +0200, Michael Walle wrote:
> The constants are taken from the USXGMII Singleport Copper Interface
> specification. The naming are based on the SGMII ones, but with an MDIO_
> prefix.
>
> Signed-off-by: Michael Walle
> ---
> include/uapi/linux/mdio.h | 26
On Thu, 9 Jul 2020 21:29:22 -0700
Sean Christopherson wrote:
> +Alex, whom I completely spaced on Cc'ing.
>
> Alex, this is related to the dreaded VFIO memslot zapping issue from last
> year. Start of thread: https://patchwork.kernel.org/patch/11640719/.
>
> The TL;DR of below: can you try
Add wrappers to take the modules "big lock" in order to encapsulate
conditional compilation (CONFIG_MODULES) inside the wrapper.
Cc: Andi Kleen
Suggested-by: Masami Hiramatsu
Signed-off-by: Jarkko Sakkinen
---
include/linux/module.h | 15 ++
kernel/kprobes.c| 4 +--
Remove CONFIG_MODULES dependency by flagging out the dependent code. This
allows to use kprobes in a kernel without support for loadable modules,
which could be useful for a test kernel or perhaps an embedded kernel.
Cc: Andi Kleen
Signed-off-by: Jarkko Sakkinen
---
arch/Kconfig
> On Jul 13, 2020, at 9:48 AM, Nicholas Piggin wrote:
>
> Excerpts from Andy Lutomirski's message of July 14, 2020 1:59 am:
>>> On Thu, Jul 9, 2020 at 6:57 PM Nicholas Piggin wrote:
>>>
>>> On big systems, the mm refcount can become highly contented when doing
>>> a lot of context switching
On Thu, Jul 09, 2020 at 11:35:23PM +0200, Michael Walle wrote:
> The constants are taken from the USXGMII Singleport Copper Interface
> specification. The naming are based on the SGMII ones, but with an MDIO_
> prefix.
>
> Signed-off-by: Michael Walle
> ---
> include/uapi/linux/mdio.h | 26
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
Nick Desaulniers writes:
> Hello folks,
> I'm working on putting together an LLVM "Micro Conference" for the
> upcoming Linux Plumbers Conf
> (https://www.linuxplumbersconf.org/event/7/page/47-attend). It's not
> solidified yet, but I would really like to run a session on support
> for Rust "in
On Wed, Jul 01, 2020 at 04:04:00PM +0800, Yang Weijiang wrote:
> Control-flow Enforcement Technology (CET) provides protection against
> Return/Jump-Oriented Programming (ROP/JOP) attack. There're two CET
> sub-features: Shadow Stack (SHSTK) and Indirect Branch Tracking (IBT).
> SHSTK is to
On 13/07/2020 09:38, Greg KH wrote:
> On Mon, Jul 13, 2020 at 09:37:29AM +0200, Christoph Hellwig wrote:
>> debugfs registrations typically go through a set of proxy ops to deal
>> with refcounting, which need to support every method that can be
>> supported. Add ->read_iter to the proxy ops to
Hello Larry,
On 7/13/20 7:16 PM, Larry Finger wrote:
On 7/13/20 7:22 AM, Saheed O. Bolarinwa wrote:
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.
Change all PCIBIOS_SUCCESSFUL to 0
Signed-off-by: "Saheed O. Bolarinwa"
Hi Daeho,
Please take a look at this.
https://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk/f2fs.git/commit/?h=dev=35245180459aebf6d70fde88a538f0400a794aa6
Thanks,
On 07/13, Daeho Jeong wrote:
> From: Daeho Jeong
>
> Changed the way of handling range.len of F2FS_IOC_SEC_TRIM_FILE.
> 1.
* Drew Fustini [200712 03:40]:
> These pins on the PocketBeagle P1 and P2 headers are connected to AM3358
> balls with gpio lines, and these pins are not used for any other
> peripherals by default. These GPIO lines are unclaimed and could be used
> by userspace program through the gpiod ABI.
>
On 07/13/20 18:54, Peter Zijlstra wrote:
> On Mon, Jul 13, 2020 at 03:27:55PM +0100, Qais Yousef wrote:
> > On 07/13/20 15:35, Peter Zijlstra wrote:
> > > > I protect this with rcu_read_lock() which as far as I know
> > > > synchronize_rcu()
> > > > will ensure if we do the update during this
* Drew Fustini [200709 22:35]:
> Modify omap_gpio_set_config() to handle pin config bias flags by calling
> gpiochip_generic_config().
>
> The pin group for the gpio line must have the corresponding pinconf
> properties:
>
> PIN_CONFIG_BIAS_PULL_UP requires "pinctrl-single,bias-pullup"
>
v2->v3:
Adjust the order of nodes according to the
corresponding address value.
周琰杰 (Zhou Yanjie) (3):
MIPS: Ingenic: Add Ingenic X1830 support.
dt-bindings: MIPS: Add Ingenic X1830 based boards.
MIPS: Ingenic: Add YSH & ATIL CU Neo board support.
Add a device tree and a defconfig for the Ingenic X1830 based
YSH & ATIL CU Neo board.
Tested-by: 周正 (Zhou Zheng)
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v1->v2:
1.Add DT node for LED.
2.Update defconfig for LED.
v2->v3:
Adjust the order of nodes according to the
Support the Ingenic X1830 SoC using the code under arch/mips/jz4740.
This is left unselectable in Kconfig until a X1830 based board is
added in a later commit.
Tested-by: 周正 (Zhou Zheng)
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v1->v2:
No change.
v2->v3:
Adjust the
Add bindings for Ingenic X1830 based board, prepare for later dts.
Tested-by: 周正 (Zhou Zheng)
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Notes:
v1->v2:
No change.
v2->v3:
No change.
Documentation/devicetree/bindings/mips/ingenic/devices.yaml | 12 +---
1 file changed,
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
thanks.
On 2020-07-13 7:49 a.m., Lee Jones wrote:
There has been little to no attempt to document any of the demoted
structures here. These are obviously not kerneldoc headers.
Fixes the following W=1 kernel build warning(s):
drivers/pinctrl/bcm/pinctrl-bcm281xx.c:65: warning: cannot
thanks.
On 2020-07-13 7:49 a.m., Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c:141: warning: Function parameter or
member 'chip' not described in 'iproc_set_bit'
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c:141: warning: Excess
On 07/10, Chao Yu wrote:
> On 2020/7/10 11:50, Jaegeuk Kim wrote:
> > On 07/10, Chao Yu wrote:
> >> On 2020/7/10 11:26, Jaegeuk Kim wrote:
> >>> On 07/10, Chao Yu wrote:
> On 2020/7/10 3:05, Jaegeuk Kim wrote:
> > On 07/09, Chao Yu wrote:
> >> On 2020/7/9 13:30, Jaegeuk Kim wrote:
>
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
See below.
On Thu, 2020-07-09 at 20:05 +0800, Jing Xiangfeng wrote:
> fcoe_fdmi_info() misses to call kfree() in an error path.
> Add a label 'free_fdmi' and jump to it.
>
> Fixes: f07d46bbc9ba ("fcoe: Fix smatch warning in fcoe_fdmi_info
> function")
> Signed-off-by: Jing Xiangfeng
> ---
>
From: Madhuparna Bhowmik
This patch fixes the macro _list_check_srcu() for CONFIG_PROVE_RCU_LIST =
False.
Reported-by: kernel test robot
Signed-off-by: Madhuparna Bhowmik
---
include/linux/rculist.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/rculist.h
On 2020 Jul 13, Chris Down wrote:
> Just to check in again since this is still happening: is this expected?
>
> I expect that if this is IWL_WARN, it should indicate some unexpected or
> non-ideal state, but the card seems to operate just fine afterwards.
I'm confused too, cause I'm seeing this
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On Sat, 11 Jul 2020 07:51:27 +0200
"Alexander A. Klimov" wrote:
> N: Derrick J. Brashear
> E: sha...@dementia.org
> -W: http://www.dementia.org/~shadow
> +W: https://www.dementia.org/~shadow
So while I do understand what you're trying to do, HTTPSifying something
that has become a spam site
With the support of generic PM callbacks, drivers no longer need to use
legacy .suspend() and .resume() in which they had to maintain PCI states
changes and device's power state themselves. All required operations are
done by PCI core.
After converting it into generic model, suspend() became an
With the support of generic PM callbacks, drivers no longer need to use
legacy .suspend() and .resume() in which they had to maintain PCI states
changes and device's power state themselves. The required operations are
done by PCI core.
Compile-tested only.
Signed-off-by: Vaibhav Gupta
---
Earlier, drivers had to manage the device's power states, and related
operations, themselves. With the generic approach, these are done by PCI
core.
The ide_pci_suspend() and ide_pci_resume(), declared in
include/linux/ide.h and defined in drivers/ide/setup-pci.c, were external
and were exported.
On Mon, 13 Jul 2020 20:19:09 +0300 Mike Rapoport wrote:
> On Mon, Jul 13, 2020 at 02:21:43PM +0200, SeongJae Park wrote:
> > On Mon, 13 Jul 2020 15:08:42 +0300 Mike Rapoport wrote:
> >
> > > Hi,
> > >
> > > On Mon, Jul 13, 2020 at 10:41:31AM +0200, SeongJae Park wrote:
> > > > From: SeongJae
Linux Kernel Mentee: Remove Legacy Power Management.
The purpose of this patch series is to remove legacy power management callbacks
from ide drivers.
The suspend() and resume() callbacks operations are still invoking
pci_save/restore_state(), pci_set_power_state(), pci_enable/disable_state(),
On Tue, Jul 07, 2020 at 08:09:41AM -0700, Rob Clark wrote:
> On Tue, Jul 7, 2020 at 5:34 AM Robin Murphy wrote:
> >
> > On 2020-06-26 21:04, Jordan Crouse wrote:
> > > Support auxiliary domains for arm-smmu-v2 to initialize and support
> > > multiple pagetables for a single SMMU context bank.
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
On Fri, 10 Jul 2020 08:20:19 +0200
"Alexander A. Klimov" wrote:
> Documentation/openrisc/openrisc_port.rst | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/openrisc/openrisc_port.rst
> b/Documentation/openrisc/openrisc_port.rst
> index
On Thu, 9 Jul 2020 20:27:42 +0200
"Alexander A. Klimov" wrote:
> Documentation/s390/monreader.rst | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/s390/monreader.rst
> b/Documentation/s390/monreader.rst
> index 1e857575c113..21cdfb699b49 100644
> ---
On Wed, 8 Jul 2020 19:19:05 +0200
"Alexander A. Klimov" wrote:
> The interface uses generic netlink framework (see
> -http://lwn.net/Articles/208755/ and http://people.suug.ch/~tgr/libnl/ for
> more
> +https://lwn.net/Articles/208755/ and http://people.suug.ch/~tgr/libnl/ for
> more
That
On Wed, 8 Jul 2020 18:18:39 +0200
"Alexander A. Klimov" wrote:
> Documentation/dev-tools/gcov.rst | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/dev-tools/gcov.rst
> b/Documentation/dev-tools/gcov.rst
> index 7bd013596217..9e989baae154 100644
> ---
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