Hi all,
Today's linux-next merge of the phy-next tree got a conflict in:
MAINTAINERS
between commit:
ef9303fdf46f ("dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx
DPDMA")
from the dmaengine tree and commit:
4a33bea00314 ("phy: zynqmp: Add PHY driver for the Xilinx ZynqMP
Global EN register guide to off before AMP_EN register
when amp disable sequence.
- remove AMP_EN control before max98390_dac_event call
Signed-off-by: Steve Lee
---
sound/soc/codecs/max98390.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/codecs/max98390.c
Modify dsm_init sequence and dsm param bin check condition.
- Move dsm_init() to after amp init setting to
make sure dsm init is last setting.
- dsm param bin check condition changed for extended register setting.
Signed-off-by: Steve Lee
---
sound/soc/codecs/max98390.c | 6 +++---
1
On 07/23, syzbot wrote:
>
> do not call blocking ops when !TASK_RUNNING; state=8 set at
> [<076362f5>] ptrace_stop+0x0/0x9e0 kernel/signal.c:2054
> WARNING: CPU: 1 PID: 17054 at kernel/sched/core.c:6883
> __might_sleep+0x135/0x190 kernel/sched/core.c:6883
#syz fix: sched: Fix race
> During umount, …
Do you refer to the action “unmount” here?
> f2fs_destroy_segment_manager(), it may cause …
Wording adjustments:
f2fs_destroy_segment_manager(). It might cause …
> … with procfs accessing, …
Avoid another typo?:
… with procfs accesses, …
> …, fix it by …
Please replace
On Thu, Jul 23, 2020 at 03:36:35PM -0700, Bhaumik Bhatt wrote:
> Autonomous low power mode support requires the MHI host to resume from
> multiple places and post a wakeup source to exit system suspend. This
> needs to be done in a non-blocking manner. Introduce a helper API to
> trigger the host
To correct the logic to detect whether the QUP HW version is greater
than 2.5.
Signed-off-by: Paras Sharma
---
drivers/tty/serial/qcom_geni_serial.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/qcom_geni_serial.c
> On 24-Jul-2020, at 9:46 AM, Alexey Kardashevskiy wrote:
>
>
>
> On 23/07/2020 23:11, Nicholas Piggin wrote:
>> Excerpts from Peter Zijlstra's message of July 23, 2020 9:40 pm:
>>> On Thu, Jul 23, 2020 at 08:56:14PM +1000, Nicholas Piggin wrote:
>>>
diff --git
> -Original Message-
> From: Sebastian Gottschall
> Sent: Friday, July 24, 2020 4:36 AM
> To: Rakesh Pillai ; ath...@lists.infradead.org
> Cc: linux-wirel...@vger.kernel.org; linux-kernel@vger.kernel.org;
> kv...@codeaurora.org; johan...@sipsolutions.net; da...@davemloft.net;
>
> -Original Message-
> From: Florian Fainelli
> Sent: Friday, July 24, 2020 12:33 AM
> To: Rakesh Pillai ; 'Andrew Lunn'
>
> Cc: ath...@lists.infradead.org; linux-wirel...@vger.kernel.org; linux-
> ker...@vger.kernel.org; kv...@codeaurora.org; johan...@sipsolutions.net;
>
> -Original Message-
> From: Johannes Berg
> Sent: Friday, July 24, 2020 1:37 AM
> To: Rakesh Pillai ; ath...@lists.infradead.org
> Cc: linux-wirel...@vger.kernel.org; linux-kernel@vger.kernel.org;
> kv...@codeaurora.org; da...@davemloft.net; k...@kernel.org;
> net...@vger.kernel.org;
HI,
On Fri, Jul 24, 2020 at 12:54 AM Maxime Ripard wrote:
>
> Hi,
>
> On Tue, Jul 14, 2020 at 03:20:29PM +0800, Frank Lee wrote:
> > From: Yangtao Li
> >
> > Allwinner A100 is a new SoC with Cortex-A53 cores, this commit adds
> > the basical DTSI file of it, including the clock, i2c, pins, sid,
Since commit 28bc24fc46f9 (vc: separate state), vc->vc_color is known as
vc->state.color. Somehow both me and 0-day bot missed this driver during
the conversion.
So fix the driver now.
Signed-off-by: Jiri Slaby
Cc: Bartlomiej Zolnierkiewicz
Cc: dri-de...@lists.freedesktop.org
Cc:
On Thu, Jul 23, 2020 at 02:57:22PM -0700, David Miller wrote:
> From: Andrea Righi
> Date: Wed, 22 Jul 2020 08:52:11 +0200
>
> > +static int xennet_remove(struct xenbus_device *dev)
> > +{
> > + struct netfront_info *info = dev_get_drvdata(>dev);
> > +
> > + dev_dbg(>dev, "%s\n",
On 24/07/20 6:55 am, Michael Neuling wrote:
On Fri, 2020-07-10 at 10:52 +0530, Pratik Rajesh Sampat wrote:
Additional registers DAWR0, DAWRX0 may be lost on Power 10 for
stop levels < 4.
Therefore save the values of these SPRs before entering a "stop"
state and restore their values on
On Fri, 2020-07-24 at 06:02 +0800, Matthias Brugger wrote:
>
> On 23/07/2020 23:29, Rob Herring wrote:
> > On Thu, Jul 23, 2020 at 05:07:31PM +0800, Seiya Wang wrote:
> >> From: Crystal Guo
> >>
> >> update mtk-wdt document for MT8192 platform
> >>
> >> Signed-off-by: Crystal Guo
> >> ---
> >>
On Fri, Jul 24, 2020 at 02:25:30AM +0100, Al Viro wrote:
> From: Al Viro
>
> quite a few architectures have the same csum_partial_copy_nocheck() -
> simply memcpy() the data and then return the csum of the copy.
>
> hexagon, parisc, ia64, s390, um: explicitly spelled out that way.
>
> arc,
Hi
An issue was fixed with the TPM space buffer size. The buffer is used to
store in-TPM objects while swapped out of the TPM for a /dev/tpmrm0
session. The code incorrectly used PAGE_SIZE, which obviously can vary.
With v5.9 changes the buffer has a fixed size of 16 kB.
In addition, the PR
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: f37e99aca03f63aa3f2bd13ceaf769455d12c4b0
commit: 670d0a4b10704667765f7d18f7592993d02783aa sparse: use identifiers to
define address spaces
date: 5 weeks ago
config: sh-randconfig-s031-20200724 (attached
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: f37e99aca03f63aa3f2bd13ceaf769455d12c4b0
commit: 58ad13729a8a3e0a354de46eaf9969f9116d4763 vdpa: make vhost, virtio
depend on menu
date: 3 months ago
config: arm-randconfig-s032-20200723 (attached as
This patch set adds initial support for allwinner a100 soc,
which is a 64-bit tablet chip.
v5:
-Drop redundant SOB for thermal series patch
-Trival a100 dtsi fix
v4:
-Drop "dt-bindings: pinctrl: sunxi: make gpio banks supplies required"
-Fix dcdc1 regulator name
-Get rid of underscore in dts
Hi Chun-Kuang,
On Fri, 2020-07-24 at 00:32 +0800, Chun-Kuang Hu wrote:
> Hi, Neal:
>
> Neal Liu 於 2020年7月23日 週四 下午2:11寫道：
> >
> > Hi Chun-Kuang,
> >
> > On Wed, 2020-07-22 at 22:25 +0800, Chun-Kuang Hu wrote:
> > > Hi, Neal:
> > >
> > > Neal Liu 於 2020年7月22日 週三 上午11:49寫道：
> > > >
> > > > Hi
From: Yangtao Li
This patch adds binding to a100's ccu clock and r-ccu clock.
Signed-off-by: Yangtao Li
Reviewed-by: Rob Herring
---
.../devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git
On Fri, Jul 24, 2020 at 10:18:07AM +0530, Madhuparna Bhowmik wrote:
> On Thu, Jul 23, 2020 at 03:11:58PM -0700, David Miller wrote:
> > From: madhuparnabhowmi...@gmail.com
> > Date: Wed, 22 Jul 2020 22:53:29 +0530
> >
> > > From: Madhuparna Bhowmik
> > >
> > > In capi_init(), after
From: Yangtao Li
Add support for a100 in the sunxi-ng CCU framework.
Signed-off-by: Yangtao Li
---
drivers/clk/sunxi-ng/Kconfig | 10 +
drivers/clk/sunxi-ng/Makefile |2 +
drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c | 214 +++
For compound instrumentation and assert accesses, skew the watchpoint
delay to be longer if randomized. This is useful to improve race
detection for such accesses.
For compound accesses we should increase the delay as we've aggregated
both read and write instrumentation. By giving up 1 call into
Add missing CONFIG_KCSAN_IGNORE_ATOMICS checks for the builtin atomics
instrumentation.
Signed-off-by: Marco Elver
---
v2:
* Add {} for readability.
Added to this series, as it would otherwise cause patch conflicts.
---
kernel/kcsan/core.c | 30 ++
1 file changed,
Add support for compounded read-write instrumentation if supported by
the compiler. Adds the necessary instrumentation functions, and a new
type which is used to generate a more descriptive report.
Furthermore, such compounded memory access instrumentation is excluded
from the "assume aligned
This series adds support for enabling compounded read-write
instrumentation, if supported by the compiler (Clang 12 will be the
first compiler to support the feature). The new instrumentation is
emitted for sets of memory accesses in the same basic block to the same
address with at least one read
Introduce read-write instrumentation hooks, to more precisely denote an
operation's behaviour.
KCSAN is able to distinguish compound instrumentation, and with the new
instrumentation we then benefit from improved reporting. More
importantly, read-write compound operations should not implicitly be
Use the new instrument_read_write() where appropriate.
Signed-off-by: Marco Elver
---
include/asm-generic/bitops/instrumented-atomic.h | 6 +++---
include/asm-generic/bitops/instrumented-lock.h | 2 +-
include/asm-generic/bitops/instrumented-non-atomic.h | 6 +++---
3 files changed, 7
Adds the new __tsan_read_write compound instrumentation to objtool's
uaccess whitelist.
Signed-off-by: Marco Elver
Acked-by: Peter Zijlstra (Intel)
---
tools/objtool/check.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/tools/objtool/check.c b/tools/objtool/check.c
index
Use instrument_atomic_read_write() for atomic RMW ops.
Signed-off-by: Marco Elver
---
v2:
* Update inline comment.
---
include/asm-generic/atomic-instrumented.h | 330 +++---
scripts/atomic/gen-atomic-instrumented.sh | 21 +-
2 files changed, 180 insertions(+), 171 deletions(-)
Changes kcsan-test module to support checking reports that include
compound instrumentation. Since we should not fail the test if this
support is unavailable, we have to add a config variable that the test
can use to decide what to check for.
Signed-off-by: Marco Elver
---
v2:
* Fix
From: Yangtao Li
Rather than a continual nesting of 'else' clauses, just make
each 'if' a new entry under 'allOf' and get rid of the else.
Signed-off-by: Yangtao Li
Reviewed-by: Rob Herring
---
.../pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 124 ++
1 file changed, 68
On Fri, Jul 24, 2020 at 08:05:47AM +0300, Jarkko Sakkinen wrote:
> Remove MODULES dependency by migrating from module_alloc() to the new
> text_alloc() API. Essentially these changes provide preliminaries for
> allowing to compile a static kernel with a proper tracing support.
>
> The same API
From: Yangtao Li
Add device tree binding Documentation details for A100 pinctrl driver,
which has a r pin controller and a pin controller with more irq lines.
Signed-off-by: Yangtao Li
Reviewed-by: Rob Herring
---
.../pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 15 +++
1 file
On Fri, 2020-07-24 at 06:00 +0800, Matthias Brugger wrote:
>
> On 23/07/2020 11:07, Seiya Wang wrote:
> > From: Crystal Guo
> >
> > add driver setting to support mt8192 wdt
> >
> > Signed-off-by: Crystal Guo
> > ---
> > drivers/watchdog/mtk_wdt.c | 5 +
> > 1 file changed, 5
On Tue, 21 Jul 2020 22:24:55 +0900 Masami Hiramatsu wrote:
>
>
> Hi Jisheng,
Hi,
>
> Would you be still working on this series?
I will rebase the implementation on the latest code, then try to address
your comments and Mark's comments. I will send out patches in this weekend.
>
> If you
On Thu, Jul 23, 2020 at 02:21:08PM +0530, Srikar Dronamraju wrote:
> A new sched_domain_topology_level was added just for Power9. However the
> same can be achieved by merging powerpc_topology with power9_topology
> and makes the code more simpler especially when adding a new sched
> domain.
>
>
From: Yangtao Li
This commit introduces support for the pin controller on A100.
Signed-off-by: Yangtao Li
---
drivers/pinctrl/sunxi/Kconfig | 10 +
drivers/pinctrl/sunxi/Makefile| 2 +
drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c | 105 +++
On Thu, Jul 23, 2020 at 02:21:10PM +0530, Srikar Dronamraju wrote:
> Move topology fixup based on the platform attributes into its own
> function which is called just before set_sched_topology.
>
> Cc: linuxppc-dev
> Cc: LKML
> Cc: Michael Ellerman
> Cc: Nicholas Piggin
> Cc: Anton Blanchard
> … introduced as a side ef another …
Would the following wording variant be more appropriate?
… introduced as a side effect of another …
How do you think about to replace the wording “…, I believe …”
by an imperative description?
Regards,
Markus
From: Yangtao Li
Add a binding for A100's SID controller.
Signed-off-by: Yangtao Li
Reviewed-by: Rob Herring
---
.../nvmem/allwinner,sun4i-a10-sid.yaml| 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git
On Wed, Jul 22, 2020 at 12:27:47PM +0530, Srikar Dronamraju wrote:
> * Gautham R Shenoy [2020-07-22 11:51:14]:
>
> > Hi Srikar,
> >
> > > diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
> > > index 72f16dc0cb26..57468877499a 100644
> > > --- a/arch/powerpc/kernel/smp.c
> > >
From: Yangtao Li
Add a binding for A100's ths controller.
Signed-off-by: Yangtao Li
Reviewed-by: Rob Herring
---
.../bindings/thermal/allwinner,sun8i-a83t-ths.yaml | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git
On Thu, Jul 23, 2020 at 02:21:11PM +0530, Srikar Dronamraju wrote:
> Current code assumes that cpumask of cpus sharing a l2-cache mask will
> always be a superset of cpu_sibling_mask.
>
> Lets stop that assumption. cpu_l2_cache_mask is a superset of
> cpu_sibling_mask if and only if
From: Yangtao Li
For sun50i_h6_ths_calibrate(), the data read from nvmem needs a round of
calculation. On the other hand, the newer SOC may store other data in
the space other than 12bit sensor data. Add mask operation to read data
to avoid conversion error.
Signed-off-by: Yangtao Li
---
From: Yangtao Li
This patch add thermal sensor controller support for A100,
which is similar to the previous ones.
Signed-off-by: Yangtao Li
---
drivers/thermal/sun8i_thermal.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/thermal/sun8i_thermal.c
From: Yangtao Li
The AXP803 can be used both using the RSB proprietary bus, or a more
traditional I2C bus.
Let's add that possibility.
Signed-off-by: Yangtao Li
Acked-by: Chen-Yu Tsai
---
drivers/mfd/axp20x-i2c.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mfd/axp20x-i2c.c
On Fri, Jul 24, 2020 at 11:44:02AM +0530, Paras Sharma wrote:
> To correct the logic to detect whether the QUP HW version is greater
> than 2.5.
The subject line and here does not make any sense. Can you reword this
as what the problem is and why you need to change this?
>
> Signed-off-by:
When recording with cache-misses and arm_spe_x event, i found that
it will just fail without showing any error info if i put cache-misses
after 'arm_spe_x' event.
[root@localhost 0620]# perf record -e cache-misses -e \
arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,\
- Firstly, the function auxtrace_record__init() will be invoked only
once, the variable "arm_spe_pmus" will not be used afterwards, thus
we don't need to check "arm_spe_pmus" is NULL or not;
- Another reason is, even though SPE is micro-architecture dependent,
but so far it only supports
v1 -> v2:
- Optimize code in patch 1 as Mathieu adviced.
- Fix memleak in patch 2.
- Detail the commit info to explain the reason.
This patch set fixes perf record failure when we mix arm_spe_x event
with other events in specific order.
Wei Li (2):
perf tools: Fix record failure when mixed
On Wed, Jul 22, 2020 at 12:23:44AM +, benbjiang(蒋彪) wrote:
>
>
> > +/*
> > + * This function takes care of adjusting the min_vruntime of siblings of
> > + * a core during coresched enable/disable.
> > + * This is called in stop machine context so no need to take the rq lock.
> Hi,
>
> IMHO,
Hi,
On 07/07/20 00:04, Peng Liu wrote:
> 'commit 840d719604b0 ("sched/deadline: Update rq_clock of later_rq when
> pushing a task")'
> introduced the update_rq_clock() to fix the "used-before-update" bug.
>
> 'commit f4904815f97a ("sched/deadline: Fix double accounting of rq/running bw
> in
From: Yangtao Li
There is no one use "allwinner,sun9i-a80-sc-nmi". The A80 uses
"allwinner,sun9i-a80-nmi".
Let's fix it.
Signed-off-by: Yangtao Li
Acked-by: Rob Herring
---
.../interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml| 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Joachim Fenkes
On BMCs with lower timer resolution than 1ms, msleep(1) will take
way longer than 1ms, so looping 10k times won't wait for 10s but
significantly longer.
Fix this by using jiffies like the rest of the code.
Fixes: 9f4a8a2d7f9d ("fsi/sbefifo: Add driver for the SBE FIFO")
Two SBE FIFO fixes by Joachim.
Joachim Fenkes (2):
fsi/sbefifo: Clean up correct FIFO when receiving reset request from
SBE
fsi/sbefifo: Fix reset timeout
drivers/fsi/fsi-sbefifo.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
--
2.27.0
From: Joachim Fenkes
When the SBE requests a reset via the down FIFO, that is also the
FIFO we should go and reset ;)
Fixes: 9f4a8a2d7f9d ("fsi/sbefifo: Add driver for the SBE FIFO")
Signed-off-by: Joachim Fenkes
Signed-off-by: Joel Stanley
---
drivers/fsi/fsi-sbefifo.c | 2 +-
1 file
On Thu, Jul 23, 2020 at 10:12:36AM -0700, Florian Fainelli wrote:
> On 7/23/20 12:37 AM, Krzysztof Kozlowski wrote:
> > The specific drivers in drivers/memory usually go via architecture (e.g.
> > ARM SoC) maintainers but the generic parts (of_memory.[ch]) lacked any
> > care.
> >
> >
On Thu, Jul 23, 2020 at 08:42:25AM +0100, David Howells wrote:
> Jarkko Sakkinen wrote:
>
> > Why f1774cb8956a lacked any possible testing? It extends ABI anyway.
> >
> > I think it is a kind of change that would require more screening before
> > getting applied.
>
> Yeah. It went in via a
From: Yangtao Li
Add a binding for A100's nmi controller.
Signed-off-by: Yangtao Li
Acked-by: Rob Herring
---
.../interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git
Hi James, Bjorn,
The Card reader(10ec:5287) is a combo chip with Ethernet(10ec:8168), we think
it is not cause by setting our device config space in idle time.
We dis/enable the ASPM(setting config space) at busy/idle time, it can make our
R/W performances well not a work around function
PCI
From: Yangtao Li
Allwinner A100 have a mv64xxx i2c interface available to be used.
Signed-off-by: Yangtao Li
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git
We add a separate CLINT timer driver for Linux RISC-V M-mode (i.e.
RISC-V NoMMU kernel).
The CLINT MMIO device provides three things:
1. 64bit free running counter register
2. 64bit per-CPU time compare registers
3. 32bit per-CPU inter-processor interrupt registers
Unlike other timer devices,
We add mechanism to set custom IPI operations so that CLINT driver
from drivers directory can provide custom IPI operations.
Signed-off-by: Anup Patel
Tested-by: Emil Renner Berhing
Reviewed-by: Atish Patra
---
arch/riscv/include/asm/clint.h | 25
The current RISC-V timer driver is convoluted and implements two
distinct timers:
1. S-mode timer: This is for Linux RISC-V S-mode with MMU. The
clocksource is implemented using TIME CSR and clockevent device
is implemented using SBI Timer calls.
2. M-mode timer: This is for Linux RISC-V
From: Yangtao Li
Allwinner A100 is a new SoC with Cortex-A53 cores, this commit adds
the basical DTSI file of it, including the clock, i2c, pins, sid, ths,
nmi, and UART support.
Signed-off-by: Yangtao Li
---
.../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 364 ++
1 file
We add DT bindings documentation for CLINT device.
Signed-off-by: Anup Patel
Reviewed-by: Palmer Dabbelt
Tested-by: Emil Renner Berhing
---
.../bindings/timer/sifive,clint.yaml | 60 +++
1 file changed, 60 insertions(+)
create mode 100644
Right now the RISC-V timer driver is convoluted to support:
1. Linux RISC-V S-mode (with MMU) where it will use TIME CSR for
clocksource and SBI timer calls for clockevent device.
2. Linux RISC-V M-mode (without MMU) where it will use CLINT MMIO
counter register for clocksource and CLINT
for_each_set_bit, or similar functions like for_each_cpu, may be hot
within the kernel. If many bits were set then one could imagine on
Intel a "bt" instruction with every bit may be faster than the function
call and word length find_next_bit logic. Add a benchmark to measure
this.
This benchmark
On Wed, Jul 22, 2020 at 11:06 PM Atish Patra wrote:
>
> On Wed, Jul 22, 2020 at 1:23 PM Arnd Bergmann wrote:
> >
> > I just noticed that rv32 allows 2GB of lowmem rather than just the usual
> > 768MB or 1GB, at the expense of addressable user memory. This seems
> > like an unusual choice, but I
From: Yangtao Li
Document board compatible names for Allwinner A100 Perf1 Board.
Signed-off-by: Yangtao Li
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml
From: Yangtao Li
A100 perf1 is an Allwinner A100-based SBC, with the following features:
- 1GiB DDR3 DRAM
- AXP803 PMIC
- 2 USB 2.0 ports
- MicroSD slot and on-board eMMC module
- on-board Nand flash
- ···
Adds initial support for it, including UART and PMU.
Signed-off-by: Yangtao Li
---
On Fri, 24 Jul 2020 at 01:39, Jiang Biao wrote:
>
> From: Jiang Biao
>
> Sched-idle CPU has been considered in select_idle_cpu and
> select_idle_smt, it also needs to be considered in select_idle_core to
> be consistent and keep the same *idle* policy.
In the case of select_idle_core, we are
On Thu, Jul 23, 2020 at 09:37:40AM -0400, Colin Walters wrote:
> On Tue, Jul 21, 2020, at 11:58 AM, Stefano Garzarella wrote:
>
> > my use case concerns virtualization. The idea, that I described in the
> > proposal of io-uring restrictions [1], is to share io_uring CQ and SQ queues
> > with a
Am 24.07.20 um 00:58 schrieb Mazin Rezk:
On Thursday, July 23, 2020 6:32 PM, Kees Cook wrote:
On Thu, Jul 23, 2020 at 09:10:15PM +, Mazin Rezk wrote:
When amdgpu_dm_atomic_commit_tail is running in the workqueue,
drm_atomic_state_put will get called while amdgpu_dm_atomic_commit_tail is
In arm_spe_read_record(), when we are processing an events packet,
'decoder->packet.index' is the length of payload, which has been
transformed in payloadlen(). So correct the check of 'idx'.
Signed-off-by: Wei Li
---
tools/perf/util/arm-spe-decoder/arm-spe-decoder.c | 6 +++---
1 file changed,
On Thu 23-07-20 19:39:54, David Hildenbrand wrote:
[...]
> Yeah, might require some code churn. It just feels wrong to involve
> buddy concepts (e.g., onlining pages, calling memory notifiers, exposing
> memory block devices) and introducing hacks (forced onlining) just to
> get a memmap+identity
On 23.07.2020 21:59, Florian Fainelli wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> On 7/21/20 10:13 AM, Codrin Ciubotariu wrote:
>> The MACB embeds an MDIO bus controller. For this reason, the PHY nodes
>> were represented as
> Subject: [PATCH v6 0/9] remoteproc: Add support for attaching with rproc
For the series,
Tested-by: Peng Fan
Regards,
Peng.
>
> This set provides functionality allowing the remoteproc core to attach to a
> remote processor that was started by another entity.
>
> New in V6:
> 1) Added
The raid5 and raid10 drivers currently update the read-ahead size,
but not the optimal I/O size on reshape. To prepare for deriving the
read-ahead size from the optimal I/O size make sure it is updated
as well.
Signed-off-by: Christoph Hellwig
---
drivers/md/raid10.c | 22
Generate the queue_sysfs_entry given that we have all the required
information for it, and rename the generated show and store methods
to match the other ones in the file.
Signed-off-by: Christoph Hellwig
Reviewed-by: Johannes Thumshirn
---
block/blk-sysfs.c | 31
Add two helpers macros to avoid boilerplate code for the queue sysfs
entries.
Signed-off-by: Christoph Hellwig
Reviewed-by: Johannes Thumshirn
---
block/blk-sysfs.c | 248 +++---
1 file changed, 58 insertions(+), 190 deletions(-)
diff --git
BDI_CAP_SYNCHRONOUS_IO is only checked in the swap code, and used to
decided if ->rw_page can be used on a block device. Just check up for
the method instead. The only complication is that zram needs a second
set of block_device_operations as it can switch between modes that
actually support
Replace the two negative flags that are always used together with a
single positive flag that indicates the writeback capability instead
of two related non-capabilities. Also remove the pointless wrappers
to just check the flag.
Signed-off-by: Christoph Hellwig
---
fs/9p/vfs_file.c
The last user of SB_I_MULTIROOT is disappeared with commit f2aedb713c28
("NFS: Add fs_context support.")
Signed-off-by: Christoph Hellwig
Reviewed-by: Johannes Thumshirn
---
fs/namei.c | 4 ++--
include/linux/fs.h | 1 -
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git
Drivers shouldn't really mess with the readahead size, as that is a VM
concept. Instead set it based on the optimal I/O size by lifting the
algorithm from the md driver when registering the disk. Also set
bdi->io_pages there as well by applying the same scheme based on
max_sectors.
Hi Jens,
this series contains a bunch of different BDI cleanups. The biggest item
is to isolate block drivers from the BDI in preparation of changing the
lifetime of the block device BDI in a follow up series.
Changes since v2:
- fix a rw_page return value check
- fix various changelogs
This case isn't ever used.
Signed-off-by: Christoph Hellwig
Reviewed-by: Johannes Thumshirn
---
drivers/block/drbd/drbd_req.c | 4
include/linux/drbd.h | 1 -
2 files changed, 5 deletions(-)
diff --git a/drivers/block/drbd/drbd_req.c b/drivers/block/drbd/drbd_req.c
index
The BDI_CAP_STABLE_WRITES is one of the few bits of information in the
backing_dev_info shared between the block drivers and the writeback code.
To help untangling the dependency replace it with a queue flag and a
superblock flag derived from it. This also helps with the case of e.g.
a file
Replace BDI_CAP_NO_ACCT_WB with a positive BDI_CAP_WRITEBACK_ACCT to
make the checks more obvious. Also remove the pointless
bdi_cap_account_writeback wrapper that just obsfucates the check.
Signed-off-by: Christoph Hellwig
---
fs/fuse/inode.c | 3 ++-
include/linux/backing-dev.h
Just checking SB_I_CGROUPWB for cgroup writeback support is enough.
Either the file system allocates its own bdi (e.g. btrfs), in which case
it is known to support cgroup writeback, or the bdi comes from the block
layer, which always supports cgroup writeback.
Signed-off-by: Christoph Hellwig
There is no point in trying to call bdev_read_page if SWP_SYNCHRONOUS_IO
is not set, as the device won't support it.
Signed-off-by: Christoph Hellwig
---
mm/page_io.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/mm/page_io.c b/mm/page_io.c
index
Ever since the switch to blk-mq, a lower device not used for VM
writeback will not be marked congested, so the check will never
trigger.
Signed-off-by: Christoph Hellwig
---
drivers/block/drbd/drbd_nl.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/block/drbd/drbd_nl.c
Set up a readahead size by default, as very few users have a good
reason to change it.
Signed-off-by: Christoph Hellwig
Acked-by: David Sterba [btrfs]
Acked-by: Richard Weinberger [ubifs, mtd]
---
block/blk-core.c | 1 -
drivers/mtd/mtdcore.c | 1 +
fs/9p/vfs_super.c | 4 ++--
On Thu 23-07-20 15:44:17, Muchun Song wrote:
> In the reservation routine, we only check whether the cpuset meets
> the memory allocation requirements. But we ignore the mempolicy of
> MPOL_BIND case. If someone mmap hugetlb succeeds, but the subsequent
> memory allocation may fail due to
Dear All,
Changes since v1:
1. Few new patches,
2. Please see individual logs (per patch).
The drivers/memory directory contains generic code (of_memory.c) and a
bunch of drivers. Changes to generic code were coming usually through
different trees with the driver code.
Over last days, memory
Messages printed by generic of_memory code will still be using device
context so their location/meaning will be known. Printing __func__ is
not needed.
Signed-off-by: Krzysztof Kozlowski
---
drivers/memory/of_memory.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff
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