Hi Chen-Yu,
On Mon, 28 Sep 2020 at 06:40, Chen-Yu Tsai wrote:
>
> On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
> >
> > From: Jernej Skrabec
> >
> > H6 I2S is very similar to that in H3, except it supports up to 16
> > channels.
> >
> > Signed-off-by: Jernej Skrabec
> > Signed-off-by:
On Thu, Sep 24, 2020 at 05:38:10PM -0700, Sean Christopherson wrote:
> > I can see why you would write "TCS" though - there's a thread control
> > structure thing too in that patch.
>
> Argh, it's actually supposed to be TCS, SGX_ENCLAVE_RUN_TSC is the one that's
> wrong.
So I presume that I
Sorry, the previous email is corrupted. This is a resending.
In the current code, if the architecture supports PTE_SPECIAL,
__vm_insert_mixed() becomes a simple encapsulation of insert_pfn()
because it always calls insert_pfn() and never calls insert_page(). This
behavior is inconsistent with the
Hi Catalin
Thanks for your opinions.
在 2020/9/22 17:58, Catalin Marinas 写道:
> On Mon, Sep 21, 2020 at 02:00:05AM +, Chen Jun wrote:
>> From: Wei Yongjun
>>
>> Currently the reporting of the percpu chunks leaking problem
>> are not supported. This patch introduces this function.
>>
>> Since
From: Dmitry Kasatkin
> Sent: 28 September 2020 15:03
>
> "copy_mount_options" function came to my eyes.
> It splits copy into 2 pieces - over page boundaries.
> I wonder what is the real reason for doing this?
> Original comment was that we need exact bytes and some user memcpy
> functions do
From: Alejandro Colomar
> Sent: 28 September 2020 14:33
...
> There are a few cases: if I want to find declarations of type int,
> I'd start with:
>
> $ grep -rn "int\s"
>
> or something like that. "int\~" would break the ability to do that.
The 'word markers' \< and \> are your friends; look
dan.j.wiilli...@intel.com
Bcc:
Subject: Can we remove the checking of CONFIG_ARCH_HAS_PTE_SPECIAL in
__vm_insert_mixed?
Reply-To:
In the current code, if the architecture supports PTE_SPECIAL,
__vm_insert_mixed() becomes a simple encapsulation of insert_pfn()
because it always calls
Hi Maxime,
On Mon, 28 Sep 2020 at 10:43, Maxime Ripard wrote:
>
> On Mon, Sep 21, 2020 at 08:37:09PM +0200, Jernej Škrabec wrote:
> > Dne ponedeljek, 21. september 2020 ob 19:23:49 CEST je Clément Péron
> > napisal(a):
> > > Hi Maxime,
> > >
> > > On Mon, 21 Sep 2020 at 15:59, Maxime Ripard
Hello,
"Ramuthevar,Vadivel MuruganX"
wrote on Thu, 24 Sep 2020
16:48:40 +0800:
> This patch adds the new IP of Nand Flash Controller(NFC) support
> on Intel's Lightning Mountain(LGM) SoC.
>
> DMA is used for burst data transfer operation, also DMA HW supports
> aligned 32bit memory address and
Hi guys,
On Monday 28 Sep 2020 at 13:55:49 (+0200), Dietmar Eggemann wrote:
> On 25/09/2020 15:59, Quentin Perret wrote:
> > Hey Ionela,
> >
> > On Thursday 24 Sep 2020 at 17:10:02 (+0100), Ionela Voinescu wrote:
> >> I'm not sure what is a good way of fixing this.. I could add more info
> >> to
On Mon, Sep 28, 2020 at 08:20:18AM +0200, Ard Biesheuvel wrote:
> On Mon, 28 Sep 2020 at 07:56, Christophe Leroy
> wrote:
> >
> >
> >
> > Le 28/09/2020 à 01:44, Jarkko Sakkinen a écrit :
> > > On Fri, Sep 25, 2020 at 09:00:18AM -0300, Jason Gunthorpe wrote:
> > >> On Fri, Sep 25, 2020 at
On Sun, Sep 27, 2020 at 9:44 PM Tomasz Figa wrote:
>
> On Sun, Sep 27, 2020 at 9:39 PM Wolfram Sang wrote:
> >
> >
> > > I think we might be overly complicating things. IMHO the series as is
> > > with the "i2c_" prefix removed from the flags introduced would be
> > > reusable as is for any
On Sun, Sep 27 2020 at 16:04, Hillf Danton wrote:
> Sat, 26 Sep 2020 17:38:16 -0700
>
> Dunno if it's down to memory barrier.
>
> --- a/kernel/time/hrtimer.c
> +++ b/kernel/time/hrtimer.c
> @@ -929,7 +929,7 @@ u64 hrtimer_forward(struct hrtimer *time
> if (delta < 0)
> return
On Mon, Sep 28, 2020 at 02:08:29PM +, chenjun (AM) wrote:
> On Mon, Sep 21, 2020 at 02:00:05AM +, Chen Jun wrote:
> > From: Wei Yongjun
> >> @@ -651,6 +672,19 @@ static void create_object(unsigned long ptr, size_t
> >> size, int min_count,
> >>raw_spin_unlock_irqrestore(_lock,
Hello,
Guenter Roeck wrote on Mon, 21 Sep 2020 20:26:19
-0700:
> On 9/21/20 8:18 PM, Naresh Kamboju wrote:
> > On Fri, 14 Aug 2020 at 14:26, Guenter Roeck wrote:
> >>
> >> On Mon, Jun 15, 2020 at 11:17:40AM +0200, Álvaro Fernández Rojas wrote:
> >>> Instead of trying to parse CFE version
Hi Jarkko,
> On Sep 28, 2020, at 22:06, Jarkko Sakkinen
> wrote:
>
> On Mon, Sep 28, 2020 at 08:31:04PM +0800, Kai-Heng Feng wrote:
>> Commit 7f3d176f5f7e "tpm: Require that all digests are present in
>> TCG_PCR_EVENT2 structures" causes a null pointer dereference on all
>> laptops I have:
>
On Thu, 24 Sep 2020, Alexei Starovoitov wrote:
> to whatever number, but printing single task_struct needs ~800 lines and
> ~18kbytes. Humans can scroll through that much spam, but can we make it less
> verbose by default somehow?
> May be not in this patch set, but in the follow up?
>
One
On 28/09/2020 16:03, Ezequiel Garcia wrote:
> A seemingly bad rebase introduced a spurious v4l2_m2m_buf_done,
> which releases a buffer twice and therefore triggers a
> noisy warning on each job:
>
> WARNING: CPU: 0 PID: 0 at drivers/media/common/videobuf2/videobuf2-core.c:986
>
Thank you Ezequiel,
Tested-by: Adrian Ratiu
On Mon, 28 Sep 2020, Ezequiel Garcia
wrote:
A seemingly bad rebase introduced a spurious v4l2_m2m_buf_done,
which releases a buffer twice and therefore triggers a
noisy warning on each job:
WARNING: CPU: 0 PID: 0 at
On Mon, 28 Sep 2020 at 19:15, Pintu Agarwal wrote:
>
> On Sat, 26 Sep 2020 at 22:10, Kees Cook wrote:
>
> > > >> I wonder if this is an Android Common kernel?
> > > It uses the below kernel for 4.14:
> > > https://gitlab.com/quicla/kernel/msm-4.14/-/tree/LE.UM.3.4.2.r1.5 (or
> > > similar
From: Kan Liang
An error occues when sampling non-PEBS INST_RETIRED.PREC_DIST(0x01c0)
event.
perf record -e cpu/event=0xc0,umask=0x01/ -- sleep 1
Error:
The sys_perf_event_open() syscall returned with 22 (Invalid argument)
for event (cpu/event=0xc0,umask=0x01/).
/bin/dmesg | grep -i
On Sat, Sep 26, 2020 at 3:30 AM zhuguangqing83 wrote:
>
>
> > On Thu, Sep 24, 2020 at 10:01 AM wrote:
> > >
> > > From: zhuguangqing
> > >
> > > Currently, if CONFIG_SUSPEND=n and CONFIG_CPU_IDLE=y, the function
> > > cpuidle_enter_s2idle() is declared but not defined, it may cause error
> > >
Tom,
On Sun, Sep 27 2020 at 19:59, Tom Hromatka wrote:
> My sincere apologies. 2020 has been a challenging year for
> my family and me, and I readily admit that I have struggled
> with all of the added stress. I realize and acknowledge that
> this is not an acceptable excuse for a patchset
I just tried 5.9-rc7, and got a blank screen wit just an unresponsive
mouse pointer and non-working keyboard when starting lightdm.
I could ssh to the machine, and saved the dmesg output. Attached.
5.9-rc6 works as it should.
I will try bisecting if no-one has a simple explanation.
--
Hilsen
On Wed, Sep 09, 2020 at 04:10:41PM +0800, JC Kuo wrote:
> This commit implements the complete programming sequence for ELPG
> entry and exit.
>
> 1. At ELPG entry, invokes tegra_xusb_padctl_enable_phy_sleepwalk()
> and tegra_xusb_padctl_enable_phy_wake() to configure XUSB PADCTL
>
On Mon, Sep 28, 2020 at 08:31:04PM +0800, Kai-Heng Feng wrote:
> Commit 7f3d176f5f7e "tpm: Require that all digests are present in
> TCG_PCR_EVENT2 structures" causes a null pointer dereference on all
> laptops I have:
...
> [ 17.868849] BUG: kernel NULL pointer dereference, address:
On 9/27/20 5:53 PM, Jarkko Sakkinen wrote:
> On Fri, Sep 25, 2020 at 12:53:35PM -0700, Dave Hansen wrote:
>> On 9/25/20 12:43 PM, Sean Christopherson wrote:
That means that the intent argument (SGX_PROT_*) is currently unused.
>>> No, the intent argument is used (eventually) by SGX's
A seemingly bad rebase introduced a spurious v4l2_m2m_buf_done,
which releases a buffer twice and therefore triggers a
noisy warning on each job:
WARNING: CPU: 0 PID: 0 at drivers/media/common/videobuf2/videobuf2-core.c:986
vb2_buffer_done+0x208/0x2a0
Fix it by removing the spurious
The following commit has been merged into the x86/irq branch of tip:
Commit-ID: 981aa1d366bf46bdc1c9259a5ab818a8d522724e
Gitweb:
https://git.kernel.org/tip/981aa1d366bf46bdc1c9259a5ab818a8d522724e
Author:Thomas Gleixner
AuthorDate:Mon, 28 Sep 2020 12:13:07 +02:00
On Sun, Sep 27, 2020 at 06:55:19PM -0400, Joel Fernandes wrote:
> On Sun, Sep 27, 2020 at 03:00:29PM +0200, Julia Lawall wrote:
> > From: kernel test robot
> >
> > NULL check before kfree is not needed.
> >
> > Generated by: scripts/coccinelle/free/ifnullfree.cocci
> >
> > Fixes: e9bed2a1239b
On 28/09/2020 15:53, Laurent Pinchart wrote:
> Hi Hans,
>
> On Mon, Sep 28, 2020 at 03:45:03PM +0200, Hans Verkuil wrote:
>> On 25/09/2020 20:30, Corentin Labbe wrote:
>>> Hello
>>>
>>> The zoran driver was removed in 5.3
>>> The main reason of the removing was lack of motivation to convert it to
Hi,
"copy_mount_options" function came to my eyes.
It splits copy into 2 pieces - over page boundaries.
I wonder what is the real reason for doing this?
Original comment was that we need exact bytes and some user memcpy
functions do not return correct number on page fault.
But how would all
On Mon, Sep 28, 2020 at 03:13:53PM +0200, Bartosz Golaszewski wrote:
> On Mon, Sep 28, 2020 at 3:00 PM Andy Shevchenko
> wrote:
> >
> > On Mon, Sep 28, 2020 at 12:41:53PM +0200, Bartosz Golaszewski wrote:
> > > From: Bartosz Golaszewski
> > >
> > > While we do check the "chip-name" property in
[+ Lorenzo]
On Tue, Sep 22, 2020 at 06:33:24PM +0800, Baolin Wang wrote:
> If the BIOS disabled the NUMA configuration, but did not change the
> proximity domain description in the SRAT table, so the PCI root bus
> device may get a incorrect node id by acpi_get_node().
How "incorrect" are we
On 28/09/2020 14:21, Dave Martin wrote:
Hi Dave,
> On Tue, Sep 22, 2020 at 11:12:25AM +0100, Andre Przywara wrote:
>> The Scalable Vector Extension (SVE) is an ARMv8 architecture extension
>> that introduces very long vector operations (up to 2048 bits).
>
> (8192, in fact, though don't expect
On Mon, Sep 28, 2020 at 03:04:05PM +0200, Bartosz Golaszewski wrote:
> On Mon, Sep 28, 2020 at 2:55 PM Andy Shevchenko
> wrote:
> >
> > On Mon, Sep 28, 2020 at 12:41:47PM +0200, Bartosz Golaszewski wrote:
> > > From: Bartosz Golaszewski
> > >
> > > There's a common pattern of dynamically
On Wed, Sep 23, 2020 at 1:44 AM Ran Wang wrote:
>
> Hi Rob,
>
> On Wednesday, September 23, 2020 10:33 AM, Rob Herring wrote:
> >
> > On Wed, Sep 16, 2020 at 04:18:27PM +0800, Ran Wang wrote:
> > > From: Biwen Li
> > >
> > > The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata
> >
Hi Hans,
On Mon, Sep 28, 2020 at 03:45:03PM +0200, Hans Verkuil wrote:
> On 25/09/2020 20:30, Corentin Labbe wrote:
> > Hello
> >
> > The zoran driver was removed in 5.3
> > The main reason of the removing was lack of motivation to convert it to
> > VB2
> > Since I need it, I worked on bringing
On Tue, 15 Sep 2020, Xu Yilun wrote:
> This patch implements the basic functions of the BMC chip for some Intel
> FPGA PCIe Acceleration Cards (PAC). The BMC is implemented using the
> Intel MAX 10 CPLD.
>
> This BMC chip is connected to the FPGA by a SPI bus. To provide direct
> register access
On Wed, Sep 09, 2020 at 04:10:40PM +0800, JC Kuo wrote:
> This commit unlinks xhci-tegra platform device with ss/host power
> domain devices. Reasons for this change is - at elpg entry, PHY
s/elpg/ELPG/
> sleepwalk and wake configuration need to be done before powering
> down ss/host partitions,
- Original Message -
> On 26/09/2020 18:21, syzbot wrote:
> > syzbot has found a reproducer for the following issue on:
> >
> > HEAD commit:7c7ec322 Merge tag 'for-linus' of
> > git://git.kernel.org/pub..
> > git tree: upstream
> > console output:
On Wed, Sep 09, 2020 at 04:10:38PM +0800, JC Kuo wrote:
> This commit implements Tegra186/Tegra194 XUSB PADCTL/AO wake and
> sleepwalk operations.
>
> Signed-off-by: JC Kuo
> ---
> v3:
>move 'ao_regs' to the top of 'struct tegra186_xusb_padctl'
>change return data of
At 2020-09-28T15:33:21+0200, Alejandro Colomar wrote:
> On 2020-09-28 14:52, G. Branden Robinson wrote:
> > At 2020-09-27T22:05:14+0200, Alejandro Colomar wrote:
> >> 2)
> >>
> >>> .EX
> >>> .BI "int fstat(int " fd ", struct stat *" statbuf );
> >>> .EE
> >>
> >> 3)
> >>
> >>> .EX
> >>> .BI "int
On Sat, 26 Sep 2020 at 22:10, Kees Cook wrote:
> > >> I wonder if this is an Android Common kernel?
> > It uses the below kernel for 4.14:
> > https://gitlab.com/quicla/kernel/msm-4.14/-/tree/LE.UM.3.4.2.r1.5 (or
> > similar branch).
>
> Okay, so yes. And this appears to have the hashing of %p
Hi Corentin,
On 25/09/2020 20:30, Corentin Labbe wrote:
> Hello
>
> The zoran driver was removed in 5.3
> The main reason of the removing was lack of motivation to convert it to
> VB2
> Since I need it, I worked on bringing it back.
>
> So the plan to achieve it was:
> - clean up the coding
Hi Elvira,
On Thu, Sep 17, 2020 at 06:38:03PM +0300, Elvira Khabirova wrote:
> GP TEE Client API in addition to login methods already supported
> in the kernel also defines several application-based methods:
> TEEC_LOGIN_APPLICATION, TEEC_LOGIN_USER_APPLICATION, and
>
On Wed, Sep 09, 2020 at 04:10:37PM +0800, JC Kuo wrote:
> To support XUSB host controller ELPG, this commit moves VBUS control
> .phy_power_on()/.phy_power_off() to .phy_init()/.phy_exit().
> When XUSB host controller enters ELPG, host driver invokes
> .phy_power_off(), VBUS should remain ON so
On Mon, 28 Sep 2020, Tejas Upadhyay
wrote:
> JSL has update in vswing table for eDP
I've thought the TLA for Jasper Lake is JSP, not JSL. At least we have
PCH_JSP for Jasper Lake PCH.
>
> BSpec: 21257
> Signed-off-by: Tejas Upadhyay
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 67
On Wed, Sep 09, 2020 at 04:10:36PM +0800, JC Kuo wrote:
[...]
> diff --git a/drivers/phy/tegra/xusb-tegra210.c
> b/drivers/phy/tegra/xusb-tegra210.c
[...]
> @@ -2096,6 +2938,96 @@ static const struct phy_ops tegra210_sata_phy_ops = {
> .owner = THIS_MODULE,
> };
>
> +static inline bool
On Mon, Sep 28, 2020 at 12:43:11PM +0200, Hagen Paul Pfeifer wrote:
> * Jiri Olsa | 2020-09-28 12:08:08 [+0200]:
>
> >patch below fixes it for me, but seems strange this was
> >working till now.. maybe you're the only one using this
> >with python3 ;-)
>
> and I thought python2 is obsolete and
On 26/09/2020 18:21, syzbot wrote:
syzbot has found a reproducer for the following issue on:
HEAD commit:7c7ec322 Merge tag 'for-linus' of git://git.kernel.org/pub..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=11f2ff2790
kernel config:
On Mon, 28 Sep 2020 at 15:12, Wenbin Mei wrote:
>
> Convert the mtk-sd binding to DT schema format using json-schema.
>
> Signed-off-by: Wenbin Mei
> Reviewed-by: Ulf Hansson
Please, don't add reviewed-by tags during an ongoing review, unless
the reviewer explicitly states that the change
On Mon, 28 Sep 2020, Tejas Upadhyay
wrote:
> Split the basic platform definition, macros, and PCI IDs to
> differentiate between EHL and JSL platforms.
>
> Signed-off-by: Tejas Upadhyay
> ---
> drivers/gpu/drm/i915/i915_drv.h | 4 +++-
> drivers/gpu/drm/i915/i915_pci.c | 9
From: Kan Liang
The "MiB" result of the IMC free-running bandwidth events,
uncore_imc_free_running/read/ and uncore_imc_free_running/write/ are 16
times too small.
The "MiB" value equals the raw IMC free-running bandwidth counter value
times a "scale" which is inaccurate.
The IMC free-running
On 2020-09-28 14:52, G. Branden Robinson wrote:
> At 2020-09-27T22:05:14+0200, Alejandro Colomar wrote:
>> Hi Branden,
>>
>> * G. Branden Robinson via linux-man:
>>
>> 1)
>>
>>> .EX
>>> .B int fstat(int \c
>>> .IB fd , \~\c
>>> .B struct stat *\c
>>> .IB statbuf );
>>> .EE
>>
>> 2)
>>
>>> .EX
Le lun. 28 sept. 2020 à 14:10, Christoph Hellwig a écrit
:
On Mon, Sep 28, 2020 at 01:46:55PM +0200, Paul Cercueil wrote:
dma_mmap_attrs can only be used on allocations from dma_mmap_attrs
with
the same attrs. As there is no allocation using
DMA_ATTR_NON_CONSISTENT
in the drm core,
On Tue, Sep 22, 2020 at 11:12:25AM +0100, Andre Przywara wrote:
> The Scalable Vector Extension (SVE) is an ARMv8 architecture extension
> that introduces very long vector operations (up to 2048 bits).
(8192, in fact, though don't expect to see that on real hardware any
time soon... qemu and the
On Wed, Sep 09, 2020 at 04:10:35PM +0800, JC Kuo wrote:
> PMC driver provides USB sleepwalk registers access to XUSB PADCTL
> driver. This commit adds a "nvidia,pmc" property which points to
> PMC node to XUSB PADCTL device node.
>
> Signed-off-by: JC Kuo
> ---
> v3:
>no change
>
>
On Wed, Sep 09, 2020 at 04:10:34PM +0800, JC Kuo wrote:
> This commit implements a register map which grants USB (UTMI and HSIC)
> sleepwalk registers access to USB PHY drivers. The USB sleepwalk logic
> is in PMC hardware block but USB PHY drivers have the best knowledge
> of proper programming
From: Sergiu Cuciurean
As part of the general cleanup of indio_dev->mlock, this change replaces
it with a local lock on the device's state structure.
This is part of a bigger cleanup.
Link:
https://lore.kernel.org/linux-iio/CA+U=dsoo6yabe5odlp+efnpgfdjk5zeqecegkqjxxcvehlw...@mail.gmail.com/
From: Sergiu Cuciurean
As part of the general cleanup of indio_dev->mlock, this change replaces
it with a local lock on the device's state structure.
This is part of a bigger cleanup.
Link:
https://lore.kernel.org/linux-iio/CA+U=dsoo6yabe5odlp+efnpgfdjk5zeqecegkqjxxcvehlw...@mail.gmail.com/
From: Sergiu Cuciurean
As part of the general cleanup of indio_dev->mlock, this change replaces
it with a local lock on the device's state structure.
This is part of a bigger cleanup.
Link:
https://lore.kernel.org/linux-iio/CA+U=dsoo6yabe5odlp+efnpgfdjk5zeqecegkqjxxcvehlw...@mail.gmail.com/
From: Sergiu Cuciurean
As part of the general cleanup of indio_dev->mlock, this change replaces
it with a local lock on the device's state structure.
This is part of a bigger cleanup.
Link:
https://lore.kernel.org/linux-iio/CA+U=dsoo6yabe5odlp+efnpgfdjk5zeqecegkqjxxcvehlw...@mail.gmail.com/
From: Sergiu Cuciurean
As part of the general cleanup of indio_dev->mlock, this change replaces
it with a local lock on the device's state structure.
This is part of a bigger cleanup.
Link:
https://lore.kernel.org/linux-iio/CA+U=dsoo6yabe5odlp+efnpgfdjk5zeqecegkqjxxcvehlw...@mail.gmail.com/
On Mon, Sep 28, 2020 at 3:00 PM Andy Shevchenko
wrote:
>
> On Mon, Sep 28, 2020 at 12:41:53PM +0200, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski
> >
> > While we do check the "chip-name" property in probe(), we never actually
> > use it. Let's pass the chip label to the driver using
Change in v2:
Convert mtk-sd to json-schema
Wenbin Mei (4):
dt-bindings: mmc: Convert mtk-sd to json-schema
mmc: dt-bindings: add support for MT8192 SoC
arm64: dts: mt8192: add mmc device node
mmc: mediatek: Add subsys clock control for MT8192 msdc
---
This patch depends on
[v4,1/3]
Convert the mtk-sd binding to DT schema format using json-schema.
Signed-off-by: Wenbin Mei
Reviewed-by: Ulf Hansson
---
.../devicetree/bindings/mmc/mtk-sd.txt| 75
.../devicetree/bindings/mmc/mtk-sd.yaml | 165 ++
2 files changed, 165 insertions(+), 75
MT8192 mmc host ip is compatible with MT8183.
Add support for this.
Signed-off-by: Wenbin Mei
Reviewed-by: Ulf Hansson
---
Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git
MT8192 msdc is an independent sub system, we need control more bus
clocks for it.
Add support for the additional subsys clocks to allow it to be
configured appropriately.
Signed-off-by: Wenbin Mei
---
drivers/mmc/host/mtk-sd.c | 77 ++-
1 file changed, 59
This commit adds mmc device node for mt8192
Signed-off-by: Wenbin Mei
---
arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 89 +
arch/arm64/boot/dts/mediatek/mt8192.dtsi| 34
2 files changed, 123 insertions(+)
diff --git
On Wed, Sep 09, 2020 at 04:10:33PM +0800, JC Kuo wrote:
> This commit adds sleepwalk/wake and suspend/resume interfaces
> to Tegra XUSB PHY driver.
>
> Tegra XUSB host controller driver makes use of sleepwalk functions
> to enable/disable sleepwalk circuit which is in always-on partition
> and
On Wed, Sep 09, 2020 at 04:10:32PM +0800, JC Kuo wrote:
> As per Tegra210 TRM, before changing lane assignments, driver should
> keep lanes in IDDQ and sleep state; after changing lane assignments,
> driver should bring lanes out of IDDQ.
> This commit implements the required operations.
>
>
On Wed, Sep 09, 2020 at 04:10:31PM +0800, JC Kuo wrote:
> This commit is a preparation for enabling XUSB SC7 support.
> It rearranges Tegra210 XUSB PADCTL UPHY initialization sequence,
> for the following reasons:
>
> 1. PLLE hardware power sequencer has to be enabled only after both
>PEX
On Wed, Sep 09, 2020 at 04:10:30PM +0800, JC Kuo wrote:
> Once UPHY PLL hardware power sequencer is enabled, do not assert
> reset to PEX/SATA PLLs, otherwise UPHY PLL operation will be broken.
> This commit removes reset_control_assert(pcie->rst) and
> reset_control_assert(sata->rst) from
From: Andrej Shadura
Add a mapping for my old work email for BelDisplayTech to the personal
email, and make sure the Collabora email has the correct spelling
of the first name.
Signed-off-by: Andrej Shadura
---
.mailmap | 2 ++
1 file changed, 2 insertions(+)
diff --git a/.mailmap b/.mailmap
Patch defines macros, registers and structures used by
Device side driver.
Because the size of main patch is very big, I’ve decided to create
separate patch for gadget.h. It should simplify reviewing the code.
Signed-off-by: Pawel Laszczak
---
drivers/usb/cdnsp/gadget.h | 1459
On Mon, Sep 28, 2020 at 2:55 PM Andy Shevchenko
wrote:
>
> On Mon, Sep 28, 2020 at 12:41:47PM +0200, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski
> >
> > There's a common pattern of dynamically allocating an array of char
> > pointers and then also dynamically allocating each string
On Wed, Sep 09, 2020 at 04:10:29PM +0800, JC Kuo wrote:
> The programming sequence in tegra210_usb3_port_enable() is required
> for both cold boot and SC7 exit, and must be performed only after
> PEX/SATA UPHY is initialized. Therefore, this commit moves the
> programming sequence to
On Sun, Sep 27, 2020 at 11:21:59PM -0700, John Hubbard wrote:
> @@ -76,8 +79,6 @@ TEST_FILES := test_vmalloc.sh
> KSFT_KHDR_INSTALL := 1
> include ../lib.mk
>
> -$(OUTPUT)/hmm-tests: LDLIBS += -lhugetlbfs
> -
> ifeq ($(ARCH),x86_64)
> BINARIES_32 := $(patsubst %,$(OUTPUT)/%,$(BINARIES_32))
On Mon, Sep 28, 2020 at 12:41:54PM +0200, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> GPIO line names are currently created by the driver from the chip label.
> We'll want to support custom formats for line names (for instance: to
> name all lines the same) for user-space tests so
Hi Anthony,
On Tue, Sep 22, 2020 at 02:21:53AM -0700, Anthony Steinhauser wrote:
> Support of Spectre v4 PR_SPEC_DISABLE_NOEXEC mitigation mode for on arm64.
>
> PR_SPEC_DISABLE_NOEXEC turns the mitigation on, but it is automatically
> turned off whenever a new program is being execve'ed.
>
>
On Tue, Sep 22, 2020 at 05:05:10PM -0400, Lyude Paul wrote:
> While I thought I had this correct (since it actually did reject modes
> like I expected during testing), Ville Syrjala from Intel pointed out
> that the logic here isn't correct. max_clock refers to the max symbol
> rate supported by
On Mon, Sep 28, 2020 at 12:41:53PM +0200, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> While we do check the "chip-name" property in probe(), we never actually
> use it. Let's pass the chip label to the driver using device properties
> as we'll want to allow users to define their
On Mon, Sep 28, 2020 at 12:26:58PM +, Aisheng Dong wrote:
> Hi Peter,
>
> We met a cpudile warning on mx6q sabresd board since v5.9-rc3 and also exist
> in latest linux-next (next-20200925).
> After some bisection, I found it’s caused by below patch.
> Any suggestions about this issue?
The
Hi Zhen,
On Mon, Sep 28, 2020 at 2:15 PM Ard Biesheuvel wrote:
> On Mon, 28 Sep 2020 at 13:57, Leizhen (ThunderTown)
> wrote:
> > On 2020/9/28 18:14, Ard Biesheuvel wrote:
> > > On Mon, 28 Sep 2020 at 11:27, Zhen Lei wrote:
> > >>
> > >> mov r4, pc
> > >> and r4, r4, #0xf800
On Sun, Sep 27, 2020 at 11:21:53PM -0700, John Hubbard wrote:
> diff --git a/tools/testing/selftests/vm/Makefile
> b/tools/testing/selftests/vm/Makefile
> index d1ae706d9927..9cc6bc087461 100644
> +++ b/tools/testing/selftests/vm/Makefile
> @@ -130,3 +130,5 @@ endif
> $(OUTPUT)/userfaultfd:
On Fri, 25 Sep 2020 23:26:49 +0200, Krzysztof Kozlowski wrote:
> The i.MX 53 and i.MX6Q DTS use two compatibles, i.MX 6SL/6SLL/SX three
> so update the binding to fix dtbs_check warnings like:
>
> serial@21ec000: compatible: ['fsl,imx6q-uart', 'fsl,imx21-uart'] is not
> valid under any of the
The fr_hard_header function is used to prepend the header to skbs before
transmission. It is used in 3 situations:
1) When a control packet is generated internally in this driver;
2) When a user sends an skb on an Ethernet-emulating PVC device;
3) When a user sends an skb on a normal PVC device.
Try to make minimal changes to the document which already describes
access class 0 in a generic fashion (including IO initiatiors that
are not CPUs).
Signed-off-by: Jonathan Cameron
---
v11: No change.
Documentation/admin-guide/mm/numaperf.rst | 8
1 file changed, 8 insertions(+)
New access1 class is nearly the same as access0, but always provides
characteristics for CPUs to memory. The existing access0 class
provides characteristics to nearest or direct connnect initiator
which may be a Generic Initiator such as a GPU or network adapter.
This new class allows thread
In ACPI 6.3, the Memory Proximity Domain Attributes Structure
changed substantially. One of those changes was that the flag
for "Memory Proximity Domain field is valid" was deprecated.
This was because the field "Proximity Domain for the Memory"
became a required field and hence having a
On Mon, Sep 28, 2020 at 12:41:47PM +0200, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> There's a common pattern of dynamically allocating an array of char
> pointers and then also dynamically allocating each string in this
> array. Provide a helper for freeing such a string array
Until we tell ACPI that we support generic initiators, it will have
to operate in fall back domain mode and all _PXM entries should
be on existing non GI domains.
This patch sets the relevant OSC bit to make that happen.
Signed-off-by: Jonathan Cameron
---
v11: No change
drivers/acpi/bus.c
The main intent is to get rid of the cast for the void-pointer returned by
of_device_get_match_data().
This requires const-ifying the 'caps' and 'registers' references on the
at91_adc_state struct.
The caps can be obtained also from the old platform_data (in the
at91_adc_probe_pdata() function),
On Wed, Sep 09, 2020 at 04:10:26PM +0800, JC Kuo wrote:
> Tegra XHCI controler can be placed in ELPG (Engine Level PowerGated)
> state for power saving when all of the connected USB devices are in
> suspended state. This patch series includes clk, phy and pmc changes
> that are required for
In common with memoryless domains we only register GI domains
if the proximity node is not online. If a domain is already
a memory containing domain, or a memoryless domain there is
nothing to do just because it also contains a Generic Initiator.
Signed-off-by: Jonathan Cameron
---
v11: Improved
This tries to solve a warning reported by the lkp bot:
>> drivers/iio/adc/at91_adc.c:1439:34: warning: unused variable
>> 'at91_adc_dt_ids' [-Wunused-const-variable]
static const struct of_device_id at91_adc_dt_ids[] = {
^
1 warning generated.
This shows
It would be very nice to finally merge this support during the next cycle,
so please take a look.
I think we need acks covering x86, ARM and ACPI. Rafael took a look back
in November at v5 and was looking for x86 and ARM acks. Whilst there is
no ARM specific code left we probably still need an
Generic Initiators are a new ACPI concept that allows for the
description of proximity domains that contain a device which
performs memory access (such as a network card) but neither
host CPU nor Memory.
This patch has the parsing code and provides the infrastructure
for an architecture to
On Mon, Sep 28, 2020 at 10:36:00AM +0200, David Hildenbrand wrote:
> Hi Oscar!
Hi David :-)
>
> Old code:
>
> set_page_refcounted(): sets the refcount to 1.
> __free_pages()
> -> put_page_testzero(): sets it to 0
> -> free_the_page()->__free_pages_ok()
>
> New code:
>
>
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