On Thursday, October 1, 2020 9:18:24 AM CEST, Coly Li wrote:
In mmc_queue_setup_discard() the mmc driver queue's discard_granularity
might be set as 0 (when card->pref_erase > max_discard) while the mmc
device still declares to support discard operation. This is buggy and
triggered the following
On Thu, Oct 01, 2020 at 10:36:53AM -0700, Sean Christopherson wrote:
> On Tue, Sep 15, 2020 at 02:28:29PM +0300, Jarkko Sakkinen wrote:
> > +int __init sgx_drv_init(void)
> > +{
> > + unsigned int eax, ebx, ecx, edx;
> > + u64 attr_mask, xfrm_mask;
> > + int ret;
> > + int i;
> > +
> > +
Hi Linus,
The following changes since commit ba4f184e126b751d1bffad5897f263108befc780:
Linux 5.9-rc6 (2020-09-20 16:33:55 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
tags/iommu-fixes-v5.9-rc7
for you to fetch changes up to
On Thu, Oct 1, 2020 at 9:42 PM Avi Fishman wrote:
>
> Tali indeed pointed our major customers (Alex represent one of them :)
> that this feature must be handled carefully since it may break the
> communication and they are aware of that. Nevertheless they still want
> this feature, they already
On 10/1/2020 8:18 AM, Jim Quinlan wrote:
Fixes two cases where we were returning without calling
clk_disable_unprepare(). Although there is a common place to go on probe()
errors (the 'fail' label), one can only jump there after executing
brcm_pcie_setup(), so we have to add
Quoting Mark Brown (2020-10-01 10:43:26)
> On Wed, Sep 30, 2020 at 05:07:20PM -0700, Stephen Boyd wrote:
> > Quoting David Collins (2020-09-22 15:04:18)
>
> > > This helps to disambiguate SPMI device regmaps from I2C ones
> > > at /sys/kernel/debug/regmap since I2C devices use a very
> > >
On Thu, Oct 01, 2020 at 11:02:55PM +0530, Sameer Pujar wrote:
> The "prefix" can be defined in DAI link node or it can be specified as
> part of the component node itself. Currently "sound-name-prefix" defined
> in a component is not taking effect. Actually the property is not getting
> parsed. It
On Thu, Oct 01, 2020 at 08:18:49PM +0200, Jann Horn wrote:
> On Thu, Oct 1, 2020 at 6:58 PM Tycho Andersen wrote:
> > On Thu, Oct 01, 2020 at 05:47:54PM +0200, Jann Horn via Containers wrote:
> > > On Thu, Oct 1, 2020 at 2:54 PM Christian Brauner
> > > wrote:
> > > > On Wed, Sep 30, 2020 at
On Thu, Oct 01, 2020 at 11:27:39AM -0700, Roman Gushchin wrote:
> On Thu, Oct 01, 2020 at 09:46:38AM -0400, Johannes Weiner wrote:
> > On Wed, Sep 30, 2020 at 05:27:07PM -0700, Roman Gushchin wrote:
> > > +/*
> > > + * set_page_memcg - associate a page with a memory cgroup
> > > + * @page: a
Greetings,
I am the investment sourcing manager to an international business/project
financier based in Bahrain. We have huge funds available for immediate
investment on any Viable Start Up or Existing business/project that requires
funding.
Currently we are sourcing for opportunities for
On Thu, Oct 1, 2020 at 11:06 AM Andy Shevchenko
wrote:
>
> On Thu, Oct 1, 2020 at 8:44 PM Alexander Duyck
> wrote:
> > On Thu, Oct 1, 2020 at 9:26 AM Andy Shevchenko
> > wrote:
> > > On Thu, Oct 1, 2020 at 4:43 AM David E. Box
> > > wrote:
>
> ...
>
> > > > Intel Platform Monitoring
On Wed, Sep 30, 2020 at 09:02:38PM +, Limonciello, Mario wrote:
> > > + possible_values:A file that can be read to obtain the
> > > possible
> > > + values of the . Values are
> > > separated using
> > > +
On Thu, Oct 01, 2020 at 08:23:00PM +0200, Lukasz Stelmach wrote:
> It was <2020-10-01 czw 17:13>, when Mark Brown wrote:
> > On Thu, Oct 01, 2020 at 05:21:39PM +0200, Łukasz Stelmach wrote:
> >> This is a series of fixes created during porting a device driver (these
> >> patches will be released
...
>> There are dozens variants of the panels and system could easily have
>> more than one panel, hence a direct lookup by phandle is a natural
>> choice for the panels.
>
> Not really, there's typically only just one panel. But that's just one
> example. EMC would be another. There's only a
On Thu, Oct 01, 2020 at 05:21:41PM +0200, Łukasz Stelmach wrote:
> Fix issues with DMA transfers bigger than 512 bytes on Exynos3250. Without
> the patches such transfers fail.
>
> The vendor kernel for ARTIK5 handles CS in a simmilar way.
>
> Signed-off-by: Łukasz Stelmach
> Reviewed-by:
Adding test for build id cache that adds binary
with sha1 and md5 build ids and verifies it's
added properly.
The test updates build id cache with perf record
and perf buildid-cache -a.
Signed-off-by: Jiri Olsa
---
v2 changes:
- detect perf build directory when checking for build-ex* binaries
Currently, the memory containing DT is not reserved. Thus, that region
of memory can be reallocated or reused for other purposes. This may result
in corrupted DT for nommu virt board in Qemu. We may not face any issue
in kendryte as DT is embedded in the kernel image for that.
Fixes:
On Thu, Oct 01, 2020 at 11:26:36AM +0200, Hans de Goede wrote:
> Hi,
>
> On 9/30/20 11:02 PM, Limonciello, Mario wrote:
> > > > + possible_values:A file that can be read to
> > > > obtain the possible
> > > > + values of the . Values
>
On Thu, 2020-10-01 at 12:15 +0200, Miguel Ojeda wrote:
> Hi Joe,
Buenas Miguel.
> On Thu, Oct 1, 2020 at 12:56 AM Joe Perches wrote:
> > So I installed the powerpc cross compiler, and
> > nope, that doesn't work, it makes a mess.
>
> Thanks a lot for reviving the script and sending the
Similar to the gpio groups in main domain, there is one gpio group in
wakeup domain with 2 mdoules instances in it. The gpio group pins out
73 pins (5 banks). Add DT nodes for these 2 gpio module instances.
Signed-off-by: Faiz Abbas
---
.../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 32
There are 6 gpio instances inside SoC with 2 groups as show below:
Group one: wkup_gpio0, wkup_gpio1
Group two: main_gpio0, main_gpio2, main_gpio4, main_gpio6
Only one instance from each group can be used at a time. So use main_gpio0
and wkup_gpio0 in current linux context and
RISC-V limits the physical memory size by -PAGE_OFFSET. Any memory beyond
that size from DRAM start is unusable. Just remove any memblock pointing
to those memory region without worrying about computing the maximum size.
Signed-off-by: Atish Patra
Reviewed-by: Mike Rapoport
---
Changes from
There are 4 instances of gpio modules in main domain:
gpio0, gpio2, gpio4 and gpio6
Groups are created to provide protection between different processor virtual
worlds. Each of these modules I/O pins are muxed within the group. Exactly
one module can be selected to control the
Add output tap delay values as given in the latest Data Manual[1].
[1] https://www.ti.com/lit/gpn/tda4vm
Signed-off-by: Faiz Abbas
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git
Add support for UHS modes for the SD card connected at sdhci1. This
involves adding regulators for voltage switching and power cycling the
SD card and removing the no-1-8-v property.
Signed-off-by: Faiz Abbas
---
.../dts/ti/k3-j7200-common-proc-board.dts | 32 +++
The following patches add support for UHS modes for TI's j721e and j7200
boards.
Patches 1-3 add support for gpios to j7200-evm
Patches 4-6 add support for voltage regulators for required by the
SD card in both devices as well as enable UHS modes at 1.8V
Patches 5-6 add some required configs to
Add support for UHS modes for the SD card connected at sdhci1. This
involves adding regulators for voltage switching and power cycling the
SD card and removing the no-1-8-v property.
Signed-off-by: Faiz Abbas
---
.../dts/ti/k3-j721e-common-proc-board.dts | 35 ++-
On Thu, Oct 01, 2020 at 11:03:04PM +0530, Sameer Pujar wrote:
> Add Tegra audio machine driver which is based on generic audio graph card
> driver. It re-uses most of the common stuff from audio graph driver and
> uses the same DT binding. Required Tegra specific customizations are done
> in the
Hi Russ,
On Wed, Sep 30, 2020 at 06:07:00PM -0700, Russ Weight wrote:
>
> Hi Moritz,
>
> On 9/30/20 5:31 PM, Moritz Fischer wrote:
> > I think providing the devm_ managed APIs is nicer, and makes it easier
> > for the consumer of the API to do the right thing.
>
> I see that the fpga_mgr code
On Thu, Oct 01, 2020 at 08:18:59AM +0300, Alexandru Ardelean wrote:
> On Wed, Sep 30, 2020 at 8:16 PM Moritz Fischer wrote:
> >
> > On Wed, Sep 30, 2020 at 08:22:23AM +0300, Alexandru Ardelean wrote:
> > > On Tue, Sep 29, 2020 at 6:30 PM Moritz Fischer wrote:
> > > >
> > > > Hi Alexandru,
> > >
On Thu, Oct 1, 2020 at 10:39 AM David Hildenbrand wrote:
[..]
> >> include/linux/range.h seems to have this function - why is this here
> >> needed?
> >
> > It's there because I add it later in this series. I waited until
> > "mm/memremap_pages: convert to 'struct range'" to make it global as
>
On Thu, Oct 01, 2020 at 05:21:46PM +0200, Łukasz Stelmach wrote:
> Make sure the cur_speed value used in s3c64xx_enable_datapath()
> to configure DMA channel and in s3c64xx_wait_for_*() to calculate the
> transfer timeout is set to the actual value of (half) the clock speed.
>
> Suggested-by:
On 00:35-20201002, Faiz Abbas wrote:
> The following patches add support for UHS modes for TI's j721e and j7200
> boards.
>
> Patches 1-3 add support for gpios to j7200-evm
>
> Patches 4-6 add support for voltage regulators for required by the
> SD card in both devices as well as enable UHS
On Thu, Oct 01, 2020 at 01:51:33AM +0200, Jann Horn wrote:
> On Thu, Oct 1, 2020 at 1:26 AM Jason Gunthorpe wrote:
> > On Wed, Sep 30, 2020 at 10:14:57PM +0200, Jann Horn wrote:
> > > On Wed, Sep 30, 2020 at 2:50 PM Jann Horn wrote:
> > > > On Wed, Sep 30, 2020 at 2:30 PM Jason Gunthorpe wrote:
On Thu, Oct 1, 2020 at 11:47 AM Andy Shevchenko
wrote:
>
> On Thu, Oct 1, 2020 at 9:33 PM Alexander Duyck
> wrote:
> > On Thu, Oct 1, 2020 at 9:37 AM Andy Shevchenko
> > wrote:
> > > On Thu, Oct 1, 2020 at 4:43 AM David E. Box
> > > wrote:
>
> ...
>
> > Arguably not much. I'll drop the
Fix compatible the new CPSW switchdev DT node to avoid probing of legacy
CPSW driver which fails:
[2.781009] cpsw 4a10.switch: invalid resource
Fixes: 7bf8f37aea82 ("ARM: dts: am437x-l4: add dt node for new cpsw switchdev
driver")
Signed-off-by: Grygorii Strashko
---
Hi Tony,
This is
Adding Vlastimil, Roman and the kernel mailing list to the cc.
Vlastimil, Roman - this looks like a slab regression. And while others
have touched slab in this merge window, you guys did so more than
most.. Comments?
On Wed, Sep 30, 2020 at 11:55 PM Bastian Bittorf wrote:
>
> Since 5.9-rc1 i
diff --git a/Documentation/DocBook/libata.tmpl
b/Documentation/DocBook/libata.tmpl
index d7fcdc5a4379..9b55778ab024 100644
--- a/Documentation/DocBook/libata.tmpl
+++ b/Documentation/DocBook/libata.tmpl
@@ -324,7 +324,7 @@ Many legacy IDE drivers use ata_bmdma_status() as the
bmdma_status()
I'm announcing the release of the 4.9.238 kernel.
All users of the 4.9 kernel series must upgrade.
The updated 4.9.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-4.9.y
and can be browsed at the normal kernel.org git web browser:
On Thu, Oct 01, 2020 at 08:11:41AM -0700, Guenter Roeck wrote:
> On Thu, Oct 01, 2020 at 11:11:05AM +0200, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 4.9.238 release.
> > There are 119 patches in this series, all will be posted as a response
> > to this one.
On Tue, Sep 29, 2020 at 01:54:46PM -0700, Guenter Roeck wrote:
> On Tue, Sep 29, 2020 at 01:00:43PM +0200, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 5.8.13 release.
> > There are 99 patches in this series, all will be posted as a response
> > to this one.
On Wed, Sep 30, 2020 at 12:58:53PM +0530, Naresh Kamboju wrote:
> On Tue, 29 Sep 2020 at 17:23, Greg Kroah-Hartman
> wrote:
> >
> > This is the start of the stable review cycle for the 5.8.13 release.
> > There are 99 patches in this series, all will be posted as a response
> > to this one. If
On Wed, Sep 30, 2020 at 08:26:20AM -0600, Shuah Khan wrote:
> On 9/29/20 5:00 AM, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 5.8.13 release.
> > There are 99 patches in this series, all will be posted as a response
> > to this one. If anyone has any issues
>
> No, I meant going back to idea of new gfp flag, but adjust the implementation
> in
> the allocator (different from what you posted in previous version) so that it
> only looks at the flag after it tries to allocate from pcplist and finds out
> it's empty. So, no inventing of new page
Kalle Valo wrote:
> Recent change in MHI bus removed the option to auto start the channels
> during MHI driver probe. The channel will only be started when the MHI
> client driver like QRTR gets probed. So, remove the option from ath11k
> channel config struct.
>
> Fixes: 1399fb87ea3e ("ath11k:
Alex Dewar wrote:
> debugfs_create_dir() returns an ERR_PTR in case of error, but never a
> null pointer. There are a number of places where error-checking code can
> accordingly be simplified.
>
> Addresses-Coverity: CID 1497150: Memory - illegal accesses (USE_AFTER_FREE)
> Addresses-Coverity:
On Thu, Oct 01, 2020 at 02:39:25PM -0400, Alan Stern wrote:
> The problem with a plain write is that it isn't guaranteed to be atomic
> in any sense. In principle, the compiler could generate code for CPU1
> which would write 0 to V->A more than once.
>
> Although I strongly doubt that any
On Wed, Sep 30, 2020 at 12:35:57PM +0200, Michal Hocko wrote:
> On Wed 30-09-20 00:07:42, Uladzislau Rezki wrote:
> [...]
> >
> > bool is_pcp_cache_empty(gfp_t gfp)
> > {
> > struct per_cpu_pages *pcp;
> > struct zoneref *ref;
> > unsigned long flags;
> > bool empty;
> >
> >
This driver is the very definition of bitrotting:
- Introduced in commit
79a140932c776 ("[PATCH] mips: vR41xx updates")
which is 2.6.11-rc3.
- Provides ->register_callback which was removed in commit
7f316b033b36a ("[PATCH] pcmcia: remove socket register_callback")
which is v2.6.14-rc3
-
On Wed, Sep 30, 2020 at 01:19:40PM +0100, Lad, Prabhakar wrote:
> HI Sakari,
>
> Thank you for the review.
>
> On Wed, Sep 30, 2020 at 12:45 PM Sakari Ailus
> wrote:
> >
> > Hi Prabhakar,
> >
> > On Thu, Sep 17, 2020 at 06:42:22PM +0100, Lad Prabhakar wrote:
> > > Parse endpoint properties
On Thu, Oct 01, 2020 at 07:02:31PM +0200, Mickaël Salaün wrote:
> --- a/include/uapi/asm-generic/unistd.h
> +++ b/include/uapi/asm-generic/unistd.h
> @@ -859,9 +859,11 @@ __SYSCALL(__NR_openat2, sys_openat2)
> __SYSCALL(__NR_pidfd_getfd, sys_pidfd_getfd)
> #define __NR_faccessat2 439
>
> > +
> > + if (!capable(CAP_SYS_ADMIN))
> > + return -EPERM;
>
> Sorry for not addressing this during earlier reviews, but why is this
> check here. Is read-only access to the settings by normal users
> considered harmful ?
>
The best answer I can give is that this is exposing data
On 01/10/20 5:23 pm, Stephen Rothwell wrote:
> Hi all,
>
> In commit
>
> 44d59235ace5 ("Bluetooth: hci_h5: close serdev device and free hu in
> h5_close")
>
> Fixes tag
>
> Fixes: https://syzkaller.appspot.com/bug?extid=6ce141c55b2f7aafd1c4
>
> has these problem(s):
>
> - No SHA1
Hi,
I split this up into 3 pieces instead of the messy single patch, hope
this helps with review.
Patch 1 adds task_sigpending(), which tests TIF_SIGPENDING. Core use
cases that need to check for an actual signal pending are switched to
using task_sigpending() instead of signal_pending(). This
Users of TWA_SIGNAL need to break out of kernel waits loops, or force
re-entry into the kernel, to ensure that the queued task_work is run.
TWA_SIGNAL currently works like signal delivery in that sense, and uses
the same delivery mechanism. This currently works well from a functional
standpoint,
This is in preparation for maintaining signal_pending() as the decider
of whether or not a schedule() loop should be broken, or continue
sleeping. This is different than the core signal use cases, where we
really want to know if an actual signal is pending or not.
task_sigpending() returns
If the arch supports TIF_TASKWORK, then use that for TWA_SIGNAL as
it's more efficient than using the signal delivery method. This is
especially true on threaded applications, where ->sighand is shared
across threads.
Signed-off-by: Jens Axboe
---
kernel/task_work.c | 48
Hello! I have some performance numbers. Please see below.
On 29.09.2020 21:35, Alexander Popov wrote:
> Hello everyone! Requesting for your comments.
>
> This is the second version of the heap quarantine prototype for the Linux
> kernel. I performed a deeper evaluation of its security properties
From: Coly Li
Date: Thu, 1 Oct 2020 15:54:01 +0800
> This series was original by a bug fix in nvme-over-tcp driver which only
> checked whether a page was allocated from slab allcoator, but forgot to
> check its page_count: The page handled by sendpage should be neither a
> Slab page nor 0
When h5_close() gets called, the memory allocated for the hu gets
freed only if hu->serdev doesn't exist. This leads to a memory leak.
So when h5_close() is requested, close the serdev device instance and
free the memory allocated to the hu entirely instead.
Fixes: ce945552fde4 ("Bluetooth:
On 01/10/20 08:38AM, tudor.amba...@microchip.com wrote:
> On 9/30/20 9:57 PM, Pratyush Yadav wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> >
> > Since this flash doesn't have a Profile 1.0 table, the Octal DTR
> > capabilities are
On Thu, Oct 01, 2020 at 09:02:57PM +0200, Krzysztof Kozlowski wrote:
> That is correct. We did not provide final comments on the list so they
> could be added here - in change log. This would also be an explanation
> why there is a resend. Another solution would be to extend the commit #7
>
On 01/10/2020 20:07, Michał Mirosław wrote:
> On Thu, Oct 01, 2020 at 11:03:04PM +0530, Sameer Pujar wrote:
>> Add Tegra audio machine driver which is based on generic audio graph card
>> driver. It re-uses most of the common stuff from audio graph driver and
>> uses the same DT binding.
Sorry, my previous statement was misleading.
enable_uart will select the mini_uart for gpio14,15 unless the
disable-bt device tree overlay is loaded. As well as disabling
bluetooth disable-bt swaps the uart0 pin configs to point the regular
UART to gpio 14,15. After resolving the DT overlays the
From: David Miller
Date: Thu, 01 Oct 2020 12:43:45 -0700 (PDT)
> Series applied and queued up for -stable, thank you.
Actually, this doesn't even build:
In file included from ./arch/x86/include/asm/bug.h:93,
from ./include/linux/bug.h:5,
from
On 30.09.2020 15:50, Alexander Potapenko wrote:
> On Tue, Sep 29, 2020 at 8:35 PM Alexander Popov wrote:
>>
>> Currently in CONFIG_SLAB init_on_free happens too late, and heap
>> objects go to the heap quarantine being dirty. Lets move memory
>> clearing before calling kasan_slab_free() to fix
Hi!
On Thu, Oct 01, 2020 at 12:15:39PM +0200, Miguel Ojeda wrote:
> > So it looks like the best option is to exclude these
> > 2 files from conversion.
>
> Agreed. Nevertheless, is there any reason arch/powerpc/* should not be
> compiling cleanly with compiler.h? (CC'ing the rest of the PowerPC
On 2020-09-30 17:30, Anshuman Khandual wrote:
On 10/01/2020 04:43 AM, Sudarshan Rajagopalan wrote:
When section mappings are enabled, we allocate vmemmap pages from
physically
continuous memory of size PMD_SIZE using vmemmap_alloc_block_buf().
Section
mappings are good to reduce TLB pressure.
+ update code where needed (include in code which
included only to get struct sysinfo or SI_LOAD_SHIFT).
The reason is to avoid indirect include when using
some network headers: or others [1] ->
-> .
This indirect include causes redefinition of struct sysinfo when
included both and some of
From: Geert Uytterhoeven
Date: Thu, 1 Oct 2020 12:10:03 +0200
> Some Renesas EtherAVB variants support internal clock delay
> configuration, which can add larger delays than the delays that are
> typically supported by the PHY (using an "rgmii-*id" PHY mode, and/or
> "[rt]xc-skew-ps"
On Thu, Oct 01, 2020 at 12:19:57PM -0700, Linus Torvalds wrote:
> Adding Vlastimil, Roman and the kernel mailing list to the cc.
>
> Vlastimil, Roman - this looks like a slab regression. And while others
> have touched slab in this merge window, you guys did so more than
> most.. Comments?
Thank
On Thu, Oct 1, 2020 at 12:56 PM Roman Gushchin wrote:
>
> Bastian, can you, please, share your config?
Bastian actually did that in the original email, but that was only
sent to me and Andrew in private.
Here's that config replicated for your pleasure,
Linus
#
# Automatically
Alex Deucher writes:
> On Wed, Sep 30, 2020 at 4:46 PM Dirk Gouders wrote:
>>
>> Commit c1cf79ca5ced46 (drm/amdgpu: use IP discovery table for renoir)
>> introduced a NULL pointer dereference when booting with
>> amdgpu.discovery=0.
>>
>> For amdgpu.discovery=0 that commit effectively removed
Commit c1cf79ca5ced46 (drm/amdgpu: use IP discovery table for renoir)
introduced a NULL pointer dereference when booting with
amdgpu.discovery=0, because it removed the call of vega10_reg_base_init()
for that case.
Fix this by calling that funcion if amdgpu_discovery == 0 in addition to
the case
On Thu, Oct 1, 2020 at 12:31 PM Nicolas Saenz Julienne
wrote:
>
> On Thu, 2020-10-01 at 18:23 +0100, Catalin Marinas wrote:
> > On Thu, Oct 01, 2020 at 06:15:01PM +0100, Catalin Marinas wrote:
> > > Hi Nicolas,
> > >
> > > Thanks for putting this together.
> > >
> > > On Thu, Oct 01, 2020 at
On Thu, Oct 01, 2020 at 11:02:20AM +0200, Michal Hocko wrote:
> On Wed 30-09-20 16:21:54, Paul E. McKenney wrote:
> > On Wed, Sep 30, 2020 at 10:41:39AM +0200, Michal Hocko wrote:
> > > On Tue 29-09-20 18:53:27, Paul E. McKenney wrote:
> [...]
> > > > No argument on it being confusing, and I hope
From: Vladimir Oltean
Date: Thu, 1 Oct 2020 16:20:11 +0300
> Seville is a DSA switch that is embedded inside the T1040 SoC, and
> supported by the mscc_seville DSA driver inside drivers/net/dsa/ocelot.
>
> This series adds this switch to the SoC's dtsi files and to the T1040RDB
> board file.
On 10/1/20 4:39 AM, Stephen Rothwell wrote:
> Hi all,
>
> Changes since 20200930:
>
on x86_64:
ld: drivers/mfd/simple-mfd-i2c.o: in function `simple_mfd_i2c_probe':
simple-mfd-i2c.c:(.text+0x48): undefined reference to `__devm_regmap_init_i2c'
ld: drivers/mfd/simple-mfd-i2c.o: in function
Hi Thomas and list,
There is a strange phenomenon in kernel 5.9-rc: when using kernel 5.9-rc
with debian 10 and running htop, the memory footprint will be displayed
as 3.99T. When the actual memory footprint increases, the displayed
value will be reduced to 3.98T, 3.97T etc. These phenomena
On 9/30/2020 11:36 AM, Thomas Gleixner wrote:
On Tue, Sep 15 2020 at 16:28, Dave Jiang wrote:
+#define INT_HANDLE_IMS_TABLE 0x1
+int idxd_device_request_int_handle(struct idxd_device *idxd, int idx,
+ int *handle, enum idxd_interrupt_type
irq_type)
On Thu, Oct 1, 2020 at 9:15 PM Jason Gunthorpe wrote:
> On Thu, Oct 01, 2020 at 01:51:33AM +0200, Jann Horn wrote:
> > On Thu, Oct 1, 2020 at 1:26 AM Jason Gunthorpe wrote:
> > > On Wed, Sep 30, 2020 at 10:14:57PM +0200, Jann Horn wrote:
> > > > On Wed, Sep 30, 2020 at 2:50 PM Jann Horn wrote:
V1: The initial patch used the approach to abort at the first instance of
PMD_SIZE
allocation failure, unmaps all previously mapped sections using vmemmap_free
and maps the entire request with vmemmap_populate_basepages to allocate
virtually contiguous memory.
https://lkml.org/lkml/2020/9/10/66
Hello,
syzbot found the following issue on:
HEAD commit:fb0155a0 Merge tag 'nfs-for-5.9-3' of git://git.linux-nfs...
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=11a7329d90
kernel config: https://syzkaller.appspot.com/x/.config?x=adebb40048274f92
On Thu, 2020-10-01 at 14:39 -0500, Segher Boessenkool wrch/ote:
> Hi!
>
> On Thu, Oct 01, 2020 at 12:15:39PM +0200, Miguel Ojeda wrote:
> > > So it looks like the best option is to exclude these
> > > 2 files from conversion.
> >
> > Agreed. Nevertheless, is there any reason arch/powerpc/*
When section mappings are enabled, we allocate vmemmap pages from physically
continuous memory of size PMD_SIZE using vmemmap_alloc_block_buf(). Section
mappings are good to reduce TLB pressure. But when system is highly fragmented
and memory blocks are being hot-added at runtime, its possible
Some devices in DTR mode expect an extra command byte called the
extension. The extension can either be same as the opcode, bitwise
inverse of the opcode, or another additional byte forming a 16-byte
opcode. Get the extension type from the BFPT. For now, only flashes with
"repeat" and "inverse"
They are thin wrappers around
nor->controller_ops->{read_reg,write_reg,erase}(). In a future commit
DTR support will be added. These ops can not be supported by the
controller_ops hooks and these helpers will make it easier to reject
those calls.
Signed-off-by: Pratyush Yadav
Reviewed-by: Tudor
Hi,
This series adds support for Octal DTR flashes in the SPI NOR framework,
and then adds hooks for the Cypress Semper and Micron Xcella flashes to
allow running them in Octal DTR mode. This series assumes that the flash
is handed to the kernel in Legacy SPI mode.
Tested on Micron MT35X and
The xSPI Profile 1.0 table specifies how many dummy cycles and address
bytes are needed for the Read Status Register command in octal DTR mode.
Use that information to send the correct Read SR command.
Signed-off-by: Pratyush Yadav
Reviewed-by: Tudor Ambarus
---
drivers/mtd/spi-nor/core.c | 10
ENOTSUPP is not a SUSV4 error code. Using EOPNOTSUPP is preferred
in its stead.
Signed-off-by: Pratyush Yadav
Reviewed-by: Tudor Ambarus
---
drivers/mtd/spi-nor/core.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c
Some controllers, like the cadence qspi controller, have trouble reading
only 1 byte in DTR mode. So, do 2 byte reads for SR and FSR commands in
DTR mode, and then discard the second byte.
Signed-off-by: Pratyush Yadav
Reviewed-by: Tudor Ambarus
---
drivers/mtd/spi-nor/core.c | 15
Double Transfer Rate (DTR) is SPI protocol in which data is transferred
on each clock edge as opposed to on each clock cycle. Make
framework-level changes to allow supporting flashes in DTR mode.
Right now, mixed DTR modes are not supported. So, for example a mode
like 4S-4D-4D will not work. All
From: Tudor Ambarus
Parse just the 22nd dword and look for the 'DTR Octal Mode Enable
Volatile bit'.
SPI_NOR_IO_MODE_EN_VOLATILE should be set just for the flashes
that don't define the optional SFDP SCCR Map. For the others,
let the SFDP do its job and fill the SNOR_F_IO_MODE_EN_VOLATILE
flag.
The Cypress Semper flash is an xSPI compliant octal DTR flash. Add
support for using it in octal DTR mode.
The flash by default boots in a hybrid sector mode. But the sector map
table on the part I had was programmed incorrectly and the SMPT values
on the flash don't match the public datasheet.
On resume, the init procedure will be run that will re-enable it.
Signed-off-by: Pratyush Yadav
Reviewed-by: Tudor Ambarus
---
drivers/mtd/spi-nor/core.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index
Perform a Soft Reset on shutdown on flashes that support it so that the
flash can be reset to its initial state and any configurations made by
spi-nor (given that they're only done in volatile registers) will be
reset. This will hand back the flash in pristine state for any further
operations on
This table is indication that the flash is xSPI compliant and hence
supports octal DTR mode. Extract information like the fast read opcode,
dummy cycles, the number of dummy cycles needed for a Read Status
Register command, and the number of address bytes needed for a Read
Status Register command.
Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.
Signed-off-by: Pratyush Yadav
---
drivers/mtd/spi-nor/core.c | 38 ++
drivers/mtd/spi-nor/core.h | 2 ++
2 files changed, 40
A Soft Reset sequence will return the flash to Power-on-Reset (POR)
state. It consists of two commands: Soft Reset Enable and Soft Reset.
Find out if the sequence is supported from BFPT DWORD 16.
Signed-off-by: Pratyush Yadav
Reviewed-by: Tudor Ambarus
---
drivers/mtd/spi-nor/core.h | 1 +
From: Tudor Ambarus
We don't want to enter a stateful mode, where a X-X-X I/O mode
is entered by setting a non-volatile bit, because in case of a
reset or a crash, once in the non-volatile mode, we may not be able
to recover in bootloaders and we may break the SPI NOR boot.
Forbid by default
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