The driver calls pci_enable_wake(, false) in esas2r_resume(), and
there is no corresponding pci_enable_wake(, true) in esas2r_suspend().
Either it should do enable-wake the device in .suspend() or should not
invoke pci_enable_wake() at all.
Concluding that this driver doesn't support
The driver calls pci_enable_wake(, false) in hisi_sas_v3_resume(), and
there is no corresponding pci_enable_wake(, true) in
hisi_sas_v3_suspend(). Either it should do enable-wake the device in
.suspend() or should not invoke pci_enable_wake() at all.
Concluding that this driver doesn't
Drivers should do only device-specific jobs. But in general, drivers using
legacy PCI PM framework for .suspend()/.resume() have to manage many PCI
PM-related tasks themselves which can be done by PCI Core itself. This
brings extra load on the driver and it directly calls PCI helper functions
to
Drivers should do only device-specific jobs. But in general, drivers using
legacy PCI PM framework for .suspend()/.resume() have to manage many PCI
PM-related tasks themselves which can be done by PCI Core itself. This
brings extra load on the driver and it directly calls PCI helper functions
to
Drivers should do only device-specific jobs. But in general, drivers using
legacy PCI PM framework for .suspend()/.resume() have to manage many PCI
PM-related tasks themselves which can be done by PCI Core itself. This
brings extra load on the driver and it directly calls PCI helper functions
to
On Wed 30-09-20 21:27:12, Sebastiaan Meijer wrote:
> > yes it shows the bottleneck but it is quite artificial. Read data is
> > usually processed and/or written back and that changes the picture a
> > lot.
> Apologies for reviving an ancient thread (and apologies in advance for my lack
> of
The driver calls pci_enable_wake(, false) in pm8001_pci_resume(), and
there is no corresponding pci_enable_wake(, true) in
pm8001_pci_suspend(). Either it should do enable-wake the device in
.suspend() or should not invoke pci_enable_wake() at all.
Concluding that this driver doesn't
The driver calls pci_enable_wake(, false) in scsih_resume(), and
there is no corresponding pci_enable_wake(, true) in scsih_suspend().
Either it should do enable-wake the device in .suspend() or should not
invoke pci_enable_wake() at all.
Concluding that this driver doesn't support
Drivers should do only device-specific jobs. But in general, drivers using
legacy PCI PM framework for .suspend()/.resume() have to manage many PCI
PM-related tasks themselves which can be done by PCI Core itself. This
brings extra load on the driver and it directly calls PCI helper functions
to
The driver calls pci_enable_wake(, false) in twa_resume(), and
there is no corresponding pci_enable_wake(, true) in twa_suspend().
Either it should do enable-wake the device in .suspend() or should not
invoke pci_enable_wake() at all.
Concluding that this driver doesn't support
Drivers should do only device-specific jobs. But in general, drivers using
legacy PCI PM framework for .suspend()/.resume() have to manage many PCI
PM-related tasks themselves which can be done by PCI Core itself. This
brings extra load on the driver and it directly calls PCI helper functions
to
On Thu, Oct 1, 2020 at 1:26 AM Krzysztof Kozlowski wrote:
>
> On Thu, 1 Oct 2020 at 08:22, Stephen Rothwell wrote:
> >
> > Hi all,
> >
> > Today's linux-next merge of the devicetree tree got a conflict in:
> >
> > Documentation/devicetree/bindings/mfd/syscon.yaml
> >
> > between commit:
> >
>
Drivers should do only device-specific jobs. But in general, drivers using
legacy PCI PM framework for .suspend()/.resume() have to manage many PCI
PM-related tasks themselves which can be done by PCI Core itself. This
brings extra load on the driver and it directly calls PCI helper functions
to
The driver calls pci_enable_wake(, false) in twl_resume(), and
there is no corresponding pci_enable_wake(, true) in twl_suspend().
Either it should do enable-wake the device in .suspend() or should not
invoke pci_enable_wake() at all.
Concluding that this driver doesn't support
Drivers should do only device-specific jobs. But in general, drivers using
legacy PCI PM framework for .suspend()/.resume() have to manage many PCI
PM-related tasks themselves which can be done by PCI Core itself. This
brings extra load on the driver and it directly calls PCI helper functions
to
Drivers should do only device-specific jobs. But in general, drivers using
legacy PCI PM framework for .suspend()/.resume() have to manage many PCI
PM-related tasks themselves which can be done by PCI Core itself. This
brings extra load on the driver and it directly calls PCI helper functions
to
The driver calls pci_enable_wake(, false) in pmcraid_resume(), and
there is no corresponding pci_enable_wake(, true) in pmcraid_suspend().
Either it should do enable-wake the device in .suspend() or should not
invoke pci_enable_wake() at all.
Concluding that this driver doesn't support
Drivers should do only device-specific jobs. But in general, drivers using
legacy PCI PM framework for .suspend()/.resume() have to manage many PCI
PM-related tasks themselves which can be done by PCI Core itself. This
brings extra load on the driver and it directly calls PCI helper functions
to
The driver calls pci_enable_wake(, false) in mvumi_resume(), and
there is no corresponding pci_enable_wake(, true) in mvumi_suspend().
Either it should do enable-wake the device in .suspend() or should not
invoke pci_enable_wake() at all.
Concluding that this driver doesn't support
There is no "device" parameter in mvumi_shutdown(). Instead there is
"pdev" which is not described.
Signed-off-by: Vaibhav Gupta
---
drivers/scsi/mvumi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/scsi/mvumi.c b/drivers/scsi/mvumi.c
index
Drivers should do only device-specific jobs. But in general, drivers using
legacy PCI PM framework for .suspend()/.resume() have to manage many PCI
PM-related tasks themselves which can be done by PCI Core itself. This
brings extra load on the driver and it directly calls PCI helper functions
to
From: Frieder Schrempf
LDO5 has two separate control registers. LDO5CTRL_L is used if the
input signal SD_VSEL is low and LDO5CTRL_H if it is high.
The current driver implementation only uses LDO5CTRL_H. To make this
work on boards that have SD_VSEL connected to a GPIO, we add support
for
From: Frieder Schrempf
In order to use ultra high speed modes (UHS) on the SD card slot, we
add matching pinctrls and fix the voltage switching for LDO5 of the
PMIC, by providing the SD_VSEL pin as GPIO to the PMIC driver.
Signed-off-by: Frieder Schrempf
---
On Thu, Oct 01, 2020 at 05:54:43PM +0530, Vaibhav Gupta wrote:
Linux Kernel Mentee: Remove Legacy Power Management.
The purpose of this patch series is to upgrade power management in SCSI
drivers. This has been done by upgrading .suspend() and .resume() callbacks.
The upgrade makes sure that the
> > Can you run 1000Base-X over these links?
> With some reading "1000base-x" does seem the right thing to say here.
> It's even what is reflected in the CMODE field for those ports.
One more thing you might need is
managed = "in-band-status";
> > If you can, it is probably
> > worth chatting
On Wed, Sep 30, 2020 at 10:21:20PM +, Kalesh Singh wrote:
> Android needs to move large memory regions for garbage collection.
> Optimize mremap for >= 1GB-sized regions by moving at the PUD/PGD
> level if the source and destination addresses are PUD-aligned.
> For CONFIG_PGTABLE_LEVELS == 3,
[I'm on vacation so I'll just give this a quick glance for now.]
On Wed, Sep 30, 2020 at 01:07:38PM +0200, Michael Kerrisk (man-pages) wrote:
> Hi Tycho, Sargun (and all),
>
> I knew it would be a big ask, but below is kind of the manual page
> I was hoping you might write [1] for the seccomp
On 01.10.20 14:34, Schrempf Frieder wrote:
From: Frieder Schrempf
In order to use ultra high speed modes (UHS) on the SD card slot, we
add matching pinctrls and fix the voltage switching for LDO5 of the
PMIC, by providing the SD_VSEL pin as GPIO to the PMIC driver.
Signed-off-by: Frieder
get_tbl() is confusing as it returns the content of TBL register
on PPC32 but the concatenation of TBL and TBU on PPC64.
Use mftb() instead.
Do the same with get_tbu() for consistency allthough it's name
is less confusing.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/delay.h |
On PPC64, we have mftb().
On PPC32, we have mftbl() and an #define mftb() mftbl().
mftb() and mftbl() are equivalent, their purpose is to read the
content of SPRN_TRBL, as returned by 'mftb' simplified instruction.
binutils seems to define 'mftbl' instruction as an equivalent
of 'mftb'.
However
On PPC64, get_tbl() is defined as an alias of get_tb() which return
the result of mftb(). That exactly the same as what the PPC32 version
does. We don't need two versions.
Remove the PPC64 definition of get_tbl() and use the PPC32 version
for both.
Signed-off-by: Christophe Leroy
---
No need to have two versions that are identical.
CONFIG_PPC_CELL is only selected by PPC64 targets.
CONFIG_E500 is the only PPC64 target selecting CONFIG_FSL_BOOK3E.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/reg.h | 14 --
1 file changed, 4 insertions(+), 10
mftbu() is always defined now, so the #ifdef can be removed
and replaced by an IS_ENABLED(CONFIG_PPC64) inside the
PPC32 version of get_tb().
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/time.h | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git
get_tbu() is redundant with mftbu() and is not used anymore.
Remove it.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/time.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/powerpc/include/asm/time.h b/arch/powerpc/include/asm/time.h
index 3ef0f4b3299e..c4ea81c966b0
>>> Also, wrt KASLR stuff, that issue is still seen sometimes but I haven't
>>> had
>>> bandwidth to dive deep into the issue and fix it.
So what's the plan there? You first mentioned this issue early this year
and judged by your response it is not clear whether you will
The following commit has been merged into the x86/misc branch of tip:
Commit-ID: f94c91f7ba3ba7de2bc8aa31be28e1abb22f849e
Gitweb:
https://git.kernel.org/tip/f94c91f7ba3ba7de2bc8aa31be28e1abb22f849e
Author:Libing Zhou
AuthorDate:Thu, 20 Aug 2020 10:56:41 +08:00
Committer:
Thu, Oct 01, 2020 at 12:30:18PM CEST, henrik.bjoernl...@microchip.com wrote:
>This is the definition of the CFM switchdev interface.
>
>The interface consist of these objects:
>SWITCHDEV_OBJ_ID_MEP_CFM,
>SWITCHDEV_OBJ_ID_MEP_CONFIG_CFM,
>SWITCHDEV_OBJ_ID_CC_CONFIG_CFM,
>
Calling pipe2() with O_NOTIFICATION_PIPE could results in memory leaks
in an error path or CONFIG_WATCH_QUEUE=n. Plug them.
unreferenced object 0xc0141114a0d8 (size 992):
comm "trinity-c61", pid 1353192, jiffies 4296255779 (age 25989.560s)
hex dump (first 32 bytes):
80 11 00 00 e8 03
Hi Jacob,
On Mon, Sep 28, 2020 at 11:40:53AM -0700, Jacob Pan wrote:
> Just wondering if you will be able to take this for v5.10? There hasn't
> been any material changes since we last discussed in LPC. We have VFIO and
> other vSVA patches depending on it.
Queued for v5.10 now, thanks.
On Thu, Oct 1, 2020 at 2:30 PM Vaibhav Gupta wrote:
>
> The driver calls pci_enable_wake(, false) in pm8001_pci_resume(), and
> there is no corresponding pci_enable_wake(, true) in
> pm8001_pci_suspend(). Either it should do enable-wake the device in
> .suspend() or should not invoke
On Thu, Oct 01, 2020 at 02:34:31PM +0200, Schrempf Frieder wrote:
> + pca9450->sd_vsel_gpio = gpiod_get_optional(pca9450->dev, "sd-vsel",
> GPIOD_OUT_HIGH);
We need a patch adding this to the binding document too.
signature.asc
Description: PGP signature
On Sun, Sep 27, 2020 at 02:24:28PM +0800, Lu Baolu wrote:
> drivers/iommu/intel/iommu.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Applied for v5.9, thanks.
On Wed, Sep 30, 2020 at 05:53:46PM +0200, Jann Horn via Containers wrote:
> On Wed, Sep 30, 2020 at 1:07 PM Michael Kerrisk (man-pages)
> wrote:
> > I knew it would be a big ask, but below is kind of the manual page
> > I was hoping you might write [1] for the seccomp user-space notification
> >
On Thu, Oct 01, 2020 at 02:06:58PM +0200, Schrempf Frieder wrote:
> From: Frieder Schrempf
>
> Kontron Electronics GmbH offers small and powerful SoMs based on the
> i.MX8M Mini SoC including PMIC, LPDDR4-RAM, eMMC and SPI NOR.
>
> The matching baseboards have the same form factor and similar
On 01/10/2020 12:25, Daniel Vetter wrote:
On Thu, Oct 1, 2020 at 12:58 PM Steven Price wrote:
On 21/09/2020 14:10, Qinglang Miao wrote:
Simplify the return expression.
Signed-off-by: Qinglang Miao
Reviewed-by: Steven Price
As committer/maintainer for this please indicate whether
On Thu, Oct 01, 2020 at 02:06:59PM +0200, Schrempf Frieder wrote:
> From: Frieder Schrempf
>
> Add entries for the SoMs and boards based on i.MX8MM from Kontron
> Electronics GmbH.
>
> Signed-off-by: Frieder Schrempf
> Reviewed-by: Rob Herring
> ---
> Changes for v3:
> * None
>
> Changes for
On Thu, Sep 24, 2020 at 05:50:37PM +0700, Suravee Suthikulpanit wrote:
>
>
> On 9/24/20 5:34 PM, Joerg Roedel wrote:
> > Hi Suravee,
> >
> > On Wed, Sep 23, 2020 at 10:14:29AM +, Suravee Suthikulpanit wrote:
> > > The framework allows callable implementation of IO page table.
> > > This
On 01.10.20 14:53, Mark Brown wrote:
On Thu, Oct 01, 2020 at 02:34:31PM +0200, Schrempf Frieder wrote:
+ pca9450->sd_vsel_gpio = gpiod_get_optional(pca9450->dev, "sd-vsel",
GPIOD_OUT_HIGH);
We need a patch adding this to the binding document too.
Right, totally forgot about that.
On Thu, Oct 01, 2020 at 02:06:58PM +0200, Schrempf Frieder wrote:
> From: Frieder Schrempf
>
> Kontron Electronics GmbH offers small and powerful SoMs based on the
> i.MX8M Mini SoC including PMIC, LPDDR4-RAM, eMMC and SPI NOR.
>
> The matching baseboards have the same form factor and similar
On Thu, Oct 01, 2020 at 11:53:59AM +, Wei Liu wrote:
On Thu, Oct 01, 2020 at 11:40:04AM +0200, Vitaly Kuznetsov wrote:
Sasha Levin writes:
> cpumask can change underneath us, which is generally safe except when we
> call into hv_cpu_number_to_vp_number(): if cpumask ends up empty we pass
Changes since RFC:
- "KVM: x86: disconnect kvm_check_cpuid() from vcpu->arch.cpuid_entries"
added to allow running kvm_check_cpuid() before vcpu->arch.cpuid_entries/
vcpu->arch.cpuid_nent are changed [Sean Christopherson]
- Shorten local variable names in kvm_vcpu_ioctl_set_cpuid[,2]
[Sean
On Wed, Sep 30, 2020 at 8:06 PM David Sterba wrote:
>
> On Wed, Sep 30, 2020 at 06:57:56PM +0200, David Sterba wrote:
> > On Sun, Sep 20, 2020 at 07:12:14AM -0700, syzbot wrote:
> > > Hello,
> > >
> > > syzbot found the following issue on:
> > >
> > > HEAD commit:eb5f95f1 Merge tag
As a preparatory step to allocating vcpu->arch.cpuid_entries dynamically
make kvm_check_cpuid() check work with an arbitrary 'struct kvm_cpuid_entry2'
array.
Currently, when kvm_check_cpuid() fails we reset vcpu->arch.cpuid_nent to
0 and this is kind of weird, i.e. one would expect CPUIDs to
The current limit for guest CPUID leaves (KVM_MAX_CPUID_ENTRIES, 80)
is reported to be insufficient but before we bump it let's switch to
allocating vcpu->arch.cpuid_entries[] array dynamically. Currently,
'struct kvm_cpuid_entry2' is 40 bytes so vcpu->arch.cpuid_entries is
3200 bytes which
As vcpu->arch.cpuid_entries is now allocated dynamically, the only
remaining use for KVM_MAX_CPUID_ENTRIES is to check KVM_SET_CPUID/
KVM_SET_CPUID2 input for sanity. Since it was reported that the
current limit (80) is insufficient for some CPUs, bump
KVM_MAX_CPUID_ENTRIES and use an arbitrary
On Thu, Oct 1, 2020 at 3:05 PM Dmitry Vyukov wrote:
>
> On Wed, Sep 30, 2020 at 8:06 PM David Sterba wrote:
> >
> > On Wed, Sep 30, 2020 at 06:57:56PM +0200, David Sterba wrote:
> > > On Sun, Sep 20, 2020 at 07:12:14AM -0700, syzbot wrote:
> > > > Hello,
> > > >
> > > > syzbot found the
Wei Liu writes:
> On Thu, Oct 01, 2020 at 11:40:04AM +0200, Vitaly Kuznetsov wrote:
>> Sasha Levin writes:
>>
>> > cpumask can change underneath us, which is generally safe except when we
>> > call into hv_cpu_number_to_vp_number(): if cpumask ends up empty we pass
>> > num_cpu_possible() into
On 01.10.20 14:34, Schrempf Frieder wrote:
From: Frieder Schrempf
In order to use ultra high speed modes (UHS) on the SD card slot, we
add matching pinctrls and fix the voltage switching for LDO5 of the
PMIC, by providing the SD_VSEL pin as GPIO to the PMIC driver.
Signed-off-by: Frieder
On 01.10.20 14:59, Krzysztof Kozlowski wrote:
On Thu, Oct 01, 2020 at 02:06:59PM +0200, Schrempf Frieder wrote:
From: Frieder Schrempf
Add entries for the SoMs and boards based on i.MX8MM from Kontron
Electronics GmbH.
Signed-off-by: Frieder Schrempf
Reviewed-by: Rob Herring
---
Changes
Hi Sami,
On Tue, 29 Sep 2020, Sami Tolvanen wrote:
> From: Peter Zijlstra
>
> Add the --mcount option for generating __mcount_loc sections
> needed for dynamic ftrace. Using this pass requires the kernel to
> be compiled with -mfentry and CC_USING_NOP_MCOUNT to be defined
> in Makefile.
>
>
On Thu, 2020-10-01 at 16:03 +0530, Dwaipayan Ray wrote:
> Checkpatch.pl doesn't have a check for excluding while (...) {...}
> blocks from MULTISTATEMENT_MACRO_USE_DO_WHILE error.
>
> For example, running checkpatch.pl on the file mm/access.c in the
> kernel generates the following error:
>
>
On Thu, Oct 01, 2020 at 08:50:55AM -0400, Qian Cai wrote:
> Calling pipe2() with O_NOTIFICATION_PIPE could results in memory leaks
> in an error path or CONFIG_WATCH_QUEUE=n. Plug them.
[snip the copy of bug report]
No objections on the patch itself, but commit message is just about
unreadable.
Add the description of the embedded L2 switch inside the SoC dtsi file
for NXP T1040.
Signed-off-by: Vladimir Oltean
Reviewed-by: Maxim Kochetkov
---
Changes in v3:
Added definition for frame extraction interrupt, even if the driver
doesn't use it at the moment.
Changes in v2:
Make switch node
Seville is a DSA switch that is embedded inside the T1040 SoC, and
supported by the mscc_seville DSA driver inside drivers/net/dsa/ocelot.
This series adds this switch to the SoC's dtsi files and to the T1040RDB
board file.
Vladimir Oltean (2):
powerpc: dts: t1040: add bindings for Seville
On 10/1/20 3:28 PM, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> This is considered bad for the following reasons:
> (1) We only support the block protection with BPn bits for write
> protection. Not all Atmel parts
On 10/1/20 11:13 AM, Thomas Gleixner wrote:
On Wed, Sep 30 2020 at 11:12, Alexei Starovoitov wrote:
For the last couple years we've been using mb2q tool to normalize patches
and it worked wonderfully.
Fun. I thought I'm the only user of it :)
We're using it pretty much daily since you've
Define the network interface names for the switch ports and hook them up
to the 2 QSGMII PHYs that are onboard.
A conscious decision was taken to go along with the numbers that are
written on the front panel of the board and not with the hardware
numbers of the switch chip ports. The 2 numbering
On Thu, Sep 24, 2020 at 11:21:10AM +0800, Jason Wang wrote:
> This patches introduces the multiple address spaces support for vDPA
> device. This idea is to identify a specific address space via an
> dedicated identifier - ASID.
>
> During vDPA device allocation, vDPA device driver needs to
On Thu, Oct 01, 2020 at 04:20:13PM +0300, Vladimir Oltean wrote:
> Define the network interface names for the switch ports and hook them up
> to the 2 QSGMII PHYs that are onboard.
>
> A conscious decision was taken to go along with the numbers that are
> written on the front panel of the board
On Thu, Oct 01, 2020 at 04:20:12PM +0300, Vladimir Oltean wrote:
> Add the description of the embedded L2 switch inside the SoC dtsi file
> for NXP T1040.
>
> Signed-off-by: Vladimir Oltean
> Reviewed-by: Maxim Kochetkov
Reviewed-by: Andrew Lunn
Andrew
On Thu, Sep 24, 2020 at 11:21:10AM +0800, Jason Wang wrote:
> This patches introduces the multiple address spaces support for vDPA
> device. This idea is to identify a specific address space via an
> dedicated identifier - ASID.
>
> During vDPA device allocation, vDPA device driver needs to
Julia Lawall wrote:
> Replace commas with semicolons. What is done is essentially described by
> the following Coccinelle semantic patch (http://coccinelle.lip6.fr/):
>
> //
> @@ expression e1,e2; @@
> e1
> -,
> +;
> e2
> ... when any
> //
>
> Signed-off-by: Julia Lawall
Patch applied to
The existing driver does not support System Memory so
adding support of system meory so that this can be used
on platforms which has ACPI_ADR_SPACE_SYSTEM_MEMORY type
system registers.
Function that creates sysfs entries in processor_driver in Linux,
is enabled to be compiled for arm64 platform
Hi Rafael,
On Wed, Sep 30, 2020 at 06:37:09PM +0200, Rafael J. Wysocki wrote:
> On Wed, Sep 30, 2020 at 6:05 PM Calvin Johnson
> wrote:
> >
> > Introduce ACPI mechanism to get PHYs registered on a MDIO bus and
> > provide them to be connected to MAC.
> >
> > Describe properties "phy-handle" and
On Thu, Oct 1, 2020 at 6:47 PM Joe Perches wrote:
>
> On Thu, 2020-10-01 at 16:03 +0530, Dwaipayan Ray wrote:
> > Checkpatch.pl doesn't have a check for excluding while (...) {...}
> > blocks from MULTISTATEMENT_MACRO_USE_DO_WHILE error.
> >
> > For example, running checkpatch.pl on the file
suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Samuel-Holland/ASoC-sun8i-codec-support-for-AIF2-and-AIF3/20201001-101451
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
for-next
config
Kai-Heng Feng wrote:
> There are reports that 8822CE fails to work rtw88 with "failed to read DBI
> register" error. Also I have a system with 8723DE which freezes the whole
> system when the rtw88 is probing the device.
>
> According to [1], platform firmware may not properly power manage the
The current reset framework API does not allow to release what is done by
reset_control_reset(), IOW decrement triggered_count. Add the new
reset_control_resettable() call to do so.
When reset_control_reset() has been called once, the counter
triggered_count, in the reset framework, is
On Thu, Sep 24, 2020 at 11:21:11AM +0800, Jason Wang wrote:
> This patch introduces a new bus operation to allow the vDPA bus driver
> to associate an ASID to a virtqueue group.
>
So in case of virtio_net, I would expect that all the data virtqueues
will be associated with the same address space
On Thu, Oct 01 2020 at 11:13, Thomas Gleixner wrote:
> Yes, it's ugly and I haven't figured out a proper way to deal with
> that. There are quite some mbox formats out there and they all are
> incompatible with each other and all of them have different horrors.
>
> Let me think about it.
I've
On 9/30/2020 6:45 PM, Stephane Eranian wrote:
On Wed, Sep 30, 2020 at 10:30 AM Peter Zijlstra wrote:
On Wed, Sep 30, 2020 at 07:48:48AM -0700, Dave Hansen wrote:
On 9/30/20 7:42 AM, Liang, Kan wrote:
When I tested on my kernel, it panicked because I suspect
current->active_mm could be
When CONFIG_PCIEASPM=n,
drivers/pci/pci.c:3098:12: warning: 'pci_ltr_encode' defined but not used
[-Wunused-function]
static u16 pci_ltr_encode(u64 val)
^~
drivers/pci/pci.c:3076:12: warning: 'pci_ltr_decode' defined but not used
[-Wunused-function]
static u64
On 01.10.20 14:57, Krzysztof Kozlowski wrote:
On Thu, Oct 01, 2020 at 02:06:58PM +0200, Schrempf Frieder wrote:
From: Frieder Schrempf
Kontron Electronics GmbH offers small and powerful SoMs based on the
i.MX8M Mini SoC including PMIC, LPDDR4-RAM, eMMC and SPI NOR.
The matching baseboards
Hi Rob,
On 30/09/20 8:31 pm, Rob Herring wrote:
> On Wed, Sep 30, 2020 at 8:22 AM Kishon Vijay Abraham I wrote:
>>
>> Hi,
>>
>> On 29/09/20 10:41 pm, Rob Herring wrote:
>>> On Tue, Sep 29, 2020 at 10:24 AM Gustavo Pimentel
>>> wrote:
On Tue, Sep 29, 2020 at 5:5:41, Z.q. Hou wrote:
On Thu, Oct 01, 2020 at 03:17:07PM +0200, Miroslav Benes wrote:
> I also wonder about making 'mcount' command separate from 'check'. Similar
> to what is 'orc' now. But that could be done later.
I'm not convinced more commands make sense. That only begets us the
problem of having to run
On Thu, 2020-10-01 at 14:16 +0100, Al Viro wrote:
> On Thu, Oct 01, 2020 at 08:50:55AM -0400, Qian Cai wrote:
> > Calling pipe2() with O_NOTIFICATION_PIPE could results in memory leaks
> > in an error path or CONFIG_WATCH_QUEUE=n. Plug them.
>
> [snip the copy of bug report]
>
> No objections on
--
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On Thu, Oct 01, 2020 at 03:08:34PM +0200, Dmitry Vyukov wrote:
> On Thu, Oct 1, 2020 at 3:05 PM Dmitry Vyukov wrote:
> >
> > On Wed, Sep 30, 2020 at 8:06 PM David Sterba wrote:
> > >
> > > On Wed, Sep 30, 2020 at 06:57:56PM +0200, David Sterba wrote:
> > > > On Sun, Sep 20, 2020 at 07:12:14AM
On Thu, 2020-10-01 at 18:57 +0530, Dwaipayan Ray wrote:
> On Thu, Oct 1, 2020 at 6:47 PM Joe Perches wrote:
> > On Thu, 2020-10-01 at 16:03 +0530, Dwaipayan Ray wrote:
> > > Checkpatch.pl doesn't have a check for excluding while (...) {...}
> > > blocks from MULTISTATEMENT_MACRO_USE_DO_WHILE
On Thu, Oct 01, 2020 at 09:37:02AM -0400, Qian Cai wrote:
> > Fixed by providing a dummy wath_queue_init() in !CONFIG_WATCH_QUEUE
watch_queue_init(), that is
> > case and by having failures of wath_queue_init() handled the same way
Hi Tanxiaofei,
(sorry for the late reply)
On 28/09/2020 03:02, Xiaofei Tan wrote:
> After the commit 8fcc4ae6faf8 ("arm64: acpi: Make apei_claim_sea()
> synchronise with APEI's irq work") applied, do_sea() return directly
> for user-mode if apei_claim_sea() handled any error record. Therefore,
>
On Wed, Sep 30, 2020 at 05:27:09PM -0700, Roman Gushchin wrote:
> @@ -448,7 +451,12 @@ static inline void set_page_memcg(struct page *page,
> struct mem_cgroup *memcg)
> */
> static inline struct obj_cgroup **page_objcgs(struct page *page)
> {
> - return (struct obj_cgroup
On Wed, Sep 30, 2020 at 05:27:07PM -0700, Roman Gushchin wrote:
> +/*
> + * set_page_memcg - associate a page with a memory cgroup
> + * @page: a pointer to the page struct
> + * @memcg: a pointer to the memory cgroup
> + *
> + * Associates a page with a memory cgroup.
> + */
> +static inline void
On 9/30/20 10:30 AM, Peter Zijlstra wrote:
> In general though; I think using ->active_mm is a mistake though. That
> code should be doing something like:
>
>
> mm = current->mm;
> if (!mm)
> mm = _mm;
>
I was hoping that using ->active_mm would give us the *actual*
On Thu, Oct 01, 2020 at 01:24:49PM +0200, Greg Kroah-Hartman wrote:
> On Thu, Oct 01, 2020 at 11:05:31AM +0200, Lars Poeschel wrote:
> > On Wed, Sep 30, 2020 at 11:41:46AM +0200, Uwe Kleine-König wrote:
> > > Hello,
> > >
> > > I added Greg Kroah-Hartman who I discussed this with via irc a bit to
On Wed, Sep 30, 2020 at 05:27:10PM -0700, Roman Gushchin wrote:
> PageKmemcg flag is currently defined as a page type (like buddy,
> offline, table and guard). Semantically it means that the page
> was accounted as a kernel memory by the page allocator and has
> to be uncharged on the release.
>
On Tue, Sep 29, 2020 at 07:24:45PM +0530, Anshuman Khandual wrote:
> This moves memory notifier registration earlier in the boot process from
> device_initcall() to early_initcall() which will help in guarding against
> potential early boot memory offline requests. Even though there should not
>
Add a placeholder for a MAC address. A bootloader may fill it
to set the MAC address and override EEPROM settings.
Signed-off-by: Łukasz Stelmach
---
Changes in v2:
- use local-mac-address and leave mac-address to be added by a bootloader
arch/arm/boot/dts/exynos5422-odroidxu3.dts | 18
On Thu, Oct 01, 2020 at 08:39:17PM +1000, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the akpm tree got a conflict in:
>
> drivers/gpu/drm/i915/gem/i915_gem_pages.c
>
> between commit:
>
> 4caf017ee937 ("drm/i915/gem: Avoid implicit vmap for highmem on x86-32")
>
An update on the patch title, since we don't add an API but extend it,
The title should rather be: Add a new call to the reset framework
Le jeu. 1 oct. 2020 à 15:28, Amjad Ouled-Ameur
a écrit :
>
> The current reset framework API does not allow to release what is done by
> reset_control_reset(),
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