Re: [PATCH] usb: dwc2: Avoid leaving the error_debugfs label unused

On 10/17/2020 8:50 PM, Martin Blumenstingl wrote: > The error_debugfs label is only used when either > CONFIG_USB_DWC2_PERIPHERAL or CONFIG_USB_DWC2_DUAL_ROLE is enabled. Add > the same #if to the error_debugfs label itself as the code which uses > this label already has. > > This avoids the

drivers/mmc/host/sunxi-mmc.c:1181:34: warning: unused variable 'sunxi_mmc_of_match'

: 7 weeks ago config: x86_64-randconfig-r036-20201026 (attached as .config) compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project f2c25c70791de95d2466e09b5b58fc37f6ccd7a4) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin

Re: [PATCH v3 1/5] scsi: ufs: atomic update for clkgating_enable

On 10/26, Can Guo wrote: > On 2020-10-24 23:06, Jaegeuk Kim wrote: > > From: Jaegeuk Kim > > > > When giving a stress test which enables/disables clkgating, we hit > > device > > timeout sometimes. This patch avoids subtle racy condition to address > > it. > > > > If we use __ufshcd_release(),

Re: [PATCH v1 2/6] dt-bindings: arm: cpus: Document 'mtk,freq-domain' property

On Fri, 2020-10-23 at 11:20 -0500, Rob Herring wrote: > +Sudeep > > On Fri, Oct 23, 2020 at 04:24:49PM +0800, Hector Yuan wrote: > > From: "Hector.Yuan" > > > > Add devicetree documentation for 'mtk,freq-domain' property specific > > to Mediatek CPUs. This property is used to reference the

Re: [PATCH v1 3/6] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW

On Fri, 2020-10-23 at 11:15 -0500, Rob Herring wrote: > On Fri, 23 Oct 2020 16:24:50 +0800, Hector Yuan wrote: > > From: "Hector.Yuan" > > > > Add devicetree bindings for MediaTek HW driver. > > > > Signed-off-by: Hector.Yuan > > --- > > .../bindings/cpufreq/cpufreq-mediatek-hw.yaml |

Re: [PATCH v1 2/6] dt-bindings: arm: cpus: Document 'mtk,freq-domain' property

On Fri, 2020-10-23 at 13:59 +0530, Viresh Kumar wrote: > On 23-10-20, 16:24, Hector Yuan wrote: > > From: "Hector.Yuan" > > > > Add devicetree documentation for 'mtk,freq-domain' property specific > > to Mediatek CPUs. This property is used to reference the CPUFREQ node > > along with the domain

Re: [PATCH v2 5/5] scsi: ufs: fix clkgating on/off correctly

On 10/26, Can Guo wrote: > On 2020-10-23 08:53, Jaegeuk Kim wrote: > > On 10/21, Can Guo wrote: > > > On 2020-10-21 12:52, jaeg...@kernel.org wrote: > > > > On 10/21, Can Guo wrote: > > > > > On 2020-10-21 03:52, Jaegeuk Kim wrote: > > > > > > The below call stack prevents clk_gating at every IO

Re: [PATCH v1 3/6] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW

On Fri, 2020-10-23 at 14:05 +0530, Viresh Kumar wrote: > On 23-10-20, 16:24, Hector Yuan wrote: > > From: "Hector.Yuan" > > > > Add devicetree bindings for MediaTek HW driver. > > > > Signed-off-by: Hector.Yuan > > --- > > .../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 46 > >

Re: [PATCH v1] cpufreq: mediatek-hw: Add support for Mediatek cpufreq HW driver

On Fri, 2020-10-23 at 14:57 +0530, Viresh Kumar wrote: > On 23-10-20, 17:08, Hector Yuan wrote: > > On Fri, 2020-10-23 at 13:58 +0530, Viresh Kumar wrote: > > > On 23-10-20, 16:24, Hector Yuan wrote: > > > > This patchset includes 6 patches and depends on the MT6779 DTS patch[1] > > > > submitted

[PATCH] arm64: dts: imx8mp-evk: add CAN support

Add CAN device node and pinctrl on i.MX8MP evk board. Signed-off-by: Joakim Zhang --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 62 arch/arm64/boot/dts/freescale/imx8mp.dtsi| 30 ++ 2 files changed, 92 insertions(+) diff --git

Re: [PATCH v3 09/20] perf arm-spe: Refactor address packet handling

On Fri, Oct 23, 2020 at 06:53:35PM +0100, André Przywara wrote: > On 22/10/2020 15:58, Leo Yan wrote: > > Hi Leo, > > > This patch is to refactor address packet handling, it defines macros for > > address packet's header and payload, these macros are used by decoder > > and the dump flow. > > >

[PATCH] arm:traps:Don't dump the memory in non-system reset scenarios

Do not dump the memory in non-system reset scenarios to prevent virtual address information leakage. This patch follows x86 and arm64's lead and removes the "Exception stack:" dump from kernel backtraces: commit a25ffd3a6302a6 ("arm64: traps: Don't print stack or raw PC/LR

ping //Re: [PATCH v2] arm:traps: Don't print stack or raw PC/LR hex values in backtraces

ping On 2020/10/16 10:31, Xiaoming Ni wrote: Printing raw pointer values in backtraces has potential security implications and are of questionable value anyway. This patch follows x86 and arm64's lead and removes the "Exception stack:" dump from kernel backtraces: commit a25ffd3a6302a6

[PATCH 1/1] iommu: Fix deferred domain attachment in iommu_probe_device()

The IOMMU core has support for deferring the attachment of default domain to device. Fix a missed deferred attaching check in iommu_probe_device(). Fixes: cf193888bfbd3 ("iommu: Move new probe_device path to separate function") Cc: sta...@vger.kernel.org # v5.8+ Signed-off-by: Lu Baolu ---

Re: [PATCH net] gtp: fix an use-before-init in gtp_newlink()

Hi, Thanks for the review. Will send a new patch with the fixes soon. Fujiwara On Mon, Oct 26, 2020 at 6:05 AM Jakub Kicinski wrote: > > On Sat, 24 Oct 2020 15:42:33 + Masahiro Fujiwara wrote: > > *_pdp_find() from gtp_encap_recv() would trigger a crash when a peer > > sends GTP

[PATCH 1/2] dt-bindings: Fix entry name for I/O High Voltage property

Correct the name of the I/O High Voltage Property from 'nvidia,io-high-voltage' to 'nvidia,io-hv'. Fixes: 2585a584f844 ("pinctrl: Add Tegra194 pinctrl DT bindings") Signed-off-by: Vidya Sagar --- .../devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.txt | 2 +- 1 file changed, 1

[PATCH 2/2] arm64: tegra: Fix DT binding for IO High Voltage entry

Fix the device-tree entry that represents I/O High Voltage property by replacing 'nvidia,io-high-voltage' with 'nvidia,io-hv' as the former entry is deprecated. Fixes: dbb72e2c305b ("arm64: tegra: Add configuration for PCIe C5 sideband signals") Signed-off-by: Vidya Sagar ---

[PATCH v3 4/9] selftests/vm: minor cleanup: Makefile and gup_test.c

A few cleanups that don't deserve separate patches, but that also should not clutter up other functional changes: 1. Remove an unnecessary #include 2. Restore the sorted order of TEST_GEN_FILES. 3. Add -lpthread to the common LDLIBS, as it is harmless and several tests use it. This gets rid

[PATCH v3 9/9] selftests/vm: 2x speedup for run_vmtests.sh

Each invocation of userfaultfd for "anon" and "shmem" was taking about 6.5 sec to run, contributing to an overall run time of about 22 sec for run_vmtests.sh. Reduce the size and bounce input values to the userfaultfd invocation within run_vmtests.sh, enough to get each invocation down to about

[PATCH v3 6/9] selftests/vm: gup_test: introduce the dump_pages() sub-test

For quite a while, I was doing a quick hack to gup_test.c (previously, gup_benchmark.c) whenever I wanted to try out my changes to dump_page(). This makes that hack unnecessary, and instead allows anyone to easily get the same coverage from a user space program. That saves a lot of time because

[PATCH v3 5/9] selftests/vm: only some gup_test items are really benchmarks

Therefore, some minor cleanup and improvements are in order: 1. Rename the other items appropriately. 2. Stop reporting timing information on the non-benchmark items. It's still being recorded and is available, but there's no point in cluttering up the report with data that no one

[PATCH v3 8/9] selftests/vm: hmm-tests: remove the libhugetlbfs dependency

HMM selftests are incredibly useful, but they are only effective if people actually build and run them. All the other tests in selftests/vm can be built with very standard, always-available libraries: libpthread, librt. The hmm-tests.c program, on the other hand, requires something that is (much)

[PATCH v3 2/9] selftests/vm: use a common gup_test.h

Avoid the need to copy-paste the gup_test ioctl commands and the struct gup_test definition, between the kernel and the user space application, by providing a new header file for these. This allows easier and safer adding of new ioctl calls, as well as reducing the overall line count. Details:

[PATCH v3 3/9] selftests/vm: rename run_vmtests --> run_vmtests.sh

Rename to *.sh, in order to match the conventions of all of the other items in selftest/vm. The only reason not to use a .sh suffix a shell script like this, might be to make it look more like a normal program, but that's not an issue here. Signed-off-by: John Hubbard Cc: Jérôme Glisse Cc:

[PATCH v3 0/9] selftests/vm: gup_test, hmm-tests, assorted improvements

Hi, Reposting for -rc1, with some fixes, and an additional path at the end, too. I've swept through and looked for problems, as well. Changes since v2 [1]: * Rebased onto 5.10-rc1 * Fixed an improper ".." include path, indentified by Linus [2]. * Added an "if (cmd == DUMP_USER_PAGES_TEST)"

[PATCH v2 1/2] drm: adi: axi-hdmi-tx: Add support for AXI HDMI TX IP core

From: Lars-Peter Clausen The AXI HDMI HDL driver is the driver for the HDL graphics core which is used on various FPGA designs. It's mostly used to interface with the ADV7511 bridge driver on some Zynq boards (e.g. ZC702 & ZedBoard). Link:

[PATCH v3 7/9] selftests/vm: run_vmtests.sh: update and clean up gup_test invocation

Run benchmarks on the _fast variants of gup and pup, as originally intended. Run the new gup_test sub-test: dump pages. In addition to exercising the dump_page() call, it also demonstrates the various options you can use to specify which pages to dump, and how. Signed-off-by: John Hubbard Cc:

[PATCH v3 1/9] mm/gup_benchmark: rename to mm/gup_test

Rename nearly every "gup_benchmark" reference and file name to "gup_test". The one exception is for the actual gup benchmark test itself. The current code already does a *little* bit more than benchmarking, and definitely covers more than get_user_pages_fast(). More importantly, however,

Re: [PATCH v3 1/5] scsi: ufs: atomic update for clkgating_enable

On 2020-10-26 14:13, Jaegeuk Kim wrote: On 10/26, Can Guo wrote: On 2020-10-24 23:06, Jaegeuk Kim wrote: > From: Jaegeuk Kim > > When giving a stress test which enables/disables clkgating, we hit > device > timeout sometimes. This patch avoids subtle racy condition to address > it. > > If we

[PATCH v2 2/2] drm: dt-bindings: adi: axi-hdmi-tx: Add DT bindings for axi-hdmi-tx

Add YAML device tree bindings for Analog Devices Inc. AXI HDMI TX IP core DRM driver. Signed-off-by: Bogdan Togorean --- .../bindings/display/adi/adi,axi-hdmi-tx.yaml | 72 +++ 1 file changed, 72 insertions(+) create mode 100644

Re: [PATCH 2/2] power: supply: mt6360_charger: add MT6360 charger support

Krzysztof Kozlowski 於 2020年10月16日 週五 下午11:52寫道： > > On Wed, Sep 23, 2020 at 07:18:30PM +0800, Gene Chen wrote: > > From: Gene Chen > > > > Add basic support for the battery charger for MT6360 PMIC > > > > Signed-off-by: Gene Chen > > --- > > drivers/power/supply/Kconfig | 11 + > >

[PATCH] kthread_worker: re-set CPU affinities if CPU come online

From: Zqiang When someone CPU offlined, the 'kthread_worker' which bind this CPU, will run anywhere, if this CPU online, recovery of 'kthread_worker' affinity by cpuhp notifiers. Signed-off-by: Zqiang --- include/linux/kthread.h | 2 ++ kernel/kthread.c| 35

Re: [PATCH net] net: hns3: clean up a return in hclge_tm_bp_setup()

On Mon, Oct 26, 2020 at 11:18:16AM +0800, Yunsheng Lin wrote: > On 2020/10/23 19:22, Dan Carpenter wrote: > > Smatch complains that "ret" might be uninitialized if we don't enter > > the loop. We do always enter the loop so it's a false positive, but > > it's cleaner to just return a literal zero

[PATCH 1/4] PCI: tegra: Fix ASPM-L1SS advertisement disable code

If the absence of CLKREQ# signal is indicated by the absence of "supports-clkreq" in the device-tree node, current driver is disabling the advertisement of ASPM-L1 Sub-States *before* the ASPM-L1 Sub-States offset is correctly initialized. Since default value of the ASPM-L1SS offset is zero, this

[PATCH 2/4] PCI: tegra: Map configuration space as strongly ordered

As specified in the comment for pci_remap_cfgspace() define in arch/arm64/include/asm/io.h file, PCIe configuration space should be mapped as strongly ordered. Hence changing to dev_pci_remap_cfgspace() from devm_ioremap_resource() for mapping DBI space as that is nothing but the root port's own

Am I A Good Coach

Want the grownups we need in this, and */ Coach Handbags Clearance Outlet /* nothing more, says Kasky. Only have people doing the things that as 17 year olds we cannot. At an early NeverAgain meeting, parents asked */ Coach Outlet Store

[PATCH 3/4] PCI: tegra: Set DesignWare IP version

Set the DesignWare IP version for Tegra194 to 0x490A. This would be used by the DesigWare sub-system to do any version specific configuration (Ex:- TD bit programming for ECRC). Signed-off-by: Vidya Sagar --- drivers/pci/controller/dwc/pcie-tegra194.c | 1 + 1 file changed, 1 insertion(+) diff

[PATCH 4/4] PCI: tegra: Handle error conditions properly

Currently the driver checks for error value of different APIs during the uninitialization sequence. It just returns from there if there is any error observed for one of those calls. Comparatively it is better to continue the uninitialization sequence irrespective of whether some of them are

[PATCH 0/4] Enhancements to Tegra194 PCIe driver

This series of patches do some enhancements and some bug fixes to the Tegra194 PCIe platform driver like - Fixing Vendor-ID corruption - Mapping DBI space correctly - Updating DWC IP version - Handling error conditions properly Vidya Sagar (4): PCI: tegra: Fix ASPM-L1SS advertisement disable

Re: [PATCH 2/2] PCI: dwc: Add support to configure for ECRC

On 10/26/2020 2:19 AM, Jingoo Han wrote: External email: Use caution opening links or attachments On 10/25/20, 3:31 AM, Vidya Sagar wrote: DesignWare core has a TLP digest (TD) override bit in one of the control registers of ATU. This bit also needs to be programmed for proper ECRC

Re: [PATCH v3 01/56] scripts: kernel-doc: fix typedef parsing

Em Fri, 23 Oct 2020 11:01:35 -0700 Joe Perches escreveu: > On Fri, 2020-10-23 at 11:22 -0600, Jonathan Corbet wrote: > > On Fri, 23 Oct 2020 18:32:48 +0200 > > Mauro Carvalho Chehab wrote: > > > > > The include/linux/genalloc.h file defined this typedef: > > > > > > typedef unsigned long

Re: [PATCH v2 1/1] scsi: ufs: Fix unexpected values get from ufshcd_read_desc_param()

On 2020-10-26 13:22, Avri Altman wrote: On 2020-10-22 14:37, Avri Altman wrote: >> Since WB feature has been added, WB related sysfs entries can be >> accessed >> even when an UFS device does not support WB feature. In that case, the >> descriptors which are not supported by the UFS device may

[PATCH] vdpa/mlx5: Fix error return in map_direct_mr()

Fix to return the variable "err" from the error handling case instead of "ret". Fixes: 94abbccdf291 ("vdpa/mlx5: Add shared memory registration code") Signed-off-by: Jing Xiangfeng --- drivers/vdpa/mlx5/core/mr.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git

Re: [PATCH] mm: fix page_owner initializing issue for arm32

Hi Mike, On Sun, Oct 25, 2020 at 11:42:53PM +0800, Mike Rapoport wrote: > On Fri, Oct 16, 2020 at 05:14:00PM +0800, Zhenhua Huang wrote: > > Page owner of pages used by page owner itself used is missing on arm32 > targets. > > The reason is dummy_handle and failure_handle is not initialized >

Re: [PATCH] vdpa/mlx5: Fix error return in map_direct_mr()

On Mon, Oct 26, 2020 at 03:06:37PM +0800, Jing Xiangfeng wrote: > Fix to return the variable "err" from the error handling case instead > of "ret". > > Fixes: 94abbccdf291 ("vdpa/mlx5: Add shared memory registration code") > Signed-off-by: Jing Xiangfeng Acked-by: Eli Cohen > --- >

Re: [PATCH] efivarfs: fix memory leak in efivarfs_create()

On Fri, 23 Oct 2020 at 13:54, Vamshi K Sthambamkadi wrote: > > kmemleak report: > unreferenced object 0x9b8915fcb000 (size 4096): > comm "efivarfs.sh", pid 2360, jiffies 4294920096 (age 48.264s) > hex dump (first 32 bytes): > 2d 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

Re: [PATCH v3 2/2] arm64: dts: lx2160a: add device tree for lx2162aqds board

On Mon, Oct 19, 2020 at 09:00:33AM +, Meenakshi Aggarwal wrote: > Hi, > > Any further comments? Please address the following checkpatch warnings. WARNING: DT compatible string "nxp,lx2162a-qds" appears un-documented -- check ./Documentation/devicetree/bindings/ #49: FILE:

RE: [PATCH 0/2] rtc: pcf2127: only use watchdog when explicitly available

Any update for this patchset? Best Regards Qiang Zhao > -Original Message- > From: Uwe Kleine-König > Sent: 2020年9月24日 18:53 > To: Alexandre Belloni ; Qiang Zhao > ; Bruno Thomsen > Cc: linux-...@vger.kernel.org; a.zu...@towertech.it; > linux-watch...@vger.kernel.org;

[PATCH v2 net] gtp: fix an use-before-init in gtp_newlink()

*_pdp_find() from gtp_encap_recv() would trigger a crash when a peer sends GTP packets while creating new GTP device. RIP: 0010:gtp1_pdp_find.isra.0+0x68/0x90 [gtp] Call Trace: gtp_encap_recv+0xc2/0x2e0 [gtp] ? gtp1_pdp_find.isra.0+0x90/0x90 [gtp] udp_queue_rcv_one_skb+0x1fe/0x530

[RESENDPATCH v15 1/2] dt-bindings: mtd: Add Nand Flash Controller support for Intel LGM SoC

From: Ramuthevar Vadivel Murugan Add YAML file for dt-bindings to support NAND Flash Controller on Intel's Lightning Mountain SoC. Signed-off-by: Ramuthevar Vadivel Murugan Reviewed-by: Rob Herring --- .../devicetree/bindings/mtd/intel,lgm-nand.yaml| 99 ++ 1 file

[RESENDPATCH v15 0/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC

This patch adds the new IP of Nand Flash Controller(NFC) support on Intel's Lightning Mountain(LGM) SoC. DMA is used for burst data transfer operation, also DMA HW supports aligned 32bit memory address and aligned data access by default. DMA burst of 8 supported. Data register used to support the

[PATCH 1/2] hwspinlock: sprd: fixed warning of unused variable 'sprd_hwspinlock_of_match'

From: Chunyan Zhang The macro function of_match_ptr() is NULL if CONFIG_OF is not set, in this case Clang compiler would complain the of_device_id variable is unused. Reported-by: kernel test robot Fixes: d8c81aba ("hwspinlock: sprd: Add hardware spinlock driver") Signed-off-by: Chunyan

[PATCH 2/2] hwspinlock: sprd: use module_platform_driver() instead postcore initcall

From: Chunyan Zhang The hardware spinlock devices are defined in the DT, there's no need for iinit calls order, remove boilerplate code by using module_platform_driver. Signed-off-by: Chunyan Zhang --- drivers/hwspinlock/sprd_hwspinlock.c | 13 + 1 file changed, 1 insertion(+), 12

[RESENDPATCH v15 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC

From: Ramuthevar Vadivel Murugan This patch adds the new IP of Nand Flash Controller(NFC) support on Intel's Lightning Mountain(LGM) SoC. DMA is used for burst data transfer operation, also DMA HW supports aligned 32bit memory address and aligned data access by default. DMA burst of 8

Re: [PATCH v4] mm: memcg/slab: Stop reparented obj_cgroups from charging root

Hello Roman, Roman Gushchin writes: > On Thu, Oct 22, 2020 at 04:59:56PM -0700, Shakeel Butt wrote: >> On Thu, Oct 22, 2020 at 10:25 AM Roman Gushchin wrote: >> > >> [snip] >> > > >> > > Since bf4f059954dc ("mm: memcg/slab: obj_cgroup API") is in 5.9, I >> > > think we can take this patch for

Re: [PATCH v3 2/3] arm64: dts: imx8mq-librem5: align GPIO hog names with dtschema

On Sun, Sep 20, 2020 at 09:57:48PM +0200, Krzysztof Kozlowski wrote: > dtschema expects GPIO hogs to end with 'hog' suffix. > > Signed-off-by: Krzysztof Kozlowski Applied, thanks.

[PATCH v3 0/1] ARM: dts: sun8i: add FriendlyArm ZeroPi support

This patch add FriendlyArm ZeroPi support. Wiki: http://wiki.friendlyarm.com/wiki/index.php/ZeroPi Schematic: http://wiki.friendlyarm.com/wiki/images/7/71/ZeroPi_20190731_Schematic.pdf v1: - Remove the extra spaces in description text. v2: - Remove the ehci0 and ohci0 device nodes. - Remove

[PATCH 2/2] hwspinlock: sprd: use module_platform_driver() instead postcore initcall

From: Chunyan Zhang The hardware spinlock devices are defined in the DT, there's no need for init calls order, remove boilerplate code by using module_platform_driver. Signed-off-by: Chunyan Zhang --- drivers/hwspinlock/sprd_hwspinlock.c | 13 + 1 file changed, 1 insertion(+), 12

Re: [PATCH v3 3/3] ARM: dts: imx: align GPIO hog names with dtschema

On Sun, Sep 20, 2020 at 09:57:49PM +0200, Krzysztof Kozlowski wrote: > dtschema for GPIO controllers expects GPIO hogs to end with 'hog' > suffix. > > Signed-off-by: Krzysztof Kozlowski Applied, thanks.

[PATCH v3 1/1] ARM: dts: sun8i: add FriendlyArm ZeroPi support

The ZeroPi is another fun board developed by FriendlyELEC for makers, hobbyists and fans. ZeroPi key features - Allwinner H3, Quad-core Cortex-A7@1.2GHz - 256MB/512MB DDR3 RAM - microsd slot - 10/100/1000Mbps Ethernet - Debug Serial Port - DC 5V/2A power-supply Signed-off-by: Yu-Tung Chang ---

Re: [linux-sunxi] [PATCH 02/10] ARM: dts: sun6i: a31-hummingbird: Enable RGMII RX/TX delay on Ethernet PHY

On Sat, 24 Oct 2020 at 20:40, Icenowy Zheng wrote: > > > > 于 2020年10月25日 GMT+08:00 上午2:30:35, "Jernej Škrabec" > 写到: > >Dne sobota, 24. oktober 2020 ob 19:51:06 CEST je Icenowy Zheng > >napisal(a): > >> 在 2020-10-25星期日的 00:25 +0800，Chen-Yu Tsai写道： > >> > >> > From: Chen-Yu Tsai > >> > > >> >

Re: [PATCH v3] nvme-rdma: handle nvme completion data length

Reviewed-by: Sagi Grimberg

Re: [PATCH v3 11/24] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek

On Fri, 2020-10-23 at 15:10 +0100, Robin Murphy wrote: > On 2020-09-30 08:06, Yong Wu wrote: > > The standard input iova bits is 32. MediaTek quad the lvl1 pagetable > > (4 * lvl1). No change for lvl2 pagetable. Then the iova bits can reach > > 34bit. > > > > Signed-off-by: Yong Wu > > --- > >

[PATCH] mm: cleanup: remove unused tsk arg from __access_remote_vm

Despite a comment that said that page fault accounting would be charged to whatever task_struct* was passed into __access_remote_vm(), the tsk argument was actually unused. Delete both the comment, and the argument. Signed-off-by: John Hubbard Cc: Oleg Nesterov --- Hi, Just something that

Re: [PATCH v3 11/24] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek

On Fri, 2020-10-23 at 12:21 +0100, Will Deacon wrote: > On Wed, Sep 30, 2020 at 03:06:34PM +0800, Yong Wu wrote: > > The standard input iova bits is 32. MediaTek quad the lvl1 pagetable > > (4 * lvl1). No change for lvl2 pagetable. Then the iova bits can reach > > 34bit. > > > > Signed-off-by:

Re: [PATCH v3 08/24] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap

On Fri, 2020-10-23 at 12:17 +0100, Will Deacon wrote: > On Wed, Sep 30, 2020 at 03:06:31PM +0800, Yong Wu wrote: > > Use the ias for the valid iova checking in arm_v7s_unmap. This is a > > preparing patch for supporting iova 34bit for MediaTek. > > BTW, change the ias/oas checking format in

Re: [PATCH V3 2/4] arm64: defconfig: Build in CONFIG_GPIO_MXC by default

On Thu, Sep 17, 2020 at 01:33:47PM +0800, Anson Huang wrote: > i.MX SoC GPIO driver provides the basic functions of GPIO pin operations > and IRQ operations, it is now changed from "def_bool y" to "tristate", so > it should be explicitly enabled to make sure all consumers work normally. > >

Re: [PATCH v4 2/6] crypto: Use memzero_explicit() for clearing state

On Sun, 25 Oct 2020 at 15:31, Arvind Sankar wrote: > > Without the barrier_data() inside memzero_explicit(), the compiler may > optimize away the state-clearing if it can tell that the state is not > used afterwards. > > Signed-off-by: Arvind Sankar Acked-by: Ard Biesheuvel I agree with Eric

Re: [PATCH v4 3/6] crypto: lib/sha256 - Don't clear temporary variables

On Sun, 25 Oct 2020 at 15:31, Arvind Sankar wrote: > > The assignments to clear a through h and t1/t2 are optimized out by the > compiler because they are unused after the assignments. > > Clearing individual scalar variables is unlikely to be useful, as they > may have been assigned to

Re: [PATCH v4 1/6] crypto: lib/sha256 - Use memzero_explicit() for clearing state

On Sun, 25 Oct 2020 at 15:31, Arvind Sankar wrote: > > Without the barrier_data() inside memzero_explicit(), the compiler may > optimize away the state-clearing if it can tell that the state is not > used afterwards. At least in lib/crypto/sha256.c:__sha256_final(), the > function can get inlined

Re: [PATCH v4 4/6] crypto: lib/sha256 - Clear W[] in sha256_update() instead of sha256_transform()

On Sun, 25 Oct 2020 at 15:31, Arvind Sankar wrote: > > The temporary W[] array is currently zeroed out once every call to > sha256_transform(), i.e. once every 64 bytes of input data. Moving it to > sha256_update() instead so that it is cleared only once per update can > save about 2-3% of the

Re: [PATCH v4 5/6] crypto: lib/sha256 - Unroll SHA256 loop 8 times intead of 64

On Sun, 25 Oct 2020 at 15:31, Arvind Sankar wrote: > > This reduces code size substantially (on x86_64 with gcc-10 the size of > sha256_update() goes from 7593 bytes to 1952 bytes including the new > SHA256_K array), and on x86 is slightly faster than the full unroll > (tested on Broadwell Xeon).

Re: [PATCH v4 6/6] crypto: lib/sha256 - Unroll LOAD and BLEND loops

On Sun, 25 Oct 2020 at 15:31, Arvind Sankar wrote: > > Unrolling the LOAD and BLEND loops improves performance by ~8% on x86_64 > (tested on Broadwell Xeon) while not increasing code size too much. > > Signed-off-by: Arvind Sankar > Reviewed-by: Eric Biggers Acked-by: Ard Biesheuvel > --- >

[PATCH 0/3] sprd watchdog a few fixes

From: Chunyan Zhang A few issues about sprd watchdog driver were found recently, this patchset would fix them. Lingling Xu (3): watchdog: sprd: should not disable watchdog in resume watchdog: sprd: change timeout value from 1000 to 2000 watchdog: sprd: check busy bit before kick watchdog

Re: [PATCH] mm: fix page_owner initializing issue for arm32

Hi Mike, On Sun, Oct 25, 2020 at 11:42:53PM +0800, Mike Rapoport wrote: > On Fri, Oct 16, 2020 at 05:14:00PM +0800, Zhenhua Huang wrote: > > Page owner of pages used by page owner itself used is missing on arm32 > targets. > > The reason is dummy_handle and failure_handle is not initialized >

[PATCH 0/3] A few fixes to sprd watchdog driver

From: Chunyan Zhang A few issues about sprd watchdog driver were found recently, this patchset would fix them. Lingling Xu (3): watchdog: sprd: should not disable watchdog in resume watchdog: sprd: change timeout value from 1000 to 2000 watchdog: sprd: check busy bit before kick watchdog

[PATCH 3/3] watchdog: sprd: check busy bit before kick watchdog

From: Lingling Xu As the specification described, checking busy bit must be done before kick watchdog. Fixes: 477603467009 ("watchdog: Add Spreadtrum watchdog driver") Signed-off-by: Lingling Xu Signed-off-by: Chunyan Zhang --- drivers/watchdog/sprd_wdt.c | 27 ++- 1

[PATCH 1/3] watchdog: sprd: should not disable watchdog in resume

From: Lingling Xu Don't disable watchdog in resume process, otherwise system would crash once kick watchdog. Fixes: 477603467009 ("watchdog: Add Spreadtrum watchdog driver") Signed-off-by: Lingling Xu Signed-off-by: Chunyan Zhang --- drivers/watchdog/sprd_wdt.c | 9 ++--- 1 file changed,

[PATCH 2/3] watchdog: sprd: change timeout value from 1000 to 2000

From: Lingling Xu Because cpu_relax() takes different time on different SoCs, for some rare cases, it would take more than 1000 cycles for waitting load operation finished. The result of many times testing verified that changing the timeout value to 2000 can solve the issue. Fixes: 477603467009

[RESEND 06/11] arm64: dts: ls1088ardb: fix interrupt line for RTC node

From: Biwen Li Fix interrupt line for RTC node on ls1088ardb Signed-off-by: Biwen Li --- arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts

[RESEND 08/11] arm64: dts: ls208xa-rdb: add interrupt line for RTC node

From: Biwen Li Add interrupt line for RTC node on ls208xa-rdb Signed-off-by: Biwen Li --- arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi

[RESEND 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt

From: Hou Zhiqiang Add an new IRQ chip declaration for LS1043A and LS1088A - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A - compatible "fsl,ls1088a-extirq" for LS1088A, LS208xA, LX216xA Signed-off-by: Hou Zhiqiang Signed-off-by: Biwen Li --- drivers/irqchip/irq-ls-extirq.c | 6 ++

[RESEND 04/11] arm64: dts: ls1046ardb: Add interrupt line for RTC node

From: Hou Zhiqiang Add interrupt line for RTC node, which is low level active. Signed-off-by: Hou Zhiqiang --- arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts

[RESEND 07/11] arm64: dts: ls208xa: add DT node for external interrupt lines

From: Biwen Li Add device-tree node for external interrupt lines IRQ0-IRQ11. Signed-off-by: Biwen Li --- .../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 33 ++- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi

[RESEND 11/11] dt-bindings: interrupt-controller: update bindings for supporting more SoCs

From: Biwen Li Update bindings for Layerscape external irqs, support more SoCs(LS1043A, LS1046A, LS1088A, LS208xA, LX216xA) Signed-off-by: Biwen Li --- .../bindings/interrupt-controller/fsl,ls-extirq.txt | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git

[RESEND 09/11] arm64: dts: lx2160a: add DT node for external interrupt lines

From: Biwen Li Add device-tree node for external interrupt lines IRQ0-IRQ11. Signed-off-by: Biwen Li --- .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 31 +++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi

[RESEND 03/11] arm64: dts: ls1046a: add DT node for external interrupt lines

From: Biwen Li Add device-tree node for external interrupt lines IRQ0-IRQ11. Signed-off-by: Biwen Li --- .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 27 ++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi

[RESEND 10/11] arm64: dts: lx2160ardb: fix interrupt line for RTC node

From: Biwen Li Fix interrupt line for RTC node on lx2160ardb Signed-off-by: Biwen Li --- arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts

[RESEND 02/11] arm64: dts: ls1043a: add DT node for external interrupt lines

From: Biwen Li Add device-tree node for external interrupt lines IRQ0-IRQ11. Signed-off-by: Biwen Li --- .../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 27 ++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi

Re: [PATCH 2/2] mailbox: stm32-ipcc: remove duplicate error message

Hi Martin Thank you for the patch On 24/10/2020 3:31 pm, Martin Kaiser wrote: > platform_get_irq_byname already prints an error message if the requested irq > was not found. Don't print another message in the driver. > > Signed-off-by: Martin Kaiser Reviewed-by: Fabien Dessenne > --- >

[RESEND 05/11] arm64: dts: ls1088a: add DT node for external interrupt lines

From: Biwen Li Add device-tree node for external interrupt lines IRQ0-IRQ11. Signed-off-by: Biwen Li --- .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 33 ++- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi

[PATCH v8 2/3] dt-bindings: arm: cpus: Document 'mediatek,freq-domain' property

From: "Hector.Yuan" Add devicetree documentation for 'mediatek,freq-domain' property specific to Mediatek CPUs. This property is used to reference the CPUFREQ node along with the domain id. Signed-off-by: Hector.Yuan --- Documentation/devicetree/bindings/arm/cpus.yaml |6 ++ 1 file

[PATCH v8 1/3] cpufreq: mediatek-hw: Add support for CPUFREQ HW

From: "Hector.Yuan" Add cpufreq HW support. Signed-off-by: Hector.Yuan --- drivers/cpufreq/Kconfig.arm | 12 ++ drivers/cpufreq/Makefile |1 + drivers/cpufreq/mediatek-cpufreq-hw.c | 343 + 3 files changed, 356 insertions(+)

[PATCH v8] cpufreq: mediatek-hw: Add support for Mediatek cpufreq HW driver

The CPUfreq HW present in some Mediatek chipsets offloads the steps necessary for changing the frequency of CPUs. The driver implements the cpufreq driver interface for this hardware engine. This patch depends on MT6779 DTS patch[1] submitted by Hanks Chen. From v7 to v8, there are three more

[PATCH v8 3/3] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW

From: "Hector.Yuan" Add devicetree bindings for MediaTek HW driver. Signed-off-by: Hector.Yuan --- .../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 113 1 file changed, 113 insertions(+) create mode 100644

Re: [RFC PATCH v3 9/9] ipu3-cio2: Add functionality allowing software_node connections to sensors on platforms designed for Windows

On 24/10/2020 23:36, Laurent Pinchart wrote: > Hi Dan, > > On Sat, Oct 24, 2020 at 11:28:06PM +0100, Daniel Scally wrote: >> On 24/10/2020 10:37, Laurent Pinchart wrote: > I wonder if we could avoid depending on the I2C device being created by > getting the fwnode from adev, and setting

Re: [PATCH v2 12/15] perf record: introduce thread local variable for trace streaming

On 24.10.2020 18:43, Jiri Olsa wrote: > On Wed, Oct 21, 2020 at 07:07:00PM +0300, Alexey Budankov wrote: >> >> Introduce thread local variable and use it for threaded trace streaming. >> >> Signed-off-by: Alexey Budankov >> --- >> tools/perf/builtin-record.c | 71

答复: [PATCH 3/3] mmc: rtsx: Add SD Express mode support for RTS5261

> > + Christoph (to help us understand if PCIe/NVMe devices can be marked > + read-only) > > On Thu, 22 Oct 2020 at 08:04, 冯锐 wrote: > > > > > > > > On Fri, 25 Sep 2020 at 03:57, wrote: > > > > > > > > From: Rui Feng > > > > > > > > RTS5261 support legacy SD mode and SD Express mode. > > > >

Re: [PATCH v2] net: xfrm: fix a race condition during allocing spi

On Thu, Oct 22, 2020 at 06:01:27PM +0800, Zhuoliang Zhang wrote: > From: zhuoliang zhang > > we found that the following race condition exists in > xfrm_alloc_userspi flow: > > user threadstate_hash_work thread >

Build regressions/improvements in v5.10-rc1

Below is the list of build error/warning regressions/improvements in v5.10-rc1[1] compared to v5.9[2]. Summarized: - build errors: +3/-7 - build warnings: +26/-28 Happy fixing! ;-) Thanks to the linux-next team for providing the build service. [1]

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