Hi Rob,
Sameer, I wanted to experiment with what the interface for graph users
looks like, so I've tweaked your patch a bit and converted 2 users.
Thanks for the update and help.
Add new structures and messages that the driver use to interact with the
firmware to receive information and events (errors) about GAUDI's NIC.
Signed-off-by: Omer Shpigelman
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
.../misc/habanalabs/include/common/cpucp_if.h | 34
This patch-set initializes the GAUDI compute queues which are connected
to the NIC ports. It also configures the security properties of those
queues.
This is the pretty much the same code as the one that configures the
rest of the queues in GAUDI.
I want to emphasize that there is no
Hi Yunfei,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: b7cbaf59f62f8ab8f157698f9e31642bff525bd0
commit: c7244811b1c951dca812079d16b17cb241882a80 media: mtk-vcodec: add SCP
firmware ops
date: 5 weeks ago
Initialize the QMANs that are responsible to submit doorbells to the NIC
engines. Add support for stopping and disabling them, and reset them as
part of the hard-reset procedure of GAUDI. This will allow the user to
submit work to the NICs.
Add support for receiving events on QMAN errors from the
./include/soc/mediatek/smi.h and ./include/linux/soc/mediatek/infracfg.h
are currently not assigned to a specific section in MAINTAINERS.
./include/soc/mediatek/smi.h is the header file for definitions in
./drivers/memory/mtk-smi.c, which is assigned to the section ARM/Mediatek
SoC support in
On 11/3/20 12:43 AM, Andy Lutomirski wrote:
On Sun, Nov 1, 2020 at 10:14 PM Tao Xu wrote:
There are some cases that malicious virtual machines can cause CPU stuck
(event windows don't open up), e.g., infinite loop in microcode when
nested #AC (CVE-2015-5307). No event window obviously
Hi Tom,
From: Tom Rix
A semicolon is not needed after a switch statement.
Signed-off-by: Tom Rix
---
Acked-by: Sameer Pujar
Thanks for the update.
Hi,
Thanks Doug for adding me
On 02-11-20, 08:37, Doug Anderson wrote:
> > On Thu, Oct 29, 2020 at 06:17:34PM -0700, Stephen Boyd wrote:
> > Any chance we can convince you to prepare this bridge driver for use in
> > a chained bridge setup where the connector is created by the display
> >
On Mon, Oct 26, 2020 at 11:02 AM Sudip Mukherjee
wrote:
>
> Coccinelle suggested using PTR_ERR_OR_ZERO() and looking at the code,
> we can use PTR_ERR_OR_ZERO() instead of checking IS_ERR() and then
> doing 'return 0'.
>
> Signed-off-by: Sudip Mukherjee
Thanks for sending this!
Acked-by: John
On Mon, Nov 2, 2020 at 12:39 PM Zhang Rui wrote:
>
> On Tue, 2020-10-27 at 07:23 +, Victor Ding wrote:
> > This patch enables AMD Fam17h RAPL support for the power capping
> > framework. The support is as per AMD Fam17h Model31h (Zen2) and
> > model 00-ffh (Zen1) PPR.
> >
> > Tested by
On 11/3/20 6:53 AM, Jim Mattson wrote:
On Sun, Nov 1, 2020 at 10:14 PM Tao Xu wrote:
There are some cases that malicious virtual machines can cause CPU stuck
(event windows don't open up), e.g., infinite loop in microcode when
nested #AC (CVE-2015-5307). No event window obviously means no
On 11/2/20 10:06 PM, lkp wrote:
Greeting,
FYI, we noticed the following commit (built with gcc-9):
commit: 22b17dc667d36418ccabb9c668c4b489185fb40a ("[PATCH v5 13/15] resource: Move
devmem revoke code to resource framework")
url:
On 11/03/2020 01:28 PM, Jiaxun Yang wrote:
在 2020/11/3 11:15, Tiezhu Yang 写道:
In loongson3_type3_play_dead(), in order to make sure the PC address is
correct, use lw to read the low 32 bits first, if the result is not
zero,
then use ld to read the whole 64 bits, otherwise there maybe exists
On 11/3/2020 2:12 PM, Tao Xu wrote:
On 11/3/20 6:53 AM, Jim Mattson wrote:
On Sun, Nov 1, 2020 at 10:14 PM Tao Xu wrote:
There are some cases that malicious virtual machines can cause CPU stuck
(event windows don't open up), e.g., infinite loop in microcode when
nested #AC (CVE-2015-5307).
Use the uic_cmd->cmd_active as a flag to track the lifecycle of an UIC cmd.
The flag is set before send the UIC cmd and cleared in IRQ handler. When a
PMC or UIC cmd completion timeout happens, if the flag is not set, instead
of returning timeout error, we still treat it as a successful operation.
The scsi_block_reqs_cnt increased in ufshcd_hold() is supposed to be
decreased back in ufshcd_ungate_work() in a paired way. However, if
specific ufshcd_hold/release sequences are met, it is possible that
scsi_block_reqs_cnt is increased twice but only one ungate work is
queued. To make sure
Use the uic_cmd->cmd_active as a flag to track the lifecycle of an UIC cmd.
The flag is set before send the UIC cmd and cleared after the completion is
raised in IRQ handler. For a power mode change operation, including hibern8
enter/exit, the flag is cleared only after hba->uic_async_done
Hi Boris,
On Mon 2.Nov'20 at 15:37:07 +0100, Borislav Petkov wrote:
On Mon, Oct 19, 2020 at 02:17:49PM +0800, shuo.a@intel.com wrote:
+bool acrn_is_privileged_vm(void)
+{
+ return cpuid_eax(acrn_cpuid_base() | ACRN_CPUID_FEATURES) &
+
On Mon, Nov 02, 2020 at 10:34:08PM +0100, Hans-Peter Jansen wrote:
> Hi Greg, hi Dan,
>
> Am Samstag, 31. Oktober 2020, 12:36:06 CET schrieb Greg Kroah-Hartman:
> > From: Dan Williams
> >
> > commit ec6347bb43395cb92126788a1a5b25302543f815 upstream.
> >
> > In reaction to a proposal to
On Tue, Nov 03, 2020 at 11:27:15AM +0800, rui_f...@realsil.com.cn wrote:
> From: Rui Feng
>
> 1.Add force test mode
> 2.Fix OCP function
> 3.Use aspm in way of backdoor
> 4.Fix PAD driving
> 5.Not support MMC default
> 6.Support CD reverse
> 7.Add hardware auto power down when unplug card
When
On Tue, Nov 03, 2020 at 06:55:21AM +0200, Jarkko Sakkinen wrote:
> On Wed, Sep 02, 2020 at 03:59:05PM -0700, Nick Desaulniers wrote:
> > During Plumbers 2020, we voted to just support the latest release of
> > Clang for now. Add a compile time check for this.
> >
> > We plan to remove
Hi all,
After merging the nand tree, today's linux-next build (htmldocs)
produced these warnings:
Error: Cannot open file drivers/mtd/nand/raw/nand_ecc.c
Error: Cannot open file drivers/mtd/nand/raw/nand_ecc.c
Caused by commit
5c859c18150b ("mtd: nand: ecc-hamming: Move Hamming code to the
On 11/3/2020 2:25 AM, Paolo Bonzini wrote:
On 02/11/20 19:01, Andy Lutomirski wrote:
What's the point? Surely the kernel should reliably mitigate the
flaw, and the kernel should decide how to do so.
There is some slowdown in trapping #DB and #AC unconditionally. Though
for these two cases
On Tue, Nov 03, 2020 at 12:00:08PM +1100, Stephen Rothwell wrote:
> Hi all,
>
> After merging the imx-mxs tree, today's linux-next build (arm
> multi_v7_defconfig) failed like this:
>
> arch/arm/mach-imx/mmdc.c: In function 'imx_mmdc_remove':
> arch/arm/mach-imx/mmdc.c:465:24: error:
>From 818a76a9aee5bf225565264274d211edb07bae7d Mon Sep 17 00:00:00 2001
From: Daejun Park
Date: Tue, 3 Nov 2020 15:30:26 +0900
In the fs-based mode of F2FS, the mapping of hot/warm node to
WRITE_LIFE_NOT_SET should be changed to WRITE_LIFE_SHORT.
As a result of analyzing the write pattern of
Hi Dave,
On Mon, Nov 02, 2020 at 05:06:53PM +, Dave Martin wrote:
> On Fri, Oct 30, 2020 at 02:57:09AM +, Leo Yan wrote:
> > When outputs strings to the decoding buffer with function snprintf(),
> > SPE decoder needs to detects if any error returns from snprintf() and if
> > so needs to
Eduardo, Keerthy,
On 29/10/2020 12.51, Tony Lindgren wrote:
> * Peter Ujfalusi [201029 10:03]:
>> Disabling the notifier fixes the random shutdowns on OMAP4430 (ES2.0 and
>> ES2.1)
>> but it does not cause any issues on OMAP4460 (PandaES) or OMAP3630
>> (BeagleXM).
>> Tony's duovero with
On Mon, Nov 02, 2020 at 11:00:19PM +0200, Andy Shevchenko wrote:
> Some users may want to use resource library to manage their own resources,
> besides existing users that open code union() and intersection()
> implementations.
>
> Provide a generic API for wider use.
>
> Changelog v4:
> - added
On Mon, Nov 02, 2020 at 12:53:15PM -0800, ira.we...@intel.com wrote:
> From: Fenghua Yu
>
> PKS allows kernel users to define domains of page mappings which have
> additional protections beyond the paging protections.
>
> Add an API to allocate, use, and free a protection key which identifies
>
On Fri, Oct 30, 2020 at 10:12:54PM +0200, Grygorii Strashko wrote:
> The devm_clk_get() may return -EPROBE_DEFER which is not handled properly
> by TI EHRPWM driver and causes unnecessary boot log messages.
>
> Hence, add proper deferred probe handling with new dev_err_probe() API.
>
>
On 11/3/2020 12:12 PM, Peter Ujfalusi wrote:
Eduardo, Keerthy,
On 29/10/2020 12.51, Tony Lindgren wrote:
* Peter Ujfalusi [201029 10:03]:
Disabling the notifier fixes the random shutdowns on OMAP4430 (ES2.0 and ES2.1)
but it does not cause any issues on OMAP4460 (PandaES) or OMAP3630
On Mon, Nov 02, 2020 at 04:25:36PM +, Dave Martin wrote:
> On Fri, Oct 30, 2020 at 02:57:23AM +, Leo Yan wrote:
> > From: Andre Przywara
> >
> > When SPE records a physical address, it can additionally tag the event
> > with information from the Memory Tagging architecture extension.
> >
On Mon, Nov 02, 2020 at 06:20:45PM -0800, John Hubbard wrote:
> On 11/2/20 4:41 PM, Ahmed S. Darwish wrote:
> > On Mon, Nov 02, 2020 at 08:25:32PM -0400, Jason Gunthorpe wrote:
> > > On Tue, Nov 03, 2020 at 01:17:12AM +0100, Ahmed S. Darwish wrote:
> > >
> > > > Please stick with the official
On 02/11/2020 16:30, YueHaibing wrote:
> gpiod_to_irq() return negative value in case of error,
> the existing code doesn't handle negative error codes.
> If the HPD gpio supports IRQs (gpiod_to_irq returns a
> valid number), we use the IRQ. If it doesn't (gpiod_to_irq
> returns an error), it gets
A reboot notifier, which stops the WDT by calling the stop hook without
any check, would be registered when we set WDOG_STOP_ON_REBOOT flag.
Howerer we allow the WDT driver to omit the stop hook since commit
"d0684c8a93549" ("watchdog: Make stop function optional") and provide
a module parameter
Signed-off-by: Wang Wensheng
---
drivers/watchdog/watchdog_core.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/watchdog/watchdog_core.c b/drivers/watchdog/watchdog_core.c
index 423844757812..c73871f41142 100644
---
If the parent device changes the their frequency before registering
the passive device, the passive device cannot receive the notification
from parent device and then the passive device cannot be able to
set the proper frequency according to the frequency of parent device.
So, when start the
On Mon, Nov 02, 2020 at 09:06:21PM +0100, Christian König wrote:
> Am 02.11.20 um 20:43 schrieb Alex Deucher:
> > On Mon, Nov 2, 2020 at 1:42 PM Deepak R Varma wrote:
> > > Initializing global variable to 0 or NULL is not necessary and should
> > > be avoided. Issue reported by checkpatch script
Hi Rob,
Could you please kindly review this patch ?
I had got your "reviewed-by" on v1 patch, the v1 depends on this patch series
(https://patchwork.kernel.org/patch/11773221) at that time.
Now, that patch what I depended (11773221) had made modification and
it was Applied to
Hi,
Can you provide in the commit a description of what you are doing and why ?
Christophe
Le 03/11/2020 à 07:52, Wang Wensheng a écrit :
Signed-off-by: Wang Wensheng
---
drivers/watchdog/watchdog_core.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git
Hi Can,
On Mon, 2020-11-02 at 22:24 -0800, Can Guo wrote:
> The scsi_block_reqs_cnt increased in ufshcd_hold() is supposed to be
> decreased back in ufshcd_ungate_work() in a paired way. However, if
> specific ufshcd_hold/release sequences are met, it is possible that
> scsi_block_reqs_cnt is
On 2020-11-01 10:15 PM, Leon Romanovsky wrote:
From: Leon Romanovsky
Delete dead code.
Signed-off-by: Leon Romanovsky
---
drivers/infiniband/hw/mlx5/ib_rep.c | 31 +++--
drivers/infiniband/hw/mlx5/ib_rep.h | 31 -
2 files changed, 7
The field LPA of CP0_CONFIG3 register is read only for Loongson64, so the
write operations are meaningless, remove them.
Signed-off-by: Tiezhu Yang
---
v2: No changes
v3: No changes
arch/mips/include/asm/mach-loongson64/kernel-entry-init.h | 8
arch/mips/loongson64/numa.c
The field ELPA of CP0_PAGEGRAIN register is set at the beginning
of the kernel entry point in kernel-entry-init.h, no need to set
it again in numa.c, we can remove enable_lpa() and only print the
related information.
Signed-off-by: Tiezhu Yang
---
v2: No changes
v3: No changes
In play_dead function, the whole 64-bit PC mailbox was used as a indicator
to determine if the master core had written boot jump information.
However, after we introduced CSR mailsend, the hardware will not guarante
an atomic write for the 64-bit PC mailbox. Thus we have to use the lower
32-bit
Since decode_cpucfg() is only used for Loongson64, just move
it to loongson_regs.h to avoid the pollution of common code
with #ifdef CONFIG_CPU_LOONGSON64.
Signed-off-by: Tiezhu Yang
---
v2: No changes
v3: No changes
.../include/asm/mach-loongson64/loongson_regs.h| 24 +
Loongson 3A4000+ CPU has per-core Mail_Send register to send mail,
there is no need to maintain register address of each core and node,
just simply specify cpu number.
Signed-off-by: Lu Zeng
Signed-off-by: Jianmin Lv
Signed-off-by: Tiezhu Yang
---
v2: Add some callbacks in csr_ipi_probe()
v3:
In the current code, for example, core 1 sets Core[0, 1, 2, 3]_IPI_Enalbe
register and core 2, 3 do the same thing on the 1-way Loongson64 platform,
this is not necessary. Set IPI_Enable register per core by itself to avoid
duplicate operations and make the logic more clear.
Signed-off-by: Tiezhu
v2: Add some callbacks in csr_ipi probe() for patch #4
v3: Update the commit message and comment for patch #5
Tiezhu Yang (6):
MIPS: Loongson64: Do not write the read only field LPA of CP0_CONFIG3
MIPS: Loongson64: Set the field ELPA of CP0_PAGEGRAIN only once
MIPS: Loongson64: Set
>
> In ufs_mtk_unipro_set_lpm(), use specific unsigned values
> as the argument to invoke ufshcd_dme_set().
>
> In the same time, change the name of ufs_mtk_unipro_set_pm()
> to ufs_mtk_unipro_set_lpm() to align the naming convention
> in MediaTek UFS driver.
>
> Signed-off-by: Stanley Chu
Hi Khalil,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: b7cbaf59f62f8ab8f157698f9e31642bff525bd0
commit: b5b5b32081cd206baa6e58cca7f112d9723785d6 i2c: mlxbf: I2C SMBus driver
for Mellanox BlueField SoC
date: 5
Hi all,
Changes since 20201102:
The imx-mxs tree gained a build failure for which I reverted a commit.
The f2fs tree gained a build failure so I used the version from
next-20201102.
The amdgpu tree gained a conflict against Linus' tree.
The drm-misc tree gained a conflict against the amdgpu
Hi Can,
Except for below nit, otherwise looks good to me.
Reviewed-by: Stanley Chu
On Mon, 2020-11-02 at 22:24 -0800, Can Guo wrote:
> Use the uic_cmd->cmd_active as a flag to track the lifecycle of an UIC cmd.
> The flag is set before send the UIC cmd and cleared in IRQ handler. When a
> PMC
On Sat, Oct 31, 2020 at 4:01 AM syzbot
wrote:
>
> syzbot has found a reproducer for the following issue on:
>
> HEAD commit:4e78c578 Add linux-next specific files for 20201030
> git tree: linux-next
> console output: https://syzkaller.appspot.com/x/log.txt?x=158c179850
> kernel
Create binding file with YAML syntax for ASPEED FMC/SPI memory controller.
Signed-off-by: Chin-Ting Kuo
---
.../bindings/spi/aspeed,spi-aspeed.yaml | 66 +++
1 file changed, 66 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/aspeed,spi-aspeed.yaml
- Enable FMC CS1 and SPI2 CS0 SPI NOR flashes since both of
these two flashes are mounted on AST2600 EVB by default.
- Remove spi-max-frequency setting: 50MHz is usual SPI bus
frequency adopted on AST2600 EVB which has already been
configured in aspeed-g6.dtsi.
Signed-off-by: Chin-Ting Kuo
This patch series aims to porting ASPEED FMC/SPI memory controller
driver with spi-mem interface. Adjust device tree setting of SPI NOR
flash in order to fit real AST2600 EVB and new SPI memory controller
driver. Also, this patch has been verified on AST2600-A1 EVB.
v2: Fix sparse warnings
Add driver for ASPEED BMC FMC/SPI memory controller which
supports spi-mem interface.
There are three SPI memory controllers embedded in an ASPEED SoC.
Each of them can connect to two or three SPI NOR flashes. The first
SPI memory controller is also named as Firmware Memory Controller (FMC),
- Adjust the value format of "reg" property:
Instead of platform_get_resource(),
platform_get_resource_byname() function can be used
for more human-readable.
- Add "num-cs" property for FMC/SPI controller:
Each ASPEED FMC/SPI memory controller can support more
than a chip select. By
On Thu, 29 Oct 2020 at 10:56, Ard Biesheuvel wrote:
>
> On Mon, 26 Oct 2020 at 09:58, Ard Biesheuvel wrote:
> >
> > On Thu, 22 Oct 2020 at 19:59, Ard Biesheuvel wrote:
> > >
> > > On Thu, 22 Oct 2020 at 19:48, Russell King - ARM Linux admin
> > > wrote:
> > > >
> > > > On Thu, Oct 22, 2020 at
On 2020/11/3 0:55, Cong Wang wrote:
> On Fri, Oct 30, 2020 at 12:38 AM Yunsheng Lin wrote:
>>
>> On 2020/10/30 3:05, Cong Wang wrote:
>>>
>>> I do not see how and why it should. synchronize_net() is merely an optimized
>>> version of synchronize_rcu(), it should wait for RCU readers, softirqs are
Hi George,
I love your patch! Perhaps something to improve:
[auto build test WARNING on net-next/master]
url:
https://github.com/0day-ci/linux/commits/George-Cherian/Add-devlink-and-devlink-health-reporters-to/20201102-130844
base: https://git.kernel.org/pub/scm/linux/kernel/git/davem/net
On Tue, 2020-11-03 at 11:28 +0530, Dwaipayan Ray wrote:
> On Tue, Nov 3, 2020 at 11:18 AM Dwaipayan Ray wrote:
> >
> > checkpatch doesn't report warnings for many common mistakes
> > in emails. Some of which are trailing commas and incorrect
> > use of email comments.
> >
> > At the same time
在 2020/11/2 21:48, Rob Herring 写道:
On Thu, Oct 29, 2020 at 8:28 PM Qinglang Miao wrote:
Fix the missing clk_disable_unprepare() before return
from v3_pci_probe() in the error handling case.
Signed-off-by: Qinglang Miao
---
drivers/pci/controller/pci-v3-semi.c | 14 +++---
1
Fix the missing clk_disable_unprepare() before return
from v3_pci_probe() in the error handling case.
Moving the clock enable later to avoid some fixes.
Fixes: 6e0832fa432e (" PCI: Collect all native drivers under
drivers/pci/controller/")
Suggested-by: Rob Herring
Signed-off-by: Qinglang Miao
Add the missing platform_driver_unregister() before return
from serial_txx9_init in the error handling case when failed
to register serial_txx9_pci_driver with macro ENABLE_SERIAL_TXX9_PCI
defined.
Fixes: ab4382d27412 ("tty: move drivers/serial/ to drivers/tty/serial/")
Signed-off-by: Qinglang
On 11/3/2020 2:08 PM, Tao Xu wrote:
On 11/3/20 12:43 AM, Andy Lutomirski wrote:
On Sun, Nov 1, 2020 at 10:14 PM Tao Xu wrote:
...
+static int handle_notify(struct kvm_vcpu *vcpu)
+{
+ unsigned long exit_qualification =
vmcs_readl(EXIT_QUALIFICATION);
+
+ /*
+ *
allyesconfig
mips allyesconfig
mips allmodconfig
powerpc allyesconfig
powerpc allnoconfig
i386 randconfig-a004-20201102
i386 randconfig-a006-20201102
On Tue, 3 Nov 2020 at 02:17, Mark Brown wrote:
>
> On Mon, Nov 02, 2020 at 07:22:39PM +0800, Chunyan Zhang wrote:
> > From: Chunyan Zhang
>
> > Before transfer message, spi devices probably have been in runtime
> > suspended,
> > that would cause the kernel crash on some platforms once access
Hi George,
I love your patch! Perhaps something to improve:
[auto build test WARNING on net-next/master]
url:
https://github.com/0day-ci/linux/commits/George-Cherian/Add-devlink-and-devlink-health-reporters-to/20201102-130844
base: https://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Dear Jakub,
Am 03.11.20 um 01:19 schrieb Jakub Kicinski:
On Tue, 3 Nov 2020 00:13:07 +0100 Paul Menzel wrote:
From: Jeffrey Townsend
The ops field might no be defined, so add a check.
This change should be first, otherwise AFAIU if someone builds the
kernel in between the commits (e.g.
Hi Dexuan,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on tip/x86/core]
[also build test ERROR on tip/master v5.10-rc2 next-20201102]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base
On Tue, Nov 03, 2020 at 01:23:12AM +, Joakim Zhang wrote:
>
> > -Original Message-
> > From: Krzysztof Kozlowski
> > Sent: 2020年11月2日 16:29
> > To: Joakim Zhang
> > Cc: shawn...@kernel.org; s.ha...@pengutronix.de; feste...@gmail.com;
> > dl-linux-imx ; devicet...@vger.kernel.org;
>
Hard-coding resolution for st1633 device was wrong. Some of LCDs like
YTS700TLBC-02-100C has assembled Sitronix st1633 touchcontroller too. But
the resolution is not 320x480 as was hard-coded.
Add new function which reads correct resolution directly from register.
Signed-off-by: Andrej Valek
---
Hi Sylwester,
When I tested this patchset on Odroid-U3,
After setting 0 bps by interconnect[1][2],
the frequency of devfreq devs sustain the high frequency
according to the pm qos request.
So, I try to find the cause of this situation.
In result, it seems that interconnect exynos driver
updates
Hi Avri,
On Tue, 2020-11-03 at 07:12 +, Avri Altman wrote:
> >
> > In ufs_mtk_unipro_set_lpm(), use specific unsigned values
> > as the argument to invoke ufshcd_dme_set().
> >
> > In the same time, change the name of ufs_mtk_unipro_set_pm()
> > to ufs_mtk_unipro_set_lpm() to align the
When the PHY powers up, the diagnostics clock isn't enabled (bit 2 in
register PHY_CTRL_1 (0x0012)).
Also, the PHY is not in standby mode, so bit 13 in PHY_CTRL_3 (0x0017) is
always set at power up.
The standby mode and the diagnostics clock are both meant to be for the
cable diagnostics feature
The ADIN1300/ADIN1200 support cable diagnostics using TDR.
The cable fault detection is automatically run on all four pairs looking at
all combinations of pair faults by first putting the PHY in standby (clear
the LINK_EN bit, PHY_CTRL_3 register, Address 0x0017) and then enabling the
diagnostic
Hi Andreas,
Le 30/10/2020 à 14:11, Andreas Schwab a écrit :
#
# Automatically generated file; DO NOT EDIT.
# Linux/powerpc 5.10.0-rc1 Kernel Configuration
#
I tried again on QEMU with both pmac32_defconfig and your config, and it boots.
I really can't understand what the problem is, because
Am 03.11.20 um 07:53 schrieb Greg KH:
On Mon, Nov 02, 2020 at 09:06:21PM +0100, Christian König wrote:
Am 02.11.20 um 20:43 schrieb Alex Deucher:
On Mon, Nov 2, 2020 at 1:42 PM Deepak R Varma wrote:
Initializing global variable to 0 or NULL is not necessary and should
be avoided. Issue
Fix the missing clk_disable_unprepare() before return
from bcm63xx_hsspi_resume in the error handling case when
fails to prepare and enable bs->pll_clk.
Fixes: 0fd85869c2a9 ("spi/bcm63xx-hsspi: keep pll clk enabled")
Signed-off-by: Qinglang Miao
---
drivers/spi/spi-bcm63xx-hsspi.c | 4 +++-
1
Fix the missing clk_disable_unprepare() before return
from mt7621_spi_probe in the error handling case.
Fixes: cbd66c626e16 ("spi: mt7621: Move SPI driver out of staging")
Signed-off-by: Qinglang Miao
---
drivers/spi/spi-mt7621.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
Fix the missing clk_disable_unprepare() of info->pclk
before return from rockchip_saradc_resume in the error
handling case when fails to prepare and enable info->clk.
Fixes: 44d6f2ef94f9 ("iio: adc: add driver for Rockchip saradc")
Signed-off-by: Qinglang Miao
---
On Tue, Nov 03, 2020 at 03:33:41PM +0800, Qinglang Miao wrote:
> Add the missing platform_driver_unregister() before return
> from serial_txx9_init in the error handling case when failed
> to register serial_txx9_pci_driver with macro ENABLE_SERIAL_TXX9_PCI
> defined.
>
> Fixes: ab4382d27412
> -Original Message-
> From: Krzysztof Kozlowski
> Sent: 2020年11月3日 15:39
> To: Joakim Zhang
> Cc: shawn...@kernel.org; s.ha...@pengutronix.de; feste...@gmail.com;
> dl-linux-imx ; devicet...@vger.kernel.org;
> linux-arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org;
>
Hi Rob, Bjorn, Kalle,
On Thu, 29 Oct 2020 at 19:10, Bjorn Andersson
wrote:
>
> On Tue 29 Sep 14:08 CDT 2020, Rob Herring wrote:
>
> > On Fri, Sep 25, 2020 at 11:59:41PM +0530, Amit Pundir wrote:
> > > There are firmware versions which do not support host capability
> > > QMI request. We suspect
On Mon, Nov 02, 2020 at 09:48:25PM +0100, Christian König wrote:
> Am 03.11.20 um 07:53 schrieb Greg KH:
> > On Mon, Nov 02, 2020 at 09:06:21PM +0100, Christian König wrote:
> > > Am 02.11.20 um 20:43 schrieb Alex Deucher:
> > > > On Mon, Nov 2, 2020 at 1:42 PM Deepak R Varma
> > > > wrote:
> >
Hi Diana,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: b7cbaf59f62f8ab8f157698f9e31642bff525bd0
commit: cc0ee20bd96971c10eba9a83ecf1c0733078a083 vfio/fsl-mc: trigger an
interrupt via eventfd
date: 3 weeks ago
Am Dienstag, 3. November 2020, 07:35:29 CET schrieb Greg Kroah-Hartman:
> On Mon, Nov 02, 2020 at 10:34:08PM +0100, Hans-Peter Jansen wrote:
>
> Ah, that kind of makes sense, I saw odd things with these patches that I
> couldn't figure out.
>
> So, is there a symlink that I need to add/fix to
Hi
Thanks, the code looks good already. There just are a few nits below.
Am 03.11.20 um 03:10 schrieb Tian Tao:
> Add new api devm_drm_irq_install() to register interrupts,
> no need to call drm_irq_uninstall() when the drm module is removed.
>
> v2:
> fixed the wrong parameter.
>
>
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8 supported. Data register used to support the
From: Ramuthevar Vadivel Murugan
This patch adds the new IP of Nand Flash Controller(NFC) support
on Intel's Lightning Mountain(LGM) SoC.
DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8
From: Ramuthevar Vadivel Murugan
Add YAML file for dt-bindings to support NAND Flash Controller
on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
Reviewed-by: Rob Herring
---
.../devicetree/bindings/mtd/intel,lgm-nand.yaml| 99 ++
1 file
+Alan
Hi Jon Mason, Allen Hubbe, Dave Jiang,
On 20/10/20 6:48 pm, Lorenzo Pieralisi wrote:
> On Tue, Oct 20, 2020 at 01:45:45PM +0530, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> On 05/10/20 11:27 am, Kishon Vijay Abraham I wrote:
>>> Hi Jon Mason, Allen Hubbe, Dave Jiang,
>>>
>>> On 30/09/20
On 10/30/2020 04:13 AM, Christopher Unkel wrote:
Writes of the md superblock are aligned to the logical blocks of the
containing device, but no attempt is made to align them to physical
block boundaries. This means that on a "512e" device (4k physical, 512
logical) every superblock update
In check_iommu_entries(), p->detect depends on q->detect, so q->detect
should be called before p->detect.
Signed-off-by: Zhenzhong Duan
---
arch/x86/kernel/pci-iommu_table.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/pci-iommu_table.c
Hi Stephen,
On Mon, 2 Nov 2020 12:46:37 +1100
Stephen Rothwell wrote:
> Hi all,
>
> After merging the imx-drm tree, today's linux-next build (arm
> multi_v7_defconfig) produced this warning:
>
> drivers/gpu/drm/panfrost/panfrost_job.c: In function 'panfrost_job_close':
>
The ASUS X532EQ laptop contains AzureWave AW-CB434NF module with an
associated MT7615E BT chip using a USB ID of 13d3:3560.
T: Bus=03 Lev=01 Prnt=01 Port=09 Cnt=02 Dev#= 3 Spd=480 MxCh= 0
D: Ver= 2.10 Cls=ef(misc ) Sub=02 Prot=01 MxPS=64 #Cfgs= 1
P: Vendor=13d3 ProdID=3560 Rev= 1.00
S:
On Sat, Oct 31, 2020 at 9:27 AM Michael Kerrisk (man-pages)
wrote:
>
> Hello Sargun,
>
> Thanks for your reply.
>
> On 10/30/20 9:27 PM, Sargun Dhillon wrote:
> > On Thu, Oct 29, 2020 at 09:37:21PM +0100, Michael Kerrisk (man-pages)
> > wrote:
>
> [...]
>
> >>> I think I commented in another
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