Sorry folks - I picked you as recipients just because I saw
your name in few recent commits to power-supply (well,
obviously Sebastian would have been picked anyways). I assumed
you could have something to say in here. Please let me know if you
wish to be dropped from CC if this gets any further.
The power-supply core supports concept of OCV (Open Circuit Voltage) =>
SOC (State Of Charge) conversion tables. Usually these tables are used
to estimate SOC based on OCV. Some systems use so called "Zero Adjust"
where at the near end-of-battery condition the SOC from coulomb counter
is used to
Hi Andrew, Florian,
> On Wed, Nov 25, 2020 at 05:30:04PM -0800, Florian Fainelli wrote:
> >
> >
> > On 11/25/2020 4:00 PM, Andrew Lunn wrote:
> > > On Thu, Nov 26, 2020 at 12:24:55AM +0100, Lukasz Majewski wrote:
> > >> This is the first attempt to add support for L2 switch available
> > >>
Am 24.11.20 um 10:36 schrieb Christoph Hellwig:
On Tue, Nov 24, 2020 at 10:31:33AM +0100, Thorsten Leemhuis wrote:
Am 24.11.20 um 10:18 schrieb Christoph Hellwig:
On Tue, Nov 24, 2020 at 09:00:01AM +0100, Thorsten Leemhuis wrote:
For context: Patch 2 of this series adds a text to the
On Thu, Nov 26, 2020 at 12:18:12AM +, Sean Christopherson wrote:
> The SEAM module needs to be loaded during early boot, it can't be
> deferred to a module, at least not without a lot more blood, sweat,
> and tears.
Are you also planning to support builtin seam or only thru initrd loading?
Add generic 'sw gauge' helper for performing iterative SOC estimation
and coulomb counter correction for devices with a (drifting) coulomb
counter. This should allow few charger/fuel-gauge drivers to use generic
loop instead of implementing their own.
Charger/fuel-gauge drivers can register
On Thu, 26 Nov 2020 at 10:07, Peter Zijlstra wrote:
>
> On Wed, Nov 25, 2020 at 05:28:36PM +0100, Vincent Guittot wrote:
> > On Wed, 18 Nov 2020 at 00:20, Joel Fernandes (Google)
>
> > > +#ifdef CONFIG_SMP
> > > +static struct task_struct *pick_task_fair(struct rq *rq)
> > > +{
> > > +
RSC controllers may be in 'HW solver' state, where they could be in
autonomous mode executing low power modes for their hardware and as
such are not available for sending active votes.
This series adds changes to support the same in rpmh driver by disallowing
active requests when in solver mode
Let RPMH clients call rpmh_write_sleep_and_wake() to immediately
write cached sleep and wake data to the TCSes.
Signed-off-by: Maulik Shah
---
drivers/soc/qcom/rpmh.c | 16
include/soc/qcom/rpmh.h | 5 +
2 files changed, 21 insertions(+)
diff --git
lockdep_assert_irqs_disabled() was added to check rpmh_flush()
can only be invoked when irqs are disabled, this is true for
APPS RSC as the last CPU going to deepest low power mode is
writing sleep and wake TCSes.
However for RSCs that support solver mode, drivers can invoke
From: Lina Iyer
Controllers may be in 'solver' state, where they could be in autonomous
mode executing low power modes for their hardware and as such are not
available for sending active votes. Device driver may notify RPMH
that the controller is in solver mode and when in such mode, disallow
On Thu, 26 Nov 2020, Ezequiel Garcia
wrote:
On Thu, 2020-11-26 at 05:30 +0200, Jarkko Sakkinen wrote:
On Tue, 2020-11-24 at 10:14 -0300, Ezequiel Garcia wrote:
> Hi Jarkko, Thanks for your review. On Tue, 2020-11-24 at
> 00:06 +0200, Jarkko Sakkinen wrote:
> > On Fri, Nov 20, 2020 at
Hi All,
This patch set enables to connect ov7725 sensors on iWave-RZ/G1H Qseven
board.
This patch is based on top of [1].
[1] https://git.kernel.org/pub/scm/linux/kernel/git/geert/
renesas-devel.git/log/?h=renesas-arm-dt-for-v5.11
Changes for v3:
* Added support to mix and match the
The 8-bit ov7725 sensors can also be connected to the camera daughter
board.
This patch creates a separate dtsi file for ov7725 sensors and is included
in r8a7742-iwg21d-q7-dbcm-ca.dts. The user can set VINx_SENSOR depending
on the cameras connected.
Signed-off-by: Lad Prabhakar
Reviewed-by:
This patch supports to store chksum value with compressed
data, and verify the integrality of compressed data while
reading the data.
The feature can be enabled through specifying mount option
'compress_chksum'.
Signed-off-by: Chao Yu
---
v3:
- remove incorrect duplicated definition in
The camera daughter board can also be connected to 8-bit ov7725 sensors,
so in preparation for configurable option to choose depending on the
camera's connected separate out ov5640 nodes in a dtsi file.
Signed-off-by: Lad Prabhakar
Reviewed-by: Biju Das
---
On Tue, 24 Nov 2020 16:40:02 -0500
Tony Krowiak wrote:
A nit: for all other patches the title prefix is s390/vfio-ap, here you
have 390/vfio-ap.
On Do, 2020-11-05 at 16:01 +0200, Laurentiu Palcu wrote:
> Hi,
>
> This patchset fixes 90/270 rotations for Vivante tiled and super-tiled
> formats and a Coccinelle warning.
Thanks, looks good. I've pushed them into drm-misc-next.
Regards,
Lucas
Add support for mcan bit timing and control mode according to bosch mcan IP
version 3.3.0
The mcan version read from the Core Release field of CREL register would be
33. Accordingly the properties are to be set for mcan v3.3.0
Signed-off-by: Pankaj Sharma
---
Depends on:
Commit a408e4a86b36b ("ima: open a new file instance if no read
permissions") already introduced a second open to measure a file when the
original file descriptor does not allow it. However, it didn't remove the
existing method of changing the mode of the original file descriptor, which
is still
On Do, 2020-11-05 at 16:50 +0200, Laurentiu Palcu wrote:
> This patch adds support for using NN interpolation scaling by setting the
> SCALING_FILTER plane property to 1. Otherwise, the default method is used.
>
> Signed-off-by: Laurentiu Palcu
Reviewed and pushed into drm-misc-next.
Regards,
Hi,
On 11/25/20 6:54 PM, Justin Ernst wrote:
> Introduce a new platform driver to gather topology information from UV systems
> and expose that information via a sysfs interface at /sys/firmware/sgi_uv/.
>
> This is version 3 with these changes since version 2:
>
> * Export sn_coherency_id to
Support to use address space of inner inode to cache compressed block,
in order to improve cache hit ratio of random read.
Signed-off-by: Chao Yu
---
v2:
- don't assign a_ops with f2fs_compress_aops if F2FS_FS_COMPRESSION is not
defined.
- don't remove sbi variable in f2fs_do_decompress_pages().
On Wed, Nov 25, 2020 at 10:40:20PM -0500, Andrea Arcangeli wrote:
> On Wed, Nov 25, 2020 at 12:34:41AM -0500, Andrea Arcangeli wrote:
>
> Summary: both old code (missing PG_reserved) and the current code
> (leaving the page struct uninitialized and with wrong nodeid/nid) look
> wrong.
>
>
Hi,
On 11/25/20 6:29 PM, Mike Travis wrote:
>
> Duplicate the current UV procfs leaves to the uv_sysfs driver so they show
> up under /sys/firmware/sgi_uv. Show a 'deprecated' warning message if
> any of the old /proc/sgi_uv leaves are used.
>
> These patches depend on the prior set sent by
On 2020/11/26 17:50, Christoph Hellwig wrote:
> On Thu, Nov 26, 2020 at 05:48:25PM +0800, Yicong Yang wrote:
>> Sorry for not describing the issues I met correctly in the commit message.
>> Actually we're using inline function vfs_stat() for getting the
>> attributes, which calls vfs_fstatat():
>
On the i.MX8MM Beacon SOM, there is an RTC chip which is fed power
from the baseboard during power off. The SNVS RTC integrated into
the SoC is not fed power. Depending on the order the modules are
loaded, this can be a problem if the external RTC isn't rtc0.
Make the alias for rtc0 point to
Luis Chamberlain writes:
> I'd like to propose we discuss the possibility of taking kconfig and
> making it a git subtree under the Linux kernel. This would allow
> other projects outside of the Linux kernel to be able to update their
> own copy / fork of kconfig in a jiffie *very* easily.
I am
The PMIC throws an errors because the clock isn't assigned to it.
Fix this by assigning the clocks info.
Signed-off-by: Adam Ford
---
V2: Remove fixes tag
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
b/arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
index
Hi,
On 11/25/20 6:29 PM, Mike Travis wrote:
> Add "deprecated" message to any access to old /proc/sgi_uv/* leaves.
>
> Signed-off-by: Mike Travis
> Reviewed-by: Steve Wahl
> ---
> arch/x86/kernel/apic/x2apic_uv_x.c | 26 +-
> 1 file changed, 25 insertions(+), 1
On Wed, Nov 25, 2020 at 12:59:58PM -0500, Andrea Arcangeli wrote:
> On Wed, Nov 25, 2020 at 10:30:53AM +, Mel Gorman wrote:
> > On Tue, Nov 24, 2020 at 03:56:22PM -0500, Andrea Arcangeli wrote:
> > > Hello,
> > >
> > > On Tue, Nov 24, 2020 at 01:32:05PM +, Mel Gorman wrote:
> > > > I
On Fri, Nov 20, 2020 at 01:20:04PM +0100, Peter Zijlstra wrote:
> > > I can help with powerpc 8xx. It is a 32 bits powerpc. The PGD has 1024
> > > entries, that means each entry maps 4M.
> > >
> > > Page sizes are 4k, 16k, 512k and 8M.
> > >
> > > For the 8M pages we use hugepd with a single
Hi Marc,
Right, I did consider this.
FWIW, I've pushed my hack branch[1]
Did you miss that reference?
out with a couple of patches
for you to try (the top 3 patches). They allow platform-MSI domains
created by devices (mbigen, ICU) to be advertised as shared between
devices, so that the
On Tue 24-11-20 11:28:14, Borislav Petkov wrote:
> On Tue, Nov 24, 2020 at 11:20:33AM +0100, Jan Kara wrote:
> > On Tue 24-11-20 09:45:07, Borislav Petkov wrote:
> > > On Mon, Nov 23, 2020 at 11:46:51PM +0100, Paweł Jasiak wrote:
> > > > On 23/11/20, Jan Kara wrote:
> > > > > OK, with a help of
On 11/26/20 5:51 AM, Pankaj Sharma wrote:
> Add support for mcan bit timing and control mode according to bosch mcan IP
> version 3.3.0
> The mcan version read from the Core Release field of CREL register would be
> 33. Accordingly the properties are to be set for mcan v3.3.0
BTW: do you have the
On Thu 26-11-20 01:01:30, Naresh Kamboju wrote:
> On Tue, 24 Nov 2020 at 15:50, Jan Kara wrote:
> >
> > On Tue 24-11-20 09:45:07, Borislav Petkov wrote:
> > > On Mon, Nov 23, 2020 at 11:46:51PM +0100, Paweł Jasiak wrote:
> > > > On 23/11/20, Jan Kara wrote:
> > > > > OK, with a help of Boris
On Wed, Nov 25, 2020 at 8:45 AM Yuya Hamamachi
wrote:
> Document the support for R-Car PCIe EP on R8A7795 SoC device.
>
> Signed-off-by: Yuya Hamamachi
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond
On Wed, Nov 25, 2020 at 03:42:37PM +0100, David Hildenbrand wrote:
> > Now the loop is for interesection of [zone_start_pfn, zone_end_pfn] with
> > memblock.memory and for x86 reserved ranges are not in memblock.memory,
> > so the memmap for them remains semi-initialized.
>
> As far as I
On 11/26/20 5:51 AM, Pankaj Sharma wrote:
> Add support for mcan bit timing and control mode according to bosch mcan IP
> version 3.3.0
> The mcan version read from the Core Release field of CREL register would be
> 33. Accordingly the properties are to be set for mcan v3.3.0
>
> Signed-off-by:
On Wed, 16 Sep 2020, Lyude Paul wrote:
> Since we're about to start adding support for Intel's magic HDR
> backlight interface over DPCD, we need to ensure we're properly
> programming this field so that Intel specific sink services are exposed.
> Otherwise, 0x300-0x3ff will just read zeroes.
>
>
On Thu, Nov 26, 2020 at 11:48:27AM +0100, Jan Kara wrote:
> I'd prefer that as well but if nobody pops up, I'll just push this to my
> tree next week and will see what breaks :)
Right. You could send a proper patch and Cc the usual suspects as now it
is buried in some thread which people might
On Thu, 26 Nov 2020 17:06:03 +0800, Lu Baolu wrote:
> Below warnings are fixed:
>
> Documentation/ABI/testing/sysfs-kernel-iommu_groups:38: WARNING: Unexpected
> indentation.
> Documentation/ABI/testing/sysfs-kernel-iommu_groups:38: WARNING: Block quote
> ends without a blank line; unexpected
On Wed, 16 Sep 2020, Lyude Paul wrote:
> Since we're going to need to add a set of lower-level PWM backlight
> control hooks to be shared by normal backlight controls and HDR
> backlight controls in SDR mode, let's add a prefix to the external PWM
> backlight functions so that the difference
Hi Jerry,
On 2020/11/26 4:27, Jerry Snitselaar wrote:
Is there a reason we check the requested guest address width against the
iommu's mgaw, instead of the agaw that we already know for the iommu?
I've run into a case with a new system where the mgaw reported is 57,
but if they set PAE to 46
On Tue, Nov 10, 2020 at 08:21:48AM -0800, Yu-cheng Yu wrote:
> diff --git a/arch/x86/include/asm/msr-index.h
> b/arch/x86/include/asm/msr-index.h
> index 972a34d93505..6f05ab2a1fa4 100644
> --- a/arch/x86/include/asm/msr-index.h
> +++ b/arch/x86/include/asm/msr-index.h
> @@ -922,4 +922,24 @@
>
On Tue 2020-11-24 13:47 +, Aaron Tomlin wrote:
> On Tue, 24 Nov 2020 at 13:36, Michal Hocko wrote:
> > This like any other user visible interface would be a much easier sell
> > if there was a clear usecase to justify it. I do not see anything
> > controversial about exporting such a value
On 11/26/20 4:12 AM, Alex Shi wrote:
在 2020/11/25 下午11:38, Vlastimil Babka 写道:
On 11/20/20 9:27 AM, Alex Shi wrote:
The current relock logical will change lru_lock when found a new
lruvec, so if 2 memcgs are reading file or alloc page at same time,
they could hold the lru_lock alternately,
Hi John,
On 2020-11-26 10:47, John Garry wrote:
Hi Marc,
Right, I did consider this.
FWIW, I've pushed my hack branch[1]
Did you miss that reference?
I did:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/hacks
out with a couple of patches
for you
The commit 3966c3feca3f ("x86/perf/amd: Remove need to check "running"
bit in NMI handler") introduced this. It seems x86_pmu_stop can be
called recursively (like when it losts some samples) like below:
x86_pmu_stop
intel_pmu_disable_event (x86_pmu_disable)
intel_pmu_pebs_disable
From: Stephane Eranian
The kernel cannot disambiguate when 2+ PEBS counters overflow at the
same time. This is what the comment for this code suggests. However,
I see the comparison is done with the unfiltered p->status which is a
copy of IA32_PERF_GLOBAL_STATUS at the time of the sample. This
On 2020/11/26 下午4:56, kernel test robot wrote:
>
> Greeting,
>
> FYI, we noticed the following commit (built with gcc-9):
>
> commit: ccb0edc68b690d0a62e9377ab509eb2f7cb610d3 ("btrfs: stop running all
> delayed refs during snapshot")
>
Hi Miles,
Could you please cc me and Andrey Konovalov on future versions of this
patch (if any)?
On Mon, 23 Nov 2020 at 08:47, Miles Chen wrote:
> When we try to visit the pagemap of a tagged userspace pointer, we find
> that the start_vaddr is not correct because of the tag.
> To fix it, we
On 26.11.20 11:48, Marc Kleine-Budde wrote:
On 11/26/20 5:51 AM, Pankaj Sharma wrote:
Add support for mcan bit timing and control mode according to bosch mcan IP
version 3.3.0
The mcan version read from the Core Release field of CREL register would be
33. Accordingly the properties are to be
On 11/26/20 8:24 AM, Yu Zhao wrote:
On Thu, Nov 26, 2020 at 02:39:03PM +0800, Alex Shi wrote:
在 2020/11/26 下午12:52, Yu Zhao 写道:
>> */
>> void __pagevec_lru_add(struct pagevec *pvec)
>> {
>> - int i;
>> - struct lruvec *lruvec = NULL;
>> + int i, nr_lruvec;
>>
On 26/11/2020 09:28, Marc Zyngier wrote:
On 2020-11-25 17:20, John Garry wrote:
Add a function to tear down the work which was done in platform_get_irq()
for when the device driver is done with the irq.
For ACPI companion devices the irq resource is set as disabled, as this
resource is
Hi Olivier
On 11/20/20 10:15 AM, Olivier Moysan wrote:
Add STM32 SPDIFRX and DFSDM audio support to multi_v7_defconfig
Change in v2:
- Add targeted SoC in commit message for DFSDM config
Olivier Moysan (2):
ARM: multi_v7_defconfig: enable spdifrx support
ARM: multi_v7_defconfig: enable
On Thu, Nov 26, 2020 at 02:57:11PM +0530, Vinod Koul wrote:
> This adds the power domains found in SDX55 SoC. Downstream code tells me
> that we have 3 power domains so add them
>
> Signed-off-by: Vinod Koul
Acked-by: Manivannan Sadhasivam
Thanks,
Mani
> ---
> drivers/soc/qcom/rpmhpd.c | 13
-with-carveout/20201126-163426
base:9d3e48f20e1159a7bb2ff5de96594b6375157fe0
config: arm-defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin
On Thu, Nov 26, 2020 at 02:57:10PM +0530, Vinod Koul wrote:
> Add RPM power domain bindings for the SDX55 SoC
>
> Signed-off-by: Vinod Koul
Acked-by: Manivannan Sadhasivam
Thanks,
Mani
> ---
> Documentation/devicetree/bindings/power/qcom,rpmpd.yaml | 1 +
>
Hi Marc,
I did:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/hacks
ok, I'll have a look
You still should be able to enable my favorite
CONFIG_DEBUG_TEST_DRIVER_REMOVE=y, while the distro still boot. But
I'll just test if you want.
Ah! Let me try
On Thu, Nov 26, 2020 at 12:55:54AM +0530, Vidya Sagar wrote:
> PCIe controller in Tegra194 requires the "dbi" region base address to be
> programmed in one of the application logic registers to enable CPU access
> to the "dbi" region. But, commit a0fd361db8e5 ("PCI: dwc: Move "dbi",
> "dbi2", and
ntroller/dwc/pcie-tegra194.c | 19 ++++++-
> 1 file changed, 10 insertions(+), 9 deletions(-)
This, together with your other patch fixes Tegra194 PCI on top of
next-20201126 for me, so:
Tested-by: Thierry Reding
Acked-by: Thierry Reding
signature.asc
Description: PGP signature
s, but then I noticed that PCI is causing a
> > crash on
> > linux-next (as of fairly recently).
> I root caused the crash issue to the following commit
> a0fd361db8e5 ("PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup
> into common code&
On Mon, Nov 09, 2020 at 10:49:32PM +0530, Vidya Sagar wrote:
> If the absence of CLKREQ# signal is indicated by the absence of
> "supports-clkreq" in the device-tree node, current driver is disabling
> the advertisement of ASPM-L1 Sub-States *before* the ASPM-L1 Sub-States
> offset is correctly
On Mon, Nov 09, 2020 at 10:49:33PM +0530, Vidya Sagar wrote:
> As specified in the comment for pci_remap_cfgspace() define in
> arch/arm64/include/asm/io.h file, PCIe configuration space should be
> mapped as nGnRnE. Hence changing to dev_pci_remap_cfgspace() from
> devm_ioremap_resource() for
Hi Thomas.
On 11/25/20 11:32 AM, Thomas Gleixner wrote:
[...]
>>> Here we propose to use '__NR_time' to invoke syscall directly that makes
>>> test all get real seconds via ktime_get_real_second.
>
> This is a general problem and not really just for this particular test
> case.
>
> Due to the
On Mon, Nov 09, 2020 at 10:49:34PM +0530, Vidya Sagar wrote:
> Set the DesignWare IP version for Tegra194 to 0x490A. This would be used
> by the DesigWare sub-system to do any version specific configuration
> (Ex:- TD bit programming for ECRC).
>
> Signed-off-by: Vidya Sagar
> ---
> V4:
> * None
On Mon, Nov 09, 2020 at 10:49:37PM +0530, Vidya Sagar wrote:
> PCIe cards like Marvell SATA controller and some of the Samsung NVMe
> drives don't support taking the link to L2 state. When the link doesn't
> go to L2 state, Tegra194 requires the LTSSM to be disabled to allow PHY
> to start the
On Mon, Nov 09, 2020 at 10:49:35PM +0530, Vidya Sagar wrote:
> Currently the driver checks for error value of different APIs during the
> uninitialization sequence. It just returns from there if there is any error
> observed for one of those calls. Comparatively it is better to continue the
>
On Mon, Nov 09, 2020 at 10:49:36PM +0530, Vidya Sagar wrote:
> The return value of tegra_pcie_init_controller() must be checked before
> PCIe link up check and registering debugfs entries subsequently as it
> doesn't make sense to do these when the controller initialization itself
> has failed.
>
On 26/11/2020 01:35, Joakim Zhang wrote:
@Joakim, can you resend 3/4? And I think that we should keep the explicit
support for "fsl,imx8m-ddr-pmu" as a good practice in imx_ddr_pmu_dt_ids[],
while also adding the soc-specific sub compat string support
Yes, thanks John. I will follow up.
OK,
Adds support for another Corsair PSUs series: AX760i, AX860i, AX1200i,
AX1500i and AX1600i. The first 3 power supplies are supported through
the Corsair Link USB Dongle which is some kind of USB/Serial/TTL
converter especially made for the COM ports of these power supplies.
There are 3 known
> -Original Message-
> From: Greg KH
> Sent: Thursday, November 26, 2020 1:35 PM
> To: Bard Liao
> Cc: alsa-de...@alsa-project.org; vk...@kernel.org; vinod.k...@linaro.org;
> linux-kernel@vger.kernel.org; ti...@suse.de; broo...@kernel.org;
> j...@cadence.com;
On Wed, Nov 25, 2020 at 8:43 AM Yuya Hamamachi
wrote:
> Add PCIe EP nodes for R8A77951 SoC dtsi.
>
> Signed-off-by: Yuya Hamamachi
Reviewed-by: Geert Uytterhoeven
i.e. will queue in renesas-devel for v5.11.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's
On (20/11/25 23:19), Ricardo Ribalda wrote:
[..]
> + if (uvc_urb->pages)
> + dma_sync_sgtable_for_device(stream_to_dmadev(uvc_urb->stream),
> + _urb->sgt, DMA_FROM_DEVICE);
[..]
> + if (uvc_urb->pages)
> +
Any record with a trailing newline (LOG_NEWLINE flag) cannot
be continued because the newline has been stripped and will
not be visible if the message is appended. This was already
handled correctly when committing in log_output() but was
not handled correctly when committing in log_store().
On Wed, Nov 25, 2020 at 02:24:19PM -0500, Jim Quinlan wrote:
> + for (i = 0; i < PCIE_REGULATORS_MAX; i++) {
> + ep_reg = devm_regulator_get_optional(dev,
> ep_regulator_names[i]);
> + if (IS_ERR(ep_reg)) {
Does PCI allow supplies to be physically absent? If not
From: Colin Ian King
Currently pointer nvm is being dereferenced before it is being null
checked. Fix this by moving the assignments of pointers client and
ov2740 so that are after the null check hence avoiding any potential
null pointer dereferences on pointer nvm.
Fixes: 5e6fd339b68d
On Thu, Nov 26, 2020 at 02:36:42PM +0800, Kai-Heng Feng wrote:
> >>
> >> What about plugging ethernet cable and using WoL after system is suspended?
> >> Commit "e1000e: Exclude device from suspend direct complete optimization"
> >> was to address that scenario.
[cut]
>
> I don't think this is
Hi Shakeel,
Thanks for the review! :D
On Wed, 25 Nov 2020 07:29:10 -0800 Shakeel Butt wrote:
> On Tue, Oct 20, 2020 at 2:01 AM SeongJae Park wrote:
> >
> > From: SeongJae Park
> >
> > DAMON is a data access monitoring framework for the Linux kernel. The
> > core mechanisms of DAMON make it
From: Gene Chen
Add flash registration with undefined CONFIG_LEDS_CLASS_FLASH
Signed-off-by: Gene Chen
---
include/linux/led-class-flash.h | 42 -
1 file changed, 33 insertions(+), 9 deletions(-)
diff --git a/include/linux/led-class-flash.h
From: Gene Chen
Fix multicolor registration no-ops by return 0
Signed-off-by: Gene Chen
---
include/linux/led-class-multicolor.h | 42 +---
1 file changed, 15 insertions(+), 27 deletions(-)
diff --git a/include/linux/led-class-multicolor.h
From: Gene Chen
Increase LED_COLOR_ID maximum size for LED_COLOR_ID_RGB
Signed-off-by: Gene Chen
---
Documentation/devicetree/bindings/leds/common.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/leds/common.yaml
From: Gene Chen
Add bindings document for LED support on MT6360 PMIC
Signed-off-by: Gene Chen
---
.../devicetree/bindings/leds/leds-mt6360.yaml | 164 +
1 file changed, 164 insertions(+)
create mode 100644 Documentation/devicetree/bindings/leds/leds-mt6360.yaml
diff
From: Gene Chen
Add MT6360 LED driver include 2-channel Flash LED with torch/strobe mode,
3-channel RGB LED support Register/Flash/Breath Mode, and 1-channel for
moonlight LED.
Signed-off-by: Gene Chen
Acked-by: Jacek Anaszewski
---
drivers/leds/Kconfig | 13 +
drivers/leds/Makefile
From: Gene Chen
Add LED_FUNCTION_MOONLIGHT definitions
Signed-off-by: Gene Chen
Acked-by: Jacek Anaszewski
---
include/dt-bindings/leds/common.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/leds/common.h
b/include/dt-bindings/leds/common.h
index 52b619d..843e65d
This patch series add MT6360 LED support contains driver and binding document
Gene Chen (6)
leds: flash: Add flash registration with undefined CONFIG_LEDS_CLASS_FLASH
leds: flash: Fix multicolor registration no-ops by return 0
dt-bindings: leds: Add LED_COLOR_ID_MOONLIGHT definitions
om constant value (f becomes )
Signed-off-by: Lukas Bulwahn
---
applies cleanly on current master and next-20201126
Akinobu, Joerg, please ack.
Boris, Ingo, Thomas, please pick this minor non-urgent clean-up patch.
arch/x86/kernel/cpu/common.c | 24
arch/x86/ke
On Thu, 26 Nov 2020, Dave Airlie wrote:
> On Thu, 17 Sept 2020 at 03:19, Lyude Paul wrote:
>>
>> Currently, every different type of backlight hook that i915 supports is
>> pretty straight forward - you have a backlight, probably through PWM
>> (but maybe DPCD), with a single set of
On Mon, Nov 23, 2020 at 05:19:06PM +0800, Qing Zhang wrote:
> +static struct platform_device loongson_spi_device = {
> + .name = "loongson-spi",
> + .id = 0,
> + .num_resources = ARRAY_SIZE(loongson_spi_resources),
> + .resource = loongson_spi_resources,
>
On Tue, Nov 24, 2020 at 05:48:04PM -0800, Badhri Jagan Sridharan wrote:
> TD.4.7.3. Try SNK DRP Connect Try.SRC DRP fails. The compliance
> tester mimics being a Try.SRC USB-C port.
> The failure is due to TCPM exiting SNK_TRY_WAIT_DEBOUNCE_CHECK_VBUS
> when VBUS is not present eventhough when
Use the devm_drm_dev_alloc provided by the drm framework to alloc
a struct hibmc_drm_private.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c | 2 +-
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 51 +++-
Add new api devm_drm_irq_install() to register interrupts,
no need to call drm_irq_uninstall() when the drm module is removed.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/drm_irq.c | 34 ++
include/drm/drm_irq.h | 2 +-
2 files changed, 35 insertions(+), 1
Use devm_drm_irq_install to register interrupts so that
drm_irq_uninstall is not called when hibmc is removed.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git
On Tue, Nov 24, 2020 at 06:07:03PM -0800, Badhri Jagan Sridharan wrote:
> During PR_SWAP sequence, when TCPM is waiting in PR_SWAP_SNK_SRC_SOURCE_ON
> for the vbus source to ramp up, TCPM would prematurely exit
> PR_SWAP_SNK_SRC_SOURCE_ON and transition to SNK_UNATTACHED state when a
> vbus off
patch #1 is code refactorings to use devm_drm_dev_alloc and
devm_drm_irq_install.
patch #2 add the new api to install irq, patch #3 is hibmc driver uses
the newly added api to register interrupts.
Tian Tao (3):
drm/hisilicon: Code refactoring for hibmc_drm_drv
drm/irq: Add the new api to
Hi Christophe,
On Sat, Nov 21, 2020 at 07:13:59AM +, Christophe JAILLET wrote:
> 'pci_set_dma_mask()' + 'pci_set_consistent_dma_mask()' can be replaced by
> an equivalent 'dma_set_mask_and_coherent()' which is much less verbose.
>
> While at it, also remove some unless extra () in the 32
> On Nov 26, 2020, at 19:10, Chen Yu wrote:
>
> On Thu, Nov 26, 2020 at 02:36:42PM +0800, Kai-Heng Feng wrote:
What about plugging ethernet cable and using WoL after system is suspended?
Commit "e1000e: Exclude device from suspend direct complete optimization"
was to
在 2020/11/26 17:42, Benjamin Block 写道:
On Thu, Nov 26, 2020 at 09:13:53AM +0100, Cornelia Huck wrote:
On Thu, 26 Nov 2020 09:27:41 +0800
Qinglang Miao wrote:
在 2020/11/26 1:06, Benjamin Block 写道:
On Fri, Nov 20, 2020 at 03:48:54PM +0800, Qinglang Miao wrote:
kfree(port) is called in
Em Wed, Nov 25, 2020 at 02:17:56PM +, Will Deacon escreveu:
> On Thu, Nov 19, 2020 at 11:24:25PM +0800, Leo Yan wrote:
> > This is patch set v9 for refactoring Arm SPE trace decoding and dumping.
> >
> > According to comments and suggestions from patch set v8, it squashs the
> > two patches
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