Add stub instances of enable_kernel_vsx() and disable_kernel_vsx()
when CONFIG_VSX is not set, to avoid following build failure.
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.o
In file included from
./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:29,
On Tue, 09 Mar 2021 08:34:43 +,
"wangyanan (Y)" wrote:
>
>
> On 2021/3/9 0:34, Will Deacon wrote:
> > On Mon, Jan 25, 2021 at 10:10:44PM +0800, Yanan Wang wrote:
> >> After dirty-logging is stopped for a VM configured with huge mappings,
> >> KVM will recover the table mappings back to
RT runs softirq processing always in thread context and it requires that
both the softirq execution and the BH disabled sections are preemptible.
This is achieved by serialization through per CPU local locks and
substituting a few parts of the existing softirq processing code with
helper
RT requires the softirq processing and local bottomhalf disabled regions to
be preemptible. Using the normal preempt count based serialization is
therefore not possible because this implicitely disables preemption.
RT kernels use a per CPU local lock to serialize bottomhalfs. As
Provide a local lock based serialization for soft interrupts on RT which
allows the local_bh_disabled() sections and servicing soft interrupts to be
preemptible.
Provide the necessary inline helpers which allow to reuse the bulk of the
softirq processing code.
Signed-off-by: Thomas Gleixner
To allow reuse of the bulk of softirq processing code for RT and to avoid
#ifdeffery all over the place, split protections for various code sections
out into inline helpers so the RT variant can just replace them in one go.
Signed-off-by: Thomas Gleixner
Tested-by: Sebastian Andrzej Siewior
Soft interrupt disabled sections can legitimately be preempted or schedule
out when blocking on a lock on RT enabled kernels so the RCU preempt check
warning has to be disabled for RT kernels.
Signed-off-by: Thomas Gleixner
Tested-by: Sebastian Andrzej Siewior
Reviewed-by: Paul E. McKenney
---
vtime_account_irq and irqtime_account_irq() base checks on preempt_count()
which fails on RT because preempt_count() does not contain the softirq
accounting which is seperate on RT.
These checks do not need the full preempt count as they only operate on the
hard and softirq sections.
Use
On RT a task which has soft interrupts disabled can block on a lock and
schedule out to idle while soft interrupts are pending. This triggers the
warning in the NOHZ idle code which complains about going idle with pending
soft interrupts. But as the task is blocked soft interrupt processing is
On Thu, 4 Mar 2021 at 21:14, Jarkko Sakkinen wrote:
>
> On Thu, Mar 04, 2021 at 03:30:18PM +0530, Sumit Garg wrote:
> > Hi Jarkko,
> >
> > On Mon, 1 Mar 2021 at 18:41, Sumit Garg wrote:
> > >
> > > Add support for TEE based trusted keys where TEE provides the
> > > functionality
> > > to seal
On Sat, 06 Mar 2021 02:36:31 +,
Qing Zhang wrote:
>
> Add IO interrupt controller support for Loongson 2k1000, different
> from the 3a series is that 2K1000 has 64 interrupt sources, 0-31
> correspond to the device tree liointc0 device node, and the other
> correspond to liointc1 node.
>
>
NIAP PP_OS certification requests that the OS shall validate the
CodeSigning extended key usage extension field for integrity
verifiction of exectable code:
https://www.niap-ccevs.org/MMO/PP/-442-/
FIA_X509_EXT.1.1
This patchset adds the logic for parsing the codeSigning EKU
On 2021/3/4 3:28, Jaegeuk Kim wrote:
This is useful when checking conditions during checkpoint=disable in Android.
Signed-off-by: Jaegeuk Kim
Reviewed-by: Chao Yu
Thanks,
On 3/9/21 8:38 AM, Daniel Lezcano wrote:
> From: Enric Balletbo i Serra
>
> The Rockchip DMC (Dynamic Memory Interface) needs to access to the PMU
> general register files to know the DRAM type, so add a phandle to the
> syscon that manages these registers.
>
> Signed-off-by: Enric Balletbo i
Fix the following coccicheck warnings:
./arch/x86/boot/compressed/kaslr.c:642:10-11: WARNING: return of 0/1 in
function 'process_mem_region' with return type bool.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
arch/x86/boot/compressed/kaslr.c | 4 ++--
1 file changed, 2
On 3/9/21 8:38 AM, Daniel Lezcano wrote:
> From: Gaël PORTAY
>
> Those DDR related defines do not exist. Replace their references with
> their numerical constant.
>
> Signed-off-by: Gaël PORTAY
> Reviewed-by: Rob Herring
> Signed-off-by: Daniel Lezcano
> ---
>
On Sat, 2021-03-06 at 03:47 -0800, menglong8.d...@gmail.com wrote:
> From: Zhang Yunkai
>
>
>
> 'blkdev.h' included in 'ufshcd.c' is duplicated.
>
> It is also included in the 18th line.
>
>
>
> Signed-off-by: Zhang Yunkai
Reviewed-by: Bean Huo
Hi Andrey,
On 3/8/21 9:02 PM, Andrey Konovalov wrote:
> On Mon, Mar 8, 2021 at 5:14 PM Vincenzo Frascino
> wrote:
>>
>> This patchset implements the asynchronous mode support for ARMv8.5-A
>> Memory Tagging Extension (MTE), which is a debugging feature that allows
>> to detect with the help of
On Tue, Mar 09, 2021 at 09:08:20AM +0800, Samuel Zou wrote:
>
>
> On 2021/3/8 20:30, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 5.10.22 release.
> > There are 42 patches in this series, all will be posted as a response
> > to this one. If anyone has any
On Tue, Mar 09, 2021 at 09:08:20AM +0800, Samuel Zou wrote:
>
>
> On 2021/3/8 20:30, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 5.10.22 release.
> > There are 42 patches in this series, all will be posted as a response
> > to this one. If anyone has any
On Tue, Mar 09, 2021 at 09:52:04AM +0530, Naresh Kamboju wrote:
> On Mon, 8 Mar 2021 at 18:06, wrote:
> >
> > From: Greg Kroah-Hartman
> >
> > This is the start of the stable review cycle for the 5.11.5 release.
> > There are 44 patches in this series, all will be posted as a response
> > to
On Tue, Mar 09, 2021 at 11:06:02AM +0800, Zheng Yejian wrote:
> Lee sent a patchset to update Futex for 4.9, see
> https://www.spinics.net/lists/stable/msg443081.html,
> Then Xiaoming sent a follow-up patch for it, see
> https://lore.kernel.org/lkml/20210225093120.GD641347@dell/.
>
> These
On Tue, Mar 09, 2021 at 11:06:05AM +0800, Zheng Yejian wrote:
> From: Thomas Gleixner
>
> The handle_exit_race() function is defined in commit 9c3f39860367
> ("futex: Cure exit race"), which never returns -EBUSY. This results
> in a small piece of dead code in the attach_to_pi_owner() function:
On 09/03/21 11:47, Andy Shevchenko wrote:
> +Cc: Greg
>
> On Fri, Feb 26, 2021 at 07:03:32PM +0200, Andy Shevchenko wrote:
>> On Tue, Feb 16, 2021 at 01:31:48PM +0200, Andy Shevchenko wrote:
>>> When requesting optional GPIO echo line, bail out on error,
>>> so user will know that something wrong
+ Mark (Forgot to add him previously)
> -Original Message-
> From: Kuldeep Singh
> Sent: Tuesday, March 9, 2021 4:05 PM
> To: Rob Herring ; linux-...@vger.kernel.org;
> devicet...@vger.kernel.org; linux-kernel@vger.kernel.org
> Cc: Ashish Kumar ; Kuldeep Singh
>
> Subject: [PATCH]
On Tue, Mar 09, 2021 at 01:05:27PM +0200, Andy Shevchenko wrote:
> On Fri, Mar 5, 2021 at 9:05 PM Jonathan Cameron
> wrote:
> >
> > On Fri, 5 Mar 2021 14:38:13 +0100
> > Oleksij Rempel wrote:
> >
> > > Basically the TI TSC2046 touchscreen controller is 8 channel ADC
> > > optimized for
> > >
This check is redundant as all UFS versions are currently supported.
Signed-off-by: Nitin Rawat
Signed-off-by: Caleb Connolly
---
drivers/scsi/ufs/ufshcd.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index
When using a device with UFS > 2.1 the error "invalid UFS version" is
misleadingly printed. There was a patch for this almost a year
ago to which this solution was suggested.
This series replaces the use of the growing UFSHCI_VERSION_xy macros with
an inline function to encode a major and minor
Replace the UFSHCI_VERSION_xy macros.
Signed-off-by: Caleb Connolly
---
drivers/scsi/ufs/ufs-qcom.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c
index f97d7b0ae3b6..2d54dce0eeda 100644
---
Update the driver to use a function for referencing the UFS version.
This replaces the UFSHCI_VERSION_xy macros, and supports comparisons
where they did not.
Suggested-by: Christoph Hellwig
Signed-off-by: Caleb Connolly
---
drivers/scsi/ufs/ufshcd.c | 64 +--
If the code can use a stack in vm area, it can also use a
stack in linear space.
Simplify code by removing old non VMAP stack code on PPC32.
That means the data translation is now re-enabled early in
exception prolog in all cases, not only when using VMAP stacks.
While we are touching
On 40x and 8xx, kernel text is pinned.
On book3s/32, kernel text is mapped by BATs.
Enable instruction translation at the same time as data translation, it
makes things simpler.
In syscall handler, MSR_RI can also be set at the same time because
srr0/srr1 are already saved and r1 is set
ksp_limit is there to help detect stack overflows.
That is specific to ppc32 as it was removed from ppc64 in
commit cbc9565ee826 ("powerpc: Remove ksp_limit on ppc64").
There are other means for detecting stack overflows.
As ppc64 has proven to not need it, ppc32 should be able to do
without it
The check of the emergency context initialisation in
vmap_stack_overflow is buggy for the SMP case, as it
compares r1 with 0 while in the SMP case r1 is offseted
by the CPU id.
Instead of fixing it, just perform static initialisation
of the first emergency context.
Signed-off-by: Christophe
The space in the head section is rather constrained by the fact that
exception vectors are spread every 0x100 bytes and sometimes we
need to have "out of line" code because it doesn't fit.
Now that we are enabling MMU early in the prolog, take that opportunity
to jump somewhere else in the .text
For consistency, add in the macro the label used by exception prolog
to branch to stack overflow processing.
While at it, enclose the macro in #ifdef CONFIG_VMAP_STACK on the 8xx
as already done on book3s/32.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_32.h| 3 ++-
In preparation of handling exception entry and exit in C,
in order to simplify the handling, always save non volatile registers
when entering an exception.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/ptrace.h | 6 ++
arch/powerpc/kernel/entry_32.S| 13 +
Now that the MMU is re-enabled before calling the transfer function,
we don't need anymore that hack with the address of the handler and
the return function sitting just after the 'bl' to the transfer
fonction, that function is retrieving via a read relative to 'lr'.
Do a regular call to the
This patch replaces the PPC32 ASM exception exit by C exception exit.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/entry_32.S | 481 +---
arch/powerpc/kernel/interrupt.c | 4 +
2 files changed, 132 insertions(+), 353 deletions(-)
diff --git
All exception handlers take regs as first parameter.
Instead of setting r3 just before each call to a handler, set
it in transfer_to_handler.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/entry_32.S | 5 ++---
arch/powerpc/kernel/head_32.h| 2 --
book3e/64 is the last one calling __bad_page_fault()
from assembly.
Save non volatile registers before calling do_page_fault()
and modify do_page_fault() to call __bad_page_fault()
for all platforms.
Then it can be refactored by the call of bad_page_fault()
which avoids the duplication of the
Now that non volatile registers are saved at all time, no
need to split bad_page_fault() out of do_page_fault().
Remove handle_page_fault() and use do_page_fault() directly.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/entry_32.S | 16
Everywhere where it is possible, use START_EXCEPTION().
This will help for proper exception init in future patches.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_40x.S | 12 +--
arch/powerpc/kernel/head_8xx.S | 27 +
Now that the prolog continuation is separated in .text, give it a name
and mark it _ASM_NOKPROBE_SYMBOL.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_32.h| 12 +++-
arch/powerpc/kernel/head_40x.S | 22 --
arch/powerpc/kernel/head_8xx.S
Saving the trap number into the stack goes into
the exception prolog, as EXC_XFER_xxx will soon disappear.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_32.h| 14 -
arch/powerpc/kernel/head_40x.S | 22 +++---
arch/powerpc/kernel/head_8xx.S | 14
8xx requires to tag the DAR with a magic value in order to
fixup DAR on faults generated by 'dcbX', as the 8xx
forgets to update the DAR for those faults.
Do the tagging as early as possible, that is before enabling MMU.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_32.h | 6
Refactor booke critical registers saving into a few macros
and move it into the exception prolog directly.
Keep the dedicated transfert_to_handler entry point for the
moment allthough they are empty. They will be removed in a
later patch to reduce churn.
Signed-off-by: Christophe Leroy
---
On 09/03/21 12:23, Andy Shevchenko wrote:
> The timer along with GPIO API are NULL-aware, there is no need to test
> against existing GPIO echo line.
>
> Signed-off-by: Andy Shevchenko
> ---
> drivers/pps/clients/pps-gpio.c | 8 +++-
> 1 file changed, 3 insertions(+), 5 deletions(-)
>
>
On Tue, Mar 09, 2021 at 05:32:54PM +0800, Yang Li wrote:
> This function always return '0' and no callers use the return value.
> So make it a void function.
>
> This eliminates the following coccicheck warning:
> ./fs/btrfs/disk-io.c:4522:5-8: Unneeded variable: "ret". Return "0" on
> line 4530
On 09/03/21 12:23, Andy Shevchenko wrote:
> When GPIO APIs return -EPROBE_DEFER there is no need to print the message,
> especially taking into consideration that it may repeat several times.
> Use dev_err_probe() to avoid log noise in such cases.
>
> Signed-off-by: Andy Shevchenko
> ---
>
On 09/03/21 12:24, Andy Shevchenko wrote:
> In most parts of the code the platform device is not used.
> Use struct device pointer directly to reduce code size and
> increase readability.
>
> Signed-off-by: Andy Shevchenko
> ---
> drivers/pps/clients/pps-gpio.c | 42
On 09/03/21 12:24, Andy Shevchenko wrote:
> Rearrange optional stuff in pps_gpio_setup() so it will go after mandatory one
> and with reduced indentation. This will increase readability of the sources.
>
> Signed-off-by: Andy Shevchenko
> ---
> drivers/pps/clients/pps-gpio.c | 33
Ah, and you forgot to CC lkml ;) let me resend my email.
Hi Jim,
Please do not use the attachments, just send the patch as plain text.
See Documentation/process/submitting-patches.rst
On 03/08, Jim Newsome wrote:
>
> --- a/kernel/exit.c
> +++ b/kernel/exit.c
> @@ -1462,8 +1462,61 @@ static
On 2021-03-09 05:14, Jürgen Groß wrote:
> On 08.03.21 21:33, Boris Ostrovsky wrote:
>>
>> On 3/6/21 11:18 AM, Juergen Gross wrote:
>>> An event channel should be kept masked when an eoi is pending for it.
>>> When being migrated to another cpu it might be unmasked, though.
>>>
>>> In order to
Add an openssl command option example for generating CodeSign extended
key usage in X.509 when CONFIG_CHECK_CODESIGN_EKU is enabled.
Signed-off-by: "Lee, Chun-Yi"
---
Documentation/admin-guide/module-signing.rst | 6 ++
1 file changed, 6 insertions(+)
diff --git
Add codeSigning EKU to the X.509 key generation config for the build time
autogenerated kernel key.
Signed-off-by: "Lee, Chun-Yi"
---
certs/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/certs/Makefile b/certs/Makefile
index f4c25b67aad9..1ef4d6ca43b7 100644
--- a/certs/Makefile
This patch adds the logic for checking the CodeSigning extended
key usage when verifying signature of kernel module or
kexec PE binary in PKCS#7.
Signed-off-by: "Lee, Chun-Yi"
---
certs/system_keyring.c | 2 +-
crypto/asymmetric_keys/Kconfig | 9 +
This patch adds the logic for parsing the CodeSign extended key usage
extension in X.509. The parsing result will be set to the eku flag
which is carried by public key. It can be used in the PKCS#7
verification.
Signed-off-by: "Lee, Chun-Yi"
---
crypto/asymmetric_keys/x509_cert_parser.c | 24
If we did not reserve extra CMA memory, the log buffer can be
easily filled up by CMA failure warning when the devices calling
dmam_alloc_coherent() to alloc DMA memory. Thus we can use
pr_err_ratelimited() instead to reduce the duplicate CMA warning.
Signed-off-by: Baolin Wang
---
mm/cma.c | 4
Hi Christophe,
On Tue, Mar 9, 2021 at 9:52 AM Christophe Leroy
wrote:
> Le 09/03/2021 à 09:45, Geert Uytterhoeven a écrit :
> > On Tue, Mar 9, 2021 at 9:39 AM Christophe Leroy
> > wrote:
> >> Add stub instances of enable_kernel_vsx() and disable_kernel_vsx()
> >> when CONFIG_VSX is not set, to
Hi Minchan,
I love your patch! Yet something to improve:
[auto build test ERROR on linux/master]
[also build test ERROR on linus/master v5.12-rc2 next-20210309]
[cannot apply to hnaz-linux-mm/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting
Fix the following coccicheck warnings:
./arch/x86/events/intel/lbr.c:917:9-10: WARNING: return of 0/1 in
function 'get_lbr_predicted' with return type bool.
./arch/x86/events/intel/lbr.c:909:9-10: WARNING: return of 0/1 in
function 'get_lbr_mispred' with return type bool.
Reported-by: Abaci
* Arnd Bergmann [210308 15:35]:
> From: Arnd Bergmann
>
> The clang integrated assembler fails to build one file with
> a complex asm instruction:
>
> arch/arm/mach-omap1/ams-delta-fiq-handler.S:249:2: error: invalid
> instruction, any one of the following would fix this:
> mov r10, #(1 <<
Hi Loic,
I love your patch! Yet something to improve:
[auto build test ERROR on net-next/master]
url:
https://github.com/0day-ci/linux/commits/Loic-Poulain/net-Add-Qcom-WWAN-control-driver/20210309-163643
base: https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git
Fix the following coccicheck warnings:
./tools/perf/util/machine.c:2041:9-10: WARNING: return of 0/1 in
function 'symbol__match_regex' with return type bool.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
tools/perf/util/machine.c | 4 ++--
1 file changed, 2 insertions(+), 2
On Tue, Mar 09, 2021 at 11:28:49AM +0100, Loic Poulain wrote:
> Hi Greg,
>
> On Tue, 9 Mar 2021 at 10:35, Greg KH wrote:
> >
> > On Tue, Mar 09, 2021 at 09:42:16AM +0100, Loic Poulain wrote:
> > > The MHI WWWAN control driver allows MHI Qcom based modems to expose
> > > different modem control
On Tue, Mar 09, 2021 at 11:06:03AM +0800, Zheng Yejian wrote:
> From: Peter Zijlstra
>
> Currently futex-pi relies on hb->lock to serialize everything. But hb->lock
> creates another set of problems, especially priority inversions on RT where
> hb->lock becomes a rt_mutex itself.
>
> The
found flag is used to indicate SoundWire devices that are
both enumerated on the bus and available in the device list.
However this flag is not reset correctly after one iteration,
This could miss some of the devices that are enumerated on the
bus but not in device list. So reset this correctly to
+Cc: Greg
On Fri, Feb 26, 2021 at 07:03:32PM +0200, Andy Shevchenko wrote:
> On Tue, Feb 16, 2021 at 01:31:48PM +0200, Andy Shevchenko wrote:
> > When requesting optional GPIO echo line, bail out on error,
> > so user will know that something wrong with the existing property.
>
> Guys, any
On Wed, 24 Feb 2021 07:56:40 +,
Álvaro Fernández Rojas wrote:
>
> This interrupt controller is present on bcm63xx SoCs in order to generate
> interrupts based on GPIO status changes.
>
> Signed-off-by: Álvaro Fernández Rojas
> Signed-off-by: Jonas Gorski
> Reviewed-by: Florian Fainelli
>
Hi Minchan,
I love your patch! Yet something to improve:
[auto build test ERROR on linux/master]
[also build test ERROR on linus/master v5.12-rc2 next-20210309]
[cannot apply to hnaz-linux-mm/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting
Dave Chinner wrote:
> > > There was a discussion about fsyncing a range of files on LSFMM [1].
> > > In the last comment on the article dchinner argues why we already have
> > > that
> > > API (and now also with io_uring(), but AFAIK, we do not have a useful
> > > wait_for_sync() API. And it
Until now, non volatile registers were restored everytime they
were saved, ie using EXC_XFER_STD meant saving and restoring
them while EXC_XFER_LITE meant neither saving not restoring them.
Now that they are always saved, EXC_XFER_STD means to restore
them and EXC_XFER_LITE means to not restore
In order to increase flexibility, add a macro that will for now
call transfer_to_handler.
As transfer_to_handler doesn't do the actual transfer anymore,
also name it prepare_transfer_to_handler. The following patches
will progressively remove the use of transfer_to_handler label.
Signed-off-by:
The xfer parameter is not used anymore, remove it.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_32.h| 2 +-
arch/powerpc/kernel/head_40x.S | 42
arch/powerpc/kernel/head_44x.S | 10 ++--
arch/powerpc/kernel/head_8xx.S | 14 +++---
In order to get more control in exception prolog, dismantle
all non standard exception macros, finishing with EXC_XFER_STD
and EXC_XFER_LITE and EXC_XFER_TEMPLATE.
Also remove transfer_to_handler_full and ret_from_except and
ret_from_except_full as they are not used anymore.
Last parameter of
Save non volatile registers, XER, CTR, MSR and NIP in exception prolog.
Also assign proper value to r2 and r3 there.
For now, recalculate thread pointer in prepare_transfer_to_handler.
It will disappear once KUAP is ported to C.
And remove the comment which is now completely wrong.
Exception prologs all do the same at the end:
- Save trapno in stack
- Mark stack with exception marker
- Save r0
- Save r3 to r8
Refactor that into a COMMON_EXCEPTION_PROLOG_END macro.
At the same time use r1 instead of r11.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_32.h
This can be done in C, do it.
Unrolling the loop gains approx. 15% performance.
>From now on, prepare_transfer_to_handler() is only for
interrupts from kernel.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/book3s/32/kup.h | 31 ---
Move all KUAP management in C.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/book3s/32/kup.h | 50 +---
arch/powerpc/include/asm/interrupt.h | 2 +
arch/powerpc/include/asm/kup.h | 9
arch/powerpc/include/asm/nohash/32/kup-8xx.h |
In preparation of porting PPC32 to C syscall entry/exit,
create C version of kuap_save_and_lock() and kuap_user_restore() and
kuap_kernel_restore() and kuap_check() and kuap_get_and_check()
on book3s/32.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/book3s/32/kup.h | 45
No need to do that is assembly, do it in C.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/interrupt.h | 4 +++-
arch/powerpc/kernel/entry_32.S | 3 +--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/include/asm/interrupt.h
transfer_to_handler_cont: is now just a blr.
Directly perform blr in power_save_ppc32_restore().
Also remove useless setting of r11 in e500 version of
power_save_ppc32_restore().
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/entry_32.S | 3 ---
arch/powerpc/kernel/idle_6xx.S | 2
*Reason for resend:* the patch does not reach the linux-can mailing
list because it is over the 10 characters limit. Adding
linux-kernel@vger.kernel.org in CC so that people who are not in CC
can get it from the general mailing list instead.
Here comes the twelfth iteration of the ETAS es58x
Only book3s/32 and e500 have significative work to do in
prepare_transfer_to_handler.
Other 32 bit have nothing to do at all.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/entry_32.S | 6 ++
arch/powerpc/kernel/head_32.h| 2 ++
arch/powerpc/kernel/head_booke.h | 2 ++
3
Em Tue, Mar 09, 2021 at 06:11:09PM +0800, Jiapeng Chong escreveu:
> Fix the following coccicheck warnings:
>
> ./tools/perf/util/machine.c:2041:9-10: WARNING: return of 0/1 in
> function 'symbol__match_regex' with return type bool.
Thanks, applied.
- Arnaldo
> Reported-by: Abaci Robot
>
In preparation of porting powerpc32 to C syscall entry/exit,
rename kuap_check_amr() and kuap_get_and_check_amr() as kuap_check()
and kuap_get_and_check(), and move in the generic asm/kup.h the stub
for when CONFIG_PPC_KUAP is not selected.
Signed-off-by: Christophe Leroy
---
In preparation of porting PPC32 to C syscall entry/exit,
create C version of kuap_save_and_lock() and kuap_user_restore() and
kuap_kernel_restore() and kuap_check() and kuap_get_and_check() on 8xx.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/nohash/32/kup-8xx.h | 31
On 08-03-21, 10:21, Bjorn Andersson wrote:
> +#include
> +#include
> +#include "sm8350.dtsi"
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. SM8350 HDK";
> + compatible = "qcom,sm8350-hdk", "qcom,sm8350";
qcom,sm8350-hdk needs to be documented
With that:
Reviewed-by: Vinod Koul
On Tue, Mar 9, 2021 at 12:38 PM Takashi Iwai wrote:
>
> On Tue, 09 Mar 2021 12:32:18 +0100,
> syzbot wrote:
> >
> > Hello,
> >
> > syzbot found the following issue on:
> >
> > HEAD commit:4641b323 Add linux-next specific files for 20210305
> > git tree: linux-next
> > console output:
> On Tue, Mar 9, 2021 at 12:38 PM Takashi Iwai wrote:
>>
>> On Tue, 09 Mar 2021 12:32:18 +0100,
>> syzbot wrote:
>> >
>> > Hello,
>> >
>> > syzbot found the following issue on:
>> >
>> > HEAD commit:4641b323 Add linux-next specific files for 20210305
>> > git tree: linux-next
>> >
On Tue, Mar 09, 2021 at 11:41:50AM +, Kuldeep Singh wrote:
> + Mark (Forgot to add him previously)
...
> I was not sure with which tree this patch will go through.
> Currently, I have rebased this on top of
> tree(git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git, branch:
>
Hello Rob,
On Mon, 2021-03-08 at 10:39 -0700, Rob Herring wrote:
> On Mon, 08 Mar 2021 12:40:50 +0200, Matti Vaittinen wrote:
> > Document DT bindings for ROHM BD71815.
> >
> > BD71815 is a single-chip power management IC mainly for battery-
> > powered
> > portable devices. The IC integrates 5
On 3/9/21 4:51 PM, Naveen N. Rao wrote:
On 2021/03/09 08:54PM, Michael Ellerman wrote:
Ravi Bangoria writes:
As per ISA 3.1, prefixed instruction should not cross 64-byte
boundary. So don't allow Uprobe on such prefixed instruction.
There are two ways probed instruction is changed in
On Tue, Mar 9, 2021 at 2:18 PM Oleksij Rempel wrote:
>
> On Tue, Mar 09, 2021 at 01:46:55PM +0200, Andy Shevchenko wrote:
> > On Tue, Mar 9, 2021 at 1:42 PM Oleksij Rempel
> > wrote:
> > > On Tue, Mar 09, 2021 at 01:05:27PM +0200, Andy Shevchenko wrote:
> > > > On Fri, Mar 5, 2021 at 9:05 PM
On Mon, Mar 8, 2021 at 5:58 PM Catalin Marinas wrote:
>
> On Mon, Mar 08, 2021 at 04:55:14PM +0100, Andrey Konovalov wrote:
> > @@ -68,10 +69,16 @@ static inline void mte_set_mem_tag_range(void *addr,
> > size_t size, u8 tag)
> >* 'asm volatile' is required to prevent the
From: Sebastian Andrzej Siewior
tasklet_disable() is used in the timer callback. This might be distangled,
but without access to the hardware that's a bit risky.
Replace it with tasklet_disable_in_atomic() so tasklet_disable() can be
changed to a sleep wait once all remaining atomic users are
From: Sebastian Andrzej Siewior
The link change tasklet disables the tasklets for tx/rx processing while
upating hw parameters and then enables the tasklets again.
This update can also be pushed into a workqueue where it can be performed
in preemptible context. This allows tasklet_disable() to
From: Sebastian Andrzej Siewior
All callers of ath9k_beacon_ensure_primary_slot() are preemptible /
acquire a mutex except for this callchain:
spin_lock_bh(>sc_pcu_lock);
ath_complete_reset()
-> ath9k_calculate_summary_state()
-> ath9k_beacon_ensure_primary_slot()
It's unclear how
From: Sebastian Andrzej Siewior
The hv_compose_msi_msg() callback in irq_chip::irq_compose_msi_msg is
invoked via irq_chip_compose_msi_msg(), which itself is always invoked from
atomic contexts from the guts of the interrupt core code.
There is no way to change this w/o rewriting the whole
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