On Thu, Apr 8, 2021 at 3:14 PM Jinpu Wang wrote:
>
> On Thu, Apr 8, 2021 at 3:06 PM Gioh Kim wrote:
> >
> > As the name shows, it checks if strings are equal in case insensitive
> > manner.
> >
> > For example, drivers/infiniband/ulp/rtrs/rtrs-clt-sysfs.c uses
> > strncasecmp to check that the in
On Thu, Apr 08, 2021 at 09:49:19PM +0800, Longfang Liu wrote:
> Some types of EHCI controllers do not have SBRN registers.
> By comparing the white list, the operation of reading the SBRN
> registers is skipped.
>
> Subsequent EHCI controller types without SBRN registers can be
> directly added to
On Thu, Apr 08, 2021 at 09:49:18PM +0800, Longfang Liu wrote:
> (1) Add a whitelist for EHCI devices without SBRN registers.
> (2) Add Kunpeng920's EHCI device to the whitelist.
>
> Changes in v2:
> - Fix some code style issues.
> - Update function name.
>
> Longfang Liu (2):
> USB:
On Thu, Apr 08, 2021 at 09:04:17PM +0800, liulongfang wrote:
> On 2021/4/8 17:22, Greg KH Wrote:
> > On Thu, Apr 08, 2021 at 05:11:12PM +0800, Longfang Liu wrote:
> >> Some types of EHCI controllers do not have SBRN registers.
> >> By comparing the white list, the operation of reading the SBRN
> >>
Hi Hans,
On Do, 2021-04-08T11:36+0200, Hans de Goede wrote:
> On 4/7/21 9:43 PM, Thomas Weißschuh wrote:
> > Hi Hans,
> >
> > On Mi, 2021-04-07T17:54+0200, Hans de Goede wrote:
> >> Thank you for your new driver and thank you for the quick respin
> >> addressing Barnabás' request to make it a WMI
On Thu, Apr 08, 2021 at 03:04:58PM +0100, David Howells wrote:
> Suggested-by: Matthew Wilcox (Oracle)
> Signed-off-by: David Howells
Reviewed-by: Matthew Wilcox (Oracle)
Currently the bitmap_remap() and bitmap_bitremap() are available
only for CONFIG_NUMA=y case, while some users may benefit out of it
and being independent to NUMA code. Make them available to users
by moving out of ifdeffery and exporting for modules.
Signed-off-by: Andy Shevchenko
---
lib/bitma
The change in the series has been inspired by [1], which, I think,
can be improved. Here I present the view how it can be done.
The series marked as RFT since I have no hardware and I perform
compile test only.
The patches 1 and 2 can be (independently) applied for v5.13, but I'm not in
hurry wit
Kernel doc validator complains:
.../gpio-xilinx.c:556: warning: expecting prototype for xgpio_of_probe().
Prototype was for xgpio_probe() instead
Correct as suggested by changing the name of the function in the doc..
Fixes: 749564ffd52d ("gpio/xilinx: Convert the driver to platform device
inte
With the new helpers, i.e. xgpio_read_chan() / xgpio_write_chan(),
the code is easier to read and maintain. No functional changes
intended.
Signed-off-by: Andy Shevchenko
---
drivers/gpio/gpio-xilinx.c | 68 +-
1 file changed, 37 insertions(+), 31 deletions(-)
It seems that Xilinx GPIO driver operates with bit arrays longer than 32 and
thus can leverage bitmap APIs for that. It makes code better to understand.
The ->probe() function is modified to try read properties for both channels
since is_dual check makes only sense for the amount of pins used for
In IRQ handler interrupts are already disabled, hence no need
to repeat it. Even in the threaded case, it is not a problem
because IRQ framework keeps interrupt disabled there as well.
Remove disabling IRQ part in the handler.
Signed-off-by: Andy Shevchenko
---
drivers/gpio/gpio-xilinx.c | 5 ++-
On Thu, Apr 08, 2021 at 03:37:23PM +0100, Vincenzo Frascino wrote:
> The check_mte_async_tcf macro sets the TIF flag non-atomically. This can
> race with another CPU doing a set_tsk_thread_flag() and the flag can be
> lost in the process.
Actually, it's all the *other* flags that get lost!
> Move
Josh, thank you for taking the time to review the patches.
On 4/7/2021 5:39 PM, Josh Poimboeuf wrote:
> On Tue, Apr 06, 2021 at 10:49:59AM -0500, Ramakrishna Saripalli wrote:
>> Because PSF speculation is limited to the current program context,
>> the impact of bad PSF speculation is very similar
On 21/04/08 09:08AM, Miaohe Lin wrote:
> Hi all,
> When I was investigating the swap code, I found some possible race
> windows. This series aims to fix all these races. But using current
> get/put_swap_device() to guard against concurrent swapoff for
> swap_readpage() looks terrible because swap_r
On 4/8/21 2:36 AM, Hans de Goede wrote:
> Hi,
>
> On 4/7/21 9:43 PM, Thomas Weißschuh wrote:
>> Hi Hans,
>>
>> On Mi, 2021-04-07T17:54+0200, Hans de Goede wrote:
>>> Thank you for your new driver and thank you for the quick respin
>>> addressing Barnabás' request to make it a WMI driver.
>>>
>>> T
Hi René,
On Thu, Apr 8, 2021 at 10:02 PM René van Dorst wrote:
>
> Tested on Ubiquiti ER-X-SFP (MT7621) with 1 external phy which uses irq=POLL.
>
I wonder if the external PHY's IRQ can be registered in the devicetree.
Change MT7530_NUM_PHYS to 6, and add the following to ER-X-SFP dts PHY node:
On Tue, 2021-04-06 at 19:16 -0500, Aditya Pakki wrote:
> In gss_pipe_destroy_msg(), in case of error in msg, gss_release_msg
> deletes gss_msg. The patch adds a check to avoid a potential double
> free.
>
> Signed-off-by: Aditya Pakki
> ---
> net/sunrpc/auth_gss/auth_gss.c | 3 ++-
> 1 file chan
On Thu, 08 Apr 2021 15:45:18 +0100,
Pavel Tatashin wrote:
>
> On Thu, Apr 8, 2021 at 6:24 AM Marc Zyngier wrote:
> >
> > On 2021-04-08 05:05, Pavel Tatashin wrote:
> > > From: James Morse
> > >
> > > The hyp-stub's el1_sync code doesn't do very much, this can easily fit
> > > in the vectors.
>
On Mon, Apr 05, 2021 at 04:36:08PM +0530, Krishna Manikandan wrote:
> Add YAML schema for the device tree bindings for DSI
>
> Signed-off-by: Krishna Manikandan
>
> Changes in v1:
> - Separate dsi controller bindings to a separate patch (Stephen Boyd)
> - Merge dsi-common-controller.yaml
On Wed, Apr 07, 2021 at 01:03:48AM +0200, Thomas Bogendoerfer wrote:
> Commit 45deb5faeb9e ("MIPS: uaccess: Remove get_fs/set_fs call sites")
> caused a few new sparse warning, fix them.
>
> Signed-off-by: Thomas Bogendoerfer
> ---
> arch/mips/kernel/access-helper.h | 7 ---
> arch/mips/kern
On Thu, Apr 8, 2021 at 4:50 PM Andy Shevchenko
wrote:
>
> On Thu, Apr 08, 2021 at 04:15:37PM +0200, Rafael J. Wysocki wrote:
> > On Wed, Mar 31, 2021 at 1:06 PM Heikki Krogerus
> > wrote:
> > >
> > > On Mon, Mar 29, 2021 at 06:12:02PM +0300, Andy Shevchenko wrote:
> > > > Currently we have a slig
Varad Gautam wrote:
> + Opt_slen, /* "slen=" eg. "slen=32" */
"slen" seems a bit unobvious. Maybe "saltlen=..."?
David
On Thu, Apr 08, 2021 at 03:56:04PM +0100, Will Deacon wrote:
> On Thu, Apr 08, 2021 at 03:37:23PM +0100, Vincenzo Frascino wrote:
> > The check_mte_async_tcf macro sets the TIF flag non-atomically. This can
> > race with another CPU doing a set_tsk_thread_flag() and the flag can be
> > lost in the
On Mon, Apr 05, 2021 at 04:36:10PM +0530, Krishna Manikandan wrote:
> Add bindings for Snapdragon DisplayPort controller driver.
>
> Signed-off-by: Chandan Uddaraju
> Signed-off-by: Vara Reddy
> Signed-off-by: Tanmay Shah
> Signed-off-by: Kuogee Hsieh
> Signed-off-by: Krishna Manikandan
>
>
On 2021-04-04 18:04, Jarkko Sakkinen wrote:
> On Fri, Apr 02, 2021 at 08:31:19PM +0200, Jethro Beekman wrote:
>> On 2021-04-02 17:53, Dave Hansen wrote:
>>> On 4/2/21 1:38 AM, Jethro Beekman wrote:
> So, we're talking here about pages that have been EEADDED, but for
> which we do not want t
Varad Gautam wrote:
> The test harness is available at [5].
Can you add this to the keyutils testsuite?
https://git.kernel.org/pub/scm/linux/kernel/git/dhowells/keyutils.git
David
On Thu, Apr 08, 2021 at 05:56:00PM +0300, Andy Shevchenko wrote:
> It seems that Xilinx GPIO driver operates with bit arrays longer than 32 and
> thus can leverage bitmap APIs for that. It makes code better to understand.
>
> The ->probe() function is modified to try read properties for both chann
On Thu 08-04-21 10:31:55, Johannes Weiner wrote:
> When the unsigned page_counter underflows, even just by a few pages, a
> cgroup will not be able to run anything afterwards and trigger the OOM
> killer in a loop.
>
> Underflows shouldn't happen, but when they do in practice, we may just
> be off
On Mon, Apr 05, 2021 at 10:48:10PM +0200, Thomas Weißschuh wrote:
> Changes since v1:
> * Incorporate feedback from Barnabás Pőcze
> * Use a WMI driver instead of a platform driver
> * Let the kernel manage the driver lifecycle
> * Fix errno/ACPI error confusion
> * Fix resource cleanup
>
Use the port struct device rather than tty class device for debugging.
Note that while USB serial doesn't support serdev yet (due to serdev not
handling hotplugging), serdev ttys do not have a corresponding class
device and would have been logged using a "(NULL device *):" prefix.
Signed-off-by:
Hi Rafael,
please consider pulling the following change for cpuidle on ARM for
v5.13-rc1
Thanks
-- Daniel
The following changes since commit dde8740bd9b505c58ec8b2277d5d55c6951b7e42:
Merge branch 'acpi-processor-fixes' into linux-next (2021-04-07
19:02:56 +0200)
are available in the Gi
On Thu, 8 Apr 2021 15:14:04 +0200
Thierry Reding wrote:
> On Thu, Apr 08, 2021 at 08:52:57AM +, Carlis wrote:
> > From: Xuezhi Zhang
> >
> > Fix the following coccicheck warning:
> > drivers/gpu/drm//panel/panel-dsi-cm.c:271:8-16:
> > WARNING: use scnprintf or sprintf
> > drivers/gpu/drm//
On Thu, Apr 08, 2021 at 02:29:59PM +0100, Will Deacon wrote:
> git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git
> tags/arm-smmu-updates
Pulled, thanks Will.
Hi Rob,
I had a git hiccup, this is not the version I meant to send. v3 coming shortly.
-Frank
On 4/8/21 9:43 AM, frowand.l...@gmail.com wrote:
> From: Frank Rowand
>
> The Devicetree standard specifies an 8 byte alignment of the FDT.
> Code in libfdt expects this alignment for an FDT image i
Reproduce:
modprobe sch_teql
tc qdisc add dev teql0 root teql0
This leads to (for instance in Centos 7 VM) OOPS:
[ 532.366633] BUG: unable to handle kernel NULL pointer dereference at
00a8
[ 532.366733] IP: [] teql_destroy+0x18/0x100 [sch_teql]
[ 532.366825] PGD 8001376d5
Hi Suzuki,
On 4/5/21 5:42 PM, Suzuki K Poulose wrote:
> At the moment, we check the availability of SPE on the given
> CPU (i.e, SPE is implemented and is allowed at the host) during
> every guest entry. This can be optimized a bit by moving the
> check to vcpu_load time and recording the availabi
On Mon, Apr 05, 2021 at 03:43:10PM -0500, madve...@linux.microsoft.com wrote:
> From: "Madhavan T. Venkataraman"
>
> Implement a check_reliability() function that will contain checks for the
> presence of various features and conditions that can render the stack trace
> unreliable.
Reviewed-by:
On Tue, Mar 23, 2021 at 02:06:19PM -0700, Nadav Amit wrote:
> drivers/iommu/amd/iommu.c | 76 +--
> 1 file changed, 42 insertions(+), 34 deletions(-)
Load-testing looks good here too, so this patch is queued now for v5.13,
thanks Nadav.
Regards,
Joerg
From: Frank Rowand
The Devicetree standard specifies an 8 byte alignment of the FDT.
Code in libfdt expects this alignment for an FDT image in memory.
kmemdup() returns 4 byte alignment on openrisc. Replace kmemdup()
with kmalloc(), align pointer, memcpy() to get proper alignment.
The 4 byte al
On Thu, Apr 08, 2021 at 05:04:32PM +0200, Rafael J. Wysocki wrote:
> On Thu, Apr 8, 2021 at 4:50 PM Andy Shevchenko
> wrote:
> > On Thu, Apr 08, 2021 at 04:15:37PM +0200, Rafael J. Wysocki wrote:
> > > On Wed, Mar 31, 2021 at 1:06 PM Heikki Krogerus
> > > wrote:
> > > >
> > > > On Mon, Mar 29, 20
Hi Vincenzo,
On Thu, Apr 08, 2021 at 03:37:23PM +0100, Vincenzo Frascino wrote:
> The check_mte_async_tcf macro sets the TIF flag non-atomically. This can
> race with another CPU doing a set_tsk_thread_flag() and the flag can be
> lost in the process.
>
> Move the tcf0 check to enter_from_user_mo
On Thu, Mar 25, 2021 at 8:27 AM Zhiqiang Liu wrote:
>
> From: Feilong Lin
>
> In enable_slot() in drivers/pci/hotplug/acpiphp_glue.c, if pci_get_slot()
> will return NULL, we will do not set SLOT_ENABLED flag of slot. if one
> device is found by calling pci_get_slot(), its reference count will be
On Thu, Apr 8, 2021 at 5:18 PM Andy Shevchenko
wrote:
>
> On Thu, Apr 08, 2021 at 05:04:32PM +0200, Rafael J. Wysocki wrote:
> > On Thu, Apr 8, 2021 at 4:50 PM Andy Shevchenko
> > wrote:
> > > On Thu, Apr 08, 2021 at 04:15:37PM +0200, Rafael J. Wysocki wrote:
> > > > On Wed, Mar 31, 2021 at 1:06
On Thu, Apr 8, 2021 at 4:15 AM Daniel Vetter wrote:
>
> On Mon, Apr 05, 2021 at 10:45:23AM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > One would normally hope not to be under enough memory pressure to need
> > to swap GEM objects to disk backed swap. But memory backed zram swap
> > (as e
On Thu, Apr 08, 2021 at 12:38:52PM +0200, Daniel Vetter wrote:
> On Mon, Mar 29, 2021 at 09:23:35PM +0300, Imre Deak wrote:
> > Hi Stephen,
> >
> > thanks for the report.
> >
> > On Mon, Mar 29, 2021 at 09:01:17AM +1100, Stephen Rothwell wrote:
> > > Hi all,
> > >
> > > On Fri, 26 Mar 2021 19:58
On Mon, Apr 05, 2021 at 01:18:15PM -0700, Matthias Kaehlcke wrote:
> Code for platform_device_create() and of_platform_device_create() is
platform_device_create()?
> only generated if CONFIG_OF_ADDRESS=y. Add stubs to avoid unresolved
> symbols when CONFIG_OF_ADDRESS is not set.
>
> Signed-off-b
From: Tomer Tayar
Clearing QM errors by the driver will prevent these H/W blocks from
stopping in case they are configured to stop on errors, so perform this
clearing only if this mode is not in use.
Signed-off-by: Tomer Tayar
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/m
From: Ohad Sharabi
In order to minimize hard coded values between F/W and the driver, we
send msi-x indexes dynamically to the F/W.
Signed-off-by: Ohad Sharabi
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/misc/habanalabs/common/firmware_if.c | 67 +
driver
From: Bharat Jauhari
DRAM scrubbing can take time hence it adds to latency during allocation.
To minimize latency during initialization, scrubbing is moved to release
call.
In case scrubbing fails it means the device is in a bad state,
hence HARD reset is initiated.
Signed-off-by: Bharat Jauhari
From: Ofir Bitton
As F/ security indication must be available before driver approaches
PCI bus, F/W security should be derived from PCI id rather than be
fetched during boot handshake with F/W.
Signed-off-by: Ofir Bitton
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/misc/ha
From: Ofir Bitton
As part of the securing GAUDI, the F/W will configure the PCI iATU
regions. If the driver identifies a secured PCI ID, it will know to
skip iATU configuration in a very early stage.
Signed-off-by: Ofir Bitton
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/m
We need to print a message to the kernel log in case we encounter
an unknown error in the f/w boot to help the user understand what
happened.
Signed-off-by: Oded Gabbay
---
drivers/misc/habanalabs/common/firmware_if.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drive
From: Ohad Sharabi
update files to latest version from F/W team.
Signed-off-by: Ohad Sharabi
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
.../misc/habanalabs/include/common/cpucp_if.h | 3 +-
.../habanalabs/include/common/hl_boot_if.h| 198 ++
2 files changed
On Wed, 07 Apr 2021 13:04:51 +0300, Matti Vaittinen wrote:
> BD9576MUF provides over-current protection and detection. Current is
> measured as voltage loss over external FET. Allow specifying FET's on
> resistance so current monitoring limits can be converted to voltages.
>
> Signed-off-by: Matti
On 4/8/21 4:06 PM, Mark Rutland wrote:
> On Thu, Apr 08, 2021 at 03:56:04PM +0100, Will Deacon wrote:
>> On Thu, Apr 08, 2021 at 03:37:23PM +0100, Vincenzo Frascino wrote:
>>> The check_mte_async_tcf macro sets the TIF flag non-atomically. This can
>>> race with another CPU doing a set_tsk_threa
Add support for using elliptic curve keys for signing modules. It uses
a NIST P384 (secp384r1) key if the user chooses an elliptic curve key
and will have ECDSA support built into the kernel.
Note: A developer choosing an ECDSA key for signing modules should still
delete the signing key (rm certs/
This series adds support for ECDSA-signed kernel modules. It also
attempts to address a kbuild issue where a developer created an ECDSA
key for signing kernel modules and then builds an older version of the
kernel, when bisecting the kernel for example, that does not support
ECDSA keys.
The first
Address a kbuild issue where a developer created an ECDSA key for signing
kernel modules and then builds an older version of the kernel, when bi-
secting the kernel for example, that does not support ECDSA keys.
Trigger the creation of an RSA module signing key if it is not an RSA key.
Fixes: cfc
On 01/04/2021 at 12:24, Claudiu Beznea - M18063 wrote:
On 01.04.2021 12:38, Claudiu Beznea - M18063 wrote:
On 31.03.2021 19:01, Alexandre Belloni wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
On 31/03/2021 13:59:06+0300, Claudiu Beznea wrote
On Thu, Apr 08, 2021, Vineeth Pillai wrote:
> Hi Vitaly,
>
> On 4/8/21 7:06 AM, Vitaly Kuznetsov wrote:
> > - if (ms_hyperv.hints & HV_X64_ENLIGHTENED_VMCS_RECOMMENDED) {
> > + /*
> > +* AMD does not need enlightened VMCS as VMCB is already a
> > +* datastructure in memory.
> > Well, V
On Thu, Apr 8, 2021 at 11:01 AM Trond Myklebust wrote:
>
> On Tue, 2021-04-06 at 19:16 -0500, Aditya Pakki wrote:
> > In gss_pipe_destroy_msg(), in case of error in msg, gss_release_msg
> > deletes gss_msg. The patch adds a check to avoid a potential double
> > free.
> >
> > Signed-off-by: Aditya
Hi,
On 08/04/2021 17:08:26+0200, Arnd Bergmann wrote:
> arch/arm/boot/dts/at91-sama5d2_ptc_ek.dt.yaml: /: 'etm@73C000' does
> not match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$',
> 'pinctrl-[0-9]+'
> arch/arm/boot/dts/at91-kizbox3-hs.dt.yaml: /: 'etm@73C000' does not
> match any of
Le 08/04/2021 à 10:50, Aneesh Kumar K.V a écrit :
Christophe Leroy writes:
flush_coherent_icache() can use any valid address as mentionned
by the comment.
Use PAGE_OFFSET as base address. This allows removing the
user access stuff.
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/me
Matthew Wilcox wrote:
> > +void end_page_private_2(struct page *page)
> > +{
> > + page = compound_head(page);
> > + VM_BUG_ON_PAGE(!PagePrivate2(page), page);
> > + clear_bit_unlock(PG_private_2, &page->flags);
> > + wake_up_page_bit(page, PG_private_2);
>
> ... but when we try to end o
On Thu, Apr 08, 2021 at 05:18:46PM +0200, Rafael J. Wysocki wrote:
> On Thu, Mar 25, 2021 at 8:27 AM Zhiqiang Liu wrote:
> >
> > From: Feilong Lin
> >
> > In enable_slot() in drivers/pci/hotplug/acpiphp_glue.c, if pci_get_slot()
> > will return NULL, we will do not set SLOT_ENABLED flag of slot.
On 4/8/21 5:14 PM, Pavel Tikhomirov wrote:
> Reproduce:
>
> modprobe sch_teql
> tc qdisc add dev teql0 root teql0
>
> This leads to (for instance in Centos 7 VM) OOPS:
>
>
>
> Null pointer dereference happens on master->slaves dereference in
> teql_destroy() as master is null-pointer.
>
On 4/8/21 4:18 PM, Mark Rutland wrote:
> Hi Vincenzo,
>
> On Thu, Apr 08, 2021 at 03:37:23PM +0100, Vincenzo Frascino wrote:
>> The check_mte_async_tcf macro sets the TIF flag non-atomically. This can
>> race with another CPU doing a set_tsk_thread_flag() and the flag can be
>> lost in the proc
On Thu, Apr 08, 2021 at 03:32:38PM +0200, Rafael J. Wysocki wrote:
> On Thu, Apr 8, 2021 at 3:15 PM Chris von Recklinghausen
> wrote:
> >
> > Suspend fails on a system in fips mode because md5 is used for the e820
> > integrity check and is not available. Use crc32 instead.
> >
> > This patch chan
On Tue, Apr 06, 2021 at 05:26:33PM +0800, Greentime Hu wrote:
> From: Paul Walmsley
>
> Add driver for the SiFive FU740 PCIe host controller.
> This controller is based on the DesignWare PCIe core.
>
> Signed-off-by: Paul Walmsley
> Co-developed-by: Henry Styles
> Signed-off-by: Henry Styles
On 2021-04-02 22:48, Dave Hansen wrote:
> On 4/2/21 1:20 PM, Jethro Beekman wrote:
>> On 2021-04-02 21:50, Dave Hansen wrote:
>>> Again, how does this save space?
>>>
>>> Are you literally talking about the temporary cost of allocating *one* page?
>>
>> No I'm talking about the amount of disk space
On Wed, Apr 07, 2021 at 11:29:26PM +0200, Siddharth Chandrasekaran wrote:
> Hyper-V supports the use of XMM registers to perform fast hypercalls.
> This allows guests to take advantage of the improved performance of the
> fast hypercall interface even though a hypercall may require more than
> (the
On 4/8/21 7:43 AM, frowand.l...@gmail.com wrote:
> From: Frank Rowand
>
> The Devicetree standard specifies an 8 byte alignment of the FDT.
> Code in libfdt expects this alignment for an FDT image in memory.
> kmemdup() returns 4 byte alignment on openrisc. Replace kmemdup()
> with kmalloc(), al
On Thu, Apr 08, 2021 at 08:29:00AM -0600, Edmundo Carmona Antoranz wrote:
> On Thu, Apr 8, 2021 at 6:10 AM Sergei Krainov
> wrote:
> > No side effects can be seen locally or in r8712_find_network()
>
> I am sorry to jump in. Sergei, what Greg is asking is basically why
> you want to delete the r8
On Thu, Apr 08, 2021 at 09:15:06AM -0400, Chris von Recklinghausen wrote:
> Suspend fails on a system in fips mode because md5 is used for the e820
> integrity check and is not available. Use crc32 instead.
>
> This patch changes the integrity check algorithm from md5 to
> crc32. This integrity ch
Hi,
On 31/03/2021 at 12:59, Claudiu Beznea wrote:
From: Eugen Hristev
Introduce new family of SoCs, sama7, and first SoC, sama7g5.
Signed-off-by: Eugen Hristev
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/sama7.c | 48 +
Cache flushing functions are in the middle of completely
unrelated stuff in mm/mem.c
Create a dedicated mm/cacheflush.c for those functions.
Also cleanup the list of included headers.
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/Makefile | 3 +-
arch/powerpc/mm/cacheflush.c | 255
__flush_dcache_icache() is only used in mem.c.
Move it before the functions that use it and declare it static.
And also fix the name of the parameter in the comment.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/cacheflush.h | 1 -
arch/powerpc/mm/cacheflush.c | 60 +++
Flushing functions don't rely on preemption being disabled, so
use kmap_local_page() instead of kmap_atomic().
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/cacheflush.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/mm/cacheflush.c b/
On Thu, Apr 8, 2021 at 3:59 PM Naresh Kamboju wrote:
> On Thu, 8 Apr 2021 at 15:17, Andy Shevchenko
> wrote:
> > On Thu, Apr 8, 2021 at 11:33 AM Naresh Kamboju
> > wrote:
> > > On Thu, 8 Apr 2021 at 04:21, Andy Shevchenko
> > > wrote:
> > > > On Thu, Apr 8, 2021 at 12:38 AM Naresh Kamboju
> >
On 08/04/21 17:28, Wei Liu wrote:
Although the Hyper-v TLFS mentions that a guest cannot use this feature
unless the hypervisor advertises support for it, some hypercalls which
we plan on upstreaming in future uses them anyway.
No, please don't do this. Check the feature bit(s) before you issue
flush_coherent_icache() can use any valid address as mentionned
by the comment.
Use PAGE_OFFSET as base address. This allows removing the
user access stuff.
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/cacheflush.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff
Signed-off-by: Andy Shevchenko
---
drivers/gpio/gpio-xilinx.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
index d5a08dcdd677..109b32104867 100644
--- a/drivers/gpio/gpio-xilinx.c
+++ b/drivers/gpio
flush_dcache_page() is only a few lines, it is worth
inlining.
ia64, csky, mips, openrisc and riscv have a similar
flush_dcache_page() and inline it.
On pmac32_defconfig, we get a small size reduction.
On ppc64_defconfig, we get a very small size increase.
In both case that's in the noise (less
flush_coherent_icache() doesn't need the address anymore,
so it can be called immediately when entering the public
functions and doesn't need to be disseminated among
lower level functions.
And use page_to_phys() instead of open coding the calculation
of phys address to call flush_dcache_icache_ph
flush_dcache_icache_hugepage() is a static function, with
only one caller. That caller calls it when PageCompound() is true,
so bugging on !PageCompound() is useless if we can trust the
compiler a little. Remove the BUG_ON(!PageCompound()).
The number of elements of a page won't change over time,
'And' the given page address with PAGE_MASK to help GCC.
With the patch:
0024 <__flush_dcache_icache>:
24: 54 63 00 26 rlwinm r3,r3,0,0,19
28: 39 40 00 40 li r10,64
2c: 7c 69 1b 78 mr r9,r3
30: 7d 49 03 a6 mtct
__flush_dcache_icache() is usable for non HIGHMEM pages on
every platform.
It is only for HIGHMEM pages that BOOKE needs kmap() and
BOOK3S needs flush_dcache_icache_phys().
So make flush_dcache_icache_phys() dependent on CONFIG_HIGHMEM and
call it only when it is a HIGHMEM page.
We could make fl
Hi guys,
There is a problem between the PT driver and the AUX allocator that results
in smaller buffers consisting of 2 high-order regions, which also means
only 2 possibilities of where PMI gets generated and where tracing stops.
This is not good enough for double buffering: when we get a PMI mi
Currently, we start allocating AUX pages half the size of the total
requested AUX buffer size, ignoring the attr.aux_watermark setting. This,
in turn, makes intel_pt driver disregard the watermark also, as it uses
page order for its SG (ToPA) configuration.
Now, this can be fixed in the intel_pt P
Turns out, the default setting of attr.aux_watermark to half of the total
buffer size is not very useful, especially with smaller buffers. The
problem is that, after half of the buffer is filled up, the kernel updates
->aux_head and sets up the next "transaction", while observing that
->aux_tail is
On 4/8/21 8:17 AM, frowand.l...@gmail.com wrote:
> From: Frank Rowand
>
> The Devicetree standard specifies an 8 byte alignment of the FDT.
> Code in libfdt expects this alignment for an FDT image in memory.
> kmemdup() returns 4 byte alignment on openrisc. Replace kmemdup()
> with kmalloc(), al
Today we get the following code generation for bitops like
set or clear bit:
c0009fe0: 39 40 08 00 li r10,2048
c0009fe4: 7c e0 40 28 lwarx r7,0,r8
c0009fe8: 7c e7 53 78 or r7,r7,r10
c0009fec: 7c e0 41 2d stwcx. r7
The following commit has been merged into the x86/sgx branch of tip:
Commit-ID: ae40aaf6bdbf0354a75b8284a0de453fcf5f4d32
Gitweb:
https://git.kernel.org/tip/ae40aaf6bdbf0354a75b8284a0de453fcf5f4d32
Author:Jarkko Sakkinen
AuthorDate:Thu, 08 Apr 2021 12:29:24 +03:00
Committer
Today we get the following code generation for atomic operations:
c001bb2c: 39 20 00 01 li r9,1
c001bb30: 7d 40 18 28 lwarx r10,0,r3
c001bb34: 7d 09 50 50 subfr8,r9,r10
c001bb38: 7d 00 19 2d stwcx. r8,0,r3
Hi,
This patch partially overlaps the following fix that I previously sent to
Andrew:
https://lkml.org/lkml/2021/4/8/114
Can you exclude two typo fixes of "retured -> returned" from yours ?
Thanks,
Ryusuke Konishi
On Thu, Apr 8, 2021 at 11:08 PM Lu Jialin wrote:
>
> numer -> number in fs/ni
On Thu, Apr 08, 2021 at 05:30:26PM +0200, Paolo Bonzini wrote:
> On 08/04/21 17:28, Wei Liu wrote:
> > > Although the Hyper-v TLFS mentions that a guest cannot use this feature
> > > unless the hypervisor advertises support for it, some hypercalls which
> > > we plan on upstreaming in future uses t
Hi Igor,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linuxtv-media/master]
[also build test WARNING on v5.12-rc6 next-20210408]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--bas
On Thu, Apr 08, 2021 at 05:30:26PM +0200, Paolo Bonzini wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you can confirm the sender and know the
> content is safe.
>
>
>
> On 08/04/21 17:28, Wei Liu wrote:
> > > Although the
On Thu, 2021-04-08 at 15:03 +0100, David Howells wrote:
> Here's a set of patches to do two things:
>
> (1) Add a helper library to handle the new VM readahead interface. This
> is intended to be used unconditionally by the filesystem (whether or
> not caching is enabled) and provides
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