Re: [PATCH] kernel/resource.c: fix muxed resource handling in __request_region()

[Vincent Pelletier]

On Mon, 22 Feb 2016 13:49:12 +, Alan Cox 
wrote:
> It's not used much, especially nowdays. The use case is basically multi
> I/O chips on the ISA/LPC bus with magic shared config register ports.

This is precisely a super I/O driver (gpio-f7188x) which, when used
with concurrent accesses on an SMP machine triggered the issue which
prompted this patch.

In case information on the original issue is desired:
My original report (ignore attached patch, it was rejected as it
breaks other chips supported by this driver):
  http://permalink.gmane.org/gmane.linux.kernel.gpio/10204
My test procedure (second half of the mail), which I used to validate
the patch against 4.1:
  http://permalink.gmane.org/gmane.linux.kernel.gpio/10216
Simon Guinot & Vincent Donnefort debugging results:
  http://permalink.gmane.org/gmane.linux.kernel.gpio/10521

Regards,
-- 
Vincent Pelletier

Re: [PATCH] kernel/resource.c: fix muxed resource handling in __request_region()

[Vincent Pelletier]

On Mon, 22 Feb 2016 13:49:12 +, Alan Cox 
wrote:
> It's not used much, especially nowdays. The use case is basically multi
> I/O chips on the ISA/LPC bus with magic shared config register ports.

This is precisely a super I/O driver (gpio-f7188x) which, when used
with concurrent accesses on an SMP machine triggered the issue which
prompted this patch.

In case information on the original issue is desired:
My original report (ignore attached patch, it was rejected as it
breaks other chips supported by this driver):
  http://permalink.gmane.org/gmane.linux.kernel.gpio/10204
My test procedure (second half of the mail), which I used to validate
the patch against 4.1:
  http://permalink.gmane.org/gmane.linux.kernel.gpio/10216
Simon Guinot & Vincent Donnefort debugging results:
  http://permalink.gmane.org/gmane.linux.kernel.gpio/10521

Regards,
-- 
Vincent Pelletier

RE: [PATCH net v2] r8169:fix "rtl_counters_cond == 1 (loop: 1000, delay: 10)" log spam.

[Hau]

> Nits:
> 
> - the tp->TxDescArray test provides the required synchronization: see
>   rtl8169_{open/close} and their pm_runtime_{get / put}.
> 
> - ioaddr is not really needed : tp->mmio_addr appears only once and it does
>   not mess the 72..80 cols limit.
> 
> - even if the device can only be automatically runtime suspended some time
>   after a link down event, you may address davem's point regarding stats
>   reliability and move rtl8169_rx_missed + rtl8169_update_counters after
>   rtl8169_net_suspend.

I will submit the new patch according to your advice.

Thanks.

Please consider the environment before printing this e-mail.

RE: [PATCH net v2] r8169:fix "rtl_counters_cond == 1 (loop: 1000, delay: 10)" log spam.

[Hau]

> Nits:
> 
> - the tp->TxDescArray test provides the required synchronization: see
>   rtl8169_{open/close} and their pm_runtime_{get / put}.
> 
> - ioaddr is not really needed : tp->mmio_addr appears only once and it does
>   not mess the 72..80 cols limit.
> 
> - even if the device can only be automatically runtime suspended some time
>   after a link down event, you may address davem's point regarding stats
>   reliability and move rtl8169_rx_missed + rtl8169_update_counters after
>   rtl8169_net_suspend.

I will submit the new patch according to your advice.

Thanks.

Please consider the environment before printing this e-mail.

Re: [PATCH 06/61] gpio: adp5520: Use devm_gpiochip_add_data() for gpio registration

[Michael Hennerich]

On 02/22/2016 03:07 PM, Laxman Dewangan wrote:

Use devm_gpiochip_add_data() for GPIO registration and remove the
call for gpiochip_remove() from error path.

Also remove the need of driver callback .remove.

Signed-off-by: Laxman Dewangan 


Acked-by: Michael Hennerich 


Cc: Michael Hennerich 
---
  drivers/gpio/gpio-adp5520.c | 13 +
  1 file changed, 1 insertion(+), 12 deletions(-)

diff --git a/drivers/gpio/gpio-adp5520.c b/drivers/gpio/gpio-adp5520.c
index 4fa7ff1..abf1996 100644
--- a/drivers/gpio/gpio-adp5520.c
+++ b/drivers/gpio/gpio-adp5520.c
@@ -153,7 +153,7 @@ static int adp5520_gpio_probe(struct platform_device *pdev)
goto err;
}

-   ret = gpiochip_add_data(>gpio_chip, dev);
+   ret = devm_gpiochip_add_data(>dev, >gpio_chip, dev);
if (ret)
goto err;

@@ -164,22 +164,11 @@ err:
return ret;
  }

-static int adp5520_gpio_remove(struct platform_device *pdev)
-{
-   struct adp5520_gpio *dev;
-
-   dev = platform_get_drvdata(pdev);
-   gpiochip_remove(>gpio_chip);
-
-   return 0;
-}
-
  static struct platform_driver adp5520_gpio_driver = {
.driver = {
.name   = "adp5520-gpio",
},
.probe  = adp5520_gpio_probe,
-   .remove = adp5520_gpio_remove,
  };

  module_platform_driver(adp5520_gpio_driver);




--
Greetings,
Michael

--
Analog Devices GmbH  Wilhelm-Wagenfeld-Str. 6  80807 Muenchen
Sitz der Gesellschaft: Muenchen; Registergericht: Muenchen HRB 40368;
Geschaeftsfuehrer:Dr.Carsten Suckrow, Thomas Wessel, William A. Martin,
Margaret Seif

Re: [PATCH 06/61] gpio: adp5520: Use devm_gpiochip_add_data() for gpio registration

[Michael Hennerich]

On 02/22/2016 03:07 PM, Laxman Dewangan wrote:

Use devm_gpiochip_add_data() for GPIO registration and remove the
call for gpiochip_remove() from error path.

Also remove the need of driver callback .remove.

Signed-off-by: Laxman Dewangan 


Acked-by: Michael Hennerich 


Cc: Michael Hennerich 
---
  drivers/gpio/gpio-adp5520.c | 13 +
  1 file changed, 1 insertion(+), 12 deletions(-)

diff --git a/drivers/gpio/gpio-adp5520.c b/drivers/gpio/gpio-adp5520.c
index 4fa7ff1..abf1996 100644
--- a/drivers/gpio/gpio-adp5520.c
+++ b/drivers/gpio/gpio-adp5520.c
@@ -153,7 +153,7 @@ static int adp5520_gpio_probe(struct platform_device *pdev)
goto err;
}

-   ret = gpiochip_add_data(>gpio_chip, dev);
+   ret = devm_gpiochip_add_data(>dev, >gpio_chip, dev);
if (ret)
goto err;

@@ -164,22 +164,11 @@ err:
return ret;
  }

-static int adp5520_gpio_remove(struct platform_device *pdev)
-{
-   struct adp5520_gpio *dev;
-
-   dev = platform_get_drvdata(pdev);
-   gpiochip_remove(>gpio_chip);
-
-   return 0;
-}
-
  static struct platform_driver adp5520_gpio_driver = {
.driver = {
.name   = "adp5520-gpio",
},
.probe  = adp5520_gpio_probe,
-   .remove = adp5520_gpio_remove,
  };

  module_platform_driver(adp5520_gpio_driver);




--
Greetings,
Michael

--
Analog Devices GmbH  Wilhelm-Wagenfeld-Str. 6  80807 Muenchen
Sitz der Gesellschaft: Muenchen; Registergericht: Muenchen HRB 40368;
Geschaeftsfuehrer:Dr.Carsten Suckrow, Thomas Wessel, William A. Martin,
Margaret Seif

Re: [PATCH 07/61] gpio: adp5588: Use devm_gpiochip_add_data() for gpio registration

[Michael Hennerich]

On 02/22/2016 03:07 PM, Laxman Dewangan wrote:

Use devm_gpiochip_add_data() for GPIO registration and remove the
call for gpiochip_remove() from remove callback.

Signed-off-by: Laxman Dewangan 


Acked-by: Michael Hennerich 


Cc: Michael Hennerich 
---
  drivers/gpio/gpio-adp5588.c | 4 +---
  1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpio/gpio-adp5588.c b/drivers/gpio/gpio-adp5588.c
index 19a0eba..c0f718b 100644
--- a/drivers/gpio/gpio-adp5588.c
+++ b/drivers/gpio/gpio-adp5588.c
@@ -414,7 +414,7 @@ static int adp5588_gpio_probe(struct i2c_client *client,
}
}

-   ret = gpiochip_add_data(>gpio_chip, dev);
+   ret = devm_gpiochip_add_data(>dev, >gpio_chip, dev);
if (ret)
goto err_irq;

@@ -457,8 +457,6 @@ static int adp5588_gpio_remove(struct i2c_client *client)
if (dev->irq_base)
free_irq(dev->client->irq, dev);

-   gpiochip_remove(>gpio_chip);
-
return 0;
  }





--
Greetings,
Michael

--
Analog Devices GmbH  Wilhelm-Wagenfeld-Str. 6  80807 Muenchen
Sitz der Gesellschaft: Muenchen; Registergericht: Muenchen HRB 40368;
Geschaeftsfuehrer:Dr.Carsten Suckrow, Thomas Wessel, William A. Martin,
Margaret Seif

Re: [PATCH 07/61] gpio: adp5588: Use devm_gpiochip_add_data() for gpio registration

[Michael Hennerich]

On 02/22/2016 03:07 PM, Laxman Dewangan wrote:

Use devm_gpiochip_add_data() for GPIO registration and remove the
call for gpiochip_remove() from remove callback.

Signed-off-by: Laxman Dewangan 


Acked-by: Michael Hennerich 


Cc: Michael Hennerich 
---
  drivers/gpio/gpio-adp5588.c | 4 +---
  1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpio/gpio-adp5588.c b/drivers/gpio/gpio-adp5588.c
index 19a0eba..c0f718b 100644
--- a/drivers/gpio/gpio-adp5588.c
+++ b/drivers/gpio/gpio-adp5588.c
@@ -414,7 +414,7 @@ static int adp5588_gpio_probe(struct i2c_client *client,
}
}

-   ret = gpiochip_add_data(>gpio_chip, dev);
+   ret = devm_gpiochip_add_data(>dev, >gpio_chip, dev);
if (ret)
goto err_irq;

@@ -457,8 +457,6 @@ static int adp5588_gpio_remove(struct i2c_client *client)
if (dev->irq_base)
free_irq(dev->client->irq, dev);

-   gpiochip_remove(>gpio_chip);
-
return 0;
  }





--
Greetings,
Michael

--
Analog Devices GmbH  Wilhelm-Wagenfeld-Str. 6  80807 Muenchen
Sitz der Gesellschaft: Muenchen; Registergericht: Muenchen HRB 40368;
Geschaeftsfuehrer:Dr.Carsten Suckrow, Thomas Wessel, William A. Martin,
Margaret Seif

Re: [PATCH 3/6] perf, tools, stat: Support metrics in --per-core/socket mode

[Jiri Olsa]

On Mon, Feb 22, 2016 at 05:52:02PM +0100, Andi Kleen wrote:
> On Sun, Feb 21, 2016 at 06:15:35PM +0100, Jiri Olsa wrote:
> > On Wed, Feb 17, 2016 at 02:44:02PM -0800, Andi Kleen wrote:
> > 
> > SNIP
> > 
> > > @@ -892,7 +908,10 @@ static void printout(int id, int nr, struct 
> > > perf_evsel *counter, double uval,
> > >   struct perf_stat_output_ctx out;
> > >   struct outstate os = {
> > >   .fh = stat_config.output,
> > > - .prefix = prefix ? prefix : ""
> > > + .prefix = prefix ? prefix : "",
> > > + .id = id,
> > > + .nr = nr,
> > > + .evsel = counter,
> > >   };
> > >   print_metric_t pm = print_metric_std;
> > >   void (*nl)(void *);
> > > @@ -962,15 +981,38 @@ static void printout(int id, int nr, struct 
> > > perf_evsel *counter, double uval,
> > >  
> > >   perf_stat__print_shadow_stats(counter, uval,
> > >   stat_config.aggr_mode == AGGR_GLOBAL ? 0 :
> > > - cpu_map__id_to_cpu(id),
> > > + first_shadow_cpu(counter, id),
> > 
> > hum, IIUC you need to handle AGGR_NONE in here as well?
> 
> AFAIK it works. aggr_get_id in first_shadow_cpu and cpu_map__id_to_cpu
> handle this case, right?

it does not look like.. however it'll be more clear once
there's the doc/comment about used cpus for aggr modes
I asked for in here:

  http://marc.info/?l=linux-kernel=145607533503803=2

thanks,
jirka

Re: [PATCH 3/6] perf, tools, stat: Support metrics in --per-core/socket mode

[Jiri Olsa]

On Mon, Feb 22, 2016 at 05:52:02PM +0100, Andi Kleen wrote:
> On Sun, Feb 21, 2016 at 06:15:35PM +0100, Jiri Olsa wrote:
> > On Wed, Feb 17, 2016 at 02:44:02PM -0800, Andi Kleen wrote:
> > 
> > SNIP
> > 
> > > @@ -892,7 +908,10 @@ static void printout(int id, int nr, struct 
> > > perf_evsel *counter, double uval,
> > >   struct perf_stat_output_ctx out;
> > >   struct outstate os = {
> > >   .fh = stat_config.output,
> > > - .prefix = prefix ? prefix : ""
> > > + .prefix = prefix ? prefix : "",
> > > + .id = id,
> > > + .nr = nr,
> > > + .evsel = counter,
> > >   };
> > >   print_metric_t pm = print_metric_std;
> > >   void (*nl)(void *);
> > > @@ -962,15 +981,38 @@ static void printout(int id, int nr, struct 
> > > perf_evsel *counter, double uval,
> > >  
> > >   perf_stat__print_shadow_stats(counter, uval,
> > >   stat_config.aggr_mode == AGGR_GLOBAL ? 0 :
> > > - cpu_map__id_to_cpu(id),
> > > + first_shadow_cpu(counter, id),
> > 
> > hum, IIUC you need to handle AGGR_NONE in here as well?
> 
> AFAIK it works. aggr_get_id in first_shadow_cpu and cpu_map__id_to_cpu
> handle this case, right?

it does not look like.. however it'll be more clear once
there's the doc/comment about used cpus for aggr modes
I asked for in here:

  http://marc.info/?l=linux-kernel=145607533503803=2

thanks,
jirka

[PATCH v11 1/2] Documentation: bridge: Add documentation for ps8640 DT properties

[Jitao Shi]

Add documentation for DT properties supported by
ps8640 DSI-eDP converter.

Signed-off-by: Jitao Shi 
Acked-by: Rob Herring 
Reviewed-by: Philipp Zabel 
---
Chnages since v10:
 - set sleep reset pin as GPIO_ACTIVE_LOW
---
 .../devicetree/bindings/display/bridge/ps8640.txt  |   43 
 1 file changed, 43 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/ps8640.txt

diff --git a/Documentation/devicetree/bindings/display/bridge/ps8640.txt 
b/Documentation/devicetree/bindings/display/bridge/ps8640.txt
new file mode 100644
index 000..022b33f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/ps8640.txt
@@ -0,0 +1,43 @@
+ps8640-bridge bindings
+
+Required properties:
+   - compatible: "parade,ps8640"
+   - reg: first page address of the bridge.
+   - sleep-gpios: OF device-tree gpio specification for PD pin.
+   - reset-gpios: OF device-tree gpio specification for reset pin.
+   - mode-sel-gpios: OF device-tree gpio specification for mode-sel pin.
+   - vdd12-supply: OF device-tree regulator specification for 1.2V power.
+   - vdd33-supply: OF device-tree regulator specification for 3.3V power.
+   - ports: The device node can contain video interface port nodes per
+the video-interfaces bind[1]. For port@0,set the reg = <0> as
+ps8640 dsi in and port@1,set the reg = <1> as ps8640 eDP out.
+
+[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+   edp-bridge@18 {
+   compatible = "parade,ps8640";
+   reg = <0x18>;
+   sleep-gpios = < 116 GPIO_ACTIVE_LOW>;
+   reset-gpios = < 115 GPIO_ACTIVE_LOW>;
+   mode-sel-gpios = < 92 GPIO_ACTIVE_HIGH>;
+   vdd12-supply = <_fixed_1v2>;
+   vdd33-supply = <_vgp2_reg>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   port@0 {
+   reg = <0>;
+   ps8640_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   port@1 {
+   reg = <1>;
+   ps8640_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
-- 
1.7.9.5

[PATCH v11 1/2] Documentation: bridge: Add documentation for ps8640 DT properties

[Jitao Shi]

Add documentation for DT properties supported by
ps8640 DSI-eDP converter.

Signed-off-by: Jitao Shi 
Acked-by: Rob Herring 
Reviewed-by: Philipp Zabel 
---
Chnages since v10:
 - set sleep reset pin as GPIO_ACTIVE_LOW
---
 .../devicetree/bindings/display/bridge/ps8640.txt  |   43 
 1 file changed, 43 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/ps8640.txt

diff --git a/Documentation/devicetree/bindings/display/bridge/ps8640.txt 
b/Documentation/devicetree/bindings/display/bridge/ps8640.txt
new file mode 100644
index 000..022b33f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/ps8640.txt
@@ -0,0 +1,43 @@
+ps8640-bridge bindings
+
+Required properties:
+   - compatible: "parade,ps8640"
+   - reg: first page address of the bridge.
+   - sleep-gpios: OF device-tree gpio specification for PD pin.
+   - reset-gpios: OF device-tree gpio specification for reset pin.
+   - mode-sel-gpios: OF device-tree gpio specification for mode-sel pin.
+   - vdd12-supply: OF device-tree regulator specification for 1.2V power.
+   - vdd33-supply: OF device-tree regulator specification for 3.3V power.
+   - ports: The device node can contain video interface port nodes per
+the video-interfaces bind[1]. For port@0,set the reg = <0> as
+ps8640 dsi in and port@1,set the reg = <1> as ps8640 eDP out.
+
+[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+   edp-bridge@18 {
+   compatible = "parade,ps8640";
+   reg = <0x18>;
+   sleep-gpios = < 116 GPIO_ACTIVE_LOW>;
+   reset-gpios = < 115 GPIO_ACTIVE_LOW>;
+   mode-sel-gpios = < 92 GPIO_ACTIVE_HIGH>;
+   vdd12-supply = <_fixed_1v2>;
+   vdd33-supply = <_vgp2_reg>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   port@0 {
+   reg = <0>;
+   ps8640_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   port@1 {
+   reg = <1>;
+   ps8640_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
-- 
1.7.9.5

[PATCH v11 2/2] drm/bridge: Add I2C based driver for ps8640 bridge

[Jitao Shi]

This patch adds drm_bridge driver for parade DSI to eDP bridge chip.

Signed-off-by: Jitao Shi 
---
 Changes since v10:
 - Tuning PS8640 reset sleep pins squence
 
The following patches are needed to support dsi host through none dsi bus:

https://patchwork.kernel.org/patch/8289181/ ("drm/dsi: check for CONFIG_OF when 
defining")
https://patchwork.kernel.org/patch/8289051/ ("drm/dsi: Use 
mipi_dsi_device_register_full for DSI device")
https://patchwork.kernel.org/patch/8289081/ ("drm/dsi: Try to match non-DT DSI 
devices")
https://patchwork.kernel.org/patch/8289121/ ("drm/dsi: Add routine to 
unregister a DSI device")
https://patchwork.kernel.org/patch/8289091/ ("drm/dsi: Get DSI host by DT 
device node")
---
 drivers/gpu/drm/bridge/Kconfig |   11 +
 drivers/gpu/drm/bridge/Makefile|1 +
 drivers/gpu/drm/bridge/parade-ps8640.c | 1060 
 3 files changed, 1072 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/parade-ps8640.c

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index 27e2022..b4edd8c 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -40,4 +40,15 @@ config DRM_PARADE_PS8622
---help---
  Parade eDP-LVDS bridge chip driver.
 
+config DRM_PARADE_PS8640
+   tristate "Parade PS8640 MIPI DSI to eDP Converter"
+   depends on OF && I2C
+   select DRM_KMS_HELPER
+   select DRM_MIPI_DSI
+   select DRM_PANEL
+   ---help---
+ Choose this option if you have PS8640 for display
+ The PS8640 is a high-performance and low-power
+ MIPI DSI to eDP converter
+
 endmenu
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index f13c33d..fbe38dc 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
 obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
 obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
 obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
+obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o
diff --git a/drivers/gpu/drm/bridge/parade-ps8640.c 
b/drivers/gpu/drm/bridge/parade-ps8640.c
new file mode 100644
index 000..d7410df
--- /dev/null
+++ b/drivers/gpu/drm/bridge/parade-ps8640.c
@@ -0,0 +1,1060 @@
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define PAGE2_SPI_CFG3 0x82
+#define I2C_TO_SPI_RESET   0x20
+#define PAGE2_ROMADD_BYTE1 0x8e
+#define PAGE2_ROMADD_BYTE2 0x8f
+#define PAGE2_SWSPI_WDATA  0x90
+#define PAGE2_SWSPI_RDATA  0x91
+#define PAGE2_SWSPI_LEN0x92
+#define PAGE2_SWSPI_CTL0x93
+#define TRIGGER_NO_READBACK0x05
+#define TRIGGER_READBACK   0x01
+#define PAGE2_SPI_STATUS   0x9e
+#define PAGE2_GPIO_L   0xa6
+#define PAGE2_GPIO_H   0xa7
+#define PS_GPIO9   BIT(1)
+#define PAGE2_IROM_CTRL0xb0
+#define IROM_ENABLE0xc0
+#define IROM_DISABLE   0x80
+#define PAGE2_SW_REST  0xbc
+#define SPI_SW_RESET   BIT(7)
+#define MPU_SW_RESET   BIT(6)
+#define PAGE2_ENCTLSPI_WR  0xda
+#define PAGE2_I2C_BYPASS   0xea
+#define I2C_BYPASS_EN  0xd0
+#define PAGE3_SET_ADD  0xfe
+#define PAGE3_SET_VAL  0xff
+#define VDO_CTL_ADD0x13
+#define VDO_DIS0x18
+#define VDO_EN 0x1c
+#define PAGE4_REV_L0xf0
+#define PAGE4_REV_H0xf1
+#define PAGE4_CHIP_L   0xf2
+#define PAGE4_CHIP_H   0xf3
+
+/* Firmware */
+#define SPI_MAX_RETRY_CNT  8
+#define PS_FW_NAME "ps864x_fw.bin"
+
+#define FW_CHIP_ID_OFFSET  0
+#define FW_VERSION_OFFSET  2
+#define EDID_I2C_ADDR  0x50
+
+#define WRITE_STATUS_REG_CMD   0x01
+#define READ_STATUS_REG_CMD0x05
+#define CLEAR_ALL_PROTECT  0x00
+#define BLK_PROTECT_BITS   0x0c
+#define STATUS_REG_PROTECT BIT(7)
+#define WRITE_ENABLE_CMD   0x06
+#define CHIP_ERASE_CMD 0xc7
+
+#define bridge_to_ps8640(e)container_of(e, struct ps8640, bridge)
+#define connector_to_ps8640(e) container_of(e, struct ps8640, connector)
+
+struct ps8640_info {
+   u8 family_id;
+   u8 variant_id;
+   u16 version;

[PATCH v11 2/2] drm/bridge: Add I2C based driver for ps8640 bridge

[Jitao Shi]

This patch adds drm_bridge driver for parade DSI to eDP bridge chip.

Signed-off-by: Jitao Shi 
---
 Changes since v10:
 - Tuning PS8640 reset sleep pins squence
 
The following patches are needed to support dsi host through none dsi bus:

https://patchwork.kernel.org/patch/8289181/ ("drm/dsi: check for CONFIG_OF when 
defining")
https://patchwork.kernel.org/patch/8289051/ ("drm/dsi: Use 
mipi_dsi_device_register_full for DSI device")
https://patchwork.kernel.org/patch/8289081/ ("drm/dsi: Try to match non-DT DSI 
devices")
https://patchwork.kernel.org/patch/8289121/ ("drm/dsi: Add routine to 
unregister a DSI device")
https://patchwork.kernel.org/patch/8289091/ ("drm/dsi: Get DSI host by DT 
device node")
---
 drivers/gpu/drm/bridge/Kconfig |   11 +
 drivers/gpu/drm/bridge/Makefile|1 +
 drivers/gpu/drm/bridge/parade-ps8640.c | 1060 
 3 files changed, 1072 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/parade-ps8640.c

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index 27e2022..b4edd8c 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -40,4 +40,15 @@ config DRM_PARADE_PS8622
---help---
  Parade eDP-LVDS bridge chip driver.
 
+config DRM_PARADE_PS8640
+   tristate "Parade PS8640 MIPI DSI to eDP Converter"
+   depends on OF && I2C
+   select DRM_KMS_HELPER
+   select DRM_MIPI_DSI
+   select DRM_PANEL
+   ---help---
+ Choose this option if you have PS8640 for display
+ The PS8640 is a high-performance and low-power
+ MIPI DSI to eDP converter
+
 endmenu
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index f13c33d..fbe38dc 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
 obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
 obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
 obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
+obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o
diff --git a/drivers/gpu/drm/bridge/parade-ps8640.c 
b/drivers/gpu/drm/bridge/parade-ps8640.c
new file mode 100644
index 000..d7410df
--- /dev/null
+++ b/drivers/gpu/drm/bridge/parade-ps8640.c
@@ -0,0 +1,1060 @@
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define PAGE2_SPI_CFG3 0x82
+#define I2C_TO_SPI_RESET   0x20
+#define PAGE2_ROMADD_BYTE1 0x8e
+#define PAGE2_ROMADD_BYTE2 0x8f
+#define PAGE2_SWSPI_WDATA  0x90
+#define PAGE2_SWSPI_RDATA  0x91
+#define PAGE2_SWSPI_LEN0x92
+#define PAGE2_SWSPI_CTL0x93
+#define TRIGGER_NO_READBACK0x05
+#define TRIGGER_READBACK   0x01
+#define PAGE2_SPI_STATUS   0x9e
+#define PAGE2_GPIO_L   0xa6
+#define PAGE2_GPIO_H   0xa7
+#define PS_GPIO9   BIT(1)
+#define PAGE2_IROM_CTRL0xb0
+#define IROM_ENABLE0xc0
+#define IROM_DISABLE   0x80
+#define PAGE2_SW_REST  0xbc
+#define SPI_SW_RESET   BIT(7)
+#define MPU_SW_RESET   BIT(6)
+#define PAGE2_ENCTLSPI_WR  0xda
+#define PAGE2_I2C_BYPASS   0xea
+#define I2C_BYPASS_EN  0xd0
+#define PAGE3_SET_ADD  0xfe
+#define PAGE3_SET_VAL  0xff
+#define VDO_CTL_ADD0x13
+#define VDO_DIS0x18
+#define VDO_EN 0x1c
+#define PAGE4_REV_L0xf0
+#define PAGE4_REV_H0xf1
+#define PAGE4_CHIP_L   0xf2
+#define PAGE4_CHIP_H   0xf3
+
+/* Firmware */
+#define SPI_MAX_RETRY_CNT  8
+#define PS_FW_NAME "ps864x_fw.bin"
+
+#define FW_CHIP_ID_OFFSET  0
+#define FW_VERSION_OFFSET  2
+#define EDID_I2C_ADDR  0x50
+
+#define WRITE_STATUS_REG_CMD   0x01
+#define READ_STATUS_REG_CMD0x05
+#define CLEAR_ALL_PROTECT  0x00
+#define BLK_PROTECT_BITS   0x0c
+#define STATUS_REG_PROTECT BIT(7)
+#define WRITE_ENABLE_CMD   0x06
+#define CHIP_ERASE_CMD 0xc7
+
+#define bridge_to_ps8640(e)container_of(e, struct ps8640, bridge)
+#define connector_to_ps8640(e) container_of(e, struct ps8640, connector)
+
+struct ps8640_info {
+   u8 family_id;
+   u8 variant_id;
+   u16 version;
+};
+
+struct ps8640 {
+   

[PATCH v3 02/11] tools/lguest: make lguest launcher use X86_SUBARCH_LGUEST explicitly

[Luis R. Rodriguez]

Be explicit and make use of X86_SUBARCH_LGUEST directly.

Signed-off-by: Luis R. Rodriguez 
---
 tools/lguest/lguest.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/lguest/lguest.c b/tools/lguest/lguest.c
index 80159e6811c2..ff0aa580c6e1 100644
--- a/tools/lguest/lguest.c
+++ b/tools/lguest/lguest.c
@@ -3351,8 +3351,8 @@ int main(int argc, char *argv[])
/* Boot protocol version: 2.07 supports the fields for lguest. */
boot->hdr.version = 0x207;
 
-   /* The hardware_subarch value of "1" tells the Guest it's an lguest. */
-   boot->hdr.hardware_subarch = 1;
+   /* X86_SUBARCH_LGUEST tells the Guest it's an lguest. */
+   boot->hdr.hardware_subarch = X86_SUBARCH_LGUEST;
 
/* Tell the entry path not to try to reload segment registers. */
boot->hdr.loadflags |= KEEP_SEGMENTS;
-- 
2.7.0

[PATCH v3 02/11] tools/lguest: make lguest launcher use X86_SUBARCH_LGUEST explicitly

[Luis R. Rodriguez]

Be explicit and make use of X86_SUBARCH_LGUEST directly.

Signed-off-by: Luis R. Rodriguez 
---
 tools/lguest/lguest.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/lguest/lguest.c b/tools/lguest/lguest.c
index 80159e6811c2..ff0aa580c6e1 100644
--- a/tools/lguest/lguest.c
+++ b/tools/lguest/lguest.c
@@ -3351,8 +3351,8 @@ int main(int argc, char *argv[])
/* Boot protocol version: 2.07 supports the fields for lguest. */
boot->hdr.version = 0x207;
 
-   /* The hardware_subarch value of "1" tells the Guest it's an lguest. */
-   boot->hdr.hardware_subarch = 1;
+   /* X86_SUBARCH_LGUEST tells the Guest it's an lguest. */
+   boot->hdr.hardware_subarch = X86_SUBARCH_LGUEST;
 
/* Tell the entry path not to try to reload segment registers. */
boot->hdr.loadflags |= KEEP_SEGMENTS;
-- 
2.7.0

[PATCH v3 2/2] power: ucs1002: Add support for Programmable USB Port Power Controller

[Enric Balletbo i Serra]

The UCS1002-2 provides a USB port power switch for precise control of up
to 2.5 amperes continuous current with over-current limit (OCL), dynamic
thermal management, latch or auto-recovery (low test current) fault
handling, selectable active low or high enable, under- and over-voltage
lockout, back-drive protection, and back-voltage protection.

Signed-off-by: Enric Balletbo i Serra 
---
Changes since v2:
 - Rename microchip,current-limit to microchip,limit-microamps (Rob Herring)
Changes since v1:
 - Fix ERROR: info -> pdata is NULL but dereferenced (kbuild)
 - Change CONFIG_POWER_UCS1002 to CONFIG_UCS1002_POWER, seems more standard
   (Enric Balletbo)

 drivers/power/Kconfig |7 +
 drivers/power/Makefile|1 +
 drivers/power/ucs1002_power.c | 1004 +
 3 files changed, 1012 insertions(+)
 create mode 100644 drivers/power/ucs1002_power.c

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 1ddd13c..534e9db 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -502,6 +502,13 @@ config AXP20X_POWER
  This driver provides support for the power supply features of
  AXP20x PMIC.
 
+config UCS1002_POWER
+   tristate "UCS1002-2 power supply driver"
+   select REGMAP_I2C
+   help
+ This driver provices support for UCS1002-2 Programmable USB Port
+ Power Controller.
+
 endif # POWER_SUPPLY
 
 source "drivers/power/reset/Kconfig"
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 0e4eab5..936d2e1 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -73,3 +73,4 @@ obj-$(CONFIG_CHARGER_TPS65217)+= tps65217_charger.o
 obj-$(CONFIG_POWER_RESET)  += reset/
 obj-$(CONFIG_AXP288_FUEL_GAUGE) += axp288_fuel_gauge.o
 obj-$(CONFIG_AXP288_CHARGER)   += axp288_charger.o
+obj-$(CONFIG_UCS1002_POWER)+= ucs1002_power.o
diff --git a/drivers/power/ucs1002_power.c b/drivers/power/ucs1002_power.c
new file mode 100644
index 000..4f0e4ff
--- /dev/null
+++ b/drivers/power/ucs1002_power.c
@@ -0,0 +1,1004 @@
+/*
+ * Driver for UCS1002 Programmable USB Port Power Controller
+ *
+ * Copyright (C) 2016 Zodiac Inflight Innovations
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ *
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define POLL_INTERVAL  (HZ * 2)
+
+/* UCS1002 Registers */
+#define UCS1002_REG_CURRENT_MEASUREMENT0x00
+
+/*
+ * The Total Accumulated Charge registers store the total accumulated charge
+ * delivered from the VS source to a portable device. The total value is
+ * calculated using four registers, from 01h to 04h. The bit weighting of
+ * the registers is given in mA/hrs.
+ */
+#define UCS1002_REG_TOTAL_ACC_CHARGE   0x01
+
+/* Other Status Register */
+#define UCS1020_REG_OTHER_STATUS   0x0f
+#  define F_ALERT_PIN  BIT(5)
+#  define F_ADET_PIN   BIT(4)
+#  define F_CHG_ACTBIT(3)
+#  define F_EM_ACT BIT(2)
+#  define F_EM_STEP_MASK   0x03
+
+/* Interrupt Status */
+#define UCS1002_REG_INTERRUPT_STATUS   0x10
+#  define F_DISCHARGE_ERR  BIT(6)
+#  define F_RESET  BIT(5)
+#  define F_MIN_KEEP_OUT   BIT(4)
+#  define F_TSDBIT(3)
+#  define F_OVER_VOLT  BIT(2)
+#  define F_BACK_VOLT  BIT(1)
+#  define F_OVER_ILIM  BIT(0)
+
+/* Pin Status Register */
+#define UCS1002_REG_PIN_STATUS 0x14
+#  define UCS1002_PWR_STATE_MASK   0x03
+#  define F_PWR_EN_PIN BIT(6)
+#  define F_M2_PIN BIT(5)
+#  define F_M1_PIN BIT(4)
+#  define F_EM_EN_PIN  BIT(3)
+#  define F_SEL_PINBIT(2)
+#  define F_ACTIVE_MODE_MASK   0x38
+#  define F_ACTIVE_MODE_SHIFT  3
+
+/* General Configuration Register */
+#define UCS1002_REG_GENERAL_CFG0x15
+#  define F_ALERT_MASK BIT(6)
+#  define F_ALERT_LINK BIT(5)
+#  define F_DISCHARGE  BIT(4)
+#  define F_RATION_EN  BIT(3)
+#  define F_RATION_RST BIT(2)
+#  define F_RATION_BEH_MASK0x03
+#  define F_RATION_BEH_REPORT  0x00

[PATCH v3 1/2] devicetree: Add UCS1002 USB Port Power Controller binding

[Enric Balletbo i Serra]

The UCS1002-2 provides a USB port power switch for precise control of up
to 2.5 amperes continuous current.

You can add support to your board with current binding.

Example:

ucs1002: ucs1002@57 {
 compatible = "microchip,ucs1002";
 reg = <0x57>;
};

Signed-off-by: Enric Balletbo i Serra 
---
Changes since v2:
 - Rename microchip,current-limit to microchip,limit-microamps (Rob Herring)
Changes since v1:
 - Fix units, are microamps (Rob Herring)
 - Remove microchip,pin-ignore as is implied by absence of gpio properties (Rob
   Herring)
 - Group control gpios instead of use separate gpios. All control gpios must be
   set together (Enric Balletbo)

 .../devicetree/bindings/power/ucs1002.txt  | 41 ++
 1 file changed, 41 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/power/ucs1002.txt

diff --git a/Documentation/devicetree/bindings/power/ucs1002.txt 
b/Documentation/devicetree/bindings/power/ucs1002.txt
new file mode 100644
index 000..31f6e49
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/ucs1002.txt
@@ -0,0 +1,41 @@
+UCS1002-2 Programmable USB Port Power Controller with Charger Emulation 
bindings
+
+Required properties:
+- compatible: "microchip,ucs1002"
+- reg: integer, the I2C address of the device.
+
+Optional properties:
+- interrupt-parent: the phandle of the interrupt controller that services
+interrupts for this device.
+- interrupts: interrupt specifiers for two interrupt sources.
+- First interrupt specifier is for A_DET interrupt.
+- Second interrupt specifier is for ALERT interrupt.
+- microchip,limit-microamps: integer, maximum current in microamps. Note that 
the
+default value is based on the resistor on the COMM_SEL/ILIM pin and this
+value cannot be changed to be higher than hardware set value. Accepted
+values are: 50, 90, 100, 120, 150, 180, 200 and
+250 (microamps).
+- control-gpios = list of gpios used as pin states when determining the active 
mode
+selection and power state. Must provide EM_EN, M1, M2 and PWR_EN gpio 
mapping.
+If this property is not set it uses I2C for configuration.
+
+Example (polling):
+
+   ucs1002: ucs1002@57 {
+   compatible = "microchip,ucs1002";
+   reg = <0x57>;
+   microchip,limit-microamps = <200>;
+   };
+
+Example (interrupts + control gpios):
+
+   ucs1002: ucs1002@57 {
+   compatible = "microchip,ucs1002";
+   reg = <0x57>;
+   interrupt-parent = <>;
+   interrupts = <30 0>, <31 0>;
+   control-gpios = < 2 GPIO_ACTIVE_HIGH>,/* EM_EN */
+   < 3 GPIO_ACTIVE_HIGH>,/* M1 */
+   < 17 GPIO_ACTIVE_HIGH>,   /* M2 */
+   < 19 0>;  /* PWR_EN */
+   };
-- 
2.1.0

[PATCH v3 1/2] devicetree: Add UCS1002 USB Port Power Controller binding

[Enric Balletbo i Serra]

The UCS1002-2 provides a USB port power switch for precise control of up
to 2.5 amperes continuous current.

You can add support to your board with current binding.

Example:

ucs1002: ucs1002@57 {
 compatible = "microchip,ucs1002";
 reg = <0x57>;
};

Signed-off-by: Enric Balletbo i Serra 
---
Changes since v2:
 - Rename microchip,current-limit to microchip,limit-microamps (Rob Herring)
Changes since v1:
 - Fix units, are microamps (Rob Herring)
 - Remove microchip,pin-ignore as is implied by absence of gpio properties (Rob
   Herring)
 - Group control gpios instead of use separate gpios. All control gpios must be
   set together (Enric Balletbo)

 .../devicetree/bindings/power/ucs1002.txt  | 41 ++
 1 file changed, 41 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/power/ucs1002.txt

diff --git a/Documentation/devicetree/bindings/power/ucs1002.txt 
b/Documentation/devicetree/bindings/power/ucs1002.txt
new file mode 100644
index 000..31f6e49
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/ucs1002.txt
@@ -0,0 +1,41 @@
+UCS1002-2 Programmable USB Port Power Controller with Charger Emulation 
bindings
+
+Required properties:
+- compatible: "microchip,ucs1002"
+- reg: integer, the I2C address of the device.
+
+Optional properties:
+- interrupt-parent: the phandle of the interrupt controller that services
+interrupts for this device.
+- interrupts: interrupt specifiers for two interrupt sources.
+- First interrupt specifier is for A_DET interrupt.
+- Second interrupt specifier is for ALERT interrupt.
+- microchip,limit-microamps: integer, maximum current in microamps. Note that 
the
+default value is based on the resistor on the COMM_SEL/ILIM pin and this
+value cannot be changed to be higher than hardware set value. Accepted
+values are: 50, 90, 100, 120, 150, 180, 200 and
+250 (microamps).
+- control-gpios = list of gpios used as pin states when determining the active 
mode
+selection and power state. Must provide EM_EN, M1, M2 and PWR_EN gpio 
mapping.
+If this property is not set it uses I2C for configuration.
+
+Example (polling):
+
+   ucs1002: ucs1002@57 {
+   compatible = "microchip,ucs1002";
+   reg = <0x57>;
+   microchip,limit-microamps = <200>;
+   };
+
+Example (interrupts + control gpios):
+
+   ucs1002: ucs1002@57 {
+   compatible = "microchip,ucs1002";
+   reg = <0x57>;
+   interrupt-parent = <>;
+   interrupts = <30 0>, <31 0>;
+   control-gpios = < 2 GPIO_ACTIVE_HIGH>,/* EM_EN */
+   < 3 GPIO_ACTIVE_HIGH>,/* M1 */
+   < 17 GPIO_ACTIVE_HIGH>,   /* M2 */
+   < 19 0>;  /* PWR_EN */
+   };
-- 
2.1.0

[PATCH v3 2/2] power: ucs1002: Add support for Programmable USB Port Power Controller

[Enric Balletbo i Serra]

The UCS1002-2 provides a USB port power switch for precise control of up
to 2.5 amperes continuous current with over-current limit (OCL), dynamic
thermal management, latch or auto-recovery (low test current) fault
handling, selectable active low or high enable, under- and over-voltage
lockout, back-drive protection, and back-voltage protection.

Signed-off-by: Enric Balletbo i Serra 
---
Changes since v2:
 - Rename microchip,current-limit to microchip,limit-microamps (Rob Herring)
Changes since v1:
 - Fix ERROR: info -> pdata is NULL but dereferenced (kbuild)
 - Change CONFIG_POWER_UCS1002 to CONFIG_UCS1002_POWER, seems more standard
   (Enric Balletbo)

 drivers/power/Kconfig |7 +
 drivers/power/Makefile|1 +
 drivers/power/ucs1002_power.c | 1004 +
 3 files changed, 1012 insertions(+)
 create mode 100644 drivers/power/ucs1002_power.c

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 1ddd13c..534e9db 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -502,6 +502,13 @@ config AXP20X_POWER
  This driver provides support for the power supply features of
  AXP20x PMIC.
 
+config UCS1002_POWER
+   tristate "UCS1002-2 power supply driver"
+   select REGMAP_I2C
+   help
+ This driver provices support for UCS1002-2 Programmable USB Port
+ Power Controller.
+
 endif # POWER_SUPPLY
 
 source "drivers/power/reset/Kconfig"
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 0e4eab5..936d2e1 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -73,3 +73,4 @@ obj-$(CONFIG_CHARGER_TPS65217)+= tps65217_charger.o
 obj-$(CONFIG_POWER_RESET)  += reset/
 obj-$(CONFIG_AXP288_FUEL_GAUGE) += axp288_fuel_gauge.o
 obj-$(CONFIG_AXP288_CHARGER)   += axp288_charger.o
+obj-$(CONFIG_UCS1002_POWER)+= ucs1002_power.o
diff --git a/drivers/power/ucs1002_power.c b/drivers/power/ucs1002_power.c
new file mode 100644
index 000..4f0e4ff
--- /dev/null
+++ b/drivers/power/ucs1002_power.c
@@ -0,0 +1,1004 @@
+/*
+ * Driver for UCS1002 Programmable USB Port Power Controller
+ *
+ * Copyright (C) 2016 Zodiac Inflight Innovations
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ *
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define POLL_INTERVAL  (HZ * 2)
+
+/* UCS1002 Registers */
+#define UCS1002_REG_CURRENT_MEASUREMENT0x00
+
+/*
+ * The Total Accumulated Charge registers store the total accumulated charge
+ * delivered from the VS source to a portable device. The total value is
+ * calculated using four registers, from 01h to 04h. The bit weighting of
+ * the registers is given in mA/hrs.
+ */
+#define UCS1002_REG_TOTAL_ACC_CHARGE   0x01
+
+/* Other Status Register */
+#define UCS1020_REG_OTHER_STATUS   0x0f
+#  define F_ALERT_PIN  BIT(5)
+#  define F_ADET_PIN   BIT(4)
+#  define F_CHG_ACTBIT(3)
+#  define F_EM_ACT BIT(2)
+#  define F_EM_STEP_MASK   0x03
+
+/* Interrupt Status */
+#define UCS1002_REG_INTERRUPT_STATUS   0x10
+#  define F_DISCHARGE_ERR  BIT(6)
+#  define F_RESET  BIT(5)
+#  define F_MIN_KEEP_OUT   BIT(4)
+#  define F_TSDBIT(3)
+#  define F_OVER_VOLT  BIT(2)
+#  define F_BACK_VOLT  BIT(1)
+#  define F_OVER_ILIM  BIT(0)
+
+/* Pin Status Register */
+#define UCS1002_REG_PIN_STATUS 0x14
+#  define UCS1002_PWR_STATE_MASK   0x03
+#  define F_PWR_EN_PIN BIT(6)
+#  define F_M2_PIN BIT(5)
+#  define F_M1_PIN BIT(4)
+#  define F_EM_EN_PIN  BIT(3)
+#  define F_SEL_PINBIT(2)
+#  define F_ACTIVE_MODE_MASK   0x38
+#  define F_ACTIVE_MODE_SHIFT  3
+
+/* General Configuration Register */
+#define UCS1002_REG_GENERAL_CFG0x15
+#  define F_ALERT_MASK BIT(6)
+#  define F_ALERT_LINK BIT(5)
+#  define F_DISCHARGE  BIT(4)
+#  define F_RATION_EN  BIT(3)
+#  define F_RATION_RST BIT(2)
+#  define F_RATION_BEH_MASK0x03
+#  define F_RATION_BEH_REPORT  0x00
+#  define 

[PATCH v3 0/2] Add UCS1002 USB Port Power Controller

[Enric Balletbo i Serra]

Dear all,

This is the third version of the UCS1002 driver, a Programmable USB Port
Power Controller with Charger Emulation.

Any comments are welcome. Thanks in advance.

Enric Balletbo i Serra (2):
  devicetree: Add UCS1002 USB Port Power Controller binding
  power: ucs1002: Add support for Programmable USB Port Power Controller

 .../devicetree/bindings/power/ucs1002.txt  |   41 +
 drivers/power/Kconfig  |7 +
 drivers/power/Makefile |1 +
 drivers/power/ucs1002_power.c  | 1004 
 4 files changed, 1053 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/power/ucs1002.txt
 create mode 100644 drivers/power/ucs1002_power.c

-- 
2.1.0

[PATCH v3 0/2] Add UCS1002 USB Port Power Controller

[Enric Balletbo i Serra]

Dear all,

This is the third version of the UCS1002 driver, a Programmable USB Port
Power Controller with Charger Emulation.

Any comments are welcome. Thanks in advance.

Enric Balletbo i Serra (2):
  devicetree: Add UCS1002 USB Port Power Controller binding
  power: ucs1002: Add support for Programmable USB Port Power Controller

 .../devicetree/bindings/power/ucs1002.txt  |   41 +
 drivers/power/Kconfig  |7 +
 drivers/power/Makefile |1 +
 drivers/power/ucs1002_power.c  | 1004 
 4 files changed, 1053 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/power/ucs1002.txt
 create mode 100644 drivers/power/ucs1002_power.c

-- 
2.1.0

[PATCH v3 00/11] x86/init: replace paravirt_enabled() were possible

[Luis R. Rodriguez]

Boris,

this v3 series addresses a feedback from my last series in trying to
replace or remove paravirt_enabled() as we have been discussing. Some
patches are being spinned once, some others by now 3 times, hence the
v3. Changes per iteration are documented in the commit log on each patch.
I've documented progress on a wiki so far [0] on the crusade to remove
paravirt_enabled(). Seems we just have one more item to go.

Since we're using BIT() for the platform flags I've folded into this
series the patch that adds BIT() for early boot code.

This series has been tested with no issues by 0-day bot.

Any followup on the linker table work or its use through the proof of
concept ports and the new proposed x86 proposed use will depend on this
series, I'll follow through these series using the x86/init prefix unless
told otherwise.

Rusty, a few patches touch touch lguest, although they're trivial it'd still
be good to get your Acked-by or Reviewed-by.

In case anyone needs it these patches are also up on my linux-next
tree on the 20160222-remove-pv-enabled-test-02 branch. They're all
based on linux-next tag next-20160222.

[0] http://kernelnewbies.org/KernelProjects/remove-paravirt-enabled
[1] 
https://git.kernel.org/cgit/linux/kernel/git/mcgrof/linux-next.git/log/?h=20160222-remove-pv-enabled-test-02

Luis R. Rodriguez (11):
  x86/boot: enumerate documentation for the x86 hardware_subarch
  tools/lguest: make lguest launcher use X86_SUBARCH_LGUEST explicitly
  x86/xen: use X86_SUBARCH_XEN for PV guest boots
  x86/init: make ebda depend on PC subarch
  tools/lguest: force disable tboot and apm
  apm32: remove paravirt_enabled() use
  x86/tboot: remove paravirt_enabled()
  x86/cpu/intel: replace paravirt_enabled() for f00f work around
  x86/boot: add BIT() to boot/bitops.h
  x86/rtc: replace paravirt rtc check with x86 specific solution
  pnpbios: replace paravirt_enabled() check with subarch checks

 arch/x86/boot/bitops.h  |  2 ++
 arch/x86/boot/boot.h|  2 +-
 arch/x86/include/asm/paravirt.h |  6 --
 arch/x86/include/asm/paravirt_types.h   |  5 -
 arch/x86/include/asm/processor.h|  1 -
 arch/x86/include/asm/x86_init.h | 12 
 arch/x86/include/uapi/asm/bootparam.h   | 31 ++-
 arch/x86/kernel/acpi/boot.c |  4 
 arch/x86/kernel/apm_32.c|  2 +-
 arch/x86/kernel/cpu/intel.c |  5 -
 arch/x86/kernel/head.c  |  2 +-
 arch/x86/kernel/rtc.c   | 15 ++-
 arch/x86/kernel/tboot.c |  6 --
 arch/x86/lguest/boot.c  |  2 +-
 arch/x86/platform/intel-mid/intel-mid.c |  3 +++
 arch/x86/xen/enlighten.c|  4 +---
 arch/x86/xen/time.c |  4 +++-
 drivers/pnp/pnpbios/core.c  |  4 +++-
 tools/lguest/lguest.c   | 10 --
 19 files changed, 76 insertions(+), 44 deletions(-)

-- 
2.7.0

[PATCH v3 00/11] x86/init: replace paravirt_enabled() were possible

[Luis R. Rodriguez]

Boris,

this v3 series addresses a feedback from my last series in trying to
replace or remove paravirt_enabled() as we have been discussing. Some
patches are being spinned once, some others by now 3 times, hence the
v3. Changes per iteration are documented in the commit log on each patch.
I've documented progress on a wiki so far [0] on the crusade to remove
paravirt_enabled(). Seems we just have one more item to go.

Since we're using BIT() for the platform flags I've folded into this
series the patch that adds BIT() for early boot code.

This series has been tested with no issues by 0-day bot.

Any followup on the linker table work or its use through the proof of
concept ports and the new proposed x86 proposed use will depend on this
series, I'll follow through these series using the x86/init prefix unless
told otherwise.

Rusty, a few patches touch touch lguest, although they're trivial it'd still
be good to get your Acked-by or Reviewed-by.

In case anyone needs it these patches are also up on my linux-next
tree on the 20160222-remove-pv-enabled-test-02 branch. They're all
based on linux-next tag next-20160222.

[0] http://kernelnewbies.org/KernelProjects/remove-paravirt-enabled
[1] 
https://git.kernel.org/cgit/linux/kernel/git/mcgrof/linux-next.git/log/?h=20160222-remove-pv-enabled-test-02

Luis R. Rodriguez (11):
  x86/boot: enumerate documentation for the x86 hardware_subarch
  tools/lguest: make lguest launcher use X86_SUBARCH_LGUEST explicitly
  x86/xen: use X86_SUBARCH_XEN for PV guest boots
  x86/init: make ebda depend on PC subarch
  tools/lguest: force disable tboot and apm
  apm32: remove paravirt_enabled() use
  x86/tboot: remove paravirt_enabled()
  x86/cpu/intel: replace paravirt_enabled() for f00f work around
  x86/boot: add BIT() to boot/bitops.h
  x86/rtc: replace paravirt rtc check with x86 specific solution
  pnpbios: replace paravirt_enabled() check with subarch checks

 arch/x86/boot/bitops.h  |  2 ++
 arch/x86/boot/boot.h|  2 +-
 arch/x86/include/asm/paravirt.h |  6 --
 arch/x86/include/asm/paravirt_types.h   |  5 -
 arch/x86/include/asm/processor.h|  1 -
 arch/x86/include/asm/x86_init.h | 12 
 arch/x86/include/uapi/asm/bootparam.h   | 31 ++-
 arch/x86/kernel/acpi/boot.c |  4 
 arch/x86/kernel/apm_32.c|  2 +-
 arch/x86/kernel/cpu/intel.c |  5 -
 arch/x86/kernel/head.c  |  2 +-
 arch/x86/kernel/rtc.c   | 15 ++-
 arch/x86/kernel/tboot.c |  6 --
 arch/x86/lguest/boot.c  |  2 +-
 arch/x86/platform/intel-mid/intel-mid.c |  3 +++
 arch/x86/xen/enlighten.c|  4 +---
 arch/x86/xen/time.c |  4 +++-
 drivers/pnp/pnpbios/core.c  |  4 +++-
 tools/lguest/lguest.c   | 10 --
 19 files changed, 76 insertions(+), 44 deletions(-)

-- 
2.7.0

[PATCH v3 03/11] x86/xen: use X86_SUBARCH_XEN for PV guest boots

[Luis R. Rodriguez]

The use of subarch should have no current effect on Xen
PV guests, as such this should have no current functional
effects.

Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/xen/enlighten.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index d09e4c9d7cc5..5b3f1c763806 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1669,6 +1669,7 @@ asmlinkage __visible void __init xen_start_kernel(void)
boot_params.hdr.ramdisk_image = initrd_start;
boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
+   boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN;
 
if (!xen_initial_domain()) {
add_preferred_console("xenboot", 0, NULL);
-- 
2.7.0

[PATCH v3 03/11] x86/xen: use X86_SUBARCH_XEN for PV guest boots

[Luis R. Rodriguez]

The use of subarch should have no current effect on Xen
PV guests, as such this should have no current functional
effects.

Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/xen/enlighten.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index d09e4c9d7cc5..5b3f1c763806 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1669,6 +1669,7 @@ asmlinkage __visible void __init xen_start_kernel(void)
boot_params.hdr.ramdisk_image = initrd_start;
boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
+   boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN;
 
if (!xen_initial_domain()) {
add_preferred_console("xenboot", 0, NULL);
-- 
2.7.0

[PATCH v3 08/11] x86/cpu/intel: replace paravirt_enabled() for f00f work around

[Luis R. Rodriguez]

Use the harware subarch instead now that they are set. If we
want to test removing this work around on Xen we can do so
separatley as another independent change, for now we just want
to remove paravirt_enabled().

v3: fix 0-day-bot compile error on a randconfig, missing
to include 

Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/kernel/cpu/intel.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 565648bc1a0a..48ab1b6e0889 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef CONFIG_X86_64
 #include 
@@ -220,7 +221,9 @@ static void intel_workarounds(struct cpuinfo_x86 *c)
 * The Quark is also family 5, but does not have the same bug.
 */
clear_cpu_bug(c, X86_BUG_F00F);
-   if (!paravirt_enabled() && c->x86 == 5 && c->x86_model < 9) {
+   if (boot_params.hdr.hardware_subarch != X86_SUBARCH_XEN &&
+   boot_params.hdr.hardware_subarch != X86_SUBARCH_LGUEST &&
+   c->x86 == 5 && c->x86_model < 9) {
static int f00f_workaround_enabled;
 
set_cpu_bug(c, X86_BUG_F00F);
-- 
2.7.0

[PATCH v3 07/11] x86/tboot: remove paravirt_enabled()

[Luis R. Rodriguez]

There is already a check for boot_params.tboot_addr prior
to paravirt_enabled() and both Xen and lguest never set this.
This check is not needed.

Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/kernel/tboot.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/arch/x86/kernel/tboot.c b/arch/x86/kernel/tboot.c
index 91a4496db434..a2df1d3fab74 100644
--- a/arch/x86/kernel/tboot.c
+++ b/arch/x86/kernel/tboot.c
@@ -74,12 +74,6 @@ void __init tboot_probe(void)
return;
}
 
-   /* only a natively booted kernel should be using TXT */
-   if (paravirt_enabled()) {
-   pr_warning("non-0 tboot_addr but pv_ops is enabled\n");
-   return;
-   }
-
/* Map and check for tboot UUID. */
set_fixmap(FIX_TBOOT_BASE, boot_params.tboot_addr);
tboot = (struct tboot *)fix_to_virt(FIX_TBOOT_BASE);
-- 
2.7.0

[PATCH v3 08/11] x86/cpu/intel: replace paravirt_enabled() for f00f work around

[Luis R. Rodriguez]

Use the harware subarch instead now that they are set. If we
want to test removing this work around on Xen we can do so
separatley as another independent change, for now we just want
to remove paravirt_enabled().

v3: fix 0-day-bot compile error on a randconfig, missing
to include 

Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/kernel/cpu/intel.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 565648bc1a0a..48ab1b6e0889 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef CONFIG_X86_64
 #include 
@@ -220,7 +221,9 @@ static void intel_workarounds(struct cpuinfo_x86 *c)
 * The Quark is also family 5, but does not have the same bug.
 */
clear_cpu_bug(c, X86_BUG_F00F);
-   if (!paravirt_enabled() && c->x86 == 5 && c->x86_model < 9) {
+   if (boot_params.hdr.hardware_subarch != X86_SUBARCH_XEN &&
+   boot_params.hdr.hardware_subarch != X86_SUBARCH_LGUEST &&
+   c->x86 == 5 && c->x86_model < 9) {
static int f00f_workaround_enabled;
 
set_cpu_bug(c, X86_BUG_F00F);
-- 
2.7.0

[PATCH v3 07/11] x86/tboot: remove paravirt_enabled()

[Luis R. Rodriguez]

There is already a check for boot_params.tboot_addr prior
to paravirt_enabled() and both Xen and lguest never set this.
This check is not needed.

Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/kernel/tboot.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/arch/x86/kernel/tboot.c b/arch/x86/kernel/tboot.c
index 91a4496db434..a2df1d3fab74 100644
--- a/arch/x86/kernel/tboot.c
+++ b/arch/x86/kernel/tboot.c
@@ -74,12 +74,6 @@ void __init tboot_probe(void)
return;
}
 
-   /* only a natively booted kernel should be using TXT */
-   if (paravirt_enabled()) {
-   pr_warning("non-0 tboot_addr but pv_ops is enabled\n");
-   return;
-   }
-
/* Map and check for tboot UUID. */
set_fixmap(FIX_TBOOT_BASE, boot_params.tboot_addr);
tboot = (struct tboot *)fix_to_virt(FIX_TBOOT_BASE);
-- 
2.7.0

[PATCH v3 05/11] tools/lguest: force disable tboot and apm

[Luis R. Rodriguez]

The paravirt_enabled() check is going away, force disable
tboot and apm just in case the kernel file being read might
have this set for whatever reason.

Signed-off-by: Luis R. Rodriguez 
---
 tools/lguest/lguest.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/tools/lguest/lguest.c b/tools/lguest/lguest.c
index ff0aa580c6e1..0aa75af6e862 100644
--- a/tools/lguest/lguest.c
+++ b/tools/lguest/lguest.c
@@ -3357,6 +3357,12 @@ int main(int argc, char *argv[])
/* Tell the entry path not to try to reload segment registers. */
boot->hdr.loadflags |= KEEP_SEGMENTS;
 
+   /* We don't support tboot */
+   boot->tboot_addr = 0;
+
+   /* Ensure this is 0 to prevent apm from loading */
+   boot->apm_bios_info.version = 0;
+
/* We tell the kernel to initialize the Guest. */
tell_kernel(start);
 
-- 
2.7.0

[PATCH v3 05/11] tools/lguest: force disable tboot and apm

[Luis R. Rodriguez]

The paravirt_enabled() check is going away, force disable
tboot and apm just in case the kernel file being read might
have this set for whatever reason.

Signed-off-by: Luis R. Rodriguez 
---
 tools/lguest/lguest.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/tools/lguest/lguest.c b/tools/lguest/lguest.c
index ff0aa580c6e1..0aa75af6e862 100644
--- a/tools/lguest/lguest.c
+++ b/tools/lguest/lguest.c
@@ -3357,6 +3357,12 @@ int main(int argc, char *argv[])
/* Tell the entry path not to try to reload segment registers. */
boot->hdr.loadflags |= KEEP_SEGMENTS;
 
+   /* We don't support tboot */
+   boot->tboot_addr = 0;
+
+   /* Ensure this is 0 to prevent apm from loading */
+   boot->apm_bios_info.version = 0;
+
/* We tell the kernel to initialize the Guest. */
tell_kernel(start);
 
-- 
2.7.0

Re: [PATCH v2] mm/slab: re-implement pfmemalloc support

[Joonsoo Kim]

On Mon, Feb 22, 2016 at 11:52:42AM +, Mel Gorman wrote:
> On Thu, Feb 11, 2016 at 04:34:47PM +0900, js1...@gmail.com wrote:
> > From: Joonsoo Kim 
> > 
> > Current implementation of pfmemalloc handling in SLAB has some problems.
> > 
> 
> Tested-by: Mel Gorman 

Thanks for testing!
> 
> The test completed successfully if a lot slower. However, the time to
> completion is not reliable anyway and subject to a number of factors so
> it's not of concern.

Okay. Not entirely happy result but agree that your statement.

Thanks.

Re: [PATCH v2] mm/slab: re-implement pfmemalloc support

[Joonsoo Kim]

On Mon, Feb 22, 2016 at 11:52:42AM +, Mel Gorman wrote:
> On Thu, Feb 11, 2016 at 04:34:47PM +0900, js1...@gmail.com wrote:
> > From: Joonsoo Kim 
> > 
> > Current implementation of pfmemalloc handling in SLAB has some problems.
> > 
> 
> Tested-by: Mel Gorman 

Thanks for testing!
> 
> The test completed successfully if a lot slower. However, the time to
> completion is not reliable anyway and subject to a number of factors so
> it's not of concern.

Okay. Not entirely happy result but agree that your statement.

Thanks.

[PATCH v3 09/11] x86/boot: add BIT() to boot/bitops.h

[Luis R. Rodriguez]

The boot/bitops.h has guards against including the
regular bitops (include/asm-generic/bitops.h), it only
implements what we need at early boot. We'll be making
use of BIT() later so add it.

Users of boot/boot.h must include it prior to asm/setup.h
otherwise the guard protection devised against the regular
linux/bitops.h will not take effect.

v2: spelling fixes, and language descriptipon enhancements
by Konrad.
v3: Parenthesize (x), just match what is in include/linux/bitmap.h

Reviewed-by: Konrad Rzeszutek Wilk 
Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/boot/bitops.h | 2 ++
 arch/x86/boot/boot.h   | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/x86/boot/bitops.h b/arch/x86/boot/bitops.h
index 878e4b9940d9..cfe154c0bd3d 100644
--- a/arch/x86/boot/bitops.h
+++ b/arch/x86/boot/bitops.h
@@ -40,4 +40,6 @@ static inline void set_bit(int nr, void *addr)
asm("btsl %1,%0" : "+m" (*(u32 *)addr) : "Ir" (nr));
 }
 
+#define BIT(nr)(1UL << (nr))
+
 #endif /* BOOT_BITOPS_H */
diff --git a/arch/x86/boot/boot.h b/arch/x86/boot/boot.h
index 9011a88353de..4fb53da1f48a 100644
--- a/arch/x86/boot/boot.h
+++ b/arch/x86/boot/boot.h
@@ -23,8 +23,8 @@
 #include 
 #include 
 #include 
-#include 
 #include "bitops.h"
+#include 
 #include "ctype.h"
 #include "cpuflags.h"
 
-- 
2.7.0

[PATCH v3 09/11] x86/boot: add BIT() to boot/bitops.h

[Luis R. Rodriguez]

The boot/bitops.h has guards against including the
regular bitops (include/asm-generic/bitops.h), it only
implements what we need at early boot. We'll be making
use of BIT() later so add it.

Users of boot/boot.h must include it prior to asm/setup.h
otherwise the guard protection devised against the regular
linux/bitops.h will not take effect.

v2: spelling fixes, and language descriptipon enhancements
by Konrad.
v3: Parenthesize (x), just match what is in include/linux/bitmap.h

Reviewed-by: Konrad Rzeszutek Wilk 
Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/boot/bitops.h | 2 ++
 arch/x86/boot/boot.h   | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/x86/boot/bitops.h b/arch/x86/boot/bitops.h
index 878e4b9940d9..cfe154c0bd3d 100644
--- a/arch/x86/boot/bitops.h
+++ b/arch/x86/boot/bitops.h
@@ -40,4 +40,6 @@ static inline void set_bit(int nr, void *addr)
asm("btsl %1,%0" : "+m" (*(u32 *)addr) : "Ir" (nr));
 }
 
+#define BIT(nr)(1UL << (nr))
+
 #endif /* BOOT_BITOPS_H */
diff --git a/arch/x86/boot/boot.h b/arch/x86/boot/boot.h
index 9011a88353de..4fb53da1f48a 100644
--- a/arch/x86/boot/boot.h
+++ b/arch/x86/boot/boot.h
@@ -23,8 +23,8 @@
 #include 
 #include 
 #include 
-#include 
 #include "bitops.h"
+#include 
 #include "ctype.h"
 #include "cpuflags.h"
 
-- 
2.7.0

[PATCH v3 11/11] pnpbios: replace paravirt_enabled() check with subarch checks

[Luis R. Rodriguez]

Since we are removing paravirt_enabled() replace it with a
logical equivalent.

Signed-off-by: Luis R. Rodriguez 
---
 drivers/pnp/pnpbios/core.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/pnp/pnpbios/core.c b/drivers/pnp/pnpbios/core.c
index facd43b8516c..96dc1f905dba 100644
--- a/drivers/pnp/pnpbios/core.c
+++ b/drivers/pnp/pnpbios/core.c
@@ -66,6 +66,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "../base.h"
 #include "pnpbios.h"
@@ -521,7 +522,8 @@ static int __init pnpbios_init(void)
int ret;
 
if (pnpbios_disabled || dmi_check_system(pnpbios_dmi_table) ||
-   paravirt_enabled()) {
+   boot_params.hdr.hardware_subarch == X86_SUBARCH_LGUEST ||
+   boot_params.hdr.hardware_subarch == X86_SUBARCH_XEN) {
printk(KERN_INFO "PnPBIOS: Disabled\n");
return -ENODEV;
}
-- 
2.7.0

[PATCH v3 11/11] pnpbios: replace paravirt_enabled() check with subarch checks

[Luis R. Rodriguez]

Since we are removing paravirt_enabled() replace it with a
logical equivalent.

Signed-off-by: Luis R. Rodriguez 
---
 drivers/pnp/pnpbios/core.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/pnp/pnpbios/core.c b/drivers/pnp/pnpbios/core.c
index facd43b8516c..96dc1f905dba 100644
--- a/drivers/pnp/pnpbios/core.c
+++ b/drivers/pnp/pnpbios/core.c
@@ -66,6 +66,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "../base.h"
 #include "pnpbios.h"
@@ -521,7 +522,8 @@ static int __init pnpbios_init(void)
int ret;
 
if (pnpbios_disabled || dmi_check_system(pnpbios_dmi_table) ||
-   paravirt_enabled()) {
+   boot_params.hdr.hardware_subarch == X86_SUBARCH_LGUEST ||
+   boot_params.hdr.hardware_subarch == X86_SUBARCH_XEN) {
printk(KERN_INFO "PnPBIOS: Disabled\n");
return -ENODEV;
}
-- 
2.7.0

[PATCH v3 10/11] x86/rtc: replace paravirt rtc check with x86 specific solution

[Luis R. Rodriguez]

We have 4 types of x86 platforms that disable RTC:

  * Intel MID
  * Lguest - uses paravirt
  * Xen dom-U - uses paravirt
  * x86 on legacy systems annotated with an ACPI legacy flag

We can consolidate all of these into a platform specific solution.

Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/include/asm/paravirt.h |  6 --
 arch/x86/include/asm/paravirt_types.h   |  5 -
 arch/x86/include/asm/processor.h|  1 -
 arch/x86/include/asm/x86_init.h | 12 
 arch/x86/kernel/acpi/boot.c |  4 
 arch/x86/kernel/rtc.c   | 15 ++-
 arch/x86/lguest/boot.c  |  2 +-
 arch/x86/platform/intel-mid/intel-mid.c |  3 +++
 arch/x86/xen/enlighten.c|  3 ---
 arch/x86/xen/time.c |  4 +++-
 10 files changed, 25 insertions(+), 30 deletions(-)

diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index f6192502149e..c261402340e3 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -19,12 +19,6 @@ static inline int paravirt_enabled(void)
return pv_info.paravirt_enabled;
 }
 
-static inline int paravirt_has_feature(unsigned int feature)
-{
-   WARN_ON_ONCE(!pv_info.paravirt_enabled);
-   return (pv_info.features & feature);
-}
-
 static inline void load_sp0(struct tss_struct *tss,
 struct thread_struct *thread)
 {
diff --git a/arch/x86/include/asm/paravirt_types.h 
b/arch/x86/include/asm/paravirt_types.h
index 77db5616a473..2489d6a08e89 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -70,14 +70,9 @@ struct pv_info {
 #endif
 
int paravirt_enabled;
-   unsigned int features;/* valid only if paravirt_enabled is set */
const char *name;
 };
 
-#define paravirt_has(x) paravirt_has_feature(PV_SUPPORTED_##x)
-/* Supported features */
-#define PV_SUPPORTED_RTC(1<<0)
-
 struct pv_init_ops {
/*
 * Patch may replace one of the defined code sequences with
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 20c11d1aa4cc..10f3614265c1 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -472,7 +472,6 @@ static inline unsigned long current_top_of_stack(void)
 #else
 #define __cpuidnative_cpuid
 #define paravirt_enabled() 0
-#define paravirt_has(x)0
 
 static inline void load_sp0(struct tss_struct *tss,
struct thread_struct *thread)
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 1ae89a2721d6..0ef697e46f6e 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -1,6 +1,7 @@
 #ifndef _ASM_X86_PLATFORM_H
 #define _ASM_X86_PLATFORM_H
 
+#include 
 #include 
 
 struct mpc_bus;
@@ -116,6 +117,7 @@ struct x86_init_pci {
 /**
  * struct x86_init_ops - functions for platform specific setup
  *
+ * @platform_flags:bitmask of enum x86_platform_flags.
  */
 struct x86_init_ops {
struct x86_init_resources   resources;
@@ -126,6 +128,7 @@ struct x86_init_ops {
struct x86_init_timers  timers;
struct x86_init_iommu   iommu;
struct x86_init_pci pci;
+   u64 platform_flags;
 };
 
 /**
@@ -142,6 +145,15 @@ struct x86_cpuinit_ops {
 struct timespec;
 
 /**
+ * enum x86_platform_flags - x86 platform flags
+ *
+ * X86_PLATFORM_NO_RTC: set when platform has no CMOS real-time clock present
+ */
+enum x86_platform_flags {
+   X86_PLATFORM_NO_RTC = BIT(0),
+};
+
+/**
  * struct x86_platform_ops - platform specific runtime functions
  * @calibrate_tsc: calibrate TSC
  * @get_wallclock: get time from HW clock like RTC etc.
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index e75907601a41..d156f6cd2be3 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -913,6 +913,10 @@ late_initcall(hpet_insert_resource);
 
 static int __init acpi_parse_fadt(struct acpi_table_header *table)
 {
+   if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) {
+   pr_debug("ACPI: not registering RTC platform device\n");
+   x86_init.platform_flags |= X86_PLATFORM_NO_RTC;
+   }
 
 #ifdef CONFIG_X86_PM_TIMER
/* detect the location of the ACPI PM Timer */
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 4af8d063fb36..5f95e42ecc68 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef CONFIG_X86_32
 /*
@@ -188,19 +189,7 @@ static __init int add_rtc_cmos(void)
if (of_have_populated_dt())
return 0;
 
-   /* Intel MID platforms don't have ioport rtc */
-   if (intel_mid_identify_cpu())
-   return -ENODEV;
-
-#ifdef 

[PATCH v3 10/11] x86/rtc: replace paravirt rtc check with x86 specific solution

[Luis R. Rodriguez]

We have 4 types of x86 platforms that disable RTC:

  * Intel MID
  * Lguest - uses paravirt
  * Xen dom-U - uses paravirt
  * x86 on legacy systems annotated with an ACPI legacy flag

We can consolidate all of these into a platform specific solution.

Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/include/asm/paravirt.h |  6 --
 arch/x86/include/asm/paravirt_types.h   |  5 -
 arch/x86/include/asm/processor.h|  1 -
 arch/x86/include/asm/x86_init.h | 12 
 arch/x86/kernel/acpi/boot.c |  4 
 arch/x86/kernel/rtc.c   | 15 ++-
 arch/x86/lguest/boot.c  |  2 +-
 arch/x86/platform/intel-mid/intel-mid.c |  3 +++
 arch/x86/xen/enlighten.c|  3 ---
 arch/x86/xen/time.c |  4 +++-
 10 files changed, 25 insertions(+), 30 deletions(-)

diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index f6192502149e..c261402340e3 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -19,12 +19,6 @@ static inline int paravirt_enabled(void)
return pv_info.paravirt_enabled;
 }
 
-static inline int paravirt_has_feature(unsigned int feature)
-{
-   WARN_ON_ONCE(!pv_info.paravirt_enabled);
-   return (pv_info.features & feature);
-}
-
 static inline void load_sp0(struct tss_struct *tss,
 struct thread_struct *thread)
 {
diff --git a/arch/x86/include/asm/paravirt_types.h 
b/arch/x86/include/asm/paravirt_types.h
index 77db5616a473..2489d6a08e89 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -70,14 +70,9 @@ struct pv_info {
 #endif
 
int paravirt_enabled;
-   unsigned int features;/* valid only if paravirt_enabled is set */
const char *name;
 };
 
-#define paravirt_has(x) paravirt_has_feature(PV_SUPPORTED_##x)
-/* Supported features */
-#define PV_SUPPORTED_RTC(1<<0)
-
 struct pv_init_ops {
/*
 * Patch may replace one of the defined code sequences with
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 20c11d1aa4cc..10f3614265c1 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -472,7 +472,6 @@ static inline unsigned long current_top_of_stack(void)
 #else
 #define __cpuidnative_cpuid
 #define paravirt_enabled() 0
-#define paravirt_has(x)0
 
 static inline void load_sp0(struct tss_struct *tss,
struct thread_struct *thread)
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 1ae89a2721d6..0ef697e46f6e 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -1,6 +1,7 @@
 #ifndef _ASM_X86_PLATFORM_H
 #define _ASM_X86_PLATFORM_H
 
+#include 
 #include 
 
 struct mpc_bus;
@@ -116,6 +117,7 @@ struct x86_init_pci {
 /**
  * struct x86_init_ops - functions for platform specific setup
  *
+ * @platform_flags:bitmask of enum x86_platform_flags.
  */
 struct x86_init_ops {
struct x86_init_resources   resources;
@@ -126,6 +128,7 @@ struct x86_init_ops {
struct x86_init_timers  timers;
struct x86_init_iommu   iommu;
struct x86_init_pci pci;
+   u64 platform_flags;
 };
 
 /**
@@ -142,6 +145,15 @@ struct x86_cpuinit_ops {
 struct timespec;
 
 /**
+ * enum x86_platform_flags - x86 platform flags
+ *
+ * X86_PLATFORM_NO_RTC: set when platform has no CMOS real-time clock present
+ */
+enum x86_platform_flags {
+   X86_PLATFORM_NO_RTC = BIT(0),
+};
+
+/**
  * struct x86_platform_ops - platform specific runtime functions
  * @calibrate_tsc: calibrate TSC
  * @get_wallclock: get time from HW clock like RTC etc.
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index e75907601a41..d156f6cd2be3 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -913,6 +913,10 @@ late_initcall(hpet_insert_resource);
 
 static int __init acpi_parse_fadt(struct acpi_table_header *table)
 {
+   if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) {
+   pr_debug("ACPI: not registering RTC platform device\n");
+   x86_init.platform_flags |= X86_PLATFORM_NO_RTC;
+   }
 
 #ifdef CONFIG_X86_PM_TIMER
/* detect the location of the ACPI PM Timer */
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 4af8d063fb36..5f95e42ecc68 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef CONFIG_X86_32
 /*
@@ -188,19 +189,7 @@ static __init int add_rtc_cmos(void)
if (of_have_populated_dt())
return 0;
 
-   /* Intel MID platforms don't have ioport rtc */
-   if (intel_mid_identify_cpu())
-   return -ENODEV;
-
-#ifdef CONFIG_ACPI
-   

[PATCH v3 04/11] x86/init: make ebda depend on PC subarch

[Luis R. Rodriguez]

This lets us remove its use of paravirt_enabled(). The
other subarchs are not needed here given that on 32-bit
there is a switch already that negates access to this
code on X86_SUBARCH_INTEL_MID, and X86_SUBARCH_CE4100.
Both lguest and Xen had paravirt_enabled so that
excludes them.

Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/kernel/head.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/head.c b/arch/x86/kernel/head.c
index 992f442ca155..4e3be58a1a77 100644
--- a/arch/x86/kernel/head.c
+++ b/arch/x86/kernel/head.c
@@ -38,7 +38,7 @@ void __init reserve_ebda_region(void)
 * that the paravirt case can handle memory setup
 * correctly, without our help.
 */
-   if (paravirt_enabled())
+   if (boot_params.hdr.hardware_subarch != X86_SUBARCH_PC)
return;
 
/* end of low (conventional) memory */
-- 
2.7.0

[PATCH v3 04/11] x86/init: make ebda depend on PC subarch

[Luis R. Rodriguez]

This lets us remove its use of paravirt_enabled(). The
other subarchs are not needed here given that on 32-bit
there is a switch already that negates access to this
code on X86_SUBARCH_INTEL_MID, and X86_SUBARCH_CE4100.
Both lguest and Xen had paravirt_enabled so that
excludes them.

Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/kernel/head.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/head.c b/arch/x86/kernel/head.c
index 992f442ca155..4e3be58a1a77 100644
--- a/arch/x86/kernel/head.c
+++ b/arch/x86/kernel/head.c
@@ -38,7 +38,7 @@ void __init reserve_ebda_region(void)
 * that the paravirt case can handle memory setup
 * correctly, without our help.
 */
-   if (paravirt_enabled())
+   if (boot_params.hdr.hardware_subarch != X86_SUBARCH_PC)
return;
 
/* end of low (conventional) memory */
-- 
2.7.0

[PATCH v3 06/11] apm32: remove paravirt_enabled() use

[Luis R. Rodriguez]

There is already a check for apm_info.bios == 0, the
apm_info.bios is set from the boot_params.apm_bios_info.
Both Xen and lguest, which are also the only ones that set
paravirt_enabled to true) do never set the apm_bios_info,
the paravirt_enabled() check is simply not needed.

Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/kernel/apm_32.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index 052c9c3026cc..749f7a081257 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -2267,7 +2267,7 @@ static int __init apm_init(void)
 
dmi_check_system(apm_dmi_table);
 
-   if (apm_info.bios.version == 0 || paravirt_enabled() || 
machine_is_olpc()) {
+   if (apm_info.bios.version == 0 || machine_is_olpc()) {
printk(KERN_INFO "apm: BIOS not found.\n");
return -ENODEV;
}
-- 
2.7.0

[PATCH v3 06/11] apm32: remove paravirt_enabled() use

[Luis R. Rodriguez]

There is already a check for apm_info.bios == 0, the
apm_info.bios is set from the boot_params.apm_bios_info.
Both Xen and lguest, which are also the only ones that set
paravirt_enabled to true) do never set the apm_bios_info,
the paravirt_enabled() check is simply not needed.

Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/kernel/apm_32.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index 052c9c3026cc..749f7a081257 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -2267,7 +2267,7 @@ static int __init apm_init(void)
 
dmi_check_system(apm_dmi_table);
 
-   if (apm_info.bios.version == 0 || paravirt_enabled() || 
machine_is_olpc()) {
+   if (apm_info.bios.version == 0 || machine_is_olpc()) {
printk(KERN_INFO "apm: BIOS not found.\n");
return -ENODEV;
}
-- 
2.7.0

[PATCH v3 01/11] x86/boot: enumerate documentation for the x86 hardware_subarch

[Luis R. Rodriguez]

Although hardware_subarch has been in place since the x86 boot
protocol 2.07 it hasn't been used much. Enumerate current possible
values to avoid misuses and help with semantics later at boot
time should this be used further.

v2: fix typos

Cc: Andy Shevchenko 
Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/include/uapi/asm/bootparam.h | 31 ++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/uapi/asm/bootparam.h 
b/arch/x86/include/uapi/asm/bootparam.h
index 329254373479..50d5009cf276 100644
--- a/arch/x86/include/uapi/asm/bootparam.h
+++ b/arch/x86/include/uapi/asm/bootparam.h
@@ -157,7 +157,36 @@ struct boot_params {
__u8  _pad9[276];   /* 0xeec */
 } __attribute__((packed));
 
-enum {
+/**
+ * enum x86_hardware_subarch - x86 hardware subarchitecture
+ *
+ * The x86 hardware_subarch and hardware_subarch_data were added as of the x86
+ * boot protocol 2.07 to help distinguish and supports custom x86 boot
+ * sequences. This enum represents accepted values for the x86
+ * hardware_subarch. Custom x86 boot sequences (not X86_SUBARCH_PC) do not have
+ * or simply do not make use of natural stubs like BIOS or EFI, the
+ * hardware_subarch can be used on the Linux entry path to revector to a
+ * subarchitecture stub when needed. This subarchitecture stub can be used to
+ * set up Linux boot parameters or for special care to account for nonstandard
+ * handling of page tables.
+ *
+ * KVM and Xen HVM do not have a subarch as these are expected to follow
+ * standard x86 boot entries. If there is a genuine need for "hypervisor" type
+ * that should be considered separately in the future.
+ *
+ * @X86_SUBARCH_PC: Should be used if the hardware is enumerable using standard
+ * PC mechanisms (PCI, ACPI) and doesn't need a special boot flow.
+ * @X86_SUBARCH_LGUEST: Used for x86 hypervisor demo, lguest
+ * @X86_SUBARCH_XEN: Used for Xen guest types which follow the PV boot path,
+ * which start at asm startup_xen() entry point and later jump to the C
+ * xen_start_kernel() entry point.
+ * @X86_SUBARCH_INTEL_MID: Used for Intel MID (Mobile Internet Device) platform
+ * systems which do not have the PCI legacy interfaces.
+ * @X86_SUBARCH_CE4100: Used for Intel CE media processor (CE4100) SOC for
+ * for settop boxes and media devices, the use of a subarch for CE4100
+ * is more of a hack...
+ */
+enum x86_hardware_subarch {
X86_SUBARCH_PC = 0,
X86_SUBARCH_LGUEST,
X86_SUBARCH_XEN,
-- 
2.7.0

[PATCH v3 01/11] x86/boot: enumerate documentation for the x86 hardware_subarch

[Luis R. Rodriguez]

Although hardware_subarch has been in place since the x86 boot
protocol 2.07 it hasn't been used much. Enumerate current possible
values to avoid misuses and help with semantics later at boot
time should this be used further.

v2: fix typos

Cc: Andy Shevchenko 
Signed-off-by: Luis R. Rodriguez 
---
 arch/x86/include/uapi/asm/bootparam.h | 31 ++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/uapi/asm/bootparam.h 
b/arch/x86/include/uapi/asm/bootparam.h
index 329254373479..50d5009cf276 100644
--- a/arch/x86/include/uapi/asm/bootparam.h
+++ b/arch/x86/include/uapi/asm/bootparam.h
@@ -157,7 +157,36 @@ struct boot_params {
__u8  _pad9[276];   /* 0xeec */
 } __attribute__((packed));
 
-enum {
+/**
+ * enum x86_hardware_subarch - x86 hardware subarchitecture
+ *
+ * The x86 hardware_subarch and hardware_subarch_data were added as of the x86
+ * boot protocol 2.07 to help distinguish and supports custom x86 boot
+ * sequences. This enum represents accepted values for the x86
+ * hardware_subarch. Custom x86 boot sequences (not X86_SUBARCH_PC) do not have
+ * or simply do not make use of natural stubs like BIOS or EFI, the
+ * hardware_subarch can be used on the Linux entry path to revector to a
+ * subarchitecture stub when needed. This subarchitecture stub can be used to
+ * set up Linux boot parameters or for special care to account for nonstandard
+ * handling of page tables.
+ *
+ * KVM and Xen HVM do not have a subarch as these are expected to follow
+ * standard x86 boot entries. If there is a genuine need for "hypervisor" type
+ * that should be considered separately in the future.
+ *
+ * @X86_SUBARCH_PC: Should be used if the hardware is enumerable using standard
+ * PC mechanisms (PCI, ACPI) and doesn't need a special boot flow.
+ * @X86_SUBARCH_LGUEST: Used for x86 hypervisor demo, lguest
+ * @X86_SUBARCH_XEN: Used for Xen guest types which follow the PV boot path,
+ * which start at asm startup_xen() entry point and later jump to the C
+ * xen_start_kernel() entry point.
+ * @X86_SUBARCH_INTEL_MID: Used for Intel MID (Mobile Internet Device) platform
+ * systems which do not have the PCI legacy interfaces.
+ * @X86_SUBARCH_CE4100: Used for Intel CE media processor (CE4100) SOC for
+ * for settop boxes and media devices, the use of a subarch for CE4100
+ * is more of a hack...
+ */
+enum x86_hardware_subarch {
X86_SUBARCH_PC = 0,
X86_SUBARCH_LGUEST,
X86_SUBARCH_XEN,
-- 
2.7.0

Re: [PATCH v1 8/8] mm: kasan: Initial memory quarantine implementation

[Joonsoo Kim]

On Fri, Feb 19, 2016 at 10:19:48AM +0100, Dmitry Vyukov wrote:
> On Fri, Feb 19, 2016 at 3:11 AM, Joonsoo Kim  wrote:
> > 2016-02-18 23:06 GMT+09:00 Alexander Potapenko :
> >> On Mon, Feb 1, 2016 at 3:47 AM, Joonsoo Kim  wrote:
> >>> On Wed, Jan 27, 2016 at 07:25:13PM +0100, Alexander Potapenko wrote:
>  Quarantine isolates freed objects in a separate queue. The objects are
>  returned to the allocator later, which helps to detect use-after-free
>  errors.
> 
>  Freed objects are first added to per-cpu quarantine queues.
>  When a cache is destroyed or memory shrinking is requested, the objects
>  are moved into the global quarantine queue. Whenever a kmalloc call
>  allows memory reclaiming, the oldest objects are popped out of the
>  global queue until the total size of objects in quarantine is less than
>  3/4 of the maximum quarantine size (which is a fraction of installed
>  physical memory).
> >>>
> >>> Just wondering why not using time based approach rather than size
> >>> based one. In heavy load condition, how much time do the object stay in
> >>> quarantine?
> >>>
> 
>  Right now quarantine support is only enabled in SLAB allocator.
>  Unification of KASAN features in SLAB and SLUB will be done later.
> 
>  This patch is based on the "mm: kasan: quarantine" patch originally
>  prepared by Dmitry Chernenkov.
> 
>  Signed-off-by: Alexander Potapenko 
>  ---
>   include/linux/kasan.h |  30 --
>   lib/test_kasan.c  |  29 ++
>   mm/kasan/Makefile |   2 +-
>   mm/kasan/kasan.c  |  68 +++-
>   mm/kasan/kasan.h  |  11 +-
>   mm/kasan/quarantine.c | 284 
>  ++
>   mm/kasan/report.c |   3 +-
>   mm/mempool.c  |   7 +-
>   mm/page_alloc.c   |   2 +-
>   mm/slab.c |  12 ++-
>   mm/slab.h |   4 +
>   mm/slab_common.c  |   2 +
>   mm/slub.c |   4 +-
>   13 files changed, 435 insertions(+), 23 deletions(-)
> 
> >>>
> >>> ...
> >>>
>  +bool kasan_slab_free(struct kmem_cache *cache, void *object)
>  +{
>  +#ifdef CONFIG_SLAB
>  + /* RCU slabs could be legally used after free within the RCU 
>  period */
>  + if (unlikely(cache->flags & SLAB_DESTROY_BY_RCU))
>  + return false;
>  +
>  + if (likely(cache->flags & SLAB_KASAN)) {
>  + struct kasan_alloc_meta *alloc_info =
>  + get_alloc_info(cache, object);
>  + struct kasan_free_meta *free_info =
>  + get_free_info(cache, object);
>  +
>  + switch (alloc_info->state) {
>  + case KASAN_STATE_ALLOC:
>  + alloc_info->state = KASAN_STATE_QUARANTINE;
>  + quarantine_put(free_info, cache);
> >>>
> >>> quarantine_put() can be called regardless of SLAB_DESTROY_BY_RCU,
> >>> although it's not much meaningful without poisoning. But, I have an
> >>> idea to poison object on SLAB_DESTROY_BY_RCU cache.
> >>>
> >>> quarantine_put() moves per cpu list to global queue when
> >>> list size reaches QUARANTINE_PERCPU_SIZE. If we call synchronize_rcu()
> >>> at that time, after then, we can poison objects. With appropriate size
> >>> setup, it would not be intrusive.
> >>>
> >> Won't this slow the quarantine down unpredictably (e.g. in the case
> >> there're no RCU slabs in quarantine we'll still be waiting for
> >> synchronize_rcu())?
> >
> > It could be handled by introducing one cpu variable.
> >
> >> Yet this is something worth looking into. Do you want RCU to be
> >> handled in this patch set?
> >
> > No. It would be future work.
> >
>  + set_track(_info->track, GFP_NOWAIT);
> >>>
> >>> set_track() can be called regardless of SLAB_DESTROY_BY_RCU.
> >> Agreed, I can fix that if we decide to handle RCU in this patch
> >> (otherwise it will lead to confusion).
> >>
> >>>
>  + kasan_poison_slab_free(cache, object);
>  + return true;
>  + case KASAN_STATE_QUARANTINE:
>  + case KASAN_STATE_FREE:
>  + pr_err("Double free");
>  + dump_stack();
>  + break;
>  + default:
>  + break;
>  + }
>  + }
>  + return false;
>  +#else
>  + kasan_poison_slab_free(cache, object);
>  + return false;
>  +#endif
>  +}
>  +
> >>>
> >>> ...
> >>>
>  +void quarantine_reduce(void)
>  +{
>  + size_t new_quarantine_size;
>  + unsigned long flags;
>  + struct qlist to_free = QLIST_INIT;
>  + size_t size_to_free = 0;
>  + 

Re: [PATCH v1 8/8] mm: kasan: Initial memory quarantine implementation

[Joonsoo Kim]

On Fri, Feb 19, 2016 at 10:19:48AM +0100, Dmitry Vyukov wrote:
> On Fri, Feb 19, 2016 at 3:11 AM, Joonsoo Kim  wrote:
> > 2016-02-18 23:06 GMT+09:00 Alexander Potapenko :
> >> On Mon, Feb 1, 2016 at 3:47 AM, Joonsoo Kim  wrote:
> >>> On Wed, Jan 27, 2016 at 07:25:13PM +0100, Alexander Potapenko wrote:
>  Quarantine isolates freed objects in a separate queue. The objects are
>  returned to the allocator later, which helps to detect use-after-free
>  errors.
> 
>  Freed objects are first added to per-cpu quarantine queues.
>  When a cache is destroyed or memory shrinking is requested, the objects
>  are moved into the global quarantine queue. Whenever a kmalloc call
>  allows memory reclaiming, the oldest objects are popped out of the
>  global queue until the total size of objects in quarantine is less than
>  3/4 of the maximum quarantine size (which is a fraction of installed
>  physical memory).
> >>>
> >>> Just wondering why not using time based approach rather than size
> >>> based one. In heavy load condition, how much time do the object stay in
> >>> quarantine?
> >>>
> 
>  Right now quarantine support is only enabled in SLAB allocator.
>  Unification of KASAN features in SLAB and SLUB will be done later.
> 
>  This patch is based on the "mm: kasan: quarantine" patch originally
>  prepared by Dmitry Chernenkov.
> 
>  Signed-off-by: Alexander Potapenko 
>  ---
>   include/linux/kasan.h |  30 --
>   lib/test_kasan.c  |  29 ++
>   mm/kasan/Makefile |   2 +-
>   mm/kasan/kasan.c  |  68 +++-
>   mm/kasan/kasan.h  |  11 +-
>   mm/kasan/quarantine.c | 284 
>  ++
>   mm/kasan/report.c |   3 +-
>   mm/mempool.c  |   7 +-
>   mm/page_alloc.c   |   2 +-
>   mm/slab.c |  12 ++-
>   mm/slab.h |   4 +
>   mm/slab_common.c  |   2 +
>   mm/slub.c |   4 +-
>   13 files changed, 435 insertions(+), 23 deletions(-)
> 
> >>>
> >>> ...
> >>>
>  +bool kasan_slab_free(struct kmem_cache *cache, void *object)
>  +{
>  +#ifdef CONFIG_SLAB
>  + /* RCU slabs could be legally used after free within the RCU 
>  period */
>  + if (unlikely(cache->flags & SLAB_DESTROY_BY_RCU))
>  + return false;
>  +
>  + if (likely(cache->flags & SLAB_KASAN)) {
>  + struct kasan_alloc_meta *alloc_info =
>  + get_alloc_info(cache, object);
>  + struct kasan_free_meta *free_info =
>  + get_free_info(cache, object);
>  +
>  + switch (alloc_info->state) {
>  + case KASAN_STATE_ALLOC:
>  + alloc_info->state = KASAN_STATE_QUARANTINE;
>  + quarantine_put(free_info, cache);
> >>>
> >>> quarantine_put() can be called regardless of SLAB_DESTROY_BY_RCU,
> >>> although it's not much meaningful without poisoning. But, I have an
> >>> idea to poison object on SLAB_DESTROY_BY_RCU cache.
> >>>
> >>> quarantine_put() moves per cpu list to global queue when
> >>> list size reaches QUARANTINE_PERCPU_SIZE. If we call synchronize_rcu()
> >>> at that time, after then, we can poison objects. With appropriate size
> >>> setup, it would not be intrusive.
> >>>
> >> Won't this slow the quarantine down unpredictably (e.g. in the case
> >> there're no RCU slabs in quarantine we'll still be waiting for
> >> synchronize_rcu())?
> >
> > It could be handled by introducing one cpu variable.
> >
> >> Yet this is something worth looking into. Do you want RCU to be
> >> handled in this patch set?
> >
> > No. It would be future work.
> >
>  + set_track(_info->track, GFP_NOWAIT);
> >>>
> >>> set_track() can be called regardless of SLAB_DESTROY_BY_RCU.
> >> Agreed, I can fix that if we decide to handle RCU in this patch
> >> (otherwise it will lead to confusion).
> >>
> >>>
>  + kasan_poison_slab_free(cache, object);
>  + return true;
>  + case KASAN_STATE_QUARANTINE:
>  + case KASAN_STATE_FREE:
>  + pr_err("Double free");
>  + dump_stack();
>  + break;
>  + default:
>  + break;
>  + }
>  + }
>  + return false;
>  +#else
>  + kasan_poison_slab_free(cache, object);
>  + return false;
>  +#endif
>  +}
>  +
> >>>
> >>> ...
> >>>
>  +void quarantine_reduce(void)
>  +{
>  + size_t new_quarantine_size;
>  + unsigned long flags;
>  + struct qlist to_free = QLIST_INIT;
>  + size_t size_to_free = 0;
>  + void **last;
>  +
>  + if 

[PATCH v3 2/2] mm/page_ref: add tracepoint to track down page reference manipulation

[js1304]

From: Joonsoo Kim 

CMA allocation should be guaranteed to succeed by definition, but,
unfortunately, it would be failed sometimes. It is hard to track down
the problem, because it is related to page reference manipulation and
we don't have any facility to analyze it.

This patch adds tracepoints to track down page reference manipulation.
With it, we can find exact reason of failure and can fix the problem.
Following is an example of tracepoint output. (note: this example is
stale version that printing flags as the number. Recent version will
print it as human readable string.)

<...>-9018  [004]92.678375: page_ref_set: pfn=0x17ac9 flags=0x0 
count=1 mapcount=0 mapping=(nil) mt=4 val=1
<...>-9018  [004]92.678378: kernel_stack:
 => get_page_from_freelist (81176659)
 => __alloc_pages_nodemask (81176d22)
 => alloc_pages_vma (811bf675)
 => handle_mm_fault (8119e693)
 => __do_page_fault (810631ea)
 => trace_do_page_fault (81063543)
 => do_async_page_fault (8105c40a)
 => async_page_fault (817581d8)
[snip]
<...>-9018  [004]92.678379: page_ref_mod: pfn=0x17ac9 flags=0x40048 
count=2 mapcount=1 mapping=0x880015a78dc1 mt=4 val=1
[snip]
...
...
<...>-9131  [001]93.174468: test_pages_isolated:  start_pfn=0x17800 
end_pfn=0x17c00 fin_pfn=0x17ac9 ret=fail
[snip]
<...>-9018  [004]93.174843: page_ref_mod_and_test: pfn=0x17ac9 
flags=0x40068 count=0 mapcount=0 mapping=0x880015a78dc1 mt=4 val=-1 ret=1
 => release_pages (8117c9e4)
 => free_pages_and_swap_cache (811b0697)
 => tlb_flush_mmu_free (81199616)
 => tlb_finish_mmu (8119a62c)
 => exit_mmap (811a53f7)
 => mmput (81073f47)
 => do_exit (810794e9)
 => do_group_exit (81079def)
 => SyS_exit_group (81079e74)
 => entry_SYSCALL_64_fastpath (817560b6)

This output shows that problem comes from exit path. In exit path,
to improve performance, pages are not freed immediately. They are gathered
and processed by batch. During this process, migration cannot be possible
and CMA allocation is failed. This problem is hard to find without this
page reference tracepoint facility.

Enabling this feature bloat kernel text 30 KB in my configuration.

   textdata bss dec hex filename
121273272243616 1507328 15878271 f2487f vmlinux_disabled
121572082258880 1507328 15923416 f2f8d8 vmlinux_enabled

Note that, due to header file dependency problem between mm.h and
tracepoint.h, this feature has to open code the static key functions
for tracepoints. Proposed by Steven Rostedt in following link.

https://lkml.org/lkml/2015/12/9/699

v3:
o Add commit description and code comment why this patch open code
the static key functions for tracepoints.
o Notify that example is stale version.
o Add "depends on TRACEPOINTS".

v2:
o Use static key of each tracepoints to avoid function call overhead
when tracepoints are disabled.
o Print human-readable page flag thanks to newly introduced %pgp option.
o Add more description to Kconfig.debug.

Acked-by: Michal Nazarewicz 
Signed-off-by: Joonsoo Kim 
---
 include/linux/page_ref.h|  98 +++--
 include/trace/events/page_ref.h | 133 
 mm/Kconfig.debug|  14 +
 mm/Makefile |   1 +
 mm/debug_page_ref.c |  53 
 5 files changed, 294 insertions(+), 5 deletions(-)
 create mode 100644 include/trace/events/page_ref.h
 create mode 100644 mm/debug_page_ref.c

diff --git a/include/linux/page_ref.h b/include/linux/page_ref.h
index 534249c..e2631ac 100644
--- a/include/linux/page_ref.h
+++ b/include/linux/page_ref.h
@@ -1,6 +1,62 @@
 #include 
 #include 
 #include 
+#include 
+
+extern struct tracepoint __tracepoint_page_ref_set;
+extern struct tracepoint __tracepoint_page_ref_mod;
+extern struct tracepoint __tracepoint_page_ref_mod_and_test;
+extern struct tracepoint __tracepoint_page_ref_mod_and_return;
+extern struct tracepoint __tracepoint_page_ref_mod_unless;
+extern struct tracepoint __tracepoint_page_ref_freeze;
+extern struct tracepoint __tracepoint_page_ref_unfreeze;
+
+#ifdef CONFIG_DEBUG_PAGE_REF
+
+/*
+ * Ideally we would want to use the trace__enabled() helper
+ * functions. But due to include header file issues, that is not
+ * feasible. Instead we have to open code the static key functions.
+ *
+ * See trace_##name##_enabled(void) in include/linux/tracepoint.h
+ */
+#define page_ref_tracepoint_active(t) static_key_false(&(t).key)
+
+extern void __page_ref_set(struct page *page, int v);
+extern void __page_ref_mod(struct page *page, int v);
+extern void __page_ref_mod_and_test(struct page *page, int v, int ret);
+extern void __page_ref_mod_and_return(struct page *page, int v, int ret);
+extern void __page_ref_mod_unless(struct 

[PATCH v3 1/2] mm: introduce page reference manipulation functions

[js1304]

From: Joonsoo Kim 

Success of CMA allocation largely depends on success of migration
and key factor of it is page reference count. Until now, page reference
is manipulated by direct calling atomic functions so we cannot follow up
who and where manipulate it. Then, it is hard to find actual reason
of CMA allocation failure. CMA allocation should be guaranteed to succeed
so finding offending place is really important.

In this patch, call sites where page reference is manipulated are converted
to introduced wrapper function. This is preparation step to add tracepoint
to each page reference manipulation function. With this facility, we can
easily find reason of CMA allocation failure. There is no functional change
in this patch.

Acked-by: Michal Nazarewicz 
Signed-off-by: Joonsoo Kim 
---
 arch/mips/mm/gup.c|  2 +-
 arch/powerpc/mm/mmu_context_hash64.c  |  3 +-
 arch/powerpc/mm/pgtable_64.c  |  2 +-
 arch/x86/mm/gup.c |  2 +-
 drivers/block/aoe/aoecmd.c|  4 +-
 drivers/net/ethernet/freescale/gianfar.c  |  2 +-
 drivers/net/ethernet/intel/fm10k/fm10k_main.c |  2 +-
 drivers/net/ethernet/intel/igb/igb_main.c |  2 +-
 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |  2 +-
 drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c |  2 +-
 drivers/net/ethernet/mellanox/mlx4/en_rx.c|  7 +--
 drivers/net/ethernet/sun/niu.c|  2 +-
 include/linux/mm.h| 21 ++-
 include/linux/page_ref.h  | 76 +++
 include/linux/pagemap.h   | 19 +-
 mm/huge_memory.c  |  4 +-
 mm/internal.h |  5 --
 mm/memory_hotplug.c   |  4 +-
 mm/migrate.c  | 10 +--
 mm/page_alloc.c   |  6 +-
 mm/vmscan.c   |  6 +-
 21 files changed, 113 insertions(+), 70 deletions(-)
 create mode 100644 include/linux/page_ref.h

diff --git a/arch/mips/mm/gup.c b/arch/mips/mm/gup.c
index 1afd87c..6cdffc7 100644
--- a/arch/mips/mm/gup.c
+++ b/arch/mips/mm/gup.c
@@ -64,7 +64,7 @@ static inline void get_head_page_multiple(struct page *page, 
int nr)
 {
VM_BUG_ON(page != compound_head(page));
VM_BUG_ON(page_count(page) == 0);
-   atomic_add(nr, >_count);
+   page_ref_add(page, nr);
SetPageReferenced(page);
 }
 
diff --git a/arch/powerpc/mm/mmu_context_hash64.c 
b/arch/powerpc/mm/mmu_context_hash64.c
index 4e4efbc..9ca6fe1 100644
--- a/arch/powerpc/mm/mmu_context_hash64.c
+++ b/arch/powerpc/mm/mmu_context_hash64.c
@@ -118,8 +118,7 @@ static void destroy_pagetable_page(struct mm_struct *mm)
/* drop all the pending references */
count = ((unsigned long)pte_frag & ~PAGE_MASK) >> PTE_FRAG_SIZE_SHIFT;
/* We allow PTE_FRAG_NR fragments from a PTE page */
-   count = atomic_sub_return(PTE_FRAG_NR - count, >_count);
-   if (!count) {
+   if (page_ref_sub_and_test(page, PTE_FRAG_NR - count)) {
pgtable_page_dtor(page);
free_hot_cold_page(page, 0);
}
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index cdf2123..d9cc66c 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -403,7 +403,7 @@ static pte_t *__alloc_for_cache(struct mm_struct *mm, int 
kernel)
 * count.
 */
if (likely(!mm->context.pte_frag)) {
-   atomic_set(>_count, PTE_FRAG_NR);
+   set_page_count(page, PTE_FRAG_NR);
mm->context.pte_frag = ret + PTE_FRAG_SIZE;
}
spin_unlock(>page_table_lock);
diff --git a/arch/x86/mm/gup.c b/arch/x86/mm/gup.c
index d8a798d..f8d0b5e 100644
--- a/arch/x86/mm/gup.c
+++ b/arch/x86/mm/gup.c
@@ -131,7 +131,7 @@ static inline void get_head_page_multiple(struct page 
*page, int nr)
 {
VM_BUG_ON_PAGE(page != compound_head(page), page);
VM_BUG_ON_PAGE(page_count(page) == 0, page);
-   atomic_add(nr, >_count);
+   page_ref_add(page, nr);
SetPageReferenced(page);
 }
 
diff --git a/drivers/block/aoe/aoecmd.c b/drivers/block/aoe/aoecmd.c
index d048d20..437b3a8 100644
--- a/drivers/block/aoe/aoecmd.c
+++ b/drivers/block/aoe/aoecmd.c
@@ -875,7 +875,7 @@ bio_pageinc(struct bio *bio)
 * compound pages is no longer allowed by the kernel.
 */
page = compound_head(bv.bv_page);
-   atomic_inc(>_count);
+   page_ref_inc(page);
}
 }
 
@@ -888,7 +888,7 @@ bio_pagedec(struct bio *bio)
 
bio_for_each_segment(bv, bio, iter) {
page = compound_head(bv.bv_page);
-   atomic_dec(>_count);
+   

[PATCH v3 2/2] mm/page_ref: add tracepoint to track down page reference manipulation

[js1304]

From: Joonsoo Kim 

CMA allocation should be guaranteed to succeed by definition, but,
unfortunately, it would be failed sometimes. It is hard to track down
the problem, because it is related to page reference manipulation and
we don't have any facility to analyze it.

This patch adds tracepoints to track down page reference manipulation.
With it, we can find exact reason of failure and can fix the problem.
Following is an example of tracepoint output. (note: this example is
stale version that printing flags as the number. Recent version will
print it as human readable string.)

<...>-9018  [004]92.678375: page_ref_set: pfn=0x17ac9 flags=0x0 
count=1 mapcount=0 mapping=(nil) mt=4 val=1
<...>-9018  [004]92.678378: kernel_stack:
 => get_page_from_freelist (81176659)
 => __alloc_pages_nodemask (81176d22)
 => alloc_pages_vma (811bf675)
 => handle_mm_fault (8119e693)
 => __do_page_fault (810631ea)
 => trace_do_page_fault (81063543)
 => do_async_page_fault (8105c40a)
 => async_page_fault (817581d8)
[snip]
<...>-9018  [004]92.678379: page_ref_mod: pfn=0x17ac9 flags=0x40048 
count=2 mapcount=1 mapping=0x880015a78dc1 mt=4 val=1
[snip]
...
...
<...>-9131  [001]93.174468: test_pages_isolated:  start_pfn=0x17800 
end_pfn=0x17c00 fin_pfn=0x17ac9 ret=fail
[snip]
<...>-9018  [004]93.174843: page_ref_mod_and_test: pfn=0x17ac9 
flags=0x40068 count=0 mapcount=0 mapping=0x880015a78dc1 mt=4 val=-1 ret=1
 => release_pages (8117c9e4)
 => free_pages_and_swap_cache (811b0697)
 => tlb_flush_mmu_free (81199616)
 => tlb_finish_mmu (8119a62c)
 => exit_mmap (811a53f7)
 => mmput (81073f47)
 => do_exit (810794e9)
 => do_group_exit (81079def)
 => SyS_exit_group (81079e74)
 => entry_SYSCALL_64_fastpath (817560b6)

This output shows that problem comes from exit path. In exit path,
to improve performance, pages are not freed immediately. They are gathered
and processed by batch. During this process, migration cannot be possible
and CMA allocation is failed. This problem is hard to find without this
page reference tracepoint facility.

Enabling this feature bloat kernel text 30 KB in my configuration.

   textdata bss dec hex filename
121273272243616 1507328 15878271 f2487f vmlinux_disabled
121572082258880 1507328 15923416 f2f8d8 vmlinux_enabled

Note that, due to header file dependency problem between mm.h and
tracepoint.h, this feature has to open code the static key functions
for tracepoints. Proposed by Steven Rostedt in following link.

https://lkml.org/lkml/2015/12/9/699

v3:
o Add commit description and code comment why this patch open code
the static key functions for tracepoints.
o Notify that example is stale version.
o Add "depends on TRACEPOINTS".

v2:
o Use static key of each tracepoints to avoid function call overhead
when tracepoints are disabled.
o Print human-readable page flag thanks to newly introduced %pgp option.
o Add more description to Kconfig.debug.

Acked-by: Michal Nazarewicz 
Signed-off-by: Joonsoo Kim 
---
 include/linux/page_ref.h|  98 +++--
 include/trace/events/page_ref.h | 133 
 mm/Kconfig.debug|  14 +
 mm/Makefile |   1 +
 mm/debug_page_ref.c |  53 
 5 files changed, 294 insertions(+), 5 deletions(-)
 create mode 100644 include/trace/events/page_ref.h
 create mode 100644 mm/debug_page_ref.c

diff --git a/include/linux/page_ref.h b/include/linux/page_ref.h
index 534249c..e2631ac 100644
--- a/include/linux/page_ref.h
+++ b/include/linux/page_ref.h
@@ -1,6 +1,62 @@
 #include 
 #include 
 #include 
+#include 
+
+extern struct tracepoint __tracepoint_page_ref_set;
+extern struct tracepoint __tracepoint_page_ref_mod;
+extern struct tracepoint __tracepoint_page_ref_mod_and_test;
+extern struct tracepoint __tracepoint_page_ref_mod_and_return;
+extern struct tracepoint __tracepoint_page_ref_mod_unless;
+extern struct tracepoint __tracepoint_page_ref_freeze;
+extern struct tracepoint __tracepoint_page_ref_unfreeze;
+
+#ifdef CONFIG_DEBUG_PAGE_REF
+
+/*
+ * Ideally we would want to use the trace__enabled() helper
+ * functions. But due to include header file issues, that is not
+ * feasible. Instead we have to open code the static key functions.
+ *
+ * See trace_##name##_enabled(void) in include/linux/tracepoint.h
+ */
+#define page_ref_tracepoint_active(t) static_key_false(&(t).key)
+
+extern void __page_ref_set(struct page *page, int v);
+extern void __page_ref_mod(struct page *page, int v);
+extern void __page_ref_mod_and_test(struct page *page, int v, int ret);
+extern void __page_ref_mod_and_return(struct page *page, int v, int ret);
+extern void __page_ref_mod_unless(struct page *page, int v, int u);
+extern void __page_ref_freeze(struct page 

[PATCH v3 1/2] mm: introduce page reference manipulation functions

[js1304]

From: Joonsoo Kim 

Success of CMA allocation largely depends on success of migration
and key factor of it is page reference count. Until now, page reference
is manipulated by direct calling atomic functions so we cannot follow up
who and where manipulate it. Then, it is hard to find actual reason
of CMA allocation failure. CMA allocation should be guaranteed to succeed
so finding offending place is really important.

In this patch, call sites where page reference is manipulated are converted
to introduced wrapper function. This is preparation step to add tracepoint
to each page reference manipulation function. With this facility, we can
easily find reason of CMA allocation failure. There is no functional change
in this patch.

Acked-by: Michal Nazarewicz 
Signed-off-by: Joonsoo Kim 
---
 arch/mips/mm/gup.c|  2 +-
 arch/powerpc/mm/mmu_context_hash64.c  |  3 +-
 arch/powerpc/mm/pgtable_64.c  |  2 +-
 arch/x86/mm/gup.c |  2 +-
 drivers/block/aoe/aoecmd.c|  4 +-
 drivers/net/ethernet/freescale/gianfar.c  |  2 +-
 drivers/net/ethernet/intel/fm10k/fm10k_main.c |  2 +-
 drivers/net/ethernet/intel/igb/igb_main.c |  2 +-
 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c |  2 +-
 drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c |  2 +-
 drivers/net/ethernet/mellanox/mlx4/en_rx.c|  7 +--
 drivers/net/ethernet/sun/niu.c|  2 +-
 include/linux/mm.h| 21 ++-
 include/linux/page_ref.h  | 76 +++
 include/linux/pagemap.h   | 19 +-
 mm/huge_memory.c  |  4 +-
 mm/internal.h |  5 --
 mm/memory_hotplug.c   |  4 +-
 mm/migrate.c  | 10 +--
 mm/page_alloc.c   |  6 +-
 mm/vmscan.c   |  6 +-
 21 files changed, 113 insertions(+), 70 deletions(-)
 create mode 100644 include/linux/page_ref.h

diff --git a/arch/mips/mm/gup.c b/arch/mips/mm/gup.c
index 1afd87c..6cdffc7 100644
--- a/arch/mips/mm/gup.c
+++ b/arch/mips/mm/gup.c
@@ -64,7 +64,7 @@ static inline void get_head_page_multiple(struct page *page, 
int nr)
 {
VM_BUG_ON(page != compound_head(page));
VM_BUG_ON(page_count(page) == 0);
-   atomic_add(nr, >_count);
+   page_ref_add(page, nr);
SetPageReferenced(page);
 }
 
diff --git a/arch/powerpc/mm/mmu_context_hash64.c 
b/arch/powerpc/mm/mmu_context_hash64.c
index 4e4efbc..9ca6fe1 100644
--- a/arch/powerpc/mm/mmu_context_hash64.c
+++ b/arch/powerpc/mm/mmu_context_hash64.c
@@ -118,8 +118,7 @@ static void destroy_pagetable_page(struct mm_struct *mm)
/* drop all the pending references */
count = ((unsigned long)pte_frag & ~PAGE_MASK) >> PTE_FRAG_SIZE_SHIFT;
/* We allow PTE_FRAG_NR fragments from a PTE page */
-   count = atomic_sub_return(PTE_FRAG_NR - count, >_count);
-   if (!count) {
+   if (page_ref_sub_and_test(page, PTE_FRAG_NR - count)) {
pgtable_page_dtor(page);
free_hot_cold_page(page, 0);
}
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index cdf2123..d9cc66c 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -403,7 +403,7 @@ static pte_t *__alloc_for_cache(struct mm_struct *mm, int 
kernel)
 * count.
 */
if (likely(!mm->context.pte_frag)) {
-   atomic_set(>_count, PTE_FRAG_NR);
+   set_page_count(page, PTE_FRAG_NR);
mm->context.pte_frag = ret + PTE_FRAG_SIZE;
}
spin_unlock(>page_table_lock);
diff --git a/arch/x86/mm/gup.c b/arch/x86/mm/gup.c
index d8a798d..f8d0b5e 100644
--- a/arch/x86/mm/gup.c
+++ b/arch/x86/mm/gup.c
@@ -131,7 +131,7 @@ static inline void get_head_page_multiple(struct page 
*page, int nr)
 {
VM_BUG_ON_PAGE(page != compound_head(page), page);
VM_BUG_ON_PAGE(page_count(page) == 0, page);
-   atomic_add(nr, >_count);
+   page_ref_add(page, nr);
SetPageReferenced(page);
 }
 
diff --git a/drivers/block/aoe/aoecmd.c b/drivers/block/aoe/aoecmd.c
index d048d20..437b3a8 100644
--- a/drivers/block/aoe/aoecmd.c
+++ b/drivers/block/aoe/aoecmd.c
@@ -875,7 +875,7 @@ bio_pageinc(struct bio *bio)
 * compound pages is no longer allowed by the kernel.
 */
page = compound_head(bv.bv_page);
-   atomic_inc(>_count);
+   page_ref_inc(page);
}
 }
 
@@ -888,7 +888,7 @@ bio_pagedec(struct bio *bio)
 
bio_for_each_segment(bv, bio, iter) {
page = compound_head(bv.bv_page);
-   atomic_dec(>_count);
+   page_ref_dec(page);
}
 }
 
diff --git 

Re: [RFC/RFT][PATCH 1/1] cpufreq: New governor using utilization data from the scheduler

[Steve Muckle]

On 02/22/2016 03:02 PM, Rafael J. Wysocki wrote:
>> I guess the first (macro) question is why did you decide to go with a
>> complete new governor, where new here is w.r.t. the sched-freq solution.
> 
> Probably the most comprehensive answer to this question is my intro
> message: http://marc.info/?l=linux-pm=145609673008122=2
> 
> The executive summary is probably that this was the most
> straightforward way to use the scheduler-provided numbers in cpufreq
> that I could think about.
> 
>> AFAICT, it is true that your solution directly builds on top of the
>> latest changes to cpufreq core and governor, but it also seems to have
>> more than a few points in common with sched-freq,
> 
> That surely isn't a drawback, is it?
>
> If two people come to the same conclusions in different ways, that's
> an indication that the conclusions may actually be correct.
> 
>> and sched-freq has been discussed and evaluated for already quite some time.
> 
> Yes, it has.
> 
> Does this mean that no one is allowed to try any alternatives to it now?

As mentioned above they are rather similar so it doesn't really seem
like an alternative per se, more like a reimplementation.

Why do you feel a new starting point for this problem is needed? Are
there specific technical concerns? I see you started looking over the
latest schedfreq RFC, thank you for your comments thus far. We'd really
appreciate your continued feedback and the chance to collaborate on it
to move it forward. I and others have put a fair bit of effort into it
over the last year or so and will happily and earnestly work to address
any shortcomings you raise.

I will review your RFC in the next day or so as well.

...
> My goal, that may be quite different from yours, is to reduce the
> cpufreq's overhead as much as I possibly can.  If I have to change the
> way it drives the CPU frequency selection to achieve that goal, I will
> do that, but if that can stay the way it is, that's fine too.

Our primary goal has been simply to achieve functional scheduler-driven
CPU frequency control with equivalent or better power and performance
than what is available today. Reduction of cpufreq overhead fits within
this goal (and may be required) so no conflict here.

thanks,
Steve

Re: [RFC/RFT][PATCH 1/1] cpufreq: New governor using utilization data from the scheduler

[Steve Muckle]

On 02/22/2016 03:02 PM, Rafael J. Wysocki wrote:
>> I guess the first (macro) question is why did you decide to go with a
>> complete new governor, where new here is w.r.t. the sched-freq solution.
> 
> Probably the most comprehensive answer to this question is my intro
> message: http://marc.info/?l=linux-pm=145609673008122=2
> 
> The executive summary is probably that this was the most
> straightforward way to use the scheduler-provided numbers in cpufreq
> that I could think about.
> 
>> AFAICT, it is true that your solution directly builds on top of the
>> latest changes to cpufreq core and governor, but it also seems to have
>> more than a few points in common with sched-freq,
> 
> That surely isn't a drawback, is it?
>
> If two people come to the same conclusions in different ways, that's
> an indication that the conclusions may actually be correct.
> 
>> and sched-freq has been discussed and evaluated for already quite some time.
> 
> Yes, it has.
> 
> Does this mean that no one is allowed to try any alternatives to it now?

As mentioned above they are rather similar so it doesn't really seem
like an alternative per se, more like a reimplementation.

Why do you feel a new starting point for this problem is needed? Are
there specific technical concerns? I see you started looking over the
latest schedfreq RFC, thank you for your comments thus far. We'd really
appreciate your continued feedback and the chance to collaborate on it
to move it forward. I and others have put a fair bit of effort into it
over the last year or so and will happily and earnestly work to address
any shortcomings you raise.

I will review your RFC in the next day or so as well.

...
> My goal, that may be quite different from yours, is to reduce the
> cpufreq's overhead as much as I possibly can.  If I have to change the
> way it drives the CPU frequency selection to achieve that goal, I will
> do that, but if that can stay the way it is, that's fine too.

Our primary goal has been simply to achieve functional scheduler-driven
CPU frequency control with equivalent or better power and performance
than what is available today. Reduction of cpufreq overhead fits within
this goal (and may be required) so no conflict here.

thanks,
Steve

Re: [PATCH] firmware: set firmware_buf size in fw_get_filesystem_firmware()

[Bjorn Andersson]

On Sat, Feb 20, 2016 at 1:22 AM, Sergey Senozhatsky
 wrote:
> Set firmware_buf->size in fw_get_filesystem_firmware() after
> successful kernel_read_file_from_path(), otherwise assign_firmware_buf()
> fails.
>

Acked-by: Bjorn Andersson 

> Signed-off-by: Sergey Senozhatsky 
> ---
>  drivers/base/firmware_class.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c
> index b8bc846..7cf41a5 100644
> --- a/drivers/base/firmware_class.c
> +++ b/drivers/base/firmware_class.c
> @@ -335,6 +335,7 @@ static int fw_get_filesystem_firmware(struct device 
> *device,
> }
> dev_dbg(device, "direct-loading %s\n",
> buf->fw_id);
> +   buf->size = size;
> fw_finish_direct_load(device, buf);
> break;
> }
> --
> 2.7.1
>

Regards,
Bjorn

Re: [PATCH] firmware: set firmware_buf size in fw_get_filesystem_firmware()

[Bjorn Andersson]

On Sat, Feb 20, 2016 at 1:22 AM, Sergey Senozhatsky
 wrote:
> Set firmware_buf->size in fw_get_filesystem_firmware() after
> successful kernel_read_file_from_path(), otherwise assign_firmware_buf()
> fails.
>

Acked-by: Bjorn Andersson 

> Signed-off-by: Sergey Senozhatsky 
> ---
>  drivers/base/firmware_class.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c
> index b8bc846..7cf41a5 100644
> --- a/drivers/base/firmware_class.c
> +++ b/drivers/base/firmware_class.c
> @@ -335,6 +335,7 @@ static int fw_get_filesystem_firmware(struct device 
> *device,
> }
> dev_dbg(device, "direct-loading %s\n",
> buf->fw_id);
> +   buf->size = size;
> fw_finish_direct_load(device, buf);
> break;
> }
> --
> 2.7.1
>

Regards,
Bjorn

Re: [PATCH v2 1/2] gpio: designware: switch device node to fwnode

[kbuild test robot]

Hi qiujiang,

[auto build test ERROR on gpio/for-next]
[also build test ERROR on v4.5-rc5 next-20160223]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improving the system]

url:
https://github.com/0day-ci/linux/commits/qiujiang/gpio-designware-switch-device-node-to-fwnode/20160223-145423
base:   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git 
for-next
config: x86_64-randconfig-i0-201608 (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64 

All errors (new ones prefixed by >>):

   drivers/mfd/intel_quark_i2c_gpio.c: In function 'intel_quark_gpio_setup':
>> drivers/mfd/intel_quark_i2c_gpio.c:230:19: error: 'struct 
>> dwapb_port_property' has no member named 'node'
 pdata->properties->node  = NULL;
  ^

vim +230 drivers/mfd/intel_quark_i2c_gpio.c

60ae5b9f Raymond Tan 2015-02-02  224 
sizeof(*pdata->properties),
60ae5b9f Raymond Tan 2015-02-02  225 
GFP_KERNEL);
60ae5b9f Raymond Tan 2015-02-02  226if (!pdata->properties)
60ae5b9f Raymond Tan 2015-02-02  227return -ENOMEM;
60ae5b9f Raymond Tan 2015-02-02  228  
60ae5b9f Raymond Tan 2015-02-02  229/* Set the properties for portA */
60ae5b9f Raymond Tan 2015-02-02 @230pdata->properties->node = NULL;
60ae5b9f Raymond Tan 2015-02-02  231pdata->properties->name = 
"intel-quark-x1000-gpio-portA";
60ae5b9f Raymond Tan 2015-02-02  232pdata->properties->idx  = 0;
60ae5b9f Raymond Tan 2015-02-02  233pdata->properties->ngpio= 
INTEL_QUARK_MFD_NGPIO;

:: The code at line 230 was first introduced by commit
:: 60ae5b9f5cdd80c529eda13bfdd600a0fc857afb mfd: intel_quark_i2c_gpio: Add 
Intel Quark X1000 I2C-GPIO MFD Driver

:: TO: Raymond Tan 
:: CC: Lee Jones 

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data

Re: [PATCH v2 1/2] gpio: designware: switch device node to fwnode

[kbuild test robot]

Hi qiujiang,

[auto build test ERROR on gpio/for-next]
[also build test ERROR on v4.5-rc5 next-20160223]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improving the system]

url:
https://github.com/0day-ci/linux/commits/qiujiang/gpio-designware-switch-device-node-to-fwnode/20160223-145423
base:   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git 
for-next
config: x86_64-randconfig-i0-201608 (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64 

All errors (new ones prefixed by >>):

   drivers/mfd/intel_quark_i2c_gpio.c: In function 'intel_quark_gpio_setup':
>> drivers/mfd/intel_quark_i2c_gpio.c:230:19: error: 'struct 
>> dwapb_port_property' has no member named 'node'
 pdata->properties->node  = NULL;
  ^

vim +230 drivers/mfd/intel_quark_i2c_gpio.c

60ae5b9f Raymond Tan 2015-02-02  224 
sizeof(*pdata->properties),
60ae5b9f Raymond Tan 2015-02-02  225 
GFP_KERNEL);
60ae5b9f Raymond Tan 2015-02-02  226if (!pdata->properties)
60ae5b9f Raymond Tan 2015-02-02  227return -ENOMEM;
60ae5b9f Raymond Tan 2015-02-02  228  
60ae5b9f Raymond Tan 2015-02-02  229/* Set the properties for portA */
60ae5b9f Raymond Tan 2015-02-02 @230pdata->properties->node = NULL;
60ae5b9f Raymond Tan 2015-02-02  231pdata->properties->name = 
"intel-quark-x1000-gpio-portA";
60ae5b9f Raymond Tan 2015-02-02  232pdata->properties->idx  = 0;
60ae5b9f Raymond Tan 2015-02-02  233pdata->properties->ngpio= 
INTEL_QUARK_MFD_NGPIO;

:: The code at line 230 was first introduced by commit
:: 60ae5b9f5cdd80c529eda13bfdd600a0fc857afb mfd: intel_quark_i2c_gpio: Add 
Intel Quark X1000 I2C-GPIO MFD Driver

:: TO: Raymond Tan 
:: CC: Lee Jones 

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data

Re: [PATCH v2 4/4] dmaengine: pxa_dma: fix the maximum requestor line

[Robert Jarzmik]

Vinod Koul  writes:

> On Mon, Feb 15, 2016 at 09:57:48PM +0100, Robert Jarzmik wrote:
>> The current number of requestor lines is limited to 31. This was an
>> error of a previous commit, as this number is platform dependent, and is
>> actually :
>>  - for pxa25x: 40 requestor lines
>>  - for pxa27x: 75 requestor lines
>>  - for pxa3xx: 100 requestor lines
>> 
>> The previous testing did not reveal the faulty constant as on pxa[23]xx
>> platforms, only camera, MSL and USB are above requestor 32, and in these
>> only the camera has a driver using dma.
>> 
>> Fixes: e87ffbdf0697 ("dmaengine: pxa_dma: fix the no-requestor case")
>> Signed-off-by: Robert Jarzmik 
>
> Acked-by: Vinod Koul 
>
> Which tree is this targetted thru?
PXA for-next tree, my tree, once I gather the acks.

Cheers.

-- 
Robert

Re: [PATCH v2 4/4] dmaengine: pxa_dma: fix the maximum requestor line

[Robert Jarzmik]

Vinod Koul  writes:

> On Mon, Feb 15, 2016 at 09:57:48PM +0100, Robert Jarzmik wrote:
>> The current number of requestor lines is limited to 31. This was an
>> error of a previous commit, as this number is platform dependent, and is
>> actually :
>>  - for pxa25x: 40 requestor lines
>>  - for pxa27x: 75 requestor lines
>>  - for pxa3xx: 100 requestor lines
>> 
>> The previous testing did not reveal the faulty constant as on pxa[23]xx
>> platforms, only camera, MSL and USB are above requestor 32, and in these
>> only the camera has a driver using dma.
>> 
>> Fixes: e87ffbdf0697 ("dmaengine: pxa_dma: fix the no-requestor case")
>> Signed-off-by: Robert Jarzmik 
>
> Acked-by: Vinod Koul 
>
> Which tree is this targetted thru?
PXA for-next tree, my tree, once I gather the acks.

Cheers.

-- 
Robert

RE: [PATCH] phy: rcar-gen3-usb2: remove HSUSB registers handling

[Yoshihiro Shimoda]

Hi,

> Hi,
> 
> On Tuesday 23 February 2016 11:54 AM, Yoshihiro Shimoda wrote:
> > Hi Kishon,
> >
> > Would you review this patch?
> 
> merged it now. Thanks for reminding.

Thank you!

Best regards,
Yoshihiro Shimoda

> -Kishon
> 

RE: [PATCH] phy: rcar-gen3-usb2: remove HSUSB registers handling

[Yoshihiro Shimoda]

Hi,

> Hi,
> 
> On Tuesday 23 February 2016 11:54 AM, Yoshihiro Shimoda wrote:
> > Hi Kishon,
> >
> > Would you review this patch?
> 
> merged it now. Thanks for reminding.

Thank you!

Best regards,
Yoshihiro Shimoda

> -Kishon
> 

[PATCH 2/4] dt-bindings: add bindings for rk3399 clock controller

[jianqun.xu]

From: Xing Zheng 

Add devicetree bindings for Rockchip cru which found on
Rockchip SoCs.

Signed-off-by: Xing Zheng 
Signed-off-by: Jianqun Xu 
---
 .../bindings/clock/rockchip,rk3399-cru.txt | 82 ++
 1 file changed, 82 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt

diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt 
b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt
new file mode 100644
index 000..07bcc6e
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt
@@ -0,0 +1,82 @@
+* Rockchip RK3399 Clock and Reset Unit
+
+The RK3399 clock controller generates and supplies clock to various
+controllers within the SoC and also implements a reset controller for SoC
+peripherals.
+
+Required Properties:
+
+- compatible: PMU for CRU should be "rockchip,rk3399-pmucru"
+- compatible: CRU should be "rockchip,rk3399-cru"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- #clock-cells: should be 1.
+- #reset-cells: should be 1.
+
+Optional Properties:
+
+- rockchip,grf: phandle to the syscon managing the "general register files"
+  If missing, pll rates are not changeable, due to the missing pll lock status.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. All available clocks are defined as
+preprocessor macros in the dt-bindings/clock/rk3399-cru.h headers and can be
+used in device tree sources. Similar macros exist for the reset sources in
+these files.
+
+External clocks:
+
+There are several clocks that are generated outside the SoC. It is expected
+that they are defined using standard clock bindings with following
+clock-output-names:
+ - "xin24m" - crystal input - required,
+ - "xin32k" - rtc clock - optional,
+ - "ext_i2s" - external I2S clock - optional,
+ - "ext_gmac" - external GMAC clock - optional
+ - "ext_hsadc" - external HSADC clock - optional,
+ - "ext_isp" - external ISP clock - optional,
+ - "ext_jtag" - external JTAG clock - optional
+ - "ext_vip" - external VIP clock - optional,
+ - "usbotg_out" - output clock of the pll in the otg phy
+
+Example: General Register Files
+
+   pmugrf: syscon@ff32 {
+   compatible = "rockchip,rk3399-pmugrf", "syscon";
+   reg = <0x0 0xff32 0x0 0x1000>;
+   };
+
+   grf: syscon@ff77 {
+   compatible = "rockchip,rk3399-grf", "syscon";
+   reg = <0x0 0xff77 0x0 0x1>;
+   };
+
+Example: Clock controller node:
+
+   pmucru: pmu-clock-controller@ff75 {
+   compatible = "rockchip,rk3399-pmucru";
+   reg = <0x0 0xff75 0x0 0x1000>;
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   };
+
+   cru: clock-controller@ff76 {
+   compatible = "rockchip,rk3399-cru";
+   reg = <0x0 0xff76 0x0 0x1000>;
+   rockchip,grf = <>;
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   };
+
+Example: UART controller node that consumes the clock generated by the clock
+  controller:
+
+   uart0: serial@ff1a {
+   compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart";
+   reg = <0x0 0xff18 0x0 0x100>;
+   clocks = < SCLK_UART0>, < PCLK_UART0>;
+   clock-names = "baudclk", "apb_pclk";
+   interrupts = ;
+   reg-shift = <2>;
+   reg-io-width = <4>;
+   };
-- 
1.9.1

[PATCH 2/4] dt-bindings: add bindings for rk3399 clock controller

[jianqun.xu]

From: Xing Zheng 

Add devicetree bindings for Rockchip cru which found on
Rockchip SoCs.

Signed-off-by: Xing Zheng 
Signed-off-by: Jianqun Xu 
---
 .../bindings/clock/rockchip,rk3399-cru.txt | 82 ++
 1 file changed, 82 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt

diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt 
b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt
new file mode 100644
index 000..07bcc6e
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt
@@ -0,0 +1,82 @@
+* Rockchip RK3399 Clock and Reset Unit
+
+The RK3399 clock controller generates and supplies clock to various
+controllers within the SoC and also implements a reset controller for SoC
+peripherals.
+
+Required Properties:
+
+- compatible: PMU for CRU should be "rockchip,rk3399-pmucru"
+- compatible: CRU should be "rockchip,rk3399-cru"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- #clock-cells: should be 1.
+- #reset-cells: should be 1.
+
+Optional Properties:
+
+- rockchip,grf: phandle to the syscon managing the "general register files"
+  If missing, pll rates are not changeable, due to the missing pll lock status.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. All available clocks are defined as
+preprocessor macros in the dt-bindings/clock/rk3399-cru.h headers and can be
+used in device tree sources. Similar macros exist for the reset sources in
+these files.
+
+External clocks:
+
+There are several clocks that are generated outside the SoC. It is expected
+that they are defined using standard clock bindings with following
+clock-output-names:
+ - "xin24m" - crystal input - required,
+ - "xin32k" - rtc clock - optional,
+ - "ext_i2s" - external I2S clock - optional,
+ - "ext_gmac" - external GMAC clock - optional
+ - "ext_hsadc" - external HSADC clock - optional,
+ - "ext_isp" - external ISP clock - optional,
+ - "ext_jtag" - external JTAG clock - optional
+ - "ext_vip" - external VIP clock - optional,
+ - "usbotg_out" - output clock of the pll in the otg phy
+
+Example: General Register Files
+
+   pmugrf: syscon@ff32 {
+   compatible = "rockchip,rk3399-pmugrf", "syscon";
+   reg = <0x0 0xff32 0x0 0x1000>;
+   };
+
+   grf: syscon@ff77 {
+   compatible = "rockchip,rk3399-grf", "syscon";
+   reg = <0x0 0xff77 0x0 0x1>;
+   };
+
+Example: Clock controller node:
+
+   pmucru: pmu-clock-controller@ff75 {
+   compatible = "rockchip,rk3399-pmucru";
+   reg = <0x0 0xff75 0x0 0x1000>;
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   };
+
+   cru: clock-controller@ff76 {
+   compatible = "rockchip,rk3399-cru";
+   reg = <0x0 0xff76 0x0 0x1000>;
+   rockchip,grf = <>;
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   };
+
+Example: UART controller node that consumes the clock generated by the clock
+  controller:
+
+   uart0: serial@ff1a {
+   compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart";
+   reg = <0x0 0xff18 0x0 0x100>;
+   clocks = < SCLK_UART0>, < PCLK_UART0>;
+   clock-names = "baudclk", "apb_pclk";
+   interrupts = ;
+   reg-shift = <2>;
+   reg-io-width = <4>;
+   };
-- 
1.9.1

[PATCH 3/4] clk: rockchip: add dt-binding header for rk3399

[jianqun.xu]

From: Xing Zheng 

Add the dt-bindings header for the rk3399, that gets shared between
the clock controller and the clock references in the dts.

Signed-off-by: Xing Zheng 
Signed-off-by: Jianqun Xu 
---
 include/dt-bindings/clock/rk3399-cru.h | 714 +
 1 file changed, 714 insertions(+)
 create mode 100644 include/dt-bindings/clock/rk3399-cru.h

diff --git a/include/dt-bindings/clock/rk3399-cru.h 
b/include/dt-bindings/clock/rk3399-cru.h
new file mode 100644
index 000..7791688
--- /dev/null
+++ b/include/dt-bindings/clock/rk3399-cru.h
@@ -0,0 +1,714 @@
+/*
+ * Copyright (c) 2015 Rockchip Electronics Co. Ltd.
+ * Author: Xing Zheng 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
+
+/* core clocks */
+#define PLL_APLLL  1
+#define PLL_APLLB  2
+#define PLL_DPLL   3
+#define PLL_CPLL   4
+#define PLL_GPLL   5
+#define PLL_NPLL   6
+#define PLL_VPLL   7
+#define PLL_PPLL   8
+#define ARMCLKL9
+#define ARMCLKB10
+
+/* sclk gates (special clocks) */
+#define SCLK_I2C1  65
+#define SCLK_I2C2  66
+#define SCLK_I2C3  67
+#define SCLK_I2C5  68
+#define SCLK_I2C6  69
+#define SCLK_I2C7  70
+#define SCLK_SPI0  71
+#define SCLK_SPI1  72
+#define SCLK_SPI2  73
+#define SCLK_SPI4  74
+#define SCLK_SPI5  75
+#define SCLK_SDMMC 76
+#define SCLK_SDIO  77
+#define SCLK_EMMC  78
+#define SCLK_TSADC 79
+#define SCLK_SARADC80
+#define SCLK_UART0 81
+#define SCLK_UART1 82
+#define SCLK_UART2 83
+#define SCLK_UART3 84
+#define SCLK_SPDIF_8CH 85
+#define SCLK_I2S0_8CH  86
+#define SCLK_I2S1_8CH  87
+#define SCLK_I2S2_8CH  88
+#define SCLK_I2S_8CH_OUT   89
+#define SCLK_TIMER00   90
+#define SCLK_TIMER01   91
+#define SCLK_TIMER02   92
+#define SCLK_TIMER03   93
+#define SCLK_TIMER04   94
+#define SCLK_TIMER05   95
+#define SCLK_TIMER06   96
+#define SCLK_TIMER07   97
+#define SCLK_TIMER08   98
+#define SCLK_TIMER09   99
+#define SCLK_TIMER10   100
+#define SCLK_TIMER11   101
+#define SCLK_MACREF102
+#define SCLK_MAC_RX103
+#define SCLK_MAC_TX104
+#define SCLK_MAC   105
+#define SCLK_MACREF_OUT106
+#define SCLK_VOP0_PWM  107
+#define SCLK_VOP1_PWM  108
+#define SCLK_RGA   109
+#define SCLK_ISP0  110
+#define SCLK_ISP1  111
+#define SCLK_HDMI_CEC  112
+#define SCLK_HDMI_SFR  113
+#define SCLK_DP_CORE_SRC   114
+#define SCLK_PVTM_CORE_L   115
+#define SCLK_PVTM_CORE_B   116
+#define SCLK_PVTM_GPU  117
+#define SCLK_PVTM_DDR  118
+#define SCLK_MIPIDPHY_REF  119
+#define SCLK_MIPIDPHY_CFG  120
+#define SCLK_HSICPHY   121
+#define SCLK_USBPHY480M122
+#define SCLK_USB2PHY0_REF  123
+#define SCLK_USB2PHY1_REF  124
+#define SCLK_UPHY0_TCPDPHY_REF 125
+#define SCLK_UPHY0_TCPDCORE126
+#define SCLK_UPHY1_TCPDPHY_REF 127
+#define SCLK_UPHY1_TCPDCORE128
+#define SCLK_USB3OTG0_REF  129
+#define SCLK_USB3OTG1_REF  130
+#define SCLK_USB3OTG0_SUSPEND  131
+#define SCLK_USB3OTG1_SUSPEND  132
+#define SCLK_CRYPTO0   133
+#define SCLK_CRYPTO1   134
+#define SCLK_CCI_TRACE 135
+#define 

[PATCH 3/4] clk: rockchip: add dt-binding header for rk3399

[jianqun.xu]

From: Xing Zheng 

Add the dt-bindings header for the rk3399, that gets shared between
the clock controller and the clock references in the dts.

Signed-off-by: Xing Zheng 
Signed-off-by: Jianqun Xu 
---
 include/dt-bindings/clock/rk3399-cru.h | 714 +
 1 file changed, 714 insertions(+)
 create mode 100644 include/dt-bindings/clock/rk3399-cru.h

diff --git a/include/dt-bindings/clock/rk3399-cru.h 
b/include/dt-bindings/clock/rk3399-cru.h
new file mode 100644
index 000..7791688
--- /dev/null
+++ b/include/dt-bindings/clock/rk3399-cru.h
@@ -0,0 +1,714 @@
+/*
+ * Copyright (c) 2015 Rockchip Electronics Co. Ltd.
+ * Author: Xing Zheng 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
+
+/* core clocks */
+#define PLL_APLLL  1
+#define PLL_APLLB  2
+#define PLL_DPLL   3
+#define PLL_CPLL   4
+#define PLL_GPLL   5
+#define PLL_NPLL   6
+#define PLL_VPLL   7
+#define PLL_PPLL   8
+#define ARMCLKL9
+#define ARMCLKB10
+
+/* sclk gates (special clocks) */
+#define SCLK_I2C1  65
+#define SCLK_I2C2  66
+#define SCLK_I2C3  67
+#define SCLK_I2C5  68
+#define SCLK_I2C6  69
+#define SCLK_I2C7  70
+#define SCLK_SPI0  71
+#define SCLK_SPI1  72
+#define SCLK_SPI2  73
+#define SCLK_SPI4  74
+#define SCLK_SPI5  75
+#define SCLK_SDMMC 76
+#define SCLK_SDIO  77
+#define SCLK_EMMC  78
+#define SCLK_TSADC 79
+#define SCLK_SARADC80
+#define SCLK_UART0 81
+#define SCLK_UART1 82
+#define SCLK_UART2 83
+#define SCLK_UART3 84
+#define SCLK_SPDIF_8CH 85
+#define SCLK_I2S0_8CH  86
+#define SCLK_I2S1_8CH  87
+#define SCLK_I2S2_8CH  88
+#define SCLK_I2S_8CH_OUT   89
+#define SCLK_TIMER00   90
+#define SCLK_TIMER01   91
+#define SCLK_TIMER02   92
+#define SCLK_TIMER03   93
+#define SCLK_TIMER04   94
+#define SCLK_TIMER05   95
+#define SCLK_TIMER06   96
+#define SCLK_TIMER07   97
+#define SCLK_TIMER08   98
+#define SCLK_TIMER09   99
+#define SCLK_TIMER10   100
+#define SCLK_TIMER11   101
+#define SCLK_MACREF102
+#define SCLK_MAC_RX103
+#define SCLK_MAC_TX104
+#define SCLK_MAC   105
+#define SCLK_MACREF_OUT106
+#define SCLK_VOP0_PWM  107
+#define SCLK_VOP1_PWM  108
+#define SCLK_RGA   109
+#define SCLK_ISP0  110
+#define SCLK_ISP1  111
+#define SCLK_HDMI_CEC  112
+#define SCLK_HDMI_SFR  113
+#define SCLK_DP_CORE_SRC   114
+#define SCLK_PVTM_CORE_L   115
+#define SCLK_PVTM_CORE_B   116
+#define SCLK_PVTM_GPU  117
+#define SCLK_PVTM_DDR  118
+#define SCLK_MIPIDPHY_REF  119
+#define SCLK_MIPIDPHY_CFG  120
+#define SCLK_HSICPHY   121
+#define SCLK_USBPHY480M122
+#define SCLK_USB2PHY0_REF  123
+#define SCLK_USB2PHY1_REF  124
+#define SCLK_UPHY0_TCPDPHY_REF 125
+#define SCLK_UPHY0_TCPDCORE126
+#define SCLK_UPHY1_TCPDPHY_REF 127
+#define SCLK_UPHY1_TCPDCORE128
+#define SCLK_USB3OTG0_REF  129
+#define SCLK_USB3OTG1_REF  130
+#define SCLK_USB3OTG0_SUSPEND  131
+#define SCLK_USB3OTG1_SUSPEND  132
+#define SCLK_CRYPTO0   133
+#define SCLK_CRYPTO1   134
+#define SCLK_CCI_TRACE 135
+#define SCLK_CS136
+#define SCLK_CIF_OUT   137
+#define 

[PATCH 1/4] soc: rockchip: add bindings for Rockchip grf

[jianqun.xu]

From: Jianqun Xu 

Add devicetree bindings for Rockchip grf which found on
Rockchip SoCs.

Signed-off-by: Jianqun Xu 
---
changes in v2:
- add grf.txt (Heiko)

 .../devicetree/bindings/soc/rockchip/grf.txt   | 35 ++
 1 file changed, 35 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
new file mode 100644
index 000..7fb0410
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -0,0 +1,35 @@
+* Rockchip General Register Files (GRF)
+
+The general register file will be used to do static set by software, which
+is composed of many registers for system control.
+
+From RK3368 SoCs, the GRF is divided into two sections,
+- GRF, used for general non-secure system,
+- PMUGRF, used for always on sysyem
+
+Required Properties:
+
+- compatible: GRF should be one of the followings
+   - "rockchip,rk3066-grf", "syscon": for rk3066
+   - "rockchip,rk3188-grf", "syscon": for rk3188
+   - "rockchip,rk3228-grf", "syscon": for rk3228
+   - "rockchip,rk3288-grf", "syscon": for rk3288
+   - "rockchip,rk3368-grf", "syscon": for rk3368
+   - "rockchip,rk3399-grf", "syscon": for rk3399
+- compatible: PMUGRF should be one of the followings
+   - "rockchip,rk3368-pmugrf", "syscon": for rk3368
+   - "rockchip,rk3399-pmugrf", "syscon": for rk3399
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+Example: GRF and PMUGRF of RK3399 SoCs
+
+   pmugrf: syscon@ff32 {
+   compatible = "rockchip,rk3399-pmugrf", "syscon";
+   reg = <0x0 0xff32 0x0 0x1000>;
+   };
+
+   grf: syscon@ff77 {
+   compatible = "rockchip,rk3399-grf", "syscon";
+   reg = <0x0 0xff77 0x0 0x1>;
+   };
-- 
1.9.1

[PATCH 1/4] soc: rockchip: add bindings for Rockchip grf

[jianqun.xu]

From: Jianqun Xu 

Add devicetree bindings for Rockchip grf which found on
Rockchip SoCs.

Signed-off-by: Jianqun Xu 
---
changes in v2:
- add grf.txt (Heiko)

 .../devicetree/bindings/soc/rockchip/grf.txt   | 35 ++
 1 file changed, 35 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt 
b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
new file mode 100644
index 000..7fb0410
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -0,0 +1,35 @@
+* Rockchip General Register Files (GRF)
+
+The general register file will be used to do static set by software, which
+is composed of many registers for system control.
+
+From RK3368 SoCs, the GRF is divided into two sections,
+- GRF, used for general non-secure system,
+- PMUGRF, used for always on sysyem
+
+Required Properties:
+
+- compatible: GRF should be one of the followings
+   - "rockchip,rk3066-grf", "syscon": for rk3066
+   - "rockchip,rk3188-grf", "syscon": for rk3188
+   - "rockchip,rk3228-grf", "syscon": for rk3228
+   - "rockchip,rk3288-grf", "syscon": for rk3288
+   - "rockchip,rk3368-grf", "syscon": for rk3368
+   - "rockchip,rk3399-grf", "syscon": for rk3399
+- compatible: PMUGRF should be one of the followings
+   - "rockchip,rk3368-pmugrf", "syscon": for rk3368
+   - "rockchip,rk3399-pmugrf", "syscon": for rk3399
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+Example: GRF and PMUGRF of RK3399 SoCs
+
+   pmugrf: syscon@ff32 {
+   compatible = "rockchip,rk3399-pmugrf", "syscon";
+   reg = <0x0 0xff32 0x0 0x1000>;
+   };
+
+   grf: syscon@ff77 {
+   compatible = "rockchip,rk3399-grf", "syscon";
+   reg = <0x0 0xff77 0x0 0x1>;
+   };
-- 
1.9.1

[PATCH 0/4] Rockchip: rk3399: Add core dtsi for rk3399

[jianqun.xu]

From: Jianqun Xu 

There is the new SoCs from Rockchip which named rk3399, the
patches are added to support them.

Jianqun Xu (2):
  soc: rockchip: add bindings for Rockchip grf
  ARM64: dts: rockchip: add core dtsi file for rk3399

Xing Zheng (2):
  dt-bindings: add bindings for rk3399 clock controller
  clk: rockchip: add dt-binding header for rk3399

 .../bindings/clock/rockchip,rk3399-cru.txt |  82 ++
 .../devicetree/bindings/soc/rockchip/grf.txt   |  35 +
 arch/arm64/boot/dts/rockchip/rk3399.dtsi   | 949 +
 include/dt-bindings/clock/rk3399-cru.h | 714 
 4 files changed, 1780 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt
 create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3399.dtsi
 create mode 100644 include/dt-bindings/clock/rk3399-cru.h

-- 
1.9.1

[PATCH 4/4] ARM64: dts: rockchip: add core dtsi file for rk3399

[jianqun.xu]

From: Jianqun Xu 

This patch adds core dtsi file for rk3399 found on Rockchip new SoCs
rk3399, which integrates dual-core Cortex-A72 and quad-core Cortex-A53
with separately NEON coprocessor.

The dtsi file has been tested on rk3399 board with simple boot system,
the uart and spi IPs are same as from rk3288.

Separate pmu nodes should be added for the A72 and A53 PMUs, and more
nodes should be added later.

Signed-off-by: Jianqun Xu 
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 949 +++
 1 file changed, 949 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3399.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
new file mode 100644
index 000..4c0c385
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -0,0 +1,949 @@
+/*
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,rk3399";
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   serial3 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu-map {
+   cluster0 {
+   core0 {
+   cpu = <_l0>;
+   };
+   core1 {
+   cpu = <_l1>;
+   };
+   core2 {
+   cpu = <_l2>;
+   };
+   core3 {
+   cpu = <_l3>;
+   };
+   };
+
+   cluster1 {
+   core0 {
+   cpu = <_b0>;
+   };
+   core1 {
+   cpu = <_b1>;
+   };
+   };
+   };
+
+   cpu_l0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   };
+
+   cpu_l1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   };
+
+   cpu_l2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   };
+
+   cpu_l3: cpu@3 {
+   device_type = "cpu";
+ 

[PATCH 0/4] Rockchip: rk3399: Add core dtsi for rk3399

[jianqun.xu]

From: Jianqun Xu 

There is the new SoCs from Rockchip which named rk3399, the
patches are added to support them.

Jianqun Xu (2):
  soc: rockchip: add bindings for Rockchip grf
  ARM64: dts: rockchip: add core dtsi file for rk3399

Xing Zheng (2):
  dt-bindings: add bindings for rk3399 clock controller
  clk: rockchip: add dt-binding header for rk3399

 .../bindings/clock/rockchip,rk3399-cru.txt |  82 ++
 .../devicetree/bindings/soc/rockchip/grf.txt   |  35 +
 arch/arm64/boot/dts/rockchip/rk3399.dtsi   | 949 +
 include/dt-bindings/clock/rk3399-cru.h | 714 
 4 files changed, 1780 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt
 create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3399.dtsi
 create mode 100644 include/dt-bindings/clock/rk3399-cru.h

-- 
1.9.1

[PATCH 4/4] ARM64: dts: rockchip: add core dtsi file for rk3399

[jianqun.xu]

From: Jianqun Xu 

This patch adds core dtsi file for rk3399 found on Rockchip new SoCs
rk3399, which integrates dual-core Cortex-A72 and quad-core Cortex-A53
with separately NEON coprocessor.

The dtsi file has been tested on rk3399 board with simple boot system,
the uart and spi IPs are same as from rk3288.

Separate pmu nodes should be added for the A72 and A53 PMUs, and more
nodes should be added later.

Signed-off-by: Jianqun Xu 
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 949 +++
 1 file changed, 949 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3399.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
new file mode 100644
index 000..4c0c385
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -0,0 +1,949 @@
+/*
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "rockchip,rk3399";
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   serial0 = 
+   serial1 = 
+   serial2 = 
+   serial3 = 
+   };
+
+   cpus {
+   #address-cells = <2>;
+   #size-cells = <0>;
+
+   cpu-map {
+   cluster0 {
+   core0 {
+   cpu = <_l0>;
+   };
+   core1 {
+   cpu = <_l1>;
+   };
+   core2 {
+   cpu = <_l2>;
+   };
+   core3 {
+   cpu = <_l3>;
+   };
+   };
+
+   cluster1 {
+   core0 {
+   cpu = <_b0>;
+   };
+   core1 {
+   cpu = <_b1>;
+   };
+   };
+   };
+
+   cpu_l0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x0>;
+   };
+
+   cpu_l1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x1>;
+   };
+
+   cpu_l2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", "arm,armv8";
+   reg = <0x0 0x2>;
+   };
+
+   cpu_l3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53", 

Re: [PATCH] arc: get rid of DEVTMPFS dependency on INITRAMFS_SOURCE

[Vineet Gupta]

On Saturday 20 February 2016 06:35 PM, Alexey Brodkin wrote:
> Even though DEVTMPFS is required when our pre-built initramfs
> is used it is not the case in general. It is perfectly possible
> to use initramfs with device nodes already populated or there
> could be other usages, see discussion below for more detials:
> http://thread.gmane.org/gmane.comp.embedded.openwrt.devel/37819/focus=37821
>
> This change removes mentioned dependency from arch/arc/Kconfig
> updating instead those defconfigs that are usually used with this
> kind of pre-build initramfs.
>
> And while at it all touched defconfigs were regenerated via
> savedefconfig and some options were removed:
>  * USB is selected by other options implicitly
>  * VGA_CONSOLE is disableb for ARC since
>031e29b5877f31676739dc2f847d04c2c0732034
>  * EXT3_FS automatically selects EXT4_FS
>  * MTDxxx and JFFS2_FS make no sense for AXS because
>AXS NAND controller is not upstreamed
>  * NET_OSCI_LAN is not in upstream as well
>  * ARCPGU_xxx options make no sense because ARC PGU is not yet
>in upstream and when it gets there all config options would
>be taken from devicetree
>
> Signed-off-by: Alexey Brodkin 

Thx for additional cleanup Alexey. Applied to for-curr (4.5)

-Vineet

Re: [PATCH] arc: get rid of DEVTMPFS dependency on INITRAMFS_SOURCE

[Vineet Gupta]

On Saturday 20 February 2016 06:35 PM, Alexey Brodkin wrote:
> Even though DEVTMPFS is required when our pre-built initramfs
> is used it is not the case in general. It is perfectly possible
> to use initramfs with device nodes already populated or there
> could be other usages, see discussion below for more detials:
> http://thread.gmane.org/gmane.comp.embedded.openwrt.devel/37819/focus=37821
>
> This change removes mentioned dependency from arch/arc/Kconfig
> updating instead those defconfigs that are usually used with this
> kind of pre-build initramfs.
>
> And while at it all touched defconfigs were regenerated via
> savedefconfig and some options were removed:
>  * USB is selected by other options implicitly
>  * VGA_CONSOLE is disableb for ARC since
>031e29b5877f31676739dc2f847d04c2c0732034
>  * EXT3_FS automatically selects EXT4_FS
>  * MTDxxx and JFFS2_FS make no sense for AXS because
>AXS NAND controller is not upstreamed
>  * NET_OSCI_LAN is not in upstream as well
>  * ARCPGU_xxx options make no sense because ARC PGU is not yet
>in upstream and when it gets there all config options would
>be taken from devicetree
>
> Signed-off-by: Alexey Brodkin 

Thx for additional cleanup Alexey. Applied to for-curr (4.5)

-Vineet

[PATCH v2 1/2] gpio: designware: switch device node to fwnode

[qiujiang]

This patch switch device node to fwnode in dwapb_port_property,
so as to apply a unified data structure for DT and ACPI.

Acked-by: Mika Westerberg 
Signed-off-by: qiujiang 
---
 drivers/gpio/gpio-dwapb.c| 36 
 include/linux/platform_data/gpio-dwapb.h |  2 +-
 2 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index 597de1e..0ebbdf1 100644
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c
@@ -290,14 +290,14 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
 struct dwapb_port_property *pp)
 {
struct gpio_chip *gc = >gc;
-   struct device_node *node = pp->node;
+   struct fwnode_handle  *fwnode = pp->fwnode;
struct irq_chip_generic *irq_gc = NULL;
unsigned int hwirq, ngpio = gc->ngpio;
struct irq_chip_type *ct;
int err, i;
 
-   gpio->domain = irq_domain_add_linear(node, ngpio,
-_generic_chip_ops, gpio);
+   gpio->domain = irq_domain_create_linear(fwnode, ngpio,
+_generic_chip_ops, gpio);
if (!gpio->domain)
return;
 
@@ -415,7 +415,7 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
}
 
 #ifdef CONFIG_OF_GPIO
-   port->gc.of_node = pp->node;
+   port->gc.of_node = to_of_node(pp->fwnode);
 #endif
port->gc.ngpio = pp->ngpio;
port->gc.base = pp->gpio_base;
@@ -449,17 +449,16 @@ static void dwapb_gpio_unregister(struct dwapb_gpio *gpio)
 static struct dwapb_platform_data *
 dwapb_gpio_get_pdata_of(struct device *dev)
 {
-   struct device_node *node, *port_np;
+   struct fwnode_handle *fwnode;
struct dwapb_platform_data *pdata;
struct dwapb_port_property *pp;
int nports;
int i;
 
-   node = dev->of_node;
-   if (!IS_ENABLED(CONFIG_OF_GPIO) || !node)
+   if (!IS_ENABLED(CONFIG_OF_GPIO) || !(dev->of_node))
return ERR_PTR(-ENODEV);
 
-   nports = of_get_child_count(node);
+   nports = device_get_child_node_count(dev);
if (nports == 0)
return ERR_PTR(-ENODEV);
 
@@ -474,21 +473,21 @@ dwapb_gpio_get_pdata_of(struct device *dev)
pdata->nports = nports;
 
i = 0;
-   for_each_child_of_node(node, port_np) {
+   device_for_each_child_node(dev, fwnode)  {
pp = >properties[i++];
-   pp->node = port_np;
+   pp->fwnode = fwnode;
 
-   if (of_property_read_u32(port_np, "reg", >idx) ||
+   if (fwnode_property_read_u32(fwnode, "reg", >idx) ||
pp->idx >= DWAPB_MAX_PORTS) {
dev_err(dev, "missing/invalid port index for %s\n",
-   port_np->full_name);
+   to_of_node(fwnode)->full_name);
return ERR_PTR(-EINVAL);
}
 
-   if (of_property_read_u32(port_np, "snps,nr-gpios",
+   if (fwnode_property_read_u32(fwnode, "snps,nr-gpios",
 >ngpio)) {
dev_info(dev, "failed to get number of gpios for %s\n",
-port_np->full_name);
+to_of_node(fwnode)->full_name);
pp->ngpio = 32;
}
 
@@ -497,17 +496,18 @@ dwapb_gpio_get_pdata_of(struct device *dev)
 * the IP.
 */
if (pp->idx == 0 &&
-   of_property_read_bool(port_np, "interrupt-controller")) {
-   pp->irq = irq_of_parse_and_map(port_np, 0);
+   of_property_read_bool(to_of_node(fwnode),
+   "interrupt-controller")) {
+   pp->irq = irq_of_parse_and_map(to_of_node(fwnode), 0);
if (!pp->irq) {
dev_warn(dev, "no irq for bank %s\n",
-port_np->full_name);
+to_of_node(fwnode)->full_name);
}
}
 
pp->irq_shared  = false;
pp->gpio_base   = -1;
-   pp->name= port_np->full_name;
+   pp->name = to_of_node(fwnode)->full_name;
}
 
return pdata;
diff --git a/include/linux/platform_data/gpio-dwapb.h 
b/include/linux/platform_data/gpio-dwapb.h
index 28702c8..80954f2 100644
--- a/include/linux/platform_data/gpio-dwapb.h
+++ b/include/linux/platform_data/gpio-dwapb.h
@@ -15,7 +15,7 @@
 #define GPIO_DW_APB_H
 
 struct dwapb_port_property {
-   struct device_node *node;
+   struct fwnode_handle  *fwnode;
const char  *name;
unsigned intidx;

[PATCH v2 1/2] gpio: designware: switch device node to fwnode

[qiujiang]

This patch switch device node to fwnode in dwapb_port_property,
so as to apply a unified data structure for DT and ACPI.

Acked-by: Mika Westerberg 
Signed-off-by: qiujiang 
---
 drivers/gpio/gpio-dwapb.c| 36 
 include/linux/platform_data/gpio-dwapb.h |  2 +-
 2 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index 597de1e..0ebbdf1 100644
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c
@@ -290,14 +290,14 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
 struct dwapb_port_property *pp)
 {
struct gpio_chip *gc = >gc;
-   struct device_node *node = pp->node;
+   struct fwnode_handle  *fwnode = pp->fwnode;
struct irq_chip_generic *irq_gc = NULL;
unsigned int hwirq, ngpio = gc->ngpio;
struct irq_chip_type *ct;
int err, i;
 
-   gpio->domain = irq_domain_add_linear(node, ngpio,
-_generic_chip_ops, gpio);
+   gpio->domain = irq_domain_create_linear(fwnode, ngpio,
+_generic_chip_ops, gpio);
if (!gpio->domain)
return;
 
@@ -415,7 +415,7 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
}
 
 #ifdef CONFIG_OF_GPIO
-   port->gc.of_node = pp->node;
+   port->gc.of_node = to_of_node(pp->fwnode);
 #endif
port->gc.ngpio = pp->ngpio;
port->gc.base = pp->gpio_base;
@@ -449,17 +449,16 @@ static void dwapb_gpio_unregister(struct dwapb_gpio *gpio)
 static struct dwapb_platform_data *
 dwapb_gpio_get_pdata_of(struct device *dev)
 {
-   struct device_node *node, *port_np;
+   struct fwnode_handle *fwnode;
struct dwapb_platform_data *pdata;
struct dwapb_port_property *pp;
int nports;
int i;
 
-   node = dev->of_node;
-   if (!IS_ENABLED(CONFIG_OF_GPIO) || !node)
+   if (!IS_ENABLED(CONFIG_OF_GPIO) || !(dev->of_node))
return ERR_PTR(-ENODEV);
 
-   nports = of_get_child_count(node);
+   nports = device_get_child_node_count(dev);
if (nports == 0)
return ERR_PTR(-ENODEV);
 
@@ -474,21 +473,21 @@ dwapb_gpio_get_pdata_of(struct device *dev)
pdata->nports = nports;
 
i = 0;
-   for_each_child_of_node(node, port_np) {
+   device_for_each_child_node(dev, fwnode)  {
pp = >properties[i++];
-   pp->node = port_np;
+   pp->fwnode = fwnode;
 
-   if (of_property_read_u32(port_np, "reg", >idx) ||
+   if (fwnode_property_read_u32(fwnode, "reg", >idx) ||
pp->idx >= DWAPB_MAX_PORTS) {
dev_err(dev, "missing/invalid port index for %s\n",
-   port_np->full_name);
+   to_of_node(fwnode)->full_name);
return ERR_PTR(-EINVAL);
}
 
-   if (of_property_read_u32(port_np, "snps,nr-gpios",
+   if (fwnode_property_read_u32(fwnode, "snps,nr-gpios",
 >ngpio)) {
dev_info(dev, "failed to get number of gpios for %s\n",
-port_np->full_name);
+to_of_node(fwnode)->full_name);
pp->ngpio = 32;
}
 
@@ -497,17 +496,18 @@ dwapb_gpio_get_pdata_of(struct device *dev)
 * the IP.
 */
if (pp->idx == 0 &&
-   of_property_read_bool(port_np, "interrupt-controller")) {
-   pp->irq = irq_of_parse_and_map(port_np, 0);
+   of_property_read_bool(to_of_node(fwnode),
+   "interrupt-controller")) {
+   pp->irq = irq_of_parse_and_map(to_of_node(fwnode), 0);
if (!pp->irq) {
dev_warn(dev, "no irq for bank %s\n",
-port_np->full_name);
+to_of_node(fwnode)->full_name);
}
}
 
pp->irq_shared  = false;
pp->gpio_base   = -1;
-   pp->name= port_np->full_name;
+   pp->name = to_of_node(fwnode)->full_name;
}
 
return pdata;
diff --git a/include/linux/platform_data/gpio-dwapb.h 
b/include/linux/platform_data/gpio-dwapb.h
index 28702c8..80954f2 100644
--- a/include/linux/platform_data/gpio-dwapb.h
+++ b/include/linux/platform_data/gpio-dwapb.h
@@ -15,7 +15,7 @@
 #define GPIO_DW_APB_H
 
 struct dwapb_port_property {
-   struct device_node *node;
+   struct fwnode_handle  *fwnode;
const char  *name;
unsigned intidx;
unsigned intngpio;
-- 
1.9.1

[PATCH v2 0/2] gpio: designware: add gpio-signaled acpi events support

[qiujiang]

This patchset adds gpio-signaled acpi events support for power button 
on hisilicon D02 board.

The two patches respectively:
- switch device_node to unified fwnode handle
- adds gpio-signaled acpi events support for power button

   This patchset is based on
   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git
   branch "devel"

Changes v1 -> v2: 
   - rebase to branch "devel" of Linus Walleij's repository
   - split in two patchs as suggested by Andy S
   - add Mika's ACKs

qiujiang (2):
  gpio: designware: switch device node to fwnode
  gpio: designware: add gpio-signaled acpi event for power button

 drivers/gpio/gpio-dwapb.c| 66 
 include/linux/platform_data/gpio-dwapb.h |  2 +-
 2 files changed, 42 insertions(+), 26 deletions(-)

-- 
1.9.1

[PATCH v2 0/2] gpio: designware: add gpio-signaled acpi events support

[qiujiang]

This patchset adds gpio-signaled acpi events support for power button 
on hisilicon D02 board.

The two patches respectively:
- switch device_node to unified fwnode handle
- adds gpio-signaled acpi events support for power button

   This patchset is based on
   https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git
   branch "devel"

Changes v1 -> v2: 
   - rebase to branch "devel" of Linus Walleij's repository
   - split in two patchs as suggested by Andy S
   - add Mika's ACKs

qiujiang (2):
  gpio: designware: switch device node to fwnode
  gpio: designware: add gpio-signaled acpi event for power button

 drivers/gpio/gpio-dwapb.c| 66 
 include/linux/platform_data/gpio-dwapb.h |  2 +-
 2 files changed, 42 insertions(+), 26 deletions(-)

-- 
1.9.1

[PATCH v2 2/2] gpio: designware: add gpio-signaled acpi event for power button

[qiujiang]

This patch modifies the designware gpio controller driver to
support the gpio-signaled acpi events. This is used for power
button on hisilicon D02 board(an arm64 platform).

The corresponding DSDT table is defined as follows:
Device(GPI0) {
Name(_HID, "HISI0181")
Name(_ADR, 0)
Name(_UID, 0)

Name (_CRS, ResourceTemplate ()  {
Memory32Fixed (ReadWrite, 0x802e, 0x1)
Interrupt (ResourceConsumer, Level, ActiveHigh,
Exclusive,,,) {344}
})

Device(PRTa) {
Name (_DSD, Package () {
Package () {
Package () {"reg",0},
Package () {"snps,nr-gpios",32},
}
})
}

Name (_AEI, ResourceTemplate () {
GpioInt(Edge, ActiveLow, ExclusiveAndWake, PullUp, ,
" \\_SB.GPI0") {8}
})

Method (_E08, 0x0, NotSerialized) {
Notify (\_SB.PWRB, 0x80)
}
}

Acked-by: Mika Westerberg 
Signed-off-by: qiujiang 
---
 drivers/gpio/gpio-dwapb.c | 38 +++---
 1 file changed, 27 insertions(+), 11 deletions(-)

diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index 0ebbdf1..d961d3b 100644
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c
@@ -7,6 +7,7 @@
  *
  * All enquiries to supp...@picochip.com
  */
+#include 
 #include 
 /* FIXME: for gpio_get_value(), replace this with direct register read */
 #include 
@@ -25,6 +26,7 @@
 #include 
 #include 
 #include 
+#include "gpiolib.h"
 
 #define GPIO_SWPORTA_DR0x00
 #define GPIO_SWPORTA_DDR   0x04
@@ -434,6 +436,10 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
else
port->is_registered = true;
 
+   /* Add GPIO-signaled ACPI event support */
+   if (pp->irq)
+   acpi_gpiochip_request_interrupts(&(port->gc));
+
return err;
 }
 
@@ -447,7 +453,7 @@ static void dwapb_gpio_unregister(struct dwapb_gpio *gpio)
 }
 
 static struct dwapb_platform_data *
-dwapb_gpio_get_pdata_of(struct device *dev)
+dwapb_gpio_get_pdata(struct device *dev)
 {
struct fwnode_handle *fwnode;
struct dwapb_platform_data *pdata;
@@ -455,9 +461,6 @@ dwapb_gpio_get_pdata_of(struct device *dev)
int nports;
int i;
 
-   if (!IS_ENABLED(CONFIG_OF_GPIO) || !(dev->of_node))
-   return ERR_PTR(-ENODEV);
-
nports = device_get_child_node_count(dev);
if (nports == 0)
return ERR_PTR(-ENODEV);
@@ -479,15 +482,13 @@ dwapb_gpio_get_pdata_of(struct device *dev)
 
if (fwnode_property_read_u32(fwnode, "reg", >idx) ||
pp->idx >= DWAPB_MAX_PORTS) {
-   dev_err(dev, "missing/invalid port index for %s\n",
-   to_of_node(fwnode)->full_name);
+   dev_err(dev, "missing/invalid port index\n");
return ERR_PTR(-EINVAL);
}
 
if (fwnode_property_read_u32(fwnode, "snps,nr-gpios",
 >ngpio)) {
-   dev_info(dev, "failed to get number of gpios for %s\n",
-to_of_node(fwnode)->full_name);
+   dev_info(dev, "failed to get number of gpios\n");
pp->ngpio = 32;
}
 
@@ -495,7 +496,7 @@ dwapb_gpio_get_pdata_of(struct device *dev)
 * Only port A can provide interrupts in all configurations of
 * the IP.
 */
-   if (pp->idx == 0 &&
+   if (dev->of_node && pp->idx == 0 &&
of_property_read_bool(to_of_node(fwnode),
"interrupt-controller")) {
pp->irq = irq_of_parse_and_map(to_of_node(fwnode), 0);
@@ -505,9 +506,17 @@ dwapb_gpio_get_pdata_of(struct device *dev)
}
}
 
+   if (has_acpi_companion(dev) && pp->idx == 0)
+   pp->irq = platform_get_irq(to_platform_device(dev), 0);
+
pp->irq_shared  = false;
pp->gpio_base   = -1;
-   pp->name = to_of_node(fwnode)->full_name;
+
+   if (dev->of_node)
+   pp->name = to_of_node(fwnode)->full_name;
+
+   if (has_acpi_companion(dev))
+   pp->name = acpi_dev_name(to_acpi_device_node(fwnode));
}
 
return pdata;
@@ -523,7 +532,7 @@ static int dwapb_gpio_probe(struct platform_device *pdev)
struct dwapb_platform_data *pdata = dev_get_platdata(dev);
 
if (!pdata) {
-   pdata = dwapb_gpio_get_pdata_of(dev);
+   pdata = dwapb_gpio_get_pdata(dev);
if 

[PATCH v2 2/2] gpio: designware: add gpio-signaled acpi event for power button

[qiujiang]

This patch modifies the designware gpio controller driver to
support the gpio-signaled acpi events. This is used for power
button on hisilicon D02 board(an arm64 platform).

The corresponding DSDT table is defined as follows:
Device(GPI0) {
Name(_HID, "HISI0181")
Name(_ADR, 0)
Name(_UID, 0)

Name (_CRS, ResourceTemplate ()  {
Memory32Fixed (ReadWrite, 0x802e, 0x1)
Interrupt (ResourceConsumer, Level, ActiveHigh,
Exclusive,,,) {344}
})

Device(PRTa) {
Name (_DSD, Package () {
Package () {
Package () {"reg",0},
Package () {"snps,nr-gpios",32},
}
})
}

Name (_AEI, ResourceTemplate () {
GpioInt(Edge, ActiveLow, ExclusiveAndWake, PullUp, ,
" \\_SB.GPI0") {8}
})

Method (_E08, 0x0, NotSerialized) {
Notify (\_SB.PWRB, 0x80)
}
}

Acked-by: Mika Westerberg 
Signed-off-by: qiujiang 
---
 drivers/gpio/gpio-dwapb.c | 38 +++---
 1 file changed, 27 insertions(+), 11 deletions(-)

diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index 0ebbdf1..d961d3b 100644
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c
@@ -7,6 +7,7 @@
  *
  * All enquiries to supp...@picochip.com
  */
+#include 
 #include 
 /* FIXME: for gpio_get_value(), replace this with direct register read */
 #include 
@@ -25,6 +26,7 @@
 #include 
 #include 
 #include 
+#include "gpiolib.h"
 
 #define GPIO_SWPORTA_DR0x00
 #define GPIO_SWPORTA_DDR   0x04
@@ -434,6 +436,10 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
else
port->is_registered = true;
 
+   /* Add GPIO-signaled ACPI event support */
+   if (pp->irq)
+   acpi_gpiochip_request_interrupts(&(port->gc));
+
return err;
 }
 
@@ -447,7 +453,7 @@ static void dwapb_gpio_unregister(struct dwapb_gpio *gpio)
 }
 
 static struct dwapb_platform_data *
-dwapb_gpio_get_pdata_of(struct device *dev)
+dwapb_gpio_get_pdata(struct device *dev)
 {
struct fwnode_handle *fwnode;
struct dwapb_platform_data *pdata;
@@ -455,9 +461,6 @@ dwapb_gpio_get_pdata_of(struct device *dev)
int nports;
int i;
 
-   if (!IS_ENABLED(CONFIG_OF_GPIO) || !(dev->of_node))
-   return ERR_PTR(-ENODEV);
-
nports = device_get_child_node_count(dev);
if (nports == 0)
return ERR_PTR(-ENODEV);
@@ -479,15 +482,13 @@ dwapb_gpio_get_pdata_of(struct device *dev)
 
if (fwnode_property_read_u32(fwnode, "reg", >idx) ||
pp->idx >= DWAPB_MAX_PORTS) {
-   dev_err(dev, "missing/invalid port index for %s\n",
-   to_of_node(fwnode)->full_name);
+   dev_err(dev, "missing/invalid port index\n");
return ERR_PTR(-EINVAL);
}
 
if (fwnode_property_read_u32(fwnode, "snps,nr-gpios",
 >ngpio)) {
-   dev_info(dev, "failed to get number of gpios for %s\n",
-to_of_node(fwnode)->full_name);
+   dev_info(dev, "failed to get number of gpios\n");
pp->ngpio = 32;
}
 
@@ -495,7 +496,7 @@ dwapb_gpio_get_pdata_of(struct device *dev)
 * Only port A can provide interrupts in all configurations of
 * the IP.
 */
-   if (pp->idx == 0 &&
+   if (dev->of_node && pp->idx == 0 &&
of_property_read_bool(to_of_node(fwnode),
"interrupt-controller")) {
pp->irq = irq_of_parse_and_map(to_of_node(fwnode), 0);
@@ -505,9 +506,17 @@ dwapb_gpio_get_pdata_of(struct device *dev)
}
}
 
+   if (has_acpi_companion(dev) && pp->idx == 0)
+   pp->irq = platform_get_irq(to_platform_device(dev), 0);
+
pp->irq_shared  = false;
pp->gpio_base   = -1;
-   pp->name = to_of_node(fwnode)->full_name;
+
+   if (dev->of_node)
+   pp->name = to_of_node(fwnode)->full_name;
+
+   if (has_acpi_companion(dev))
+   pp->name = acpi_dev_name(to_acpi_device_node(fwnode));
}
 
return pdata;
@@ -523,7 +532,7 @@ static int dwapb_gpio_probe(struct platform_device *pdev)
struct dwapb_platform_data *pdata = dev_get_platdata(dev);
 
if (!pdata) {
-   pdata = dwapb_gpio_get_pdata_of(dev);
+   pdata = dwapb_gpio_get_pdata(dev);
if (IS_ERR(pdata))
return 

Re: [PATCH 2/2] ASoC: max9867: fix type of variable containing error codes

[Axel Lin]

2016-02-23 14:45 GMT+08:00 Andrzej Hajda :
> value variable can contain error values and is compared with zero.
> Its type must be signed.
Reviewed-by: Axel Lin 

Re: [PATCH 2/2] ASoC: max9867: fix type of variable containing error codes

[Axel Lin]

2016-02-23 14:45 GMT+08:00 Andrzej Hajda :
> value variable can contain error values and is compared with zero.
> Its type must be signed.
Reviewed-by: Axel Lin 

Re: [PATCH 8/9] usb: dwc3: Remove impossible check for of_clk_get_parent_count() < 0

[Felipe Balbi]

Hi,

Stephen Boyd  writes:
> The check for < 0 is impossible now that
> of_clk_get_parent_count() returns an unsigned int. Simplify the
> code and update the types.
>
> Cc: Felipe Balbi 
> Cc: 
> Signed-off-by: Stephen Boyd 
> ---
>
> Please ack so this can go through clk tree along with patch 1.

sure, no problem ;-) patch looks okay

Acked-by: Felipe Balbi 

-- 
balbi


signature.asc
Description: PGP signature

Re: [PATCH 8/9] usb: dwc3: Remove impossible check for of_clk_get_parent_count() < 0

[Felipe Balbi]

Hi,

Stephen Boyd  writes:
> The check for < 0 is impossible now that
> of_clk_get_parent_count() returns an unsigned int. Simplify the
> code and update the types.
>
> Cc: Felipe Balbi 
> Cc: 
> Signed-off-by: Stephen Boyd 
> ---
>
> Please ack so this can go through clk tree along with patch 1.

sure, no problem ;-) patch looks okay

Acked-by: Felipe Balbi 

-- 
balbi


signature.asc
Description: PGP signature

[PATCH 1/2] gpio: xgene: fix type of variable containing error codes

[Andrzej Hajda]

ret variable can contain error values and is compared with zero.
Its type must be signed.

The problem has been detected using coccinelle script
scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci

Signed-off-by: Andrzej Hajda 
---
 drivers/gpio/gpio-xgene-sb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpio/gpio-xgene-sb.c b/drivers/gpio/gpio-xgene-sb.c
index b993b86..fd81ebc 100644
--- a/drivers/gpio/gpio-xgene-sb.c
+++ b/drivers/gpio/gpio-xgene-sb.c
@@ -240,7 +240,7 @@ static const struct irq_domain_ops xgene_gpio_sb_domain_ops 
= {
 static int xgene_gpio_sb_probe(struct platform_device *pdev)
 {
struct xgene_gpio_sb *priv;
-   u32 ret;
+   int ret;
struct resource *res;
void __iomem *regs;
struct irq_domain *parent_domain = NULL;
-- 
1.9.1

[PATCH 1/2] gpio: xgene: fix type of variable containing error codes

[Andrzej Hajda]

ret variable can contain error values and is compared with zero.
Its type must be signed.

The problem has been detected using coccinelle script
scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci

Signed-off-by: Andrzej Hajda 
---
 drivers/gpio/gpio-xgene-sb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpio/gpio-xgene-sb.c b/drivers/gpio/gpio-xgene-sb.c
index b993b86..fd81ebc 100644
--- a/drivers/gpio/gpio-xgene-sb.c
+++ b/drivers/gpio/gpio-xgene-sb.c
@@ -240,7 +240,7 @@ static const struct irq_domain_ops xgene_gpio_sb_domain_ops 
= {
 static int xgene_gpio_sb_probe(struct platform_device *pdev)
 {
struct xgene_gpio_sb *priv;
-   u32 ret;
+   int ret;
struct resource *res;
void __iomem *regs;
struct irq_domain *parent_domain = NULL;
-- 
1.9.1

[PATCH 2/2] ASoC: max9867: fix type of variable containing error codes

[Andrzej Hajda]

value variable can contain error values and is compared with zero.
Its type must be signed.

The problem has been detected using coccinelle script
scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci

Signed-off-by: Andrzej Hajda 
---
 sound/soc/codecs/max9867.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/sound/soc/codecs/max9867.c b/sound/soc/codecs/max9867.c
index ab7a94d..4fb6fc7 100755
--- a/sound/soc/codecs/max9867.c
+++ b/sound/soc/codecs/max9867.c
@@ -180,7 +180,8 @@ static int max9867_dai_hw_params(struct snd_pcm_substream 
*substream,
 {
struct snd_soc_codec *codec = dai->codec;
struct max9867_priv *max9867 = snd_soc_codec_get_drvdata(codec);
-   unsigned int ni_h, ni_l, value;
+   unsigned int ni_h, ni_l;
+   int value;
 
value = get_ni_value(max9867->sysclk, params_rate(params));
if (value < 0)
-- 
1.9.1

[PATCH 2/2] ASoC: max9867: fix type of variable containing error codes

[Andrzej Hajda]

value variable can contain error values and is compared with zero.
Its type must be signed.

The problem has been detected using coccinelle script
scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci

Signed-off-by: Andrzej Hajda 
---
 sound/soc/codecs/max9867.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/sound/soc/codecs/max9867.c b/sound/soc/codecs/max9867.c
index ab7a94d..4fb6fc7 100755
--- a/sound/soc/codecs/max9867.c
+++ b/sound/soc/codecs/max9867.c
@@ -180,7 +180,8 @@ static int max9867_dai_hw_params(struct snd_pcm_substream 
*substream,
 {
struct snd_soc_codec *codec = dai->codec;
struct max9867_priv *max9867 = snd_soc_codec_get_drvdata(codec);
-   unsigned int ni_h, ni_l, value;
+   unsigned int ni_h, ni_l;
+   int value;
 
value = get_ni_value(max9867->sysclk, params_rate(params));
if (value < 0)
-- 
1.9.1

Re: [RFC][PATCH 6/7] x86, pkeys: add pkey set/get syscalls

[Ingo Molnar]

* Dave Hansen  wrote:

> 
> From: Dave Hansen 
> 
> This establishes two more system calls for protection key management:
> 
>   unsigned long pkey_get(int pkey);
>   int pkey_set(int pkey, unsigned long access_rights);
> 
> The return value from pkey_get() and the 'access_rights' passed
> to pkey_set() are the same format: a bitmask containing
> PKEY_DENY_WRITE and/or PKEY_DENY_ACCESS, or nothing set at all.
> 
> These can replace userspace's direct use of the new rdpkru/wrpkru
> instructions.
> 
> With current hardware, the kernel can not enforce that it has
> control over a given key.  But, this at least allows the kernel
> to indicate to userspace that userspace does not control a given
> protection key.  This makes it more likely that situations like
> using a pkey after sys_pkey_free() can be detected.

So it's analogous to file descriptor open()/close() syscalls: the kernel does 
not 
enforce that different libraries of the same process do not interfere with each 
other's file descriptors - but in practice it's not a problem because everyone 
uses open()/close().

Resources that a process uses don't per se 'need' kernel level isolation to be 
useful.

> The kernel does _not_ enforce that this interface must be used for
> changes to PKRU, whether or not a key has been "allocated".

Nor does the kernel enforce that open() must be used to get a file descriptor, 
so 
code can do the following:

close(100);

and can interfere with a library that is holding a file open - but it's 
generally 
not a problem and the above is considered poor code that will cause problems.

One thing that is different is that file descriptors are generally plentiful, 
while of pkeys there are at most 16 - but I think it's still "large enough" to 
not 
be an issue in practice.

We'll see ...

> This syscall interface could also theoretically be replaced with a pair of 
> vsyscalls.  The vsyscalls would just call WRPKRU/RDPKRU directly in 
> situations 
> where they are drop-in equivalents for what the kernel would be doing.

Indeed.

Thanks,

Ingo

Re: [RFC][PATCH 6/7] x86, pkeys: add pkey set/get syscalls

[Ingo Molnar]

* Dave Hansen  wrote:

> 
> From: Dave Hansen 
> 
> This establishes two more system calls for protection key management:
> 
>   unsigned long pkey_get(int pkey);
>   int pkey_set(int pkey, unsigned long access_rights);
> 
> The return value from pkey_get() and the 'access_rights' passed
> to pkey_set() are the same format: a bitmask containing
> PKEY_DENY_WRITE and/or PKEY_DENY_ACCESS, or nothing set at all.
> 
> These can replace userspace's direct use of the new rdpkru/wrpkru
> instructions.
> 
> With current hardware, the kernel can not enforce that it has
> control over a given key.  But, this at least allows the kernel
> to indicate to userspace that userspace does not control a given
> protection key.  This makes it more likely that situations like
> using a pkey after sys_pkey_free() can be detected.

So it's analogous to file descriptor open()/close() syscalls: the kernel does 
not 
enforce that different libraries of the same process do not interfere with each 
other's file descriptors - but in practice it's not a problem because everyone 
uses open()/close().

Resources that a process uses don't per se 'need' kernel level isolation to be 
useful.

> The kernel does _not_ enforce that this interface must be used for
> changes to PKRU, whether or not a key has been "allocated".

Nor does the kernel enforce that open() must be used to get a file descriptor, 
so 
code can do the following:

close(100);

and can interfere with a library that is holding a file open - but it's 
generally 
not a problem and the above is considered poor code that will cause problems.

One thing that is different is that file descriptors are generally plentiful, 
while of pkeys there are at most 16 - but I think it's still "large enough" to 
not 
be an issue in practice.

We'll see ...

> This syscall interface could also theoretically be replaced with a pair of 
> vsyscalls.  The vsyscalls would just call WRPKRU/RDPKRU directly in 
> situations 
> where they are drop-in equivalents for what the kernel would be doing.

Indeed.

Thanks,

Ingo

Re: [RFC][PATCH 7/7] pkeys: add details of system call use to Documentation/

[Ingo Molnar]

* Dave Hansen  wrote:

> 
> From: Dave Hansen 
> 
> This spells out all of the pkey-related system calls that we have
> and provides some example code fragments to demonstrate how we
> expect them to be used.
> 
> Signed-off-by: Dave Hansen 
> Cc: linux-...@vger.kernel.org
> Cc: linux...@kvack.org
> Cc: x...@kernel.org
> Cc: torva...@linux-foundation.org
> Cc: a...@linux-foundation.org
> ---
> 
>  b/Documentation/x86/protection-keys.txt |   63 
> 
>  1 file changed, 63 insertions(+)

Please also add pkeys testcases to tools/tests/self-tests.

Thanks,

Ingo

Re: [RFC][PATCH 7/7] pkeys: add details of system call use to Documentation/

[Ingo Molnar]

* Dave Hansen  wrote:

> 
> From: Dave Hansen 
> 
> This spells out all of the pkey-related system calls that we have
> and provides some example code fragments to demonstrate how we
> expect them to be used.
> 
> Signed-off-by: Dave Hansen 
> Cc: linux-...@vger.kernel.org
> Cc: linux...@kvack.org
> Cc: x...@kernel.org
> Cc: torva...@linux-foundation.org
> Cc: a...@linux-foundation.org
> ---
> 
>  b/Documentation/x86/protection-keys.txt |   63 
> 
>  1 file changed, 63 insertions(+)

Please also add pkeys testcases to tools/tests/self-tests.

Thanks,

Ingo

Re: [PATCH] phy: rcar-gen3-usb2: remove HSUSB registers handling

[Kishon Vijay Abraham I]

Hi,

On Tuesday 23 February 2016 11:54 AM, Yoshihiro Shimoda wrote:
> Hi Kishon,
> 
> Would you review this patch?

merged it now. Thanks for reminding.

-Kishon

> 
> I checked the latest linux-phy.git / next branch today,
> this patch can be applied on the top of branch.
> 
> commit 6b825eb7323a634cdd1014a4aa9a8ff07cf8040c
> Author: Heiko Stuebner 
> Date:   Mon Feb 22 12:55:01 2016 +0100
> 
> phy: rockchip-usb: add handler for usb-uart functionality
> 
> Best regards,
> Yoshihiro Shimoda
> 
>> -Original Message-
>> From: Yoshihiro Shimoda
>> Sent: Tuesday, February 02, 2016 5:29 PM
>> To: kis...@ti.com
>> Cc: pawel.m...@arm.com; mark.rutl...@arm.com; ijc+devicet...@hellion.org.uk; 
>> ga...@codeaurora.org;
>> linux-kernel@vger.kernel.org; devicet...@vger.kernel.org; 
>> linux...@vger.kernel.org; 'Rob Herring' ;
>> linux-renesas-...@vger.kernel.org
>> Subject: RE: [PATCH] phy: rcar-gen3-usb2: remove HSUSB registers handling
>>
>> Hi Kishon,
>>
>> Would you review this patch?
>> I checked the latest linux-phy.git / next branch today, and it is the same 
>> as the following.
>>
  This patch is based on the linux-phy / next branch.
  (commit id = 9955a7835bf376e12482583958b2661f501b868b)
>>
>> Best regards,
>> Yoshihiro Shimoda
>>
>>> From: Rob Herring [mailto:r...@kernel.org]
>>> Sent: Sunday, January 10, 2016 7:33 AM
>>> To: Yoshihiro Shimoda 
>>> Cc: kis...@ti.com; pawel.m...@arm.com; mark.rutl...@arm.com; 
>>> ijc+devicet...@hellion.org.uk; ga...@codeaurora.org;
>>> linux-kernel@vger.kernel.org; devicet...@vger.kernel.org; 
>>> linux...@vger.kernel.org
>>> Subject: Re: [PATCH] phy: rcar-gen3-usb2: remove HSUSB registers handling
>>>
>>> On Thu, Jan 07, 2016 at 06:16:44PM +0900, Yoshihiro Shimoda wrote:
 Since the related driver (CPG/MSSR driver) only manages the first module
 clock, this driver should not handle the HSUSB registers. So, this patch
 removes the HSUSB registers handling.

 Signed-off-by: Yoshihiro Shimoda 
 ---
  This patch is based on the linux-phy / next branch.
  (commit id = 9955a7835bf376e12482583958b2661f501b868b)

  .../devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 15 ++--
>>>
>>> Acked-by: Rob Herring 
>>>
  drivers/phy/phy-rcar-gen3-usb2.c   | 83 
 +++---
  2 files changed, 15 insertions(+), 83 deletions(-)
>>>
> 

Re: [PATCH] phy: rcar-gen3-usb2: remove HSUSB registers handling

[Kishon Vijay Abraham I]

Hi,

On Tuesday 23 February 2016 11:54 AM, Yoshihiro Shimoda wrote:
> Hi Kishon,
> 
> Would you review this patch?

merged it now. Thanks for reminding.

-Kishon

> 
> I checked the latest linux-phy.git / next branch today,
> this patch can be applied on the top of branch.
> 
> commit 6b825eb7323a634cdd1014a4aa9a8ff07cf8040c
> Author: Heiko Stuebner 
> Date:   Mon Feb 22 12:55:01 2016 +0100
> 
> phy: rockchip-usb: add handler for usb-uart functionality
> 
> Best regards,
> Yoshihiro Shimoda
> 
>> -Original Message-
>> From: Yoshihiro Shimoda
>> Sent: Tuesday, February 02, 2016 5:29 PM
>> To: kis...@ti.com
>> Cc: pawel.m...@arm.com; mark.rutl...@arm.com; ijc+devicet...@hellion.org.uk; 
>> ga...@codeaurora.org;
>> linux-kernel@vger.kernel.org; devicet...@vger.kernel.org; 
>> linux...@vger.kernel.org; 'Rob Herring' ;
>> linux-renesas-...@vger.kernel.org
>> Subject: RE: [PATCH] phy: rcar-gen3-usb2: remove HSUSB registers handling
>>
>> Hi Kishon,
>>
>> Would you review this patch?
>> I checked the latest linux-phy.git / next branch today, and it is the same 
>> as the following.
>>
  This patch is based on the linux-phy / next branch.
  (commit id = 9955a7835bf376e12482583958b2661f501b868b)
>>
>> Best regards,
>> Yoshihiro Shimoda
>>
>>> From: Rob Herring [mailto:r...@kernel.org]
>>> Sent: Sunday, January 10, 2016 7:33 AM
>>> To: Yoshihiro Shimoda 
>>> Cc: kis...@ti.com; pawel.m...@arm.com; mark.rutl...@arm.com; 
>>> ijc+devicet...@hellion.org.uk; ga...@codeaurora.org;
>>> linux-kernel@vger.kernel.org; devicet...@vger.kernel.org; 
>>> linux...@vger.kernel.org
>>> Subject: Re: [PATCH] phy: rcar-gen3-usb2: remove HSUSB registers handling
>>>
>>> On Thu, Jan 07, 2016 at 06:16:44PM +0900, Yoshihiro Shimoda wrote:
 Since the related driver (CPG/MSSR driver) only manages the first module
 clock, this driver should not handle the HSUSB registers. So, this patch
 removes the HSUSB registers handling.

 Signed-off-by: Yoshihiro Shimoda 
 ---
  This patch is based on the linux-phy / next branch.
  (commit id = 9955a7835bf376e12482583958b2661f501b868b)

  .../devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 15 ++--
>>>
>>> Acked-by: Rob Herring 
>>>
  drivers/phy/phy-rcar-gen3-usb2.c   | 83 
 +++---
  2 files changed, 15 insertions(+), 83 deletions(-)
>>>
> 

Re: [LKP] [lkp] [gpio] 3c702e9987: kmsg.user_verbs:couldn't_register_device_number

[Huang, Ying]

Linus Walleij  writes:

> On Mon, Feb 15, 2016 at 3:39 AM, Huang, Ying  wrote:
>> Michael Welling  writes:
>
>>> Could you run cat /proc/devices?
>>
>> Sorry, the test mechanism is not flexible enough to run some shell
>> command in test system.  Could you provide a specialized debug kernel to
>> dump the necessary information in kernel log?  We can collect dmesg
>> easily.
>
> Can you try this:
>
> diff --git a/fs/char_dev.c b/fs/char_dev.c
> index 24b142569ca9..74a2d433273e 100644
> --- a/fs/char_dev.c
> +++ b/fs/char_dev.c
> @@ -96,6 +96,8 @@ __register_chrdev_region(unsigned int major,
> unsigned int baseminor,
>  goto out;
>  }
>  major = i;
> +pr_info("CHARDEV: allocate major %d for \"%s\"\n",
> +i, name);
>  }
>
>  cd->major = major;
>
> Then dmesg |grep CHARDEV should tell what we need to know.

Sorry for late, the dmesg with the patch is attached.  And the output of
dmesg | grep CHARDEV is as follow:

[0.750037] CHARDEV: allocate major 254 for "gpiochip"
[0.897928] CHARDEV: allocate major 253 for "tpm"
[0.904196] CHARDEV: allocate major 252 for "ndctl"
[0.905295] CHARDEV: allocate major 251 for "dimmctl"
[0.909573] CHARDEV: allocate major 250 for "pps"
[0.913740] CHARDEV: allocate major 249 for "ptp"
[0.916711] CHARDEV: allocate major 248 for "iio"
[1.227597] CHARDEV: allocate major 247 for "bsg"
[1.577194] CHARDEV: allocate major 246 for "gsmtty"
[1.614921] CHARDEV: allocate major 245 for "ttyn"
[1.616044] CHARDEV: allocate major 244 for "ttyARC"
[1.617177] CHARDEV: allocate major 243 for "ttyRP"
[1.618310] CHARDEV: allocate major 242 for "ttyLP"
[1.620618] CHARDEV: allocate major 241 for "noz"
[1.621707] CHARDEV: allocate major 240 for "ttyIPWp"
[1.630024] CHARDEV: allocate major 239 for "telco_clock"
[1.632315] CHARDEV: allocate major 239 for "cmm"
[1.681375] CHARDEV: allocate major 238 for "hpilo"
[1.696757] CHARDEV: allocate major 237 for "aac"
[1.699338] CHARDEV: allocate major 236 for "megadev_legacy"
[1.704680] CHARDEV: allocate major 235 for "megaraid_sas_ioctl"
[1.731179] CHARDEV: allocate major 234 for "pmcsas"
[1.737520] CHARDEV: allocate major 233 for "nvme"
[2.388531] CHARDEV: allocate major 232 for "firewire"
[2.389743] CHARDEV: allocate major 231 for "uio"
[2.904429] CHARDEV: allocate major 230 for "ttySDIO"
[2.922374] CHARDEV: allocate major 229 for "ib_qib"
[2.927559] CHARDEV: allocate major 228 for "hidraw"
[2.952328] CHARDEV: allocate major 227 for "fwtty"
[2.953435] CHARDEV: allocate major 225 for "fwloop"

Best Regards,
Huang, Ying


dmesg.xz
Description: application/xz

Re: [LKP] [lkp] [gpio] 3c702e9987: kmsg.user_verbs:couldn't_register_device_number

[Huang, Ying]

Linus Walleij  writes:

> On Mon, Feb 15, 2016 at 3:39 AM, Huang, Ying  wrote:
>> Michael Welling  writes:
>
>>> Could you run cat /proc/devices?
>>
>> Sorry, the test mechanism is not flexible enough to run some shell
>> command in test system.  Could you provide a specialized debug kernel to
>> dump the necessary information in kernel log?  We can collect dmesg
>> easily.
>
> Can you try this:
>
> diff --git a/fs/char_dev.c b/fs/char_dev.c
> index 24b142569ca9..74a2d433273e 100644
> --- a/fs/char_dev.c
> +++ b/fs/char_dev.c
> @@ -96,6 +96,8 @@ __register_chrdev_region(unsigned int major,
> unsigned int baseminor,
>  goto out;
>  }
>  major = i;
> +pr_info("CHARDEV: allocate major %d for \"%s\"\n",
> +i, name);
>  }
>
>  cd->major = major;
>
> Then dmesg |grep CHARDEV should tell what we need to know.

Sorry for late, the dmesg with the patch is attached.  And the output of
dmesg | grep CHARDEV is as follow:

[0.750037] CHARDEV: allocate major 254 for "gpiochip"
[0.897928] CHARDEV: allocate major 253 for "tpm"
[0.904196] CHARDEV: allocate major 252 for "ndctl"
[0.905295] CHARDEV: allocate major 251 for "dimmctl"
[0.909573] CHARDEV: allocate major 250 for "pps"
[0.913740] CHARDEV: allocate major 249 for "ptp"
[0.916711] CHARDEV: allocate major 248 for "iio"
[1.227597] CHARDEV: allocate major 247 for "bsg"
[1.577194] CHARDEV: allocate major 246 for "gsmtty"
[1.614921] CHARDEV: allocate major 245 for "ttyn"
[1.616044] CHARDEV: allocate major 244 for "ttyARC"
[1.617177] CHARDEV: allocate major 243 for "ttyRP"
[1.618310] CHARDEV: allocate major 242 for "ttyLP"
[1.620618] CHARDEV: allocate major 241 for "noz"
[1.621707] CHARDEV: allocate major 240 for "ttyIPWp"
[1.630024] CHARDEV: allocate major 239 for "telco_clock"
[1.632315] CHARDEV: allocate major 239 for "cmm"
[1.681375] CHARDEV: allocate major 238 for "hpilo"
[1.696757] CHARDEV: allocate major 237 for "aac"
[1.699338] CHARDEV: allocate major 236 for "megadev_legacy"
[1.704680] CHARDEV: allocate major 235 for "megaraid_sas_ioctl"
[1.731179] CHARDEV: allocate major 234 for "pmcsas"
[1.737520] CHARDEV: allocate major 233 for "nvme"
[2.388531] CHARDEV: allocate major 232 for "firewire"
[2.389743] CHARDEV: allocate major 231 for "uio"
[2.904429] CHARDEV: allocate major 230 for "ttySDIO"
[2.922374] CHARDEV: allocate major 229 for "ib_qib"
[2.927559] CHARDEV: allocate major 228 for "hidraw"
[2.952328] CHARDEV: allocate major 227 for "fwtty"
[2.953435] CHARDEV: allocate major 225 for "fwloop"

Best Regards,
Huang, Ying


dmesg.xz
Description: application/xz

[PATCH V4 0/4] Transform Fintek PCIE driver from 8250 to MFD

[Peter Hung]

The Fintek F81504/508/512 is a multi-function PCIE devices.
IC function list:
F81504: Max 2x8 GPIOs and max 4 serial ports
port2/3 are multi-function
F81508: Max 6x8 GPIOs and max 8 serial ports
port2/3 are multi-function, port8/9/10/11 are gpio only
F81512: Max 6x8 GPIOs and max 12 serial ports
port2/3/8/9/10/11 are multi-function

It had implemented in 8250_pci.c with basic serial port function.
We want to complete it. Alan & Andy recommend us to rewrite and
spilt our driver with MFD architecture.
https://lkml.org/lkml/2016/1/19/288

Paul recommed us do less code deletion to avoid confusing problem when
bisect.
https://lkml.org/lkml/2016/1/18/646

So we'll do this with following patches.
1. Add MFD core driver.
2. Add GPIOLIB driver.
3. Add serial port driver.
4. Remove old driver in 8250_pci.c and add it to blacklist

8250_pci.c will still handle the device when patches 1~3. After apply
patch 4, the device will control by F81504 MFD core driver.

Changelog:
V4:
1. Fix the comment style
2. Fix the warning (.owner = THIS_MODULE) reported by kbuild bot
   with f81504_core.c & 8250_f81504.c
3. Remove unused Kconfig option (RATIONAL) with 8250_f81504.c
4. Remove unused variable (quot/rem) with f81504_check_baudrate()
   in 8250_f81504.c
V3:
1. Refactoring gpio-f81504.c with new API
   (Suggested by Linus Walleij).
2. Fix wrong kfree in gpio-f81504.c (Suggested by Andy Shevchenko).
3. Get PCI resource by pci_resource_start() instead of getting PCI
   resource from BAR of PCI configuration space (Suggested by Alan).

V2:
1. Split F81504/508/512 from 8250_pci.c to MFD, It'll add 3 new files
   1. drivers/mfd/f81504-core.c
   2. drivers/gpio/gpio-f81504.c
   3. drivers/tty/serial/8250/8250_f81504.c

V1:
1. Split F81504/508/512 from 8250_pci.c to 8250_fintek_pci.c.
   Alan & Andy recommend me to rewrite as MFD architecture.

Peter Hung (4):
  mfd: f81504-core: Add Fintek F81504/508/512 PCIE-to-UART/GPIO core
support
  gpio: gpio-f81504: Add Fintek F81504/508/512 PCIE-to-UART/GPIO GPIOLIB
support
  8250: 8250_f81504: Add Fintek F81504/508/512 PCIE-to-UART/GPIO UART
support
  serial: 8250_pci: Remove Fintek F81504/508/512 UART driver

 drivers/gpio/Kconfig  |  10 +
 drivers/gpio/Makefile |   1 +
 drivers/gpio/gpio-f81504.c| 241 
 drivers/mfd/Kconfig   |  12 ++
 drivers/mfd/Makefile  |   2 +
 drivers/mfd/f81504-core.c | 335 ++
 drivers/tty/serial/8250/8250_f81504.c | 250 +
 drivers/tty/serial/8250/8250_pci.c| 206 +
 drivers/tty/serial/8250/Kconfig   |  10 +
 drivers/tty/serial/8250/Makefile  |   1 +
 include/linux/mfd/f81504.h|  52 ++
 11 files changed, 919 insertions(+), 201 deletions(-)
 create mode 100644 drivers/gpio/gpio-f81504.c
 create mode 100644 drivers/mfd/f81504-core.c
 create mode 100644 drivers/tty/serial/8250/8250_f81504.c
 create mode 100644 include/linux/mfd/f81504.h

-- 
1.9.1

[PATCH V4 0/4] Transform Fintek PCIE driver from 8250 to MFD

[Peter Hung]

The Fintek F81504/508/512 is a multi-function PCIE devices.
IC function list:
F81504: Max 2x8 GPIOs and max 4 serial ports
port2/3 are multi-function
F81508: Max 6x8 GPIOs and max 8 serial ports
port2/3 are multi-function, port8/9/10/11 are gpio only
F81512: Max 6x8 GPIOs and max 12 serial ports
port2/3/8/9/10/11 are multi-function

It had implemented in 8250_pci.c with basic serial port function.
We want to complete it. Alan & Andy recommend us to rewrite and
spilt our driver with MFD architecture.
https://lkml.org/lkml/2016/1/19/288

Paul recommed us do less code deletion to avoid confusing problem when
bisect.
https://lkml.org/lkml/2016/1/18/646

So we'll do this with following patches.
1. Add MFD core driver.
2. Add GPIOLIB driver.
3. Add serial port driver.
4. Remove old driver in 8250_pci.c and add it to blacklist

8250_pci.c will still handle the device when patches 1~3. After apply
patch 4, the device will control by F81504 MFD core driver.

Changelog:
V4:
1. Fix the comment style
2. Fix the warning (.owner = THIS_MODULE) reported by kbuild bot
   with f81504_core.c & 8250_f81504.c
3. Remove unused Kconfig option (RATIONAL) with 8250_f81504.c
4. Remove unused variable (quot/rem) with f81504_check_baudrate()
   in 8250_f81504.c
V3:
1. Refactoring gpio-f81504.c with new API
   (Suggested by Linus Walleij).
2. Fix wrong kfree in gpio-f81504.c (Suggested by Andy Shevchenko).
3. Get PCI resource by pci_resource_start() instead of getting PCI
   resource from BAR of PCI configuration space (Suggested by Alan).

V2:
1. Split F81504/508/512 from 8250_pci.c to MFD, It'll add 3 new files
   1. drivers/mfd/f81504-core.c
   2. drivers/gpio/gpio-f81504.c
   3. drivers/tty/serial/8250/8250_f81504.c

V1:
1. Split F81504/508/512 from 8250_pci.c to 8250_fintek_pci.c.
   Alan & Andy recommend me to rewrite as MFD architecture.

Peter Hung (4):
  mfd: f81504-core: Add Fintek F81504/508/512 PCIE-to-UART/GPIO core
support
  gpio: gpio-f81504: Add Fintek F81504/508/512 PCIE-to-UART/GPIO GPIOLIB
support
  8250: 8250_f81504: Add Fintek F81504/508/512 PCIE-to-UART/GPIO UART
support
  serial: 8250_pci: Remove Fintek F81504/508/512 UART driver

 drivers/gpio/Kconfig  |  10 +
 drivers/gpio/Makefile |   1 +
 drivers/gpio/gpio-f81504.c| 241 
 drivers/mfd/Kconfig   |  12 ++
 drivers/mfd/Makefile  |   2 +
 drivers/mfd/f81504-core.c | 335 ++
 drivers/tty/serial/8250/8250_f81504.c | 250 +
 drivers/tty/serial/8250/8250_pci.c| 206 +
 drivers/tty/serial/8250/Kconfig   |  10 +
 drivers/tty/serial/8250/Makefile  |   1 +
 include/linux/mfd/f81504.h|  52 ++
 11 files changed, 919 insertions(+), 201 deletions(-)
 create mode 100644 drivers/gpio/gpio-f81504.c
 create mode 100644 drivers/mfd/f81504-core.c
 create mode 100644 drivers/tty/serial/8250/8250_f81504.c
 create mode 100644 include/linux/mfd/f81504.h

-- 
1.9.1

[PATCH V4 3/4] 8250: 8250_f81504: Add Fintek F81504/508/512 PCIE-to-UART/GPIO UART support

[Peter Hung]

This driver is 8250 driver for F81504/508/512, it'll handle the serial
port operation of this device. This module will depend on
MFD_FINTEK_F81504_CORE.

The serial ports support from 50bps to 1.5Mbps with Linux baudrate
define excluding 1.0Mbps due to not support 16MHz clock source.

PCI Configuration Space Registers, set:0~11(Max):
40h + 8 * set:
   bit7~6: Clock source selector
   00: 1.8432MHz
   01: 18.432MHz
   10: 24MHz
   11: 14.769MHz
   bit0: UART enable
41h + 8 * set:
   bit5~4: RX trigger multiple
   00: 1x * trigger level
   01: 2x * trigger level
   10: 4x * trigger level
   11: 8x * trigger level
   bit1~0: FIFO Size
   11: 128Bytes
44h + 8 * set: UART IO address (LSB)
45h + 8 * set: UART IO address (MSB)
47h + 8 * set:
   bit5: RTS invert (bit4 must enable)
   bit4: RTS auto direction enable
 0: RTS control by MCR
 1: RTS driven high when TX, otherwise low

Suggested-by: One Thousand Gnomes 
Suggested-by: Andy Shevchenko 
Signed-off-by: Peter Hung 
---
 drivers/tty/serial/8250/8250_f81504.c | 250 ++
 drivers/tty/serial/8250/Kconfig   |  10 ++
 drivers/tty/serial/8250/Makefile  |   1 +
 3 files changed, 261 insertions(+)
 create mode 100644 drivers/tty/serial/8250/8250_f81504.c

diff --git a/drivers/tty/serial/8250/8250_f81504.c 
b/drivers/tty/serial/8250/8250_f81504.c
new file mode 100644
index 000..2b6c3d3
--- /dev/null
+++ b/drivers/tty/serial/8250/8250_f81504.c
@@ -0,0 +1,250 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "8250.h"
+
+static u32 baudrate_table[] = { 150, 1152000, 921600 };
+static u8 clock_table[] = { F81504_CLKSEL_24_MHZ, F81504_CLKSEL_18_46_MHZ,
+   F81504_CLKSEL_14_77_MHZ };
+
+/* We should do proper H/W transceiver setting before change to RS485 mode */
+static int f81504_rs485_config(struct uart_port *port,
+  struct serial_rs485 *rs485)
+{
+   u8 setting;
+   u8 *index = port->private_data;
+   struct platform_device *pdev = container_of(port->dev,
+   struct platform_device, dev);
+   struct pci_dev *pci_dev = to_pci_dev(pdev->dev.parent);
+
+   pci_read_config_byte(pci_dev, F81504_UART_START_ADDR +
+   F81504_UART_OFFSET * *index + F81504_UART_MODE_OFFSET,
+   );
+
+   if (!rs485)
+   rs485 = >rs485;
+   else if (rs485->flags & SER_RS485_ENABLED)
+   memset(rs485->padding, 0, sizeof(rs485->padding));
+   else
+   memset(rs485, 0, sizeof(*rs485));
+
+   /* F81504/508/512 not support RTS delay before or after send */
+   rs485->flags &= SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND;
+
+   if (rs485->flags & SER_RS485_ENABLED) {
+   /* Enable RTS H/W control mode */
+   setting |= F81504_RTS_CONTROL_BY_HW;
+
+   if (rs485->flags & SER_RS485_RTS_ON_SEND) {
+   /* RTS driving high on TX */
+   setting &= ~F81504_RTS_INVERT;
+   } else {
+   /* RTS driving low on TX */
+   setting |= F81504_RTS_INVERT;
+   }
+
+   rs485->delay_rts_after_send = 0;
+   rs485->delay_rts_before_send = 0;
+   } else {
+   /* Disable RTS H/W control mode */
+   setting &= ~(F81504_RTS_CONTROL_BY_HW | F81504_RTS_INVERT);
+   }
+
+   pci_write_config_byte(pci_dev, F81504_UART_START_ADDR +
+   F81504_UART_OFFSET * *index + F81504_UART_MODE_OFFSET,
+   setting);
+
+   if (rs485 != >rs485)
+   port->rs485 = *rs485;
+
+   return 0;
+}
+
+static int f81504_check_baudrate(u32 baud, size_t *idx)
+{
+   size_t index;
+
+   for (index = 0; index < ARRAY_SIZE(baudrate_table); ++index) {
+   /* Clock source must larger than desire baud rate */
+   if (baud > baudrate_table[index])
+   continue;
+
+   /* Find divisible clock source */
+   if (!(baudrate_table[index] % baud)) {
+   if (idx)
+   *idx = index;
+   return 0;
+   }
+   }
+
+   return -EINVAL;
+}
+
+static void f81504_set_termios(struct uart_port *port,
+   struct ktermios *termios, struct ktermios *old)
+{
+   struct platform_device *pdev = container_of(port->dev,
+   

[PATCH V4 2/4] gpio: gpio-f81504: Add Fintek F81504/508/512 PCIE-to-UART/GPIO GPIOLIB support

[Peter Hung]

This driver is GPIOLIB driver for F81504/508/512, it'll handle the
GPIOLIB operation of this device. This module will depend on
MFD_FINTEK_F81504_CORE.

IC function list:
F81504: Max 2x8 GPIOs and max 4 serial ports
port2/3 are multi-function
F81508: Max 6x8 GPIOs and max 8 serial ports
port2/3 are multi-function, port8/9/10/11 are gpio only
F81512: Max 6x8 GPIOs and max 12 serial ports
port2/3/8/9/10/11 are multi-function

GPIO register:
PCI Configuration space:
F0h: bit0~5: Enable GPIO0~5
 bit6~7: Reserve
F3h: bit0~5: Multi-Functional Flag (0:GPIO/1:UART)
 bit0: UART2 pin out for UART2 / GPIO0
 bit1: UART3 pin out for UART3 / GPIO1
 bit2: UART8 pin out for UART8 / GPIO2
 bit3: UART9 pin out for UART9 / GPIO3
 bit4: UART10 pin out for UART10 / GPIO4
 bit5: UART11 pin out for UART11 / GPIO5
 bit6~7: Reserve
F1h: IO address (LSB)
F2h: IO address (MSB)
F8h + 8 * set: Direction control (bitwise)
 bitx: 0 - Input mode
 bitx: 1 - Output mode
F9h + 8 * set: Drive ability control (bitwise)
 bitx: 0 - Open drain (default)
 bitx: 1 - Push Pull
 In this driver, we only implements open drain mode.

IO space:
(IO base + 0~5): GPIO-0x~5x in/out value (bitwise)

Suggested-by: One Thousand Gnomes 
Suggested-by: Andy Shevchenko 
Signed-off-by: Peter Hung 
---
 drivers/gpio/Kconfig   |  10 ++
 drivers/gpio/Makefile  |   1 +
 drivers/gpio/gpio-f81504.c | 241 +
 3 files changed, 252 insertions(+)
 create mode 100644 drivers/gpio/gpio-f81504.c

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 2b80903..c9e1cf8 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -912,6 +912,16 @@ config GPIO_WM8994
  Say yes here to access the GPIO signals of WM8994 audio hub
  CODECs from Wolfson Microelectronics.
 
+config GPIO_F81504
+tristate "Fintek F81504/508/512 PCIE-to-UART/GPIO support"
+depends on MFD_FINTEK_F81504_CORE
+select MFD_CORE
+help
+  Say yes here to support the GPIO functionality of Fintek
+  F81504/508/512 PCIE-to-UART/GPIO.
+
+  If unsure, say N.
+
 endmenu
 
 menu "PCI GPIO expanders"
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index c759190..f277089 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -112,6 +112,7 @@ obj-$(CONFIG_GPIO_VX855)+= gpio-vx855.o
 obj-$(CONFIG_GPIO_WM831X)  += gpio-wm831x.o
 obj-$(CONFIG_GPIO_WM8350)  += gpio-wm8350.o
 obj-$(CONFIG_GPIO_WM8994)  += gpio-wm8994.o
+obj-$(CONFIG_GPIO_F81504)   += gpio-f81504.o
 obj-$(CONFIG_GPIO_XGENE)   += gpio-xgene.o
 obj-$(CONFIG_GPIO_XGENE_SB)+= gpio-xgene-sb.o
 obj-$(CONFIG_GPIO_XILINX)  += gpio-xilinx.o
diff --git a/drivers/gpio/gpio-f81504.c b/drivers/gpio/gpio-f81504.c
new file mode 100644
index 000..25a535c
--- /dev/null
+++ b/drivers/gpio/gpio-f81504.c
@@ -0,0 +1,241 @@
+/*
+ * Copyright (C) 2016 Fintek Corporation
+ * Based on gpio-mpc8xxx.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+#include 
+#include 
+#include 
+#include 
+
+struct f81504_gpio_chip {
+   struct gpio_chip chip;
+   struct mutex locker;
+   u8 idx;
+   u8 save_out_en;
+   u8 save_drive_en;
+   u8 save_value;
+};
+
+static int f81504_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
+{
+   struct f81504_gpio_chip *gc = gpiochip_get_data(chip);
+   struct platform_device *pdev = to_platform_device(chip->parent);
+   struct pci_dev *pci_dev = to_pci_dev(pdev->dev.parent);
+   u8 tmp;
+
+   mutex_lock(>locker);
+
+   /* Set input mode */
+   pci_read_config_byte(pci_dev, F81504_GPIO_START_ADDR + gc->idx *
+F81504_GPIO_SET_OFFSET +
+F81504_GPIO_OUT_EN_OFFSET, );
+   pci_write_config_byte(pci_dev, F81504_GPIO_START_ADDR + gc->idx *
+ F81504_GPIO_SET_OFFSET +
+ F81504_GPIO_OUT_EN_OFFSET, tmp & ~BIT(offset));
+
+   mutex_unlock(>locker);
+   return 0;
+}
+
+static int f81504_gpio_direction_out(struct gpio_chip *chip, unsigned