Re: cross compilers [was build failure of sorts]

2016-06-20 Thread Vineet Gupta
On Saturday 18 June 2016 03:47 PM, Peter Zijlstra wrote: > As you can see, arc doesn't even build upstream binutils :/ > (binutils-2_26-branch as of today). Hmm - we are still in fight w.r.t. upstreaming gcc fully (ARCv2 gcc support) although ARCompact has been there for some time. binutils

Re: [alsa-devel] [very-RFC 0/8] TSN driver for the kernel

2016-06-20 Thread Takashi Iwai
On Mon, 20 Jun 2016 17:21:26 +0200, Richard Cochran wrote: > > On Mon, Jun 20, 2016 at 02:31:48PM +0200, Richard Cochran wrote: > > Where is this "audio_time" program of which you speak? > > Never mind, found it in alsa-lib. > > I still would appreciate an answer to my other questions,

Re: [PATCH v8 2/3] CMDQ: Mediatek CMDQ driver

2016-06-20 Thread Horng-Shyang Liao
On Fri, 2016-06-17 at 17:57 +0200, Matthias Brugger wrote: > > On 17/06/16 10:28, Horng-Shyang Liao wrote: > > Hi Matthias, > > > > On Tue, 2016-06-14 at 20:07 +0800, Horng-Shyang Liao wrote: > >> Hi Matthias, > >> > >> On Tue, 2016-06-14 at 12:17 +0200, Matthias Brugger wrote: > >>> > >>> On

Re: [PATCH v4 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

2016-06-20 Thread kbuild test robot
Hi, [auto build test ERROR on tip/x86/core] [also build test ERROR on v4.7-rc4 next-20160620] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Tan-Jui-Nee/pinctrl-broxton-enable-platform-device

[PATCH 3/6] kexec_file: Allow skipping checksum calculation for some segments.

2016-06-20 Thread Thiago Jung Bauermann
Adds checksum argument to kexec_add_buffer specifying whether the given segment should be part of the checksum calculation. The next patch will add a way to update segments after a kimage is loaded. Segments that will be updated in this way should not be checksummed, otherwise they will cause the

[RFC][PATCH] arm: ubsan: select ARCH_HAS_UBSAN_SANITIZE_ALL

2016-06-20 Thread Seung-Woo Kim
To enable UBSAN on arm, this patch enables ARCH_HAS_UBSAN_SANITIZE_ALL from arm confiuration. Basic kernel booting is tested on arm kernel enabled CONFIG_UBSAN_SANITIZE_ALL from Exynos5422 based Odroid-XU3 board. Signed-off-by: Seung-Woo Kim --- Because I tested only with

Re: [PATCH] ALSA: hda - Remove compilation warning

2016-06-20 Thread Takashi Iwai
On Mon, 20 Jun 2016 21:42:31 +0200, Helen Koike wrote: > > Remove the warning: > warning: ‘err’ may be used uninitialized in this function > [-Wmaybe-uninitialized] It's a false positive, a compiler problem. Takashi > > Signed-off-by: Helen Koike > --- >

[PATCH 24/27] Add support for AT_ARM64_MIDR.

2016-06-20 Thread Yury Norov
From: Andrew Pinski Signed-off-by: Yury Norov --- elf/dl-sysdep.c | 1 + elf/elf.h | 3 +++ sysdeps/unix/sysv/linux/aarch64/dl-auxv.h | 25 +

[PATCH 22/27] [AARCH64] ILP32: support stat syscall family

2016-06-20 Thread Yury Norov
From: Yury Norov stat and statfs structures has their layouts identical to lp64 after changing off_t, ino_t etc sizes to 64-bit. It means we can pass it to kernel same way as lp64 does. Signed-off-by: Yury Norov ---

[PATCH 15/27] [AARCH64] Add support to ldconfig for ILP32 and libilp32

2016-06-20 Thread Yury Norov
From: Andrew Pinski This patch adds support to ldconfig for libilp32 which is used by ILP32. * sysdeps/generic/ldconfig.h (FLAG_AARCH64_LIB32): New define. * elf/cache.c (print_entry): Handle FLAG_AARCH64_LIB32. * sysdeps/unix/sysv/linux/aarch64/dl-cache.h

linux-next: Tree for Jun 21

2016-06-20 Thread Stephen Rothwell
Hi all, Changes since 20160620: The net-next tree gained conflicts against the arm-doc tree. The akpm-current tree gained a conflict against the arm-soc tree. Non-merge commits (relative to Linus' tree): 4462 4490 files changed, 203456 insertions(+), 78511 deletions

[PATCH 18/27] [AARCH64] Add kernel_sigaction.h for AARCH64 ILP32

2016-06-20 Thread Yury Norov
From: Andrew Pinski In ILP32, the sigaction struct is the same as AARCH64 so we need the header file kernel_sigaction.h. To allow for this to work, we use a long long fields and then add extra casts when converting between the user exposed struct and the kernel exposed

[PATCH 14/27] [AARCH64] Add ILP32 to makefiles

2016-06-20 Thread Yury Norov
From: Andrew Pinski This patch adds ilp32 and ilp32_be as abi variants to the aarch64 linux makefile. * sysdeps/unix/sysv/linux/aarch64/Makefile (abi-variants): Add ilp32 and ilp32_be. (abi-lp64-options): Add defining of LP64 and undef of ILP32 macros. (abi-lp64-condition):

[PATCH 20/27] [AARCH64] Make lp64 and ilp32 directories.

2016-06-20 Thread Yury Norov
From: Andrew Pinski The patch makes the ilp32 and lp64 have their own directory under aarch64. Since ILP32 uses most of the same system calls as LP64 and has a 64bit off_t, we need make the functions that end in 64 the same as the ones without. We also need not to special

[PATCH 16/27] [AARCH64] Add ILP32 ld.so to the known interpreter names.

2016-06-20 Thread Yury Norov
From: Andrew Pinski This patch adds ILP32 ld.so names to the known interpreter names. * sysdeps/unix/sysv/linux/aarch64/ldconfig.h (SYSDEP_KNOWN_INTERPRETER_NAMES): Add ilp32 ld.so names. Signed-off-by: Yury Norov ---

[PATCH 19/27] [AARCH64] Add typesizes.h for ILP32

2016-06-20 Thread Yury Norov
From: Andrew Pinski The generic typesizes does not work for ILP32 as the kernel long type needs to be long long (quad). time_t, off_t, clock_t, suseconds_t, ino_t, rlim_t are 64bits. FDSET bitmask is a 64bit type. * sysdeps/unix/sysv/linux/aarch64/bits/typesizes.h: New

[PATCH 12/27] [AARCH64] Add ILP32 support to elf_machine_load_address.

2016-06-20 Thread Yury Norov
From: Andrew Pinski This adds ILP32 support to elf_machine_load_address. Since elf_machine_load_address depends on the static address being found without relocations, we need to use 16bit relocation which gets resolved at link time for ILP32. This is just like how the 32bit

[PATCH 17/27] [AARCH64] Add ldd-rewrite.sed so that ilp32 ld.so can be found

2016-06-20 Thread Yury Norov
From: Andrew Pinski To be support multi-lib with ldd, we need to add a ldd-rewrite.sed file to rewrite RTLDLIST to include both ld.so's. * sysdeps/unix/sysv/linux/aarch64/configure.ac (ldd_rewrite_script): Set. * sysdeps/unix/sysv/linux/aarch64/configure: Regenerate. *

[PATCH 0/6] kexec_file: Add buffer hand-over for the next kernel

2016-06-20 Thread Thiago Jung Bauermann
Hello, This patch series implements a mechanism which allows the kernel to pass on a buffer to the kernel that will be kexec'd. This buffer is passed as a segment which is added to the kimage when it is being prepared by kexec_file_load. How the second kernel is informed of this buffer is

[PATCH 23/27] [AARCH64] delouse input arguments in system functions

2016-06-20 Thread Yury Norov
Signed-off-by: Yury Norov --- sysdeps/aarch64/__longjmp.S | 2 ++ sysdeps/aarch64/dl-tlsdesc.S | 6 ++ sysdeps/aarch64/memcmp.S | 3 +++ sysdeps/aarch64/memcpy.S | 4 +++-

[PATCH 21/27] [AARCH64] ILP32: introduce syscalls that pass off_t

2016-06-20 Thread Yury Norov
From: Yury Norov ILP32 has 64-bit off_t, to follow modern requirements. But kernel clears top-halves of input registers. It means we have to pass corresponding arguments in a pair, like aarch32 does. In this patch all affected syscalls are redefined. Most of them are taken

[PATCH 13/27] [AARCH64] Set up wordsize for ILP32.

2016-06-20 Thread Yury Norov
From: Andrew Pinski __WORDSIZE needs to be set to 32 for ILP32. * sysdeps/aarch64/bits/wordsize.h (__WORDSIZE): Set to 32 for ILP32. Update comments. Signed-off-by: Yury Norov --- sysdeps/aarch64/bits/wordsize.h | 10 +++--- 1 file changed,

[RFC PATCH 00/27] ARM64: support ILP32

2016-06-20 Thread Yury Norov
This series enables aarch64 port with ilp32 mode. After long discussions in kernel list, we finally got consensus on how ABI should look. This patchset adds support for the ABI in GLIBC. It is tested with LTP with no big regressions comparing to LP64 and AARCH32. Though it's very raw. Please be

Re: [LKP] [lkp] [x86 tsc] 19fa5e7364: WARNING: CPU: 0 PID: 0 at arch/x86/mm/extable.c:50 ex_handler_rdmsr_unsafe+0x72/0x80

2016-06-20 Thread Yu Chen
Hi, On Mon, Jun 20, 2016 at 3:31 PM, kernel test robot wrote: > > FYI, we noticed the following commit: > > https://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux.git x86 > commit 19fa5e73647fde1e6a7038a8f05cddf4c43f08d3 ("x86 tsc: enumerate SKL > cpu_khz and tsc_khz

Re: mmc: dw_mmc: warning with CONFIG_DMA_API_DEBUG

2016-06-20 Thread Jaehoon Chung
Hi guys, On 06/21/2016 11:31 AM, Shawn Lin wrote: > On 2016/6/21 10:24, Seung-Woo Kim wrote: >> Hello Shawn, >> >>> -Original Message- >>> From: Shawn Lin [mailto:shawn@rock-chips.com] >>> Sent: Tuesday, June 21, 2016 10:52 AM >>> To: Seung-Woo Kim; jh80.ch...@samsung.com;

[PATCH v20 17/20] perf, tools: Make alias matching case-insensitive

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen Make alias matching the events parser case-insensitive. This is useful with the JSON events. perf uses lower case events, but the CPU manuals generally use upper case event names. The JSON files use lower case by default too. But if we search case

[PATCH v20 18/20] perf, tools, pmu-events: Fix fixed counters on Intel

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen The JSON event lists use a different encoding for fixed counters than perf for instructions and cycles (ref-cycles is ok) This lead to some common events like inst_retired.any or cpu_clk_unhalted.thread not counting, when specified with their JSON name.

Re: [PATCH] devpts: remove DEVPTS_MULTIPLE_INSTANCES from all configs

2016-06-20 Thread Vineet Gupta
On Monday 20 June 2016 02:44 PM, Alexandru Moise wrote: > As each mount of devpts is now an independent filesystem, > the DEVPTS_MULTIPLE_INSTANCES config option no longer exists. > So remove it. > > Signed-off-by: Alexandru Moise <00moses.alexande...@gmail.com> For arch/arc Acked-by: Vineet

[PATCH 2/3] staging: lowmemorykiller: count anon pages only when we have swap devices

2016-06-20 Thread Ganesh Mahendran
lowmem_count() should only count anon pages when we have swap device. Signed-off-by: Ganesh Mahendran --- drivers/staging/android/lowmemorykiller.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git

Re: [PATCH v3 1/2] dmaengine: vdma: Add 64 bit addressing support for the axi dma

2016-06-20 Thread Vinod Koul
On Tue, Jun 07, 2016 at 07:21:15PM +0530, Kedareswara rao Appana wrote: > The AXI DMA is a soft ip, which can be programmed to support > 32 bit addressing or greater than 32 bit addressing. > > When the AXI DMA ip is configured for 32 bit address space > in simple dma mode the buffer address is

[PATCH 3/3] staging: lowmemorykiller: select the task with maximum rss to kill

2016-06-20 Thread Ganesh Mahendran
Current task selecting logic in LMK does not fully aware of the memory pressure. It may select the task with maximum score adj, but with least tasksize. For example, if min_score_adj is 200, and there are 2 tasks in system: task a: score adj 500, tasksize 200M task b: score adj 1000,

Re: [PATCH 0/3] serial: remove modular code from a few more non-modular drivers

2016-06-20 Thread Paul Gortmaker
[[PATCH 0/3] serial: remove modular code from a few more non-modular drivers] On 20/06/2016 (Mon 18:55) Paul Gortmaker wrote: > For anyone new to the underlying goal of this cleanup, we are trying to > not use module support for code that can never be built as a module since: > > (1) it is

[PATCH 1/3] staging: lowmemorykiller: change lowmem_adj to lowmem_score_adj

2016-06-20 Thread Ganesh Mahendran
om_adj is deprecated, and in lowmemorykiller module, we use score adj to do the comparing. --- oom_score_adj = p->signal->oom_score_adj; if (oom_score_adj < min_score_adj) { task_unlock(p); continue; }

Re: ktime_get_ts64() splat during resume

2016-06-20 Thread Logan Gunthorpe
Hey Rafael, This patch appears to be working on my laptop. Thanks. Logan On 20/06/16 07:22 PM, Rafael J. Wysocki wrote: On Tuesday, June 21, 2016 02:05:59 AM Rafael J. Wysocki wrote: On Monday, June 20, 2016 11:15:18 PM Rafael J. Wysocki wrote: On Mon, Jun 20, 2016 at 8:29 PM, Linus

Re: [PATCH v5 0/7] /dev/random - a new approach

2016-06-20 Thread Stephan Mueller
Am Dienstag, 21. Juni 2016, 01:12:55 schrieb Theodore Ts'o: Hi Theodore, > On Mon, Jun 20, 2016 at 09:00:49PM +0200, Stephan Mueller wrote: > > The time stamp maintenance is the exact cause for the correlation: one HID > > event triggers: > > > > - add_interrupt_randomness which takes high-res

[PATCH v4 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

2016-06-20 Thread Tan Jui Nee
From: Andy Shevchenko There is already one and at least one more user coming which require an access to Primary to Sideband bridge (P2SB) in order to get IO or MMIO bar hidden by BIOS. Create a driver to access P2SB for x86 devices. Signed-off-by: Yong,

[PATCH 3/5] PM / devfreq: make exynos-bus explicitly non-modular

2016-06-20 Thread Paul Gortmaker
The Kconfig currently controlling compilation of this code is: devfreq/Kconfig:config ARM_EXYNOS_BUS_DEVFREQ devfreq/Kconfig:bool "ARM EXYNOS Generic Memory Bus DEVFREQ Driver" ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is

[PATCH 2/5] PM / devfreq: make devfreq-event explicitly non-modular

2016-06-20 Thread Paul Gortmaker
The Kconfig currently controlling compilation of this code is: menuconfig PM_DEVFREQ_EVENT bool "DEVFREQ-Event device Support" ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the

[PATCH 4/5] PM / devfreq: make event/exynos-nocp explicitly non-modular

2016-06-20 Thread Paul Gortmaker
The Kconfig currently controlling compilation of this code is: event/Kconfig:config DEVFREQ_EVENT_EXYNOS_NOCP event/Kconfig: bool "EXYNOS NoC (Network On Chip) Probe DEVFREQ event Driver" ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that

[PATCH 5/5] PM / devfreq: make event/exynos-ppmu explicitly non-modular

2016-06-20 Thread Paul Gortmaker
The Kconfig currently controlling compilation of this code is: config DEVFREQ_EVENT_EXYNOS_PPMU bool "EXYNOS PPMU (Platform Perf Monitoring Unit) DEVFREQ event Driver" ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially

[PATCH v4 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

2016-06-20 Thread Tan Jui Nee
This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Signed-off-by: Tan Jui Nee --- Changes in V4: - Move Kconfig option CONFIG_X86_INTEL_NON_ACPI from [PATCH 2/3] x86/platform/p2sb: New

Re: [PATCH v5 0/7] /dev/random - a new approach

2016-06-20 Thread Theodore Ts'o
On Mon, Jun 20, 2016 at 09:00:49PM +0200, Stephan Mueller wrote: > > The time stamp maintenance is the exact cause for the correlation: one HID > event triggers: > > - add_interrupt_randomness which takes high-res time stamp, Jiffies and some > pointers > > - add_input_randomness which takes

[PATCH 1/5] PM / devfreq: make devfreq explicitly non-modular

2016-06-20 Thread Paul Gortmaker
The Kconfig currently controlling compilation of this code is: menuconfig PM_DEVFREQ bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support" ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so

[PATCH 0/5] PM / devfreq: remove modular references from non-modules

2016-06-20 Thread Paul Gortmaker
For anyone new to the underlying goal of this cleanup, we are trying to not use module support for code that can never be built as a module since: (1) it is easy to accidentally write unused module_exit and remove code (2) it can be misleading when reading the source, thinking it can be

[PATCH v4 0/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

2016-06-20 Thread Tan Jui Nee
Hi, The patches are to cater the need for non-ACPI system whereby a platform device has to be created in order to bind with Apollo Lake Pinctrl GPIO platform driver. The MMIO BAR is accessed over the Primary to Sideband bridge (P2SB). Since the BIOS prevents the P2SB device from being enumerated

[PATCH 26/27] [AARCH64] Change type of __align to long long

2016-06-20 Thread Yury Norov
From: Andrew Pinski So that ILP32 is aligned to 64bits. Signed-off-by: Yury Norov --- sysdeps/aarch64/nptl/bits/semaphore.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sysdeps/aarch64/nptl/bits/semaphore.h

[PATCH 27/27] Fix PTRDIFF_MIN/PTRDIFF_MIN and PTRDIFF_MIN for ILP32.

2016-06-20 Thread Yury Norov
From: Andrew Pinski Signed-off-by: Andrew Pinski Signed-off-by: Yury Norov --- sysdeps/aarch64/bits/wordsize.h | 8 +++- sysdeps/generic/stdint.h| 9 +++-- 2 files changed, 10 insertions(+), 7 deletions(-)

[PATCH v4 1/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

2016-06-20 Thread Tan Jui Nee
This is to cater the need for non-ACPI system whereby a platform device has to be created in order to bind with the Apollo Lake Pinctrl GPIO platform driver. Signed-off-by: Tan Jui Nee Acked-by: Mika Westerberg --- Changes in V4: -

[PATCH 06/27] [AARCH64] Use PTR_REG/PTR_SIZE/PTR_SIZE_LOG in dl-tlsesc.S

2016-06-20 Thread Yury Norov
From: Andrew Pinski This converts dl-tlsdesc.S code over to use the new macros which allows for sharing between ILP32 and LP64 code. * sysdeps/aarch64/dl-tlsdesc.S (_dl_tlsdesc_return): Use PTR_REG. (_dl_tlsdesc_undefweak): Use PTR_REG, PTR_SIZE. (_dl_tlsdesc_dynamic):

[PATCH 09/27] [AARCH64] Use PTR_REG in getcontext.S.

2016-06-20 Thread Yury Norov
From: Andrew Pinski Just like the other patches, this patch allows for getcontext.S to be used between ILP32 and LP64. * sysdeps/unix/sysv/linux/aarch64/getcontext.S: Use PTR_REG when doing an add so wrapping of the pointer is correct for ILP32. Signed-off-by: Yury Norov

[PATCH 10/27] [AARCH64] Detect ILP32 in configure scripts.

2016-06-20 Thread Yury Norov
From: Andrew Pinski This adds detecting of ILP32 to the configure scripts. Adding to preconfigure detection of ilp32 in preconfigure and then writing out the default-abi in configure. * sysdeps/aarch64/preconfigure: Detect ILP32 and set aarch64_config_abi to ilp32 for ilp32

[PATCH 05/27] [AARCH64] Use PTR_REG in crti.S.

2016-06-20 Thread Yury Norov
From: Andrew Pinski call_weak_fn loads from a pointer, so use PTR_REG so the load is 32bits for ILP32. * sysdeps/aarch64/crti.S: Include sysdep.h (call_weak_fn): Use PTR_REG when loading from PREINIT_FUNCTION. AARCH64: Make RTLD_START paramatizable Make RTLD_START

[PATCH 11/27] [AARCH64] Syscalls for ILP32 are passed always via 64bit values.

2016-06-20 Thread Yury Norov
From: Andrew Pinski This patch adds support for ILP32 syscalls, sign and zero extending where needed. Unlike LP64, pointers are 32bit and need to be zero extended rather than the standard sign extend that the code would do. We take advatage of ssize_t being long rather than

[PATCH 08/27] [AARCH64] Use PTR_* in start.S

2016-06-20 Thread Yury Norov
From: Andrew Pinski To support ILP32 without much sources changes, this changes sysdeps/aarch64/start.S to use the PTR_* macros which was defined earlier. * sysdeps/aarch64/start.S: Include sysdep.h (_start): Use PTR_REG, PTR_SIZE macros. Signed-off-by: Yury Norov

RE: [PATCH v3 1/3] pinctrl/broxton: enable platform device in the absent of ACPI enumeration

2016-06-20 Thread Tan, Jui Nee
> -Original Message- > From: Linus Walleij [mailto:linus.wall...@linaro.org] > Sent: Tuesday, June 14, 2016 3:09 PM > To: Tan, Jui Nee > Cc: Mika Westerberg ; Heikki Krogerus > ; Andy Shevchenko >

RE: [PATCH v3 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

2016-06-20 Thread Tan, Jui Nee
> -Original Message- > From: Mika Westerberg [mailto:mika.westerb...@linux.intel.com] > Sent: Monday, June 13, 2016 11:59 PM > To: Andy Shevchenko > Cc: Tan, Jui Nee ; heikki.kroge...@linux.intel.com; > t...@linutronix.de;

[PATCH 5/5] clk: rockchip: rk3228: export related MAC clocks

2016-06-20 Thread Xing Zheng
This patch exports related MAC clocks for dts reference. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c | 22 +++--- include/dt-bindings/clock/rk3228-cru.h | 11 +++ 2 files changed, 22 insertions(+), 11 deletions(-)

RE: [PATCH v3 3/3] mfd: lpc_ich: Add support for Intel Apollo Lake GPIO pinctrl in non-ACPI system

2016-06-20 Thread Tan, Jui Nee
> -Original Message- > From: Lee Jones [mailto:lee.jo...@linaro.org] > Sent: Thursday, June 9, 2016 11:56 PM > To: Tan, Jui Nee > Cc: mika.westerb...@linux.intel.com; heikki.kroge...@linux.intel.com; > andriy.shevche...@linux.intel.com; t...@linutronix.de; >

[PATCH 4/5] clk: rockchip: rk3228: rename sclk_macphy_50m to sclk_mac_extclk

2016-06-20 Thread Xing Zheng
The sclk_macphy_50m is confusing, the sclk_mac_extclk describes a external clock clearly. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c |6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3228.c

[PATCH 3/5] clk: rockchip: rk3228: export related i2s/spdif clocks

2016-06-20 Thread Xing Zheng
This patch exports related i2s/spdif clocks for dts reference. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c |8 include/dt-bindings/clock/rk3228-cru.h |4 2 files changed, 8 insertions(+), 4 deletions(-) diff --git

linux-next: manual merge of the akpm-current tree with the arm-soc tree

2016-06-20 Thread Stephen Rothwell
Hi Andrew, Today's linux-next merge of the akpm-current tree got a conflict in: arch/arm/configs/bcm_defconfig between commit: 41463c3e6eae ("ARM: Remove bcm_defconfig") from the arm-soc tree and commit: c41079f16bf2 ("lib, switch CONFIG_PRINTK_TIME to int") from the akpm-current

[PATCH 1/5] clk: rockchip: rk3228: fix incorrect clock node names

2016-06-20 Thread Xing Zheng
Due to copy and paste carelessly, RK3288_CLKxxx nodes are incorrect, we need to fix them. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git

[PATCH RFC 1/2] rtc/hpet: Factorize hpet_rtc_timer_init()

2016-06-20 Thread Pratyush Anand
This patch factorize hpet_rtc_timer_init(), so that counter can be initialized before irq is registered. Signed-off-by: Pratyush Anand --- arch/x86/include/asm/hpet.h | 2 ++ arch/x86/kernel/hpet.c | 41 +++-- 2 files changed, 37

[PATCH RFC 2/2] rtc/rtc-cmos: Initialize software counters before irq is registered

2016-06-20 Thread Pratyush Anand
We have observed on few machines with rtc-cmos device that hpet_rtc_interrupt() is called before cmos_do_probe() could call hpet_rtc_timer_init(). It has not been observed during normal boot/reboot of machines. It *sometime* happens when system is booted with kdump secondary kernel. So, neither

[PATCH 2/5] clk: rockchip: rk3228: include downstream muxes into fractional dividers

2016-06-20 Thread Xing Zheng
During the initial conversion to the newly introduced combined fractional dividers+muxes the rk3228 clocks were left out, so convert them now. Signed-off-by: Xing Zheng --- drivers/clk/rockchip/clk-rk3228.c | 79 - 1 file changed,

[PATCH RFC 0/2] rtc-cmos: Workaround unwanted interrupt generation

2016-06-20 Thread Pratyush Anand
We have observed on few machines with rtc-cmos device that hpet_rtc_interrupt() is called before cmos_do_probe() could call hpet_rtc_timer_init(). It has not been observed during normal boot/reboot of machines. It *sometime* happens when system is booted with kdump secondary kernel. So, neither

[PATCH 0/5] Fix and improve clock controller for the RK322x SoCs

2016-06-20 Thread Xing Zheng
Hi, These patchset fix some clocks bugs, and improve clock configuration for i2s/spdif/MAC on RK322x SoCs. Thanks. Xing Zheng (5): clk: rockchip: rk3228: fix incorrect clock node names clk: rockchip: rk3228: include downstream muxes into fractional dividers clk: rockchip: rk3228:

[PATCH v20 14/20] perf, tools: Add support for event list topics

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen Add support to group the output of perf list by the Topic field in the JSON file. Example output: % perf list ... Cache: l1d.replacement [L1D data line replacements] l1d_pend_miss.pending [L1D miss oustandings duration in cycles]

Re: [RFC PATCH 2/2] xfs: map KM_MAYFAIL to __GFP_RETRY_HARD

2016-06-20 Thread Johannes Weiner
On Mon, Jun 20, 2016 at 10:08:56AM +0200, Michal Hocko wrote: > On Fri 17-06-16 17:39:31, Johannes Weiner wrote: > > On Fri, Jun 17, 2016 at 10:30:06PM +0200, Vlastimil Babka wrote: > > > On 17.6.2016 20:22, Johannes Weiner wrote: > [...] > > > > - it allows !costly orders to fail > > > > > > > >

Re: [RESEND PATCH v2 1/4] PCI: Ignore resource_alignment if PCI_PROBE_ONLY was set\\

2016-06-20 Thread Yongji Xie
On 2016/6/21 9:43, Bjorn Helgaas wrote: On Thu, Jun 02, 2016 at 01:46:48PM +0800, Yongji Xie wrote: The resource_alignment will releases memory resources allocated by firmware so that kernel can reassign new resources later on. But this will cause the problem that no resources can be allocated

Re: [PATCH] cgroup: Add pids controller event when fork fails because of pid limit

2016-06-20 Thread Johannes Weiner
On Mon, Jun 20, 2016 at 08:09:22PM -0700, Kenny Yu wrote: > Summary: > This patch adds more visibility into the pids controller when the controller > rejects a fork request. Whenever fork fails because the limit on the number of > pids in the cgroup is reached, the controller will log this and

Re: [PATCH 1/2] ARM: multi_v7_defconfig: Enable AHCI_IMX

2016-06-20 Thread Olof Johansson
Hi Toumas, We can apply this directly but I prefer to get an acked-by from the platform maintainer that it affects. I didn't even see them cc:d here so would you mind resubmit with them on the line? Alternatively send it to them and they can apply and feed up to us with other defconfig changes.

Re: [PATCH v10 08/22] IB/hns: Add icm support

2016-06-20 Thread Wei Hu (Xavier)
On 2016/6/20 21:04, Leon Romanovsky wrote: On Mon, Jun 20, 2016 at 05:48:15PM +0800, Wei Hu (Xavier) wrote: On 2016/6/20 17:27, Leon Romanovsky wrote: On Mon, Jun 20, 2016 at 03:49:24PM +0800, Wei Hu (Xavier) wrote: On 2016/6/20 14:06, Leon Romanovsky wrote: On Mon, Jun 20, 2016 at

[PATCH v4 4/5] ACPI 2.0 / AML: Enable correct ACPI subsystem initialization order for new table loading mode

2016-06-20 Thread Lv Zheng
This patch enables the following initialization order for the new table loading mode (which is enabled by setting acpi_gbl_parse_table_as_term_list to TRUE): 1. Install default region handlers (SystemMemory, SystemIo, PciConfig, EmbeddedControl via ECDT) without evaluating _REG; 2. Load

[PATCH v4 4/8] iommu/rockchip: Use DMA API to manage coherency

2016-06-20 Thread Tomasz Figa
From: Shunqian Zheng Use DMA API instead of architecture internal functions like __cpuc_flush_dcache_area() etc. The biggest difficulty here is that dma_map and _sync calls require some struct device, while there is no real 1:1 relation between an IOMMU domain and some

[PATCH v4 1/5] ACPICA: Namespace: Fix a regression that MLC support triggers dead lock in dynamic table loading

2016-06-20 Thread Lv Zheng
The new MLC approach invokes MLC per-table basis. But the dynamic loading support of this is incorrect because of the lock order: acpi_ns_evaluate acpi_ex_enter_intperter acpi_ns_load_table (triggered by Load opcode) acpi_ns_exec_module_code_list acpi_ex_enter_intperter

[PATCH v4 3/5] ACPICA: ACPI 2.0, Interpreter: Fix MLC issues by switching to new TermList grammar for table loading

2016-06-20 Thread Lv Zheng
The MLC (Module Level Code) is an ACPICA terminology describing the AML code out of any control method, its support is the main contention of the interpreter behavior during the table loading. The original implementation of MLC in ACPICA had several issues: 1. Out of any control method, besides

[PATCH v4 1/8] iommu/rockchip: Fix devm_{request,free}_irq parameter

2016-06-20 Thread Tomasz Figa
From: Simon Xue Even though the IOMMU shares IRQ with its master, the struct device passed to {request,free}_irq is supposed to represent the device that is signalling the interrupt. This patch makes the driver use IOMMU device instead of master's device to make things

[PATCH v4 5/5] ACPI 2.0 / AML: Fix module level execution by correctly parsing table as TermList

2016-06-20 Thread Lv Zheng
This experiment follows de-facto standard behavior, parsing entire table as a single TermList, so that all module level executions are possible during the table loading. If regressions are found against the enabling of this experimental fix, this patch is the only one that should get bisected

Re: [PATCH -v2 14/33] locking,m68k: Implement atomic_fetch_{add,sub,and,or,xor}()

2016-06-20 Thread Finn Thain
On Mon, 20 Jun 2016, Andreas Schwab wrote: > Peter Zijlstra writes: > > > Could either of you comment on the below patch? > > > > All atomic functions that return a value should imply full memory > > barrier semantics -- this very much includes a compiler barrier / > >

[PATCH v4 7/8] drm/rockchip: Use common IOMMU API to attach devices

2016-06-20 Thread Tomasz Figa
From: Shunqian Zheng Rockchip DRM used the arm special API, arm_iommu_*(), to attach iommu for ARM32 SoCs. This patch convert to common iommu API so it would support ARM64 like RK3399. Since previous patch added support for direct IOMMU address space management, there is

[PATCH v4 8/8] iommu/rockchip: Enable Rockchip IOMMU on ARM64

2016-06-20 Thread Tomasz Figa
From: Simon Xue This patch makes it possible to compile the rockchip-iommu driver on ARM64, so that it can be used with 64-bit SoCs equipped with this type of IOMMU. Signed-off-by: Simon Xue Signed-off-by: Shunqian Zheng

[PATCH v4 2/8] iommu/rockchip: Add map_sg callback for rk_iommu_ops

2016-06-20 Thread Tomasz Figa
From: Simon Xue The iommu_dma_alloc() in iommu/dma-iommu.c calls iommu_map_sg() that requires the callback iommu_ops .map_sg(). Adding the default_iommu_map_sg() to Rockchip IOMMU accordingly. Signed-off-by: Simon Xue Signed-off-by: Shunqian Zheng

Re: [PATCH] dt-bindings: ci-hdrc-usb2: s/gadget-itc-setting/itc-setting in example

2016-06-20 Thread Peter Chen
On Thu, Jun 16, 2016 at 04:13:18PM +0800, Jisheng Zhang wrote: > What the code expect is "itc-setting" rather than "gadget-itc-setting", > and this is also correctly described in the optional properties. > > Signed-off-by: Jisheng Zhang > --- >

[PATCH v4 5/8] iommu/rockchip: Prepare to support generic DMA mapping

2016-06-20 Thread Tomasz Figa
From: Shunqian Zheng Set geometry for allocated domains and fix .domain_alloc() callback to work with IOMMU_DOMAIN_DMA domain type, which is used for implicit domains on ARM64. Signed-off-by: Shunqian Zheng Signed-off-by: Tomasz Figa

[PATCH v4 6/8] drm/rockchip: Do not use DMA mapping API if attached to IOMMU domain

2016-06-20 Thread Tomasz Figa
The API is not suitable for subsystems consisting of multiple devices and requires severe hacks to use it. To mitigate this, this patch implements allocation and address space management locally by using helpers provided by DRM framework, like other DRM drivers do, e.g. Tegra. This patch should

[PATCH v4 3/8] iommu/rockchip: Fix allocation of bases array in driver probe

2016-06-20 Thread Tomasz Figa
From: Shunqian Zheng In .probe(), devm_kzalloc() is called with size == 0 and works only by luck, due to internal behavior of the allocator and the fact that the proper allocation size is small. Let's use proper value for calculating the size. Fixes: cd6438c5f844

[PATCH v4 0/8] iommu/rockchip: Fix bugs and enable on ARM64

2016-06-20 Thread Tomasz Figa
This series intends mostly to enable support for ARM64 architecture in the rockchip-iommu driver. On the way to do so, some bugs are also fixed. The most important changes here are: - making the Rockchip IOMMU driver use DMA API for managing cache coherency of page tables, - making the

[PATCH v4 0/5] ACPI 2.0: Enable TermList interpretion for table loading

2016-06-20 Thread Lv Zheng
MLC (module level code) is an ACPICA terminology describing the AML code out of any control method, currently only Type1Opcode (If/Else/While) wrapped MLC code blocks are executed by the AML interpreter after the table loading. But the issue which is fixed by this patchset is: Not only

[PATCH v4 2/5] ACPICA: Dispatcher: Fix an issue that the opregions created by the linked MLC were not tracked

2016-06-20 Thread Lv Zheng
Operation regions created by MLC were not tracked by acpi_check_address_range(), this patch fixes this issue. ACPICA BZ 1279. Fixed by Lv Zheng. Link: https://bugs.acpica.org/show_bug.cgi?id=1279 Signed-off-by: Lv Zheng --- drivers/acpi/acpica/dsopcode.c |6 ++ 1

[PATCH] drm/rockchip: Finish initialization before registering DRM device

2016-06-20 Thread Tomasz Figa
Currently the driver calls drm_dev_register() directly after allocating the DRM device and then continues with further initialization. This is incorrect, because drm_dev_register() is supposed to be called after all initialization is done. This problem was masked by the fact that

Re: [alsa-devel] [PATCH] ASoC: intel: fix build when ACPI is not enabled

2016-06-20 Thread Vinod Koul
On Mon, Jun 13, 2016 at 08:04:12AM -0700, Randy Dunlap wrote: > On 06/12/16 21:22, Vinod Koul wrote: > > On Thu, Jun 09, 2016 at 05:01:38PM -0700, Randy Dunlap wrote: > >> From: Randy Dunlap > >> > >> kconfig tools generate the following warning when CONFIG_ACPI is not > >>

[PATCH v20 04/20] perf, tools: Support CPU ID matching for Powerpc

2016-06-20 Thread Sukadev Bhattiprolu
Implement code that returns the generic CPU ID string for Powerpc. This will be used to identify the specific table of PMU events to parse/compare user specified events against. Signed-off-by: Sukadev Bhattiprolu Acked-by: Jiri Olsa ---

[PATCH v20 02/20] perf, tools, jevents: Program to convert JSON file to C style file

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen This is a modified version of an earlier patch by Andi Kleen. We expect architectures to describe the performance monitoring events for each CPU in a corresponding JSON file, which look like: [ { "EventCode": "0x00",

[PATCH v20 03/20] perf, tools: Use pmu_events table to create aliases

2016-06-20 Thread Sukadev Bhattiprolu
At run time (when 'perf' is starting up), locate the specific table of PMU events that corresponds to the current CPU. Using that table, create aliases for the each of the PMU events in the CPU. The use these aliases to parse the user specified perf event. In short this would allow the user to

[PATCH v20 00/20] perf, tools: Add support for PMU events in JSON format

2016-06-20 Thread Sukadev Bhattiprolu
CPUs support a large number of performance monitoring events (PMU events) and often these events are very specific to an architecture/model of the CPU. To use most of these PMU events with perf, we currently have to identify them by their raw codes: perf stat -e r100f2 sleep 1 This

[PATCH v20 07/20] perf, tools: Query terminal width and use in perf list

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen Automatically adapt the now wider and word wrapped perf list output to wider terminals. This requires querying the terminal before the auto pager takes over, and exporting this information from the pager subsystem. Signed-off-by: Andi Kleen

[PATCH v20 01/20] perf, tools: Add jsmn `jasmine' JSON parser

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen I need a JSON parser. This adds the simplest JSON parser I could find -- Serge Zaitsev's jsmn `jasmine' -- to the perf library. I merely converted it to (mostly) Linux style and added support for non 0 terminated input. The parser is quite straight forward

[PATCH v20 06/20] perf, tools: Support alias descriptions

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen Add support to print alias descriptions in perf list, which are taken from the generated event files. The sorting code is changed to put the events with descriptions at the end. The descriptions are printed as possibly multiple word wrapped lines. Example

[PATCH v20 05/20] perf, tools: Support CPU id matching for x86 v2

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen Implement the code to match CPU types to mapfile types for x86 based on CPUID. This extends an existing similar function, but changes it to use the x86 mapfile cpu description. This allows to resolve event lists generated by jevents. Signed-off-by: Andi

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