On Wed, 16 Aug 2017 21:34:06 +0200
Andreas Klinger wrote:
> Add support for triggered buffers.
>
> Data format is quite simple:
> distance 16 Bit
> alignment48 Bit
> timestamp64 Bit
>
> Signed-off-by: Andreas Klinger
One little improvement I noticed inline that an additional
Stanimir, please review this! I suspect that this is the wrong fix and
that the first v4l2_m2m_src_buf_remove_by_buf should be
v4l2_m2m_dst_buf_remove_by_buf instead.
Regards,
Hans
On 08/18/2017 01:12 AM, Gustavo A. R. Silva wrote:
> Refactor code in order to avoid identical code for dif
On 18/08/17 14:47, Ian Kent wrote:
> On 18/08/17 13:24, NeilBrown wrote:
>> On Thu, Aug 17 2017, Ian Kent wrote:
>>
>>> On 16/08/17 19:34, Jeff Layton wrote:
On Wed, 2017-08-16 at 12:43 +1000, NeilBrown wrote:
> On Mon, Aug 14 2017, Jeff Layton wrote:
>
>> On Mon, 2017-08-14 at 09:
When using MII/GMII/SGMII in the Altera SoC, the phy needs to be
wired through the FPGA. To ensure correct behavior, the appropriate
bit in the System Manager FPGA Interface Group register needs to be
set.
Signed-off-by: Stephan Gatzka
---
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 5
On Tue, Aug 8, 2017 at 8:35 PM, David Miller wrote:
> From: Joel Fernandes
> Date: Mon, 7 Aug 2017 18:20:49 -0700
>
>> On Mon, Aug 7, 2017 at 11:28 AM, David Miller wrote:
>>> The amount of hellish hacks we are adding to deal with this is getting
>>> way out of control.
>>
>> I agree with you th
Hi Michael,
On 18/08/2017 04:54, Michael S. Tsirkin wrote:
> On Thu, Aug 17, 2017 at 07:47:04PM +0200, Auger Eric wrote:
>> I will see with Peter and other potential users in the community whether
>> it is worth to pursue the efforts on upstreaming the QEMU vSMMUv3
>> device, considering the VFIO/V
On Thu, Aug 17, 2017 at 12:09:51PM -0700, Moritz Fischer wrote:
> On Sun, Jun 25, 2017 at 6:52 PM, Wu Hao wrote:
> > On Intel FPGA devices, the Accelerated Function Unit (AFU), can be
> > reprogrammed for different functions. It connects to the FPGA
> > infrastructure("blue bistream") via a Port.
On Thu, Aug 17, 2017 at 02:00:21PM -0500, Alan Tull wrote:
> On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao wrote:
>
> Hi Hao,
>
> Just a few minor things below. Otherwise, it's fine.
Hi Alan
Thanks a lot for the review. :)
>
> > On Intel FPGA devices, the Accelerated Function Unit (AFU), can be
>
On 18/08/17 13:24, NeilBrown wrote:
> On Thu, Aug 17 2017, Ian Kent wrote:
>
>> On 16/08/17 19:34, Jeff Layton wrote:
>>> On Wed, 2017-08-16 at 12:43 +1000, NeilBrown wrote:
On Mon, Aug 14 2017, Jeff Layton wrote:
> On Mon, 2017-08-14 at 09:36 +1000, NeilBrown wrote:
>> On Fri, A
From: Byungchul Park [mailto:byungchul.p...@lge.com]
> Change from v6
>-. add a comment about selection of fallback_cpu incase more than one
> exist
>-. modify a comment explaining what we do wrt PREFER_SIBLING
I could add supplementary comments, thank to Steven and Joel.
Thank you very m
On 18 August 2017 at 07:29, Sergey Senozhatsky
wrote:
> Hi Ard,
>
> On (08/18/17 07:12), Ard Biesheuvel wrote:
>> Hi Sergey,
>>
>> Thanks for taking a look
>>
>> On 18 August 2017 at 06:56, Sergey Senozhatsky
>> wrote:
>> > On (08/14/17 11:52), Ard Biesheuvel wrote:
>> >> This adds support for em
On Fri, Aug 18, 2017 at 2:23 PM, Icenowy Zheng wrote:
>
>
> 于 2017年8月18日 GMT+08:00 下午2:21:07, Chen-Yu Tsai 写到:
>>Hi,
>>
>>On Wed, Aug 9, 2017 at 4:56 PM, Icenowy Zheng wrote:
>>> When claiming SRAM, if the base is set to an error, it means that the
>>> SRAM controller has been probed, but failed
Hi Ard,
On (08/18/17 07:12), Ard Biesheuvel wrote:
> Hi Sergey,
>
> Thanks for taking a look
>
> On 18 August 2017 at 06:56, Sergey Senozhatsky
> wrote:
> > On (08/14/17 11:52), Ard Biesheuvel wrote:
> >> This adds support for emitting special sections such as initcall arrays,
> >> PCI fixups a
于 2017年8月18日 GMT+08:00 下午2:21:07, Chen-Yu Tsai 写到:
>Hi,
>
>On Wed, Aug 9, 2017 at 4:56 PM, Icenowy Zheng wrote:
>> When claiming SRAM, if the base is set to an error, it means that the
>> SRAM controller has been probed, but failed to remap the controller
>> memory zone. If the base is zero, th
Add the Cypress TrueTouch Generation 5 touchscreen device tree bindings
documentation. It can use I2C or SPI bus.
This touchscreen can handle some defined zone that are designed and
sent as button. To be able to customize the keycode sent, the
"linux,keycodes" property can be used.
Signed-off-by:
This is the basic driver for the Cypress TrueTouch Gen5 touchscreen
controllers. This driver supports only the I2C bus but it uses regmap
so SPI support could be added later.
The touchscreen can retrieve some defined zone that are handled as
buttons (according to the hardware). That is why it handl
Hi everyone,
Here is a V2 serie to add the driver of the touchscreen Cypress,
TrueTouch Generation 5.
Based on last linux-next tag (next-20170817), last commit bb70832dd42b.
This touchscreen is similar to Cypress generation 4 but the
registers are different.
This driver uses regmap as it is
From: Mao Wenan
The new flag PCI_DEV_FLAGS_NO_RELAXED_ORDERING has been added
to indicate that Relaxed Ordering Attributes (RO) should not
be used for Transaction Layer Packets (TLP) targeted toward
these affected Root Port, it will clear the bit4 in the PCIe
Device Control register, so the PCIe
The ixgbe driver use the compile check to determine if it can
send TLPs to Root Port with the Relaxed Ordering Attribute set,
this is too inconvenient, now the new flag PCI_DEV_FLAGS_NO_RELAXED_ORDERING
has been added to the kernel and we could check the bit4 in the PCIe
Device Control register to
The new flag PCI_DEV_FLAGS_NO_RELAXED_ORDERING has been added
to indicate that Relaxed Ordering Attributes (RO) should not
be used for Transaction Layer Packets (TLP) targeted toward
these affected Root Port, it will clear the bit4 in the PCIe
Device Control register, so the PCIe device drivers cou
Hi,
On Wed, Aug 9, 2017 at 4:56 PM, Icenowy Zheng wrote:
> When claiming SRAM, if the base is set to an error, it means that the
> SRAM controller has been probed, but failed to remap the controller
> memory zone. If the base is zero, thus the SRAM controller should be not
> probed at all, and it
On Mon, Aug 14, 2017 at 5:48 PM, Chen-Yu Tsai wrote:
> On Wed, Aug 9, 2017 at 4:56 PM, Icenowy Zheng wrote:
>> Allwinner A64's display engine claims the SRAM C section to work.
>>
>> Add support for the A64 SRAM controller and the SRAM C section of it.
>>
>> Signed-off-by: Icenowy Zheng
>
> Look
Hi Sergey,
Thanks for taking a look
On 18 August 2017 at 06:56, Sergey Senozhatsky
wrote:
> On (08/14/17 11:52), Ard Biesheuvel wrote:
>> This adds support for emitting special sections such as initcall arrays,
>> PCI fixups and tracepoints as relative references rather than absolute
>> referenc
On Thu, Aug 17, 2017 at 12:06 PM, Vinod Koul wrote:
> On Tue, Aug 01, 2017 at 04:07:53PM +0530, Anup Patel wrote:
>> The pending sba_request list can become very long in real-life usage
>> (e.g. setting up RAID array) which can cause sba_issue_pending() to
>> run for long duration.
>
> that raises
On Fri, Aug 18, 2017 at 02:04:20PM +0800, Coly Li wrote:
> On 2017/8/18 上午9:24, Byungchul Park wrote:
> > On Fri, Aug 11, 2017 at 01:42:23PM +0900, Byungchul Park wrote:
> >> Although llist provides proper APIs, they are not used. Make them used.
> >
> > Any opinions about this?
> >
>
> The patc
When cpudl_find() returns any among free_cpus, the cpu might not be
closer than others, considering sched domain. For example:
this_cpu: 15
free_cpus: 0, 1,..., 14 (== later_mask)
best_cpu: 0
topology:
0 --+
+--+
1 --+ |
+-- ... --+
2 --+ | |
On Fri, Aug 18, 2017 at 10:55 AM, Vinod Koul wrote:
> On Fri, Aug 18, 2017 at 10:26:54AM +0530, Anup Patel wrote:
>> On Thu, Aug 17, 2017 at 9:15 AM, Vinod Koul wrote:
>> > On Tue, Aug 01, 2017 at 04:07:47PM +0530, Anup Patel wrote:
>> >> This patch merges sba_request state and fence into common
It would be better to avoid pushing tasks to other cpu within
a SD_PREFER_SIBLING domain, instead, get more chances to check other
siblings.
Signed-off-by: Byungchul Park
---
kernel/sched/deadline.c | 55 ++---
1 file changed, 52 insertions(+), 3 delet
It would be better to avoid pushing tasks to other cpu within
a SD_PREFER_SIBLING domain, instead, get more chances to check other
siblings.
Signed-off-by: Byungchul Park
---
kernel/sched/rt.c | 56 ---
1 file changed, 53 insertions(+), 3 delet
On 08/17/2017 05:53 AM, Florian Eckert wrote:
Add the lantiq cpu temperature sensor support for xrx200.
Signed-off-by: Florian Eckert
---
drivers/hwmon/Kconfig | 8 +++
drivers/hwmon/Makefile | 1 +
drivers/hwmon/ltq-cputemp.c | 155 +++
On 2017/8/18 上午9:24, Byungchul Park wrote:
> On Fri, Aug 11, 2017 at 01:42:23PM +0900, Byungchul Park wrote:
>> Although llist provides proper APIs, they are not used. Make them used.
>
> Any opinions about this?
>
The patch is good. If Eric has no time, I will take care of it later.
Thanks.
C
On (08/14/17 11:52), Ard Biesheuvel wrote:
> This adds support for emitting special sections such as initcall arrays,
> PCI fixups and tracepoints as relative references rather than absolute
> references. This reduces the size by 50% on 64-bit architectures, but
> more importantly, it removes the n
Hello,
On 08/18/2017 08:43 AM, Takashi Sakamoto wrote:
On Aug 17 2017 19:05, Oleksandr Grytsov wrote:
So, from the above we think that period elapsed event derived in the
described
ways may not improve latency and will complicate the system. So, for
that
reason we are thinking of the option 2)
On 2017/8/18 13:04, Tantilov, Emil S wrote:
>> -Original Message-
>> From: Ding Tianhong [mailto:dingtianh...@huawei.com]
>> Sent: Thursday, August 17, 2017 5:39 PM
>> To: Tantilov, Emil S ; da...@davemloft.net;
>> Kirsher, Jeffrey T ; keesc...@chromium.org;
>> linux-kernel@vger.kernel.or
Tested-by: Karthik Tummala
---
Note:
- Patch was compile tested and built(ARCH=arm) on next-20170817.
- Patch was hardware tested on AM335x (McSPI controller) with
spi flash chips.
- Added spi aliases in aliases node, device tree and tested.
- No build/run-time issues reported.
- The commit:
&quo
On Aug 17 2017 19:05, Oleksandr Grytsov wrote:
So, from the above we think that period elapsed event derived in the described
ways may not improve latency and will complicate the system. So, for that
reason we are thinking of the option 2) (Positions of actual data transmission
in any serial soun
I was trying 4.13.0-rc5-00075-gac9a40905a61 on my PowerMac G4 with 1G
RAM and after some time of sddm respawning and X trying to restart,
dmesg is full of messages about vmap allocation failures.
Maybe the aty128fb is leaking ROM allocations or something like that?
sddm has been crashing eearli
On Thu, Aug 17, 2017 at 09:51:34PM -0700, Joel Fernandes (Google) wrote:
> On Thu, Aug 17, 2017 at 6:25 PM, Byungchul Park
> wrote:
> > On Mon, Aug 07, 2017 at 12:50:32PM +0900, Byungchul Park wrote:
> >> When cpudl_find() returns any among free_cpus, the cpu might not be
> >> closer than others,
On Thu, Aug 17, 2017 at 12:45:44PM +0200, Ingo Molnar wrote:
> > @@ -1164,9 +1164,6 @@ config LOCKDEP_CROSSRELEASE
> >
> > config LOCKDEP_COMPLETE
> > bool "Lock debugging: allow completions to use deadlock detector"
> > - depends on PROVE_LOCKING
> > - select LOCKDEP_CROSSRELEASE
> > -
On 07/21/2017 07:10 AM, Al Cooper wrote:
> Add a new USB Phy driver for Broadcom STB SoCs. This driver
> supports Broadcom STB ARM SoCs. This driver in
> combination with the Broadcom STB ohci, ehci and xhci
> drivers will enable USB1.1, USB2.0 and USB3.0 support.
> This Phy driver also supports
On Fri, Aug 18, 2017 at 10:56 AM, Vinod Koul wrote:
> On Fri, Aug 18, 2017 at 10:33:54AM +0530, Anup Patel wrote:
>> On Thu, Aug 17, 2017 at 1:31 PM, Vinod Koul wrote:
>> > On Tue, Aug 01, 2017 at 04:07:59PM +0530, Anup Patel wrote:
>> > why fail, debugfs should be an optional thingy, why would y
On Thu, Aug 17 2017, Ian Kent wrote:
> On 16/08/17 19:34, Jeff Layton wrote:
>> On Wed, 2017-08-16 at 12:43 +1000, NeilBrown wrote:
>>> On Mon, Aug 14 2017, Jeff Layton wrote:
>>>
On Mon, 2017-08-14 at 09:36 +1000, NeilBrown wrote:
> On Fri, Aug 11 2017, Jeff Layton wrote:
>
>> On
On Fri, Aug 18, 2017 at 10:33:54AM +0530, Anup Patel wrote:
> On Thu, Aug 17, 2017 at 1:31 PM, Vinod Koul wrote:
> > On Tue, Aug 01, 2017 at 04:07:59PM +0530, Anup Patel wrote:
> > why fail, debugfs should be an optional thingy, why would you want to fail
> > here?
>
> Yes, we are handling the c
This patch implements mux switch that triggers skipping to the
current CPU's events list at mulitplexing hrtimer interrupt
handler as well as adoption of the switch in the existing
implementation.
perf_event_groups_iterate_cpu() API is introduced to implement
iteration thru the certain CPU gro
On Fri, Aug 18, 2017 at 10:26:54AM +0530, Anup Patel wrote:
> On Thu, Aug 17, 2017 at 9:15 AM, Vinod Koul wrote:
> > On Tue, Aug 01, 2017 at 04:07:47PM +0530, Anup Patel wrote:
> >> This patch merges sba_request state and fence into common
> >> sba_request flags. Also, in-future we can extend sba_
From: Sahitya Tummala
Add support API which will check if power irq is expected to be
generated and wait for the power irq to come and complete if the irq is
expected.
Signed-off-by: Sahitya Tummala
Signed-off-by: Vijay Viswanath
---
drivers/mmc/host/sdhci-msm.c | 125
This patch moves event groups into rb tree sorted by CPU, so that
multiplexing hrtimer interrupt handler would be able skipping to the current
CPU's list and ignore groups allocated for the other CPUs.
New API for manipulating event groups in the trees is implemented as well
as adoption on the
Register writes which change voltage of IO lines or turn the IO bus
on/off require controller to be ready before progressing further. When
the controller is ready, it will generate a power irq which needs to be
handled. The thread which initiated the register write should wait for
power irq to comp
Enable CONFIG_MMC_SDHCI_IO_ACCESSORS so that SDHC controller specific
register read and write APIs, if registered, can be used.
Signed-off-by: Vijay Viswanath
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/de
From: Sahitya Tummala
There is a rare scenario in HW, where the first clear pulse could
be lost when the actual reset and clear/read of status register
are happening at the same time. Fix this by retrying upto 10 times
to ensure the status register gets cleared. Otherwise, this will
lead to a spu
Register writes which change voltage of IO lines or turn the IO bus on/off
require sdhc controller to be ready before progressing further. Once a
register write which affects IO lines is done, the driver should wait for
power irq from controller. Once the irq comes, the driver should acknowledge
th
From: Subhash Jadavani
SDCC controller reset (SW_RST) during probe may trigger power irq if
previous status of PWRCTL was either BUS_ON or IO_HIGH_V. So before we
enable the power irq interrupt in GIC (by registering the interrupt
handler), we need to ensure that any pending power irq interrupt s
Hi,
This patch set v7 moves event groups into rb trees and implements
skipping to the current CPU's list on hrtimer interrupt.
Events allocated for the same CPU are still kept in a linked list
of the event directly attached to the tree because it is unclear
how to implement fast iteration thru
On Thu, Aug 17, 2017 at 1:31 PM, Vinod Koul wrote:
> On Tue, Aug 01, 2017 at 04:07:59PM +0530, Anup Patel wrote:
>> This patch adds debugfs support to report stats via debugfs
>> which in-turn will help debug hang or error situations.
>>
>> Signed-off-by: Anup Patel
>> Reviewed-by: Ray Jui
>> Re
From: Stephen Hemminger
Date: Thu, 17 Aug 2017 17:42:05 -0700
> Please drop these functions, they do nothing and are not used
> as stubs in any operations table.
It might have been helpful to scan the entire series to understand
why it looks this way.
He's building the driver up, one piece at a
>-Original Message-
>From: Ding Tianhong [mailto:dingtianh...@huawei.com]
>Sent: Thursday, August 17, 2017 5:39 PM
>To: Tantilov, Emil S ; da...@davemloft.net;
>Kirsher, Jeffrey T ; keesc...@chromium.org;
>linux-kernel@vger.kernel.org; sparcli...@vger.kernel.org; intel-wired-
>l...@lists.os
From: Stephen Hemminger
Date: Thu, 17 Aug 2017 17:45:40 -0700
> On Thu, 17 Aug 2017 19:52:42 +0800
> Aviad Krawczyk wrote:
>
>> +nic_dev = (struct hinic_dev *)netdev_priv(netdev);
>
> Since netdev_priv() returns void *, a cast is not necessary here.
Agreed.
On Thu, Aug 17, 2017 at 12:08 PM, Vinod Koul wrote:
> On Tue, Aug 01, 2017 at 04:07:54PM +0530, Anup Patel wrote:
>> We should allocate DMA channel resources before registering the
>> DMA device in sba_probe() because we can get DMA request soon
>> after registering the DMA device. If DMA channel
On Thu, Aug 17, 2017 at 9:15 AM, Vinod Koul wrote:
> On Tue, Aug 01, 2017 at 04:07:47PM +0530, Anup Patel wrote:
>> This patch merges sba_request state and fence into common
>> sba_request flags. Also, in-future we can extend sba_request
>> flags as required.
>
> and it also changes the flag value
On Thu, Aug 17, 2017 at 9:14 AM, Vinod Koul wrote:
> On Tue, Aug 01, 2017 at 04:07:45PM +0530, Anup Patel wrote:
>> Make section comments consistent across the Broadcom SBA RAID driver
>> by avoiding " SBA " in some of the comments.
>
> and you add more comments..
OK, I will add this to commit de
On Thu, Aug 17, 2017 at 6:25 PM, Byungchul Park wrote:
> On Mon, Aug 07, 2017 at 12:50:32PM +0900, Byungchul Park wrote:
>> When cpudl_find() returns any among free_cpus, the cpu might not be
>> closer than others, considering sched domain. For example:
>>
>>this_cpu: 15
>>free_cpus: 0, 1,
On Thu, 2017-08-17 at 14:18 -0500, Brian King wrote:
> On 08/17/2017 10:32 AM, Bart Van Assche wrote:
> > On Wed, 2017-08-16 at 15:10 -0500, Brian King wrote:
> >> On 08/16/2017 01:15 PM, Bart Van Assche wrote:
> >>> On Wed, 2017-08-16 at 23:37 +0530, Abdul Haleem wrote:
> Linux-next booted wi
off-by: Thierry Reding
> ---
> This applies on top of and was tested on next-20170817.
>
> Michael, it'd be great if you could test this one again to clarify
> whether or not the fix that's already in Linus' tree is still needed, or
> whether it's indeed obsoleted by this patch.
This works fine for me, applied on top of Linus' tree (d33a2a914319).
cheers
When plugging Logitech C920 webcam, warning messages filled up dmesg:
[77117.655018] xhci_hcd :0c:00.0: WARN Successful completion on short TX:
needs XHCI_TRUST_TX_LENGTH quirk?
[77117.659018] xhci_hcd :0c:00.0: WARN Successful completion on short TX:
needs XHCI_TRUST_TX_LENGTH quirk?
[77
On 17-08-17, 17:31, Rafael J. Wysocki wrote:
> On Thursday, August 17, 2017 2:04:48 PM CEST Viresh Kumar wrote:
> > The callers already have the structure (struct update_util_data) where
> > the function pointer is saved by cpufreq_add_update_util_hook(). And its
> > better if the callers fill it t
For ARM64, the locality is handled by Trust Zone in FW.
The layout does not have crb_regs_head. It is hitting
the following line.
dev_warn(dev, FW_BUG "Bad ACPI memory layout");
Current code excludes CRB_FL_ACPI_START and when
CRB_FL_CRB_SMC_START is added around the same time
locality support is
When the user unbinds the last device of a group from a vfio bus
driver, the devices within that group should be available for other
purposes. We currently have a race that makes this generally, but
not always true. The device can be unbound from the vfio bus driver,
but remaining IOMMU context o
MT2701 shares the same driver with MT7623, but there is a slight difference
between their pin functions (e.g., PCIe), so we update the different parts
in pinmux table.
Doing so, SoC could choose the correct mux setting via their own pinfun.h.
Signed-off-by: Ryder Lee
CC: Biao Huang
---
drivers
This patch exports sdio src clock for dts reference.
Elaine Zhang (2):
clk: rockchip: add rk3228 sclk_sdio_src ID
clk: rockchip: rk3228: add SCLK_SDIO_SRC clk id
drivers/clk/rockchip/clk-rk3228.c | 2 +-
include/dt-bindings/clock/rk3228-cru.h | 1 +
2 files changed, 2 insertions(+), 1 d
This patch exports sdio src clock for dts reference.
Signed-off-by: Elaine Zhang
---
include/dt-bindings/clock/rk3228-cru.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/rk3228-cru.h
b/include/dt-bindings/clock/rk3228-cru.h
index 56f841c22801..55655ab0a4c4 100644
In some special circumstances, may be need to reparent clk for sclk_sdio_src.
Signed-off-by: Elaine Zhang
---
drivers/clk/rockchip/clk-rk3228.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3228.c
b/drivers/clk/rockchip/clk-rk3228.c
index bb405d9
From: Jérôme Glisse
This move all new code including new page migration helper behind
kernel Kconfig option so that there is no codee bloat for arch or
user that do not want to use HMM or any of its associated features.
arm allyesconfig (without all the patchset, then with and this patch):
te
On 2017/8/17 16:51, Wanpeng Li wrote:
2017-08-17 16:48 GMT+08:00 Yang Zhang :
On 2017/8/17 16:31, Wanpeng Li wrote:
2017-08-17 16:28 GMT+08:00 Wanpeng Li :
2017-08-17 16:07 GMT+08:00 Yang Zhang :
On 2017/8/17 0:56, Radim Krčmář wrote:
2017-08-16 17:10+0300, Michael S. Tsirkin:
On Wed
+ Jiri Kosina , linux-in...@vger.kernel.org
On Fri, Aug 18, 2017 at 2:35 AM, Dmitry Torokhov wrote:
> On Thu, Aug 17, 2017 at 1:45 AM, Wei-Ning Huang wrote:
>> Add Google hammer HID driver. This driver allow us to control hammer
>> keyboard backlights and support future features.
>>
>> Signed-of
space required before the open parenthesis, open brace should be
on previous line.
Signed-off-by: Xiangyang Zhang
---
drivers/staging/pi433/pi433_if.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/staging/pi433/pi433_if.c b/drivers/staging/pi433/pi43
On Thu, Aug 17, 2017 at 12:12:00PM -0700, Moritz Fischer wrote:
> Hi,
>
> On Sun, Jun 25, 2017 at 6:52 PM, Wu Hao wrote:
> > FPGA_GET_API_VERSION and FPGA_CHECK_EXTENSION ioctls are common ones which
> > need to be supported by all feature devices drivers including FME and AFU.
> > This patch imp
sorry, was at a conference/travelling and I'm slowly catching up.
On Fri, Aug 11, 2017 at 10:29:07AM +0200, Henrik Rydberg wrote:
> Hi Dmitry,
>
> > The meaning of confidence is literally "contact is too large to be a
> > finger", so it is not touch state, but really tool identity. We do
> > allo
On 8/15/17 12:34 PM, Edward Cree wrote:
State of a register doesn't matter if it wasn't read in reaching an exit;
a write screens off all reads downstream of it from all explored_states
upstream of it.
This allows us to prune many more branches; here are some processed insn
counts for some Cil
On 2017/8/17 22:36, Will Deacon wrote:
> Thunder, Nate, Robin,
>
> On Mon, Jun 26, 2017 at 09:38:45PM +0800, Zhen Lei wrote:
>> I described the optimization more detail in patch 1 and 2, and patch 3-5 are
>> the implementation on arm-smmu/arm-smmu-v3 of patch 2.
>>
>> Patch 1 is v2. In v1, I dir
Update description for newly added optional audio codecs.
Signed-off-by: Jeffy Chen
Acked-by: Rob Herring
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
Documentation/devicetree/bindings/sound/rockchip,rk3399-gru-sound.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Add support for optional dmic codec.
Signed-off-by: Jeffy Chen
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
sound/soc/rockchip/Kconfig| 1 +
sound/soc/rockchip/rk3399_gru_sound.c | 33 +
2 files changed, 34 insertions(+)
diff --g
Refactor rockchip_sound_probe, parse dai links from dts instead of
hard coding them.
Signed-off-by: Jeffy Chen
---
Changes in v4: None
Changes in v3:
Use compatible to match audio codecs
-- Suggested-by Matthias Kaehlcke
Changes in v2:
Let rockchip,codec-names be a required property, b
On Thu, Aug 17, 2017 at 12:55:37PM -0700, Moritz Fischer wrote:
> Hi Wu,
>
> looks good. Minor nits inline.
Hi Moritz,
Thanks for your comments. : )
>
> On Sun, Jun 25, 2017 at 6:52 PM, Wu Hao wrote:
> > This patch adds fpga bridge platform driver for Intel FPGA Management
> > Engine. It impl
Add support for optional cdn dp codec.
Signed-off-by: Jeffy Chen
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
sound/soc/rockchip/Kconfig| 1 +
sound/soc/rockchip/rk3399_gru_sound.c | 59 +--
2 files changed, 58 insertions(+), 2 de
Add rt5514 dsp of_node to codec list for Gru boards.
Signed-off-by: Jeffy Chen
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-
Currently the rt5514 i2c driver and rt5514 spi driver are using the same
compatible string.
Add additional unused compatible strings to identify them for Gru
boards.
Signed-off-by: Jeffy Chen
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm64/boot/dts/rockchip/rk3399-g
Currently we are using codec name for rt5514 dsp dai link, use codec
of_node instead.
Signed-off-by: Jeffy Chen
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
sound/soc/rockchip/rk3399_gru_sound.c | 34 ++
1 file changed, 2 insertions(+), 32 del
This property is no longer used.
Signed-off-by: Jeffy Chen
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
.../bindings/sound/rockchip,rk3399-gru-sound.txt | 7 ---
sound/soc/rockchip/rk3399_gru_sound.c | 14 --
2 files changed, 2
Currently we are using devm_snd_soc_register_component, which would
use legacy dai naming when dai drv id is zero.
Set a non-zero dai drv id to use dai drv name for dai name.
Signed-off-by: Jeffy Chen
---
Changes in v4:
Use non-zero drv id to avoid legacy dai naming instead of switching to
snd_
On Mon, 17 Jul 2017 19:48:22 -0500
Kim Phillips wrote:
> On Fri, 30 Jun 2017 15:02:41 +0100
> Mark Rutland wrote:
>
> > Hi Kim,
>
> Hi Mark,
>
> > On Wed, Jun 28, 2017 at 08:43:10PM -0500, Kim Phillips wrote:
>
> > > if (evlist) {
> > > evlist__for_each_entry(evlist, evsel) {
> >
Currently we are using a fixed list of dai links in the driver.
This serial of patches would let the driver parse dai links from
dts, so that we can make some of them optional for future boards.
Tested on my chromebook bob(with cros 4.4 kernel), it still works
after disabled rt5514 codecs in the
On Wed, 14 Jun 2017 16:16:11 +0100
David Howells wrote:
> Provide a way for the kernel to pass supplementary error messages to
> userspace. This will make it easier for userspace, particularly in
> containers to find out what went wrong during mounts and automounts, but is
> also made available
> From: Jorgen S. Hansen [mailto:jhan...@vmware.com]
> Sent: Thursday, August 17, 2017 08:17
> >
> > Putting aside nested virtualization, I want to load the transport (vmci,
> > Hyper-V, vsock) for which there is paravirtualized hardware present
> > inside the guest.
>
> Good points. Completely ag
On Fri, Aug 11, 2017 at 12:56:34PM -0400, Sinan Kaya wrote:
> Kernel is hiding Configuration Request Retry Status (CRS) inside
> pci_bus_read_dev_vendor_id() function. We are looking to add support for
> Function Level Reset (FLR) where vendor id read returns ~0.
>
> Move CRS handling into its own
Hi Abhisit,
On Fri, Aug 18, 2017 at 09:34:16AM +0700, Abhisit Sangjan wrote:
> Hi Jmondi,
>
> Thank you for your recommend, I am testing the code will be send the new
> patch in soon.
[snip]
> > > > +
> > > > +switch (mask)
> > > > +{
> > > > +case IIO_CHAN_INFO_RAW:
> >
On Thu, Aug 17, 2017 at 07:47:04PM +0200, Auger Eric wrote:
> I will see with Peter and other potential users in the community whether
> it is worth to pursue the efforts on upstreaming the QEMU vSMMUv3
> device, considering the VFIO/VHOST integration is made impossible.
I posted more ideas on fin
On Thu, Aug 17, 2017 at 05:34:25PM +0100, Will Deacon wrote:
> On Fri, Aug 11, 2017 at 03:45:28PM +0200, Eric Auger wrote:
> > When running a virtual SMMU on a guest we sometimes need to trap
> > all changes to the translation structures. This is especially useful
> > to integrate with VFIO. This p
Hi Mark,
On 08/18/2017 01:11 AM, Mark Brown wrote:
On Thu, Aug 17, 2017 at 12:44:09PM +0800, Jeffy Chen wrote:
Currently we are using devm_snd_soc_register_component, which would
use legacy dai name.
Switch to snd_soc_register_codec to use dai driver name.
This is the wrong direction to be
Hi Sandy,
[auto build test ERROR on robh/for-next]
[cannot apply to rockchip/for-next v4.13-rc5 next-20170817]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Sandy-Huang/Add-support-Rockchip
On Thu, Aug 17, 2017 at 11:26:56AM +0800, Wei Wang wrote:
> Add a new vq to report hints of guest free pages to the host.
>
> Signed-off-by: Wei Wang
> Signed-off-by: Liang Li
> ---
> drivers/virtio/virtio_balloon.c | 167
> +++-
> include/uapi/linux/virtio_
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