On Tue, Sep 19, 2017 at 03:45:59PM -0500, Brijesh Singh wrote:
> Create a Documentation entry to describe the AMD Secure Encrypted
> Virtualization (SEV) feature.
>
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: "H. Peter Anvin"
> Cc: Paolo Bonzini
> Cc: "Radim Krčmář"
> Cc: Jonathan Corbet
>
On 09/29/2017 12:01 PM, Michael S. Tsirkin wrote:
On Fri, Sep 08, 2017 at 07:09:24PM +0800, Wei Wang wrote:
On 09/08/2017 11:36 AM, Michael S. Tsirkin wrote:
On Tue, Aug 29, 2017 at 11:09:18AM +0800, Wei Wang wrote:
On 08/29/2017 02:03 AM, Michael S. Tsirkin wrote:
On Mon, Aug 28, 2017 at 06:
This driver provides interface to mmap the OCC sensor area
to userspace to parse and read OCC inband sensors.
Signed-off-by: Shilpasri G Bhat
---
- The skiboot patch for this is posted here:
https://lists.ozlabs.org/pipermail/skiboot/2017-September/009209.html
arch/powerpc/platforms/powernv/Mak
On Thu, 28 Sep 2017 09:25:41 +0200
Ingo Molnar wrote:
>
> * Masami Hiramatsu wrote:
>
> > Actually kprobes doesn't need to disable irq if it is
> > called from ftrace/jump trampoline code because
> > Documentation/kprobes.txt says
> >
> > -
> > Probe handlers are run with preemption disab
On 2017/8/28 21:13, Michal Hocko wrote:
> On Fri 25-08-17 18:34:33, Will Deacon wrote:
>> On Thu, Aug 24, 2017 at 10:32:26AM +0200, Michal Hocko wrote:
>>> It seems this has slipped through cracks. Let's CC arm64 guys
>>>
>>> On Tue 20-06-17 20:43:28, Zhen Lei wrote:
When I executed numactl
On Wed, Sep 27, 2017 at 10:13:12AM -0500, Brijesh Singh wrote:
> This part of Secure Encrypted Virtualization (SEV) series focuses on the
> changes required in a guest OS for SEV support.
...
> This series is based on tip/master commit : a35205980288 (Merge branch
> 'WIP.x86/fpu').
>
> Complete
Hi Dave,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.14-rc2]
[cannot apply to next-20170928]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Dave-Gerlach/Documentation
S);
yield_count = be32_to_cpu(lppaca_of(holder_cpu).yield_count);
if ((yield_count & 1) == 0)
return; /* virtual cpu is currently running */
rmb();
Machine Type: Power 8 PowerVM LPAR
kernel : 4.14.0-rc2-next-20170928
gcc: version 6.3.1
Test : DLPAR Memory
config
Dan Williams writes:
> In support of allowing device-mapper to compile out idle/dead code when
> there are no dax providers in the system, introduce the DAX_DRIVER
> symbol. This is selected by all leaf drivers that device-mapper might be
> layered on top. This allows device-mapper to conditional
On 2017/9/28 20:59, Leon Romanovsky wrote:
On Thu, Sep 28, 2017 at 07:56:59PM +0800, Wei Hu (Xavier) wrote:
On 2017/9/28 17:13, Leon Romanovsky wrote:
On Thu, Sep 28, 2017 at 12:57:28PM +0800, Wei Hu (Xavier) wrote:
From: Lijun Ou
When lp_qp_work is NULL, it should be returned ENOMEM. Thi
On Thu, 2017-09-28 at 11:36 +0200, Borislav Petkov wrote:
> On Wed, Sep 27, 2017 at 03:32:26PM -0700, Ricardo Neri wrote:
> >
> > The idea is that get_overridden_seg_reg() would implement the logic you
> > just described. It would return return INAT_SEG_REG_DEFAULT/IGNORE when
> > segment override
It needs to stat size of ino management cache with all type instead of
orphan ino type.
Fixes: 652be55162dc ("f2fs: show # of orphan inodes")
Signed-off-by: Chao Yu
---
fs/f2fs/debug.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/f2fs/debug.c b/fs/f2fs/debug.c
index 140
If we failed to issue flush in ->fsync, we need to keep FI_UPDATE_WRITE
flag to make sure triggering flush in next ->fsync.
Signed-off-by: Chao Yu
---
fs/f2fs/file.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
index 224379a9848c..18ca
When multiple device feature is enabled, during ->fsync we will issue
flush in all devices to make sure node/data of the file being persisted
into storage. But some flushes of device could be unneeded as file's
data may be not writebacked into those devices. So this patch adds and
manage bitmap per
If f2fs manages multiple devices, in checkpoint, we need to issue flush
in those devices which contain dirty data/node in their cache before
we write checkpoint region, otherwise, filesystem metadata could be
corrupted if hitting SPO after checkpoint.
Signed-off-by: Chao Yu
---
fs/f2fs/checkpoin
As Fan Li reported, there is no user traversing nid_list[ALLOC_NID_LIST]
which is used for tracking preallocated nids. Let's drop it, and only
track preallocated nids in free_nid_root radix-tree.
Reported-by: Fan Li
Signed-off-by: Chao Yu
---
fs/f2fs/debug.c| 8 ++---
fs/f2fs/f2fs.h |
From: "leilei.lin"
This fix updating cgroup time when event is being scheduled in
by descendants
Signed-off-by: leilei.lin
Reviewed-and-tested-by: Jiri Olsa
---
kernel/events/core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/events/core.c b/kernel/events/core.c
On Wed, Sep 27, 2017 at 10:13:28AM -0500, Brijesh Singh wrote:
> When SEV is active, guest memory is encrypted with a guest-specific key, a
> guest memory region shared with the hypervisor must be mapped as decrypted
> before we can share it.
>
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: "H. P
Hi all,
News: I will not be doing linux-next releases from Setp 30 to Oct 30
(inclusive).
Changes since 20170928:
The net-next tree gained a build failure, due to in interaction with the
net tree, for which I applied a merge fix patch.
The drm tree still had its build failure for which I
On 28-09-2017 18:35, Raj, Ashok wrote:
> Thanks for trying that Harsh.
>
> sp_off turns of super page support. Which this mode, do you still see offsets
> greater than 4k?
Yes, offset greater than 4k is still there. Refer below.
[56732.774872] offset 4110 len 76 dma addr 3a531200e dma len 76
[56
Currently, NVMe PCI host driver is programming CMB dma address as
I/O SQs addresses. This results in failures on systems where 1:1
outbound mapping is not used (example Broadcom iProc SOCs) because
CMB BAR will be progammed with PCI bus address but NVMe PCI EP will
try to access CMB using dma addre
On Fri, Sep 29, 2017 at 3:17 AM, Jens Axboe wrote:
> On 09/28/2017 11:44 PM, Linus Torvalds wrote:
>> On Thu, Sep 28, 2017 at 2:41 PM, Andrew Morton
>> wrote:
>>>
>>> test_and_set_bit()?
>>
>> If there aren't any atomicity concerns (either because of higher-level
>> locking, or because racing and
Issue: When the USB controller is configured as a USB device
mode, the device initiates low power when an ACK is pending for a
data packet (DP). When operating in SuperSpeed mode and when the
internal condition for low power (u1/u2) is satisfied, the device
initiates u1/u2 even though it has just r
Hello,
(Cc-ing Andrew
lkml.kernel.org/r/20170928120405.18273-1-sergey.senozhat...@gmail.com )
On (09/28/17 21:13), Sergey Senozhatsky wrote:
> (Cc-ing Sasha)
>
> On (09/28/17 21:04), Sergey Senozhatsky wrote:
> [..]
> > : process 9121 (trinity-c78) no longer affine to cpu8
> > : smpboot: CPU
Hi,
On 2017년 09월 29일 11:03, Yoshihiro Shimoda wrote:
> Hi,
>
>> From: Chanwoo Choi
>> Sent: Friday, September 29, 2017 9:02 AM
>>
> < snip >
>> drivers/phy/renesas/phy-rcar-gen3-usb2.c | 2 +-
> < snip >
>> drivers/usb/gadget/udc/renesas_usb3.c | 2 +-
>
> These two drivers need
Use BUG_ON(in_interrupt()) in zs_map_object(). This is not a
new BUG_ON(), it's always been there, but was recently changed
to VM_BUG_ON(). There are several problems there. First, we use
use per-CPU mappings both in zsmalloc and in zram, and interrupt
may easily corrupt those buffers. Second, and
Dell Wireless 5819/5818 devices are re-branded Sierra Wireless MC74
series which will by default boot with vid 0x413c and pid's 0x81cf,
0x81d0, 0x81d1,0x81d2.
Signed-off-by: Shrirang Bagul
---
drivers/usb/serial/qcserial.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/usb/seria
Replace instances of drm_framebuffer_reference/unreference() with
*_get/put() suffixes and drm_dev_unref with *_put() suffix
because get/put is shorter and consistent with the
kernel use of *_get/put suffixes.
Done with following coccinelle semantic patch
@@
expression ex;
@@
(
-drm_framebuff
On Fri, Sep 08, 2017 at 07:09:24PM +0800, Wei Wang wrote:
> On 09/08/2017 11:36 AM, Michael S. Tsirkin wrote:
> > On Tue, Aug 29, 2017 at 11:09:18AM +0800, Wei Wang wrote:
> > > On 08/29/2017 02:03 AM, Michael S. Tsirkin wrote:
> > > > On Mon, Aug 28, 2017 at 06:08:31PM +0800, Wei Wang wrote:
> > >
On Thu, Sep 28, 2017 at 8:32 PM, Kyle Sanderson wrote:
> Not sure if the stack is crap or not, but this looks like an RCU crash?
>
> https://i.imgur.com/sBnNe1p.jpg
Hmm. Not the clearest picture, and the "Code:" line in particular is
missing the interesting part, but at a guess it's taking a faul
The allocation size of dapm routes is wrong, correct it.
Fixes: d9f9c167edae ("ASoC: rockchip: Init dapm routes dynamically")
Signed-off-by: Jeffy Chen
---
sound/soc/rockchip/rk3399_gru_sound.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/sound/soc/rockchip/rk3399
Not sure if the stack is crap or not, but this looks like an RCU crash?
https://i.imgur.com/sBnNe1p.jpg
Kyle.
FileServer ~ # uname -a
Linux FileServer.OpenWRT.local 4.12.5-gentoo #1 SMP PREEMPT Fri Aug 18
17:23:00 PDT 2017 x86_64 Intel(R) Atom(TM) CPU 330 @ 1.60GHz
GenuineIntel GNU/Linux
FileSer
The bit offset used to check if DCDC5 and DCDC6 are tied together in
poly-phase output is wrong. It was checking against a reserved bit,
which is always false.
In reality, neither the reference design layout nor actually produced
boards tie these two buck regulators together. But we should still
f
The AXP81x family of PMIC is used with the Allwinner A83T and H8 SoCs.
This includes the AXP813 and AXP818. There is no discernible difference
except the labeling. The AXP813 is paired with the A83T, while the
AXP818 is paired with the H8.
This patch adds a dtsi file for all the common bindings fo
The AXP813 PMIC has 7 DC-DC buck regulators, 16 LDOs (including the
fixed RTC LDO and 2 GPIO LDOs), and 1 switchable. The drive-vbus
feature is also supported. All the hardware details are very similar
to the AXP803, with the following exceptions:
- Extra DCDC7 buck regulator, with the same rang
On Thu, Sep 28, 2017 at 6:53 PM, Mimi Zohar wrote:
>
> The locking issue isn't with validating the file hash, but with the
> setxattr, chmod, chown syscalls. Each of these syscalls takes the
> i_rwsem exclusively before IMA (or EVM) is called.
Read my email again.
> In setxattr, chmod, chown sy
Now that axp20x-regulator supports AXP813, we can add a cell for it
to enable it.
Signed-off-by: Chen-Yu Tsai
Tested-by: Maxime Ripard
---
drivers/mfd/axp20x.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
index 336de66ca408..2468b431bb22 1006
Hi everyone,
This series adds support for the X-Powers AXP813/818 [1] PMICs'
regulators. The series is quite straightforward. There are no compile
time dependencies between the driver patches, so each can go through
their respective (mfd and regulator) trees.
Patch 1 fixes a wrong bit offset for
This patch adds device nodes for all the regulators of the AXP818 PMIC.
References to the 3V dummy regulator are replaced, and it is disabled.
The 3.3V and 5V are also disabled.
Signed-off-by: Chen-Yu Tsai
---
.../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 126 -
1 file
This patch adds device nodes for all the regulators of the AXP813 PMIC.
References to the 3.3V dummy regulator are replaced, and it is disabled.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 134 ++-
1 file changed, 132 insertions(+), 2 de
This patch adds device nodes for all the regulators of the AXP818 PMIC.
References to the 3.3V dummy regulator are replaced, and it is disabled.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 150 ++-
1 file changed, 148 insertions(+), 2 de
If EC events occurred during BIOS S3-exit and early OS S3-exit steps can
be detected by OS earlier, then there can be less driver order issues
between acpi_ec_resume() and some other drivers' .resume() hook (e.x.
acpi_button_resume()).
However there are known facts that EC FW does drop EC events d
This patch tries to detect EC events earlier after resume, so that if an
event occurred before invoking acpi_ec_unblock_transactions(), it could be
detected by acpi_ec_unblock_transactions() which is the earliest EC driver
call after resume.
However after the noirq stage, if an event ocurred after
This patch adds a timer to poll EC events:
1. between acpi_ec_suspend() and acpi_ec_block_transactions(),
2. between acpi_ec_unblock_transactions() and acpi_ec_resume().
During these periods, if an EC event occurred, we have not mean to detect
it. Thus the events occurred in late S3-entry could be
This patch enables noirq stage event detection for the EC driver.
EC is a very special driver, required to detecting events throughout the
entire suspend/resume process. Thus this patch enables event detection for
EC during noirq stages to meet this requirement. This is done by making
sure that th
CC LKML. Sorry it's a site level power down during the 10.1 holidays. :(
On Fri, Sep 29, 2017 at 10:12:20AM +0800, Philip Li wrote:
Hi all, this is Philip who maintains the 0-Day kernel test service. Thanks for
subscribing to 0-Day kernel testing. We will have lab power down from Oct 1
to Oct 5,
Thanks, I will look into it.
Xiang Gao
2017-09-28 4:06 GMT-04:00 kernel test robot :
>
> FYI, we noticed the following commit:
>
> commit: 31e9170bdeb6ebe66426337b4e2b9924683a412b ("mac80211: aead api to
> reduce redundancy")
> url:
> https://github.com/0day-ci/linux/commits/Xiang-Gao/mac80211-
Hi Steven, Peter,
I'm planning to make the following changes for the next rev, could you
let me know if you're Ok with it?
1. Drop the stop_critical_timings changes - previous patch was
generating the preempt_enable/disable events but they aren't "real"
events. Instead since we already have cpuid
Hi all, this is Philip who maintains the 0-Day kernel test service. Thanks for
subscribing to 0-Day kernel testing. We will have lab power down from Oct 1
to Oct 5, so that the service will be shut down from Asia Pacific Time Sep 30
3PM
and will recover from Oct 6 as soon as we can. Sorry for any
Le 09/28/17 à 18:36, Stephen Rothwell a écrit :
> Hi all,
>
> After merging the net-next tree, today's linux-next build (arm
> multi_v7_defconfig) failed like this:
>
> net/dsa/slave.c: In function 'dsa_slave_create':
> net/dsa/slave.c:1191:18: error: 'struct dsa_slave_priv' has no member named
On 2017/9/28 21:50, Leon Romanovsky wrote:
On Thu, Sep 28, 2017 at 12:57:27PM +0800, Wei Hu (Xavier) wrote:
From: Lijun Ou
It mainly places the lines for checking send doorbell status
into a special functions. As a result, we can directly call it in
check_qp_db_process_status function and ke
On Tue, Sep 12, 2017 at 06:48:20PM -0500, Derald D. Woods wrote:
> This patch set allows TMDSEVM3530(omap3-evm.dts) to boot using common
> processor module data that is shared with 'omap3-evm-37xx.dts'. A new
> common file for processor module data is introduced to help facilitate
> the updated OMA
Hi,
> From: Chanwoo Choi
> Sent: Friday, September 29, 2017 9:02 AM
>
< snip >
> drivers/phy/renesas/phy-rcar-gen3-usb2.c | 2 +-
< snip >
> drivers/usb/gadget/udc/renesas_usb3.c | 2 +-
These two drivers need the modification.
But...
< snip >
> diff --git a/drivers/usb/renesas
On Wed, 2017-09-27 at 09:18 +0800, Chaotian Jing wrote:
> On Wed, 2017-09-27 at 00:33 +0200, Ulf Hansson wrote:
> > On 14 September 2017 at 04:10, Chaotian Jing
> > wrote:
> > > On Wed, 2017-09-13 at 09:10 -0500, Rob Herring wrote:
> > >> On Tue, Sep 12, 2017 at 05:07:41PM +0800, Chaotian Jing wr
On Thu, 2017-09-28 at 17:33 -0700, Linus Torvalds wrote:
> On Thu, Sep 28, 2017 at 5:12 PM, Mimi Zohar wrote:
> >
> > Originally IMA did define it's own lock, prior to IMA-appraisal. IMA-
> > appraisal introduced writing the file hash as an xattr, which required
> > taking the i_mutex. process_m
On 2017年09月29日 05:29, Andrew Morton wrote:
> On Thu, 28 Sep 2017 14:11:41 +0800 Kemi Wang wrote:
>
>> This is the second step which introduces a tunable interface that allow
>> numa stats configurable for optimizing zone_statistics(), as suggested by
>> Dave Hansen and Ying Huang.
>
> Looks OK
On Thu, Sep 28, 2017 at 04:53:09PM -0700, Linus Torvalds wrote:
> On Thu, Sep 28, 2017 at 2:58 PM, Josh Poimboeuf wrote:
> >
> > Reported-by: kernel test robot
> > Fixes: f5caf621ee35 ("x86/asm: Fix inline asm call constraints for Clang")
> > Signed-off-by: Josh Poimboeuf
>
> Side note: it's no
Hi all,
After merging the net-next tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
net/dsa/slave.c: In function 'dsa_slave_create':
net/dsa/slave.c:1191:18: error: 'struct dsa_slave_priv' has no member named
'phy'
phy_disconnect(p->phy);
^
Caused by
From: Wanpeng Li
[ cut here ]
WARNING: CPU: 4 PID: 5280 at /home/kernel/linux/arch/x86/kvm//vmx.c:11394
nested_vmx_vmexit+0xc2b/0xd70 [kvm_intel]
CPU: 4 PID: 5280 Comm: qemu-system-x86 Tainted: GW OE 4.13.0+ #17
RIP: 0010:nested_vmx_vmexit+0xc2b/0xd70 [kvm_i
On Thu, Sep 28, 2017 at 06:03:57PM +0200, Sebastian Andrzej Siewior wrote:
> On 2017-09-22 11:46:10 [-0700], Paul E. McKenney wrote:
> > On Fri, Sep 22, 2017 at 05:28:05PM +0200, Sebastian Andrzej Siewior wrote:
> > > On RT we can't invoke queue_delayed_work() within an atomic section
> > > (which
On Thu, Sep 28, 2017 at 06:02:08PM +0200, Sebastian Andrzej Siewior wrote:
> On 2017-09-22 11:43:14 [-0700], Paul E. McKenney wrote:
> > On Fri, Sep 22, 2017 at 05:28:04PM +0200, Sebastian Andrzej Siewior wrote:
> > > The current check via srcu_online is slightly racy because after looking
> > > at
From: Wanpeng Li
PLE_Window: Software can configure this field as an upper bound on the amount
of time
a guest is allowed to execute in a PAUSE LOOP.
KVM doesn't expose the PLE capability to the L1 hypervisor, however, ple_window
still
shows the default value on L1 hypervisor. This patch fixes
From: Wanpeng Li
If we take TSC-deadline mode timer out of the picture, the Intel SDM
does not say that the timer is disable when the timer mode is change,
either from one-shot to periodic or vice versa.
After this patch, the timer is no longer disarmed on change of mode, so
the counter (TMCCT)
From: Wanpeng Li
Vectors 0-15 are reserved, and a physical LAPIC - upon sending or
receiving one - would generate an APIC error instead of doing the
requested action. Make our emulation behave similarly.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/lapic.c |
From: Wanpeng Li
The description in the Intel SDM of how the divide configuration
register is used: "The APIC timer frequency will be the processor's bus
clock or core crystal clock frequency divided by the value specified in
the divide configuration register."
Observation of baremetal shown tha
From: Wanpeng Li
SDM 10.5.4.1 TSC-Deadline Mode mentioned that "Transitioning between
TSC-Deadline
mode and other timer modes also disarms the timer". So the APIC Timer Initial
Count
Register for one-shot/periodic mode should be reset. This patch do it.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Sig
The issue is reported in xen community.
Anthony PERARD pointed out:
https://www.mail-archive.com/xen-devel@lists.xen.org/msg117283.html#
| When developing PVH for OVMF, I've used the lapic timer. It turns out that
the
| way it is used by OVMF did not work with Xen [1]. I tried to find out how
On Fri, Sep 29, 2017 at 07:59:09AM +1300, Michael Cree wrote:
> On Thu, Sep 28, 2017 at 08:43:54AM -0700, Paul E. McKenney wrote:
> > On Thu, Sep 28, 2017 at 09:45:35AM +0100, Will Deacon wrote:
> > > On Thu, Sep 28, 2017 at 10:38:01AM +0200, Peter Zijlstra wrote:
> > > > On Wed, Sep 27, 2017 at 04
On Thu, Sep 28, 2017 at 09:04:11PM +0300, Volodymyr Babchuk wrote:
> From: Volodymyr Babchuk
>
> Now, when struct tee_shm is defined in public header,
> we can inline small getter functions.
struct tee_shm is moved to public header in first patch of series,
so you can put tee_shm_is_registered()
Not all consoles are created equal: depending on the actual hardware,
the latency of a printk() call can vary dramatically. The worst examples
are serial consoles, where it can spin for tens of milliseconds banging
the UART to emit a message, which can cause application-level problems
when the kern
This extends the "console=" interface to allow setting the per-console
loglevel by adding "/N" to the string, where N is the desired loglevel
expressed as a base 10 integer. Invalid values are silently ignored.
Cc: Petr Mladek
Cc: Steven Rostedt
Cc: Sergey Senozhatsky
Signed-off-by: Calvin Owen
This adds a new sysfs interface that contains a directory for each
console registered on the system. Each directory contains a single
"loglevel" file for reading and setting the per-console loglevel.
We can let kobject destruction race with console removal: if it does,
loglevel_{show,store}() will
On Fri, 2017-09-29 at 01:35 +0530, Gargi Sharma wrote:
> On Thu, Sep 28, 2017 at 3:46 PM, Rik van Riel
> wrote:
> > On Fri, 2017-09-29 at 01:09 +0530, Gargi Sharma wrote:
> >
> > > 1000 processes that just sleep and sit around without doing
> > > anything(100 second sleep and then exit).
> >
> >
On Thu, Sep 28, 2017 at 5:12 PM, Mimi Zohar wrote:
>
> Originally IMA did define it's own lock, prior to IMA-appraisal. IMA-
> appraisal introduced writing the file hash as an xattr, which required
> taking the i_mutex. process_measurement() and ima_file_free() took
> the iint->mutex first and t
On Thu, Sep 28, 2017 at 09:04:03PM +0300, Volodymyr Babchuk wrote:
> From: Volodymyr Babchuk
>
> These functions will be used to pass information about shared
> buffers to OP-TEE.
>
> Signed-off-by: Volodymyr Babchuk
> ---
> drivers/tee/optee/call.c | 48
> +++
On 09/28/2017 11:44 PM, Linus Torvalds wrote:
> On Thu, Sep 28, 2017 at 2:41 PM, Andrew Morton
> wrote:
>>
>> test_and_set_bit()?
>
> If there aren't any atomicity concerns (either because of higher-level
> locking, or because racing and having two people set the bit is fine),
> it can be better
On Thu, 2017-09-28 at 16:39 -0700, Linus Torvalds wrote:
> On Thu, Sep 28, 2017 at 3:02 PM, Dave Chinner wrote:
> > On Thu, Sep 28, 2017 at 08:39:33AM -0400, Mimi Zohar wrote:
> >> Don't attempt to take the i_rwsem, if it has already been taken
> >> exclusively.
> >>
> >> Signed-off-by: Mimi Zoha
On 09/28/2017 11:41 PM, Andrew Morton wrote:
> On Wed, 27 Sep 2017 14:13:57 -0600 Jens Axboe wrote:
>
>> When someone calls wakeup_flusher_threads() or
>> wakeup_flusher_threads_bdi(), they schedule writeback of all dirty
>> pages in the system (or on that bdi). If we are tight on memory, we
>> c
The extcon has two type of extcon devices as following.
- 'extcon provider deivce' adds new extcon device and detect the
state/properties of external connector. Also, it notifies the
state/properties to the extcon consumer device.
- 'extcon consumer device' gets the change state/properties
Grant,
On Thu, Sep 28, 2017 at 11:35 AM, Grant Grundler wrote:
> This linksys dongle by default comes up in cdc_ether mode.
> This patch allows r8152 to claim the device:
>Bus 002 Device 002: ID 13b1:0041 Linksys
>
> Signed-off-by: Grant Grundler
> ---
> drivers/net/usb/cdc_ether.c | 10 +++
On Thu, 28 Sep 2017, Sinan Kaya wrote:
On 9/27/2017 5:42 PM, Govindarajulu Varadarajan wrote:
+void __pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
+ void *userdata);
pci_walk_bus_locked would be a better name as you are assuming that caller is
holdi
On Thu, Sep 28, 2017 at 2:58 PM, Josh Poimboeuf wrote:
>
> Reported-by: kernel test robot
> Fixes: f5caf621ee35 ("x86/asm: Fix inline asm call constraints for Clang")
> Signed-off-by: Josh Poimboeuf
Side note: it's not like I personally need the credit, but in general
I really want people to pi
Hi,
On Thu, Sep 28, 2017 at 3:28 PM, Rustad, Mark D wrote:
>
>> On Sep 27, 2017, at 9:39 AM, Grant Grundler wrote:
>>
>> On Wed, Sep 27, 2017 at 12:15 AM, Oliver Neukum wrote:
>>> Am Dienstag, den 26.09.2017, 08:19 -0700 schrieb Doug Anderson:
I know that for at least some of the adap
On Thu, 28 Sep 2017, Peter Zijlstra wrote:
On Wed, Sep 27, 2017 at 02:42:20PM -0700, Govindarajulu Varadarajan wrote:
Make MAX_LOCK_DEPTH configurable. It is set to 48 right now. Number of
VFs under a PCI pf bus can exceed 48 and this disables lockdep.
lockdep currently allows max of 63 held_l
On 9/28/2017 3:29 PM, Lori Hikichi wrote:
> The SPDIF port cannot modify its format so a set_fmt function is not
> needed. Previously, we used a generic set_fmt for all ports and returned
> an error code for the SPDIF port. It is cleaner to not populate the
> set_fmt field.
>
> Signed-off-by: Lor
On Thu, 28 Sep 2017, Sinan Kaya wrote:
On 9/27/2017 5:42 PM, Govindarajulu Varadarajan wrote:
CPU0CPU1
-
__driver_attach()
device_lock(&dev->mutex) <--- device mutex lock here
driver_probe_de
On Thu, Sep 28, 2017 at 3:02 PM, Dave Chinner wrote:
> On Thu, Sep 28, 2017 at 08:39:33AM -0400, Mimi Zohar wrote:
>> Don't attempt to take the i_rwsem, if it has already been taken
>> exclusively.
>>
>> Signed-off-by: Mimi Zohar
>
> That's bloody awful.
>
> The locking in filesystem IO paths is
On Thu, Sep 28, 2017 at 1:14 AM, Oleksandr Natalenko
wrote:
> Hi.
>
> Won't tell about panic in tcp_sacktag_walk() since I cannot trigger it
> intentionally, but setting net.ipv4.tcp_retrans_collapse to 0 *does not* fix
> warning in tcp_fastretrans_alert() for me.
Hi Oleksandr: no retrans_collaps
Hi Andrew,
Commit
0be0a6eba9e3 ("z3fold: fix stale list handling")
has missing Signed-off-by misspelt for its author.
--
Cheers,
Stephen Rothwell
Hi George,
On 9/19/2017 11:24 PM, George Cherian wrote:
> Based on ACPI 6.2 Section 8.4.7.1.9 If the PCC register space is used,
> all PCC registers, for all processors in the same performance
> domain (as defined by _PSD), must be defined to be in the same subspace.
> Based on Section 14.1 of ACP
Hi all,
This patch series adds basic (boot to prompt with essential peripherals
working) support for Broadcom's Hurricane 2 SoC which is found in switching
applications.
This is also an iProc-family chip with a number of variations, including
some in the clock controller that I have not been able
This patch remove the extra compatibility string "st,stm32-usart" from
driver & device tree.
Signed-off-by: Vikas Manocha
Reviewed-by: Patrice Chotard
---
arch/arm/boot/dts/stm32f429.dtsi | 12 ++--
arch/arm/boot/dts/stm32f746.dtsi | 12 ++--
arch/arm/boot/dts/stm32h743.dtsi |
Add binding documentation for the Broadcom Hurricane 2 SoCs used in
switching control planes.
Acked-by: Jon Mason
Signed-off-by: Florian Fainelli
---
Documentation/devicetree/bindings/arm/bcm/brcm,hr2.txt | 14 ++
1 file changed, 14 insertions(+)
create mode 100644 Documentation/de
Describe the Broadcom Hurricane 2 SoC comprised of a Cortex-A9 CPU
complex along with standard iProc peripherals:
* timers
* SPI controller
* NAND controller
* a single AMAC (Ethernet MAC controller)
* dual PCIe controllers
The design is largely similar to existing iProc-based SoCs such as
Norths
With this change, stm32h743 will use its own uart configuration.
Major difference between stm32f7 & stm32h7 uart configuration is FIFO
availability in stm32h7.
Signed-off-by: Vikas Manocha
Reviewed-by: Patrice Chotard
---
arch/arm/boot/dts/stm32h743.dtsi | 4 ++--
1 file changed, 2 insertions(+
This patch removes the extra compatibility string "st,stm32-usart" to
avoid confusion, save some time & space.
Signed-off-by: Vikas Manocha
Reviewed-by: Patrice Chotard
---
Documentation/devicetree/bindings/dma/stm32-dma.txt | 2 +-
Documentation/devicetree/bindings/serial/st,stm32-usa
Add support for the Broadcom Hurricane 2 SoC clock controller. We can
re-use the existing iProc clock library since the SoC's architecture is
largely the same as its predecessors. For now, we just initialize the
iProc ARM PLL.
Acked-by: Jon Mason
Signed-off-by: Florian Fainelli
---
drivers/clk/
stm32 uart driver is using two compatible strings "st,stm32-usart"
& "st,stm32-uart". One can be removed safely to save some space & time.
Vikas Manocha (3):
Arm: dts: stm32: remove extra compatible string for uart
Arm: dts: stm32: remove extra compatible string from DT & driver
ARM: dts: st
Add a Device Tree binding document for the Broadcom Hurricane 2 SoC
which is an iProc based system.
Acked-by: Jon Mason
Signed-off-by: Florian Fainelli
---
.../devicetree/bindings/clock/brcm,iproc-clocks.txt| 14 ++
1 file changed, 14 insertions(+)
diff --git a/Documentatio
Broadcom Hurricane 2 SoCs typically use their secondary UART for
debug/console, provide a known good location for that.
Acked-by: Jon Mason
Signed-off-by: Florian Fainelli
---
arch/arm/Kconfig.debug | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig.d
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