Masahiro Yamada (2):
mmc: renesas_sdhi: consilidate DMAC CONFIG options
mmc: renesas_shci: remove wrong depends on to enable compile test
drivers/mmc/host/Kconfig | 5 ++---
drivers/mmc/host/Makefile | 8 ++--
2 files changed, 4 insertions(+), 9 deletions(-)
--
2.7.4
Masahiro Yamada (2):
mmc: renesas_sdhi: consilidate DMAC CONFIG options
mmc: renesas_shci: remove wrong depends on to enable compile test
drivers/mmc/host/Kconfig | 5 ++---
drivers/mmc/host/Makefile | 8 ++--
2 files changed, 4 insertions(+), 9 deletions(-)
--
2.7.4
ARCH_RENESAS is a stronger condition than (ARM || ARM64).
If ARCH_RENESAS is enabled, (ARM || ARM64) is met as well.
What is worse, the first depends on line prevents COMPILE_TEST from
enabling this driver. It should be removed.
Signed-off-by: Masahiro Yamada
---
The description in the Makefile is odd. Fix the CONFIG selection
in a cleaner way.
Signed-off-by: Masahiro Yamada
---
drivers/mmc/host/Kconfig | 4 ++--
drivers/mmc/host/Makefile | 8 ++--
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git
ARCH_RENESAS is a stronger condition than (ARM || ARM64).
If ARCH_RENESAS is enabled, (ARM || ARM64) is met as well.
What is worse, the first depends on line prevents COMPILE_TEST from
enabling this driver. It should be removed.
Signed-off-by: Masahiro Yamada
---
drivers/mmc/host/Kconfig | 1
The description in the Makefile is odd. Fix the CONFIG selection
in a cleaner way.
Signed-off-by: Masahiro Yamada
---
drivers/mmc/host/Kconfig | 4 ++--
drivers/mmc/host/Makefile | 8 ++--
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/host/Kconfig
On Mon, Nov 06, 2017 at 04:13:37PM -0600, Rob Herring wrote:
> On Fri, Nov 03, 2017 at 03:25:05PM +0800, Kaihua Zhong wrote:
> > From: Leo Yan
> >
> > Document the DT binding for stub clock which is used for CPU,
> > GPU and DDR frequency scaling.
> >
> > Signed-off-by: Leo
On Mon, Nov 06, 2017 at 04:13:37PM -0600, Rob Herring wrote:
> On Fri, Nov 03, 2017 at 03:25:05PM +0800, Kaihua Zhong wrote:
> > From: Leo Yan
> >
> > Document the DT binding for stub clock which is used for CPU,
> > GPU and DDR frequency scaling.
> >
> > Signed-off-by: Leo Yan
> > ---
> >
On Tue 07-11-17 00:54:32, Will Deacon wrote:
> On Mon, Nov 06, 2017 at 01:27:26PM +0100, Michal Hocko wrote:
> > On Mon 06-11-17 09:52:51, Michal Hocko wrote:
> > > On Mon 06-11-17 15:04:40, Bob Liu wrote:
> > > > On Mon, Nov 6, 2017 at 11:36 AM, Wang Nan wrote:
> > > > >
On Tue 07-11-17 00:54:32, Will Deacon wrote:
> On Mon, Nov 06, 2017 at 01:27:26PM +0100, Michal Hocko wrote:
> > On Mon 06-11-17 09:52:51, Michal Hocko wrote:
> > > On Mon 06-11-17 15:04:40, Bob Liu wrote:
> > > > On Mon, Nov 6, 2017 at 11:36 AM, Wang Nan wrote:
> > > > > tlb_gather_mmu(, mm, 0,
Hello Chris,
On 11/07/2017 04:49 AM, Chris Zhong wrote:
> The ethernet phy of rk3066a-rayeager has a reset pin, it controlled by
> GPIO1_D6, this pin should be pull down then pull up to reset the phy.
> Add a phy-reset property in emac, make the phy can be reset when emac
> power on.
for PHY
Hello Chris,
On 11/07/2017 04:49 AM, Chris Zhong wrote:
> The ethernet phy of rk3066a-rayeager has a reset pin, it controlled by
> GPIO1_D6, this pin should be pull down then pull up to reset the phy.
> Add a phy-reset property in emac, make the phy can be reset when emac
> power on.
for PHY
On Tue 07-11-17 07:30:05, Jaewon Kim wrote:
> I wonder if you want me to split and resend the 2 patches, or if you
> will use this mail thread for the further discussion.
Please resend
--
Michal Hocko
SUSE Labs
On Tue 07-11-17 07:30:05, Jaewon Kim wrote:
> I wonder if you want me to split and resend the 2 patches, or if you
> will use this mail thread for the further discussion.
Please resend
--
Michal Hocko
SUSE Labs
On 11/07/2017 07:04 AM, Tim Harvey wrote:
> On Fri, Oct 20, 2017 at 7:00 AM, Tim Harvey wrote:
>> On Thu, Oct 19, 2017 at 12:39 AM, Hans Verkuil wrote:
>>
Regarding video standard detection where this chip provides me with
On 11/07/2017 07:04 AM, Tim Harvey wrote:
> On Fri, Oct 20, 2017 at 7:00 AM, Tim Harvey wrote:
>> On Thu, Oct 19, 2017 at 12:39 AM, Hans Verkuil wrote:
>>
Regarding video standard detection where this chip provides me with
vertical-period, horizontal-period, and
ATCPIT100 is often used on the Andes architecture,
This timer provide 4 PIT channels. Each PIT channel is a
multi-function timer, can be configured as 32,16,8 bit timers
or PWM as well.
For system timer it will set 32-bit timer0 as clock source
and count downwards until underflow and restart
ATCPIT100 is often used on the Andes architecture,
This timer provide 4 PIT channels. Each PIT channel is a
multi-function timer, can be configured as 32,16,8 bit timers
or PWM as well.
For system timer it will set 32-bit timer0 as clock source
and count downwards until underflow and restart
Add CLKSRC_ATCPIT100 for Andestech atcpit100 timer selection.
It often be used in Andestech AE3XX platform.
Signed-off-by: Rick Chen
Signed-off-by: Greentime Hu
---
drivers/clocksource/Kconfig | 6 ++
drivers/clocksource/Makefile | 1 +
2 files
Add a document to describe Andestech atcpit100 timer and
binding information.
Signed-off-by: Rick Chen
Acked-by: Rob Herring
Signed-off-by: Greentime Hu
---
.../bindings/timer/andestech,atcpit100-timer.txt | 31
Add CLKSRC_ATCPIT100 for Andestech atcpit100 timer selection.
It often be used in Andestech AE3XX platform.
Signed-off-by: Rick Chen
Signed-off-by: Greentime Hu
---
drivers/clocksource/Kconfig | 6 ++
drivers/clocksource/Makefile | 1 +
2 files changed, 7 insertions(+)
diff --git
Add a document to describe Andestech atcpit100 timer and
binding information.
Signed-off-by: Rick Chen
Acked-by: Rob Herring
Signed-off-by: Greentime Hu
---
.../bindings/timer/andestech,atcpit100-timer.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644
*** Fix warnings when make with ARCH=x86_64 from auto build test ***
rick (3):
clocksource/drivers/atcpit100: Add andestech atcpit100 timer
clocksource/drivers/Kconfig: Support andestech atcpit100 timer
dt-bindings: timer: Add andestech atcpit100 timer binding doc
*** Fix warnings when make with ARCH=x86_64 from auto build test ***
rick (3):
clocksource/drivers/atcpit100: Add andestech atcpit100 timer
clocksource/drivers/Kconfig: Support andestech atcpit100 timer
dt-bindings: timer: Add andestech atcpit100 timer binding doc
This patch adds entries in dts to enable USB 3.0 PHY driver.
Signed-off-by: Sriram Dash
Signed-off-by: Ran Wang
---
Change in v2:
- Rename node name from 'usb3-phy' to 'usb-phy'
- Adjust phy node position
Adds qoriq usb 3.0 phy driver to implement erratum related workaround
for qoriq SoC.
Signed-off-by: Sriram Dash
Signed-off-by: Ran Wang
---
Change in v2:
- Replace funciont __raw_writel() by iowrite32be()
- Remove qoriq_usb3_phy_read()
Adds entry point at dwc3 core init function to enable
USB 3.0 PHY driver.
Signed-off-by: Ran Wang
---
Change in v2:
- New file
drivers/usb/dwc3/core.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/usb/dwc3/core.c
This patch adds entries in dts to enable USB 3.0 PHY driver.
Signed-off-by: Sriram Dash
Signed-off-by: Ran Wang
---
Change in v2:
- Rename node name from 'usb3-phy' to 'usb-phy'
- Adjust phy node position
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 33
Adds qoriq usb 3.0 phy driver to implement erratum related workaround
for qoriq SoC.
Signed-off-by: Sriram Dash
Signed-off-by: Ran Wang
---
Change in v2:
- Replace funciont __raw_writel() by iowrite32be()
- Remove qoriq_usb3_phy_read() and qoriq_usb3_phy_write()
- Remove
Adds entry point at dwc3 core init function to enable
USB 3.0 PHY driver.
Signed-off-by: Ran Wang
---
Change in v2:
- New file
drivers/usb/dwc3/core.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index
On Mon, Nov 06, 2017 at 11:20:40PM -0800, Christoph Hellwig wrote:
> NAK, for both the libxfs patch and the kernel one.
What libxfs patch? And what "kernel one" are you referring to here?
> I wrote the file and it has no copyright header because it conatians
> trivial, non-copyrightable code.
On Mon, Nov 06, 2017 at 11:20:40PM -0800, Christoph Hellwig wrote:
> NAK, for both the libxfs patch and the kernel one.
What libxfs patch? And what "kernel one" are you referring to here?
> I wrote the file and it has no copyright header because it conatians
> trivial, non-copyrightable code.
* Ram Pai:
> On Mon, Nov 06, 2017 at 10:28:41PM +0100, Florian Weimer wrote:
>> * Ram Pai:
>>
>> > Testing:
>> > ---
>> > This patch series has passed all the protection key
>> > tests available in the selftest directory.The
>> > tests are updated to work on both x86 and powerpc.
>> > The
* Ram Pai:
> On Mon, Nov 06, 2017 at 10:28:41PM +0100, Florian Weimer wrote:
>> * Ram Pai:
>>
>> > Testing:
>> > ---
>> > This patch series has passed all the protection key
>> > tests available in the selftest directory.The
>> > tests are updated to work on both x86 and powerpc.
>> > The
> -Original Message-
> From: Jaegeuk Kim [mailto:jaeg...@kernel.org]
> Sent: Tuesday, November 07, 2017 11:41 AM
> To: Fan Li
> Cc: 'Chao Yu'; 'Chao Yu'; linux-kernel@vger.kernel.org;
> linux-f2fs-de...@lists.sourceforge.net
> Subject: Re: [f2fs-dev] [PATCH] f2fs: keep scanning until
> -Original Message-
> From: Jaegeuk Kim [mailto:jaeg...@kernel.org]
> Sent: Tuesday, November 07, 2017 11:41 AM
> To: Fan Li
> Cc: 'Chao Yu'; 'Chao Yu'; linux-kernel@vger.kernel.org;
> linux-f2fs-de...@lists.sourceforge.net
> Subject: Re: [f2fs-dev] [PATCH] f2fs: keep scanning until
> From: Martin K. Petersen [mailto:martin.peter...@oracle.com]
> Sent: Monday, November 6, 2017 7:40 PM
> To: Long Li
> Cc: KY Srinivasan ; Haiyang Zhang
> ; Stephen Hemminger
> ; James E . J . Bottomley
>
> From: Martin K. Petersen [mailto:martin.peter...@oracle.com]
> Sent: Monday, November 6, 2017 7:40 PM
> To: Long Li
> Cc: KY Srinivasan ; Haiyang Zhang
> ; Stephen Hemminger
> ; James E . J . Bottomley
> ; Martin K . Petersen
> ; de...@linuxdriverproject.org; linux-
> s...@vger.kernel.org;
NAK, for both the libxfs patch and the kernel one. I wrote the
file and it has no copyright header because it conatians trivial,
non-copyrightable code. I don't know why people think they can touch
license information on files I've written without even asking me.
Seems like this happened to
NAK, for both the libxfs patch and the kernel one. I wrote the
file and it has no copyright header because it conatians trivial,
non-copyrightable code. I don't know why people think they can touch
license information on files I've written without even asking me.
Seems like this happened to
cpuidle_monitor used to assume that cpu0 is always online which is not
a valid assumption on POWER machines. This patch fixes this by searching
for the first online cpu and uses it, instead of always using cpu0 for
monitoring which may not be online.
Signed-off-by: Abhishek Goel
cpuidle_monitor used to assume that cpu0 is always online which is not
a valid assumption on POWER machines. This patch fixes this by searching
for the first online cpu and uses it, instead of always using cpu0 for
monitoring which may not be online.
Signed-off-by: Abhishek Goel
---
v2: Commit
Hi Christophe,
I'll review and test your fixes.
Thank you!
Madalin
> -Original Message-
> From: Christophe JAILLET [mailto:christophe.jail...@wanadoo.fr]
> Sent: Monday, November 06, 2017 11:53 PM
> To: Madalin-cristian Bucur
> Cc: net...@vger.kernel.org;
Hi Christophe,
I'll review and test your fixes.
Thank you!
Madalin
> -Original Message-
> From: Christophe JAILLET [mailto:christophe.jail...@wanadoo.fr]
> Sent: Monday, November 06, 2017 11:53 PM
> To: Madalin-cristian Bucur
> Cc: net...@vger.kernel.org; linux-kernel@vger.kernel.org;
Hi Rob,
On 7 November 2017 at 01:15, Rob Herring wrote:
> On Thu, Nov 02, 2017 at 02:56:17PM +0800, Chunyan Zhang wrote:
>> Introduce a new binding with its documentation for Spreadtrum clock
>> sub-framework.
>>
>> Signed-off-by: Chunyan Zhang
>>
Hi Rob,
On 7 November 2017 at 01:15, Rob Herring wrote:
> On Thu, Nov 02, 2017 at 02:56:17PM +0800, Chunyan Zhang wrote:
>> Introduce a new binding with its documentation for Spreadtrum clock
>> sub-framework.
>>
>> Signed-off-by: Chunyan Zhang
>> ---
>>
On 2017/11/7 12:01, Yunlong Song wrote:
> Sorry, misunderstanding, because I think when sync == true, FG_GC does not
> check has_not_enough_free_secs, so maybe it does not have to do any gc
> at all.
> For example, if there are 100 segments for f2fs, and 20 segments are full or
> valid blocks
On 2017/11/7 12:01, Yunlong Song wrote:
> Sorry, misunderstanding, because I think when sync == true, FG_GC does not
> check has_not_enough_free_secs, so maybe it does not have to do any gc
> at all.
> For example, if there are 100 segments for f2fs, and 20 segments are full or
> valid blocks
On 11/07/2017 12:12 AM, Linus Torvalds wrote:
> On Mon, Nov 6, 2017 at 2:53 PM, Fengguang Wu wrote:
>>
>> The same dmesg happen to contain another libata related bug. Attached again.
>> It's rare and in the error handling path, so unlikely a new regression.
>>
>> [
On 11/07/2017 12:12 AM, Linus Torvalds wrote:
> On Mon, Nov 6, 2017 at 2:53 PM, Fengguang Wu wrote:
>>
>> The same dmesg happen to contain another libata related bug. Attached again.
>> It's rare and in the error handling path, so unlikely a new regression.
>>
>> [ 49.608280] BUG: sleeping
> Florian Fainelli hat am 6. November 2017 um 21:16
> geschrieben:
>
>
> On 11/04/2017 11:27 AM, Stefan Wahren wrote:
> > Hi Florian
> >
> >> Florian Fainelli hat am 2. November 2017 um 02:04
> >> geschrieben:
> >>
> >>
> >> We have now
> Florian Fainelli hat am 6. November 2017 um 21:16
> geschrieben:
>
>
> On 11/04/2017 11:27 AM, Stefan Wahren wrote:
> > Hi Florian
> >
> >> Florian Fainelli hat am 2. November 2017 um 02:04
> >> geschrieben:
> >>
> >>
> >> We have now incorporated all necessary functionality for the
On Mon 06 Nov 05:37 PST 2017, Arnd Bergmann wrote:
> We cannot cast a phys_addr_t variable to a pointer on 32-bit architectures
> with CONFIG_PHYS_ADDR_T_64BIT set:
>
> In file included from include/linux/kernel.h:14:0,
> from include/linux/clk.h:16,
> from
On Mon 06 Nov 05:37 PST 2017, Arnd Bergmann wrote:
> We cannot cast a phys_addr_t variable to a pointer on 32-bit architectures
> with CONFIG_PHYS_ADDR_T_64BIT set:
>
> In file included from include/linux/kernel.h:14:0,
> from include/linux/clk.h:16,
> from
On Tue, Nov 07, 2017 at 10:45:29AM +0800, Wei Hu (Xavier) wrote:
>
>
> On 2017/11/1 20:26, Robin Murphy wrote:
> > On 01/11/17 07:46, Wei Hu (Xavier) wrote:
> >>
> >> On 2017/10/12 20:59, Robin Murphy wrote:
> >>> On 12/10/17 13:31, Wei Hu (Xavier) wrote:
> On 2017/10/1 0:10, Leon Romanovsky
On Tue, Nov 07, 2017 at 10:45:29AM +0800, Wei Hu (Xavier) wrote:
>
>
> On 2017/11/1 20:26, Robin Murphy wrote:
> > On 01/11/17 07:46, Wei Hu (Xavier) wrote:
> >>
> >> On 2017/10/12 20:59, Robin Murphy wrote:
> >>> On 12/10/17 13:31, Wei Hu (Xavier) wrote:
> On 2017/10/1 0:10, Leon Romanovsky
On Mon, Nov 06, 2017 at 08:35:14AM -0600, Gustavo A. R. Silva wrote:
> Check on return value and goto label mbx_err are unnecessary.
>
> Addresses-Coverity-ID: 1268780
What's that?
> Signed-off-by: Gustavo A. R. Silva
> ---
> drivers/infiniband/hw/ocrdma/ocrdma_hw.c |
On Mon, Nov 06, 2017 at 08:35:14AM -0600, Gustavo A. R. Silva wrote:
> Check on return value and goto label mbx_err are unnecessary.
>
> Addresses-Coverity-ID: 1268780
What's that?
> Signed-off-by: Gustavo A. R. Silva
> ---
> drivers/infiniband/hw/ocrdma/ocrdma_hw.c | 4 +---
> 1 file
Le 06/11/2017 à 22:53, Christophe JAILLET a écrit :
There is no need to release explicitly some devm_ allocated resources.
If the 'mac_probe()' probe function fails, they will be released
automatically, as already done in the other error handling paths of
this function.
Also goto
Le 06/11/2017 à 22:53, Christophe JAILLET a écrit :
There is no need to release explicitly some devm_ allocated resources.
If the 'mac_probe()' probe function fails, they will be released
automatically, as already done in the other error handling paths of
this function.
Also goto
On Tue, Nov 7, 2017 at 4:21 AM, Enrico Weigelt, metux IT consult
wrote:
> On 26.10.2017 18:26, Pintu Kumar wrote:
>>
>> Hi,
>>
>> My proposal is to maintain a common base defconfig file for all ARM
>> products and only add the additional configs in the new defconfig
>> file.
>> I am
On Tue, Nov 7, 2017 at 4:21 AM, Enrico Weigelt, metux IT consult
wrote:
> On 26.10.2017 18:26, Pintu Kumar wrote:
>>
>> Hi,
>>
>> My proposal is to maintain a common base defconfig file for all ARM
>> products and only add the additional configs in the new defconfig
>> file.
>> I am not sure if
From: Eric Biggers
On a non-preemptible kernel, if KEYCTL_DH_COMPUTE is called with the
largest permitted inputs (16384 bits), the kernel spends 10+ seconds
doing modular exponentiation in mpi_powm() without rescheduling. If all
threads do it, it locks up the system.
From: Eric Biggers
On a non-preemptible kernel, if KEYCTL_DH_COMPUTE is called with the
largest permitted inputs (16384 bits), the kernel spends 10+ seconds
doing modular exponentiation in mpi_powm() without rescheduling. If all
threads do it, it locks up the system. Moreover, it can cause
On 03-11-17, 14:47, Sudeep Holla wrote:
> The cpufreq core provides option for drivers to implement fast_switch
> callback which is invoked for frequency switching from interrupt context.
>
> This patch adds support for fast_switch callback in SCMI cpufreq driver
> by making use of polling based
On 03-11-17, 14:47, Sudeep Holla wrote:
> The cpufreq core provides option for drivers to implement fast_switch
> callback which is invoked for frequency switching from interrupt context.
>
> This patch adds support for fast_switch callback in SCMI cpufreq driver
> by making use of polling based
On 03-11-17, 14:47, Sudeep Holla wrote:
> On some ARM based systems, a separate Cortex-M based System Control
> Processor(SCP) provides the overall power, clock, reset and system
> control including CPU DVFS. SCMI Message Protocol is used to
> communicate with the SCP.
>
> This patch adds a
On 03-11-17, 14:47, Sudeep Holla wrote:
> On some ARM based systems, a separate Cortex-M based System Control
> Processor(SCP) provides the overall power, clock, reset and system
> control including CPU DVFS. SCMI Message Protocol is used to
> communicate with the SCP.
>
> This patch adds a
On Fri, Oct 20, 2017 at 7:00 AM, Tim Harvey wrote:
> On Thu, Oct 19, 2017 at 12:39 AM, Hans Verkuil wrote:
>
>>>
>>> Regarding video standard detection where this chip provides me with
>>> vertical-period, horizontal-period, and horizontal-pulse-width
On Fri, Oct 20, 2017 at 7:00 AM, Tim Harvey wrote:
> On Thu, Oct 19, 2017 at 12:39 AM, Hans Verkuil wrote:
>
>>>
>>> Regarding video standard detection where this chip provides me with
>>> vertical-period, horizontal-period, and horizontal-pulse-width I
>>> should be able to detect the standard
On Mon 06 Nov 09:09 PST 2017, Loic Pallardy wrote:
> This series increases remoteproc debug capabilities by adding:
> - associated resource table dump feature
> - registered carveouts list dump feature
>
Looks good, patches applied to rproc-next
Regards,
Bjorn
> ---
> Changes from V1:
> - Fix
On Mon 06 Nov 09:09 PST 2017, Loic Pallardy wrote:
> This series increases remoteproc debug capabilities by adding:
> - associated resource table dump feature
> - registered carveouts list dump feature
>
Looks good, patches applied to rproc-next
Regards,
Bjorn
> ---
> Changes from V1:
> - Fix
On Mon 06 Nov 03:21 PST 2017, Mark Brown wrote:
> On Mon, Nov 06, 2017 at 03:30:37PM +1100, Stephen Rothwell wrote:
> > On Mon, 6 Nov 2017 15:21:57 +1100 Stephen Rothwell
> > wrote:
> > > On Mon, 6 Nov 2017 11:52:14 +1100 Stephen Rothwell
> > >
On Mon 06 Nov 03:21 PST 2017, Mark Brown wrote:
> On Mon, Nov 06, 2017 at 03:30:37PM +1100, Stephen Rothwell wrote:
> > On Mon, 6 Nov 2017 15:21:57 +1100 Stephen Rothwell
> > wrote:
> > > On Mon, 6 Nov 2017 11:52:14 +1100 Stephen Rothwell
> > > wrote:
>
> > > > After merging the regmap tree,
Hi
On 11/07/17 13:37, Yixun Lan wrote:
> From: Xingyu Chen
>
> The SAR ADC modules doesn't require The "sana" clock.
>
> Singed-off-by: Xingyu Chen
> Signed-off-by: Yixun Lan
> ---
> arch/arm/boot/dts/meson8.dtsi
Hi
On 11/07/17 13:37, Yixun Lan wrote:
> From: Xingyu Chen
>
> The SAR ADC modules doesn't require The "sana" clock.
>
> Singed-off-by: Xingyu Chen
> Signed-off-by: Yixun Lan
> ---
> arch/arm/boot/dts/meson8.dtsi | 5 ++---
> arch/arm/boot/dts/meson8b.dtsi | 5
On 2017/11/7 11:04, Fan Li wrote:
> In current version, after scan_free_nid_bits, the scan is over if
> nid_cnt[FREE_NID] != 0.
> In most cases, there are still free nids in the free list during the scan,
> and scan_free_nid_bits
> usually can't increase nid_cnt[FREE_NID].
> It causes that
On 2017/11/7 11:04, Fan Li wrote:
> In current version, after scan_free_nid_bits, the scan is over if
> nid_cnt[FREE_NID] != 0.
> In most cases, there are still free nids in the free list during the scan,
> and scan_free_nid_bits
> usually can't increase nid_cnt[FREE_NID].
> It causes that
Hi Martin
On 11/07/17 06:03, Martin Blumenstingl wrote:
> Hi Yixun,
>
> On Mon, Nov 6, 2017 at 10:31 AM, Yixun Lan wrote:
>> Hi Neil:
>>
>>
>> On 11/06/17 16:57, Neil Armstrong wrote:
>>> On 06/11/2017 08:52, Yixun Lan wrote:
According to the datasheet, in
Hi Martin
On 11/07/17 06:03, Martin Blumenstingl wrote:
> Hi Yixun,
>
> On Mon, Nov 6, 2017 at 10:31 AM, Yixun Lan wrote:
>> Hi Neil:
>>
>>
>> On 11/06/17 16:57, Neil Armstrong wrote:
>>> On 06/11/2017 08:52, Yixun Lan wrote:
According to the datasheet, in Meson-GXBB/GXL series,
The
> -Original Message-
> From: intel-gvt-dev [mailto:intel-gvt-dev-boun...@lists.freedesktop.org] On
> Behalf Of Gerd Hoffmann
> Sent: Monday, November 6, 2017 5:01 PM
> To: Zhang, Tina ; alex.william...@redhat.com;
> ch...@chris-wilson.co.uk;
> -Original Message-
> From: intel-gvt-dev [mailto:intel-gvt-dev-boun...@lists.freedesktop.org] On
> Behalf Of Gerd Hoffmann
> Sent: Monday, November 6, 2017 5:01 PM
> To: Zhang, Tina ; alex.william...@redhat.com;
> ch...@chris-wilson.co.uk; joonas.lahti...@linux.intel.com;
>
We will keep __add_ino_entry success all the time, for ENOMEM failure
case, we have already handled it by using __GFP_NOFAIL flag, so we
don't have to use additional opened loop codes here, remove them.
Signed-off-by: Chao Yu
---
v2:
As Michal Hocko suggested, with
We will keep __add_ino_entry success all the time, for ENOMEM failure
case, we have already handled it by using __GFP_NOFAIL flag, so we
don't have to use additional opened loop codes here, remove them.
Signed-off-by: Chao Yu
---
v2:
As Michal Hocko suggested, with __GFP_NOFAIL, MM will do all
According to the datasheet, in Meson-GXBB/GXL series,
The clock gate bit for SARADC is HHI_GCLK_MPEG2 bit[22],
while clock gate bit for SANA is HHI_GCLK_MPEG0 bit[10].
Test passed at gxl-s905x-p212 board.
The following published datasheets are wrong and should be updated
[1] GXBB v1.1.4, page 57
According to the datasheet, in Meson-GXBB/GXL series,
The clock gate bit for SARADC is HHI_GCLK_MPEG2 bit[22],
while clock gate bit for SANA is HHI_GCLK_MPEG0 bit[10].
Test passed at gxl-s905x-p212 board.
The following published datasheets are wrong and should be updated
[1] GXBB v1.1.4, page 57
From: Xingyu Chen
The SAR ADC modules doesn't require The "sana" clock.
Singed-off-by: Xingyu Chen
Signed-off-by: Yixun Lan
---
arch/arm/boot/dts/meson8.dtsi | 5 ++---
arch/arm/boot/dts/meson8b.dtsi
From: Xingyu Chen
The SAR ADC modules doesn't require The "sana" clock.
Singed-off-by: Xingyu Chen
Signed-off-by: Yixun Lan
---
arch/arm/boot/dts/meson8.dtsi | 5 ++---
arch/arm/boot/dts/meson8b.dtsi | 5 ++---
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 3 +--
From: Xingyu Chen
The "sana" clock is not used at SAR ADC module in Amlogic Meson SoC,
it is irrelevant for the SAR ADC.
Signed-off-by: Xingyu Chen
Signed-off-by: Yixun Lan
---
drivers/iio/adc/meson_saradc.c | 20
From: Xingyu Chen
The SAR ADC modules doesn't require The "sana" clock.
Singed-off-by: Xingyu Chen
Signed-off-by: Yixun Lan
---
arch/arm/boot/dts/meson8.dtsi | 5 ++---
arch/arm/boot/dts/meson8b.dtsi
From: Xingyu Chen
The "sana" clock is not used at SAR ADC module in Amlogic Meson SoC,
it is irrelevant for the SAR ADC.
Signed-off-by: Xingyu Chen
Signed-off-by: Yixun Lan
---
drivers/iio/adc/meson_saradc.c | 20
1 file changed, 20 deletions(-)
diff --git
From: Xingyu Chen
The SAR ADC modules doesn't require The "sana" clock.
Singed-off-by: Xingyu Chen
Signed-off-by: Yixun Lan
---
arch/arm/boot/dts/meson8.dtsi | 5 ++---
arch/arm/boot/dts/meson8b.dtsi | 5 ++---
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 3 +--
From: Xingyu Chen
Update the doc as the SAR ADC modules doesn't require "sana" clock.
Singed-off-by: Xingyu Chen
Signed-off-by: Yixun Lan
---
Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt | 1 -
1
From: Xingyu Chen
Update the doc as the SAR ADC modules doesn't require "sana" clock.
Singed-off-by: Xingyu Chen
Signed-off-by: Yixun Lan
---
Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt | 1 -
1 file changed, 1 deletion(-)
diff --git
patch [1/4]:
Fix wrong SARADC/SANA clock gate bit in Meson-GXBB/GXL,
the published datasheet also has wrong description about this.
patch [2-4/4]:
Drop the "sana" clock from SAR ADC module,
From the hardware perspective, the SAR ADC module doesn't
require "sana" clock to wrok. This should
patch [1/4]:
Fix wrong SARADC/SANA clock gate bit in Meson-GXBB/GXL,
the published datasheet also has wrong description about this.
patch [2-4/4]:
Drop the "sana" clock from SAR ADC module,
From the hardware perspective, the SAR ADC module doesn't
require "sana" clock to wrok. This should
Hi Catalin,
Commit
2c0db5b45071 ("rm64: Implement __lshrti3 library function")
is missing a Signed-off-by from its author.
--
Cheers,
Stephen Rothwell
Hi Catalin,
Commit
2c0db5b45071 ("rm64: Implement __lshrti3 library function")
is missing a Signed-off-by from its author.
--
Cheers,
Stephen Rothwell
Hello,
Sorry for dealy. I was on vacation during last week.
On Thu, Oct 26, 2017 at 07:16:27AM -0700, Tony Lindgren wrote:
> * Joonsoo Kim [171025 21:45]:
> > On Wed, Oct 25, 2017 at 10:31:38AM -0700, Tony Lindgren wrote:
> > > Great, this branch boots on n900! Early
Hello,
Sorry for dealy. I was on vacation during last week.
On Thu, Oct 26, 2017 at 07:16:27AM -0700, Tony Lindgren wrote:
> * Joonsoo Kim [171025 21:45]:
> > On Wed, Oct 25, 2017 at 10:31:38AM -0700, Tony Lindgren wrote:
> > > Great, this branch boots on n900! Early parts of the dmesg attached
1 - 100 of 3176 matches
Mail list logo