Hi Pavel,
On 20 July 2018 at 04:20, Pavel Machek wrote:
> Hi!
>
>> > >Please keep in mind that this is ABI documentation for the pattern file
>> > >to be exposed by LED core, and not by the pattern trigger, that, as we
>> > >agreed, will be implemented later. In this case, I'd go for
>> >
>> > Go
On Sun, Jul 22, 2018 at 03:53:24PM +0800, kernel test robot wrote:
>
> FYI, we noticed the following commit (built with gcc-7):
>
> commit: 600b7378cf43f522e88027874f11f63b6fbf53d8 ("[PATCH 2/4] perf tools:
> Add threads__get_last_match function")
> url:
> https://github.com/0day-ci/linux/commi
Hi Matthew,
Today's linux-next merge of the xarray tree got a conflict in:
MAINTAINERS
between commits:
30153e5ba54d ("MAINTAINERS: update Ross Zwisler's email address")
212a28b4dae9 ("MAINTAINERS: Add Jan Kara for filesystem DAX")
from the nvdimm tree and commit:
40c8f8eed61c ("Updat
On Thu 19-07-18 09:23:10, Shakeel Butt wrote:
> On Thu, Jul 19, 2018 at 3:43 AM Michal Hocko wrote:
> >
> > [CC Andrew]
> >
> > On Thu 19-07-18 18:06:47, Jing Xia wrote:
> > > It was reported that a kernel crash happened in mem_cgroup_iter(),
> > > which can be triggered if the legacy cgroup-v1 no
From: Wanpeng Li
Fallback to original apic hooks when unlikely kvm fails to add the
pending IRQ to lapic.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Vitaly Kuznetsov
Signed-off-by: Wanpeng Li
---
arch/x86/kernel/kvm.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
From: Wanpeng Li
Add kvm hypervisor init time platform setup callback which
will be used to replace native apic hooks by pararvirtual
hooks.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Vitaly Kuznetsov
Signed-off-by: Wanpeng Li
---
arch/x86/kernel/kvm.c | 10 ++
1 file changed, 10 insert
Using hypercall to send IPIs by one vmexit instead of one by one for
xAPIC/x2APIC physical mode and one vmexit per-cluster for x2APIC cluster
mode. Intel guest can enter x2apic cluster mode when interrupt remmaping
is enabled in qemu, however, latest AMD EPYC still just supports xapic
mode which
From: Wanpeng Li
Using hypercall to send IPIs by one vmexit instead of one by one for
xAPIC/x2APIC physical mode and one vmexit per-cluster for x2APIC cluster
mode. Intel guest can enter x2apic cluster mode when interrupt remmaping
is enabled in qemu, however, latest AMD EPYC still just support
From: Wanpeng Li
Implement paravirtual apic hooks to enable PV IPIs.
apic->send_IPI_mask
apic->send_IPI_mask_allbutself
apic->send_IPI_allbutself
apic->send_IPI_all
This patch lets a guest send multicast IPIs, with at most 128 destinations
per hypercall in 64-bit mode and 64 vCPUs per hypercal
From: Wanpeng Li
The NMI delivery mode of ICR is used to deliver an NMI to the processor,
and the vector information is ignored.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Vitaly Kuznetsov
Signed-off-by: Wanpeng Li
---
arch/x86/kernel/kvm.c | 15 ---
arch/x86/kvm/x86.c| 16
From: Wanpeng Li
Expose PV_SEND_IPI feature bit to guest, the guest can check this feature
bit before using paravirtualized send IPIs.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Vitaly Kuznetsov
Signed-off-by: Wanpeng Li
---
Documentation/virtual/kvm/cpuid.txt | 4
arch/x86/kvm/cpuid.c
When handling ept misconfig exit, it will call emulate instruction
with insn_len = 0. The decode instruction function may return a fetch
fault and should propagate to guest.
The problem will result to emulation fail.
KVM internal error. Suberror: 1
emulation failure
EAX=f81a0024 EBX=f6a07000 ECX=f
On Mon, 23 Jul 2018 at 14:19, Paolo Bonzini wrote:
>
> On 23/07/2018 08:10, Wanpeng Li wrote:
> >>> On 20/07/2018 18:28, Wanpeng Li wrote:
> +a0: ipi_bitmap low 64 bits
> +a1: ipi_bitmap high 64 bits
> +a2: the lowest APIC ID in bitmap
> +a3: APIC ICR
> +
> +The hyper
On 23/07/2018 08:10, Wanpeng Li wrote:
>>> On 20/07/2018 18:28, Wanpeng Li wrote:
+a0: ipi_bitmap low 64 bits
+a1: ipi_bitmap high 64 bits
+a2: the lowest APIC ID in bitmap
+a3: APIC ICR
+
+The hypercall lets a guest send multicast IPIs at most can handle
+128 vCP
Hi Niklas,
On Tue, Jul 3, 2018 at 12:50 PM, Niklas Cassel wrote:
> Since commit cab673583d96 ("soc: Unconditionally include qcom Makefile"),
> we unconditionally include the soc/qcom/Makefile.
>
> This opens up the possibility to compile test the code even when
> building for other architectures
On Fri, Jul 20, 2018 at 08:50:22AM +, Zhangfei (Tyler) wrote:
> Hi Naoya&xishi：
> We have a similar problem, the difference is that we did not Enable
> hugepage, the soft-offline was executed in the case of normal 4K pages, and
> finally the MCE kill was triggered（find hwpoison flag is
On 2018-07-23 05:40, Manivannan Sadhasivam wrote:
> + /* Handle the remaining bytes which were not sent */
> + while (!(readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT) &
> +OWL_I2C_FIFOSTAT_TFF) && i2c_dev->msg_ptr < msg->len) {
You moved the OWL_ line to th
This patch adds the vibrator device node for Spreadtrum SC27XX PMICs.
Signed-off-by: Baolin Wang
---
arch/arm64/boot/dts/sprd/sc2731.dtsi |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/sprd/sc2731.dtsi
b/arch/arm64/boot/dts/sprd/sc2731.dtsi
index 7d53ca6..650bd6
This patch adds the eFuse device node for Spreadtrum SC27XX PMICs.
The SC27XX eFuse contains 32 blocks and each block's data width is
16 bits.
Signed-off-by: Baolin Wang
---
arch/arm64/boot/dts/sprd/sc2731.dtsi |8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/sp
On Spreadtrum platform, the current clocksource for timekeeping will be
stopped in suspend state, thus add one always-on timer to calculate the
suspend time.
Signed-off-by: Baolin Wang
---
arch/arm64/boot/dts/sprd/whale2.dtsi |6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm6
Add the Spreadtrum SC27XX PMICs ADC device node which contains 32 channels.
Signed-off-by: Baolin Wang
---
arch/arm64/boot/dts/sprd/sc2731.dtsi |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/sprd/sc2731.dtsi
b/arch/arm64/boot/dts/sprd/sc2731.dtsi
index fc680
The SC27xx breathing light controller can support 3 outputs:
red LED, green LED and blue LED.
Signed-off-by: Baolin Wang
---
arch/arm64/boot/dts/sprd/sc2731.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/sprd/sc2731.dtsi
b/arch/arm64/boot/
On Mon, 23 Jul 2018 at 14:00, Wanpeng Li wrote:
>
> On Mon, 23 Jul 2018 at 13:52, Paolo Bonzini wrote:
> >
> > On 20/07/2018 18:28, Wanpeng Li wrote:
> > > +a0: ipi_bitmap low 64 bits
> > > +a1: ipi_bitmap high 64 bits
> > > +a2: the lowest APIC ID in bitmap
> > > +a3: APIC ICR
> > > +
> > > +The
On 23/07/2018 08:00, Wanpeng Li wrote:
> On Mon, 23 Jul 2018 at 13:52, Paolo Bonzini wrote:
>>
>> On 20/07/2018 18:28, Wanpeng Li wrote:
>>> +a0: ipi_bitmap low 64 bits
>>> +a1: ipi_bitmap high 64 bits
>>> +a2: the lowest APIC ID in bitmap
>>> +a3: APIC ICR
>>> +
>>> +The hypercall lets a guest se
On Sun, 22 Jul 2018 08:22:48 -0700
Matthew Wilcox wrote:
> On Sun, Jul 22, 2018 at 07:11:09PM +0530, Souptick Joarder wrote:
> > use new return type vm_fault_t for fault handler vdso_fault.
> >
> > Signed-off-by: Souptick Joarder
>
> Reviewed-by: Matthew Wilcox
I modified the patch descrip
On Mon, 23 Jul 2018 at 13:52, Paolo Bonzini wrote:
>
> On 20/07/2018 18:28, Wanpeng Li wrote:
> > +a0: ipi_bitmap low 64 bits
> > +a1: ipi_bitmap high 64 bits
> > +a2: the lowest APIC ID in bitmap
> > +a3: APIC ICR
> > +
> > +The hypercall lets a guest send multicast IPIs at most can handle
> > +1
On Sat, Jul 21, 2018 at 8:29 PM, syzbot
wrote:
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:8ae71e76cf1f Merge branch 'bpf-offload-sharing'
> git tree: bpf-next
> console output: https://syzkaller.appspot.com/x/log.txt?x=17724d1c40
> kernel config: https://syzka
Hi,
These patches convert ia64 to use NO_BOOTMEM.
The first two patches are cleanups, the third patches reduces usage of
'struct bootmem_data' for easier transition and the forth patch actually
replaces bootmem with memblock + nobootmem.
I've tested the sim_defconfig with the ski simulator and b
Since commit 05e0caad3b7b ("[PATCH] Have ia64 use add_active_range() and
free_area_init_nodes") the num_dma_physpages member of 'struct
early_node_data' is calculated but never used. Remove it.
Signed-off-by: Mike Rapoport
---
arch/ia64/mm/discontig.c | 8
1 file changed, 8 deletions(-)
When EFI memory map is traversed to determine the extents of each node, the
minimal and maximal PFNs are stored in the bootmem_data structures. The
same information ls later stored in the mem_data array of 'struct
early_node_data'.
Switch to using mem_data from the very beginning.
Signed-off-by:
The FLATMEM version of paging_init has calls to free_area_init_nodes() in
the end of every branch of 'if' and 'ifdef' statements.
Let's call this function outside the 'ifdef' and 'if' statements instead.
Signed-off-by: Mike Rapoport
---
arch/ia64/mm/contig.c | 4 +---
1 file changed, 1 insertio
Since ia64 already uses memblock to register available physical memory it
is only required to move the calls to register_active_ranges() that wrap
memblock_add_node() earlier and replace bootmem memory reservations with
memblock_reserve(). Of course, all the code that find the place to put the
boot
From: Chen Lin
NUMA balancing has not taken *isolcpus(isolated cpus)* into
consideration. It may migrate tasks onto isolated cpus and the
migrated tasks will never escape from the isolated cpus, which will
break the isolation provided by *isolcpus* boot parameter and
intrduce various problems.
Add support for the display clock controller found on SDM845
based devices. This would allow display drivers to probe and
control their clocks.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig | 10 +
drivers/clk/qcom/Makefile| 1 +
drivers/clk/qcom/dispcc-sdm845.c | 686
[v4]
* Add comments for the RCGs/CBCRs using the CLK_GET_RATE_NOCACHE flag.
[v3]
* Move frequency table macro to common file,
add the patch along to maintain dependency.
[v2]
* Removed unused header file includes.
* Moved the frequency table macro to a common file [1].
* Move to
On 20/07/2018 18:28, Wanpeng Li wrote:
> +a0: ipi_bitmap low 64 bits
> +a1: ipi_bitmap high 64 bits
> +a2: the lowest APIC ID in bitmap
> +a3: APIC ICR
> +
> +The hypercall lets a guest send multicast IPIs at most can handle
> +128 vCPUs per hypercall on 64-bit machines and 64 vCPUs per hypercall
>
Hi Greg,
After merging the tty tree, today's linux-next build (arm
multi_v7_defconfig) produced this warning:
drivers/tty/serial/8250/8250_exar.c: In function 'pci_xr17v35x_setup':
drivers/tty/serial/8250/8250_exar.c:380:31: warning: unused variable 'board'
[-Wunused-variable]
const struct exa
On Wed, 18 Jul 2018, Dmitry Torokhov wrote:
> On Wed, Jul 18, 2018 at 08:47:36AM +0100, Lee Jones wrote:
> > On Tue, 17 Jul 2018, Vignesh R wrote:
> >
> > > Hi Dmitry,
> > >
> > > On Saturday 30 June 2018 04:03 PM, Vignesh R wrote:
> > > > On AM335x, resistive TSC can wakeup the system from low
Hi Guenter,
I will send the updated patch..
Thank you.
Regards,
Srinath.
On Sat, Jul 21, 2018 at 8:08 PM, Guenter Roeck wrote:
> On 07/10/2018 01:44 AM, Srinath Mannam wrote:
>>
>> When using ACPI node, binding clock devices are
>> not available as device tree, So clock-frequency
>> property gi
On 7/20/2018 5:48 PM, Mark Brown wrote:
> On Fri, Jul 20, 2018 at 02:38:11PM +0800, Akshu Agrawal wrote:
>
>> static int cz_probe(struct platform_device *pdev)
>> {
>> int ret;
>> struct snd_soc_card *card;
>> struct acp_platform_info *machine;
>> +static bool regulators_re
On 7/19/2018 6:49 PM, Alex G. wrote:
On 07/18/2018 08:38 AM, Tal Gilboa wrote:
On 7/16/2018 5:17 PM, Bjorn Helgaas wrote:
[+cc maintainers of drivers that already use pcie_print_link_status()
and GPU folks]
[snip]
+ /* Multi-function PCIe share the same link/status. */
+ if ((PCI_FU
During ipmi stress tests we see occasional failure of transactions
at the boot time. This happens in the case of a I2C_M_RECV_LEN
transactions, when the read transfer completes (with the initial
read length of 34) before the driver gets a chance to handle interrupts.
The current driver code expect
On 2018-07-21 21:09, dev-harsh1998 wrote:
> WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using
> octal permissions '0444'.
> +static DEVICE_ATTR(selftest, S_IRUGO, tsc200x_selftest_show, NULL);
>
> Signed-off-by: dev-harsh1998
Acked-by: Martin Kepplinger
This series add IRQ handler for low level SOC alert, define a devicetree
binding attribute to configure the alert level threshold and check for changes
in SOC for send uevents.
Max17040 have a pin for alert host about low level state of charge and this
alert can be configured in a threshold from
For configure low level state of charge threshold alert signaled from
max17040 we add "maxim,alert-soc-level" property.
Signed-off-by: Matheus Castello
---
.../bindings/power/supply/max17040_battery.txt | 24 ++
1 file changed, 24 insertions(+)
create mode 100644
Docume
Add check for changes in state of charge from delayed work, so
in case of changes we call power_supply_changed to send an uevent.
power_supply_changed send an uevent for alert user space about
changes, is useful for example to user space apps made changes in
UI battery level or made other decision
Hi all,
Today's linux-next merge of the kvm-arm tree got a conflict in:
arch/arm64/include/asm/cpucaps.h
between commit:
314d53d29798 ("arm64: Handle mismatched cache type")
from the arm64 tree and commit:
e48d53a91f6e ("arm64: KVM: Add support for Stage-2 control of memory types
and c
On July 23, 2018 4:57:47 AM GMT+02:00, Viresh Kumar
wrote:
>On 20-07-18, 09:53, Marcel Ziswiler wrote:
>> From: Marcel Ziswiler
>>
>> The property "irq-over-gpio" simply does not exist (this is nowadays
>> actually auto detected) and the property "irq-gpios" is actually
>called
>> "irq-gpios
linux-kernel@vger.kernel.org
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外贸客户开发系统能为你做到：
For configuration of fuel gauge alert for a low level state of charge
interrupt we add a function to config level threshold and a device tree
binding property to set it in flatned device tree node.
Now we can use "maxim,alert-soc-level" property with the values from
1 up to 32 to configure alert i
According datasheet max17040 has a pin for alert host for low SOC.
This pin can be used as external interrupt, so we need to check for
interrupts assigned for device and handle it.
In hadler we are checking and storing fuel gauge registers values
and send an uevent to notificate user space, so use
The variable group in sched_domain_debug_one() is not checked
when firstly used in cpumask_test_cpu(cpu, sched_group_span(group)),
but it maybe NULL(checked later in the following while loop) and may
cause NULL pointer dereference without checking. We need to check it
before using to avoid NULL der
Add Actions Semi Owl family S900 DMA driver.
Signed-off-by: Manivannan Sadhasivam
---
drivers/dma/Kconfig |8 +
drivers/dma/Makefile |1 +
drivers/dma/owl-dma.c | 1023 +
3 files changed, 1032 insertions(+)
create mode 100644 drivers/dma/owl-dm
Add entry for Actions Semi Owl SoCs DMA driver under ARM/ACTIONS.
Signed-off-by: Manivannan Sadhasivam
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 09b54e9ebc6f..56d9c7715c2a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1145,12 +1145,14
Add devicetree binding for Actions Semi Owl SoCs DMA controller.
Signed-off-by: Manivannan Sadhasivam
---
.../devicetree/bindings/dma/owl-dma.txt | 46 +++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/owl-dma.txt
diff --git a/D
This patchset adds DMA controller support for Actions Semi Owl family
S900 SoC. This driver has been structured in a way such that there will be only
one controller driver for the whole Owl family series (S500, S700 and
S900 SoCs).
There are 12 physical channels and 46 logical channels supported b
Add DMA controller node for Actions Semi S900 SoC.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s900.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s900.dtsi
b/arch/arm64/boot/dts/actions/s900.dtsi
index 7ae8b931f000..
On Wed, 18 Jul 2018, Waiman Long wrote:
The key here is that we don't want other incoming readers to observe
that there are waiters in the wait queue and hence have to go into the
slowpath until the single waiter in the queue is sure that it probably
will need to go to sleep if there is writer.
qca_open() and qca_set_baudrate() are never called in atomic context.
They call kzalloc() and bt_skb_alloc() with GFP_ATOMIC,
which is not necessary.
GFP_ATOMIC can be replaced with GFP_KERNEL.
This is found by a static analysis tool named DCNS written by myself.
I also manually check the kernel
inject_cmd_complete() is only called by intel_dequeue(),
which is never called in atomic context.
inject_cmd_complete() calls bt_skb_alloc() with GFP_ATOMIC,
which is not necessary.
GFP_ATOMIC can be replaced with GFP_KERNEL.
This is found by a static analysis tool named DCNS written by myself.
On Fri, 2018-07-20 at 18:22 +0200, Joerg Roedel wrote:
> Hi,
>
> here are 3 patches which update the PTI-x86-32 patches recently merged
> into the tip-tree. The patches are ordered by importance:
>
> Patch 1: Very important, it fixes a vmalloc-fault in NMI context
>when PTI
Add entry for Actions Semiconductor Owl I2C driver under ARM/ACTIONS
Signed-off-by: Manivannan Sadhasivam
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 09b54e9ebc6f..5084c62712fa 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1145,12 +1145,
Add I2C controller nodes for Actions Semiconductor S900 SoC.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s900.dtsi | 60 +++
1 file changed, 60 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s900.dtsi
b/arch/arm64/boot/dts/actions/s900.d
Add pinctrl definition for Actions Semiconductor S900 I2C controller.
Pinctrl definitions are only available for I2C0, I2C1, and I2C2.
Signed-off-by: Manivannan Sadhasivam
---
.../dts/actions/s900-bubblegum-96-pins.dtsi | 29 +++
1 file changed, 29 insertions(+)
create mode 10
Add devicetree binding for Actions Semiconductor Owl I2C controller
Signed-off-by: Manivannan Sadhasivam
Reviewed-by: Rob Herring
---
.../devicetree/bindings/i2c/i2c-owl.txt | 27 +++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2
Add Actions Semiconductor Owl family S900 I2C driver.
Signed-off-by: Manivannan Sadhasivam
Acked-by: Peter Rosin
---
drivers/i2c/busses/Kconfig | 7 +
drivers/i2c/busses/Makefile | 1 +
drivers/i2c/busses/i2c-owl.c | 495 +++
3 files changed, 503 insertion
Enable I2C1 and I2C2 exposed on the low speed expansion connector in
Bubblegum-96 board.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s900-bubblegum-96.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
This patchset adds I2C controller support for Actions Semiconductor S900 SoC.
This driver has been structured in a way such that there will be only
one controller driver for the whole Owl family series (S500, S700 and
S900 SoCs).
There are 6 I2C controllers with separate memory mapped register spa
Hi Russell,
Thanks for the details explanation.
I am running the bw_mem test provided in LM Benchmark to measures the
throughput to write data to memory as it seems to be a general benchmark
program.
Initially, I tested to run my own's created memory test program and encountered
the same unb
inject_cmd_complete() is only called by btusb_send_frame_intel(),
which is set to hdev->send, and hdev->send() is never
called in atomic context.
inject_cmd_complete() calls bt_skb_alloc() with GFP_ATOMIC,
which is not necessary.
GFP_ATOMIC can be replaced with GFP_KERNEL.
This is found by a s
btmrvl_sdio_card_to_host() is never called in atomic context.
It calls bt_skb_alloc() with GFP_ATOMIC, which is not necessary.
GFP_ATOMIC can be replaced with GFP_KERNEL.
This is found by a static analysis tool named DCNS written by myself.
I also manually check the kernel code before reporting i
Add support for the rk809 and rk817 regulator driver.
Their specifications are as follows：
1、The RK809 and RK809 consist of 5 DCDCs, 9 LDOs
and have the same registers for these components except dcdc5.
2、The dcdc5 is a boost dcdc for RK817 and is a buck for RK809.
3、The
Add device tree bindings documentation for Rockchip's RK809 & RK817 PMIC.
Signed-off-by: Tony Xie
---
Documentation/devicetree/bindings/mfd/rk808.txt | 55 +
1 file changed, 55 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/rk808.txt
b/Documentation/de
The rk809 and rk817 are a Power Management IC (PMIC) for multimedia
and handheld devices. It contains the following components:
- Regulators
- RTC
- Clocking
Both RK809 and RK817 chips are using a similar register map,
so we can reuse the RTC and Clocking a
RK809 and RK817 are power management IC chips for multimedia products.
Most of their functions and registers are same, including the rtc.
Signed-off-by: Tony Xie
---
drivers/rtc/Kconfig | 4 +--
drivers/rtc/rtc-rk808.c | 68 +++--
2 files changed,
bpa10x_send_frame() is only set to hdev->send, and hdev->send() is never
called in atomic context.
bpa10x_send_frame() calls usb_alloc_urb(), kmalloc() and usb_submit_urb()
with GFP_ATOMIC, which is not necessary.
GFP_ATOMIC can be replaced with GFP_KERNEL.
This is found by a static analysis t
bluecard_hci_set_baud_rate() is never called in atomic context.
bluecard_hci_set_baud_rate() is only by bluecard_hci_open(), which is
set to hdev->open, and hdev->open() is never called in atomic context.
bluecard_hci_set_baud_rate() calls bt_skb_alloc() with GFP_ATOMIC,
which is not necessary.
bfusb_send_frame() is only set to hdev->send, and hdev->send() is never
called in atomic context.
bfusb_send_frame() calls bt_skb_alloc() with GFP_ATOMIC, which is not
necessary. GFP_ATOMIC can be replaced with GFP_KERNEL.
This is found by a static analysis tool named DCNS written by myself.
I al
The clocks property should either be present for all the CPUs of a
cluster or none. If these are present only for a subset of CPUs of a
cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating syste
Add description of 'snps,incr-burst-type-adjustment'
Signed-off-by: Ran Wang
Signed-off-by: Pengbo Mu
---
Changes in v1:
- add description of 'snps,incr-burst-type-adjustment' property
---
Documentation/devicetree/bindings/usb/dwc3.txt | 6 ++
1 file changed, 6 insertions(+)
diff --git a/
On 20-07-18, 09:53, Marcel Ziswiler wrote:
> From: Marcel Ziswiler
>
> The property "irq-over-gpio" simply does not exist (this is nowadays
> actually auto detected) and the property "irq-gpios" is actually called
> "irq-gpios".
"irq-gpio" ?
>
> Signed-off-by: Marcel Ziswiler
>
> ---
>
>
Hi Michal
OK, thanks. Is there any problems for V14?
Thanks
READ_BUF(8);
dummy = be32_to_cpup(p++);
dummy = be32_to_cpup(p++);
...
READ_BUF(4);
dummy = be32_to_cpup(p++);
Assigning value to "dummy" here, but that stored value
is overwritten before it can be used.
At the same time READ_BUF() will re-update the pointer p.
delete invalid assignment statement
On Mon, 9 Jul 2018, Matthew Wilcox wrote:
> On Fri, Jul 06, 2018 at 06:19:02PM -0700, syzbot wrote:
> > Hello,
> >
> > syzbot found the following crash on:
> >
> > HEAD commit:526674536360 Add linux-next specific files for 20180706
> > git tree: linux-next
> > console output: https://sy
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think my
On Mon, Jul 23, 2018 at 3:08 AM, Trond Myklebust wrote:
>On Sun, 2018-07-22 at 15:01 -0400, Chuck Lever wrote:
>> > On Jul 22, 2018, at 2:33 PM, Trond Myklebust <
>> > tron...@hammerspace.com> wrote:
>> >
>> > On Sun, 2018-07-22 at 14:12 -0400, Chuck Lever wrote:
>> > > > On Jul 22, 2018, at 4:50
Hi Arnaldo,
On Wed, Jul 11, 2018 at 03:45:39PM +0800, Leo Yan wrote:
Just want to confirm, I saw the first two patches in this serise have
been merged into perf/core branch [1], but the last 4 patches are
missed.
Could I know if you have trouble when you apply them? Or anything
need me to follo
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Tel/Fax : +22996022836
Dear Friend,
Good day dear, i hope this letter meets you well? my name is Jack, I know this
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Hi, all
this is a bug of 0day environment, please ignore the report.
Thanks,
Rong, Chen
-Original Message-
From: LKP [mailto:lkp-boun...@lists.01.org] On Behalf Of kernel test robot
Sent: Sunday, July 22, 2018 3:42 PM
To: Dominique Martinet
Cc: l...@01.org; lkp ; LKML
Subject: [LKP] [l
On Fri, 20 Jul 2018 at 21:27, Radim Krcmar wrote:
>
> 2018-07-20 10:04+0200, Paolo Bonzini:
> > On 20/07/2018 05:53, Wanpeng Li wrote:
> > >>> - ret = kvm_hypercall3(KVM_HC_SEND_IPI, ipi_bitmap_low,
> > >>> ipi_bitmap_high, vector);
> > >>> + switch (vector) {
> > >>> + default:
> > >
From: Wanpeng Li
The NMI delivery mode of ICR is used to deliver an NMI to the processor,
and the vector information is ignored.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Vitaly Kuznetsov
Signed-off-by: Wanpeng Li
---
arch/x86/kernel/kvm.c | 15 ---
arch/x86/kvm/x86.c| 16
From: Wanpeng Li
Expose PV_SEND_IPI feature bit to guest, the guest can check this feature
bit before using paravirtualized send IPIs.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Vitaly Kuznetsov
Signed-off-by: Wanpeng Li
---
Documentation/virtual/kvm/cpuid.txt | 4
arch/x86/kvm/cpuid.c
From: Wanpeng Li
Using hypercall to send IPIs by one vmexit instead of one by one for
xAPIC/x2APIC physical mode and one vmexit per-cluster for x2APIC cluster
mode. Intel guest can enter x2apic cluster mode when interrupt remmaping
is enabled in qemu, however, latest AMD EPYC still just support
Hi, Takashi:
we tested for the whole weekend, your patch works, no panic issue seen.
You can safe merge you patch.
-Original Message-
From: Takashi Iwai
Sent: Thursday, July 19, 2018 5:11 PM
To: Zhang, Jun
Cc: He, Bo ; alsa-de...@alsa-project.org; pe...@perex.cz;
linux-kernel@
From: Wanpeng Li
Implement paravirtual apic hooks to enable PV IPIs.
apic->send_IPI_mask
apic->send_IPI_mask_allbutself
apic->send_IPI_allbutself
apic->send_IPI_all
This patch lets a guest which sends multicast IPIs at most can handle 128 vCPUs
per hypercall on 64-bit machines and 64 vCPUs per
From: Wanpeng Li
Add kvm hypervisor init time platform setup callback which
will be used to replace native apic hooks by pararvirtual
hooks.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Vitaly Kuznetsov
Signed-off-by: Wanpeng Li
---
arch/x86/kernel/kvm.c | 10 ++
1 file changed, 10 insert
From: Wanpeng Li
Fallback to original apic hooks when unlikely kvm fails to add the
pending IRQ to lapic.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Vitaly Kuznetsov
Signed-off-by: Wanpeng Li
---
arch/x86/kernel/kvm.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
Using hypercall to send IPIs by one vmexit instead of one by one for
xAPIC/x2APIC physical mode and one vmexit per-cluster for x2APIC cluster
mode. Intel guest can enter x2apic cluster mode when interrupt remmaping
is enabled in qemu, however, latest AMD EPYC still just supports xapic
mode which
On Sat, 2018-07-21 at 09:53 +0200, Greg Kroah-Hartman wrote:
> > > So I hate using kobject_get_unless_zero(), and resisted ever adding it
> > > to the tree as it shows a bad locking/tree situation as you point out
> > > here. But for some reason, the block developers seemed to insist they
> > > ne
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