Reviewed-by: JC Kuo
On 1/25/19 7:30 PM, Thierry Reding wrote:
From: Thierry Reding
Adds the XUSB pad and XUSB controllers on Tegra186.
Signed-off-by: Thierry Reding
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 135 +++
1 file changed, 135 insertions(+)
diff --git
On Mon, Jan 28, 2019 at 8:37 AM Nick Desaulniers
wrote:
> So this test has been broken? If so, do you know for how long? Or
> who's monitoring them? Either way, thanks for noticing and fixing.
No, it's been working fine. It just consumes 100% cpu during the
spin-wait. The intention was to sleep
On Sun, Jan 27, 2019 at 07:19:16PM +0100, Tomasz Duszynski wrote:
> Add device tree support for Plantower PMS7003 particulate matter sensor.
>
> Signed-off-by: Tomasz Duszynski
> ---
> .../iio/chemical/plantower,pms7003.txt| 19 +++
> 1 file changed, 19 insertions(+)
>
On Sun, Jan 27, 2019 at 12:04:44PM +0100, Thomas Gleixner wrote:
> On Mon, 21 Jan 2019, tip-bot for Kangjie Lu wrote:
> > diff --git a/kernel/sched/core.c b/kernel/sched/core.c
> > index a674c7db2f29..d4d3514c4fe9 100644
> > --- a/kernel/sched/core.c
> > +++ b/kernel/sched/core.c
> > @@ -4499,6
Reviewed-by: JC Kuo
On 1/25/19 7:30 PM, Thierry Reding wrote:
From: JC Kuo
This commit adds Tegra186 XUSB host mode controller support. This is
very similar to the existing support for Tegra124 and Tegra210, except
that the number of ports and PHYs differs and the IPFS wrapper being
gone.
On Sun, Jan 27, 2019 at 8:49 AM Mike Rapoport wrote:
>
> On Fri, Jan 25, 2019 at 11:47:03PM +0200, Oded Gabbay wrote:
> > On Wed, Jan 23, 2019 at 2:28 PM Mike Rapoport wrote:
> > >
> > > On Wed, Jan 23, 2019 at 02:00:47AM +0200, Oded Gabbay wrote:
> > > > This patch adds the CB module, which
On Fri, Jan 25, 2019 at 08:43:10PM +0100, Andreas Kemnade wrote:
> The GTA04 has a w2sg0004 or w2sg0084 gps chip. Not detectable
> which one is mounted so use the compatibility entry for w2sg0004
> for all which will work for both.
>
> Signed-off-by: Andreas Kemnade
> ---
> w2sg0004 bindings
Reviewed-by: JC Kuo
On 1/25/19 7:30 PM, Thierry Reding wrote:
From: JC Kuo
Starting with Tegra186, the XUSB controller no longer has the IPFS
wrapper. This commit adds a "has_ipfs" field to struct tegra_xusb_soc
that can be used to declare the existence of the IPFS wrapper.
For the existing
Any chance to get a review on this one?
On Mon, Jan 14, 2019 at 10:41:40AM +0100, Christoph Hellwig wrote:
> Hi Robin,
>
> please take a look at this series, which implements a completely generic
> set of dma_map_ops for IOMMU drivers. This is done by taking the
> existing arm64 code, moving it
HI Alexandru
On Mon, Jan 28, 2019 at 8:47 AM Alexandru Ardelean
wrote:
>
> On Mon, Jan 28, 2019 at 9:43 AM Ricardo Ribalda Delgado
> wrote:
> >
> > HI Alexandru
> >
> > On Mon, Jan 28, 2019 at 8:38 AM Alexandru Ardelean
> > wrote:
> > >
> > > On Sat, Jan 26, 2019 at 8:21 PM Jonathan Cameron
> On Jan 25, 2019, at 4:05 AM, Bjorn Helgaas wrote:
>
> On Thu, Jan 24, 2019 at 11:29:37PM +0800, Kai Heng Feng wrote:
>>> On Jan 24, 2019, at 11:15 PM, Bjorn Helgaas wrote:
>>> On Wed, Jan 23, 2019 at 03:17:37PM +0800, Kai Heng Feng wrote:
> On Jan 23, 2019, at 7:51 AM, Bjorn Helgaas
On Fri, Jan 25, 2019 at 9:10 PM Maxime Ripard wrote:
>
> On Thu, Jan 24, 2019 at 11:28:01PM +0530, Jagan Teki wrote:
> > The ov5640_try_frame_interval operation updates the FPS as per user
> > input based on default ov5640_frame_rate, OV5640_30_FPS which is failed
> > to update when user trigger
On Mon, Jan 28, 2019 at 9:43 AM Ricardo Ribalda Delgado
wrote:
>
> HI Alexandru
>
> On Mon, Jan 28, 2019 at 8:38 AM Alexandru Ardelean
> wrote:
> >
> > On Sat, Jan 26, 2019 at 8:21 PM Jonathan Cameron wrote:
> > >
> > > On Fri, 25 Jan 2019 11:04:51 +0100
> > > Ricardo Ribalda Delgado wrote:
>
Thanks again Guenter,
On Sat, Jan 26, 2019 at 08:30:24AM -0800, Guenter Roeck wrote:
> On 1/25/19 3:05 AM, Matti Vaittinen wrote:
> > +/*
> > + * We read regs RTC_SEC => RTC_YEAR
> > + * this struct is ordered according to chip registers.
> > + * Keep it u8 only to avoid padding issues.
> > + */
Reviewed-by: JC Kuo
On 1/25/19 7:30 PM, Thierry Reding wrote:
From: Thierry Reding
Extend the bindings to cover the set of features found in Tegra186.
Signed-off-by: Thierry Reding
---
.../devicetree/bindings/usb/nvidia,tegra124-xusb.txt | 4
1 file changed, 4
Reviewed-by: JC Kuo
On 1/25/19 7:25 PM, Thierry Reding wrote:
From: JC Kuo
Add support for the XUSB pad controller found on Tegra186 SoCs. It is
mostly similar to the same IP found on earlier chips, but the number of
pads exposed differs, as do the programming sequences.
Note that the
HI Alexandru
On Mon, Jan 28, 2019 at 8:38 AM Alexandru Ardelean
wrote:
>
> On Sat, Jan 26, 2019 at 8:21 PM Jonathan Cameron wrote:
> >
> > On Fri, 25 Jan 2019 11:04:51 +0100
> > Ricardo Ribalda Delgado wrote:
> >
> > > Add support for ADS7866, ADS7867 and ADS7868 8/10/12 bit Single channel
> >
On Sun, Jan 27, 2019 at 8:39 AM Mike Rapoport wrote:
>
> On Fri, Jan 25, 2019 at 10:32:55PM +0200, Oded Gabbay wrote:
> > On Wed, Jan 23, 2019 at 2:28 PM Mike Rapoport wrote:
> > >
> > > On Wed, Jan 23, 2019 at 02:00:45AM +0200, Oded Gabbay wrote:
> > > > This patch adds a basic support for the
Hi Jonas,
On Sat, Jan 26, 2019 at 4:40 PM Jonas Bonn wrote:
> On 26/01/2019 11:25, Geert Uytterhoeven wrote:
> > On Sat, Jan 26, 2019 at 8:53 AM Jonas Bonn wrote:
> >> On 25/01/2019 18:50, Mark Brown wrote:
> >>> On Fri, Jan 25, 2019 at 05:47:13PM +, Mark Brown wrote:
> On Fri, Jan 25,
On Fri, Jan 25, 2019 at 7:25 PM Stanimir Varbanov
wrote:
>
> Hi Tomasz,
>
> Thanks for the comments!
>
> On 1/25/19 9:59 AM, Tomasz Figa wrote:
> > .Hi Stan,
> >
> > On Fri, Jan 18, 2019 at 1:21 AM Stanimir Varbanov
> > wrote:
> >>
> >> This refactored code for start/stop streaming vb2
On Sat, Jan 26, 2019 at 8:21 PM Jonathan Cameron wrote:
>
> On Fri, 25 Jan 2019 11:04:51 +0100
> Ricardo Ribalda Delgado wrote:
>
> > Add support for ADS7866, ADS7867 and ADS7868 8/10/12 bit Single channel
> > ADC.
> >
I don't want this reply be offensive or anything.
But since I've seen this
Hello Lee, All
On Mon, Jan 28, 2019 at 07:19:36AM +, Lee Jones wrote:
> On Fri, 25 Jan 2019, Matti Vaittinen wrote:
>
> > Patch series introducing support for ROHM BD70528 PMIC
> >
> > Please note that patch 1 breaks compilation without patches 2 and 3
> >
> > ROHM BD70528 is a
On Sat, Jan 26, 2019 at 06:11:24PM +0100, Helge Deller wrote:
> Thanks for doing that!
> I tested it. Your patches work, but you need the fixup below (0-day
> testing complained as well).
I actually sent a v2 series since then which makes sure the new iommu.h
includes , so that we don't rely on
On 1/28/19, Lee Jones wrote:
> Re-sending due to dodgy looking 'reply-to'.
>
> On Sun, 27 Jan 2019, Billy Laws wrote:
>
>> >This patch adds PMIC configurations for low-battery
>> >monitoring by handling max77620 register CNFGGLBL1.
>> >
>> It might be an idea to add lbhyst configuration here and
On Fri, Jan 25, 2019 at 9:12 PM Maxime Ripard wrote:
>
> On Thu, Jan 24, 2019 at 11:37:33PM +0530, Jagan Teki wrote:
> > CSI block in Allwinner A64 has similar features as like in H3,
> > but the default CSI_SCLK rate cannot work properly to drive the
> > connected sensor interface.
> >
> > The
Add following V4L2 QP parameters for H.264:
* V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MIN_QP
* V4L2_CID_MPEG_VIDEO_H264_I_FRAME_MAX_QP
* V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MIN_QP
* V4L2_CID_MPEG_VIDEO_H264_P_FRAME_MAX_QP
These controls will limit QP range for intra and inter frame,
provide more manual
On Sat, Jan 26, 2019 at 8:09 PM Jonathan Cameron wrote:
>
> On Fri, 25 Jan 2019 10:19:54 +0200
> Alexandru Ardelean wrote:
>
> > On Thu, Jan 24, 2019 at 9:35 PM Rodrigo Ribeiro
> > wrote:
> > >
> > > Remove the checkpatch.pl check:
> > >
> > > CHECK: 'RESEVERD' may be misspelled - perhaps
On Thu, 24 Jan 2019, Sinan Kaya wrote:
> On 1/24/2019 5:51 AM, Rafael J. Wysocki wrote:
> > Is anyone taking this or should I?
>
> Nobody replied to this yet. I was hoping this series to go through acpi
> tree like the rest of the other fixes.
[post-vacation reply]
That's not how these things
Hi Thierry,
I think any non-zero return value of
regulator_bulk_enable()/devm_regulator_bulk_get() means error.
Thanks,
JC
On 1/25/19 7:25 PM, Thierry Reding wrote:
From: Thierry Reding
Support enabling various supplies needed to provide power to the PLLs
and logic used to drive the USB,
Hi Michael
> Task competition inside a cgroup won't be considered as cgroup's
> competition, please try create another cgroup with dead loop on
> each CPU
Yes, you are right, but I don't think we just need to account for
cgroup's competition,
because this factor does not reflect cgroup internal
On Fri, 25 Jan 2019, Matti Vaittinen wrote:
> Patch series introducing support for ROHM BD70528 PMIC
>
> Please note that patch 1 breaks compilation without patches 2 and 3
>
> ROHM BD70528 is a programmable Power Management IC for battery
> powered 'ultra low power' systems like the
On Fri, Jan 25, 2019 at 2:10 PM Maxime Ripard wrote:
>
> On Thu, Jan 24, 2019 at 11:22:54PM +0530, Jagan Teki wrote:
> > Amarula A64 Relic has STLM75 sensor for digital temperature
> > and thermal watchdog.
> >
> > Add support for it.
> >
> > Signed-off-by: Jagan Teki
> > ---
> > Note: the
Re-sending due to dodgy looking 'reply-to'.
On Sun, 27 Jan 2019, Billy Laws wrote:
> >This patch adds PMIC configurations for low-battery
> >monitoring by handling max77620 register CNFGGLBL1.
> >
> It might be an idea to add lbhyst configuration here and support using
> custom lbdac values to
On Sun, 27 Jan 2019, Billy Laws wrote:
> >This patch adds PMIC configurations for low-battery
> >monitoring by handling max77620 register CNFGGLBL1.
> >
> It might be an idea to add lbhyst configuration here and support using
> custom lbdac values to specify a different cutoff point.
Do you know
Hi Marc,
Thanks for your review.
On 2019/1/26 19:38, Marc Zyngier wrote:
> Hi Zheng,
>
> On Sat, 26 Jan 2019 06:16:24 +,
> Zheng Xiang wrote:
>>
>> Currently each PCI device under a PCI Bridge shares the same device id
>> and ITS device. Assume there are two PCI devices call
Hi Jiri, Arnaldo,
On 22.01.2019 20:45, Alexey Budankov wrote:
>
> It has been observed that trace reading thread runs on the same hw thread
> most of the time during perf record sampling collection. This scheduling
> layout leads up to 30% profiling overhead in case when some cpu intensive
>
PERF_RECORD_COMPRESSED records are decompressed from trace file into
a linked list of mmaped memory regions using streaming Zstandard API.
After that the regions are loaded fetching uncompressed events. When
dumping raw trace (e.g., perf report -D --header) file offsets of
events from compressed
On Mon, Jan 28, 2019 at 10:08:12AM +0530, Vijai Kumar K wrote:
I was wondering, what is the normal procedure in the below case
when the build fails because of the driver.
Should I send a new patch as a whole [PATCH v3] for the driver
or should I send a new patch to fix the issue like below.
Compression is implemented using simple Zstd API and employs AIO data
buffer as the memory to operate on. If the API call fails for some
reason compression falls back to memcpy().
Data chunks are split and packed into PERF_RECORD_COMPRESSED records
by 64KB at max. mmap-flush option value can be
Implement -z,--compression_level= and --mmap-flush=
options as well as a special PERF_RECORD_COMPRESSED record that contains
compressed parts of kernel data buffer.
Because compression requires auxiliary memory to implement encoding of
kernel data record->opts.nr_cblocks == -1 signifies to
Reviewed-by: JC Kuo
On 1/25/19 7:25 PM, Thierry Reding wrote:
From: Thierry Reding
The device tree bindings document the "mode" property of "ports"
subnodes, but the driver was not parsing the property. In preparation
for adding role switching, parse the property at probe time.
Based on
Reviewed-by: JC Kuo
On 1/25/19 7:25 PM, Thierry Reding wrote:
From: JC Kuo
Tegra186 USB2 pads and USB3 pads do not have hardware mux for changing
the pad function. For such "lanes", we can skip the lane mux register
programming.
Signed-off-by: JC Kuo
Signed-off-by: Thierry Reding
---
Implement libzstd feature check, NO_LIBZSTD and LIBZSTD_DIR defines
to overrride Zstd library sources or disable the feature from the
command line:
$ make -C tools/perf LIBZSTD_DIR=/root/abudanko/zstd-1.3.7 clean all
$ make -C tools/perf NO_LIBZSTD=1 clean all
Signed-off-by: Alexey
After batched used ring updating was introduced in commit e2b3b35eb989
("vhost_net: batch used ring update in rx"). We tend to batch heads in
vq->heads for more than one packet. But the quota passed to
get_rx_bufs() was not correctly limited, which can result a OOB write
in vq->heads.
Reviewed-by: JC Kuo
On 1/25/19 7:25 PM, Thierry Reding wrote:
From: Thierry Reding
Extend the bindings to cover the set of features found in Tegra186. Note
that, technically, there are four more supplies connected to the XUSB
pad controller (DVDD_PEX, DVDD_PEX_PLL, HVDD_PEX and
From: Alexey Khoroshilov
Date: Sat, 26 Jan 2019 22:48:57 +0300
> If phy_power_on() fails in rk_gmac_powerup(), clocks are left enabled.
>
> Found by Linux Driver Verification project (linuxtesting.org).
>
> Signed-off-by: Alexey Khoroshilov
Applied, thank you.
On Sun, Jan 27, 2019 at 02:13:09PM +0100, Christian Zigotzky wrote:
> Christoph,
>
> What shall I do next?
I'll need to figure out what went wrong with the new zone selection
on powerpc and give you another branch to test.
Hi James,
On Fri, Jan 4, 2019 at 11:32 PM James Morse wrote:
>
> Hi Amit,
>
> On 18/12/2018 07:56, Amit Daniel Kachhap wrote:
> > According to userspace settings, pointer authentication cpufeature
> > is enabled/disabled from guests.
>
> This reads like the guest is changing something in the
The patch set implements runtime trace compression for record mode and
trace file decompression for report mode. Zstandard API [1] is used for
compression/decompression of data that come from perf_events kernel
data buffers.
Realized -z,--compression_level=n option provides ~3-5x avg. trace
From: Peng Li
Date: Sat, 26 Jan 2019 17:18:24 +0800
> This patchset includes bugfixes and code optimizations for the HNS
> ethernet controller driver
Series applied, thank you.
There are only bug fixes in here, so please do not use the word
"optimizations" in such situations.
Thanks.
This is a runtime feature and can be enabled by --ptrauth option.
Signed-off-by: Amit Daniel Kachhap
Cc: Mark Rutland
Cc: Christoffer Dall
Cc: Marc Zyngier
Cc: Kristina Martsenko
Cc: kvm...@lists.cs.columbia.edu
Cc: Ramana Radhakrishnan
Cc: Will Deacon
---
According to userspace settings, ptrauth key registers are conditionally
present in guest system register list based on user specified flag
KVM_ARM_VCPU_PTRAUTH.
Signed-off-by: Amit Daniel Kachhap
Cc: Mark Rutland
Cc: Christoffer Dall
Cc: Marc Zyngier
Cc: Kristina Martsenko
Cc:
When pointer authentication is supported, a guest may wish to use it.
This patch adds the necessary KVM infrastructure for this to work, with
a semi-lazy context switch of the pointer auth state.
Pointer authentication feature is only enabled when VHE is built
into the kernel and present into CPU
This feature will allow the KVM guest to allow the handling of
pointer authentication instructions or to treat them as undefined
if not set. It uses the existing vcpu API KVM_ARM_VCPU_INIT to
supply this parameter instead of creating a new API.
A new register is not created to pass this parameter
Hi,
This patch series adds pointer authentication support for KVM guest and
is based on top of Linux 5.0-rc3. The basic patches in this series was
originally posted by Mark Rutland earlier[1,2] and contains some history
of this work.
Extension Overview:
tiocmget() and tiocmset() operations are optional and some tty drivers
like pty miss the operations. We need NULL check before referencing
them.
Reported-by: syzbot+a950165cbb86bdd02...@syzkaller.appspotmail.com
Signed-off-by: Myungho Jung
---
drivers/bluetooth/hci_ath.c | 13 -
When restoring HCR_EL2 for the host, KVM uses HCR_HOST_VHE_FLAGS, which
is a constant value. This works today, as the host HCR_EL2 value is
always the same, but this will get in the way of supporting extensions
that require HCR_EL2 bits to be set conditionally for the host.
To allow such features
The keys can be switched either inside an assembly or such
functions which do not have pointer authentication checks, so a GCC
attribute is added to enable it.
A function ptrauth_keys_store is added which is similar to existing
function ptrauth_keys_switch but saves the key values in memory.
This
tty_set_termios() should be called with slave side of pty driver. So, If
tty driver is pty master, it needs to be switched to ->link.
Reported-by: syzbot+a950165cbb86bdd02...@syzkaller.appspotmail.com
Signed-off-by: Myungho Jung
---
drivers/bluetooth/hci_ldisc.c | 20 +++-
1
On Mon, 28 Jan 2019, Cheng-yi Chiang wrote:
> Hi Lee,
> Could you please give Mark a tag so he can merge ?
> The later patch for cros_ec_codec driver is pending on it.
Apologies for not getting back to you.
I was waiting to see if my late PR would be merged.
It was, which means the tag you
Use struct_size() in kzalloc instead of the 'regd_to_copy'
Signed-off-by: YueHaibing
---
drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
Use kmemdup rather than duplicating its implementation
Signed-off-by: YueHaibing
---
drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
On 28-01-19, 12:11, Amit Kucheria wrote:
> Add a flag for cpufreq drivers to tell cpufreq core to auto-register
> themselves as a thermal cooling device.
>
> There series converts over all the drivers except arm_big_little.c.
> Tested on SDM845 with the qcom-cpufreq-hw driver. Only compile-tested
Use the CPUFREQ_AUTO_REGISTER_COOLING_DEV flag to allow cpufreq core to
automatically register as a thermal cooling device.
This allows removal of boiler plate code from the driver.
Signed-off-by: Amit Kucheria
---
drivers/cpufreq/mediatek-cpufreq.c | 14 ++
1 file changed, 2
Use the CPUFREQ_AUTO_REGISTER_COOLING_DEV flag to allow cpufreq core to
automatically register as a thermal cooling device.
This allows removal of boiler plate code from the driver.
Signed-off-by: Amit Kucheria
Acked-by: Sudeep Holla
---
drivers/cpufreq/scmi-cpufreq.c | 14 ++
1
Use the CPUFREQ_AUTO_REGISTER_COOLING_DEV flag to allow cpufreq core to
automatically register as a thermal cooling device.
This allows removal of boiler plate code from the driver.
Signed-off-by: Amit Kucheria
Acked-by: Sudeep Holla
---
drivers/cpufreq/scpi-cpufreq.c | 14 ++
1
Use the CPUFREQ_AUTO_REGISTER_COOLING_DEV flag to allow cpufreq core to
automatically register as a thermal cooling device.
This allows removal of boiler plate code from the driver.
Signed-off-by: Amit Kucheria
---
drivers/cpufreq/imx6q-cpufreq.c | 24 ++--
1 file changed,
YueHaibing (2):
iwlwifi: Use kmemdup instead of duplicating its function
iwlwifi: Use struct_size() in kzalloc
drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
--
2.7.4
Use the CPUFREQ_AUTO_REGISTER_COOLING_DEV flag to allow cpufreq core to
automatically register as a thermal cooling device.
This allows removal of boiler plate code from the driver.
Signed-off-by: Amit Kucheria
---
drivers/cpufreq/qoriq-cpufreq.c | 15 ++-
1 file changed, 2
Use the CPUFREQ_AUTO_REGISTER_COOLING_DEV flag to allow cpufreq core to
automatically register as a thermal cooling device.
This allows removal of boiler plate code from the driver.
Signed-off-by: Amit Kucheria
---
drivers/cpufreq/cpufreq-dt.c | 14 ++
1 file changed, 2
Add the CPUFREQ_AUTO_REGISTER_COOLING_DEV flag to allow the cpufreq core
to auto-register the driver as a cooling device.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
Tested-by: Matthias Kaehlcke
Reviewed-by: Stephen Boyd
---
drivers/cpufreq/qcom-cpufreq-hw.c | 3 ++-
1 file
All cpufreq drivers do similar things to register as a cooling device.
Provide a cpufreq driver flag so drivers can just ask the cpufreq core
to register the cooling device on their behalf. This allows us to get
rid of duplicated code in the drivers.
In order to allow this, we add a struct
The CPU cooling driver (cpu_cooling.c) allows the platform's cpufreq
driver to register as a cooling device and cool down the platform by
throttling the CPU frequency. In order to be able to auto-register a
cpufreq driver as a cooling device from the cpufreq core, we need access
to code inside
Add a flag for cpufreq drivers to tell cpufreq core to auto-register
themselves as a thermal cooling device.
There series converts over all the drivers except arm_big_little.c.
Tested on SDM845 with the qcom-cpufreq-hw driver. Only compile-tested the
others.
Things needing fixing (but not a
On Mon 28-01-19 11:37:00, Mikhail Gavrilov wrote:
> > Linus, could you take the revert please?
> >
> > From 817b18d3db36a6900ca9043af8c1416c56358be3 Mon Sep 17 00:00:00 2001
> > From: Michal Hocko
> > Date: Fri, 25 Jan 2019 19:08:58 +0100
> > Subject: [PATCH] Revert "mm, memory_hotplug:
> Linus, could you take the revert please?
>
> From 817b18d3db36a6900ca9043af8c1416c56358be3 Mon Sep 17 00:00:00 2001
> From: Michal Hocko
> Date: Fri, 25 Jan 2019 19:08:58 +0100
> Subject: [PATCH] Revert "mm, memory_hotplug: initialize struct pages for the
> full memory section"
>
> This
On 1/26/19 2:05 PM, YueHaibing wrote:
> There is no need to have the 'struct drm_framebuffer *fb' variable
> static since new value always be assigned before use it.
>
> Signed-off-by: YueHaibing
Good catch, thank you!
Reviewed-by: Oleksandr Andrushchenko
> ---
>
On Mon, Jan 14, 2019 at 4:08 PM Oleksandr Andrushchenko
wrote:
>
> On 1/7/19 7:37 PM, Souptick Joarder wrote:
> > Remove duplicate header which is included twice.
> >
> > Signed-off-by: Souptick Joarder
> Reviewed-by: Oleksandr Andrushchenko
Can we get this patch in queue for 5.1 ?
> > ---
> >
On Fri, Jan 11, 2019 at 8:37 PM Souptick Joarder wrote:
>
> Convert to use vm_insert_range() to map range of kernel
> memory to user vma.
>
> Signed-off-by: Souptick Joarder
Any comment on this patch ?
> ---
> drivers/iommu/dma-iommu.c | 12 +---
> 1 file changed, 1 insertion(+), 11
On Fri, Jan 11, 2019 at 8:35 PM Souptick Joarder wrote:
>
> Convert to use vm_insert_range() to map range of kernel
> memory to user vma.
>
> Signed-off-by: Souptick Joarder
Any comment on this patch ?
> ---
> drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 17 ++---
> 1 file
Add a driver for Renesas R-Car Gen3 RPC-IF SPI controller.
Signed-off-by: Mason Yang
Signed-off-by: Sergei Shtylyov
---
drivers/spi/Kconfig | 6 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-renesas-rpc.c | 804 ++
3 files changed,
Document the bindings used by the Renesas R-Car Gen3 RPC-IF controller.
Signed-off-by: Mason Yang
---
.../devicetree/bindings/spi/spi-renesas-rpc.txt| 40 ++
1 file changed, 40 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt
Hi Mark,
v8 patch including:
1) Supported SoC-specific values in DTS.
2) Rename device node name as flash.
v7 patch is according to Geert and Sergei's comments:
1) Add all R-Car Gen3 model in dts.
2) patch rpc-if child node search.
3) minror coding style.
v6 patch is accroding to Geert, Marek
From: "vincent.wang"
When a task that is in_iowait state is enqueued, cpufreq_update_util()
will be invoked with SCHED_CPUFREQ_IOWAIT flag. In this case,the value
of util and cap, which are parameters used in map_util_freq(), will be
cpu frequency, instead of cpu util and capactiy.
For some
> > Some Posted-Interrupts from passthrough devices may be lost or
> > overwritten when the vCPU is in runnable state.
> >
> > The SN (Suppress Notification) of PID (Posted Interrupt Descriptor)
> > will be set when the vCPU is preempted (vCPU in KVM_MP_STATE_RUNNABLE
> > state but not running on
Add an fsl,imx8mq compatible string
Signed-off-by: Angus Ainslie (Purism)
Reviewed-by: Lucas Stach
---
Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
Add sdma support for the imx8mq
Changes since V4
Builds against 5.0-rc4.
Dropped device tree additions, will send a separate patch.
Fixed sdma1 alignement.
Dropped phandles in favour of of_nodes.
Refactored SDMA_H_CONFIG register fix.
Changes since V3
Builds against 5.0-rc3.
Dropped sdma
On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't be supportted,
since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
to 500Mhz, so use 1:1 instead.
Based on NXP commit MLK-16841-1 by Robin Gong
Signed-off-by: Angus Ainslie (Purism)
---
drivers/dma/imx-sdma.c | 18
On i.mx8mq, there are two sdma instances, and the common dma framework
will get a channel dynamically from any available sdma instance whether
it's the first sdma device or the second sdma device. Some IPs like
SAI only work with sdma2 not sdma1. To make sure the sdma channel is from
the correct
This is identical to the imx7d.
Signed-off-by: Angus Ainslie (Purism)
---
drivers/dma/imx-sdma.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 757fad2fbfae..c4db4fe6bcc9 100644
--- a/drivers/dma/imx-sdma.c
+++
Without the copy being aligned sdma1 fails ~10% of the time
Signed-off-by: Angus Ainslie (Purism)
---
drivers/dma/imx-sdma.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index d5f86becf59e..88910ec09568 100644
--- a/drivers/dma/imx-sdma.c
On 1/25/2019 7:34 PM, Jon Hunter wrote:
On 25/01/2019 13:58, Takashi Iwai wrote:
On Fri, 25 Jan 2019 14:26:27 +0100,
Jon Hunter wrote:
On 25/01/2019 12:40, Takashi Iwai wrote:
On Fri, 25 Jan 2019 12:36:00 +0100,
Jon Hunter wrote:
On 24/01/2019 19:08, Takashi Iwai wrote:
On Thu, 24 Jan
Hi Boris & Miquel,
Could you please provide your thoughts on this driver to support HW-ECC?
As I said previously, there is no way to detect errors beyond N bit.
I am ok to update the driver based on your inputs.
Thanks,
Naga Sureshkumar Relli
> -Original Message-
> From: linux-mtd
On 2019/1/27 5:24, Joe Perches wrote:
> On Sat, 2019-01-26 at 20:42 +0800, YueHaibing wrote:
>> Use kmemdup rather than duplicating its implementation
> []
>> diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
>> b/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
> []
>> @@
The CP2104 chips feature 4 controllable GPIO pins, which are similar to
the ones on CP2102N chip (output-only when push-pull, output or
simulated input mode when open-drain).
Add support for the GPIO pins for cp210x driver. The pin get/set routine
is shared with CP2102N, but the pinconf
On Thu, Nov 15, 2018 at 11:56 PM Maxime Ripard
wrote:
>
> From: Pawel Osciak
>
> Stateless video codecs will require both the H264 metadata and slices in
> order to be able to decode frames.
>
> This introduces the definitions for a new pixel format for H264 slices that
> have been parsed, as
This series adds support for OSPI version of Cadence QSPI controller IP.
Tested with AM654 EVM with MT35x512 Octal flash
Changes:
v5:
Fix comments from by on v4.
v4:
Fix comments on v3 by Tudor.
Rebase on top latest linux-next(all dependencies are now part of -next)
v3:
Rebase on top of v7 of
Cadence OSPI controller IP supports Octal IO (x8 IO lines),
It also has an integrated PHY. IP register layout is very
similar to existing QSPI IP except for additional bits to support Octal
and Octal DDR mode. Therefore, extend current driver to support Octal
mode. Only Octal SDR read (1-1-8)mode
AM654 SoC has Cadence Octal SPI controller, which is similar to Cadence
QSPI controller but supports Octal IO(x8 data lines) and Double Data
Rate(DDR) mode. Add new compatible to support OSPI controller on TI's
AM654 SoCs.
Signed-off-by: Vignesh R
Reviewed-by: Rob Herring
---
On Fri, 25 Jan 2019 at 21:04, Takashi Iwai wrote:
> > >
> > > Erm, obviously it's not enough. Each attach / detach needs to manage
> > > the refcount, too, for covering the cases above. It can re-use the
> > > PCM mmap_refount, though.
> >
> > But we've used the DMA buffer file's refcounting to
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