On Tue, May 14, 2019 at 12:09 AM Bjorn Andersson
wrote:
>
> On Fri 10 May 04:29 PDT 2019, Amit Kucheria wrote:
>
> Subject indicates pluralism, but this fixes a specific platform
> (board?). I think you should update that.
Copy paste from the previous cleanup commit :-) Will fix.
> > The
From: Wanpeng Li
MSR IA32_MSIC_ENABLE bit 18, according to SDM:
| When this bit is set to 0, the MONITOR feature flag is not set
(CPUID.01H:ECX[bit 3] = 0).
| This indicates that MONITOR/MWAIT are not supported.
|
| Software attempts to execute MONITOR/MWAIT will cause #UD when this bit is
Signed-off-by: Kovtunenko Oleksandr
---
fs/cifs/cifsfs.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c
index a05bf1d..2964438 100644
--- a/fs/cifs/cifsfs.c
+++ b/fs/cifs/cifsfs.c
@@ -1073,11 +1073,6 @@ ssize_t cifs_file_copychunk_range(unsigned int
On Wed, Apr 24, 2019 at 12:57 PM Ley Foon Tan wrote:
>
> Altera MSI IP is a soft IP and is only available after
> FPGA image is programmed.
>
> Make driver modulable to support use case FPGA image is programmed
> after kernel is booted. User proram FPGA image in kernel then only load
> MSI driver
On Wed, Apr 24, 2019 at 12:57 PM Ley Foon Tan wrote:
>
> Altera PCIe Rootport IP is a soft IP and is only available after
> FPGA image is programmed.
>
> Make driver modulable to support use case FPGA image is programmed
> after kernel is booted. User proram FPGA image in kernel then only load
>
On 5/13/2019 8:45 PM, Rob Herring wrote:
On Tue, May 7, 2019 at 3:25 AM Vidya Sagar wrote:
On 4/26/2019 8:02 PM, Rob Herring wrote:
On Wed, Apr 24, 2019 at 10:49:55AM +0530, Vidya Sagar wrote:
Add support to enable CDM (Configuration Dependent Module) registers check
for any data
On 5/13/2019 8:40 PM, Rob Herring wrote:
On Mon, May 13, 2019 at 10:36:17AM +0530, Vidya Sagar wrote:
Add support to enable CDM (Configuration Dependent Module) registers check
for any data corruption. CDM registers include standard PCIe configuration
space registers, Port Logic registers and
> >
> >
> > Hi Dan,
> >
> > While testing device mapper with DAX, I faced a bug with the commit:
> >
> > commit ad428cdb525a97d15c0349fdc80f3d58befb50df
> > Author: Dan Williams
> > Date: Wed Feb 20 21:12:50 2019 -0800
> >
> > When I reverted the condition to old code[1] it worked for me. I
>
Hello, Jan.
syzbot is still reporting livelocks inside __getblk_gfp() [1] (similar to
commit 04906b2f542c2362 ("blockdev: Fix livelocks on loop device")).
[1]
https://syzkaller.appspot.com/bug?id=835a0b9e75b14b55112661cbc61ca8b8f0edf767
A debug printk() patch shown below revealed that since
On Mon, May 13, 2019 at 6:48 AM Roberto Sassu wrote:
>
> On 5/11/2019 12:37 AM, Prakhar Srivastava wrote:
> > From: Prakhar Srivastava
> >
> > The buffer(cmdline args) added to the ima log cannot be attested
> > without having the actual buffer. Thus to make the measured buffer
> > available to
This patch adds support for GPIO based CS control through SPI core
function spi_set_cs.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index
[V5] : This patch series version includes
- Updated GPIO based chip select control using GPIO descriptor.
- HW based chip select implementation is same as V3 but V5
has this patch updated to be on top of above changes.
- HW CS timing implementation is same as V3
This patch implements set_cs_timing SPI controller method to allow
SPI client driver to configure device specific SPI CS timings.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 48 --
1 file changed, 46 insertions(+), 2
Tegra SPI controller supports both HW and SW based CS control
for SPI transfers.
This patch adds support for HW based CS control where CS is driven
to active state during the transfer and is driven inactive at the
end of the transfer directly by the HW.
This patch enables the use of HW based CS
Tegra SPI master controller has programmable trimmers to adjust the
data with respect to the clock.
These trimmers are programmed in TX_CLK_TAP_DELAY and RX_CLK_TAP_DELAY
fields of COMMAND2 register.
SPI TX trimmer is to adjust the outgoing data with respect to the
outgoing clock and SPI RX
On Mon, 13 May 2019 15:38:24 -0300
Arnaldo Carvalho de Melo wrote:
> Em Fri, May 10, 2019 at 12:12:49AM +0900, Masami Hiramatsu escreveu:
> > Hi,
> >
> > Here is the v8 series of probe-event to support user-space access.
> > Previous version is here.
> >
> >
On Mon, 2019-05-13 at 17:40 +, Roy Pledge wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On 5/13/2019 12:40 PM, Joakim Tjernlund wrote:
> > On Mon,
Add i.MX8QXP GPIO alias for kernel GPIO driver usage.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index
On Mon, May 13, 2019 at 9:56 AM Mimi Zohar wrote:
>
> On Fri, 2019-05-10 at 15:37 -0700, Prakhar Srivastava wrote:
>
> > +/*
> > + * process_buffer_measurement - Measure the buffer passed to ima log.
>
> "passed to ima log" is unnecessary.
>
> > + * (Instead of using the file hash use the buffer
Hi Masahiro,
On Tue, 14 May 2019 13:16:37 +0900 Masahiro Yamada
wrote:
>
> If you are talking about the rebuild of
> .tmp_versions/*.mod files,
> yes, they are cleaned up every time.
>
> # Create temporary dir for module support files
> # clean it up only when building all modules
>
Hi Eduardo,
On Mon, 13 May 2019 20:44:11 -0700 Eduardo Valentin wrote:
>
> Thanks for spotting this. I am re-doing the branch based off v5.1-rc7,
> where the last conflict went in with my current queue.
Its really not worth the rebase. Just fix the build problem and send it
all to Linus.
--
On Mon, May 13, 2019 at 2:45 PM Michal Hocko wrote:
>
> On Mon 13-05-19 14:09:59, Yang Shi wrote:
> [...]
> > I think we can just account 512 base pages for nr_scanned for
> > isolate_lru_pages() to make the counters sane since PGSCAN_KSWAPD/DIRECT
> > just use it.
> >
> > And, sc->nr_scanned
[V4] : This patch series version includes
- Updated GPIO based chip select control using GPIO descriptor.
- HW based chip select implementation is same as V3 but V4
has this patch updated to be on top of above changes.
- HW CS timing implementation is same as V3
Hi all,
Please do not add any v5.3 material to your linux-next included
trees/branches until after v5.2-rc1 has been released.
Changes since 20190513:
The thermal-soc tree still had its build failure for which I applied a
patch.
Non-merge commits (relative to Linus' tree): 2499
2385 files
Tegra SPI controller supports both HW and SW based CS control
for SPI transfers.
This patch adds support for HW based CS control where CS is driven
to active state during the transfer and is driven inactive at the
end of the transfer directly by the HW.
This patch enables the use of HW based CS
This patch implements set_cs_timing SPI controller method to allow
SPI client driver to configure device specific SPI CS timings.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 48 --
1 file changed, 46 insertions(+), 2
This patch adds support for GPIO based CS control through SPI core
function spi_set_cs.
Signed-off-by: Sowjanya Komatineni
---
drivers/spi/spi-tegra114.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index
Tegra SPI master controller has programmable trimmers to adjust the
data with respect to the clock.
These trimmers are programmed in TX_CLK_TAP_DELAY and RX_CLK_TAP_DELAY
fields of COMMAND2 register.
SPI TX trimmer is to adjust the outgoing data with respect to the
outgoing clock and SPI RX
Hi Stephen,
On Tue, May 14, 2019 at 10:04 AM Stephen Rothwell wrote:
>
> Hi Masahiro,
>
> Also, this:
>
> On Tue, 14 May 2019 09:40:53 +0900 Masahiro Yamada
> wrote:
> >
> > > Mind you, I have no itdea why this file was begin rebuilt, the merge
> > > only touched these files:
> > >
> > >
From: Long Li
commit 214bab448476 ("cifs: Call MID callback before destroying transport")
assumes that the MID callback should not take srv_mutex, this may not always
be true. SMB Direct requires the MID callback completed before calling
transport so all pending memory registration can be freed.
From: Long Li
When sending data, use the DMA_TO_DEVICE to map buffers. Also log the number
of requests in a compounding request from upper layer.
Signed-off-by: Long Li
---
fs/cifs/smbdirect.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/fs/cifs/smbdirect.c
Stephen,
On Mon, May 13, 2019 at 10:49:28AM +1000, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the thermal-soc tree got a conflict in:
>
> MAINTAINERS
>
> between commit:
>
> f23afd75fc99 ("RDMA/efa: Add driver to Kconfig/Makefile")
>
> from Linus' tree and commit:
On Fri, May 03, 2019 at 10:44:09AM +0100, Quentin Perret wrote:
> The newly introduced Energy Model framework manages power cost tables in
> a generic way. Moreover, it supports a several types of models since the
> tables can come from DT or firmware (through SCMI) for example. On the
> other
Add i.MX8MQ GPIO alias for kernel GPIO driver usage.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 6d635ba..df33672
On 5/13/2019 12:55 PM, Christoph Hellwig wrote:
On Mon, May 13, 2019 at 10:36:13AM +0530, Vidya Sagar wrote:
Export pcie_pme_disable_msi() & pcie_pme_no_msi() APIs to enable drivers
using these APIs be able to build as loadable modules.
But this is a global setting. If you root port is
After commit 415b43bdb008 "tty: serial: uartlite: Move uart register to
probe", calling uart_unregister_driver unconditionally will trigger a
null pointer dereference due to ulite_uart_driver may not registed.
CPU: 1 PID: 3755 Comm: syz-executor.0 Not tainted 5.1.0+ #28
Hardware name: QEMU
On Mon, May 13, 2019 at 1:47 PM Nathan Chancellor
wrote:
>
> On Thu, May 09, 2019 at 04:35:55PM +0900, Masahiro Yamada wrote:
> > If the compiler specified by $(CC) is not present, the Kconfig stage
> > sprinkles 'not found' messages, then succeeds.
> >
> > $ make CROSS_COMPILE=foo defconfig
>
Hi Greg,
First bad commit (maybe != root cause):
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 63863ee8e2f6f6ae47be3dff4af2f2806f5ca2dd
commit: 91b6cb7216cd8bad027bc9ef88e2834786c8eeaf staging: kpc2000: fix up build
problems with readq()
date: 13
Hi Geert,
> Subject
>
> Re: [PATCH v12 3/3] dt-bindings: mfd: Document Renesas R-Car Gen3 RPC-IF
MFD bindings
>
> Hi Mason,
>
> Note that if you send multipart/text+html emails, they will be dropped
silently
> by most Linux mailing lists.
> Hence I'm quoting your last email fully, to give
The sas_port(phy->port) allocated in sas_ex_discover_expander() will not
be deleted when the expander failed to discover. This will cause
resource leak and a further issue of kernel BUG like below:
[159785.843156] port-2:17:29: trying to add phy phy-2:17:29 fails: it's
already part of another
On (05/14/19 11:07), Sergey Senozhatsky wrote:
> How about this:
>
> if ptr < PAGE_SIZE -> "(null)"
No, this is totally stupid. Forget about it. Sorry.
> if IS_ERR_VALUE(ptr)-> "(fault)"
But Steven's "(fault)" is nice.
-ss
When the event queue is full of phy up and down events and reached the
threshold, we will queue a shutdown-event, and set phy->in_shutdown so
that we will not queue a shutdown-event again. But before the
shutdown-event can be executed, every phy-down event will clear
phy->in_shutdown and a new
Hi Miquel,
> > > > > > +
> > > > > > + if (mxic->reliability_func & MACRONIX_READ_RETRY_BIT) {
> > > > > > + chip->read_retries = MACRONIX_READ_RETRY_MODE + 1;
> > > > >
> > > > > Why +1 here, I am missing something?
> > > >
> > > >
> > > > Without + 1, read retry mode is up
Hi Richard,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 63863ee8e2f6f6ae47be3dff4af2f2806f5ca2dd
commit: 9ca2d732644484488db31123ecd3bf122b551566 ubifs: Limit number of xattrs
per inode
date: 6 days ago
On Mon, May 13, 2019 at 2:09 PM Liran Alon wrote:
>
>
>
> > On 13 May 2019, at 21:17, Andy Lutomirski wrote:
> >
> >> I expect that the KVM address space can eventually be expanded to include
> >> the ioctl syscall entries. By doing so, and also adding the KVM page table
> >> to the process
On (05/13/19 14:42), Petr Mladek wrote:
> > The "(null)" is good enough by itself and already an established
> > practice..
>
> (efault) made more sense with the probe_kernel_read() that
> checked wide range of addresses. Well, I still think that
> it makes sense to distinguish a pure NULL. And
On Mon, May 13, 2019 at 2:26 PM Liran Alon wrote:
>
>
>
> > On 13 May 2019, at 18:15, Peter Zijlstra wrote:
> >
> > On Mon, May 13, 2019 at 04:38:32PM +0200, Alexandre Chartre wrote:
> >> diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
> >> index 46df4c6..317e105 100644
> >> ---
Apologies, I had forgotten to
got bisect - - hard origin/master
I am still seeing the corruption leading to the invalid block error on 5.1.0+
kernels on both my machines.
Arthur.
--
Sent from my Android device with K-9 Mail. Please excuse my brevity.
On Tue, 14 May 2019 at 03:54, Sean Christopherson
wrote:
>
> On Thu, May 09, 2019 at 07:29:21PM +0800, Wanpeng Li wrote:
> > From: Wanpeng Li
> >
> > Advance lapic timer tries to hidden the hypervisor overhead between host
> > timer fires and the guest awares the timer is fired. However, it just
On Tue, May 14, 2019 at 6:29 AM Stephen Boyd wrote:
>
> Quoting Nicolas Boichat (2019-04-28 20:55:15)
> > During suspend/resume, mtk_eint_mask may be called while
> > wake_mask is active. For example, this happens if a wake-source
> > with an active interrupt handler wakes the system:
> >
>>>-Original Message-
>>>From: Pavel Shilovsky
>>>Sent: Thursday, May 9, 2019 11:01 AM
>>>To: Long Li
>>>Cc: Steve French ; linux-cifs >>c...@vger.kernel.org>; samba-technical ;
>>>Kernel Mailing List
>>>Subject: Re: [Patch (resend) 5/5] cifs: Call MID callback before destroying
Thanks for review.
On Mon, 13 May 2019 at 19:45, Peter Zijlstra wrote:
>
> On Mon, May 13, 2019 at 05:11:47PM +0800, Yuyang Du wrote:
> > + * Note that we have an assumption that a lock class cannot ever be both
> > + * read and recursive-read.
>
> We have such locks in the kernel... see:
>
>
Stephen,
I wasn't aware of the other asix module when submitting the phy driver.
The phy module gets autoloaded based on the PHY ID, so there's no reason
why it couldn't be renamed.
May I suggest ax88796b for the new module name?
Cheers,
Michael
On 14/05/19 12:56 PM, Stephen
On 5/13/19 5:40 PM, Paul Walmsley wrote:
On Mon, 13 May 2019, Atish Patra wrote:
On 5/13/19 5:09 PM, Paul Walmsley wrote:
What are the semantics of those reserved fields?
+struct riscv_image_header {
+ u32 code0;
+ u32 code1;
+ u64 text_offset;
+ u64 image_size;
+
Hi Masahiro,
Also, this:
On Tue, 14 May 2019 09:40:53 +0900 Masahiro Yamada
wrote:
>
> > Mind you, I have no itdea why this file was begin rebuilt, the merge
> > only touched these files:
> >
> > fs/ecryptfs/crypto.c
> > fs/ecryptfs/keystore.c
Its a bit annoying that the module was even being
On Tue, 14 May 2019 at 03:39, Sean Christopherson
wrote:
>
> On Thu, May 09, 2019 at 07:29:19PM +0800, Wanpeng Li wrote:
> > From: Wanpeng Li
> >
> > Extract adaptive tune timer advancement logic to a single function.
>
> Why?
Just because the function wait_lapic_expire() is too complex now.
Hi all,
[excessive quoting for new CC's]
On Tue, 14 May 2019 09:40:53 +0900 Masahiro Yamada
wrote:
>
> On Tue, May 14, 2019 at 9:16 AM Stephen Rothwell
> wrote:
> >
> > I don't know why this suddenly appeared after mergeing the ecryptfs tree
> > since nothin has changed in that tree for some
On Tue, May 14, 2019 at 9:01 AM Joe Perches wrote:
>
> On Tue, 2019-05-14 at 08:46 +0900, Masahiro Yamada wrote:
> > So, I think these two checks can be done for
> > all file types.
> []
> > checkpatch.pl misses to report most of them.
> > (the majority of the warning source is *.json)
>
>
Convert the Arm PL061 GPIO controller binding to json-schema format.
As I'm the author for all but the gpio-ranges line, make the schema dual
GPL/BSD license.
Cc: Linus Walleij
Cc: Bartosz Golaszewski
Cc: linux-g...@vger.kernel.org
Signed-off-by: Rob Herring
---
This warns on a few platforms
On Mon, May 13, 2019 at 11:55:18AM -0600, Raul E Rangel wrote:
I think we should cherry-pick 41e3efd07d5a02c80f503e29d755aa1bbb4245de
https://lore.kernel.org/patchwork/patch/856512/ into 4.14. It fixes a
potential resource leak when shutting down the request queue.
Once this patch is applied,
Hi Stephen,
On Tue, May 14, 2019 at 9:16 AM Stephen Rothwell wrote:
>
> Hi all,
>
> I don't know why this suddenly appeared after mergeing the ecryptfs tree
> since nothin has changed in that tree for some time (and nothing in that
> tree seems relevant).
>
> After merging the ecryptfs tree,
On Mon, 13 May 2019, Atish Patra wrote:
> On 5/13/19 5:09 PM, Paul Walmsley wrote:
>
> > What are the semantics of those reserved fields?
>
> +struct riscv_image_header {
> + u32 code0;
> + u32 code1;
> + u64 text_offset;
> + u64 image_size;
> + u64 res1;
> + u64 res2;
>
This patch fixes an issue introduced with:
583feb08e7f7 ("perf/x86/intel: Fix handling of wakeup_events for multi-entry
PEBS")
The original patch prevented using multi-entry PEBS when wakeup_events != 0.
However given that wakeup_events is part of a union with wakeup_watermark, it
means that
On 5/13/19 5:09 PM, Paul Walmsley wrote:
On Mon, 13 May 2019, Atish Patra wrote:
On 5/13/19 3:31 PM, Paul Walmsley wrote:
On Wed, 1 May 2019, Atish Patra wrote:
Currently, last stage boot loaders such as U-Boot can accept only
uImage which is an unnecessary additional step in automating
>> When a HARDWARE_ERROR is triggered for asc=0x3e, the actual code is
>> only considering the case where ascq=0x1.
>>
>> Following the http://www.t10.org/lists/asc-num.htm#ASC_3E
>> specification, other values may occur like a timeout (ascq=0x2).
>>
>> This patch is about printing an error
We have been consistently triggering the warning
WARN_ON_ONCE(cpuctx->cgrp) in perf_cgroup_switch() for a rather
long time, although we still have no clue on how to reproduce it.
Looking into the code, it seems the only possibility here is that
the process calling perf_event_open() with a cgroup
Hi all,
I don't know why this suddenly appeared after mergeing the ecryptfs tree
since nothin has changed in that tree for some time (and nothing in that
tree seems relevant).
After merging the ecryptfs tree, today's linux-next build (x86_64
allmodconfig) failed like this:
On Mon, 13 May 2019, Atish Patra wrote:
> On 5/13/19 3:31 PM, Paul Walmsley wrote:
> > On Wed, 1 May 2019, Atish Patra wrote:
> >
> > > Currently, last stage boot loaders such as U-Boot can accept only
> > > uImage which is an unnecessary additional step in automating boot flows.
> > >
> > >
On Tue, 2019-05-14 at 08:46 +0900, Masahiro Yamada wrote:
> So, I think these two checks can be done for
> all file types.
[]
> checkpatch.pl misses to report most of them.
> (the majority of the warning source is *.json)
Perhaps the json files should be ignored as more than
half of the .json
Enumeration changes:
- Add _HPX Type 3 settings support, which gives firmware more influence
over device configuration (Alexandru Gagniuc)
- Support fixed bus numbers from bridge Enhanced Allocation capabilities
(Subbaraya Sundeep)
- Add "external-facing" DT property to identify
that GNU binutils changes the "Type" after the rename.
I doubt the code in question relies on NOBITS for this section. Kees,
can you clarify? Jordan, do you know what the differences are between
PROGBITS vs NOBITS?
https://people.redhat.com/mpolacek/src/devconf2012.pdf seems to
suggest NO
> 2.21.0.1020.gf2820cf01a-goog
> > >
> >
> > I ran this script to see if there was any change for GNU objcopy and it
> > looks like .rodata's type gets changed, is this intentional? Otherwise,
> > this works for llvm-objcopy like you show.
> >
> > --
Hi Joe,
On Tue, May 14, 2019 at 4:23 AM Joe Perches wrote:
>
> On Mon, 2019-05-13 at 19:11 +0900, Masahiro Yamada wrote:
> > Hi Joe,
>
> Hello again.
>
> > On Fri, May 10, 2019 at 2:20 AM Joe Perches wrote:
> > > On Fri, 2019-05-10 at 00:27 +0900, Masahiro Yamada wrote:
> > > > Does it make
Neil Armstrong writes:
> On 11/05/2019 17:52, Jerome Brunet wrote:
>> On Fri, 2019-05-10 at 14:43 -0700, Kevin Hilman wrote:
>>> minor nit: I kind of like "aliases" and "chosen" at the top since they
>>> are kind of special nodes, but honestly, I can't think of a really good
>>> reason other
there was any change for GNU objcopy and it
> looks like .rodata's type gets changed, is this intentional? Otherwise,
> this works for llvm-objcopy like you show.
>
> ---
>
> 1c1
> < There are 11 section headers, starting at offset 0x240:
> ---
> > There are 11
Hi, Daniel
> -Original Message-
> From: Daniel Baluta [mailto:daniel.bal...@gmail.com]
> Sent: Monday, May 13, 2019 10:30 PM
> To: Anson Huang
> Cc: catalin.mari...@arm.com; will.dea...@arm.com;
> shawn...@kernel.org; s.ha...@pengutronix.de; ker...@pengutronix.de;
> feste...@gmail.com;
Hi Ravi,
On Mon, May 13, 2019 at 3:06 PM Ravi Chandra Sadineni
wrote:
>
> Notify the PM core that this dev is the wake source. This helps
> userspace daemon tracking the wake source to identify the origin of the
> wake.
I wonder if we could do that form the i2c core instead of individual
section headers, starting at offset 0x240:
---
> There are 11 section headers, starting at offset 0x230:
8c8
< [ 1] .rodata PROGBITS 0040
---
> [ 1] .rodata NOBITS 0040
10c10
---
#!/bin/bash
TMP1=$(
On 5/13/19 3:31 PM, Paul Walmsley wrote:
On Wed, 1 May 2019, Atish Patra wrote:
Currently, last stage boot loaders such as U-Boot can accept only
uImage which is an unnecessary additional step in automating boot flows.
Add a PE/COFF compliant image header that boot loaders can parse and
On 2019-05-12 5:15 p.m., Carlo Pisani wrote:
>> The c3600 doesn't have any PCI-X slots (only PCI) as far as I can tell from
>> user manuals.
> PCI-32/33 device I/O bus
> PCI-64/33 high-performance device I/O bus <- this is
> PCI-X, 64bit 5V
> PCI-64/66 high-performance graphics
The pull request you sent on Mon, 13 May 2019 14:05:25 -0700:
> https://git.kernel.org/pub/scm/linux/kernel/git/kees/linux.git
> tags/gcc-plugins-v5.2-rc1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/63863ee8e2f6f6ae47be3dff4af2f2806f5ca2dd
Thank you!
--
On Mon, May 13, 2019 at 03:21:09PM -0700, Nick Desaulniers wrote:
> With CONFIG_LKDTM=y and make OBJCOPY=llvm-objcopy, llvm-objcopy errors:
> llvm-objcopy: error: --set-section-flags=.text conflicts with
> --rename-section=.text=.rodata
>
> Rather than support setting flags then renaming sections
On 5/13/19 9:38 AM, Will Deacon wrote:
On Fri, May 10, 2019 at 07:26:54AM +0800, Yang Shi wrote:
diff --git a/mm/mmu_gather.c b/mm/mmu_gather.c
index 99740e1..469492d 100644
--- a/mm/mmu_gather.c
+++ b/mm/mmu_gather.c
@@ -245,14 +245,39 @@ void tlb_finish_mmu(struct mmu_gather *tlb,
{
The pull request you sent on Mon, 13 May 2019 14:52:41 -0400:
> git://git.kernel.org/pub/scm/linux/kernel/git/dennis/percpu.git for-5.2
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/3aff5fac54d722f363eac7db94536bffb55ca43f
Thank you!
--
Deet-doot-dot, I am a bot.
The pull request you sent on Mon, 13 May 2019 10:08:08 -0700 (PDT):
> git://git.kernel.org/pub/scm/linux/kernel/git/davem/net.git refs/heads/master
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/a3958f5e13e23f6e68c3cc1210639f63728a950f
Thank you!
--
Deet-doot-dot,
The pull request you sent on Mon, 13 May 2019 13:12:35 -0700:
> git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input.git for-linus
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/0aed4b28187078565cafbfe86b62f941d580d840
Thank you!
--
Deet-doot-dot, I am a bot.
Hi,
On Thu, May 9, 2019 at 11:44 AM Rob Clark wrote:
> From: Douglas Anderson
>
> Let's fixup the reserved memory to re-add the things we deleted in
> ("CHROMIUM: arm64: dts: qcom: sdm845-cheza: Temporarily delete
> reserved-mem changes") in a way that plays nicely with the new
> upstream
On Mon, May 13, 2019 at 3:37 PM Andreas Gruenbacher wrote:
>
> Sorry, I should have been more explicit. Would you mind taking this
> patch, please? If it's more convenient or more appropriate, I'll send
> a pull request instead.
Done.
However,I'd like to point out that when I see patches from
Hi Ondrej,
> Move all BIOS signature and base handling to (currently not merged)
> ISA bus driver.
Please submit a complete (core/PCI/ISA) series with the kbuild warnings
addressed and Christoph's tags added.
Thanks!
--
Martin K. Petersen Oracle Linux Engineering
Hi,
On Thu, May 9, 2019 at 11:44 AM Rob Clark wrote:
> From: Rob Clark
>
> This is essentialy a squash of a bunch of history of cheza dt updates
> from chromium kernel, some of which were themselves squashes of history
> from older chromium kernels.
>
> I don't claim any credit other than
> >>> /*
> >>> * XXX: the comment that explain this barrier goes here.
> >>> */
> >>>
> >>
> >>makes sure operations that setup readdir cache (update page cache and
> >>i_size) are strongly ordered with following atomic64_set.
> >
> >Thanks for the suggestion, Yan.
> >
>
YueHaibing,
> If ev->ev_code is not 0x1C, sshdr.sense_key may be used
> uninitialized. Fix this by initializing variable 'sshdr' to 0.
Applied to 5.2/scsi-queue, thanks!
--
Martin K. Petersen Oracle Linux Engineering
On Tue, May 07, 2019 at 11:52:50AM +0100, Suzuki K Poulose wrote:
> Add a helper to clean up the platform specific data provided
> by the firmware. This will be later used for dropping the necessary
> references when we switch to the fwnode handles for tracking
> connections.
>
> Cc: Mathieu
On Tue, May 07, 2019 at 11:52:56AM +0100, Suzuki K Poulose wrote:
> All AMBA devices are handled via ACPI AMBA scan notifier
> infrastructure. The platform devices get the ACPI id
> added to their driver.
>
> Cc: "Rafael J. Wysocki"
> Cc: Mathieu Poirier
> Signed-off-by: Suzuki K Poulose
> ---
Yue,
> From: YueHaibing
>
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/scsi/qedi/qedi_iscsi.c: In function 'qedi_ep_connect':
> drivers/scsi/qedi/qedi_iscsi.c:813:23: warning: variable 'udev' set but not
> used [-Wunused-but-set-variable]
>
Yue,
> KASAN report this:
>
> BUG: KASAN: global-out-of-bounds in qedi_dbg_err+0xda/0x330 [qedi]
> Read of size 31 at addr c12b0ae0 by task syz-executor.0/2429
Applied to 5.2/scsi-queue. Thanks!
--
Martin K. Petersen Oracle Linux Engineering
On Wed, 1 May 2019, Atish Patra wrote:
> Currently, last stage boot loaders such as U-Boot can accept only
> uImage which is an unnecessary additional step in automating boot flows.
>
> Add a PE/COFF compliant image header that boot loaders can parse and
> directly load kernel flat Image. The
Quoting Nicolas Boichat (2019-04-28 20:55:15)
> During suspend/resume, mtk_eint_mask may be called while
> wake_mask is active. For example, this happens if a wake-source
> with an active interrupt handler wakes the system:
> irq/pm.c:irq_pm_check_wakeup would disable the interrupt, so
> that it
On Tue, May 07, 2019 at 11:52:55AM +0100, Suzuki K Poulose wrote:
> Add support for parsing the ACPI platform description
> for CoreSight. The connections are encoded in a DSD graph
> property with CoreSight specific variation of the property.
>
> The ETMs are listed as the children device of the
On Mon, May 13, 2019 at 3:21 PM Nick Desaulniers
wrote:
>
> With CONFIG_LKDTM=y and make OBJCOPY=llvm-objcopy, llvm-objcopy errors:
> llvm-objcopy: error: --set-section-flags=.text conflicts with
> --rename-section=.text=.rodata
>
> Rather than support setting flags then renaming sections vs
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