PostgreSQL can error if power_events_view is not dropped before its
dependent tables e.g.
Exception: Query failed: ERROR: cannot drop table mwait because other
objects depend on it
DETAIL: view power_events_view depends on table mwait
Signed-off-by: Adrian Hunter
Fixes: aba44287a224
Drop power_events_view before its dependent tables.
SQLite does not seem to mind but the fix was needed for PostgreSQL
(export-to-postgresql.py script), so do the same fix for the SQLite. It is
more logical and keeps the 2 scripts following the same approach.
Signed-off-by: Adrian Hunter
Fixes:
Hi
Here is a small fix to the export-to-postgresql.py script.
The export-to-sqlite.py script had the same issue but SQLite did not seem
to mind. However I made the fix anyway for good measure.
Adrian Hunter (2):
perf scripts python: export-to-postgresql.py: Fix DROP VIEW
When a pin is active-low, logical trigger edge should be inverted to match
the same interrupt opportunity.
For example, a button pushed triggers falling edge in ACTIVE_HIGH case; in
ACTIVE_LOW case, the button pushed triggers rising edge. For user space the
IRQ requesting doesn't need to do any
From: Jiangfeng Xiao
Date: Fri, 5 Jul 2019 14:10:03 +0800
> HI13X1 changed the offsets and bitmaps for tx_desc
> registers in the same peripheral device on different
> models of the hip04_eth.
>
> Signed-off-by: Jiangfeng Xiao
Applied.
From: Xue Chaojing
Date: Fri, 5 Jul 2019 02:40:28 +
> This patch adds firmware version query in ethtool -i.
>
> Signed-off-by: Xue Chaojing
Applied, thank you.
Forwardport from http://mails.dpdk.org/archives/dev/2016-November/050658.html
MAC-PHY desync may occur causing misdetection of link up event.
Disabling K1-off feature can work around the problem.
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204057
Signed-off-by: Kai-Heng Feng
---
Forwardport from http://mails.dpdk.org/archives/dev/2016-November/050657.html
This works around a possible stalled packet issue, which may occur due to
clock recovery from the PCH being too slow, when the LAN is transitioning
from K1 at 1G link speed.
Bugzilla:
Optimize idle CPUs search by marking already found non idle CPUs during
idle core search. This reduces iteration count when searching for idle
CPUs, resulting in the lower iteration count.
Signed-off-by: Parth Shah
---
kernel/sched/core.c | 3 +++
kernel/sched/fair.c | 13 +
2
When searching for an idle_sibling, scheduler first iterates to search for
an idle core and then for an idle CPU. By maintaining the idle CPU mask
while iterating through idle cores, we can mark non-idle CPUs for which
idle CPU search would not have to iterate through again. This is especially
Per cpu variable 'select_idle_mask' serves the only purpose of an iterator
inside select_idle_core method. Also there is an opportunity to optimize
the search for an idle CPU for which this mask is required in the
subsequent patch. Hence renaming this per_cpu variable to iterator mask
which can be
On 2019/7/8 12:17 Vinod Koul wrote:
> On 08-07-19, 11:06, zhangfei wrote:
> > Hi, Robin
> >
> > On 2019/7/8 上午9:22, Robin Gong wrote:
> > > Hi Stephen,
> > > That's caused by 'of_irq_count' NOT export to global symbol, and
> > > I'm curious why it has been here for so long since Zhangfei found
On 2019/7/8 11:06 AM, zhangfei wrote:
> Hi, Robin
>
> On 2019/7/8 上午9:22, Robin Gong wrote:
> > Hi Stephen,
> > That's caused by 'of_irq_count' NOT export to global symbol, and I'm
> > curious why it has been here for so long since Zhangfei found it in
> > 2015.
> >
On 07/03/2019 11:22 PM, Catalin Marinas wrote:
> On Tue, Jul 02, 2019 at 09:07:28AM +0530, Anshuman Khandual wrote:
>> On 06/28/2019 03:50 PM, Catalin Marinas wrote:
>>> On Thu, Jun 27, 2019 at 06:18:15PM +0530, Anshuman Khandual wrote:
pmd_present() and pmd_trans_huge() are expected to
Fixes: 21b7c58fc194 ("mfd: bd70528: Support ROHM bd70528 PMIC core")
Signed-off-by: kbuild test robot
---
rohm-bd70528.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/mfd/rohm-bd70528.c b/drivers/mfd/rohm-bd70528.c
index 55599d5..43c859f 100644
tree:
https://kernel.googlesource.com/pub/scm/linux/kernel/git/next/linux-next.git
master
head: 22c45ec32b4a9fa8c48ef4f5bf9b189b307aae12
commit: 21b7c58fc1943f3aa8c18a994ab9bed4ae5aa72d [9908/12641] mfd: bd70528:
Support ROHM bd70528 PMIC core
reproduce:
# apt-get install sparse
On 08-07-19, 11:06, zhangfei wrote:
> Hi, Robin
>
> On 2019/7/8 上午9:22, Robin Gong wrote:
> > Hi Stephen,
> > That's caused by 'of_irq_count' NOT export to global symbol, and I'm
> > curious why it has been
> > here for so long since Zhangfei found it in 2015.
> >
On 08-07-19, 02:01, Robin Gong wrote:
> On 06-07-19, 22:43, Vinod Koul wrote:
> > > That's caused by 'of_irq_count' NOT export to global symbol, and I'm
> > > curious why it has been here for so long since Zhangfei found it in
> > > 2015.
> > >
Kindly ping for these two patches, :)
On Fri, 28 Jun 2019 at 16:51, Wanpeng Li wrote:
>
> From: Wanpeng Li
>
> In real product setup, there will be houseeking cpus in each nodes, it
> is prefer to do housekeeping from local node, fallback to global online
> cpumask if failed to find houseeking
The PRUSS INTC has a fixed number of output interrupt lines that are
connected to a number of processors or other PRUSS instances or other
devices (like DMA) on the SoC. The output interrupt lines 2 through 9
are usually connected to the main ARM host processor and are referred
to as host
The Programmable Real-Time Unit Subsystem (PRUSS) contains an interrupt
controller (INTC) that can handle various system input events and post
interrupts back to the device-level initiators. The INTC can support
upto 64 input events on most SoCs with individual control configuration
and hardware
The PRUSS INTC receives a number of system input interrupt source events
and supports individual control configuration and hardware prioritization.
These input events can be mapped to some output host interrupts through 2
levels of many-to-one mapping i.e. events to channel mapping and channels
to
From: "Andrew F. Davis"
The PRUSS INTC can generate an interrupt to various processor
subsystems on the SoC through a set of 64 possible PRU system
events. These system events can be used by PRU client drivers
or applications for event notifications/signalling between PRUs
and MPU or other
From: "Andrew F. Davis"
The Programmable Real-Time Unit Subsystem (PRUSS) contains a local
interrupt controller (INTC) that can handle various system input events
and post interrupts back to the device-level initiators. The INTC can
support upto 64 input events with individual control
Hi All,
The following series adds an IRQChip driver for the local interrupt controller
present within a Programmable Real-Time Unit and Industrial Communication
Subsystem (PRU-ICSS) present on a number of TI SoCs including OMAP architecture
based AM335x, AM437x, AM57xx SoCs, Keystone 2
The K3 AM65x and J721E SoCs have the next generation of the PRU-ICSS IP,
commonly called ICSSG. The PRUSS INTC present within the ICSSG supports
more System Events (160 vs 64), more Interrupt Channels and Host Interrupts
(20 vs 10) compared to the previous generation PRUSS INTC instances. The
Well, thanks a bunch Linus :)
On 16:10 Sun 07 Jul , Linus Torvalds wrote:
So I was somewhat pre-disposed towards making an rc8, simply because
of my travels and being entirely off the internet for a few days last
week, and with spotty internet for a few days before that [*].
But there really
On 08-07-19, 11:03, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> i.MX8MN is a new SoC of i.MX8M series, it also uses speed
> grading and market segment fuses for OPP definitions, add
> support for this SoC.
>
> Signed-off-by: Anson Huang
> ---
> drivers/cpufreq/imx-cpufreq-dt.c | 3 ++-
Hi all,
Today's linux-next merge of the gfs2 tree got a conflict in:
fs/gfs2/super.c
between commit:
000c8e591016 ("gfs2: Convert gfs2 to fs_context")
from the vfs tree and commit:
5b3a9f348bc5 ("gfs2: kthread and remount improvements")
from the gfs2 tree.
I fixed it up (I just used
On Thu, 4 Jul 2019 at 21:32, Stephen Rothwell wrote:
>
> Hi Joel,
>
> On Thu, 4 Jul 2019 06:03:18 + Joel Stanley wrote:
> > Stephen, can you swap out ben's fsi tree in linux-next for this one:
> >
> > git://git.kernel.org/pub/scm/linux/kernel/git/joel/fsi.git
> >
> > Branch is 'next'.
>
>
On 7/6/19 1:56 PM, Christophe Leroy wrote:
>
>
> Le 03/07/2019 à 08:20, Ravi Bangoria a écrit :
>>
>>
>> On 6/28/19 9:25 PM, Christophe Leroy wrote:
>>> On 8xx, breakpoints stop after executing the instruction, so
>>> stepping/emulation is not needed. Move it into a sub-function and
>>>
Hi all,
After merging the netfilter-next tree, today's linux-next build (x86_64
allmodconfig) failed like this:
In file included from :
include/net/netfilter/nft_meta.h:6:21: warning: 'key' is narrower than values
of its type
enum nft_meta_keys key:8;
^~~
On Thu, Jul 4, 2019 at 7:31 PM Rafael J. Wysocki wrote:
>
> On Friday, June 28, 2019 5:10:40 PM CEST Greg KH wrote:
> > On Thu, Jun 27, 2019 at 03:53:35PM -0700, Tri Vo wrote:
> > > Userspace can use wakeup_sources debugfs node to plot history of suspend
> > > blocking wakeup sources over
On 07/05/2019 04:00 PM, Masami Hiramatsu wrote:
> Hi Anshuman,
Hello Masami,
>
> On Fri, 5 Jul 2019 11:00:29 +0530
> Anshuman Khandual wrote:
>
>> Architectures like parisc enable CONFIG_KROBES without having a definition
>> for kprobe_fault_handler() which results in a build failure.
>
On Thu, Mar 28, 2019 at 3:28 PM Sibi Sankar wrote:
> +
> +/* The caller must call dev_pm_opp_put() after the OPP is used */
> +struct dev_pm_opp *dev_pm_opp_find_opp_of_np(struct opp_table *opp_table,
> +struct device_node *opp_np)
> +{
> +
Hi all,
On Thu, 4 Jul 2019 12:47:38 +1000 Stephen Rothwell
wrote:
>
> Hi all,
>
> Today's linux-next merge of the mlx5-next tree got a conflict in:
>
> drivers/infiniband/hw/mlx5/cq.c
>
> between commit:
>
> e39afe3d6dbd ("RDMA: Convert CQ allocations to be under core
>
Hi all,
After merging the net-next tree, today's linux-next build (x86_64
allmodconfig) produced this warning:
In file included from include/linux/bitmap.h:9,
from include/linux/cpumask.h:12,
from arch/x86/include/asm/cpumask.h:5,
from
From: Anson Huang
i.MX8MN is a new SoC of i.MX8M series, it also uses speed
grading and market segment fuses for OPP definitions, add
support for this SoC.
Signed-off-by: Anson Huang
---
drivers/cpufreq/imx-cpufreq-dt.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Hi, Robin
On 2019/7/8 上午9:22, Robin Gong wrote:
Hi Stephen,
That's caused by 'of_irq_count' NOT export to global symbol, and I'm
curious why it has been
here for so long since Zhangfei found it in 2015.
https://patchwork.kernel.org/patch/7404681/
Hi Rob,
Is there something I
On 06-07-19, 22:30, Pavel Machek wrote:
> Hi!
>
> > Anyway, if 5.2-rc7 is OK, something in this branch causes the problem
> > to happen for you.
> >
> > I would try
> >
> >
Hi all,
After merging the rdma tree, today's linux-next build (x86_64
allmodconfig) failed like this:
In file included from include/asm-generic/percpu.h:7,
from arch/x86/include/asm/percpu.h:544,
from arch/x86/include/asm/preempt.h:6,
from
Hi all,
After merging the rdma tree, today's linux-next build (x86_64
allmodconfig) failed like this:
In file included from :32:
./usr/include/rdma/rvt-abi.h:13:10: fatal error: rdma/ib_verbs.h: No such file
or directory
#include
^
Caused by commits
dabac6e460ce
Those are remnants of the SPDX identifier migration, which haven't been
removed properly.
Signed-off-by: Tim Schumacher
---
This is probably the highest level of cosmetic-only that a patch
can achieve, sorry for the noise.
CCing Thomas Gleixner, since the tool (is it a tool?) that makes
those
On some Broxton NUC, the usb role is lost after S3 (it becomes "none").
Add PM callbacks to address this issue: save the role during suspend and
restore usb to that role during resume.
Test:
Run Android on UC6CAY, a NUC powered by Broxton. Access this NUC via
"adb shell" from a host PC. After a
ATENÇÃO;
Sua caixa de correio excedeu o limite de armazenamento, que é de 5 GB como
definido pelo administrador, que está atualmente em execução no 10.9GB, você
pode não ser capaz de enviar ou receber novas mensagens até que você re-validar
a sua caixa de correio. Para revalidar sua caixa de
Although we paid so many effort to settle down task on a particular
node, there are still chances for a task to leave it's preferred
node, that is by wakeup, numa swap migrations or load balance.
When we are using cpu cgroup in share way, since all the workloads
see all the cpus, it could be
From: Joe Perches
Date: Thu, 4 Jul 2019 16:57:46 -0700
> Probable cut typo - use the correct field size.
>
> Signed-off-by: Joe Perches
Applied.
From: Joe Perches
Date: Thu, 4 Jul 2019 16:57:45 -0700
> Probable cut typo - use the correct field size.
>
> Signed-off-by: Joe Perches
Applied.
Ang ping?
在 2019/7/3 9:34, Su Yanjun 写道:
Hi Frank
We tested the pynfs of NFSv4.0 on the latest version of the kernel
(5.2.0-rc7).
I encountered a problem while testing st_lock.testOpenUpgradeLock. The
problem is now as follows:
**
LOCK24
The lbr stack is architecturally specific, for example, SKX has 32 lbr
stack entries while HSW has 16 entries, so a HSW guest running on a SKX
machine may not get accurate perf results. Currently, we forbid the
guest lbr enabling when the guest and host see different lbr stack
entries or the host
This patch enables the LBR related features in Arch v4 in advance,
though the current vPMU only has v2 support. Other arch v4 related
support will be enabled later in another series.
Arch v4 supports streamlined Freeze_LBR_on_PMI. According to the SDM,
the LBR_FRZ bit is set to global status when
The LBR stack MSRs are architecturally specific. The perf subsystem has
already assigned the abstracted MSR values based on the CPU architecture.
This patch enables a caller outside the perf subsystem to get the LBR
stack info. This is useful for hyperviosrs to prepare the lbr feature
for the
Bits [0, 5] of MSR_IA32_PERF_CAPABILITIES tell about the format of
the addresses stored in the LBR stack. Expose those bits to the guest
when the guest lbr feature is enabled.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
---
arch/x86/include/asm/perf_event.h | 2 ++
The debugctl msr is not completely identical on AMD and Intel CPUs, for
example, FREEZE_LBRS_ON_PMI is supported by Intel CPUs only. Now, this
msr is handled separatedly in svm.c and intel_pmu.c. So remove the
common debugctl msr handling code in kvm_get/set_msr_common.
Signed-off-by: Wei Wang
When the vCPU is scheduled in:
- if the lbr feature was used in the last vCPU time slice, set the lbr
stack to be interceptible, so that the host can capture whether the
lbr feature will be used in this time slice;
- if the lbr feature wasn't used in the last vCPU time slice, disable
the
The vCPU lbr event relies on the host to save/restore all the lbr
related MSRs. So add the LBR_SELECT save/restore to the related
functions for the vCPU case.
Signed-off-by: Wei Wang
Cc: Peter Zijlstra
Cc: Andi Kleen
---
arch/x86/events/intel/lbr.c | 7 +++
arch/x86/events/perf_event.h |
In some cases, an event may be created without needing a counter
allocation. For example, an lbr event may be created by the host
only to help save/restore the lbr stack on the vCPU context switching.
This patch adds a new interface to allow users to create a perf event
without the need of
The MSR variable type can be "unsigned int", which uses less memory than
the longer unsigned long. The lbr nr won't be a negative number, so make
it "unsigned int" as well.
Suggested-by: Peter Zijlstra
Signed-off-by: Wei Wang
Cc: Peter Zijlstra
Cc: Andi Kleen
---
arch/x86/events/perf_event.h
From: Like Xu
This patch adds support to enable/disable the host side save/restore
for the guest lbr stack on vCPU switching. To enable that, the host
creates a perf event for the vCPU, and the event attributes are set
to the user callstack mode lbr so that all the conditions are meet in
the
Introduce KVM_CAP_X86_GUEST_LBR to allow per-VM enabling of the guest
lbr feature.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
Cc: Peter Zijlstra
---
arch/x86/include/asm/kvm_host.h | 2 ++
arch/x86/kvm/x86.c | 14 ++
include/uapi/linux/kvm.h|
Last Branch Recording (LBR) is a performance monitor unit (PMU) feature
on Intel CPUs that captures branch related info. This patch series enables
this feature to KVM guests.
Here is a conclusion of the fundamental methods that we use:
1) the LBR feature is enabled per guest via QEMU setting of
This patch changes kvm_pmu_get_msr to get the msr_data struct, because
The host_initiated field from the struct could be used by get_msr. This
also makes this API be consistent with kvm_pmu_set_msr.
Signed-off-by: Wei Wang
Cc: Paolo Bonzini
Cc: Andi Kleen
---
arch/x86/kvm/pmu.c | 4
Axel Lin 於 2019年6月27日 週四 上午7:58寫道：
>
> > > With your current code where LM36274_LDO_VSEL_MAX and n_voltages is 0x34,
> > > the maximum voltage will become 40 + 5 * 0x34 = 6.6V which
> > > does not match the datasheet.
> >
> > Not sure how you get 6.6v the LDO max is 6.5v.
> >
> > After
Axel Lin 於 2019年6月26日 週三 下午11:12寫道：
>
> Dan Murphy 於 2019年6月26日 週三 下午11:07寫道：
> >
> > Hello
> >
> > On 6/26/19 8:26 AM, Axel Lin wrote:
> > > According to the datasheet https://www.ti.com/lit/ds/symlink/lm3632a.pdf
> > > Table 20. VPOS Bias Register Field Descriptions VPOS[5:0]
> > > Sets the
On 06-07-19, 22:43, Vinod Koul wrote:
> > That's caused by 'of_irq_count' NOT export to global symbol, and I'm
> > curious why it has been here for so long since Zhangfei found it in
> > 2015.
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> >
>
Hi all,
On Wed, 15 May 2019 13:16:29 +1000 Stephen Rothwell
wrote:
>
> Today's linux-next merge of the akpm-current tree got a conflict in:
>
> include/linux/pid.h
>
> between commit:
>
> 51f1b521a515 ("pidfd: add polling support")
>
> from the pidfd tree and commit:
>
> c02e28a1bb18
Hi all,
Today's linux-next merge of the jc_docs tree got a conflict in:
Documentation/filesystems/vfs.txt
between commit:
51eae7431ded ("vfs: Kill mount_single()")
from the vfs tree and commit:
af96c1e304f7 ("docs: filesystems: vfs: Convert vfs.txt to RST")
from the jc_docs tree.
I
From: David Miller
Date: Sun, 07 Jul 2019 18:31:46 -0700 (PDT)
> From: Ivan Khoronzhuk
> Date: Fri, 5 Jul 2019 18:04:57 +0300
>
>> This patchset adds XDP support for TI cpsw driver and base it on
>> page_pool allocator. It was verified on af_xdp socket drop,
>> af_xdp l2f, ebpf XDP_DROP,
From: Ivan Khoronzhuk
Date: Fri, 5 Jul 2019 18:04:57 +0300
> This patchset adds XDP support for TI cpsw driver and base it on
> page_pool allocator. It was verified on af_xdp socket drop,
> af_xdp l2f, ebpf XDP_DROP, XDP_REDIRECT, XDP_PASS, XDP_TX.
>
> It was verified with following configs
Hi Stephen,
That's caused by 'of_irq_count' NOT export to global symbol, and I'm
curious why it has been
here for so long since Zhangfei found it in 2015.
https://patchwork.kernel.org/patch/7404681/
Hi Rob,
Is there something I miss so that Zhangfei's patch not accepted finally?
On Tue, 2019-05-21 at 13:13:24 UTC, Masahiro Yamada wrote:
> With CONFIG_OPTIMIZE_INLINING enabled, Laura Abbott reported error
> with gcc 9.1.1:
>
> arch/powerpc/mm/book3s64/radix_tlb.c: In function '_tlbiel_pid':
> arch/powerpc/mm/book3s64/radix_tlb.c:104:2: warning: asm operand 3 probably
On Tue, 2019-05-14 at 09:05:13 UTC, Christophe Leroy wrote:
> On most arches having function flush_dcache_range(), including PPC32,
> this function does a writeback and invalidation of the cache bloc.
>
> On PPC64, flush_dcache_range() only does a writeback while
> flush_inval_dcache_range() does
On Mon, 2019-06-17 at 14:52:04 UTC, Geert Uytterhoeven wrote:
> "git diff" says:
>
> \ No newline at end of file
>
> after modifying the file.
>
> Signed-off-by: Geert Uytterhoeven
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/7b570361f6f66c91443541b19121038c076e7d64
On Tue, 2019-04-16 at 15:28:57 UTC, Nishad Kamdar wrote:
> This patch corrects the SPDX License Identifier style
> in the powerpc Hardware Architecture related files.
>
> Suggested-by: Joe Perches
> Signed-off-by: Nishad Kamdar
> Acked-by: Andrew Donnellan
Applied to powerpc next, thanks.
On Fri, 2019-06-14 at 06:41:38 UTC, Christophe Leroy wrote:
> Only 8xx selects CPM1 and related CONFIG options are already
> in platforms/8xx/Kconfig
>
> Move the related C files to platforms/8xx/.
>
> Signed-off-by: Christophe Leroy
Series applied to powerpc next, thanks.
On Sat, 2017-05-06 at 15:37:20 UTC, Geliang Tang wrote:
> In spufs_cntl_fops, since we use nonseekable_open() to open, we
> should use no_llseek() to seek, not generic_file_llseek().
>
> Signed-off-by: Geliang Tang
Applied to powerpc next, thanks.
On Fri, 2019-06-14 at 10:16:23 UTC, Christophe Leroy wrote:
> This patch modifies the generation of uImage by handing over
> the selected compression type instead of forcing gzip
>
> Signed-off-by: Christophe Leroy
Series applied to powerpc next, thanks.
On Tue, 2016-12-20 at 14:02:17 UTC, Geliang Tang wrote:
> To make the code clearer, use rb_entry() instead of container_of() to
> deal with rbtree.
>
> Signed-off-by: Geliang Tang
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/c197922f0a8072d286dff8001f8ad0d4b95ec1dd
cheers
On Tue, 2019-06-04 at 08:00:33 UTC, Krzysztof Kozlowski wrote:
> Remove the CONFIG_UEVENT_HELPER_PATH because:
> 1. It is disabled since commit 1be01d4a5714 ("driver: base: Disable
>CONFIG_UEVENT_HELPER by default") as its dependency (UEVENT_HELPER) was
>made default to 'n',
> 2. It is not
On Fri, 2019-05-03 at 06:40:15 UTC, Christophe Leroy wrote:
> PPC_HA() PPC_HI() and PPC_LO() macros are nice macros. Move them
> from module64.c to ppc-opcode.h in order to use them in other places.
>
> Signed-off-by: Christophe Leroy
Series applied to powerpc next, thanks.
On Tue, 2019-05-14 at 09:05:15 UTC, Christophe Leroy wrote:
> This patch defines C helpers to retrieve the size of
> cache blocks and uses them in the cacheflush functions.
>
> Signed-off-by: Christophe Leroy
Applied to powerpc next, thanks.
On Wed, 2019-07-03 at 16:04:13 UTC, "Enrico Weigelt, metux IT consult" wrote:
> Formatting of Kconfig files doesn't look so pretty, so let the
> Great White Handkerchief come around and clean it up.
>
> Also convert "---help---" as requested on lkml.
>
> Signed-off-by: Enrico Weigelt, metux IT
On Tue, 2019-05-14 at 09:05:16 UTC, Christophe Leroy wrote:
> This patch drops the assembly PPC64 version of flush_dcache_range()
> and re-uses the PPC32 static inline version.
>
> With GCC 8.1, the following code is generated:
>
> void flush_test(unsigned long start, unsigned long stop)
> {
>
On Fri, 2019-05-10 at 09:24:48 UTC, Christophe Leroy wrote:
> Cache instructions (dcbz, dcbi, dcbf and dcbst) take two registers
> that are summed to obtain the target address. Using 'Z' constraint
> and '%y0' argument gives GCC the opportunity to use both registers
> instead of only one with the
Hi all,
Today's linux-next merge of the vfs tree got a conflict in:
fs/nfsd/nfsctl.c
between commits:
e8a79fb14f6b ("nfsd: add nfsd/clients directory")
from the nfsd tree and commit:
96a374a35f82 ("vfs: Convert nfsctl to use the new mount API")
from the vfs tree.
I fixed it up
Christophe Leroy writes:
> To increase readability/maintainability, replace hard coded
> instructions values by symbolic names.
>
> Signed-off-by: Christophe Leroy
> ---
> v3: fixed warning by adding () in an 'if' around X | Y (unlike said in v2
> history, this change was forgotten in v2)
> v2:
Ping Frederic, Peterz, any comments?
On Mon, 1 Jul 2019 at 20:24, Wanpeng Li wrote:
>
> From: Wanpeng Li
>
> Cache the busy housekeeping target for timer instead of researching each time.
> This patch reduces the total time of get_nohz_timer_target() for busy
> housekeeping
> CPU from 2u~3us to
On 7/6/19 8:18 PM, Nayna Jain wrote:
The nr_allocated_banks and allocated banks are initialized as part of
tpm_chip_register. Currently, this is done as part of auto startup
function. However, some drivers, like the ibm vtpm driver, do not run
auto startup during initialization. This results in
On Sun, Jul 07, 2019 at 06:05:16PM +0300, Boaz Harrosh wrote:
> On 06/07/2019 02:31, Dave Chinner wrote:
>
> >
> > As long as the IO ranges to the same file *don't overlap*, it should
> > be perfectly safe to take separate range locks (in read or write
> > mode) on either side of the mmap_sem as
Hi Geert,
I just noticed that this patch didn't appear in v5.2. Would you please
take a look?
--
On Fri, 15 Feb 2019, Finn Thain wrote:
> Rename floppy_type macros to make them more consistent with the scsi_type
> macros, which are named after classes of models with similar memory maps.
>
>
Andrey,
It is helpful to send your review to the patch author. I've added
Konstantin to the Cc list, as well as Raghava (who introduced the
regression addressed by Konstantin's patch).
If I'm not mistaken, your review misunderstands the patch description.
FWIW, Konstantin's patch might have
The Tegra's clocksource driver got some rework recently and now the
internal/local CPU timers usage is discouraged on Tegra20/30 SoCs in
a favor of the platform-specific timers that are assigned as per-CPU
clocksources because they do not suffer from the CPU-freq changes and
are always-ON during
Local CPU timers are always-ON on the Tegra114/124 SoCs regardless of the
CPU's idle state.
Signed-off-by: Dmitry Osipenko
---
drivers/cpuidle/cpuidle-tegra.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c
index
Remove the old drivers to replace them cleanly with a new one later on.
Signed-off-by: Dmitry Osipenko
---
arch/arm/mach-tegra/Makefile | 13 --
arch/arm/mach-tegra/cpuidle-tegra114.c | 89 ---
arch/arm/mach-tegra/cpuidle-tegra20.c | 212 -
Hello,
I was spending quite some time recently trying to hunt down CPU-suspend
bug on Tegra30 SoC and in the end it was nailed. During that time I
realized that the CPU Idle drivers could get some polish and gain new
features, thus that's what this series does:
1. Unifies Tegra20/30/114
The upcoming unified CPUIDLE driver will be added to the drivers/cpuidle/
directory and it will require all these Tegra PM-core functions.
Signed-off-by: Dmitry Osipenko
---
arch/arm/mach-tegra/Makefile | 2 +-
arch/arm/mach-tegra/platsmp.c | 2 --
arch/arm/mach-tegra/pm.c | 16
The new CPU Idle driver has all necessary features in order to allow
the deepest idling state on Tegra30 SoC where the whole CPU cluster is
power-gated using the coupled idle state.
Signed-off-by: Dmitry Osipenko
---
Please note that outer_disable() has a WARN_ON(num_online_cpus > 1)
and it
The new driver is based on the old CPU Idle drivers that are removed now
from arm/arch/mach-tegra/ directory. Those removed drivers were reworked
and squashed into a single unified driver that covers multiple hardware
generations, starting from Tegra20 and ending with Tegra124.
Signed-off-by:
The I2C driver fails to probe if CONFIG_PM_SLEEP=n because runtime PM
doesn't depend on the PM sleep and in this case the runtime PM ops are
not included in the driver, resulting in I2C clock not being enabled.
It's much cleaner to simply allow compiler to remove the dead code
instead of messing
So I was somewhat pre-disposed towards making an rc8, simply because
of my travels and being entirely off the internet for a few days last
week, and with spotty internet for a few days before that [*].
But there really doesn't seem to be any reason for another rc, since
it's been very quiet. Yes,
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