RE: [PATCH v5 3/3] clocksource/drivers: Suspend/resume Hyper-V clocksource for hibernation
> From: Daniel Lezcano > Sent: Thursday, September 26, 2019 6:17 AM > >> > >> I can take this patch if needed. > > > > Thanks, Daniel! Usually tglx takes care of the patches, but it looks > > recently he > > may be too busy to handle the 3 patches. > > > > I guess you can take the patch, if tglx has no objection. :-) > > If you take the patch, please take all the 3 patches. > > I maintain drivers/clocksource for the tip/timers/core branch. I don't > want to proxy another tip branch as it is out of my jurisdiction. I see. Thanks for the explanation! I learned more about the tip tree. :-) > So I can take patch 3/3 but will let the other 2 patches to be picked by > the right person. It is your call. Sounds good. Daniel, then please take this patch, e.g. patch 3/3. Patch 2/3 may as well go through Sasha's hyper-v tree, since it's required by other changes to the drivers hv_balloon, hv_utils and hv_vmbus. I suppose tglx is the best person to take patch 1/3, but if he's too busy to handle it, it can also go through the hyper-v tree, since the related other patches have been in the mainline now. Thanks, -- Dexuan
Re: [PATCH v2 3/3] RISC-V: Move SBI related macros under uapi.
On Fri, Sep 27, 2019 at 5:39 AM Atish Patra wrote:
>
> All SBI related macros can be reused by KVM RISC-V and userspace tools
> such as kvmtool, qemu-kvm. SBI calls can also be emulated by userspace
> if required. Any future vendor extensions can leverage this to emulate
> the specific extension in userspace instead of kernel.
>
> Signed-off-by: Atish Patra
> ---
> arch/riscv/include/asm/sbi.h | 37 +---
> arch/riscv/include/uapi/asm/sbi.h | 48 +++
> 2 files changed, 49 insertions(+), 36 deletions(-)
> create mode 100644 arch/riscv/include/uapi/asm/sbi.h
>
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index 279b7f10b3c2..902b8304 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -7,42 +7,7 @@
> #define _ASM_RISCV_SBI_H
>
> #include
> -
> -enum sbi_ext_id {
> - SBI_EXT_0_1_SET_TIMER = 0x0,
> - SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
> - SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
> - SBI_EXT_0_1_CLEAR_IPI = 0x3,
> - SBI_EXT_0_1_SEND_IPI = 0x4,
> - SBI_EXT_0_1_REMOTE_FENCE_I = 0x5,
> - SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6,
> - SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
> - SBI_EXT_0_1_SHUTDOWN = 0x8,
> - SBI_EXT_BASE = 0x10,
> -};
> -
> -enum sbi_ext_base_fid {
> - SBI_BASE_GET_SPEC_VERSION = 0,
> - SBI_BASE_GET_IMP_ID,
> - SBI_BASE_GET_IMP_VERSION,
> - SBI_BASE_PROBE_EXT,
> - SBI_BASE_GET_MVENDORID,
> - SBI_BASE_GET_MARCHID,
> - SBI_BASE_GET_MIMPID,
> -};
> -
> -#define SBI_SPEC_VERSION_DEFAULT 0x1
> -#define SBI_SPEC_VERSION_MAJOR_OFFSET 24
> -#define SBI_SPEC_VERSION_MAJOR_MASK0x7f
> -#define SBI_SPEC_VERSION_MINOR_MASK0xff
> -
> -/* SBI return error codes */
> -#define SBI_SUCCESS0
> -#define SBI_ERR_FAILURE-1
> -#define SBI_ERR_NOT_SUPPORTED -2
> -#define SBI_ERR_INVALID_PARAM -3
> -#define SBI_ERR_DENIED -4
> -#define SBI_ERR_INVALID_ADDRESS -5
> +#include
>
> extern unsigned long sbi_spec_version;
> struct sbiret {
> diff --git a/arch/riscv/include/uapi/asm/sbi.h
> b/arch/riscv/include/uapi/asm/sbi.h
> new file mode 100644
> index ..2e09ee52c346
> --- /dev/null
> +++ b/arch/riscv/include/uapi/asm/sbi.h
> @@ -0,0 +1,48 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Common SBI related defines and macros to be used by RISC-V kernel,
> + * RISC-V KVM and userspace.
> + *
> + * Copyright (c) 2019 Western Digital Corporation or its affiliates.
> + */
> +
> +#ifndef _UAPI_ASM_RISCV_SBI_H
> +#define _UAPI_ASM_RISCV_SBI_H
> +
> +enum sbi_ext_id {
> + SBI_EXT_0_1_SET_TIMER = 0x0,
> + SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
> + SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
> + SBI_EXT_0_1_CLEAR_IPI = 0x3,
> + SBI_EXT_0_1_SEND_IPI = 0x4,
> + SBI_EXT_0_1_REMOTE_FENCE_I = 0x5,
> + SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6,
> + SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
> + SBI_EXT_0_1_SHUTDOWN = 0x8,
> + SBI_EXT_BASE = 0x10,
> +};
> +
> +enum sbi_ext_base_fid {
> + SBI_BASE_GET_SPEC_VERSION = 0,
> + SBI_BASE_GET_IMP_ID,
> + SBI_BASE_GET_IMP_VERSION,
> + SBI_BASE_PROBE_EXT,
> + SBI_BASE_GET_MVENDORID,
> + SBI_BASE_GET_MARCHID,
> + SBI_BASE_GET_MIMPID,
> +};
> +
> +#define SBI_SPEC_VERSION_DEFAULT 0x1
> +#define SBI_SPEC_VERSION_MAJOR_OFFSET 24
> +#define SBI_SPEC_VERSION_MAJOR_MASK0x7f
> +#define SBI_SPEC_VERSION_MINOR_MASK0xff
> +
> +/* SBI return error codes */
> +#define SBI_SUCCESS0
> +#define SBI_ERR_FAILURE-1
> +#define SBI_ERR_NOT_SUPPORTED -2
> +#define SBI_ERR_INVALID_PARAM -3
> +#define SBI_ERR_DENIED -4
> +#define SBI_ERR_INVALID_ADDRESS -5
> +
> +#endif
> --
> 2.21.0
>
Thanks for considering KVM user-space SBI emulation.
Reviewed-by: Anup Patel
Regards,
Anup
Re: [PATCH v2 2/3] RISC-V: Add basic support for SBI v0.2
On Fri, Sep 27, 2019 at 5:39 AM Atish Patra wrote:
>
> The SBI v0.2 introduces a base extension which is backward compatible
> with v0.1. Implement all helper functions and minimum required SBI
> calls from v0.2 for now. All other base extension function will be
> added later as per need.
> As v0.2 calling convention is backward compatible with v0.1, remove
> the v0.1 helper functions and just use v0.2 calling convention.
>
> Signed-off-by: Atish Patra
> ---
> arch/riscv/include/asm/sbi.h | 139 ++--
> arch/riscv/kernel/Makefile | 1 +
> arch/riscv/kernel/sbi.c | 241 +++
> arch/riscv/kernel/setup.c| 2 +
> 4 files changed, 311 insertions(+), 72 deletions(-)
> create mode 100644 arch/riscv/kernel/sbi.c
>
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index 2147f384fad0..279b7f10b3c2 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -8,93 +8,88 @@
>
> #include
>
> -#define SBI_EXT_0_1_SET_TIMER 0x0
> -#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1
> -#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2
> -#define SBI_EXT_0_1_CLEAR_IPI 0x3
> -#define SBI_EXT_0_1_SEND_IPI 0x4
> -#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5
> -#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6
> -#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7
> -#define SBI_EXT_0_1_SHUTDOWN 0x8
> +enum sbi_ext_id {
> + SBI_EXT_0_1_SET_TIMER = 0x0,
> + SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
> + SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
> + SBI_EXT_0_1_CLEAR_IPI = 0x3,
> + SBI_EXT_0_1_SEND_IPI = 0x4,
> + SBI_EXT_0_1_REMOTE_FENCE_I = 0x5,
> + SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6,
> + SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
> + SBI_EXT_0_1_SHUTDOWN = 0x8,
> + SBI_EXT_BASE = 0x10,
> +};
>
> -#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
> - register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
> - register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \
> - register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \
> - register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); \
> - register uintptr_t a7 asm ("a7") = (uintptr_t)(which); \
> - asm volatile ("ecall" \
> - : "+r" (a0) \
> - : "r" (a1), "r" (a2), "r" (a3), "r" (a7) \
> - : "memory"); \
> - a0; \
> -})
> +enum sbi_ext_base_fid {
> + SBI_BASE_GET_SPEC_VERSION = 0,
> + SBI_BASE_GET_IMP_ID,
> + SBI_BASE_GET_IMP_VERSION,
> + SBI_BASE_PROBE_EXT,
> + SBI_BASE_GET_MVENDORID,
> + SBI_BASE_GET_MARCHID,
> + SBI_BASE_GET_MIMPID,
> +};
>
> -/* Lazy implementations until SBI is finalized */
> -#define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0, 0)
> -#define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0, 0)
> -#define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0, 0)
> -#define SBI_CALL_3(which, arg0, arg1, arg2) \
> - SBI_CALL(which, arg0, arg1, arg2, 0)
> -#define SBI_CALL_4(which, arg0, arg1, arg2, arg3) \
> - SBI_CALL(which, arg0, arg1, arg2, arg3)
> +#define SBI_SPEC_VERSION_DEFAULT 0x1
> +#define SBI_SPEC_VERSION_MAJOR_OFFSET 24
> +#define SBI_SPEC_VERSION_MAJOR_MASK0x7f
> +#define SBI_SPEC_VERSION_MINOR_MASK0xff
>
> -static inline void sbi_console_putchar(int ch)
> -{
> - SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch);
> -}
> +/* SBI return error codes */
> +#define SBI_SUCCESS0
> +#define SBI_ERR_FAILURE-1
> +#define SBI_ERR_NOT_SUPPORTED -2
> +#define SBI_ERR_INVALID_PARAM -3
> +#define SBI_ERR_DENIED -4
> +#define SBI_ERR_INVALID_ADDRESS -5
>
> -static inline int sbi_console_getchar(void)
> -{
> - return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR);
> -}
> -
> -static inline void sbi_set_timer(uint64_t stime_value)
> -{
> -#if __riscv_xlen == 32
> - SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value,
> - stime_value >> 32);
> -#else
> - SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value);
> -#endif
> -}
> +extern unsigned long sbi_spec_version;
> +struct sbiret {
> + long error;
> + long value;
> +};
>
> -static inline void sbi_shutdown(void)
> -{
> - SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN);
> -}
> +void sbi_init(void);
> +struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
> + unsigned long arg1, unsigned long arg2,
> + unsigned long arg3);
> +int sbi_err_map_linux_errorno(int err);
>
> -static inline void sbi_clear_ipi(void)
> -{
> - SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI);
> -}
> +void sbi_console_putchar(int ch);
> +int sbi_console_getchar(void);
> +void sbi_set_timer(uint64_t stime_value);
> +void sbi_shutdown(void);
> +void
Re: [PATCH v2 1/3] RISC-V: Mark existing SBI as 0.1 SBI.
On Fri, Sep 27, 2019 at 5:39 AM Atish Patra wrote:
>
> As per the new SBI specification, current SBI implementation version
> is defined as 0.1 and will be removed/replaced in future. Each of the
> function call in 0.1 is defined as a separate extension which makes
> easier to replace them one at a time.
>
> Rename existing implementation to reflect that. This patch is just
> a preparatory patch for SBI v0.2 and doesn't introduce any functional
> changes.
>
> Signed-off-by: Atish Patra
> ---
> arch/riscv/include/asm/sbi.h | 43 +++-
> 1 file changed, 23 insertions(+), 20 deletions(-)
>
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index 21134b3ef404..2147f384fad0 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -8,17 +8,17 @@
>
> #include
>
> -#define SBI_SET_TIMER 0
> -#define SBI_CONSOLE_PUTCHAR 1
> -#define SBI_CONSOLE_GETCHAR 2
> -#define SBI_CLEAR_IPI 3
> -#define SBI_SEND_IPI 4
> -#define SBI_REMOTE_FENCE_I 5
> -#define SBI_REMOTE_SFENCE_VMA 6
> -#define SBI_REMOTE_SFENCE_VMA_ASID 7
> -#define SBI_SHUTDOWN 8
> +#define SBI_EXT_0_1_SET_TIMER 0x0
> +#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1
> +#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2
> +#define SBI_EXT_0_1_CLEAR_IPI 0x3
> +#define SBI_EXT_0_1_SEND_IPI 0x4
> +#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5
> +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6
> +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7
> +#define SBI_EXT_0_1_SHUTDOWN 0x8
>
> -#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
> +#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
> register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
> register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \
> register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \
> @@ -42,48 +42,50 @@
>
> static inline void sbi_console_putchar(int ch)
> {
> - SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch);
> + SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch);
> }
>
> static inline int sbi_console_getchar(void)
> {
> - return SBI_CALL_0(SBI_CONSOLE_GETCHAR);
> + return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR);
> }
>
> static inline void sbi_set_timer(uint64_t stime_value)
> {
> #if __riscv_xlen == 32
> - SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32);
> + SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value,
> + stime_value >> 32);
> #else
> - SBI_CALL_1(SBI_SET_TIMER, stime_value);
> + SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value);
> #endif
> }
>
> static inline void sbi_shutdown(void)
> {
> - SBI_CALL_0(SBI_SHUTDOWN);
> + SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN);
> }
>
> static inline void sbi_clear_ipi(void)
> {
> - SBI_CALL_0(SBI_CLEAR_IPI);
> + SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI);
> }
>
> static inline void sbi_send_ipi(const unsigned long *hart_mask)
> {
> - SBI_CALL_1(SBI_SEND_IPI, hart_mask);
> + SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask);
> }
>
> static inline void sbi_remote_fence_i(const unsigned long *hart_mask)
> {
> - SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask);
> + SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask);
> }
>
> static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask,
> unsigned long start,
> unsigned long size)
> {
> - SBI_CALL_3(SBI_REMOTE_SFENCE_VMA, hart_mask, start, size);
> + SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask,
> + start, size);
> }
>
> static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
> @@ -91,7 +93,8 @@ static inline void sbi_remote_sfence_vma_asid(const
> unsigned long *hart_mask,
> unsigned long size,
> unsigned long asid)
> {
> - SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid);
> + SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask,
> + start, size, asid);
> }
>
> #endif
> --
> 2.21.0
>
LGTM.
Reviewed-by: Anup Patel
Regards,
Anup
Re: [PATCH] base: soc: Export soc_device_to_device API
On Thu, Sep 26, 2019 at 07:33:21AM -0700, mnala...@codeaurora.org wrote:
> On 2019-09-23 21:50, Greg KH wrote:
> > On Mon, Sep 23, 2019 at 02:35:33PM -0700, mnala...@codeaurora.org wrote:
> > > On 2019-09-19 23:10, Greg KH wrote:
> > > > On Thu, Sep 19, 2019 at 08:36:51PM -0700, Bjorn Andersson wrote:
> > > > > On Thu 19 Sep 15:45 PDT 2019, Greg KH wrote:
> > > > >
> > > > > > On Thu, Sep 19, 2019 at 03:40:17PM -0700, Bjorn Andersson wrote:
> > > > > > > On Thu 19 Sep 15:25 PDT 2019, Greg KH wrote:
> > > > > > >
> > > > > > > > On Thu, Sep 19, 2019 at 03:14:56PM -0700, Bjorn Andersson wrote:
> > > > > > > > > On Thu 19 Sep 14:58 PDT 2019, Greg KH wrote:
> > > > > > > > >
> > > > > > > > > > On Thu, Sep 19, 2019 at 02:53:00PM -0700, Bjorn Andersson
> > > > > > > > > > wrote:
> > > > > > > > > > > On Thu 19 Sep 14:32 PDT 2019, Greg KH wrote:
> > > > > > > > > > >
> > > > > > > > > > > > On Thu, Sep 19, 2019 at 02:13:44PM -0700, Murali
> > > > > > > > > > > > Nalajala wrote:
> > > > > > > > > > > > > If the soc drivers want to add custom sysfs entries
> > > > > > > > > > > > > it needs to
> > > > > > > > > > > > > access "dev" field in "struct soc_device". This can
> > > > > > > > > > > > > be achieved
> > > > > > > > > > > > > by "soc_device_to_device" API. Soc drivers which are
> > > > > > > > > > > > > built as a
> > > > > > > > > > > > > module they need above API to be exported. Otherwise
> > > > > > > > > > > > > one can
> > > > > > > > > > > > > observe compilation issues.
> > > > > > > > > > > > >
> > > > > > > > > > > > > Signed-off-by: Murali Nalajala
> > > > > > > > > > > > >
> > > > > > > > > > > > > ---
> > > > > > > > > > > > > drivers/base/soc.c | 1 +
> > > > > > > > > > > > > 1 file changed, 1 insertion(+)
> > > > > > > > > > > > >
> > > > > > > > > > > > > diff --git a/drivers/base/soc.c b/drivers/base/soc.c
> > > > > > > > > > > > > index 7c0c5ca..4ad52f6 100644
> > > > > > > > > > > > > --- a/drivers/base/soc.c
> > > > > > > > > > > > > +++ b/drivers/base/soc.c
> > > > > > > > > > > > > @@ -41,6 +41,7 @@ struct device
> > > > > > > > > > > > > *soc_device_to_device(struct soc_device *soc_dev)
> > > > > > > > > > > > > {
> > > > > > > > > > > > > return _dev->dev;
> > > > > > > > > > > > > }
> > > > > > > > > > > > > +EXPORT_SYMBOL_GPL(soc_device_to_device);
> > > > > > > > > > > > >
> > > > > > > > > > > > > static umode_t soc_attribute_mode(struct kobject
> > > > > > > > > > > > > *kobj,
> > > > > > > > > > > > > struct attribute *attr,
> > > > > > > > > > > >
> > > > > > > > > > > > What in-kernel driver needs this?
> > > > > > > > > > > >
> > > > > > > > > > >
> > > > > > > > > > > Half of the drivers interacting with the soc driver calls
> > > > > > > > > > > this API,
> > > > > > > > > > > several of these I see no reason for being builtin (e.g.
> > > > > > > > > > > ux500 andversatile). So I think this patch makes sense to
> > > > > > > > > > > allow us to
> > > > > > > > > > > build these as modules.
> > > > > > > > > > >
> > > > > > > > > > > > Is linux-next breaking without this?
> > > > > > > > > > > >
> > > > > > > > > > >
> > > > > > > > > > > No, we postponed the addition of any sysfs attributes in
> > > > > > > > > > > the Qualcomm
> > > > > > > > > > > socinfo driver.
> > > > > > > > > > >
> > > > > > > > > > > > We don't export things unless we have a user of the
> > > > > > > > > > > > export.
> > > > > > > > > > > >
> > > > > > > > > > > > Also, adding "custom" sysfs attributes is almost always
> > > > > > > > > > > > not the correct
> > > > > > > > > > > > thing to do at all. The driver should be doing it, by
> > > > > > > > > > > > setting up the
> > > > > > > > > > > > attribute group properly so that the driver core can do
> > > > > > > > > > > > it automatically
> > > > > > > > > > > > for it.
> > > > > > > > > > > >
> > > > > > > > > > > > No driver should be doing individual add/remove of
> > > > > > > > > > > > sysfs files. If it
> > > > > > > > > > > > does so, it is almost guaranteed to be doing it
> > > > > > > > > > > > incorrectly and racing
> > > > > > > > > > > > userspace.
> > > > > > > > > > > >
> > > > > > > > > > >
> > > > > > > > > > > The problem here is that the attributes are expected to
> > > > > > > > > > > be attached to
> > > > > > > > > > > the soc driver, which is separate from the
> > > > > > > > > > > platform-specific drivers. So
> > > > > > > > > > > there's no way to do platform specific attributes the
> > > > > > > > > > > right way.
> > > > > > > > > > >
> > > > > > > > > > > > And yes, there's loads of in-kernel examples of doing
> > > > > > > > > > > > this wrong, I've
> > > > > > > > > > > > been working on fixing that up, look at the patches now
> > > > > > > > > > > > in Linus's tree
> > > > > > > > > > > > for platform and USB drivers that do this as examples
> > > > > > > > > > > > of how to do it
> > > > > > > > > > > > right.
> > > > > > > > > > > >
> > > > > >
RE: [PATCH] HID: hyperv: Add the support of hibernation
> From: Jiri Kosina
> Sent: Thursday, September 26, 2019 6:23 AM
> To: Dexuan Cui
>
> On Thu, 26 Sep 2019, Jiri Kosina wrote:
>
> > > > This patch is basically a pure Hyper-V specific change and it has a
> > > > build dependency on the commit 271b2224d42f ("Drivers: hv: vmbus:
> > > > Implement
> > > > suspend/resume for VSC drivers for hibernation"), which is on Sasha
> Levin's
> > > > Hyper-V tree's hyperv-next branch [ ... snipped ...]
> > > >
> > > > I request this patch should go through Sasha's tree rather than the
> > > > input subsystem's tree.
> > > >
> > > > Hi Jiri, Benjamin, can you please Ack?
> > >
> > > Hi Jiri, Benjamin,
> > > Can you please take a look at the patch?
> >
> > Hi Dexuan,
> >
> > I am planning to process it once 5.4 merge window is over and thus hid.git
> > is open again for 5.5 material.
>
> Ah, now I see you asked for this go through hyperv tree. For that, feel
> free to add
> Acked-by: Jiri Kosina
> Jiri Kosina
Thanks for the Ack, Jiri!
I have a bunch of patches, including this one, to support Linux VM's hibernation
when the VM runs on Hyper-V. I just feel it would be better for all of them to
go through the Hyper-V tree. :-)
Thanks,
-- Dexuan
[PATCH] reap out the dead mutt config links
Signed-off-by: Bhaskar Chowdhury --- Documentation/process/email-clients.rst | 5 - 1 file changed, 5 deletions(-) diff --git a/Documentation/process/email-clients.rst b/Documentation/process/email-clients.rst index 5273d06c8ff6..1f920d445a8b 100644 --- a/Documentation/process/email-clients.rst +++ b/Documentation/process/email-clients.rst -The Mutt docs have lots more information: - -http://dev.mutt.org/trac/wiki/UseCases/Gmail - -http://dev.mutt.org/doc/manual.html -- signature.asc Description: PGP signature
RE: [PATCH net v2] vsock: Fix a lockdep warning in __vsock_release()
> From: linux-hyperv-ow...@vger.kernel.org > On Behalf Of Stefano Garzarella > Sent: Thursday, September 26, 2019 12:48 AM > > Hi Dexuan, > > On Thu, Sep 26, 2019 at 01:11:27AM +, Dexuan Cui wrote: > > ... > > NOTE: I only tested the code on Hyper-V. I can not test the code for > > virtio socket, as I don't have a KVM host. :-( Sorry. > > > > @Stefan, @Stefano: please review & test the patch for virtio socket, > > and let me know if the patch breaks anything. Thanks! > > Comment below, I'll test it ASAP! Stefano, Thank you! BTW, this is how I tested the patch: 1. write a socket server program in the guest. The program calls listen() and then calls sleep(1 seconds). Note: accept() is not called. 2. create some connections to the server program in the guest. 3. kill the server program by Ctrl+C, and "dmesg" will show the scary call-trace, if the kernel is built with CONFIG_LOCKDEP=y CONFIG_LOCKDEP_SUPPORT=y 4. Apply the patch, do the same test and we should no longer see the call-trace. > > - lock_sock(sk); > > + /* When "level" is 2, use the nested version to avoid the > > +* warning "possible recursive locking detected". > > +*/ > > + if (level == 1) > > + lock_sock(sk); > > Since lock_sock() calls lock_sock_nested(sk, 0), could we use directly > lock_sock_nested(sk, level) with level = 0 in vsock_release() and > level = SINGLE_DEPTH_NESTING here in the while loop? > > Thanks, > Stefano IMHO it's better to make the lock usage more explicit, as the patch does. lock_sock_nested(sk, level) or lock_sock_nested(sk, 0) seems a little odd to me. But I'm open to your suggestion: if any of the network maintainers, e.g. davem, also agrees with you, I'll change the code as you suggested. :-) Thanks, -- Dexuan
Re: [PATCH v1] PM / Domains: Add tracepoints
On Thu, Sep 26, 2019 at 03:04:38PM -0700, Matthias Kaehlcke wrote: > Define genpd_power_on/off and genpd_set_performance_state > tracepoints and use them. This says _what_ you do, but not _why_ you want to do this. Who is going to use this? What can be done with this information that is needed by anyone/someone? More details please. thanks, greg k-h
Re: [PATCH] modpost: Copy namespace string into 'struct symbol'
On Thu, Sep 26, 2019 at 05:24:46PM -0500, Shaun Ruffell wrote:
> When building an out-of-tree module I was receiving many warnings from
> modpost like:
>
> WARNING: module dahdi_vpmadt032_loader uses symbol __kmalloc from namespace
> ts/dahdi-linux/drivers/dahdi/dahdi-version.o: ..., but does not import it.
> WARNING: module dahdi_vpmadt032_loader uses symbol vpmadtreg_register from
> namespace linux/drivers/dahdi/dahdi-version.o: ..., but does not import it.
> WARNING: module dahdi_vpmadt032_loader uses symbol param_ops_int from
> namespace ahdi-linux/drivers/dahdi/dahdi-version.o: ..., but does not import
> it.
> WARNING: module dahdi_vpmadt032_loader uses symbol __init_waitqueue_head
> from namespace ux/drivers/dahdi/dahdi-version.o: ..., but does not import it.
> ...
>
> The fundamental issue appears to be that read_dump() is passing a
> pointer to a statically allocated buffer for the namespace which is
> reused as the file is parsed.
>
> This change makes it so that 'struct symbol' holds a copy of the
> namespace string in the same way that it holds a copy of the symbol
> string. Because a copy is being made, handle_modversion can now free the
> temporary copy
>
> Fixes: cb9b55d21fe0 ("modpost: add support for symbol namespaces")
> Cc: Martijn Coenen
> Cc: Joel Fernandes (Google)
> Cc: Greg Kroah-Hartman
> Cc: Matthias Maennich
> Cc: Jessica Yu
> Signed-off-by: Shaun Ruffell
> ---
>
> Hi,
>
> I didn't test that this change works with the namespaces, or investigate why
> read_dump() is only called first while building out-of-tree modules, but it
> does
> seem correct to me for the symbol to own the memory backing the namespace
> string.
>
> I also realize I'm jumping the gun a bit by testing against master before
> 5.4-rc1 is tagged.
Yes!!!
This fixes the issue that I reported to Mattias a few days ago on irc.
I am hitting this by just trying to build a single directory work of
modules:
make M=drivers/usb/
I just tested this patch and it works for me, thanks so much!
Tested-by: Greg Kroah-Hartman
RE: [PATCH -next 3/8] dmaengine: xilinx_dma: Introduce xilinx_dma_get_residue
> -Original Message- > From: Vinod Koul > Sent: Thursday, September 26, 2019 10:48 PM > To: Radhey Shyam Pandey > Cc: dan.j.willi...@intel.com; Michal Simek ; > nick.graum...@gmail.com; andrea.mere...@gmail.com; Appana Durga > Kedareswara Rao ; mcg...@kernel.org; > dmaeng...@vger.kernel.org; linux-kernel@vger.kernel.org > Subject: Re: [PATCH -next 3/8] dmaengine: xilinx_dma: Introduce > xilinx_dma_get_residue > > On 26-09-19, 05:52, Radhey Shyam Pandey wrote: > > > > > +* VDMA and simple mode do not support residue reporting, so the > > > > +* residue field will always be 0. > > > > +*/ > > > > + if (chan->xdev->dma_config->dmatype == XDMA_TYPE_VDMA || > > > !chan->has_sg) > > > > + return residue; > > > > > > why not check this in status callback? > > Assuming we mean to move vdma and non-sg check to > xilinx_dma_tx_status. > > Just a thought- Keeping this check in xilinx_dma_get_residue provides > > an abstraction and caller can simply call this func with knowing about > > IP config specific residue calculation. Considering this point does it > > looks ok ? > > well you are checking either way, so calling the lower level function > only when you need it makes more sense! Sure, will do it in v2. > > -- > ~Vinod
Re: [PATCH v6 1/5] pinctrl: mediatek: Check gpio pin number and use binary search in mtk_hw_pin_field_lookup()
Dear reviewers:
Patch v6 improves v5 by:
1.in mtk_pinconf_get() and mtk_pinconf_set() @pinctrl-paris.c:
* check if pin is in range before using pin as array index of
hw->soc->pins[]
2.in mtk_pin_field_lookup() @pinctrl-mtk-common-v2.c:
* declear start, end, check as signed integer instead of unsigned
integer. Otherwise, kernel fault will occur when s_pin field of
first entry of a mtk_pin_field_calc[] array is not 0.
On Fri, 2019-09-27 at 13:02 +0800, Light Hsieh wrote:
> 1. Check if gpio pin number is in valid range to prevent from get invalid
>pointer 'desc' in the following code:
> desc = (const struct mtk_pin_desc *)>soc->pins[gpio];
>
> 2. Use binary search in mtk_hw_pin_field_lookup()
>Modify mtk_hw_pin_field_lookup() to use binary search for accelerating
>search.
>
> ---
> drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c | 25
> +++-
> drivers/pinctrl/mediatek/pinctrl-paris.c | 25
>
> 2 files changed, 45 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
> b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
> index 20e1c89..8077855 100644
> --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
> @@ -68,7 +68,8 @@ static int mtk_hw_pin_field_lookup(struct mtk_pinctrl *hw,
> {
> const struct mtk_pin_field_calc *c, *e;
> const struct mtk_pin_reg_calc *rc;
> - u32 bits;
> + u32 bits, found = 0;
> + int start = 0, end, check;
>
> if (hw->soc->reg_cal && hw->soc->reg_cal[field].range) {
> rc = >soc->reg_cal[field];
> @@ -79,21 +80,32 @@ static int mtk_hw_pin_field_lookup(struct mtk_pinctrl *hw,
> return -ENOTSUPP;
> }
>
> + end = rc->nranges - 1;
> c = rc->range;
> e = c + rc->nranges;
>
> - while (c < e) {
> - if (desc->number >= c->s_pin && desc->number <= c->e_pin)
> + while (start <= end) {
> + check = (start + end) >> 1;
> + if (desc->number >= rc->range[check].s_pin
> + && desc->number <= rc->range[check].e_pin) {
> + found = 1;
> break;
> - c++;
> + } else if (start == end)
> + break;
> + else if (desc->number < rc->range[check].s_pin)
> + end = check - 1;
> + else
> + start = check + 1;
> }
>
> - if (c >= e) {
> + if (!found) {
> dev_dbg(hw->dev, "Not support field %d for pin = %d (%s)\n",
> field, desc->number, desc->name);
> return -ENOTSUPP;
> }
>
> + c = rc->range + check;
> +
> if (c->i_base > hw->nbase - 1) {
> dev_err(hw->dev,
> "Invalid base for field %d for pin = %d (%s)\n",
> @@ -182,6 +194,9 @@ int mtk_hw_set_value(struct mtk_pinctrl *hw, const struct
> mtk_pin_desc *desc,
> if (err)
> return err;
>
> + if (value < 0 || value > pf.mask)
> + return -EINVAL;
> +
> if (!pf.next)
> mtk_rmw(hw, pf.index, pf.offset, pf.mask << pf.bitpos,
> (value & pf.mask) << pf.bitpos);
> diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c
> b/drivers/pinctrl/mediatek/pinctrl-paris.c
> index 923264d..3e13ae7 100644
> --- a/drivers/pinctrl/mediatek/pinctrl-paris.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
> @@ -81,6 +81,8 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
> int val, val2, err, reg, ret = 1;
> const struct mtk_pin_desc *desc;
>
> + if (pin >= hw->soc->npins)
> + return -EINVAL;
> desc = (const struct mtk_pin_desc *)>soc->pins[pin];
>
> switch (param) {
> @@ -206,6 +208,10 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev,
> unsigned int pin,
> int err = 0;
> u32 reg;
>
> + if (pin >= hw->soc->npins) {
> + err = -EINVAL;
> + goto err;
> + }
> desc = (const struct mtk_pin_desc *)>soc->pins[pin];
>
> switch ((u32)param) {
> @@ -693,6 +699,9 @@ static int mtk_gpio_get_direction(struct gpio_chip *chip,
> unsigned int gpio)
> const struct mtk_pin_desc *desc;
> int value, err;
>
> + if (gpio > hw->soc->npins)
> + return -EINVAL;
> +
> desc = (const struct mtk_pin_desc *)>soc->pins[gpio];
>
> err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, );
> @@ -708,6 +717,9 @@ static int mtk_gpio_get(struct gpio_chip *chip, unsigned
> int gpio)
> const struct mtk_pin_desc *desc;
> int value, err;
>
> + if (gpio > hw->soc->npins)
> + return -EINVAL;
> +
> desc = (const struct mtk_pin_desc *)>soc->pins[gpio];
>
> err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, );
> @@ -722,6 +734,9 @@ static void
Re: [PATCH v4] memory_hotplug: Add a bounds check to __add_pages
On Thu, 2019-09-26 at 09:53 +0200, Oscar Salvador wrote:
> On Thu, Sep 26, 2019 at 11:34:05AM +1000, Alastair D'Silva wrote:
> > From: Alastair D'Silva
> >
> > On PowerPC, the address ranges allocated to OpenCAPI LPC memory
> > are allocated from firmware. These address ranges may be higher
> > than what older kernels permit, as we increased the maximum
> > permissable address in commit 4ffe713b7587
> > ("powerpc/mm: Increase the max addressable memory to 2PB"). It is
> > possible that the addressable range may change again in the
> > future.
> >
> > In this scenario, we end up with a bogus section returned from
> > __section_nr (see the discussion on the thread "mm: Trigger bug on
> > if a section is not found in __section_nr").
> >
> > Adding a check here means that we fail early and have an
> > opportunity to handle the error gracefully, rather than rumbling
> > on and potentially accessing an incorrect section.
> >
> > Further discussion is also on the thread ("powerpc: Perform a
> > bounds
> > check in arch_add_memory")
> > http://lkml.kernel.org/r/20190827052047.31547-1-alast...@au1.ibm.com
> >
> > Signed-off-by: Alastair D'Silva
>
> Reviewed-by: Oscar Salvador
>
> Just a nit-picking below:
>
> > ---
> > mm/memory_hotplug.c | 20
> > 1 file changed, 20 insertions(+)
> >
> > diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c
> > index c73f09913165..212804c0f7f5 100644
> > --- a/mm/memory_hotplug.c
> > +++ b/mm/memory_hotplug.c
> > @@ -278,6 +278,22 @@ static int check_pfn_span(unsigned long pfn,
> > unsigned long nr_pages,
> > return 0;
> > }
> >
> > +static int check_hotplug_memory_addressable(unsigned long pfn,
> > + unsigned long nr_pages)
> > +{
> > + unsigned long max_addr = ((pfn + nr_pages) << PAGE_SHIFT) - 1;
>
> I would use PFN_PHYS instead:
>
> unsigned long max_addr = PFN_PHYS(pfn + nr_pages) - 1;
>
> > +
> > + if (max_addr >> MAX_PHYSMEM_BITS) {
> > + WARN(1,
> > +"Hotplugged memory exceeds maximum addressable
> > address, range=%#lx-%#lx, maximum=%#lx\n",
> > +pfn << PAGE_SHIFT, max_addr,
>
> Same here.
>
> > +(1ul << (MAX_PHYSMEM_BITS + 1)) - 1);
>
> I would use a local variable to hold this computation.
>
> > + return -E2BIG;
> > + }
> > +
> > + return 0;
Looks like I'll have to do another spin to change that to a ull anyway,
so I'll implement those suggestions.
--
Alastair D'Silva mob: 0423 762 819
skype: alastair_dsilva
Twitter: @EvilDeece
blog: http://alastair.d-silva.org
RE: [PATCH v4 1/2] fpga: fpga-mgr: Add readback support
Hi Alan,
Did you get a chance to send your framework changes to upstream?
@Moritz Fischer: If Alan couldn't send his patch series, Can we take this patch
series??
Please let me know your thoughts on this.
Regards,
Kedar.
> On Fri, Jul 27, 2018 at 1:22 AM, Appana Durga Kedareswara rao
> wrote:
>
> Hi Appana,
>
> There should be some documentation for the debugfs added under
> Documentation/driver-api/fpga/
>
> Also there are a lot of #ifdefs that were added due to the
> CONFIG_FPGA_MGR_DEBUG_FS. This has caused a kernel robot complaint.
> The way to fix that is to have a separate c file for the debugfs
> implementation.
> I see a lot of other kernel drivers have done it this way. I have an
> implementation that I haven't submitted yet, it exposes different
> functionality
> (exposing the image firmware file name and writing to the image file). It's
> on
> the downstream github.com/altera-opensource repo [1]. I'll clean this up and
> submit it to the mailing list, it may take a minute for me to get to that.
> Once that's done, your added functionality can be a patch on top of that.
>
> Alan
>
> [1] https://github.com/altera-opensource/linux-socfpga/blob/socfpga-
> 4.17/drivers/fpga/fpga-mgr-debugfs.c
> https://github.com/altera-opensource/linux-socfpga/blob/socfpga-
> 4.17/drivers/fpga/fpga-mgr-debugfs.h
>
>
> > Inorder to debug issues with fpga's users would like to read the fpga
> > configuration information.
> > This patch adds readback support for fpga configuration data in the
> > framework through debugfs interface.
> >
> > Usage:
> > cat /sys/kernel/debug/fpga/fpga0/image
> >
> > Signed-off-by: Appana Durga Kedareswara rao
> >
> > ---
> > Changes for v4:
> > --> None.
> > Changes for v3:
> > --> None.
> > Changes for v2:
> > --> Fixed debug attribute path and name as suggested by Alan Add
> > --> config entry for DEBUG as suggested by Alan Fixed trival coding
> > --> style issues.
> >
> > drivers/fpga/Kconfig | 7 +
> > drivers/fpga/fpga-mgr.c | 68
> +++
> > include/linux/fpga/fpga-mgr.h | 5
> > 3 files changed, 80 insertions(+)
> >
> > diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index
> > 53d3f55..838ad4e 100644
> > --- a/drivers/fpga/Kconfig
> > +++ b/drivers/fpga/Kconfig
> > @@ -11,6 +11,13 @@ menuconfig FPGA
> >
> > if FPGA
> >
> > +config FPGA_MGR_DEBUG_FS
> > + tristate "FPGA Debug fs"
> > + select DEBUG_FS
> > + help
> > + FPGA manager debug provides support for reading fpga configuration
> > + information.
> > +
> > config FPGA_MGR_SOCFPGA
> > tristate "Altera SOCFPGA FPGA Manager"
> > depends on ARCH_SOCFPGA || COMPILE_TEST diff --git
> > a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c index
> > 9939d2c..4bea860 100644
> > --- a/drivers/fpga/fpga-mgr.c
> > +++ b/drivers/fpga/fpga-mgr.c
> > @@ -484,6 +484,48 @@ void fpga_mgr_put(struct fpga_manager *mgr) }
> > EXPORT_SYMBOL_GPL(fpga_mgr_put);
> >
> > +#ifdef CONFIG_FPGA_MGR_DEBUG_FS
> > +#include
> > +
> > +static int fpga_mgr_read(struct seq_file *s, void *data) {
> > + struct fpga_manager *mgr = (struct fpga_manager *)s->private;
> > + int ret = 0;
> > +
> > + if (!mgr->mops->read)
> > + return -ENOENT;
> > +
> > + if (!mutex_trylock(>ref_mutex))
> > + return -EBUSY;
> > +
> > + if (mgr->state != FPGA_MGR_STATE_OPERATING) {
> > + ret = -EPERM;
> > + goto err_unlock;
> > + }
> > +
> > + /* Read the FPGA configuration data from the fabric */
> > + ret = mgr->mops->read(mgr, s);
> > + if (ret)
> > + dev_err(>dev, "Error while reading configuration
> > + data from FPGA\n");
> > +
> > +err_unlock:
> > + mutex_unlock(>ref_mutex);
> > +
> > + return ret;
> > +}
> > +
> > +static int fpga_mgr_read_open(struct inode *inode, struct file *file)
> > +{
> > + return single_open(file, fpga_mgr_read, inode->i_private); }
> > +
> > +static const struct file_operations fpga_mgr_ops_image = {
> > + .owner = THIS_MODULE,
> > + .open = fpga_mgr_read_open,
> > + .read = seq_read,
> > +};
> > +#endif
> > +
> > /**
> > * fpga_mgr_lock - Lock FPGA manager for exclusive use
> > * @mgr: fpga manager
> > @@ -581,6 +623,29 @@ int fpga_mgr_register(struct device *dev, const
> char *name,
> > if (ret)
> > goto error_device;
> >
> > +#ifdef CONFIG_FPGA_MGR_DEBUG_FS
> > + struct dentry *d, *parent;
> > +
> > + mgr->dir = debugfs_create_dir("fpga", NULL);
> > + if (!mgr->dir)
> > + goto error_device;
> > +
> > + parent = mgr->dir;
> > + d = debugfs_create_dir(mgr->dev.kobj.name, parent);
> > + if (!d) {
> > + debugfs_remove_recursive(parent);
> > + goto error_device;
> > + }
> > +
> > + parent = d;
> > + d =
Re: WARNING in pvr2_i2c_core_done
On Thu, Sep 26, 2019 at 05:44:31PM -0400, Alan Stern wrote: > On Wed, 25 Sep 2019, Andrey Konovalov wrote: > > > On Wed, Sep 25, 2019 at 4:10 PM Alan Stern > > wrote: > > > > > > On Wed, 25 Sep 2019, syzbot wrote: > > > > > > > Hello, > > > > > > > > syzbot found the following crash on: > > > > > > > > HEAD commit:d9e63adc usb-fuzzer: main usb gadget fuzzer driver > > > > git tree: https://github.com/google/kasan.git usb-fuzzer > > > > console output: https://syzkaller.appspot.com/x/log.txt?x=16b5fcd560 > > > > kernel config: > > > > https://syzkaller.appspot.com/x/.config?x=f4fa60e981ee8e6a > > > > dashboard link: > > > > https://syzkaller.appspot.com/bug?extid=e74a998ca8f1df9cc332 > > > > compiler: gcc (GCC) 9.0.0 20181231 (experimental) > > > > syz repro: > > > > https://syzkaller.appspot.com/x/repro.syz?x=16ec07b160 > > > > C reproducer: https://syzkaller.appspot.com/x/repro.c?x=13ff087160 > > > > > > > > IMPORTANT: if you fix the bug, please add the following tag to the > > > > commit: > > > > Reported-by: syzbot+e74a998ca8f1df9cc...@syzkaller.appspotmail.com > > > > > > > > pvrusb2: Device being rendered inoperable > > > > cx25840 0-0044: Unable to detect h/w, assuming cx23887 > > > > cx25840 0-0044: cx23887 A/V decoder found @ 0x88 (pvrusb2_a) > > > > pvrusb2: Attached sub-driver cx25840 > > > > pvrusb2: ***WARNING*** pvrusb2 device hardware appears to be jammed and > > > > I > > > > can't clear it. > > > > pvrusb2: You might need to power cycle the pvrusb2 device in order to > > > > recover. > > > > [ cut here ] > > > > sysfs group 'power' not found for kobject 'i2c-0' > > > > WARNING: CPU: 0 PID: 102 at fs/sysfs/group.c:278 sysfs_remove_group > > > > fs/sysfs/group.c:278 [inline] > > > > WARNING: CPU: 0 PID: 102 at fs/sysfs/group.c:278 > > > > sysfs_remove_group+0x155/0x1b0 fs/sysfs/group.c:269 > > > > > > I have seen a lot of error messages like this one (i.e., "group 'power' > > > not found for kobject"), in runs that involved fuzzing a completely > > > different USB driver. Initial testing failed to find a cause. > > > > > > This leads me to wonder whether the problem might lie somewhere else > > > entirely. A bug in some core kernel code? Memory corruption? > > > > AFAICS so far this has only been triggered from the usbvision driver > > [1] and from the pvrusb2 driver (this report). > > > > I wanted to loop in sysfs maintainers, but it seems that Greg and > > Rafael are already cc'ed on this. > > > > [1] https://syzkaller.appspot.com/bug?extid=7fa38a608b1075dfd634 > > It turns out the reason for this error is simple: The driver > unregisters its subdevices in the release handler instead of in the > disconnect handler. There probably is documentation about this > somewhere, but I don't know exactly where -- maybe Greg remembers. Nope, I don't remember. It should happen in the disconnect handler, odd of it to be in release, but maybe that's the "easiest" way for v4l to handle this? thanks, greg k-h
Re: [PATCH] get_maintainer: Add signatures from Fixes: lines in commit message
On Thu, Sep 26, 2019 at 09:46:34PM -0700, Joe Perches wrote:
> Fixes: lines in a commit message generally indicate that a
> previous commit was inadequate for whatever reason.
>
> The signers of the previous inadequate commit should also be
> cc'd on this new commit so update get_maintainer to find the
> old commit and add the original signers.
>
> Suggested-by: Dan Carpenter
> Signed-off-by: Joe Perches
I wanted to have this feature today, even. :)
Reviewed-by: Kees Cook
-Kees
> ---
> scripts/get_maintainer.pl | 38 +-
> 1 file changed, 37 insertions(+), 1 deletion(-)
>
> diff --git a/scripts/get_maintainer.pl b/scripts/get_maintainer.pl
> index 5ef59214c555..34085d146fa2 100755
> --- a/scripts/get_maintainer.pl
> +++ b/scripts/get_maintainer.pl
> @@ -26,6 +26,7 @@ my $email = 1;
> my $email_usename = 1;
> my $email_maintainer = 1;
> my $email_reviewer = 1;
> +my $email_fixes = 1;
> my $email_list = 1;
> my $email_moderated_list = 1;
> my $email_subscriber_list = 0;
> @@ -249,6 +250,7 @@ if (!GetOptions(
> 'r!' => \$email_reviewer,
> 'n!' => \$email_usename,
> 'l!' => \$email_list,
> + 'fixes!' => \$email_fixes,
> 'moderated!' => \$email_moderated_list,
> 's!' => \$email_subscriber_list,
> 'multiline!' => \$output_multiline,
> @@ -503,6 +505,7 @@ sub read_mailmap {
> ## use the filenames on the command line or find the filenames in the
> patchfiles
>
> my @files = ();
> +my @fixes = (); # If a patch description includes
> Fixes: lines
> my @range = ();
> my @keyword_tvi = ();
> my @file_emails = ();
> @@ -568,6 +571,8 @@ foreach my $file (@ARGV) {
> my $filename2 = $2;
> push(@files, $filename1);
> push(@files, $filename2);
> + } elsif (m/^Fixes:\s+([0-9a-fA-F]{6,40})/) {
> + push(@fixes, $1) if ($email_fixes);
> } elsif (m/^\+\+\+\s+(\S+)/ or m/^---\s+(\S+)/) {
> my $filename = $1;
> $filename =~ s@^[^/]*/@@;
> @@ -598,6 +603,7 @@ foreach my $file (@ARGV) {
> }
>
> @file_emails = uniq(@file_emails);
> +@fixes = uniq(@fixes);
>
> my %email_hash_name;
> my %email_hash_address;
> @@ -612,7 +618,6 @@ my %deduplicate_name_hash = ();
> my %deduplicate_address_hash = ();
>
> my @maintainers = get_maintainers();
> -
> if (@maintainers) {
> @maintainers = merge_email(@maintainers);
> output(@maintainers);
> @@ -927,6 +932,10 @@ sub get_maintainers {
> }
> }
>
> +foreach my $fix (@fixes) {
> + vcs_add_commit_signers($fix, "blamed_fixes");
> +}
> +
> foreach my $email (@email_to, @list_to) {
> $email->[0] = deduplicate_email($email->[0]);
> }
> @@ -1031,6 +1040,7 @@ MAINTAINER field selection options:
> --roles => show roles (status:subsystem, git-signer, list, etc...)
> --rolestats => show roles and statistics (commits/total_commits, %)
> --file-emails => add email addresses found in -f file (default: 0 (off))
> +--fixes => for patches, add signatures of commits with 'Fixes: '
> (default: 1 (on))
>--scm => print SCM tree(s) if any
>--status => print status if any
>--subsystem => print subsystem name if any
> @@ -1730,6 +1740,32 @@ sub vcs_is_hg {
> return $vcs_used == 2;
> }
>
> +sub vcs_add_commit_signers {
> +return if (!vcs_exists());
> +
> +my ($commit, $desc) = @_;
> +my $commit_count = 0;
> +my $commit_authors_ref;
> +my $commit_signers_ref;
> +my $stats_ref;
> +my @commit_authors = ();
> +my @commit_signers = ();
> +my $cmd;
> +
> +$cmd = $VCS_cmds{"find_commit_signers_cmd"};
> +$cmd =~ s/(\$\w+)/$1/eeg;#substitute variables in $cmd
> +
> +($commit_count, $commit_signers_ref, $commit_authors_ref, $stats_ref) =
> vcs_find_signers($cmd, "");
> +@commit_authors = @{$commit_authors_ref} if defined $commit_authors_ref;
> +@commit_signers = @{$commit_signers_ref} if defined $commit_signers_ref;
> +
> +foreach my $signer (@commit_signers) {
> + $signer = deduplicate_email($signer);
> +}
> +
> +vcs_assign($desc, 1, @commit_signers);
> +}
> +
> sub interactive_get_maintainers {
> my ($list_ref) = @_;
> my @list = @$list_ref;
>
>
--
Kees Cook
[PATCH v6 3/5] pinctrl: mediatek: Refine mtk_pinconf_get() and mtk_pinconf_set()
1.Refine mtk_pinconf_get():
1.1 Use only one occurrence of return at end of this function.
1.2 Correct cases for PIN_CONFIG_SLEW_RATE, PIN_CONFIG_INPUT_SCHMITT_ENABLE,
and PIN_CONFIG_OUTPUT_ENABLE -
Use variable ret to receive value in mtk_hw_get_value() (instead of
variable val) since pinconf_to_config_packed() at end of this function
use variable ret to pack config value.
2.Refine mtk_pinconf_set():
2.1 Use only one occurrence of return at end of this function.
2.2 Modify case of PIN_CONFIG_INPUT_ENABLE -
Remove check of ies_present flag and always invoke mtk_hw_set_value()
since mtk_hw_pin_field_lookup() invoked inside mtk_hw_set_value() has
the same effect of checking if ies control is supported.
[The rationale is that: available of a control is always checked
in mtk_hw_pin_field_lookup() and no need to add ies_present flag
specially for ies control.]
2.3 Simply code logic for case of PIN_CONFIG_INPUT_SCHMITT.
2.4 Add case for PIN_CONFIG_INPUT_SCHMITT_ENABLE and process it with the
same code for case of PIN_CONFIG_INPUT_SCHMITT.
---
drivers/pinctrl/mediatek/pinctrl-mt6765.c | 1 -
drivers/pinctrl/mediatek/pinctrl-paris.c | 211 +++---
2 files changed, 79 insertions(+), 133 deletions(-)
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6765.c
b/drivers/pinctrl/mediatek/pinctrl-mt6765.c
index e024ebc..bada37f 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt6765.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt6765.c
@@ -1070,7 +1070,6 @@
.ngrps = ARRAY_SIZE(mtk_pins_mt6765),
.eint_hw = _eint_hw,
.gpio_m = 0,
- .ies_present = true,
.base_names = mt6765_pinctrl_register_base_names,
.nbase_names = ARRAY_SIZE(mt6765_pinctrl_register_base_names),
.bias_disable_set = mtk_pinconf_bias_disable_set,
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c
b/drivers/pinctrl/mediatek/pinctrl-paris.c
index 5217f76..54f069b 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -78,95 +78,79 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
{
struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
u32 param = pinconf_to_config_param(*config);
- int val, val2, err, reg, ret = 1;
+ int err, reg, ret = 1;
const struct mtk_pin_desc *desc;
- if (pin >= hw->soc->npins)
- return -EINVAL;
+ if (pin >= hw->soc->npins) {
+ err = -EINVAL;
+ goto out;
+ }
desc = (const struct mtk_pin_desc *)>soc->pins[pin];
switch (param) {
case PIN_CONFIG_BIAS_DISABLE:
- if (hw->soc->bias_disable_get) {
+ if (hw->soc->bias_disable_get)
err = hw->soc->bias_disable_get(hw, desc, );
- if (err)
- return err;
- } else {
- return -ENOTSUPP;
- }
+ else
+ err = -ENOTSUPP;
break;
case PIN_CONFIG_BIAS_PULL_UP:
- if (hw->soc->bias_get) {
+ if (hw->soc->bias_get)
err = hw->soc->bias_get(hw, desc, 1, );
- if (err)
- return err;
- } else {
- return -ENOTSUPP;
- }
+ else
+ err = -ENOTSUPP;
break;
case PIN_CONFIG_BIAS_PULL_DOWN:
- if (hw->soc->bias_get) {
+ if (hw->soc->bias_get)
err = hw->soc->bias_get(hw, desc, 0, );
- if (err)
- return err;
- } else {
- return -ENOTSUPP;
- }
+ else
+ err = -ENOTSUPP;
break;
case PIN_CONFIG_SLEW_RATE:
- err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, );
- if (err)
- return err;
-
- if (!val)
- return -EINVAL;
-
+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, );
break;
case PIN_CONFIG_INPUT_ENABLE:
case PIN_CONFIG_OUTPUT_ENABLE:
- err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, );
+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, );
if (err)
- return err;
-
- /* HW takes input mode as zero; output mode as non-zero */
- if ((val && param == PIN_CONFIG_INPUT_ENABLE) ||
- (!val && param == PIN_CONFIG_OUTPUT_ENABLE))
- return -EINVAL;
+ goto out;
+ /* CONFIG Current direction return value
+* - - --
+
[PATCH v6 5/5] pinctrl: mediatek: Add support for pin configuration dump via debugfs.
Add support for pin configuration dump via catting
/sys/kernel/debug/pinctrl/$platform_dependent_path/pinconf-pins.
pinctrl framework had already support such dump. This patch implement the
operation function pointer to fullfill this dump.
---
drivers/pinctrl/mediatek/pinctrl-paris.c | 88
drivers/pinctrl/mediatek/pinctrl-paris.h | 30 +++
2 files changed, 118 insertions(+)
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c
b/drivers/pinctrl/mediatek/pinctrl-paris.c
index 2a47c45..f531908 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -538,12 +538,99 @@ static int mtk_pctrl_get_group_pins(struct pinctrl_dev
*pctldev,
return 0;
}
+int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int field)
+{
+ const struct mtk_pin_desc *desc;
+ int value, err;
+
+ if (gpio > hw->soc->npins)
+ return -EINVAL;
+
+ desc = (const struct mtk_pin_desc *)>soc->pins[gpio];
+
+ err = mtk_hw_get_value(hw, desc, field, );
+ if (err)
+ return err;
+
+ return value;
+}
+
+ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
+ unsigned int gpio, char *buf, unsigned int bufLen)
+{
+ const struct mtk_pin_desc *desc;
+ int pinmux, pullup, pullen, r1 = -1, r0 = -1, len = 0;
+
+ if (gpio > hw->soc->npins)
+ return -EINVAL;
+
+ desc = (const struct mtk_pin_desc *)>soc->pins[gpio];
+ pinmux = mtk_pctrl_get_pinmux(hw, gpio);
+ if (pinmux >= hw->soc->nfuncs)
+ pinmux -= hw->soc->nfuncs;
+
+ mtk_pinconf_bias_get_combo(hw, desc, , );
+ if (pullen == MTK_PUPD_SET_R1R0_00) {
+ pullen = 0;
+ r1 = 0;
+ r0 = 0;
+ } else if (pullen == MTK_PUPD_SET_R1R0_01) {
+ pullen = 1;
+ r1 = 0;
+ r0 = 1;
+ } else if (pullen == MTK_PUPD_SET_R1R0_10) {
+ pullen = 1;
+ r1 = 1;
+ r0 = 0;
+ } else if (pullen == MTK_PUPD_SET_R1R0_11) {
+ pullen = 1;
+ r1 = 1;
+ r0 = 1;
+ } else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) {
+ pullen = 0;
+ }
+ len += snprintf(buf + len, bufLen - len,
+ "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
+ gpio,
+ pinmux,
+ mtk_pctrl_get_direction(hw, gpio),
+ mtk_pctrl_get_out(hw, gpio),
+ mtk_pctrl_get_in(hw, gpio),
+ mtk_pctrl_get_driving(hw, gpio),
+ mtk_pctrl_get_smt(hw, gpio),
+ mtk_pctrl_get_ies(hw, gpio),
+ pullen,
+ pullup);
+
+ if (r1 != -1) {
+ len += snprintf(buf + len, bufLen - len, " (%1d %1d)\n",
+ r1, r0);
+ } else {
+ len += snprintf(buf + len, bufLen - len, "\n");
+ }
+
+ return len;
+}
+
+#define PIN_DBG_BUF_SZ 96
+static void mtk_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
+ unsigned int gpio)
+{
+ struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
+ char buf[PIN_DBG_BUF_SZ];
+
+ (void)mtk_pctrl_show_one_pin(hw, gpio, buf, PIN_DBG_BUF_SZ);
+
+ seq_printf(s, "%s", buf);
+}
+
static const struct pinctrl_ops mtk_pctlops = {
.dt_node_to_map = mtk_pctrl_dt_node_to_map,
.dt_free_map= pinctrl_utils_free_map,
.get_groups_count = mtk_pctrl_get_groups_count,
.get_group_name = mtk_pctrl_get_group_name,
.get_group_pins = mtk_pctrl_get_group_pins,
+ .pin_dbg_show = mtk_pctrl_dbg_show,
};
static int mtk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
@@ -640,6 +727,7 @@ static int mtk_pconf_group_set(struct pinctrl_dev *pctldev,
unsigned group,
.pin_config_get = mtk_pinconf_get,
.pin_config_group_get = mtk_pconf_group_get,
.pin_config_group_set = mtk_pconf_group_set,
+ .is_generic = true,
};
static struct pinctrl_desc mtk_desc = {
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.h
b/drivers/pinctrl/mediatek/pinctrl-paris.h
index 3d43771..d73f4b6 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.h
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.h
@@ -60,6 +60,36 @@
int mtk_paris_pinctrl_probe(struct platform_device *pdev,
const struct mtk_pin_soc *soc);
+int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int
field);
+
+#define mtk_pctrl_get_pinmux(hw, gpio) \
+ mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_MODE)
+
+/* MTK HW use 0 as input, 1 for output
+ * This interface is for get direct register value,
+ * so don't reverse
+ */
+#define
[PATCH v6 4/5] pinctrl: mediatek: Backward compatible to previous Mediatek's bias-pull usage
Refine mtk_pinconf_set()/mtk_pinconf_get() for backward compatibility to
previous Mediatek's bias-pull usage.
In PINCTRL_MTK that use pinctrl-mtk-common.c, bias-pull setting for pins
with 2 pull resistors can be specified as value for bias-pull-up and
bias-pull-down. For example:
bias-pull-up = ;
bias-pull-up = ;
bias-pull-up = ;
bias-pull-up = ;
bias-pull-down = ;
bias-pull-down = ;
bias-pull-down = ;
bias-pull-down = ;
On the other hand, PINCTRL_MTK_PARIS use customized properties
"mediatek,pull-up-adv" and "mediatek,pull-down-adv" to specify bias-pull
setting for pins with 2 pull resistors.
This introduce in-compatibility in device tree and increatse porting
effort to Mediatek's customer that had already used PINCTRL_MTK version.
Besides, if customers are not awared of this change and still write devicetree
for PINCTRL_MTK version, they may encounter runtime failure with pinctrl and
spent time to debug.
This patch add backward compatible to previous Mediatek's bias-pull usage
so that Mediatek's customer need not use a new devicetree property name.
The rationale is that: changing driver implemenation had better leave
interface unchanged.
---
drivers/pinctrl/mediatek/pinctrl-mt6765.c| 6 +-
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c | 285 +++
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h | 11 +
drivers/pinctrl/mediatek/pinctrl-paris.c | 49 ++--
4 files changed, 327 insertions(+), 24 deletions(-)
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6765.c
b/drivers/pinctrl/mediatek/pinctrl-mt6765.c
index bada37f..ae85fdc 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt6765.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt6765.c
@@ -1072,10 +1072,8 @@
.gpio_m = 0,
.base_names = mt6765_pinctrl_register_base_names,
.nbase_names = ARRAY_SIZE(mt6765_pinctrl_register_base_names),
- .bias_disable_set = mtk_pinconf_bias_disable_set,
- .bias_disable_get = mtk_pinconf_bias_disable_get,
- .bias_set = mtk_pinconf_bias_set,
- .bias_get = mtk_pinconf_bias_get,
+ .bias_set_combo = mtk_pinconf_bias_set_combo,
+ .bias_get_combo = mtk_pinconf_bias_get_combo,
.drive_set = mtk_pinconf_drive_set_direct_val,
.drive_get = mtk_pinconf_drive_get_direct_val,
.adv_pull_get = mtk_pinconf_adv_pull_get,
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
index acfddf9..6d9972f 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
@@ -13,6 +13,8 @@
#include
#include
+#include
+
#include "mtk-eint.h"
#include "pinctrl-mtk-common-v2.h"
@@ -206,6 +208,20 @@ int mtk_hw_set_value(struct mtk_pinctrl *hw, const struct
mtk_pin_desc *desc,
return 0;
}
+void mtk_hw_set_value_no_lookup(struct mtk_pinctrl *hw,
+ const struct mtk_pin_desc *desc,
+ int value, struct mtk_pin_field *pf)
+{
+ if (value < 0 || value > pf->mask)
+ return;
+
+ if (!pf->next)
+ mtk_rmw(hw, pf->index, pf->offset, pf->mask << pf->bitpos,
+ (value & pf->mask) << pf->bitpos);
+ else
+ mtk_hw_write_cross_field(hw, pf, value);
+}
+
int mtk_hw_get_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc,
int field, int *value)
{
@@ -225,6 +241,17 @@ int mtk_hw_get_value(struct mtk_pinctrl *hw, const struct
mtk_pin_desc *desc,
return 0;
}
+void mtk_hw_get_value_no_lookup(struct mtk_pinctrl *hw,
+ const struct mtk_pin_desc *desc,
+ int *value, struct mtk_pin_field *pf)
+{
+ if (!pf->next)
+ *value = (mtk_r32(hw, pf->index, pf->offset)
+ >> pf->bitpos) & pf->mask;
+ else
+ mtk_hw_read_cross_field(hw, pf, value);
+}
+
static int mtk_xt_find_eint_num(struct mtk_pinctrl *hw, unsigned long eint_n)
{
const struct mtk_pin_desc *desc;
@@ -517,6 +544,264 @@ int mtk_pinconf_bias_get_rev1(struct mtk_pinctrl *hw,
return 0;
}
+/* Combo for the following pull register type:
+ * 1. PU + PD
+ * 2. PULLSEL + PULLEN
+ * 3. PUPD + R0 + R1
+ */
+int mtk_pinconf_bias_set_pu_pd(struct mtk_pinctrl *hw,
+ const struct mtk_pin_desc *desc,
+ u32 pullup, u32 arg)
+{
+ struct mtk_pin_field pf;
+ int err = -EINVAL;
+ int pu, pd;
+
+ err = mtk_hw_pin_field_lookup(hw, desc, PINCTRL_PIN_REG_PU, );
+ if (err)
+ goto out;
+
+ if (arg == MTK_DISABLE) {
+ pu = 0;
+ pd = 0;
+ } else if ((arg == MTK_ENABLE) && pullup) {
+ pu = 1;
+ pd = 0;
+ } else if ((arg == MTK_ENABLE) && !pullup) {
+ pu = 0;
+
[PATCH v6 2/5] pinctrl: mediatek: Supporting driving setting without mapping current to register value
Mediatek's smarphone project actual usage does need to know current value
(in mA) in procedure of finding the best driving setting.
The steps in the procedure is like as follow:
1. set driving setting field in setting register as 0, measure waveform,
perform test, and etc.
2. set driving setting field in setting register as 1, measure waveform,
perform test, and etc.
...
n. set driving setting field in setting register as n-1, measure
waveform, perform test, and etc.
Check the results of steps 1~n and adopt the setting that get best result.
This procedure does need to know the mapping between current to register
value.
Therefore, setting driving without mapping current is more pratical for
Mediatek's smartphone usage.
---
drivers/pinctrl/mediatek/pinctrl-mt6765.c| 4 ++--
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c | 21 +
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h | 5 +
drivers/pinctrl/mediatek/pinctrl-paris.c | 1 +
4 files changed, 29 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6765.c
b/drivers/pinctrl/mediatek/pinctrl-mt6765.c
index 32451e8..e024ebc 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt6765.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt6765.c
@@ -1077,8 +1077,8 @@
.bias_disable_get = mtk_pinconf_bias_disable_get,
.bias_set = mtk_pinconf_bias_set,
.bias_get = mtk_pinconf_bias_get,
- .drive_set = mtk_pinconf_drive_set_rev1,
- .drive_get = mtk_pinconf_drive_get_rev1,
+ .drive_set = mtk_pinconf_drive_set_direct_val,
+ .drive_get = mtk_pinconf_drive_get_direct_val,
.adv_pull_get = mtk_pinconf_adv_pull_get,
.adv_pull_set = mtk_pinconf_adv_pull_set,
};
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
index 8077855..acfddf9 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
@@ -608,6 +608,27 @@ int mtk_pinconf_drive_get_rev1(struct mtk_pinctrl *hw,
return 0;
}
+/* Revision direct value */
+int mtk_pinconf_drive_set_direct_val(struct mtk_pinctrl *hw,
+ const struct mtk_pin_desc *desc, u32 arg)
+{
+ int err;
+
+ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DRV, arg);
+
+ return err;
+}
+
+int mtk_pinconf_drive_get_direct_val(struct mtk_pinctrl *hw,
+ const struct mtk_pin_desc *desc, int *val)
+{
+ int err;
+
+ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DRV, val);
+
+ return err;
+}
+
int mtk_pinconf_adv_pull_set(struct mtk_pinctrl *hw,
const struct mtk_pin_desc *desc, bool pullup,
u32 arg)
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
index 1b7da42..b3bada0 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
@@ -288,6 +288,11 @@ int mtk_pinconf_drive_set_rev1(struct mtk_pinctrl *hw,
int mtk_pinconf_drive_get_rev1(struct mtk_pinctrl *hw,
const struct mtk_pin_desc *desc, int *val);
+int mtk_pinconf_drive_set_direct_val(struct mtk_pinctrl *hw,
+ const struct mtk_pin_desc *desc, u32 arg);
+int mtk_pinconf_drive_get_direct_val(struct mtk_pinctrl *hw,
+ const struct mtk_pin_desc *desc, int *val);
+
int mtk_pinconf_adv_pull_set(struct mtk_pinctrl *hw,
const struct mtk_pin_desc *desc, bool pullup,
u32 arg);
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c
b/drivers/pinctrl/mediatek/pinctrl-paris.c
index 3e13ae7..5217f76 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -970,3 +970,4 @@ static int mtk_paris_pinctrl_resume(struct device *device)
.suspend_noirq = mtk_paris_pinctrl_suspend,
.resume_noirq = mtk_paris_pinctrl_resume,
};
+
--
1.8.1.1.dirty
[PATCH v6 1/5] pinctrl: mediatek: Check gpio pin number and use binary search in mtk_hw_pin_field_lookup()
1. Check if gpio pin number is in valid range to prevent from get invalid
pointer 'desc' in the following code:
desc = (const struct mtk_pin_desc *)>soc->pins[gpio];
2. Use binary search in mtk_hw_pin_field_lookup()
Modify mtk_hw_pin_field_lookup() to use binary search for accelerating
search.
---
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c | 25 +++-
drivers/pinctrl/mediatek/pinctrl-paris.c | 25
2 files changed, 45 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
index 20e1c89..8077855 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
@@ -68,7 +68,8 @@ static int mtk_hw_pin_field_lookup(struct mtk_pinctrl *hw,
{
const struct mtk_pin_field_calc *c, *e;
const struct mtk_pin_reg_calc *rc;
- u32 bits;
+ u32 bits, found = 0;
+ int start = 0, end, check;
if (hw->soc->reg_cal && hw->soc->reg_cal[field].range) {
rc = >soc->reg_cal[field];
@@ -79,21 +80,32 @@ static int mtk_hw_pin_field_lookup(struct mtk_pinctrl *hw,
return -ENOTSUPP;
}
+ end = rc->nranges - 1;
c = rc->range;
e = c + rc->nranges;
- while (c < e) {
- if (desc->number >= c->s_pin && desc->number <= c->e_pin)
+ while (start <= end) {
+ check = (start + end) >> 1;
+ if (desc->number >= rc->range[check].s_pin
+&& desc->number <= rc->range[check].e_pin) {
+ found = 1;
break;
- c++;
+ } else if (start == end)
+ break;
+ else if (desc->number < rc->range[check].s_pin)
+ end = check - 1;
+ else
+ start = check + 1;
}
- if (c >= e) {
+ if (!found) {
dev_dbg(hw->dev, "Not support field %d for pin = %d (%s)\n",
field, desc->number, desc->name);
return -ENOTSUPP;
}
+ c = rc->range + check;
+
if (c->i_base > hw->nbase - 1) {
dev_err(hw->dev,
"Invalid base for field %d for pin = %d (%s)\n",
@@ -182,6 +194,9 @@ int mtk_hw_set_value(struct mtk_pinctrl *hw, const struct
mtk_pin_desc *desc,
if (err)
return err;
+ if (value < 0 || value > pf.mask)
+ return -EINVAL;
+
if (!pf.next)
mtk_rmw(hw, pf.index, pf.offset, pf.mask << pf.bitpos,
(value & pf.mask) << pf.bitpos);
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c
b/drivers/pinctrl/mediatek/pinctrl-paris.c
index 923264d..3e13ae7 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -81,6 +81,8 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
int val, val2, err, reg, ret = 1;
const struct mtk_pin_desc *desc;
+ if (pin >= hw->soc->npins)
+ return -EINVAL;
desc = (const struct mtk_pin_desc *)>soc->pins[pin];
switch (param) {
@@ -206,6 +208,10 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev,
unsigned int pin,
int err = 0;
u32 reg;
+ if (pin >= hw->soc->npins) {
+ err = -EINVAL;
+ goto err;
+ }
desc = (const struct mtk_pin_desc *)>soc->pins[pin];
switch ((u32)param) {
@@ -693,6 +699,9 @@ static int mtk_gpio_get_direction(struct gpio_chip *chip,
unsigned int gpio)
const struct mtk_pin_desc *desc;
int value, err;
+ if (gpio > hw->soc->npins)
+ return -EINVAL;
+
desc = (const struct mtk_pin_desc *)>soc->pins[gpio];
err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, );
@@ -708,6 +717,9 @@ static int mtk_gpio_get(struct gpio_chip *chip, unsigned
int gpio)
const struct mtk_pin_desc *desc;
int value, err;
+ if (gpio > hw->soc->npins)
+ return -EINVAL;
+
desc = (const struct mtk_pin_desc *)>soc->pins[gpio];
err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, );
@@ -722,6 +734,9 @@ static void mtk_gpio_set(struct gpio_chip *chip, unsigned
int gpio, int value)
struct mtk_pinctrl *hw = gpiochip_get_data(chip);
const struct mtk_pin_desc *desc;
+ if (gpio > hw->soc->npins)
+ return;
+
desc = (const struct mtk_pin_desc *)>soc->pins[gpio];
mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value);
@@ -729,12 +744,22 @@ static void mtk_gpio_set(struct gpio_chip *chip, unsigned
int gpio, int value)
static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio)
{
+ struct mtk_pinctrl *hw = gpiochip_get_data(chip);
+
+
Re: [PATCH] ipc/sem: Fix race between to-be-woken task and waker
Hi,
On 9/26/19 8:12 PM, Waiman Long wrote:
On 9/26/19 5:34 AM, Peter Zijlstra wrote:
On Fri, Sep 20, 2019 at 11:54:02AM -0400, Waiman Long wrote:
While looking at a customr bug report about potential missed wakeup in
the system V semaphore code, I spot a potential problem. The fact that
semaphore waiter stays in TASK_RUNNING state while checking queue status
may lead to missed wakeup if a spurious wakeup happens in the right
moment as try_to_wake_up() will do nothing if the task state isn't right.
To eliminate this possibility, the task state is now reset to
TASK_INTERRUPTIBLE immediately after wakeup before checking the queue
status. This should eliminate the race condition on the interaction
between the queue status and the task state and fix the potential missed
wakeup problem.
You are obviously right, there is a huge race condition.
Bah, this code always makes my head hurt.
Yes, AFAICT the pattern it uses has been broken since 0a2b9d4c7967,
since that removed doing the actual wakeup from under the sem_lock(),
which is what it relies on.
Correct - I've overlooked that.
First, theory:
setting queue->status, reading queue->status, setting
current->state=TASK_INTERRUPTIBLE are all under the correct spinlock.
(there is an opportunistic read of queue->status without locks, but it
is retried when the lock got acquired)
setting current->state=RUNNING is outside of any lock.
So as far as current->state is concerned, the lock doesn't exist. And if
the lock doesn't exist, we must follow the rules applicable for
set_current_state().
I'll try to check the code this week.
And we should check the remaining wake-queue users, the logic is
everywhere identical.
After having a second look at the code again, I probably misread the
code the first time around. In the sleeping path, there is a check of
queue.status and setting of task state both under the sem lock in the
sleeping path. So as long as setting of queue status is under lock, they
should synchronize properly.
It looks like queue status setting is under lock, but I can't use
lockdep to confirm that as the locking can be done by either the array
lock or in one of the spinlocks in the array. Are you aware of a way of
doing that?
For testing? Have you considered just always using the global lock?
(untested):
--- a/ipc/sem.c
+++ b/ipc/sem.c
@@ -370,7 +370,7 @@ static inline int sem_lock(struct sem_array *sma,
struct sembuf *sops,
ย ย ย struct sem *sem;
ย ย ย int idx;
-ย ย if (nsops != 1) {
+ย ย if (nsops != 1 || 1) {
ย ย ย /* Complex operation - acquire a full lock */
ย ย ย ipc_lock_object(>sem_perm);
Anyway, I do think we need to add some comment to clarify the situation
to avoid future confusion.
Around line 190 is the comment that explains locking & memory ordering.
I have only documented the content of sem_undo and sem_array, but
neither queue nor current->state :-(
--
ย ย ย Manfred
Re: [PATCH] vhost: introduce mdev based hardware backend
On Fri, Sep 27, 2019 at 11:46:06AM +0800, Jason Wang wrote:
> On 2019/9/26 ไธๅ12:54, Tiwei Bie wrote:
> > +
> > +static long vhost_mdev_start(struct vhost_mdev *m)
> > +{
> > + struct mdev_device *mdev = m->mdev;
> > + const struct virtio_mdev_device_ops *ops = mdev_get_dev_ops(mdev);
> > + struct virtio_mdev_callback cb;
> > + struct vhost_virtqueue *vq;
> > + int idx;
> > +
> > + ops->set_features(mdev, m->acked_features);
> > +
> > + mdev_add_status(mdev, VIRTIO_CONFIG_S_FEATURES_OK);
> > + if (!(mdev_get_status(mdev) & VIRTIO_CONFIG_S_FEATURES_OK))
> > + goto reset;
> > +
> > + for (idx = 0; idx < m->nvqs; idx++) {
> > + vq = >vqs[idx];
> > +
> > + if (!vq->desc || !vq->avail || !vq->used)
> > + break;
> > +
> > + if (ops->set_vq_state(mdev, idx, vq->last_avail_idx))
> > + goto reset;
>
>
> If we do set_vq_state() in SET_VRING_BASE, we won't need this step here.
Yeah, I plan to do it in the next version.
>
>
> > +
> > + /*
> > +* In vhost-mdev, userspace should pass ring addresses
> > +* in guest physical addresses when IOMMU is disabled or
> > +* IOVAs when IOMMU is enabled.
> > +*/
>
>
> A question here, consider we're using noiommu mode. If guest physical
> address is passed here, how can a device use that?
>
> I believe you meant "host physical address" here? And it also have the
> implication that the HPA should be continuous (e.g using hugetlbfs).
The comment is talking about the virtual IOMMU (i.e. iotlb in vhost).
It should be rephrased to cover the noiommu case as well. Thanks for
spotting this.
> > +
> > + switch (cmd) {
> > + case VHOST_MDEV_SET_STATE:
> > + r = vhost_set_state(m, argp);
> > + break;
> > + case VHOST_GET_FEATURES:
> > + r = vhost_get_features(m, argp);
> > + break;
> > + case VHOST_SET_FEATURES:
> > + r = vhost_set_features(m, argp);
> > + break;
> > + case VHOST_GET_VRING_BASE:
> > + r = vhost_get_vring_base(m, argp);
> > + break;
>
>
> Does it mean the SET_VRING_BASE may only take affect after
> VHOST_MEV_SET_STATE?
Yeah, in this version, SET_VRING_BASE won't set the base to the
device directly. But I plan to not delay this anymore in the next
version to support the SET_STATUS.
>
>
> > + default:
> > + r = vhost_dev_ioctl(>dev, cmd, argp);
> > + if (r == -ENOIOCTLCMD)
> > + r = vhost_vring_ioctl(>dev, cmd, argp);
> > + }
> > +
> > + mutex_unlock(>mutex);
> > + return r;
> > +}
> > +
> > +static const struct vfio_device_ops vfio_vhost_mdev_dev_ops = {
> > + .name = "vfio-vhost-mdev",
> > + .open = vhost_mdev_open,
> > + .release= vhost_mdev_release,
> > + .ioctl = vhost_mdev_unlocked_ioctl,
> > +};
> > +
> > +static int vhost_mdev_probe(struct device *dev)
> > +{
> > + struct mdev_device *mdev = mdev_from_dev(dev);
> > + const struct virtio_mdev_device_ops *ops = mdev_get_dev_ops(mdev);
> > + struct vhost_mdev *m;
> > + int nvqs, r;
> > +
> > + m = kzalloc(sizeof(*m), GFP_KERNEL | __GFP_RETRY_MAYFAIL);
> > + if (!m)
> > + return -ENOMEM;
> > +
> > + mutex_init(>mutex);
> > +
> > + nvqs = ops->get_queue_max(mdev);
> > + m->nvqs = nvqs;
>
>
> The name could be confusing, get_queue_max() is to get the maximum number of
> entries for a virtqueue supported by this device.
OK. It might be better to rename it to something like:
get_vq_num_max()
which is more consistent with the set_vq_num().
>
> It looks to me that we need another API to query the maximum number of
> virtqueues supported by the device.
Yeah.
Thanks,
Tiwei
>
> Thanks
>
>
> > +
> > + m->vqs = kmalloc_array(nvqs, sizeof(struct vhost_virtqueue),
> > + GFP_KERNEL);
> > + if (!m->vqs) {
> > + r = -ENOMEM;
> > + goto err;
> > + }
> > +
> > + r = vfio_add_group_dev(dev, _vhost_mdev_dev_ops, m);
> > + if (r)
> > + goto err;
> > +
> > + m->features = ops->get_features(mdev);
> > + m->mdev = mdev;
> > + return 0;
> > +
> > +err:
> > + kfree(m->vqs);
> > + kfree(m);
> > + return r;
> > +}
> > +
> > +static void vhost_mdev_remove(struct device *dev)
> > +{
> > + struct vhost_mdev *m;
> > +
> > + m = vfio_del_group_dev(dev);
> > + mutex_destroy(>mutex);
> > + kfree(m->vqs);
> > + kfree(m);
> > +}
> > +
> > +static struct mdev_class_id id_table[] = {
> > + { MDEV_ID_VHOST },
> > + { 0 },
> > +};
> > +
> > +static struct mdev_driver vhost_mdev_driver = {
> > + .name = "vhost_mdev",
> > + .probe = vhost_mdev_probe,
> > + .remove = vhost_mdev_remove,
> > + .id_table = id_table,
> > +};
> > +
> > +static int __init vhost_mdev_init(void)
> > +{
> > + return mdev_register_driver(_mdev_driver, THIS_MODULE);
> > +}
> >
[PATCH v2 1/2] ipvs: batch __ip_vs_cleanup
It's better to batch __ip_vs_cleanup to speedup ipvs
connections dismantle.
Signed-off-by: Haishuang Yan
---
v2: remove unused pointer list
---
include/net/ip_vs.h | 2 +-
net/netfilter/ipvs/ip_vs_core.c | 28
net/netfilter/ipvs/ip_vs_ctl.c | 12 +---
3 files changed, 26 insertions(+), 16 deletions(-)
diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h
index 3759167..93e7a25 100644
--- a/include/net/ip_vs.h
+++ b/include/net/ip_vs.h
@@ -1324,7 +1324,7 @@ static inline void ip_vs_control_del(struct ip_vs_conn
*cp)
void ip_vs_control_net_cleanup(struct netns_ipvs *ipvs);
void ip_vs_estimator_net_cleanup(struct netns_ipvs *ipvs);
void ip_vs_sync_net_cleanup(struct netns_ipvs *ipvs);
-void ip_vs_service_net_cleanup(struct netns_ipvs *ipvs);
+void ip_vs_service_nets_cleanup(struct list_head *net_list);
/* IPVS application functions
* (from ip_vs_app.c)
diff --git a/net/netfilter/ipvs/ip_vs_core.c b/net/netfilter/ipvs/ip_vs_core.c
index 8b80ab7..93cfb47 100644
--- a/net/netfilter/ipvs/ip_vs_core.c
+++ b/net/netfilter/ipvs/ip_vs_core.c
@@ -2402,18 +2402,22 @@ static int __net_init __ip_vs_init(struct net *net)
return -ENOMEM;
}
-static void __net_exit __ip_vs_cleanup(struct net *net)
+static void __net_exit __ip_vs_cleanup_batch(struct list_head *net_list)
{
- struct netns_ipvs *ipvs = net_ipvs(net);
-
- ip_vs_service_net_cleanup(ipvs);/* ip_vs_flush() with locks */
- ip_vs_conn_net_cleanup(ipvs);
- ip_vs_app_net_cleanup(ipvs);
- ip_vs_protocol_net_cleanup(ipvs);
- ip_vs_control_net_cleanup(ipvs);
- ip_vs_estimator_net_cleanup(ipvs);
- IP_VS_DBG(2, "ipvs netns %d released\n", ipvs->gen);
- net->ipvs = NULL;
+ struct netns_ipvs *ipvs;
+ struct net *net;
+
+ ip_vs_service_nets_cleanup(net_list); /* ip_vs_flush() with locks */
+ list_for_each_entry(net, net_list, exit_list) {
+ ipvs = net_ipvs(net);
+ ip_vs_conn_net_cleanup(ipvs);
+ ip_vs_app_net_cleanup(ipvs);
+ ip_vs_protocol_net_cleanup(ipvs);
+ ip_vs_control_net_cleanup(ipvs);
+ ip_vs_estimator_net_cleanup(ipvs);
+ IP_VS_DBG(2, "ipvs netns %d released\n", ipvs->gen);
+ net->ipvs = NULL;
+ }
}
static int __net_init __ip_vs_dev_init(struct net *net)
@@ -2442,7 +2446,7 @@ static void __net_exit __ip_vs_dev_cleanup(struct net
*net)
static struct pernet_operations ipvs_core_ops = {
.init = __ip_vs_init,
- .exit = __ip_vs_cleanup,
+ .exit_batch = __ip_vs_cleanup_batch,
.id = _vs_net_id,
.size = sizeof(struct netns_ipvs),
};
diff --git a/net/netfilter/ipvs/ip_vs_ctl.c b/net/netfilter/ipvs/ip_vs_ctl.c
index 8b48e7c..153c77b 100644
--- a/net/netfilter/ipvs/ip_vs_ctl.c
+++ b/net/netfilter/ipvs/ip_vs_ctl.c
@@ -1607,14 +1607,20 @@ static int ip_vs_flush(struct netns_ipvs *ipvs, bool
cleanup)
/*
* Delete service by {netns} in the service table.
- * Called by __ip_vs_cleanup()
+ * Called by __ip_vs_batch_cleanup()
*/
-void ip_vs_service_net_cleanup(struct netns_ipvs *ipvs)
+void ip_vs_service_nets_cleanup(struct list_head *net_list)
{
+ struct netns_ipvs *ipvs;
+ struct net *net;
+
EnterFunction(2);
/* Check for "full" addressed entries */
mutex_lock(&__ip_vs_mutex);
- ip_vs_flush(ipvs, true);
+ list_for_each_entry(net, net_list, exit_list) {
+ ipvs = net_ipvs(net);
+ ip_vs_flush(ipvs, true);
+ }
mutex_unlock(&__ip_vs_mutex);
LeaveFunction(2);
}
--
1.8.3.1
[PATCH v2 2/2] ipvs: batch __ip_vs_dev_cleanup
It's better to batch __ip_vs_cleanup to speedup ipvs
devices dismantle.
Signed-off-by: Haishuang Yan
---
v2: remove unused pointer list
---
net/netfilter/ipvs/ip_vs_core.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/net/netfilter/ipvs/ip_vs_core.c b/net/netfilter/ipvs/ip_vs_core.c
index 93cfb47..512259f 100644
--- a/net/netfilter/ipvs/ip_vs_core.c
+++ b/net/netfilter/ipvs/ip_vs_core.c
@@ -2433,14 +2433,19 @@ static int __net_init __ip_vs_dev_init(struct net *net)
return ret;
}
-static void __net_exit __ip_vs_dev_cleanup(struct net *net)
+static void __net_exit __ip_vs_dev_cleanup_batch(struct list_head *net_list)
{
- struct netns_ipvs *ipvs = net_ipvs(net);
+ struct netns_ipvs *ipvs;
+ struct net *net;
+
EnterFunction(2);
- nf_unregister_net_hooks(net, ip_vs_ops, ARRAY_SIZE(ip_vs_ops));
- ipvs->enable = 0; /* Disable packet reception */
- smp_wmb();
- ip_vs_sync_net_cleanup(ipvs);
+ list_for_each_entry(net, net_list, exit_list) {
+ ipvs = net_ipvs(net);
+ nf_unregister_net_hooks(net, ip_vs_ops, ARRAY_SIZE(ip_vs_ops));
+ ipvs->enable = 0; /* Disable packet reception */
+ smp_wmb();
+ ip_vs_sync_net_cleanup(ipvs);
+ }
LeaveFunction(2);
}
@@ -2453,7 +2458,7 @@ static void __net_exit __ip_vs_dev_cleanup(struct net
*net)
static struct pernet_operations ipvs_core_dev_ops = {
.init = __ip_vs_dev_init,
- .exit = __ip_vs_dev_cleanup,
+ .exit_batch = __ip_vs_dev_cleanup_batch,
};
/*
--
1.8.3.1
[PATCH v2 0/2] ipvs: speedup ipvs netns dismantle
Implement exit_batch() method to dismantle more ipvs netns per round. Tested: $ cat add_del_unshare.sh #!/bin/bash for i in `seq 1 100` do (for j in `seq 1 40` ; do unshare -n ipvsadm -A -t 172.16.$i.$j:80 >/dev/null ; done) & done wait; grep net_namespace /proc/slabinfo Befor patch: $ time sh add_del_unshare.sh net_namespace 4020 4020 473668 : tunables000 : slabdata670670 0 real0m8.086s user0m2.025s sys 0m36.956s After patch: $ time sh add_del_unshare.sh net_namespace 4020 4020 473668 : tunables000 : slabdata670670 0 real0m7.623s user0m2.003s sys 0m32.935s Haishuang Yan (2): ipvs: batch __ip_vs_cleanup ipvs: batch __ip_vs_dev_cleanup include/net/ip_vs.h | 2 +- net/netfilter/ipvs/ip_vs_core.c | 47 - net/netfilter/ipvs/ip_vs_ctl.c | 12 --- 3 files changed, 38 insertions(+), 23 deletions(-) -- 1.8.3.1
Re: [PATCH v6] gpio/mpc8xxx: change irq handler from chained to normal
Hi Hui, Thank you for the patch! Yet something to improve: [auto build test ERROR on gpio/for-next] [cannot apply to v5.3 next-20190925] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Hui-Song/gpio-mpc8xxx-change-irq-handler-from-chained-to-normal/20190927-113256 base: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git for-next config: mips-allmodconfig (attached as .config) compiler: mips-linux-gcc (GCC) 7.4.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree GCC_VERSION=7.4.0 make.cross ARCH=mips If you fix the issue, kindly add following tag Reported-by: kbuild test robot All error/warnings (new ones prefixed by >>): In file included from arch/mips/include/asm/bitops.h:625:0, from include/linux/bitops.h:19, from include/linux/kernel.h:12, from drivers/gpio/gpio-mpc8xxx.c:12: drivers/gpio/gpio-mpc8xxx.c: In function 'mpc8xxx_gpio_irq_cascade': >> include/asm-generic/bitops/find.h:75:50: error: passing argument 1 of >> 'find_next_bit' from incompatible pointer type >> [-Werror=incompatible-pointer-types] #define find_first_bit(addr, size) find_next_bit((addr), (size), 0) ^ >> include/linux/bitops.h:22:15: note: in expansion of macro 'find_first_bit' for ((bit) = find_first_bit((addr), (size)); \ ^~ drivers/gpio/gpio-mpc8xxx.c:140:2: note: in expansion of macro 'for_each_set_bit' for_each_set_bit(i, , 32) ^~~~ include/asm-generic/bitops/find.h:15:22: note: expected 'const long unsigned int *' but argument is of type 'unsigned int *' extern unsigned long find_next_bit(const unsigned long *addr, unsigned long ^ In file included from include/linux/kernel.h:12:0, from drivers/gpio/gpio-mpc8xxx.c:12: include/linux/bitops.h:24:29: error: passing argument 1 of 'find_next_bit' from incompatible pointer type [-Werror=incompatible-pointer-types] (bit) = find_next_bit((addr), (size), (bit) + 1)) ^ drivers/gpio/gpio-mpc8xxx.c:140:2: note: in expansion of macro 'for_each_set_bit' for_each_set_bit(i, , 32) ^~~~ In file included from arch/mips/include/asm/bitops.h:625:0, from include/linux/bitops.h:19, from include/linux/kernel.h:12, from drivers/gpio/gpio-mpc8xxx.c:12: include/asm-generic/bitops/find.h:15:22: note: expected 'const long unsigned int *' but argument is of type 'unsigned int *' extern unsigned long find_next_bit(const unsigned long *addr, unsigned long ^ cc1: some warnings being treated as errors -- In file included from arch/mips/include/asm/bitops.h:625:0, from include/linux/bitops.h:19, from include/linux/kernel.h:12, from drivers//gpio/gpio-mpc8xxx.c:12: drivers//gpio/gpio-mpc8xxx.c: In function 'mpc8xxx_gpio_irq_cascade': >> include/asm-generic/bitops/find.h:75:50: error: passing argument 1 of >> 'find_next_bit' from incompatible pointer type >> [-Werror=incompatible-pointer-types] #define find_first_bit(addr, size) find_next_bit((addr), (size), 0) ^ >> include/linux/bitops.h:22:15: note: in expansion of macro 'find_first_bit' for ((bit) = find_first_bit((addr), (size)); \ ^~ drivers//gpio/gpio-mpc8xxx.c:140:2: note: in expansion of macro 'for_each_set_bit' for_each_set_bit(i, , 32) ^~~~ include/asm-generic/bitops/find.h:15:22: note: expected 'const long unsigned int *' but argument is of type 'unsigned int *' extern unsigned long find_next_bit(const unsigned long *addr, unsigned long ^ In file included from include/linux/kernel.h:12:0, from drivers//gpio/gpio-mpc8xxx.c:12: include/linux/bitops.h:24:29: error: passing argument 1 of 'find_next_bit' from incompatible pointer type [-Werror=incompatible-pointer-types] (bit) = find_next_bit((addr), (size), (bit) + 1)) ^ drivers//gpio/gpio-mpc8xxx.c:140:2: note: in expansion of macro 'for_each_set_bit' for_each_set_bit(i, , 32) ^~~~ In file included from arch/mips/include/asm/bitops.h:625:0, from include/linux/bitops.h:19, from
[PATCH 1/1] direct-io: Change is_async member of struct dio from int to bool
Change is_async member of struct dio from int to bool.
Found this during code review.
Signed-off-by: Ritesh Harjani
---
fs/direct-io.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/direct-io.c b/fs/direct-io.c
index ae196784f487..b139876653ef 100644
--- a/fs/direct-io.c
+++ b/fs/direct-io.c
@@ -128,7 +128,7 @@ struct dio {
/* BIO completion state */
spinlock_t bio_lock;/* protects BIO fields below */
int page_errors;/* errno from get_user_pages() */
- int is_async; /* is IO async ? */
+ bool is_async; /* is IO async ? */
bool defer_completion; /* defer AIO completion to workqueue? */
bool should_dirty; /* if pages should be dirtied */
int io_error; /* IO error in completion path */
--
2.21.0
[PATCH] get_maintainer: Add signatures from Fixes: lines in commit message
Fixes: lines in a commit message generally indicate that a
previous commit was inadequate for whatever reason.
The signers of the previous inadequate commit should also be
cc'd on this new commit so update get_maintainer to find the
old commit and add the original signers.
Suggested-by: Dan Carpenter
Signed-off-by: Joe Perches
---
scripts/get_maintainer.pl | 38 +-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/scripts/get_maintainer.pl b/scripts/get_maintainer.pl
index 5ef59214c555..34085d146fa2 100755
--- a/scripts/get_maintainer.pl
+++ b/scripts/get_maintainer.pl
@@ -26,6 +26,7 @@ my $email = 1;
my $email_usename = 1;
my $email_maintainer = 1;
my $email_reviewer = 1;
+my $email_fixes = 1;
my $email_list = 1;
my $email_moderated_list = 1;
my $email_subscriber_list = 0;
@@ -249,6 +250,7 @@ if (!GetOptions(
'r!' => \$email_reviewer,
'n!' => \$email_usename,
'l!' => \$email_list,
+ 'fixes!' => \$email_fixes,
'moderated!' => \$email_moderated_list,
's!' => \$email_subscriber_list,
'multiline!' => \$output_multiline,
@@ -503,6 +505,7 @@ sub read_mailmap {
## use the filenames on the command line or find the filenames in the
patchfiles
my @files = ();
+my @fixes = ();# If a patch description includes
Fixes: lines
my @range = ();
my @keyword_tvi = ();
my @file_emails = ();
@@ -568,6 +571,8 @@ foreach my $file (@ARGV) {
my $filename2 = $2;
push(@files, $filename1);
push(@files, $filename2);
+ } elsif (m/^Fixes:\s+([0-9a-fA-F]{6,40})/) {
+ push(@fixes, $1) if ($email_fixes);
} elsif (m/^\+\+\+\s+(\S+)/ or m/^---\s+(\S+)/) {
my $filename = $1;
$filename =~ s@^[^/]*/@@;
@@ -598,6 +603,7 @@ foreach my $file (@ARGV) {
}
@file_emails = uniq(@file_emails);
+@fixes = uniq(@fixes);
my %email_hash_name;
my %email_hash_address;
@@ -612,7 +618,6 @@ my %deduplicate_name_hash = ();
my %deduplicate_address_hash = ();
my @maintainers = get_maintainers();
-
if (@maintainers) {
@maintainers = merge_email(@maintainers);
output(@maintainers);
@@ -927,6 +932,10 @@ sub get_maintainers {
}
}
+foreach my $fix (@fixes) {
+ vcs_add_commit_signers($fix, "blamed_fixes");
+}
+
foreach my $email (@email_to, @list_to) {
$email->[0] = deduplicate_email($email->[0]);
}
@@ -1031,6 +1040,7 @@ MAINTAINER field selection options:
--roles => show roles (status:subsystem, git-signer, list, etc...)
--rolestats => show roles and statistics (commits/total_commits, %)
--file-emails => add email addresses found in -f file (default: 0 (off))
+--fixes => for patches, add signatures of commits with 'Fixes: '
(default: 1 (on))
--scm => print SCM tree(s) if any
--status => print status if any
--subsystem => print subsystem name if any
@@ -1730,6 +1740,32 @@ sub vcs_is_hg {
return $vcs_used == 2;
}
+sub vcs_add_commit_signers {
+return if (!vcs_exists());
+
+my ($commit, $desc) = @_;
+my $commit_count = 0;
+my $commit_authors_ref;
+my $commit_signers_ref;
+my $stats_ref;
+my @commit_authors = ();
+my @commit_signers = ();
+my $cmd;
+
+$cmd = $VCS_cmds{"find_commit_signers_cmd"};
+$cmd =~ s/(\$\w+)/$1/eeg; #substitute variables in $cmd
+
+($commit_count, $commit_signers_ref, $commit_authors_ref, $stats_ref) =
vcs_find_signers($cmd, "");
+@commit_authors = @{$commit_authors_ref} if defined $commit_authors_ref;
+@commit_signers = @{$commit_signers_ref} if defined $commit_signers_ref;
+
+foreach my $signer (@commit_signers) {
+ $signer = deduplicate_email($signer);
+}
+
+vcs_assign($desc, 1, @commit_signers);
+}
+
sub interactive_get_maintainers {
my ($list_ref) = @_;
my @list = @$list_ref;
[PATCH RESEND 1/1] vfs: Really check for inode ptr in lookup_fast
d_is_negative can race with d_instantiate_new()
-> __d_set_inode_and_type().
For e.g. in use cases where Thread-1 is creating
symlink (doing d_instantiate_new()) & Thread-2 is doing
cat of that symlink while doing lookup_fast (via REF-walk-
one such case is, when ->permission returns -ECHILD).
During this race if __d_set_and_inode_type() does out-of-order
execution and set the dentry->d_flags before setting
dentry->inode, then it can result into following kernel panic.
This change fixes the issue by directly checking for inode.
E.g. kernel panic, since inode was NULL.
trailing_symlink() -> may_follow_link() -> inode->i_uid.
Issue signature:-
[NIP : trailing_symlink+80]
[LR : trailing_symlink+1092]
#4 [c0198069bb70] trailing_symlink at c04bae60 (unreliable)
#5 [c0198069bc00] path_openat at c04bdd14
#6 [c0198069bc90] do_filp_open at c04c0274
#7 [c0198069bdb0] do_sys_open at c049b248
#8 [c0198069be30] system_call at c000b388
Sequence of events:-
Thread-2(Comm: ln) Thread-1(Comm: cat)
dentry = __d_lookup() //nonRCU
__d_set_and_inode_type() (Out-of-order execution)
flags = READ_ONCE(dentry->d_flags);
flags &= ~(DCACHE_ENTRY_TYPE | DCACHE_FALLTHRU);
flags |= type_flags;
WRITE_ONCE(dentry->d_flags, flags);
if (unlikely(d_is_negative()) // fails
{}
// since d_flags is already updated in
// Thread-2 in parallel but inode
// not yet set.
// d_is_negative returns false
*inode = d_backing_inode(path->dentry);
// means inode is still NULL
dentry->d_inode = inode;
trailing_symlink()
may_follow_link()
inode = nd->link_inode;
// nd->link_inode = NULL
//Then it crashes while
//doing inode->i_uid
Reported-by: Guang Yuan Wu
Tested-by: Guang Yuan Wu
Acked-by: Jeff Layton
Signed-off-by: Ritesh Harjani
---
fs/namei.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/fs/namei.c b/fs/namei.c
index 671c3c1a3425..7c5337cddebd 100644
--- a/fs/namei.c
+++ b/fs/namei.c
@@ -1617,7 +1617,21 @@ static int lookup_fast(struct nameidata *nd,
dput(dentry);
return status;
}
- if (unlikely(d_is_negative(dentry))) {
+
+ /*
+* Caution: d_is_negative() can race with
+* __d_set_inode_and_type().
+* For e.g. in use cases where Thread-1 is creating
+* symlink (doing d_instantiate_new()) & Thread-2 is doing
+* cat of that symlink and falling here (via Ref-walk) while
+* doing lookup_fast (one such case is when ->permission
+* returns -ECHILD).
+* Now if __d_set_inode_and_type() does out-of-order execution
+* i.e. it first sets the dentry->d_flags & then dentry->inode
+* then it can result into inode being NULL, causing panic later.
+* Hence directly check if inode is NULL here.
+*/
+ if (unlikely(d_really_is_negative(dentry))) {
dput(dentry);
return -ENOENT;
}
--
2.21.0
RE: [PATCH v2] hv_sock: Add the support of hibernation
> From: linux-hyperv-ow...@vger.kernel.org
> On Behalf Of kbuild test robot
> Sent: Thursday, September 26, 2019 9:19 PM
>
> Hi Dexuan,
>
> Thank you for the patch! Yet something to improve:
>
> >> net//vmw_vsock/hyperv_transport.c:970:3: error: 'struct hv_driver' has no
> member named 'suspend'
> .suspend = hvs_suspend,
> ^~~
This is a false alarm. Your code base needs to be merged with the latest
Linus's tree, which has the prerequisite patch:
271b2224d42f ("Drivers: hv: vmbus: Implement suspend/resume for VSC drivers for
hibernation")
Thanks,
-- Dexuan
RE: [PATCH v2][PATCH net] hv_netvsc: Add the support of hibernation
> From: linux-hyperv-ow...@vger.kernel.org
> On Behalf Of kbuild test robot
> Sent: Thursday, September 26, 2019 9:18 PM
>
> Hi Dexuan,
>
> Thank you for the patch! Yet something to improve:
>
> [auto build test ERROR on net/master]
>
> 'netvsc_drv.shutdown')
> >> drivers/net/hyperv/netvsc_drv.c:2487:3: error: 'struct hv_driver' has no
> member named 'resume'; did you mean 'remove'?
> .resume = netvsc_resume,
> ^~
This is a false alarm. Your code base needs to be merged with the latest
Linus's tree, which has the prerequisite patch:
271b2224d42f ("Drivers: hv: vmbus: Implement suspend/resume for VSC drivers for
hibernation")
Thanks,
-- Dexuan
Re: [PATCH v6] gpio/mpc8xxx: change irq handler from chained to normal
Hi Hui, Thank you for the patch! Yet something to improve: [auto build test ERROR on gpio/for-next] [cannot apply to v5.3 next-20190925] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Hui-Song/gpio-mpc8xxx-change-irq-handler-from-chained-to-normal/20190927-113256 base: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git for-next config: i386-allyesconfig (attached as .config) compiler: gcc-7 (Debian 7.4.0-13) 7.4.0 reproduce: # save the attached .config to linux build tree make ARCH=i386 If you fix the issue, kindly add following tag Reported-by: kbuild test robot All error/warnings (new ones prefixed by >>): In file included from include/linux/kernel.h:12:0, from drivers/gpio/gpio-mpc8xxx.c:12: drivers/gpio/gpio-mpc8xxx.c: In function 'mpc8xxx_gpio_irq_cascade': >> include/linux/bitops.h:22:30: error: passing argument 1 of 'find_first_bit' >> from incompatible pointer type [-Werror=incompatible-pointer-types] for ((bit) = find_first_bit((addr), (size)); \ ^ >> drivers/gpio/gpio-mpc8xxx.c:140:2: note: in expansion of macro >> 'for_each_set_bit' for_each_set_bit(i, , 32) ^~~~ In file included from arch/x86/include/asm/bitops.h:384:0, from include/linux/bitops.h:19, from include/linux/kernel.h:12, from drivers/gpio/gpio-mpc8xxx.c:12: include/asm-generic/bitops/find.h:59:22: note: expected 'const long unsigned int *' but argument is of type 'unsigned int *' extern unsigned long find_first_bit(const unsigned long *addr, ^~ In file included from include/linux/kernel.h:12:0, from drivers/gpio/gpio-mpc8xxx.c:12: >> include/linux/bitops.h:24:29: error: passing argument 1 of 'find_next_bit' >> from incompatible pointer type [-Werror=incompatible-pointer-types] (bit) = find_next_bit((addr), (size), (bit) + 1)) ^ >> drivers/gpio/gpio-mpc8xxx.c:140:2: note: in expansion of macro >> 'for_each_set_bit' for_each_set_bit(i, , 32) ^~~~ In file included from arch/x86/include/asm/bitops.h:384:0, from include/linux/bitops.h:19, from include/linux/kernel.h:12, from drivers/gpio/gpio-mpc8xxx.c:12: include/asm-generic/bitops/find.h:15:22: note: expected 'const long unsigned int *' but argument is of type 'unsigned int *' extern unsigned long find_next_bit(const unsigned long *addr, unsigned long ^ cc1: some warnings being treated as errors -- In file included from include/linux/kernel.h:12:0, from drivers//gpio/gpio-mpc8xxx.c:12: drivers//gpio/gpio-mpc8xxx.c: In function 'mpc8xxx_gpio_irq_cascade': >> include/linux/bitops.h:22:30: error: passing argument 1 of 'find_first_bit' >> from incompatible pointer type [-Werror=incompatible-pointer-types] for ((bit) = find_first_bit((addr), (size)); \ ^ drivers//gpio/gpio-mpc8xxx.c:140:2: note: in expansion of macro 'for_each_set_bit' for_each_set_bit(i, , 32) ^~~~ In file included from arch/x86/include/asm/bitops.h:384:0, from include/linux/bitops.h:19, from include/linux/kernel.h:12, from drivers//gpio/gpio-mpc8xxx.c:12: include/asm-generic/bitops/find.h:59:22: note: expected 'const long unsigned int *' but argument is of type 'unsigned int *' extern unsigned long find_first_bit(const unsigned long *addr, ^~ In file included from include/linux/kernel.h:12:0, from drivers//gpio/gpio-mpc8xxx.c:12: >> include/linux/bitops.h:24:29: error: passing argument 1 of 'find_next_bit' >> from incompatible pointer type [-Werror=incompatible-pointer-types] (bit) = find_next_bit((addr), (size), (bit) + 1)) ^ drivers//gpio/gpio-mpc8xxx.c:140:2: note: in expansion of macro 'for_each_set_bit' for_each_set_bit(i, , 32) ^~~~ In file included from arch/x86/include/asm/bitops.h:384:0, from include/linux/bitops.h:19, from include/linux/kernel.h:12, from drivers//gpio/gpio-mpc8xxx.c:12: include/asm-generic/bitops/find.h:15:22: note: expected 'const long unsigned int *' but argument is of type 'unsigned int *' extern unsigned long find_next_bit(const unsigned long *addr, unsigned long ^ cc1: some warnings being treated as errors vim
Re: [PATCH] vhost: introduce mdev based hardware backend
On Fri, Sep 27, 2019 at 11:51:35AM +0800, Jason Wang wrote:
> On 2019/9/27 ไธๅ11:46, Jason Wang wrote:
> > +
> > +static struct mdev_class_id id_table[] = {
> > +ย ย ย { MDEV_ID_VHOST },
> > +ย ย ย { 0 },
> > +};
> > +
> > +static struct mdev_driver vhost_mdev_driver = {
> > +ย ย ย .nameย ย ย = "vhost_mdev",
> > +ย ย ย .probeย ย ย = vhost_mdev_probe,
> > +ย ย ย .removeย ย ย = vhost_mdev_remove,
> > +ย ย ย .id_table = id_table,
> > +};
> > +
>
>
> And you probably need to add MODULE_DEVICE_TABLE() as well.
Yeah, thanks!
>
> Thanks
>
Re: Regression in dbdda842fe96 ("printk: Add console owner and waiter logic to load balance console writes") [Was: Regression in fd5f7cde1b85 ("...")]
On (09/26/19 10:58), Petr Mladek wrote:
[..]
> > - spin_lock(>port.lock);
> > -
> > + uart_port_lock_irqsave(>port, flags);
>
> uart_port_lock_irqsave() does not exist.
... Oh. Good catch! Apparently I still carry around my patch set
which added printk_safe to TTY/UART locking API.
> Instead the current users do:
>
> spin_lock_irqsave(>lock, flags);
Right.
[..]
> I like this approach. It allows to remove hacks with locks.
[..]
> Or I would keep the locking as is and add some API
> just for the sysrq handling:
>
>
>int uart_store_sysrq_char(struct uart_port *port, unsigned int ch);
>unsigned int uart_get_sysrq_char(struct uart_port *port);
Looks good. We also probably can remove struct uart_port's
->sysrq member and clean up locking in drivers' ->write()
callbacks:
if (sport->sysrq)
locked = 0;
else if (oops_in_progress)
locked = spin_trylock_irqsave(>lock, flags);
else
spin_lock_irqsave(>lock, flags);
Because this ->sysrq branch makes driver completely lockless globally,
for all CPUs, not only for sysrq-CPU.
> And use it the following way:
>
> int handle_irq()
> {
> unsined int sysrq, sysrq_ch;
>
> spin_lock(>lock);
> [...]
> sysrq = uart_store_sysrq_char(port, ch);
> if (!sysrq)
> [...]
> [...]
>
> out:
> sysrq_ch = uart_get_sysrq_char(port);
> spin_unlock(>lock);
>
> if (sysrq_ch)
> handle_sysrq(sysrq_ch);
> }
Looks good.
-ss
Re: [PATCH 1/4] MIPS: CI20: DTS: Add I2C nodes
Hello, > Hi Alexandre, > > Thank you for the patch! Yet something to improve: > > [auto build test ERROR on linus/master] > [cannot apply to v5.3 next-20190920] > [if your patch is applied to the wrong git tree, please drop us a note to help > improve the system. BTW, we also suggest to use '--base' option to specify the > base tree in git format-patch, please see > https://stackoverflow.com/a/37406982] > > url: > https://github.com/0day-ci/linux/commits/Alexandre-GRIVEAUX/MIPS-CI20-DTS-Add-nodes-to-Creator-CI20-board/20190923-041656 > config: mips-allmodconfig (attached as .config) > compiler: mips-linux-gcc (GCC) 7.4.0 > reproduce: > wget > https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O > ~/bin/make.cross > chmod +x ~/bin/make.cross > # save the attached .config to linux build tree > GCC_VERSION=7.4.0 make.cross ARCH=mips > > If you fix the issue, kindly add following tag > Reported-by: kbuild test robot > > All errors (new ones prefixed by >>): > >>> Error: arch/mips/boot/dts/ingenic/ci20.dts:90.1-6 Label or path i2c0 not >>> found >>> Error: arch/mips/boot/dts/ingenic/ci20.dts:168.1-6 Label or path i2c1 not >>> found >>> Error: arch/mips/boot/dts/ingenic/ci20.dts:176.1-6 Label or path i2c2 not >>> found >>> Error: arch/mips/boot/dts/ingenic/ci20.dts:184.1-6 Label or path i2c3 not >>> found >>> Error: arch/mips/boot/dts/ingenic/ci20.dts:192.1-6 Label or path i2c4 not >>> found >FATAL ERROR: Syntax error parsing input tree > > --- > 0-DAY kernel test infrastructureOpen Source Technology Center > https://lists.01.org/pipermail/kbuild-all Intel Corporation Do I need to add the patch "[PATCHv4] MIPS: JZ4780: DTS: Add I2C nodes" toย the begin of this patchset ? Thanks.
Re: [PATCH v2] hv_sock: Add the support of hibernation
Hi Dexuan,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on net-next/master]
[cannot apply to v5.3 next-20190925]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url:
https://github.com/0day-ci/linux/commits/Dexuan-Cui/hv_sock-Add-the-support-of-hibernation/20190926-053950
config: x86_64-rhel-7.6 (attached as .config)
compiler: gcc-7 (Debian 7.4.0-13) 7.4.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot
All error/warnings (new ones prefixed by >>):
>> net//vmw_vsock/hyperv_transport.c:970:3: error: 'struct hv_driver' has no
>> member named 'suspend'
.suspend = hvs_suspend,
^~~
>> net//vmw_vsock/hyperv_transport.c:970:13: error: initialization from
>> incompatible pointer type [-Werror=incompatible-pointer-types]
.suspend = hvs_suspend,
^~~
net//vmw_vsock/hyperv_transport.c:970:13: note: (near initialization for
'hvs_drv.shutdown')
>> net//vmw_vsock/hyperv_transport.c:971:3: error: 'struct hv_driver' has no
>> member named 'resume'; did you mean 'remove'?
.resume = hvs_resume,
^~
remove
>> net//vmw_vsock/hyperv_transport.c:971:13: warning: excess elements in struct
>> initializer
.resume = hvs_resume,
^~
net//vmw_vsock/hyperv_transport.c:971:13: note: (near initialization for
'hvs_drv')
cc1: some warnings being treated as errors
vim +970 net//vmw_vsock/hyperv_transport.c
963
964 static struct hv_driver hvs_drv = {
965 .name = "hv_sock",
966 .hvsock = true,
967 .id_table = id_table,
968 .probe = hvs_probe,
969 .remove = hvs_remove,
> 970 .suspend= hvs_suspend,
> 971 .resume = hvs_resume,
972 };
973
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
Re: [PATCH v2][PATCH net] hv_netvsc: Add the support of hibernation
Hi Dexuan,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on net/master]
url:
https://github.com/0day-ci/linux/commits/Dexuan-Cui/hv_netvsc-Add-the-support-of-hibernation/20190926-061258
config: x86_64-rhel-7.6 (attached as .config)
compiler: gcc-7 (Debian 7.4.0-13) 7.4.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot
All error/warnings (new ones prefixed by >>):
>> drivers/net/hyperv/netvsc_drv.c:2486:3: error: 'struct hv_driver' has no
>> member named 'suspend'
.suspend = netvsc_suspend,
^~~
>> drivers/net/hyperv/netvsc_drv.c:2486:13: error: initialization from
>> incompatible pointer type [-Werror=incompatible-pointer-types]
.suspend = netvsc_suspend,
^~
drivers/net/hyperv/netvsc_drv.c:2486:13: note: (near initialization for
'netvsc_drv.shutdown')
>> drivers/net/hyperv/netvsc_drv.c:2487:3: error: 'struct hv_driver' has no
>> member named 'resume'; did you mean 'remove'?
.resume = netvsc_resume,
^~
remove
>> drivers/net/hyperv/netvsc_drv.c:2487:12: warning: excess elements in struct
>> initializer
.resume = netvsc_resume,
^
drivers/net/hyperv/netvsc_drv.c:2487:12: note: (near initialization for
'netvsc_drv')
cc1: some warnings being treated as errors
vim +2486 drivers/net/hyperv/netvsc_drv.c
2479
2480 /* The one and only one */
2481 static struct hv_driver netvsc_drv = {
2482 .name = KBUILD_MODNAME,
2483 .id_table = id_table,
2484 .probe = netvsc_probe,
2485 .remove = netvsc_remove,
> 2486 .suspend = netvsc_suspend,
> 2487 .resume = netvsc_resume,
2488 .driver = {
2489 .probe_type = PROBE_FORCE_SYNCHRONOUS,
2490 },
2491 };
2492
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
Re: [PATCH] dmaengine: bcm-sba-raid: Handle mbox_request_channel failure
Hi Vinod,
Did you get chance to review this fix?
Best regards,
Rayagonda
On Thu, Jan 10, 2019 at 11:06 PM Ray Jui wrote:
>
>
>
> On 1/9/2019 10:07 PM, Rayagonda Kokatanur wrote:
> > Fix kernel NULL pointer dereference error when mbox_request_channel()
> > fails to allocate channel.
> >
> > Fixes: 4e9f8187aecb ("dmaengine: bcm-sba-raid: Use only single mailbox
> > channel")
> > Signed-off-by: Rayagonda Kokatanur
> > ---
> > drivers/dma/bcm-sba-raid.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/dma/bcm-sba-raid.c b/drivers/dma/bcm-sba-raid.c
> > index 72878ac5c78d..77ae74663a45 100644
> > --- a/drivers/dma/bcm-sba-raid.c
> > +++ b/drivers/dma/bcm-sba-raid.c
> > @@ -1690,7 +1690,7 @@ static int sba_probe(struct platform_device *pdev)
> > sba->mchan = mbox_request_channel(>client, 0);
> > if (IS_ERR(sba->mchan)) {
> > ret = PTR_ERR(sba->mchan);
> > - goto fail_free_mchan;
> > + goto fail_exit;
> > }
> >
> > /* Find-out underlying mailbox device */
> > @@ -1747,6 +1747,7 @@ static int sba_probe(struct platform_device *pdev)
> > sba_freeup_channel_resources(sba);
> > fail_free_mchan:
> > mbox_free_channel(sba->mchan);
> > +fail_exit:
> > return ret;
> > }
> >
> >
>
> Looks good to me.
>
> Reviewed-by: Ray Jui
mainline/master boot bisection: v5.3-12562-g7897c04ad09f on bcm2836-rpi-2-b
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* This automated bisection report was sent to you on the basis *
* that you may be involved with the breaking commit it has *
* found. No manual investigation has been done to verify it, *
* and the root cause of the problem may be somewhere else. *
* *
* If you do send a fix, please include this trailer:*
* Reported-by: "kernelci.org bot" *
* *
* Hope this helps! *
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
mainline/master boot bisection: v5.3-12562-g7897c04ad09f on bcm2836-rpi-2-b
Summary:
Start: 7897c04ad09f Merge tag 'trace-v5.4-2' of
git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace
Details:https://kernelci.org/boot/id/5d8d446459b51415c1f1224d
Plain log:
https://storage.kernelci.org//mainline/master/v5.3-12562-g7897c04ad09f/arm/bcm2835_defconfig/gcc-8/lab-collabora/boot-bcm2836-rpi-2-b.txt
HTML log:
https://storage.kernelci.org//mainline/master/v5.3-12562-g7897c04ad09f/arm/bcm2835_defconfig/gcc-8/lab-collabora/boot-bcm2836-rpi-2-b.html
Result: ac7c3e4ff401 compiler: enable CONFIG_OPTIMIZE_INLINING forcibly
Checks:
revert: PASS
verify: PASS
Parameters:
Tree: mainline
URL:git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Branch: master
Target: bcm2836-rpi-2-b
CPU arch: arm
Lab:lab-collabora
Compiler: gcc-8
Config: bcm2835_defconfig
Test suite: boot
Breaking commit found:
---
commit ac7c3e4ff401b304489a031938dbeaab585bfe0a
Author: Masahiro Yamada
Date: Wed Sep 25 16:47:42 2019 -0700
compiler: enable CONFIG_OPTIMIZE_INLINING forcibly
Commit 9012d011660e ("compiler: allow all arches to enable
CONFIG_OPTIMIZE_INLINING") allowed all architectures to enable this
option. A couple of build errors were reported by randconfig, but all of
them have been ironed out.
Towards the goal of removing CONFIG_OPTIMIZE_INLINING entirely (and it
will simplify the 'inline' macro in compiler_types.h), this commit changes
it to always-on option. Going forward, the compiler will always be
allowed to not inline functions marked 'inline'.
This is not a problem for x86 since it has been long used by
arch/x86/configs/{x86_64,i386}_defconfig.
I am keeping the config option just in case any problem crops up for other
architectures.
The code clean-up will be done after confirming this is solid.
Link:
http://lkml.kernel.org/r/20190830034304.24259-1-yamada.masah...@socionext.com
Signed-off-by: Masahiro Yamada
Acked-by: Nick Desaulniers
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: Miguel Ojeda
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index 6b1b1703a646..93d97f9b0157 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -311,7 +311,7 @@ config HEADERS_CHECK
relevant for userspace, say 'Y'.
config OPTIMIZE_INLINING
- bool "Allow compiler to uninline functions marked 'inline'"
+ def_bool y
help
This option determines if the kernel forces gcc to inline the
functions
developers have marked 'inline'. Doing so takes away freedom from gcc
to
@@ -322,8 +322,6 @@ config OPTIMIZE_INLINING
decision will become the default in the future. Until then this option
is there to test gcc for this.
- If unsure, say N.
-
config DEBUG_SECTION_MISMATCH
bool "Enable full Section mismatch analysis"
help
---
Git bisection log:
---
git bisect start
# good: [f41def397161053eb0d3ed6861ef65985efbf293] Merge tag 'ceph-for-5.4-rc1'
of git://github.com/ceph/ceph-client
git bisect good f41def397161053eb0d3ed6861ef65985efbf293
# bad: [7897c04ad09f815aea1f2dbb05825887d4494a74] Merge tag 'trace-v5.4-2' of
git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace
git bisect bad 7897c04ad09f815aea1f2dbb05825887d4494a74
# bad: [ec56103e18c7590303c69329dd4aaadf8a898c19] Merge tag
'for-linus-5.4-rc1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip
git bisect bad ec56103e18c7590303c69329dd4aaadf8a898c19
# bad: [da036ae147624b70f7d3784ff3a53bd4fda20d2a] scripts/gdb: handle split
debug
git bisect bad da036ae147624b70f7d3784ff3a53bd4fda20d2a
# good: [5a7f4455ad321400e1361ab94fd6858c5b2fe0cf] checkpatch: remove obsolete
period from "ambiguous SHA1" query
git bisect good 5a7f4455ad321400e1361ab94fd6858c5b2fe0cf
#
Re: [PATCH] vhost: introduce mdev based hardware backend
On 2019/9/27 ไธๅ11:46, Jason Wang wrote:
+
+static struct mdev_class_id id_table[] = {
+ย ย ย { MDEV_ID_VHOST },
+ย ย ย { 0 },
+};
+
+static struct mdev_driver vhost_mdev_driver = {
+ย ย ย .nameย ย ย = "vhost_mdev",
+ย ย ย .probeย ย ย = vhost_mdev_probe,
+ย ย ย .removeย ย ย = vhost_mdev_remove,
+ย ย ย .id_table = id_table,
+};
+
And you probably need to add MODULE_DEVICE_TABLE() as well.
Thanks
[PATCH 1/2] clk: sprd: Use IS_ERR() to validate the return value of syscon_regmap_lookup_by_phandle()
The syscon_regmap_lookup_by_phandle() will never return NULL, thus use
IS_ERR() to validate the return value instead of IS_ERR_OR_NULL().
Signed-off-by: Baolin Wang
---
drivers/clk/sprd/common.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/sprd/common.c b/drivers/clk/sprd/common.c
index 9d56eac..7ad5ba2 100644
--- a/drivers/clk/sprd/common.c
+++ b/drivers/clk/sprd/common.c
@@ -46,7 +46,7 @@ int sprd_clk_regmap_init(struct platform_device *pdev,
if (of_find_property(node, "sprd,syscon", NULL)) {
regmap = syscon_regmap_lookup_by_phandle(node, "sprd,syscon");
- if (IS_ERR_OR_NULL(regmap)) {
+ if (IS_ERR(regmap)) {
pr_err("%s: failed to get syscon regmap\n", __func__);
return PTR_ERR(regmap);
}
--
1.7.9.5
[PATCH 2/2] clk: sprd: Change to use devm_platform_ioremap_resource()
Use the new helper that wraps the calls to platform_get_resource()
and devm_ioremap_resource() together, which can simpify the code.
Signed-off-by: Baolin Wang
---
drivers/clk/sprd/common.c |4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/clk/sprd/common.c b/drivers/clk/sprd/common.c
index 7ad5ba2..c0af477 100644
--- a/drivers/clk/sprd/common.c
+++ b/drivers/clk/sprd/common.c
@@ -42,7 +42,6 @@ int sprd_clk_regmap_init(struct platform_device *pdev,
void __iomem *base;
struct device_node *node = pdev->dev.of_node;
struct regmap *regmap;
- struct resource *res;
if (of_find_property(node, "sprd,syscon", NULL)) {
regmap = syscon_regmap_lookup_by_phandle(node, "sprd,syscon");
@@ -51,8 +50,7 @@ int sprd_clk_regmap_init(struct platform_device *pdev,
return PTR_ERR(regmap);
}
} else {
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- base = devm_ioremap_resource(>dev, res);
+ base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
return PTR_ERR(base);
--
1.7.9.5
[PATCH v2 2/2] ptp: Add a ptp clock driver for IDT ClockMatrix.
From: Vincent Cheng The IDT ClockMatrix (TM) family includes integrated devices that provide eight PLL channels. Each PLL channel can be independently configured as a frequency synthesizer, jitter attenuator, digitally controlled oscillator (DCO), or a digital phase lock loop (DPLL). Typically these devices are used as timing references and clock sources for PTP applications. This patch adds support for the device. Co-developed-by: Richard Cochran Signed-off-by: Richard Cochran Signed-off-by: Vincent Cheng --- Changes since v1: - Reported-by: kbuild test robot Fix ARCH=i386 build failure: ERROR: "__divdi3" undefined! - As suggested by Andrew Lunn: 1. Replace pr_err with dev_err because we are an i2c device 2. Replace set_current_state()+schedule_timeout() with msleep_interruptable() 3. Downgrade pr_info to dev_dbg where appropriate --- drivers/ptp/Kconfig | 12 + drivers/ptp/Makefile |1 + drivers/ptp/idt8a340_reg.h| 659 drivers/ptp/ptp_clockmatrix.c | 1385 + drivers/ptp/ptp_clockmatrix.h | 123 5 files changed, 2180 insertions(+) create mode 100644 drivers/ptp/idt8a340_reg.h create mode 100644 drivers/ptp/ptp_clockmatrix.c create mode 100644 drivers/ptp/ptp_clockmatrix.h diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig index 960961f..16c7c90 100644 --- a/drivers/ptp/Kconfig +++ b/drivers/ptp/Kconfig @@ -119,4 +119,16 @@ config PTP_1588_CLOCK_KVM To compile this driver as a module, choose M here: the module will be called ptp_kvm. +config PTP_1588_CLOCK_IDTCM + tristate "IDT CLOCKMATRIX as PTP clock" + select PTP_1588_CLOCK + default n + help + This driver adds support for using IDT CLOCKMATRIX(TM) as a PTP + clock. This clock is only useful if your time stamping MAC + is connected to the IDT chip. + + To compile this driver as a module, choose M here: the module + will be called ptp_clockmatrix. + endmenu diff --git a/drivers/ptp/Makefile b/drivers/ptp/Makefile index 677d1d1..69a06f8 100644 --- a/drivers/ptp/Makefile +++ b/drivers/ptp/Makefile @@ -12,3 +12,4 @@ obj-$(CONFIG_PTP_1588_CLOCK_KVM) += ptp_kvm.o obj-$(CONFIG_PTP_1588_CLOCK_QORIQ) += ptp-qoriq.o ptp-qoriq-y+= ptp_qoriq.o ptp-qoriq-$(CONFIG_DEBUG_FS) += ptp_qoriq_debugfs.o +obj-$(CONFIG_PTP_1588_CLOCK_IDTCM) += ptp_clockmatrix.o \ No newline at end of file diff --git a/drivers/ptp/idt8a340_reg.h b/drivers/ptp/idt8a340_reg.h new file mode 100644 index 000..9263bc3 --- /dev/null +++ b/drivers/ptp/idt8a340_reg.h @@ -0,0 +1,659 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* idt8a340_reg.h + * + * Originally generated by regen.tcl on Thu Feb 14 19:23:44 PST 2019 + * https://github.com/richardcochran/regen + * + * Hand modified to include some HW registers. + * Based on 4.8.0, SCSR rev C commit a03c7ae5 + */ +#ifndef HAVE_IDT8A340_REG +#define HAVE_IDT8A340_REG + +#define PAGE_ADDR_BASE0x +#define PAGE_ADDR 0x00fc + +#define HW_REVISION 0x8180 +#define REV_ID0x007a + +#define HW_DPLL_0 (0x8a00) +#define HW_DPLL_1 (0x8b00) +#define HW_DPLL_2 (0x8c00) +#define HW_DPLL_3 (0x8d00) + +#define HW_DPLL_TOD_SW_TRIG_ADDR__0 (0x080) +#define HW_DPLL_TOD_CTRL_1(0x089) +#define HW_DPLL_TOD_CTRL_2(0x08A) +#define HW_DPLL_TOD_OVR__0(0x098) +#define HW_DPLL_TOD_OUT_0__0 (0x0B0) + +#define HW_Q0_Q1_CH_SYNC_CTRL_0 (0xa740) +#define HW_Q0_Q1_CH_SYNC_CTRL_1 (0xa741) +#define HW_Q2_Q3_CH_SYNC_CTRL_0 (0xa742) +#define HW_Q2_Q3_CH_SYNC_CTRL_1 (0xa743) +#define HW_Q4_Q5_CH_SYNC_CTRL_0 (0xa744) +#define HW_Q4_Q5_CH_SYNC_CTRL_1 (0xa745) +#define HW_Q6_Q7_CH_SYNC_CTRL_0 (0xa746) +#define HW_Q6_Q7_CH_SYNC_CTRL_1 (0xa747) +#define HW_Q8_CH_SYNC_CTRL_0 (0xa748) +#define HW_Q8_CH_SYNC_CTRL_1 (0xa749) +#define HW_Q9_CH_SYNC_CTRL_0 (0xa74a) +#define HW_Q9_CH_SYNC_CTRL_1 (0xa74b) +#define HW_Q10_CH_SYNC_CTRL_0 (0xa74c) +#define HW_Q10_CH_SYNC_CTRL_1 (0xa74d) +#define HW_Q11_CH_SYNC_CTRL_0 (0xa74e) +#define HW_Q11_CH_SYNC_CTRL_1 (0xa74f) + +#define SYNC_SOURCE_DPLL0_TOD_PPS 0x14 +#define SYNC_SOURCE_DPLL1_TOD_PPS 0x15 +#define SYNC_SOURCE_DPLL2_TOD_PPS 0x16 +#define SYNC_SOURCE_DPLL3_TOD_PPS 0x17 + +#define SYNCTRL1_MASTER_SYNC_RST BIT(7) +#define SYNCTRL1_MASTER_SYNC_TRIG BIT(5) +#define SYNCTRL1_TOD_SYNC_TRIG BIT(4) +#define SYNCTRL1_FBDIV_FRAME_SYNC_TRIG BIT(3) +#define SYNCTRL1_FBDIV_SYNC_TRIG BIT(2) +#define
[PATCH v2 1/2] dt-bindings: ptp: Add bindings doc for IDT ClockMatrix based PTP clock
From: Vincent Cheng
Add device tree binding doc for the IDT ClockMatrix PTP clock driver.
Co-developed-by: Richard Cochran
Signed-off-by: Richard Cochran
Signed-off-by: Vincent Cheng
---
Changes since v1:
- No changes
---
Documentation/devicetree/bindings/ptp/ptp-idtcm.txt | 15 +++
1 file changed, 15 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ptp/ptp-idtcm.txt
diff --git a/Documentation/devicetree/bindings/ptp/ptp-idtcm.txt
b/Documentation/devicetree/bindings/ptp/ptp-idtcm.txt
new file mode 100644
index 000..4eaa34d
--- /dev/null
+++ b/Documentation/devicetree/bindings/ptp/ptp-idtcm.txt
@@ -0,0 +1,15 @@
+* IDT ClockMatrix (TM) PTP clock
+
+Required properties:
+
+ - compatible Should be "idt,8a3400x-ptp" for System Synchronizer
+Should be "idt,8a3401x-ptp" for Port Synchronizer
+Should be "idt,8a3404x-ptp" for Universal Frequency Translator
(UFT)
+ - reg I2C slave address of the device
+
+Example:
+
+ phc@5b {
+ compatible = "idt,8a3400x-ptp";
+ reg = <0x5b>;
+ };
--
2.7.4
Re: [PATCH] vhost: introduce mdev based hardware backend
On 2019/9/26 ไธๅ12:54, Tiwei Bie wrote:
This patch introduces a mdev based hardware vhost backend.
This backend is built on top of the same abstraction used
in virtio-mdev and provides a generic vhost interface for
userspace to accelerate the virtio devices in guest.
This backend is implemented as a mdev device driver on top
of the same mdev device ops used in virtio-mdev but using
a different mdev class id, and it will register the device
as a VFIO device for userspace to use. Userspace can setup
the IOMMU with the existing VFIO container/group APIs and
then get the device fd with the device name. After getting
the device fd of this device, userspace can use vhost ioctls
to setup the backend.
Signed-off-by: Tiwei Bie
---
This patch depends on below series:
https://lkml.org/lkml/2019/9/24/357
Looks pretty nice, comments inline.
RFC v4 -> v1:
- Implement vhost-mdev as a mdev device driver directly and
connect it to VFIO container/group. (Jason);
- Pass ring addresses as GPAs/IOVAs in vhost-mdev to avoid
meaningless HVA->GPA translations (Jason);
RFC v3 -> RFC v4:
- Build vhost-mdev on top of the same abstraction used by
virtio-mdev (Jason);
- Introduce vhost fd and pass VFIO fd via SET_BACKEND ioctl (MST);
RFC v2 -> RFC v3:
- Reuse vhost's ioctls instead of inventing a VFIO regions/irqs
based vhost protocol on top of vfio-mdev (Jason);
RFC v1 -> RFC v2:
- Introduce a new VFIO device type to build a vhost protocol
on top of vfio-mdev;
drivers/vhost/Kconfig | 9 +
drivers/vhost/Makefile | 3 +
drivers/vhost/mdev.c | 381 +
include/uapi/linux/vhost.h | 8 +
4 files changed, 401 insertions(+)
create mode 100644 drivers/vhost/mdev.c
diff --git a/drivers/vhost/Kconfig b/drivers/vhost/Kconfig
index 3d03ccbd1adc..decf0be8efe9 100644
--- a/drivers/vhost/Kconfig
+++ b/drivers/vhost/Kconfig
@@ -34,6 +34,15 @@ config VHOST_VSOCK
To compile this driver as a module, choose M here: the module will be
called
vhost_vsock.
+config VHOST_MDEV
+ tristate "Vhost driver for Mediated devices"
+ depends on EVENTFD && VFIO && VFIO_MDEV
+ select VHOST
+ default n
+ ---help---
+ Say M here to enable the vhost_mdev module for use with
+ the mediated device based hardware vhost accelerators
+
config VHOST
tristate
---help---
diff --git a/drivers/vhost/Makefile b/drivers/vhost/Makefile
index 6c6df24f770c..ad9c0f8c6d8c 100644
--- a/drivers/vhost/Makefile
+++ b/drivers/vhost/Makefile
@@ -10,4 +10,7 @@ vhost_vsock-y := vsock.o
obj-$(CONFIG_VHOST_RING) += vringh.o
+obj-$(CONFIG_VHOST_MDEV) += vhost_mdev.o
+vhost_mdev-y := mdev.o
+
obj-$(CONFIG_VHOST) += vhost.o
diff --git a/drivers/vhost/mdev.c b/drivers/vhost/mdev.c
new file mode 100644
index ..1c12a25b86a2
--- /dev/null
+++ b/drivers/vhost/mdev.c
@@ -0,0 +1,381 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018-2019 Intel Corporation.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "vhost.h"
+
+struct vhost_mdev {
+ /* The lock is to protect this structure. */
+ struct mutex mutex;
+ struct vhost_dev dev;
+ struct vhost_virtqueue *vqs;
+ int nvqs;
+ u64 state;
+ u64 features;
+ u64 acked_features;
+ bool opened;
+ struct mdev_device *mdev;
+};
+
+static u8 mdev_get_status(struct mdev_device *mdev)
+{
+ const struct virtio_mdev_device_ops *ops = mdev_get_dev_ops(mdev);
+
+ return ops->get_status(mdev);
+}
+
+static void mdev_set_status(struct mdev_device *mdev, u8 status)
+{
+ const struct virtio_mdev_device_ops *ops = mdev_get_dev_ops(mdev);
+
+ return ops->set_status(mdev, status);
+}
+
+static void mdev_add_status(struct mdev_device *mdev, u8 status)
+{
+ status |= mdev_get_status(mdev);
+ mdev_set_status(mdev, status);
+}
+
+static void mdev_reset(struct mdev_device *mdev)
+{
+ mdev_set_status(mdev, 0);
+}
+
+static void handle_vq_kick(struct vhost_work *work)
+{
+ struct vhost_virtqueue *vq = container_of(work, struct vhost_virtqueue,
+ poll.work);
+ struct vhost_mdev *m = container_of(vq->dev, struct vhost_mdev, dev);
+ const struct virtio_mdev_device_ops *ops = mdev_get_dev_ops(m->mdev);
+
+ ops->kick_vq(m->mdev, vq - m->vqs);
+}
+
+static irqreturn_t vhost_mdev_virtqueue_cb(void *private)
+{
+ struct vhost_virtqueue *vq = private;
+ struct eventfd_ctx *call_ctx = vq->call_ctx;
+
+ if (call_ctx)
+ eventfd_signal(call_ctx, 1);
+ return IRQ_HANDLED;
+}
+
+static long vhost_mdev_reset(struct vhost_mdev *m)
+{
+ struct mdev_device *mdev = m->mdev;
+
+ mdev_reset(mdev);
+ mdev_add_status(mdev, VIRTIO_CONFIG_S_ACKNOWLEDGE);
+ mdev_add_status(mdev, VIRTIO_CONFIG_S_DRIVER);
+
[PATCH] kasan: fix the missing underflow in memmove and memcpy with CONFIG_KASAN_GENERIC=y
memmove() and memcpy() have missing underflow issues.
When -7 <= size < 0, then KASAN will miss to catch the underflow issue.
It looks like shadow start address and shadow end address is the same,
so it does not actually check anything.
The following test is indeed not caught by KASAN:
char *p = kmalloc(64, GFP_KERNEL);
memset((char *)p, 0, 64);
memmove((char *)p, (char *)p + 4, -2);
kfree((char*)p);
It should be checked here:
void *memmove(void *dest, const void *src, size_t len)
{
check_memory_region((unsigned long)src, len, false, _RET_IP_);
check_memory_region((unsigned long)dest, len, true, _RET_IP_);
return __memmove(dest, src, len);
}
We fix the shadow end address which is calculated, then generic KASAN
get the right shadow end address and detect this underflow issue.
[1] https://bugzilla.kernel.org/show_bug.cgi?id=199341
Signed-off-by: Walter Wu
Reported-by: Dmitry Vyukov
---
lib/test_kasan.c | 36
mm/kasan/generic.c | 8 ++--
2 files changed, 42 insertions(+), 2 deletions(-)
diff --git a/lib/test_kasan.c b/lib/test_kasan.c
index b63b367a94e8..8bd014852556 100644
--- a/lib/test_kasan.c
+++ b/lib/test_kasan.c
@@ -280,6 +280,40 @@ static noinline void __init kmalloc_oob_in_memset(void)
kfree(ptr);
}
+static noinline void __init kmalloc_oob_in_memmove_underflow(void)
+{
+ char *ptr;
+ size_t size = 64;
+
+ pr_info("underflow out-of-bounds in memmove\n");
+ ptr = kmalloc(size, GFP_KERNEL);
+ if (!ptr) {
+ pr_err("Allocation failed\n");
+ return;
+ }
+
+ memset((char *)ptr, 0, 64);
+ memmove((char *)ptr, (char *)ptr + 4, -2);
+ kfree(ptr);
+}
+
+static noinline void __init kmalloc_oob_in_memmove_overflow(void)
+{
+ char *ptr;
+ size_t size = 64;
+
+ pr_info("overflow out-of-bounds in memmove\n");
+ ptr = kmalloc(size, GFP_KERNEL);
+ if (!ptr) {
+ pr_err("Allocation failed\n");
+ return;
+ }
+
+ memset((char *)ptr, 0, 64);
+ memmove((char *)ptr + size, (char *)ptr, 2);
+ kfree(ptr);
+}
+
static noinline void __init kmalloc_uaf(void)
{
char *ptr;
@@ -734,6 +768,8 @@ static int __init kmalloc_tests_init(void)
kmalloc_oob_memset_4();
kmalloc_oob_memset_8();
kmalloc_oob_memset_16();
+ kmalloc_oob_in_memmove_underflow();
+ kmalloc_oob_in_memmove_overflow();
kmalloc_uaf();
kmalloc_uaf_memset();
kmalloc_uaf2();
diff --git a/mm/kasan/generic.c b/mm/kasan/generic.c
index 616f9dd82d12..34ca23d59e67 100644
--- a/mm/kasan/generic.c
+++ b/mm/kasan/generic.c
@@ -131,9 +131,13 @@ static __always_inline bool memory_is_poisoned_n(unsigned
long addr,
size_t size)
{
unsigned long ret;
+ void *shadow_start = kasan_mem_to_shadow((void *)addr);
+ void *shadow_end = kasan_mem_to_shadow((void *)addr + size - 1) + 1;
- ret = memory_is_nonzero(kasan_mem_to_shadow((void *)addr),
- kasan_mem_to_shadow((void *)addr + size - 1) + 1);
+ if ((long)size < 0)
+ shadow_end = kasan_mem_to_shadow((void *)addr + size);
+
+ ret = memory_is_nonzero(shadow_start, shadow_end);
if (unlikely(ret)) {
unsigned long last_byte = addr + size - 1;
--
2.18.0
Please reap out these dead link from the kernel doc
I am not sure who is handling this ...stumble over it ...please do the needful Here is url for your reference : https://www.kernel.org/doc/html/latest/process/email-clients.html There are two external urls for mutt config , which are dead ...those are : http://dev.mutt.org/trac/wiki/UseCases/Gmail http://dev.mutt.org/doc/manual.html Is this because Mutt move from trac to gitlab ...here : https://gitlab.com/muttmua/mutt Wildly guessing. Probably Jon or Kai ...I don't know ..sorry about taking names. Thanks, Bhaskar signature.asc Description: PGP signature
[PATCH] dmaengine: sprd: Change to use devm_platform_ioremap_resource()
Use the new helper that wraps the calls to platform_get_resource() and devm_ioremap_resource() together, which can simpify the code. Signed-off-by: Baolin Wang --- drivers/dma/sprd-dma.c |4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/dma/sprd-dma.c b/drivers/dma/sprd-dma.c index a4a91f2..60d2c6b 100644 --- a/drivers/dma/sprd-dma.c +++ b/drivers/dma/sprd-dma.c @@ -1065,7 +1065,6 @@ static int sprd_dma_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; struct sprd_dma_dev *sdev; struct sprd_dma_chn *dma_chn; - struct resource *res; u32 chn_count; int ret, i; @@ -,8 +1110,7 @@ static int sprd_dma_probe(struct platform_device *pdev) dev_warn(>dev, "no interrupts for the dma controller\n"); } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - sdev->glb_base = devm_ioremap_resource(>dev, res); + sdev->glb_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(sdev->glb_base)) return PTR_ERR(sdev->glb_base); -- 1.7.9.5
[PATCH v2] async: Using current_work() to implement current_is_async()
current_is_async() can be implemented using current_work(), it's better
not to be aware of the workqueue's internal information.
Signed-off-by: Yunfeng Ye
Reviewed-by: Bart Van Assche
---
v1 -> v2:
- add "Reviewed-by"
kernel/async.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/kernel/async.c b/kernel/async.c
index 1de270d..a849f98 100644
--- a/kernel/async.c
+++ b/kernel/async.c
@@ -53,8 +53,6 @@ asynchronous and synchronous parts of the kernel.
#include
#include
-#include "workqueue_internal.h"
-
static async_cookie_t next_cookie = 1;
#define MAX_WORK 32768
@@ -327,8 +325,8 @@ EXPORT_SYMBOL_GPL(async_synchronize_cookie);
*/
bool current_is_async(void)
{
- struct worker *worker = current_wq_worker();
+ struct work_struct *work = current_work();
- return worker && worker->current_func == async_run_entry_fn;
+ return work && work->func == async_run_entry_fn;
}
EXPORT_SYMBOL_GPL(current_is_async);
--
2.7.4
Re: [PATCH] vhost: introduce mdev based hardware backend
On 2019/9/26 ไธๅ9:14, Tiwei Bie wrote: On Thu, Sep 26, 2019 at 04:35:18AM -0400, Michael S. Tsirkin wrote: On Thu, Sep 26, 2019 at 12:54:27PM +0800, Tiwei Bie wrote: [...] diff --git a/include/uapi/linux/vhost.h b/include/uapi/linux/vhost.h index 40d028eed645..5afbc2f08fa3 100644 --- a/include/uapi/linux/vhost.h +++ b/include/uapi/linux/vhost.h @@ -116,4 +116,12 @@ #define VHOST_VSOCK_SET_GUEST_CID _IOW(VHOST_VIRTIO, 0x60, __u64) #define VHOST_VSOCK_SET_RUNNING _IOW(VHOST_VIRTIO, 0x61, int) +/* VHOST_MDEV specific defines */ + +#define VHOST_MDEV_SET_STATE _IOW(VHOST_VIRTIO, 0x70, __u64) + +#define VHOST_MDEV_S_STOPPED 0 +#define VHOST_MDEV_S_RUNNING 1 +#define VHOST_MDEV_S_MAX 2 + #endif So assuming we have an underlying device that behaves like virtio: I think they are really good questions/suggestions. Thanks! 1. Should we use SET_STATUS maybe? I like this idea. I will give it a try. 2. Do we want a reset ioctl? I think it is helpful. If we use SET_STATUS, maybe we can use it to support the reset. 3. Do we want ability to enable rings individually? I will make it possible at least in the vhost layer. Note the API support e.g set_vq_ready(). 4. Does device need to limit max ring size? 5. Does device need to limit max number of queues? I think so. It's helpful to have ioctls to report the max ring size and max number of queues. An issue is the max number of queues is done through a device specific way, usually device configuration space. This is supported by the transport API, but how to expose it to userspace may need more thought. Thanks Thanks!
[PATCH v6] gpio/mpc8xxx: change irq handler from chained to normal
From: Song Hui
More than one gpio controllers can share one interrupt, change the
driver to request shared irq.
While this will work, it will mess up userspace accounting of the number
of interrupts per second in tools such as vmstat. The reason is that
for every GPIO interrupt, /proc/interrupts records the count against GIC
interrupt 68 or 69, as well as the GPIO itself. So, for every GPIO
interrupt, the total number of interrupts that the system has seen
increments by two
Signed-off-by: Laurentiu Tudor
Signed-off-by: Alex Marginean
Signed-off-by: Song Hui
---
Changes in v6:
- change request_irq to devm_request_irq and add commit message
Changes in v5:
- add traverse every bit function.
Changes in v4:
- convert 'pr_err' to 'dev_err'.
Changes in v3:
- update the patch description.
Changes in v2:
- delete the compatible of ls1088a.
drivers/gpio/gpio-mpc8xxx.c | 31 ---
1 file changed, 20 insertions(+), 11 deletions(-)
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 16a47de..f0be284 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#define MPC8XXX_GPIO_PINS 32
@@ -127,20 +128,20 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc,
unsigned offset)
return -ENXIO;
}
-static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc)
+static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)
{
- struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
- struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = data;
struct gpio_chip *gc = _gc->gc;
unsigned int mask;
+ int i;
mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_IER)
& gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR);
- if (mask)
+ for_each_set_bit(i, , 32)
generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,
-32 - ffs(mask)));
- if (chip->irq_eoi)
- chip->irq_eoi(>irq_data);
+31 - i));
+
+ return IRQ_HANDLED;
}
static void mpc8xxx_irq_unmask(struct irq_data *d)
@@ -388,8 +389,8 @@ static int mpc8xxx_probe(struct platform_device *pdev)
ret = gpiochip_add_data(gc, mpc8xxx_gc);
if (ret) {
- pr_err("%pOF: GPIO chip registration failed with status %d\n",
- np, ret);
+ dev_err(>dev, "%pOF: GPIO chip registration failed with
status %d\n",
+ np, ret);
goto err;
}
@@ -409,8 +410,16 @@ static int mpc8xxx_probe(struct platform_device *pdev)
if (devtype->gpio_dir_in_init)
devtype->gpio_dir_in_init(gc);
- irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
-mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
+ ret = devm_request_irq(>dev, mpc8xxx_gc->irqn,
+ mpc8xxx_gpio_irq_cascade,
+ IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade",
+ mpc8xxx_gc);
+ if (ret) {
+ dev_err(>dev, "%s: failed to devm_request_irq(%d), ret =
%d\n",
+ np->full_name, mpc8xxx_gc->irqn, ret);
+ goto err;
+ }
+
return 0;
err:
iounmap(mpc8xxx_gc->regs);
--
2.9.5
Re: [PATCH v3 3/4] mm: don't expose non-hugetlb page to fast gup prematurely
On 9/26/19 3:20 AM, Kirill A. Shutemov wrote: > On Wed, Sep 25, 2019 at 04:26:54PM -0600, Yu Zhao wrote: >> On Wed, Sep 25, 2019 at 10:25:30AM +0200, Peter Zijlstra wrote: >>> On Tue, Sep 24, 2019 at 05:24:58PM -0600, Yu Zhao wrote: ... >>> I'm thinking this patch make stuff rather fragile.. Should we instead >>> stick the barrier in set_p*d_at() instead? Or rather, make that store a >>> store-release? >> >> I prefer it this way too, but I suspected the majority would be >> concerned with the performance implications, especially those >> looping set_pte_at()s in mm/huge_memory.c. > > We can rename current set_pte_at() to __set_pte_at() or something and > leave it in places where barrier is not needed. The new set_pte_at()( will > be used in the rest of the places with the barrier inside. +1, sounds nice. I was unhappy about the wide-ranging changes that would have to be maintained. So this seems much better. > > BTW, have you looked at other levels of page table hierarchy. Do we have > the same issue for PMD/PUD/... pages? > Along the lines of "what other memory barriers might be missing for get_user_pages_fast(), I'm also concerned that the synchronization between get_user_pages_fast() and freeing the page tables might be technically broken, due to missing memory barriers on the get_user_pages_fast() side. Details: gup_fast() disables interrupts, but I think it also needs some sort of memory barrier(s), in order to prevent reads of the page table (gup_pgd_range, etc) from speculatively happening before the interrupts are disabled. Leonardo Bras's recent patchset brought this to my attention. Here, he's recommending adding atomic counting inc/dec before and after the gup_fast() irq disable/enable points: https://lore.kernel.org/r/20190920195047.7703-4-leona...@linux.ibm.com ...and that lead to noticing a general lack of barriers there. thanks, -- John Hubbard NVIDIA
Re: [PATCH] net: qrtr: fix memory leak in qrtr_tun_read_iter
On Thu, Sep 26, 2019 at 12:21:12AM +0100, Al Viro wrote:
> On Wed, Sep 25, 2019 at 06:04:13PM -0500, Navid Emamdoost wrote:
> > In qrtr_tun_read_iter we need an error handling path to appropriately
> > release skb in cases of error.
>
> Release _what_ skb?
It is not a leak clearly! My bad ...
>
> > Signed-off-by: Navid Emamdoost
> > ---
> > net/qrtr/tun.c | 13 +
> > 1 file changed, 9 insertions(+), 4 deletions(-)
> >
> > diff --git a/net/qrtr/tun.c b/net/qrtr/tun.c
> > index e35869e81766..0f6e6d1d2901 100644
> > --- a/net/qrtr/tun.c
> > +++ b/net/qrtr/tun.c
> > @@ -54,19 +54,24 @@ static ssize_t qrtr_tun_read_iter(struct kiocb *iocb,
> > struct iov_iter *to)
> > int count;
> >
> > while (!(skb = skb_dequeue(>queue))) {
>
> The body of the loop is entered only if the loop condition has
> evaluated true. In this case, it means that the value of
> !(skb = skb_dequeue(>queue))
> had been true, i.e. the value of
> skb = skb_dequeue(>queue)
> has been NULL, i.e. that skb_dequeue() has returned NULL, which had
> been copied into skb.
>
> In other words, in the body of that loop we have skb equal to NULL.
>
> > - if (filp->f_flags & O_NONBLOCK)
> > - return -EAGAIN;
> > + if (filp->f_flags & O_NONBLOCK) {
> > + count = -EAGAIN;
> > + goto out;
> > + }
> >
> > /* Wait until we get data or the endpoint goes away */
> > if (wait_event_interruptible(tun->readq,
> > -!skb_queue_empty(>queue)))
> > - return -ERESTARTSYS;
> > +!skb_queue_empty(>queue))) {
> > + count = -ERESTARTSYS;
> > + goto out;
> > + }
> > }
>
> The meaning of that loop is fairly clear, isn't it? Keep looking int
> tun->queue until an skb shows up there. If it's not immediately there,
> fail with -EAGAIN for non-blocking files and wait on tun->readq until
> some skb arrives.
Thanks for the explainations.
Navid.
Re: [PATCH] net/ncsi: prevent memory leak in ncsi_rsp_handler_gc
On Thu, Sep 26, 2019 at 12:09:38AM +0100, Al Viro wrote:
> On Wed, Sep 25, 2019 at 04:58:53PM -0500, Navid Emamdoost wrote:
> > In ncsi_rsp_handler_gc if allocation for nc->vlan_filter.vids fails the
> > allocated memory for nc->mac_filter.addrs should be released.
> >
> > Signed-off-by: Navid Emamdoost
> > ---
> > net/ncsi/ncsi-rsp.c | 4 +++-
> > 1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/net/ncsi/ncsi-rsp.c b/net/ncsi/ncsi-rsp.c
> > index d5611f04926d..f3f7c3772994 100644
> > --- a/net/ncsi/ncsi-rsp.c
> > +++ b/net/ncsi/ncsi-rsp.c
> > @@ -800,8 +800,10 @@ static int ncsi_rsp_handler_gc(struct ncsi_request *nr)
> > nc->vlan_filter.vids = kcalloc(rsp->vlan_cnt,
> >sizeof(*nc->vlan_filter.vids),
> >GFP_ATOMIC);
> > - if (!nc->vlan_filter.vids)
> > + if (!nc->vlan_filter.vids) {
> > + kfree(nc->mac_filter.addrs);
> > return -ENOMEM;
> > + }
>
> Again, why is it not a double-free? IOW, what guarantees that we won't
> be calling ncsi_remove_channel(nc) at later point?
>
> I'm not familiar with that code, so you _might_ be correct in this case,
> but you need a lot more analysis in commit message than "should be",
> considering the other similar patches from the same source, with the
> same level of details in them that had been provably broken.
>
> I don't know what kind of heuristics you are using when looking for
> leaks, but they demonstrably give quite a few false positives.
>
> It might be useful (and not just for you) to discuss those heuristics.
> Could you go over the patch series you've posted and follow them up
> with "here I've decided that we have a leak for such and such reason".
> _Including_ the ones where you've ended up with false positives.
>
> Look at it this way: you've posted a lot of statements without any
> proofs of their correctness *or* any way to guess what those missing
> proofs might've been. At least some of them are false. I can try
> to prove them from scratch and post such proofs where the statement
> happens to be true and counterexamples where it happens to be false.
> However, it would've been much more useful to go through what you've
> actually done to arrive to those statements, so that mistakes
> would not be repeated in new problems. And those mistakes are very
> unlikely to be yours alone, so other people would benefit as well.
Hi Al, thanks for elaborating.
Here and in some other places when I see an error happening (i.e an errno
is returned here) then the previous allocations need to be release
somehow. The problem is that just by traversing the code using tools
like ctags or elixir I couldn't find any caller to ncsi_rsp_handler_gc
that handles such errnos. By your comment I found that
ncsi_remove_channel can be invoked to remove a channel, but again I
cannot find a clear call path including ncsi_rsp_handler_gc and then
ncsi_remove_channel or any thing like ncsi_unregister_dev (which I can
see is calling ncsi_remove_channel in ncsi-manage.c)
So it would be beneficial if we could somehow handle such cases
where we encounter function pointers on the way of constructing call
graph.
[PATCH] nvmem: sc27xx: Change to use devm_hwspin_lock_request_specific() to request one hwlock
Change to use devm_hwspin_lock_request_specific() to help to simplify the
cleanup code for drivers requesting one hwlock. Thus we can remove the
redundant sc27xx_efuse_remove() and platform_set_drvdata().
Signed-off-by: Baolin Wang
---
drivers/nvmem/sc27xx-efuse.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/nvmem/sc27xx-efuse.c b/drivers/nvmem/sc27xx-efuse.c
index c6ee210..ab5e7e0 100644
--- a/drivers/nvmem/sc27xx-efuse.c
+++ b/drivers/nvmem/sc27xx-efuse.c
@@ -211,7 +211,7 @@ static int sc27xx_efuse_probe(struct platform_device *pdev)
return ret;
}
- efuse->hwlock = hwspin_lock_request_specific(ret);
+ efuse->hwlock = devm_hwspin_lock_request_specific(>dev, ret);
if (!efuse->hwlock) {
dev_err(>dev, "failed to request hwspinlock\n");
return -ENXIO;
@@ -219,7 +219,6 @@ static int sc27xx_efuse_probe(struct platform_device *pdev)
mutex_init(>mutex);
efuse->dev = >dev;
- platform_set_drvdata(pdev, efuse);
econfig.stride = 1;
econfig.word_size = 1;
@@ -232,21 +231,12 @@ static int sc27xx_efuse_probe(struct platform_device
*pdev)
nvmem = devm_nvmem_register(>dev, );
if (IS_ERR(nvmem)) {
dev_err(>dev, "failed to register nvmem config\n");
- hwspin_lock_free(efuse->hwlock);
return PTR_ERR(nvmem);
}
return 0;
}
-static int sc27xx_efuse_remove(struct platform_device *pdev)
-{
- struct sc27xx_efuse *efuse = platform_get_drvdata(pdev);
-
- hwspin_lock_free(efuse->hwlock);
- return 0;
-}
-
static const struct of_device_id sc27xx_efuse_of_match[] = {
{ .compatible = "sprd,sc2731-efuse" },
{ }
@@ -254,7 +244,6 @@ static int sc27xx_efuse_remove(struct platform_device *pdev)
static struct platform_driver sc27xx_efuse_driver = {
.probe = sc27xx_efuse_probe,
- .remove = sc27xx_efuse_remove,
.driver = {
.name = "sc27xx-efuse",
.of_match_table = sc27xx_efuse_of_match,
--
1.7.9.5
Re: [PATCH 2/2] clk: meson: a1: add support for Amlogic A1 clock driver
Hi, Stephen
Thank you for review
On 2019/9/25 21:12, Stephen Boyd wrote:
Quoting Jian Hu (2019-09-25 04:44:48)
The Amlogic A1 clock includes three parts:
peripheral clocks, pll clocks, CPU clocks.
sys pll and CPU clocks will be sent in next patch.
Unlike the previous series, there is no EE/AO domain
in A1 CLK controllers.
Signed-off-by: Jian Hu
Signed-off-by: Jianxin Pan
This second name didn't send the patch. Please follow the signoff
procedures documented in Documentation/process/submitting-patches.rst
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 16d7614..a48f67d 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -138,6 +138,7 @@ config ARCH_MESON
select COMMON_CLK_AXG
select COMMON_CLK_G12A
select MESON_IRQ_GPIO
+ select COMMON_CLK_A1
Sort?
ok, I will put it behind COMMON_CLK_AXG
help
This enables support for the arm64 based Amlogic SoCs
such as the s905, S905X/D, S912, A113X/D or S905X/D2
diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig
index dabeb43..e6cb4c3 100644
--- a/drivers/clk/meson/Kconfig
+++ b/drivers/clk/meson/Kconfig
@@ -107,3 +107,13 @@ config COMMON_CLK_G12A
help
Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2
devices, aka g12a. Say Y if you want peripherals to work.
+
+config COMMON_CLK_A1
Probably should be placed somewhere alphabetically in this file?
ok, I will put it behind COMMON_CLK_AXG_AUDIO
+ bool
+ depends on ARCH_MESON
+ select COMMON_CLK_MESON_REGMAP
+ select COMMON_CLK_MESON_DUALDIV
+ select COMMON_CLK_MESON_PLL
+ help
+ Support for the clock controller on Amlogic A113L device,
+ aka a1. Say Y if you want peripherals to work.
diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile
index 3939f21..6be3a8f 100644
--- a/drivers/clk/meson/Makefile
+++ b/drivers/clk/meson/Makefile
@@ -19,3 +19,4 @@ obj-$(CONFIG_COMMON_CLK_AXG_AUDIO) += axg-audio.o
obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o
obj-$(CONFIG_COMMON_CLK_G12A) += g12a.o g12a-aoclk.o
obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o
+obj-$(CONFIG_COMMON_CLK_A1) += a1.o
I would guess this should be sorted on Kconfig name in this file?
ok, I will put it behind COMMON_CLK_AXG_AUDIO
diff --git a/drivers/clk/meson/a1.c b/drivers/clk/meson/a1.c
new file mode 100644
index 000..26edae0f
--- /dev/null
+++ b/drivers/clk/meson/a1.c
@@ -0,0 +1,2617 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include "clk-mpll.h"
+#include "clk-pll.h"
+#include "clk-regmap.h"
+#include "vid-pll-div.h"
+#include "clk-dualdiv.h"
+#include "meson-eeclk.h"
+#include "a1.h"
+
[...]
+
+/*
+ * The Meson A1 HIFI PLL is 614.4M, it requires
+ * a strict register sequence to enable the PLL.
+ * set meson_clk_pcie_pll_ops as its ops
Please remove this last line as it's obvious from the code what ops are
used.
ok, I will remove it.
+ */
+static struct clk_regmap a1_hifi_pll = {
+ .data = &(struct meson_clk_pll_data){
+ .en = {
+ .reg_off = ANACTRL_HIFIPLL_CTRL0,
+ .shift = 28,
+ .width = 1,
+ },
+ .m = {
+ .reg_off = ANACTRL_HIFIPLL_CTRL0,
+ .shift = 0,
+ .width = 8,
+ },
+ .n = {
+ .reg_off = ANACTRL_HIFIPLL_CTRL0,
+ .shift = 10,
+ .width = 5,
+ },
+ .frac = {
+ .reg_off = ANACTRL_HIFIPLL_CTRL1,
+ .shift = 0,
+ .width = 19,
+ },
+ .l = {
+ .reg_off = ANACTRL_HIFIPLL_STS,
+ .shift = 31,
+ .width = 1,
+ },
+ .table = a1_hifi_pll_params_table,
+ .init_regs = a1_hifi_init_regs,
+ .init_count = ARRAY_SIZE(a1_hifi_init_regs),
+ },
+ .hw.init = &(struct clk_init_data){
+ .name = "hifi_pll",
+ .ops = _clk_pcie_pll_ops,
+ .parent_hws = (const struct clk_hw *[]) {
+ _xtal_hifipll.hw
+ },
+ .num_parents = 1,
+ },
+};
+
[..]
+
+static struct clk_regmap a1_fclk_div2 = {
+ .data = &(struct clk_regmap_gate_data){
+ .offset = ANACTRL_FIXPLL_CTRL0,
+ .bit_idx = 21,
+ },
+ .hw.init = &(struct clk_init_data){
+ .name = "fclk_div2",
+ .ops = _regmap_gate_ops,
+ .parent_hws = (const struct clk_hw *[]) {
+
[PATCH v3 0/5] clk: rockchip: Support for some new features
1. Support for some new features 2. fix up some error Chang in V3: [PATCH v2 3/6] : It's been merged So rebased and resubmit. Chang in V2: [PATCH v2 5/6] : fix up the Register error, and add delay. Elaine Zhang (4): clk: rockchip: fix up the frac clk get rate error clk: rockchip: add a clock-type for muxes based in the pmugrf clk: rockchip: add pll up and down when change pll freq clk: rockchip: support pll setting by auto Finley Xiao (1): clk: rockchip: Add supprot to limit input rate for fractional divider drivers/clk/rockchip/clk-pll.c| 236 +++--- drivers/clk/rockchip/clk-px30.c | 29 ++--- drivers/clk/rockchip/clk-rk3036.c | 13 ++- drivers/clk/rockchip/clk-rk3128.c | 15 ++- drivers/clk/rockchip/clk-rk3188.c | 24 ++-- drivers/clk/rockchip/clk-rk3228.c | 18 +-- drivers/clk/rockchip/clk-rk3288.c | 19 +-- drivers/clk/rockchip/clk-rk3308.c | 46 drivers/clk/rockchip/clk-rk3328.c | 17 +-- drivers/clk/rockchip/clk-rk3368.c | 17 +-- drivers/clk/rockchip/clk-rk3399.c | 32 +++--- drivers/clk/rockchip/clk-rv1108.c | 14 ++- drivers/clk/rockchip/clk.c| 39 ++- drivers/clk/rockchip/clk.h| 27 - include/linux/clk-provider.h | 2 + 15 files changed, 422 insertions(+), 126 deletions(-) -- 1.9.1
[PATCH v3 1/5] clk: rockchip: Add supprot to limit input rate for fractional divider
From: Finley Xiao
>From Rockchips fractional divider usage, some clocks can be generated
by fractional divider, but the input clock frequency of fractional
divider should be less than a specified value.
Signed-off-by: Finley Xiao
Signed-off-by: Elaine Zhang
---
drivers/clk/rockchip/clk-px30.c | 29
drivers/clk/rockchip/clk-rk3036.c | 13 ++-
drivers/clk/rockchip/clk-rk3128.c | 15 -
drivers/clk/rockchip/clk-rk3188.c | 24 +++-
drivers/clk/rockchip/clk-rk3228.c | 18 +--
drivers/clk/rockchip/clk-rk3288.c | 19 +---
drivers/clk/rockchip/clk-rk3308.c | 46 ++-
drivers/clk/rockchip/clk-rk3328.c | 17 +--
drivers/clk/rockchip/clk-rk3368.c | 17 +--
drivers/clk/rockchip/clk-rk3399.c | 32 ---
drivers/clk/rockchip/clk-rv1108.c | 14 +++-
drivers/clk/rockchip/clk.c| 21 +++---
drivers/clk/rockchip/clk.h| 10 ++---
include/linux/clk-provider.h | 2 ++
14 files changed, 168 insertions(+), 109 deletions(-)
diff --git a/drivers/clk/rockchip/clk-px30.c b/drivers/clk/rockchip/clk-px30.c
index 3a501896b280..6c2f53dc73b6 100644
--- a/drivers/clk/rockchip/clk-px30.c
+++ b/drivers/clk/rockchip/clk-px30.c
@@ -13,6 +13,7 @@
#include "clk.h"
#define PX30_GRF_SOC_STATUS0 0x480
+#define PX30_FRAC_MAX_PRATE6
enum px30_plls {
apll, dpll, cpll, npll, apll_b_h, apll_b_l,
@@ -420,7 +421,7 @@ enum px30_pmu_plls {
COMPOSITE_FRACMUX(0, "dclk_vopb_frac", "dclk_vopb_src",
CLK_SET_RATE_PARENT,
PX30_CLKSEL_CON(6), 0,
PX30_CLKGATE_CON(2), 3, GFLAGS,
- _dclk_vopb_fracmux),
+ _dclk_vopb_fracmux, 0),
GATE(DCLK_VOPB, "dclk_vopb", "dclk_vopb_mux", CLK_SET_RATE_PARENT,
PX30_CLKGATE_CON(2), 4, GFLAGS),
COMPOSITE(0, "dclk_vopl_src", mux_npll_cpll_p, 0,
@@ -429,7 +430,7 @@ enum px30_pmu_plls {
COMPOSITE_FRACMUX(0, "dclk_vopl_frac", "dclk_vopl_src",
CLK_SET_RATE_PARENT,
PX30_CLKSEL_CON(9), 0,
PX30_CLKGATE_CON(2), 7, GFLAGS,
- _dclk_vopl_fracmux),
+ _dclk_vopl_fracmux, 0),
GATE(DCLK_VOPL, "dclk_vopl", "dclk_vopl_mux", CLK_SET_RATE_PARENT,
PX30_CLKGATE_CON(2), 8, GFLAGS),
@@ -555,7 +556,7 @@ enum px30_pmu_plls {
COMPOSITE_FRACMUX(0, "clk_pdm_frac", "clk_pdm_src", CLK_SET_RATE_PARENT,
PX30_CLKSEL_CON(27), 0,
PX30_CLKGATE_CON(9), 10, GFLAGS,
- _pdm_fracmux),
+ _pdm_fracmux, PX30_FRAC_MAX_PRATE),
GATE(SCLK_PDM, "clk_pdm", "clk_pdm_mux", CLK_SET_RATE_PARENT,
PX30_CLKGATE_CON(9), 11, GFLAGS),
@@ -565,7 +566,7 @@ enum px30_pmu_plls {
COMPOSITE_FRACMUX(0, "clk_i2s0_tx_frac", "clk_i2s0_tx_src",
CLK_SET_RATE_PARENT,
PX30_CLKSEL_CON(29), 0,
PX30_CLKGATE_CON(9), 13, GFLAGS,
- _i2s0_tx_fracmux),
+ _i2s0_tx_fracmux, PX30_FRAC_MAX_PRATE),
COMPOSITE_NODIV(SCLK_I2S0_TX, "clk_i2s0_tx", mux_i2s0_tx_rx_p,
CLK_SET_RATE_PARENT,
PX30_CLKSEL_CON(28), 12, 1, MFLAGS,
PX30_CLKGATE_CON(9), 14, GFLAGS),
@@ -581,7 +582,7 @@ enum px30_pmu_plls {
COMPOSITE_FRACMUX(0, "clk_i2s0_rx_frac", "clk_i2s0_rx_src",
CLK_SET_RATE_PARENT,
PX30_CLKSEL_CON(59), 0,
PX30_CLKGATE_CON(17), 1, GFLAGS,
- _i2s0_rx_fracmux),
+ _i2s0_rx_fracmux, PX30_FRAC_MAX_PRATE),
COMPOSITE_NODIV(SCLK_I2S0_RX, "clk_i2s0_rx", mux_i2s0_rx_tx_p,
CLK_SET_RATE_PARENT,
PX30_CLKSEL_CON(58), 12, 1, MFLAGS,
PX30_CLKGATE_CON(17), 2, GFLAGS),
@@ -597,7 +598,7 @@ enum px30_pmu_plls {
COMPOSITE_FRACMUX(0, "clk_i2s1_frac", "clk_i2s1_src",
CLK_SET_RATE_PARENT,
PX30_CLKSEL_CON(31), 0,
PX30_CLKGATE_CON(10), 1, GFLAGS,
- _i2s1_fracmux),
+ _i2s1_fracmux, PX30_FRAC_MAX_PRATE),
GATE(SCLK_I2S1, "clk_i2s1", "clk_i2s1_mux", CLK_SET_RATE_PARENT,
PX30_CLKGATE_CON(10), 2, GFLAGS),
COMPOSITE_NODIV(0, "clk_i2s1_out_pre", mux_i2s1_out_p, 0,
@@ -612,7 +613,7 @@ enum px30_pmu_plls {
COMPOSITE_FRACMUX(0, "clk_i2s2_frac", "clk_i2s2_src",
CLK_SET_RATE_PARENT,
PX30_CLKSEL_CON(33), 0,
PX30_CLKGATE_CON(10), 5, GFLAGS,
- _i2s2_fracmux),
+ _i2s2_fracmux, PX30_FRAC_MAX_PRATE),
GATE(SCLK_I2S2, "clk_i2s2", "clk_i2s2_mux",
[PATCH v3 4/5] clk: rockchip: add pll up and down when change pll freq
set pll sequence:
->set pll to slow mode or other plls
->set pll down
->set pll params
->set pll up
->wait pll lock status
->set pll to normal mode
To slove the system error:
wait_pll_lock: timeout waiting for pll to lock
pll_set_params: pll update unsucessful,
trying to restore old params
Signed-off-by: Elaine Zhang
---
drivers/clk/rockchip/clk-pll.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c
index 198417d56300..390e9473807a 100644
--- a/drivers/clk/rockchip/clk-pll.c
+++ b/drivers/clk/rockchip/clk-pll.c
@@ -199,6 +199,11 @@ static int rockchip_rk3036_pll_set_params(struct
rockchip_clk_pll *pll,
rate_change_remuxed = 1;
}
+ /* set pll power down */
+ writel(HIWORD_UPDATE(RK3036_PLLCON1_PWRDOWN,
+RK3036_PLLCON1_PWRDOWN, 0),
+ pll->reg_base + RK3036_PLLCON(1));
+
/* update pll values */
writel_relaxed(HIWORD_UPDATE(rate->fbdiv, RK3036_PLLCON0_FBDIV_MASK,
RK3036_PLLCON0_FBDIV_SHIFT) |
@@ -220,6 +225,11 @@ static int rockchip_rk3036_pll_set_params(struct
rockchip_clk_pll *pll,
pllcon |= rate->frac << RK3036_PLLCON2_FRAC_SHIFT;
writel_relaxed(pllcon, pll->reg_base + RK3036_PLLCON(2));
+ /* set pll power up */
+ writel(HIWORD_UPDATE(0, RK3036_PLLCON1_PWRDOWN, 0),
+ pll->reg_base + RK3036_PLLCON(1));
+ udelay(1);
+
/* wait for the pll to lock */
ret = rockchip_pll_wait_lock(pll);
if (ret) {
@@ -676,6 +686,11 @@ static int rockchip_rk3399_pll_set_params(struct
rockchip_clk_pll *pll,
rate_change_remuxed = 1;
}
+ /* set pll power down */
+ writel(HIWORD_UPDATE(RK3399_PLLCON3_PWRDOWN,
+RK3399_PLLCON3_PWRDOWN, 0),
+ pll->reg_base + RK3399_PLLCON(3));
+
/* update pll values */
writel_relaxed(HIWORD_UPDATE(rate->fbdiv, RK3399_PLLCON0_FBDIV_MASK,
RK3399_PLLCON0_FBDIV_SHIFT),
@@ -699,6 +714,12 @@ static int rockchip_rk3399_pll_set_params(struct
rockchip_clk_pll *pll,
RK3399_PLLCON3_DSMPD_SHIFT),
pll->reg_base + RK3399_PLLCON(3));
+ /* set pll power up */
+ writel(HIWORD_UPDATE(0,
+RK3399_PLLCON3_PWRDOWN, 0),
+ pll->reg_base + RK3399_PLLCON(3));
+ udelay(1);
+
/* wait for the pll to lock */
ret = rockchip_rk3399_pll_wait_lock(pll);
if (ret) {
--
1.9.1
[PATCH v3 2/5] clk: rockchip: fix up the frac clk get rate error
support fractional divider with only one level parent clock
Signed-off-by: Elaine Zhang
---
drivers/clk/rockchip/clk.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index fac5a4a3f5c3..8f77c3f9fab7 100644
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c
@@ -190,16 +190,21 @@ static void rockchip_fractional_approximation(struct
clk_hw *hw,
if (((rate * 20 > p_rate) && (p_rate % rate != 0)) ||
(fd->max_prate && fd->max_prate < p_rate)) {
p_parent = clk_hw_get_parent(clk_hw_get_parent(hw));
- p_parent_rate = clk_hw_get_rate(p_parent);
- *parent_rate = p_parent_rate;
- if (fd->max_prate && p_parent_rate > fd->max_prate) {
- div = DIV_ROUND_UP(p_parent_rate, fd->max_prate);
- *parent_rate = p_parent_rate / div;
+ if (!p_parent) {
+ *parent_rate = p_rate;
+ } else {
+ p_parent_rate = clk_hw_get_rate(p_parent);
+ *parent_rate = p_parent_rate;
+ if (fd->max_prate && p_parent_rate > fd->max_prate) {
+ div = DIV_ROUND_UP(p_parent_rate,
+ fd->max_prate);
+ *parent_rate = p_parent_rate / div;
+ }
}
if (*parent_rate < rate * 20) {
- pr_err("%s parent_rate(%ld) is low than rate(%ld)*20,
fractional div is not allowed\n",
- clk_hw_get_name(hw), *parent_rate, rate);
+ pr_warn("%s p_rate(%ld) is low than rate(%ld)*20, use
integer or half-div\n",
+ clk_hw_get_name(hw), *parent_rate, rate);
*m = 0;
*n = 1;
return;
--
1.9.1
[PATCH v3 5/5] clk: rockchip: support pll setting by auto
If setting freq is not support in rockchip_pll_rate_table,
It can calculate and set pll params by auto.
Signed-off-by: Elaine Zhang
---
drivers/clk/rockchip/clk-pll.c | 215 ++---
1 file changed, 200 insertions(+), 15 deletions(-)
diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c
index 390e9473807a..ac8c62c531f0 100644
--- a/drivers/clk/rockchip/clk-pll.c
+++ b/drivers/clk/rockchip/clk-pll.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include "clk.h"
#define PLL_MODE_MASK 0x3
@@ -46,6 +47,198 @@ struct rockchip_clk_pll {
#define to_rockchip_clk_pll_nb(nb) \
container_of(nb, struct rockchip_clk_pll, clk_nb)
+#define MHZ(1000UL * 1000UL)
+#define KHZ(1000UL)
+
+/* CLK_PLL_TYPE_RK3066_AUTO type ops */
+#define PLL_FREF_MIN (269 * KHZ)
+#define PLL_FREF_MAX (2200 * MHZ)
+
+#define PLL_FVCO_MIN (440 * MHZ)
+#define PLL_FVCO_MAX (2200 * MHZ)
+
+#define PLL_FOUT_MIN (27500 * KHZ)
+#define PLL_FOUT_MAX (2200 * MHZ)
+
+#define PLL_NF_MAX (4096)
+#define PLL_NR_MAX (64)
+#define PLL_NO_MAX (16)
+
+/* CLK_PLL_TYPE_RK3036/3366/3399_AUTO type ops */
+#define MIN_FOUTVCO_FREQ (800 * MHZ)
+#define MAX_FOUTVCO_FREQ (2000 * MHZ)
+
+static struct rockchip_pll_rate_table auto_table;
+
+static struct rockchip_pll_rate_table *rk_pll_rate_table_get(void)
+{
+ return _table;
+}
+
+static int rockchip_pll_clk_set_postdiv(unsigned long fout_hz,
+ u32 *postdiv1,
+ u32 *postdiv2,
+ u32 *foutvco)
+{
+ unsigned long freq;
+
+ if (fout_hz < MIN_FOUTVCO_FREQ) {
+ for (*postdiv1 = 1; *postdiv1 <= 7; (*postdiv1)++) {
+ for (*postdiv2 = 1; *postdiv2 <= 7; (*postdiv2)++) {
+ freq = fout_hz * (*postdiv1) * (*postdiv2);
+ if (freq >= MIN_FOUTVCO_FREQ &&
+ freq <= MAX_FOUTVCO_FREQ) {
+ *foutvco = freq;
+ return 0;
+ }
+ }
+ }
+ pr_err("CANNOT FIND postdiv1/2 to make fout in range from 800M
to 2000M,fout = %lu\n",
+ fout_hz);
+ } else {
+ *postdiv1 = 1;
+ *postdiv2 = 1;
+ }
+ return 0;
+}
+
+static struct rockchip_pll_rate_table *
+rockchip_pll_clk_set_by_auto(struct rockchip_clk_pll *pll,
+unsigned long fin_hz,
+unsigned long fout_hz)
+{
+ struct rockchip_pll_rate_table *rate_table = rk_pll_rate_table_get();
+ /* FIXME set postdiv1/2 always 1*/
+ u32 foutvco = fout_hz;
+ u64 fin_64, frac_64;
+ u32 f_frac, postdiv1, postdiv2;
+ unsigned long clk_gcd = 0;
+
+ if (fin_hz == 0 || fout_hz == 0 || fout_hz == fin_hz)
+ return NULL;
+
+ rockchip_pll_clk_set_postdiv(fout_hz, , , );
+ rate_table->postdiv1 = postdiv1;
+ rate_table->postdiv2 = postdiv2;
+ rate_table->dsmpd = 1;
+
+ if (fin_hz / MHZ * MHZ == fin_hz && fout_hz / MHZ * MHZ == fout_hz) {
+ fin_hz /= MHZ;
+ foutvco /= MHZ;
+ clk_gcd = gcd(fin_hz, foutvco);
+ rate_table->refdiv = fin_hz / clk_gcd;
+ rate_table->fbdiv = foutvco / clk_gcd;
+
+ rate_table->frac = 0;
+
+ pr_debug("fin = %lu, fout = %lu, clk_gcd = %lu, refdiv = %u,
fbdiv = %u, postdiv1 = %u, postdiv2 = %u, frac = %u\n",
+fin_hz, fout_hz, clk_gcd, rate_table->refdiv,
+rate_table->fbdiv, rate_table->postdiv1,
+rate_table->postdiv2, rate_table->frac);
+ } else {
+ pr_debug("frac div running, fin_hz = %lu, fout_hz = %lu,
fin_INT_mhz = %lu, fout_INT_mhz = %lu\n",
+fin_hz, fout_hz,
+fin_hz / MHZ * MHZ,
+fout_hz / MHZ * MHZ);
+ pr_debug("frac get postdiv1 = %u, postdiv2 = %u, foutvco =
%u\n",
+rate_table->postdiv1, rate_table->postdiv2, foutvco);
+ clk_gcd = gcd(fin_hz / MHZ, foutvco / MHZ);
+ rate_table->refdiv = fin_hz / MHZ / clk_gcd;
+ rate_table->fbdiv = foutvco / MHZ / clk_gcd;
+ pr_debug("frac get refdiv = %u, fbdiv = %u\n",
+rate_table->refdiv, rate_table->fbdiv);
+
+ rate_table->frac = 0;
+
+ f_frac = (foutvco % MHZ);
+ fin_64 = fin_hz;
+ do_div(fin_64, (u64)rate_table->refdiv);
+ frac_64 =
[PATCH v3 3/5] clk: rockchip: add a clock-type for muxes based in the pmugrf
Rockchip socs often have some tiny number of muxes not controlled from
the core clock controller but through bits set in the pmugrf.
Use MUXPMUGRF() to cover this special clock-type.
Signed-off-by: Elaine Zhang
---
drivers/clk/rockchip/clk.c | 9 +
drivers/clk/rockchip/clk.h | 17 +
2 files changed, 26 insertions(+)
diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index 8f77c3f9fab7..4f238f2851ac 100644
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c
@@ -407,6 +407,8 @@ struct rockchip_clk_provider * __init
rockchip_clk_init(struct device_node *np,
ctx->grf = syscon_regmap_lookup_by_phandle(ctx->cru_node,
"rockchip,grf");
+ ctx->pmugrf = syscon_regmap_lookup_by_phandle(ctx->cru_node,
+ "rockchip,pmugrf");
return ctx;
@@ -482,6 +484,13 @@ void __init rockchip_clk_register_branches(
list->mux_shift, list->mux_width,
list->mux_flags);
break;
+ case branch_muxpmugrf:
+ clk = rockchip_clk_register_muxgrf(list->name,
+ list->parent_names, list->num_parents,
+ flags, ctx->pmugrf, list->muxdiv_offset,
+ list->mux_shift, list->mux_width,
+ list->mux_flags);
+ break;
case branch_divider:
if (list->div_table)
clk = clk_register_divider_table(NULL,
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 0d401ce09a54..ae059b7744f9 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -238,6 +238,7 @@ struct rockchip_clk_provider {
struct clk_onecell_data clk_data;
struct device_node *cru_node;
struct regmap *grf;
+ struct regmap *pmugrf;
spinlock_t lock;
};
@@ -390,6 +391,7 @@ enum rockchip_clk_branch_type {
branch_composite,
branch_mux,
branch_muxgrf,
+ branch_muxpmugrf,
branch_divider,
branch_fraction_divider,
branch_gate,
@@ -662,6 +664,21 @@ struct rockchip_clk_branch {
.gate_offset= -1, \
}
+#define MUXPMUGRF(_id, cname, pnames, f, o, s, w, mf) \
+ { \
+ .id = _id, \
+ .branch_type= branch_muxpmugrf, \
+ .name = cname,\
+ .parent_names = pnames, \
+ .num_parents= ARRAY_SIZE(pnames), \
+ .flags = f,\
+ .muxdiv_offset = o,\
+ .mux_shift = s,\
+ .mux_width = w,\
+ .mux_flags = mf, \
+ .gate_offset= -1, \
+ }
+
#define DIV(_id, cname, pname, f, o, s, w, df) \
{ \
.id = _id, \
--
1.9.1
[PATCH] csky: Fixup csky_pmu.max_period assignment
From: Mao Han
The csky_pmu.max_period has type u64, and BIT() can only return
32 bits unsigned long on C-SKY. The initialization for max_period
will be incorrect when count_width is bigger than 32.
Use BIG_ULL()
Signed-off-by: Mao Han
Signed-off-by: Guo Ren
---
arch/csky/kernel/perf_event.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/csky/kernel/perf_event.c b/arch/csky/kernel/perf_event.c
index 4c1a193..7570109 100644
--- a/arch/csky/kernel/perf_event.c
+++ b/arch/csky/kernel/perf_event.c
@@ -1306,7 +1306,7 @@ int csky_pmu_device_probe(struct platform_device *pdev,
_pmu.count_width)) {
csky_pmu.count_width = DEFAULT_COUNT_WIDTH;
}
- csky_pmu.max_period = BIT(csky_pmu.count_width) - 1;
+ csky_pmu.max_period = BIT_ULL(csky_pmu.count_width) - 1;
csky_pmu.plat_device = pdev;
--
2.7.4
Re: [PATCH] udf: prevent memory leak in udf_new_inode
On Thu, Sep 26, 2019 at 10:00:31AM +0200, Jan Kara wrote:
> On Wed 25-09-19 23:24:08, Al Viro wrote:
> > On Wed, Sep 25, 2019 at 04:39:03PM -0500, Navid Emamdoost wrote:
> > > In udf_new_inode if either udf_new_block or insert_inode_locked fials
> > > the allocated memory for iinfo->i_ext.i_data should be released.
> >
> > "... because of such-and-such reasons" part appears to be missing.
> > Why should it be released there?
> >
> > > Signed-off-by: Navid Emamdoost
> > > ---
> > > fs/udf/ialloc.c | 2 ++
> > > 1 file changed, 2 insertions(+)
> > >
> > > diff --git a/fs/udf/ialloc.c b/fs/udf/ialloc.c
> > > index 0adb40718a5d..b8ab3acab6b6 100644
> > > --- a/fs/udf/ialloc.c
> > > +++ b/fs/udf/ialloc.c
> > > @@ -86,6 +86,7 @@ struct inode *udf_new_inode(struct inode *dir, umode_t
> > > mode)
> > > dinfo->i_location.partitionReferenceNum,
> > > start, );
> > > if (err) {
> > > + kfree(iinfo->i_ext.i_data);
> > > iput(inode);
> > > return ERR_PTR(err);
> > > }
> >
> > Have you tested that? Because it has all earmarks of double-free;
> > normal eviction pathway ought to free the damn thing. > a bit>
> >
> > Mind explaining what's to stop ->evict_inode (== udf_evict_inode) from
> > hitting
> > kfree(iinfo->i_ext.i_data);
> > considering that this call of kfree() appears to be unconditional there?
>
> Exactly. udf_evict_inode() is responsible for freeing iinfo->i_ext.i_data
> so the patch would result in double free.
>
> Honza
Thanks for clarification.
> --
> Jan Kara
> SUSE Labs, CR
Re: [PATCH v2] ASoC: Intel: Skylake: prevent memory leak in snd_skl_parse_uuids
On Wed, Sep 25, 2019 at 12:05:28PM -0500, Pierre-Louis Bossart wrote:
> On 9/25/19 11:19 AM, Navid Emamdoost wrote:
> > In snd_skl_parse_uuids if allocation for module->instance_id fails, the
> > allocated memory for module shoulde be released. I changes the
> > allocation for module to use devm_kzalloc to be resource_managed
> > allocation and avoid the release in error path.
>
> if you use devm_, don't you need to fix the error path as well then, I see a
> kfree(uuid) in skl_freeup_uuid_list().
>
> I am not very familiar with this code but the error seems to be that the
> list_add_tail() is called after the module->instance_id is allocated, so
> there is a risk that the module allocated earlier is not freed (since it's
> not yet added to the list). Freeing the module as done in patch 1 works,
> using devm_ without fixing the error path does not seem correct to me.
>
Thanks for the feedback, then it's your call if you can accept patch 1 as
fix.
Navid.
> >
> > Signed-off-by: Navid Emamdoost
> > ---
> > Changes in v2:
> > - Changed the allocation for module from kzalloc to devm_kzalloc
> > ---
> > sound/soc/intel/skylake/skl-sst-utils.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/sound/soc/intel/skylake/skl-sst-utils.c
> > b/sound/soc/intel/skylake/skl-sst-utils.c
> > index d43cbf4a71ef..ac37f04b0eea 100644
> > --- a/sound/soc/intel/skylake/skl-sst-utils.c
> > +++ b/sound/soc/intel/skylake/skl-sst-utils.c
> > @@ -284,7 +284,7 @@ int snd_skl_parse_uuids(struct sst_dsp *ctx, const
> > struct firmware *fw,
> > */
> > for (i = 0; i < num_entry; i++, mod_entry++) {
> > - module = kzalloc(sizeof(*module), GFP_KERNEL);
> > + module = devm_kzalloc(ctx->dev, sizeof(*module), GFP_KERNEL);
> > if (!module) {
> > ret = -ENOMEM;
> > goto free_uuid_list;
> >
>
Re: [PATCH] scsi: qla2xxx: Remove WARN_ON_ONCE in qla2x00_status_cont_entry()
On 2019-09-26 00:46, Daniel Wagner wrote:
> Commit 88263208dd23 ("scsi: qla2xxx: Complain if sp->done() is not
> called from the completion path") introduced the WARN_ON_ONCE in
> qla2x00_status_cont_entry(). The assumption was that there is only one
> status continuations element. According to the firmware documentation
> it is possible that multiple status continuations are emitted by the
> firmware.
>
> Cc: Bart Van Assche
> Signed-off-by: Daniel Wagner
> ---
> drivers/scsi/qla2xxx/qla_isr.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
> index 4c26630c1c3e..009fd5a33fcd 100644
> --- a/drivers/scsi/qla2xxx/qla_isr.c
> +++ b/drivers/scsi/qla2xxx/qla_isr.c
> @@ -2837,8 +2837,6 @@ qla2x00_status_cont_entry(struct rsp_que *rsp,
> sts_cont_entry_t *pkt)
> if (sense_len == 0) {
> rsp->status_srb = NULL;
> sp->done(sp, cp->result);
> - } else {
> - WARN_ON_ONCE(true);
> }
> }
Should the following be added?
Fixes: 88263208dd23 ("scsi: qla2xxx: Complain if sp->done() is not
called from the completion path")
Anyway:
Reviewed-by: Bart Van Assche
[PATCH] iio: adc: sc27xx: Use devm_hwspin_lock_request_specific() to simplify code
Change to use devm_hwspin_lock_request_specific() to help to simplify the
cleanup code for drivers requesting one hwlock.
Signed-off-by: Baolin Wang
---
drivers/iio/adc/sc27xx_adc.c | 16 +---
1 file changed, 1 insertion(+), 15 deletions(-)
diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c
index a6c0465..66b387f 100644
--- a/drivers/iio/adc/sc27xx_adc.c
+++ b/drivers/iio/adc/sc27xx_adc.c
@@ -477,13 +477,6 @@ static void sc27xx_adc_disable(void *_data)
SC27XX_MODULE_ADC_EN, 0);
}
-static void sc27xx_adc_free_hwlock(void *_data)
-{
- struct hwspinlock *hwlock = _data;
-
- hwspin_lock_free(hwlock);
-}
-
static int sc27xx_adc_probe(struct platform_device *pdev)
{
struct device *dev = >dev;
@@ -520,19 +513,12 @@ static int sc27xx_adc_probe(struct platform_device *pdev)
return ret;
}
- sc27xx_data->hwlock = hwspin_lock_request_specific(ret);
+ sc27xx_data->hwlock = devm_hwspin_lock_request_specific(dev, ret);
if (!sc27xx_data->hwlock) {
dev_err(dev, "failed to request hwspinlock\n");
return -ENXIO;
}
- ret = devm_add_action_or_reset(dev, sc27xx_adc_free_hwlock,
- sc27xx_data->hwlock);
- if (ret) {
- dev_err(dev, "failed to add hwspinlock action\n");
- return ret;
- }
-
sc27xx_data->dev = dev;
ret = sc27xx_adc_enable(sc27xx_data);
--
1.7.9.5
Re: [PATCH 2/3] KVM: x86: fix nested guest live migration with PML
On 9/26/19 10:18 AM, Paolo Bonzini wrote:
> @@ -1597,8 +1615,11 @@ static bool spte_clear_dirty(u64 *sptep)
>
> rmap_printk("rmap_clear_dirty: spte %p %llx\n", sptep, *sptep);
>
> - spte &= ~shadow_dirty_mask;
> + WARN_ON(!spte_ad_enabled(spte));
> + if (spte_ad_need_write_protect(spte))
> + return spte_write_protect(sptep, false);
>
> + spte &= ~shadow_dirty_mask;
> return mmu_spte_update(sptep, spte);
> }
>
I think that it would be a bit cleaner to move the spte_ad_need_write_protect()
check to the if statement inside __rmap_clear_dirty() instead, since it already
checks for spte_ad_enabled() to decide between write-protection and
dirty-clearing.
Reviewed-by: Junaid Shahid
Re: [PATCH 1/3] KVM: x86: assign two bits to track SPTE kinds
On 9/26/19 10:18 AM, Paolo Bonzini wrote: > Currently, we are overloading SPTE_SPECIAL_MASK to mean both > "A/D bits unavailable" and MMIO, where the difference between the > two is determined by mio_mask and mmio_value. > > However, the next patch will need two bits to distinguish > availability of A/D bits from write protection. So, while at > it give MMIO its own bit pattern, and move the two bits from > bit 62 to bits 52..53 since Intel is allocating EPT page table > bits from the top. > > Signed-off-by: Paolo Bonzini > --- Reviewed-by: Junaid Shahid
Re: [PATCH V9 2/2] mailbox: introduce ARM SMC based mailbox
On 9/24/2019 7:09 PM, Peng Fan wrote: > From: Peng Fan > > This mailbox driver implements a mailbox which signals transmitted data > via an ARM smc (secure monitor call) instruction. The mailbox receiver > is implemented in firmware and can synchronously return data when it > returns execution to the non-secure world again. > An asynchronous receive path is not implemented. > This allows the usage of a mailbox to trigger firmware actions on SoCs > which either don't have a separate management processor or on which such > a core is not available. A user of this mailbox could be the SCP > interface. > > Modified from Andre Przywara's v2 patch > https://lore.kernel.org/patchwork/patch/812999/ > > Cc: Andre Przywara > Signed-off-by: Peng Fan Reviewed-by: Florian Fainelli Thanks for your persistence working on this! -- Florian
Re: [PATCH v2] net: flow_offload: fix memory leak in nfp_abm_u32_knode_replace
On Wed, Sep 25, 2019 at 09:53:14PM -0700, Jakub Kicinski wrote:
> On Wed, 25 Sep 2019 21:22:35 -0500, Navid Emamdoost wrote:
> > In nfp_abm_u32_knode_replace if the allocation for match fails it should
> > go to the error handling instead of returning.
> >
> > Signed-off-by: Navid Emamdoost
> > ---
> > Changes in v2:
> > - Reused err variable for erorr value returning.
>
> Thanks, there's another goto up top. And I think subject prefix could
> be "nfp: abm:", perhaps?
>
Thanks, v3 was sent which fixes this.
Navid.
> > drivers/net/ethernet/netronome/nfp/abm/cls.c | 10 +++---
> > 1 file changed, 7 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/netronome/nfp/abm/cls.c
> > b/drivers/net/ethernet/netronome/nfp/abm/cls.c
> > index 23ebddfb9532..b0cb9d201f7d 100644
> > --- a/drivers/net/ethernet/netronome/nfp/abm/cls.c
> > +++ b/drivers/net/ethernet/netronome/nfp/abm/cls.c
> > @@ -198,14 +198,18 @@ nfp_abm_u32_knode_replace(struct nfp_abm_link *alink,
> > if ((iter->val & cmask) == (val & cmask) &&
> > iter->band != knode->res->classid) {
> > NL_SET_ERR_MSG_MOD(extack, "conflict with already
> > offloaded filter");
> > + err = -EOPNOTSUPP;
> > goto err_delete;
> > }
> > }
> >
> > if (!match) {
> > match = kzalloc(sizeof(*match), GFP_KERNEL);
> > - if (!match)
> > - return -ENOMEM;
> > + if (!match) {
> > + err = -ENOMEM;
> > + goto err_delete;
> > + }
> > +
> > list_add(>list, >dscp_map);
> > }
> > match->handle = knode->handle;
> > @@ -221,7 +225,7 @@ nfp_abm_u32_knode_replace(struct nfp_abm_link *alink,
> >
> > err_delete:
> > nfp_abm_u32_knode_delete(alink, knode);
> > - return -EOPNOTSUPP;
> > + return err;
> > }
> >
> > static int nfp_abm_setup_tc_block_cb(enum tc_setup_type type,
>
[PATCH V2 2/2] nvmem: imx: scu: support write
From: Peng Fan
The fuse programming from non-secure world is blocked, so we could
only use Arm Trusted Firmware SIP call to let ATF program fuse.
Because there is ECC region that could only be programmed once,
so add a heler in_ecc to check the ecc region.
Signed-off-by: Peng Fan
---
V2:
Rebased on Latest linux-next
drivers/nvmem/imx-ocotp-scu.c | 73 ++-
1 file changed, 72 insertions(+), 1 deletion(-)
diff --git a/drivers/nvmem/imx-ocotp-scu.c b/drivers/nvmem/imx-ocotp-scu.c
index 030e27ba4dfb..03f1ab23ad51 100644
--- a/drivers/nvmem/imx-ocotp-scu.c
+++ b/drivers/nvmem/imx-ocotp-scu.c
@@ -7,6 +7,7 @@
* Peng Fan
*/
+#include
#include
#include
#include
@@ -14,6 +15,9 @@
#include
#include
+#define IMX_SIP_OTP0xC20A
+#define IMX_SIP_OTP_WRITE 0x2
+
enum ocotp_devtype {
IMX8QXP,
IMX8QM,
@@ -46,6 +50,8 @@ struct imx_sc_msg_misc_fuse_read {
u32 word;
} __packed;
+static DEFINE_MUTEX(scu_ocotp_mutex);
+
static struct ocotp_devtype_data imx8qxp_data = {
.devtype = IMX8QXP,
.nregs = 800,
@@ -84,6 +90,23 @@ static bool in_hole(void *context, u32 index)
return false;
}
+static bool in_ecc(void *context, u32 index)
+{
+ struct ocotp_priv *priv = context;
+ const struct ocotp_devtype_data *data = priv->data;
+ int i;
+
+ for (i = 0; i < data->num_region; i++) {
+ if (data->region[i].flag & ECC_REGION) {
+ if ((index >= data->region[i].start) &&
+ (index <= data->region[i].end))
+ return true;
+ }
+ }
+
+ return false;
+}
+
static int imx_sc_misc_otp_fuse_read(struct imx_sc_ipc *ipc, u32 word,
u32 *val)
{
@@ -127,6 +150,8 @@ static int imx_scu_ocotp_read(void *context, unsigned int
offset,
if (!p)
return -ENOMEM;
+ mutex_lock(_ocotp_mutex);
+
buf = p;
for (i = index; i < (index + count); i++) {
@@ -137,6 +162,7 @@ static int imx_scu_ocotp_read(void *context, unsigned int
offset,
ret = imx_sc_misc_otp_fuse_read(priv->nvmem_ipc, i, buf);
if (ret) {
+ mutex_unlock(_ocotp_mutex);
kfree(p);
return ret;
}
@@ -145,18 +171,63 @@ static int imx_scu_ocotp_read(void *context, unsigned int
offset,
memcpy(val, (u8 *)p + offset % 4, bytes);
+ mutex_unlock(_ocotp_mutex);
+
kfree(p);
return 0;
}
+static int imx_scu_ocotp_write(void *context, unsigned int offset,
+ void *val, size_t bytes)
+{
+ struct ocotp_priv *priv = context;
+ struct arm_smccc_res res;
+ u32 *buf = val;
+ u32 tmp;
+ u32 index;
+ int ret;
+
+ /* allow only writing one complete OTP word at a time */
+ if ((bytes != 4) || (offset % 4))
+ return -EINVAL;
+
+ index = offset >> 2;
+
+ if (in_hole(context, index))
+ return -EINVAL;
+
+ if (in_ecc(context, index)) {
+ pr_warn("ECC region, only program once\n");
+ mutex_lock(_ocotp_mutex);
+ ret = imx_sc_misc_otp_fuse_read(priv->nvmem_ipc, index, );
+ mutex_unlock(_ocotp_mutex);
+ if (ret)
+ return ret;
+ if (tmp) {
+ pr_warn("ECC region, already has value: %x\n", tmp);
+ return -EIO;
+ }
+ }
+
+ mutex_lock(_ocotp_mutex);
+
+ arm_smccc_smc(IMX_SIP_OTP, IMX_SIP_OTP_WRITE, index, *buf,
+ 0, 0, 0, 0, );
+
+ mutex_unlock(_ocotp_mutex);
+
+ return res.a0;
+}
+
static struct nvmem_config imx_scu_ocotp_nvmem_config = {
.name = "imx-scu-ocotp",
- .read_only = true,
+ .read_only = false,
.word_size = 4,
.stride = 1,
.owner = THIS_MODULE,
.reg_read = imx_scu_ocotp_read,
+ .reg_write = imx_scu_ocotp_write,
};
static const struct of_device_id imx_scu_ocotp_dt_ids[] = {
--
2.16.4
[PATCH V2 1/2] nvmem: imx: scu: support hole region check
From: Peng Fan
Introduce HOLE/ECC_REGION flag and in_hole helper to ease the check
of hole region. The ECC_REGION is also introduced here which is
preparing for programming support. ECC_REGION could only be programmed
once, so need take care.
Signed-off-by: Peng Fan
---
V2:
Rebased on latest linux-next
drivers/nvmem/imx-ocotp-scu.c | 47 ++-
1 file changed, 42 insertions(+), 5 deletions(-)
diff --git a/drivers/nvmem/imx-ocotp-scu.c b/drivers/nvmem/imx-ocotp-scu.c
index 61a17f943f47..030e27ba4dfb 100644
--- a/drivers/nvmem/imx-ocotp-scu.c
+++ b/drivers/nvmem/imx-ocotp-scu.c
@@ -19,9 +19,20 @@ enum ocotp_devtype {
IMX8QM,
};
+#define ECC_REGION BIT(0)
+#define HOLE_REGIONBIT(1)
+
+struct ocotp_region {
+ u32 start;
+ u32 end;
+ u32 flag;
+};
+
struct ocotp_devtype_data {
int devtype;
int nregs;
+ u32 num_region;
+ struct ocotp_region region[];
};
struct ocotp_priv {
@@ -38,13 +49,41 @@ struct imx_sc_msg_misc_fuse_read {
static struct ocotp_devtype_data imx8qxp_data = {
.devtype = IMX8QXP,
.nregs = 800,
+ .num_region = 3,
+ .region = {
+ {0x10, 0x10f, ECC_REGION},
+ {0x110, 0x21F, HOLE_REGION},
+ {0x220, 0x31F, ECC_REGION},
+ },
};
static struct ocotp_devtype_data imx8qm_data = {
.devtype = IMX8QM,
.nregs = 800,
+ .num_region = 2,
+ .region = {
+ {0x10, 0x10f, ECC_REGION},
+ {0x1a0, 0x1ff, ECC_REGION},
+ },
};
+static bool in_hole(void *context, u32 index)
+{
+ struct ocotp_priv *priv = context;
+ const struct ocotp_devtype_data *data = priv->data;
+ int i;
+
+ for (i = 0; i < data->num_region; i++) {
+ if (data->region[i].flag & HOLE_REGION) {
+ if ((index >= data->region[i].start) &&
+ (index <= data->region[i].end))
+ return true;
+ }
+ }
+
+ return false;
+}
+
static int imx_sc_misc_otp_fuse_read(struct imx_sc_ipc *ipc, u32 word,
u32 *val)
{
@@ -91,11 +130,9 @@ static int imx_scu_ocotp_read(void *context, unsigned int
offset,
buf = p;
for (i = index; i < (index + count); i++) {
- if (priv->data->devtype == IMX8QXP) {
- if ((i > 271) && (i < 544)) {
- *buf++ = 0;
- continue;
- }
+ if (in_hole(context, i)) {
+ *buf++ = 0;
+ continue;
}
ret = imx_sc_misc_otp_fuse_read(priv->nvmem_ipc, i, buf);
--
2.16.4
[PATCH v7 7/7] KVM: x86: Add user-space access interface for CET MSRs
There're two different places storing Guest CET states, the states
managed with XSAVES/XRSTORS, as restored/saved
in previous patch, can be read/write directly from/to the MSRs.
For those stored in VMCS fields, they're access via vmcs_read/
vmcs_write.
Signed-off-by: Yang Weijiang
---
arch/x86/kvm/vmx/vmx.c | 83 ++
1 file changed, 83 insertions(+)
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 44913e4ab558..5265db7cd2af 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -1671,6 +1671,49 @@ static int vmx_get_msr_feature(struct kvm_msr_entry *msr)
return 0;
}
+static int check_cet_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
+{
+ u64 kvm_xss = kvm_supported_xss();
+
+ switch (msr_info->index) {
+ case MSR_IA32_PL0_SSP ... MSR_IA32_PL2_SSP:
+ if (!(kvm_xss | XFEATURE_MASK_CET_KERNEL))
+ return 1;
+ if (!msr_info->host_initiated &&
+ !guest_cpuid_has(vcpu, X86_FEATURE_SHSTK))
+ return 1;
+ break;
+ case MSR_IA32_PL3_SSP:
+ if (!(kvm_xss | XFEATURE_MASK_CET_USER))
+ return 1;
+ if (!msr_info->host_initiated &&
+ !guest_cpuid_has(vcpu, X86_FEATURE_SHSTK))
+ return 1;
+ break;
+ case MSR_IA32_U_CET:
+ if (!(kvm_xss | XFEATURE_MASK_CET_USER))
+ return 1;
+ if (!msr_info->host_initiated &&
+ !guest_cpuid_has(vcpu, X86_FEATURE_SHSTK) &&
+ !guest_cpuid_has(vcpu, X86_FEATURE_IBT))
+ return 1;
+ break;
+ case MSR_IA32_S_CET:
+ if (!msr_info->host_initiated &&
+ !guest_cpuid_has(vcpu, X86_FEATURE_SHSTK) &&
+ !guest_cpuid_has(vcpu, X86_FEATURE_IBT))
+ return 1;
+ break;
+ case MSR_IA32_INT_SSP_TAB:
+ if (!msr_info->host_initiated &&
+ !guest_cpuid_has(vcpu, X86_FEATURE_SHSTK))
+ return 1;
+ break;
+ default:
+ return 1;
+ }
+ return 0;
+}
/*
* Reads an msr value (of 'msr_index') into 'pdata'.
* Returns 0 on success, non-0 otherwise.
@@ -1788,6 +1831,26 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct
msr_data *msr_info)
else
msr_info->data = vmx->pt_desc.guest.addr_a[index / 2];
break;
+ case MSR_IA32_S_CET:
+ if (check_cet_msr(vcpu, msr_info))
+ return 1;
+ msr_info->data = vmcs_readl(GUEST_S_CET);
+ break;
+ case MSR_IA32_INT_SSP_TAB:
+ if (check_cet_msr(vcpu, msr_info))
+ return 1;
+ msr_info->data = vmcs_readl(GUEST_INTR_SSP_TABLE);
+ break;
+ case MSR_IA32_U_CET:
+ if (check_cet_msr(vcpu, msr_info))
+ return 1;
+ rdmsrl(MSR_IA32_U_CET, msr_info->data);
+ break;
+ case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP:
+ if (check_cet_msr(vcpu, msr_info))
+ return 1;
+ rdmsrl(msr_info->index, msr_info->data);
+ break;
case MSR_TSC_AUX:
if (!msr_info->host_initiated &&
!guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP))
@@ -2039,6 +2102,26 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct
msr_data *msr_info)
else
vmx->pt_desc.guest.addr_a[index / 2] = data;
break;
+ case MSR_IA32_S_CET:
+ if (check_cet_msr(vcpu, msr_info))
+ return 1;
+ vmcs_writel(GUEST_S_CET, data);
+ break;
+ case MSR_IA32_INT_SSP_TAB:
+ if (check_cet_msr(vcpu, msr_info))
+ return 1;
+ vmcs_writel(GUEST_INTR_SSP_TABLE, data);
+ break;
+ case MSR_IA32_U_CET:
+ if (check_cet_msr(vcpu, msr_info))
+ return 1;
+ wrmsrl(MSR_IA32_U_CET, data);
+ break;
+ case MSR_IA32_PL0_SSP ... MSR_IA32_PL3_SSP:
+ if (check_cet_msr(vcpu, msr_info))
+ return 1;
+ wrmsrl(msr_info->index, data);
+ break;
case MSR_TSC_AUX:
if (!msr_info->host_initiated &&
!guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP))
--
2.17.2
[PATCH v7 3/7] KVM: VMX: Pass through CET related MSRs to Guest
CET MSRs pass through Guest directly to enhance performance.
CET runtime control settings are stored in MSR_IA32_{U,S}_CET,
Shadow Stack Pointer(SSP) are stored in MSR_IA32_PL{0,1,2,3}_SSP,
SSP table base address is stored in MSR_IA32_INT_SSP_TAB,
these MSRs are defined in kernel and re-used here.
MSR_IA32_U_CET and MSR_IA32_PL3_SSP are used for user mode protection,
the contents could differ from process to process, therefore,
kernel needs to save/restore them during context switch, it makes
sense to pass through them so that the guest kernel can
use xsaves/xrstors to operate them efficiently. Other MSRs are used
for non-user mode protection. See CET spec for detailed info.
The difference between CET VMCS state fields and xsave components is that,
the former used for CET state storage during VMEnter/VMExit,
whereas the latter used for state retention between Guest task/process
switch.
Co-developed-by: Zhang Yi Z
Signed-off-by: Zhang Yi Z
Signed-off-by: Yang Weijiang
---
arch/x86/kvm/cpuid.c | 1 +
arch/x86/kvm/cpuid.h | 2 ++
arch/x86/kvm/vmx/vmx.c | 39 +++
3 files changed, 42 insertions(+)
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 1aa86b87b6ab..0a47b9e565be 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -66,6 +66,7 @@ u64 kvm_supported_xss(void)
{
return KVM_SUPPORTED_XSS & kvm_x86_ops->supported_xss();
}
+EXPORT_SYMBOL_GPL(kvm_supported_xss);
#define F(x) bit(X86_FEATURE_##x)
diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index d78a61408243..1d77b880084d 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -27,6 +27,8 @@ bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu);
+u64 kvm_supported_xss(void);
+
static inline int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
{
return vcpu->arch.maxphyaddr;
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index a84198cff397..f720baa7a9ba 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -7001,6 +7001,43 @@ static void update_intel_pt_cfg(struct kvm_vcpu *vcpu)
vmx->pt_desc.ctl_bitmask &= ~(0xfULL << (32 + i * 4));
}
+static void vmx_intercept_cet_msrs(struct kvm_vcpu *vcpu)
+{
+ struct vcpu_vmx *vmx = to_vmx(vcpu);
+ unsigned long *msr_bitmap;
+ u64 kvm_xss;
+ bool cet_en;
+
+ msr_bitmap = vmx->vmcs01.msr_bitmap;
+ kvm_xss = kvm_supported_xss();
+ cet_en = guest_cpuid_has(vcpu, X86_FEATURE_SHSTK) ||
+guest_cpuid_has(vcpu, X86_FEATURE_IBT);
+
+ /*
+* U_CET is a must for USER CET, per CET spec., U_CET and PL3_SPP are
+* a bundle for USER CET xsaves.
+*/
+ if (cet_en && (kvm_xss & XFEATURE_MASK_CET_USER)) {
+ vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_U_CET,
MSR_TYPE_RW);
+ vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_PL3_SSP,
MSR_TYPE_RW);
+ }
+ /*
+* S_CET is a must for KERNEL CET, PL0_SSP ... PL2_SSP are a bundle
+* for CET KERNEL xsaves.
+*/
+ if (cet_en && (kvm_xss & XFEATURE_MASK_CET_KERNEL)) {
+ vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_S_CET,
MSR_TYPE_RW);
+ vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_PL0_SSP,
MSR_TYPE_RW);
+ vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_PL1_SSP,
MSR_TYPE_RW);
+ vmx_disable_intercept_for_msr(msr_bitmap, MSR_IA32_PL2_SSP,
MSR_TYPE_RW);
+
+ /* SSP_TAB only available for KERNEL SHSTK.*/
+ if (guest_cpuid_has(vcpu, X86_FEATURE_SHSTK))
+ vmx_disable_intercept_for_msr(msr_bitmap,
MSR_IA32_INT_SSP_TAB,
+ MSR_TYPE_RW);
+ }
+}
+
static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
{
struct vcpu_vmx *vmx = to_vmx(vcpu);
@@ -7025,6 +7062,8 @@ static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
if (boot_cpu_has(X86_FEATURE_INTEL_PT) &&
guest_cpuid_has(vcpu, X86_FEATURE_INTEL_PT))
update_intel_pt_cfg(vcpu);
+
+ vmx_intercept_cet_msrs(vcpu);
}
static void vmx_set_supported_cpuid(u32 func, struct kvm_cpuid_entry2 *entry)
--
2.17.2
[PATCH v7 6/7] KVM: x86: Load Guest fpu state when accessing MSRs managed by XSAVES
From: Sean Christopherson
A handful of CET MSRs are not context switched through "traditional"
methods, e.g. VMCS or manual switching, but rather are passed through
to the guest and are saved and restored by XSAVES/XRSTORS, i.e. the
guest's FPU state.
Load the guest's FPU state if userspace is accessing MSRs whose values
are managed by XSAVES so that the MSR helper, e.g. vmx_{get,set}_msr(),
can simply do {RD,WR}MSR to access the guest's value.
Note that guest_cpuid_has() is not queried as host userspace is allowed
to access MSRs that have not been exposed to the guest, e.g. it might do
KVM_SET_MSRS prior to KVM_SET_CPUID2.
Signed-off-by: Sean Christopherson
Co-developed-by: Yang Weijiang
Signed-off-by: Yang Weijiang
---
arch/x86/kvm/x86.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 290c3c3efb87..5b8116028a59 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -104,6 +104,8 @@ static void enter_smm(struct kvm_vcpu *vcpu);
static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
static void store_regs(struct kvm_vcpu *vcpu);
static int sync_regs(struct kvm_vcpu *vcpu);
+static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu);
+static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu);
struct kvm_x86_ops *kvm_x86_ops __read_mostly;
EXPORT_SYMBOL_GPL(kvm_x86_ops);
@@ -2999,6 +3001,12 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct
msr_data *msr_info)
}
EXPORT_SYMBOL_GPL(kvm_get_msr_common);
+static bool is_xsaves_msr(u32 index)
+{
+ return index == MSR_IA32_U_CET ||
+ (index >= MSR_IA32_PL0_SSP && index <= MSR_IA32_PL3_SSP);
+}
+
/*
* Read or write a bunch of msrs. All parameters are kernel addresses.
*
@@ -3009,11 +3017,23 @@ static int __msr_io(struct kvm_vcpu *vcpu, struct
kvm_msrs *msrs,
int (*do_msr)(struct kvm_vcpu *vcpu,
unsigned index, u64 *data))
{
+ bool fpu_loaded = false;
int i;
+ const u64 cet_bits = XFEATURE_MASK_CET_USER | XFEATURE_MASK_CET_KERNEL;
+ bool cet_xss = kvm_x86_ops->xsaves_supported() &&
+ (kvm_supported_xss() & cet_bits);
- for (i = 0; i < msrs->nmsrs; ++i)
+ for (i = 0; i < msrs->nmsrs; ++i) {
+ if (!fpu_loaded && cet_xss &&
+ is_xsaves_msr(entries[i].index)) {
+ kvm_load_guest_fpu(vcpu);
+ fpu_loaded = true;
+ }
if (do_msr(vcpu, entries[i].index, [i].data))
break;
+ }
+ if (fpu_loaded)
+ kvm_put_guest_fpu(vcpu);
return i;
}
--
2.17.2
[PATCH v7 4/7] KVM: VMX: Load Guest CET via VMCS when CET is enabled in Guest
"Load Guest CET state" bit controls whether Guest CET states
will be loaded at Guest entry. Before doing that, KVM needs
to check if CPU CET feature is enabled on host and available
to Guest.
Note: SHSTK and IBT features share one control MSR:
MSR_IA32_{U,S}_CET, which means it's difficult to hide
one feature from another in the case of SHSTK != IBT,
after discussed in community, it's agreed to allow Guest
control two features independently as it won't introduce
security hole.
Co-developed-by: Zhang Yi Z
Signed-off-by: Zhang Yi Z
Signed-off-by: Yang Weijiang
---
arch/x86/kvm/vmx/vmx.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index f720baa7a9ba..ba1a83d11e69 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -44,6 +44,7 @@
#include
#include
#include
+#include
#include "capabilities.h"
#include "cpuid.h"
@@ -2918,6 +2919,37 @@ void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long
cr3)
vmcs_writel(GUEST_CR3, guest_cr3);
}
+static int set_cet_bit(struct kvm_vcpu *vcpu, unsigned long cr4)
+{
+ struct vcpu_vmx *vmx = to_vmx(vcpu);
+ const u64 cet_bits = XFEATURE_MASK_CET_USER | XFEATURE_MASK_CET_KERNEL;
+ bool cet_xss = vmx_xsaves_supported() &&
+ (kvm_supported_xss() & cet_bits);
+ bool cet_cpuid = guest_cpuid_has(vcpu, X86_FEATURE_SHSTK) ||
+guest_cpuid_has(vcpu, X86_FEATURE_IBT);
+ bool cet_on = !!(cr4 & X86_CR4_CET);
+
+ if (cet_on && vmx->nested.vmxon)
+ return 1;
+
+ if (cet_on && !cpu_x86_cet_enabled())
+ return 1;
+
+ if (cet_on && !cet_xss)
+ return 1;
+
+ if (cet_on && !cet_cpuid)
+ return 1;
+
+ if (cet_on)
+ vmcs_set_bits(VM_ENTRY_CONTROLS,
+ VM_ENTRY_LOAD_GUEST_CET_STATE);
+ else
+ vmcs_clear_bits(VM_ENTRY_CONTROLS,
+ VM_ENTRY_LOAD_GUEST_CET_STATE);
+ return 0;
+}
+
int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
{
struct vcpu_vmx *vmx = to_vmx(vcpu);
@@ -2958,6 +2990,9 @@ int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
return 1;
}
+ if (set_cet_bit(vcpu, cr4))
+ return 1;
+
if (vmx->nested.vmxon && !nested_cr4_valid(vcpu, cr4))
return 1;
--
2.17.2
[PATCH v7 1/7] KVM: CPUID: Fix IA32_XSS support in CPUID(0xd,i) enumeration
The control bits in IA32_XSS MSR are being used for new features,
but current CPUID(0xd,i) enumeration code doesn't support them, so
fix existing code first.
The supervisor states in IA32_XSS haven't been used in public
KVM code, so set KVM_SUPPORTED_XSS to 0 now, anyone who's developing
IA32_XSS related feature may expand the macro to add the CPUID support,
otherwise, CPUID(0xd,i>1) always reports 0 of the subleaf to guest.
Extracted old code into a new filter and keep it same flavor as others.
This patch passed selftest on a few Intel platforms.
Suggested-by: Sean Christopherson
Signed-off-by: Yang Weijiang
---
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/kvm/cpuid.c| 94 +
arch/x86/kvm/svm.c | 7 +++
arch/x86/kvm/vmx/vmx.c | 6 +++
arch/x86/kvm/x86.h | 7 +++
5 files changed, 82 insertions(+), 33 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 74e88e5edd9c..d018df8c5f32 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -1209,6 +1209,7 @@ struct kvm_x86_ops {
uint16_t (*nested_get_evmcs_version)(struct kvm_vcpu *vcpu);
bool (*need_emulation_on_page_fault)(struct kvm_vcpu *vcpu);
+ u64 (*supported_xss)(void);
};
struct kvm_arch_async_pf {
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 22c2720cd948..9d282fec0a62 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -62,6 +62,11 @@ u64 kvm_supported_xcr0(void)
return xcr0;
}
+u64 kvm_supported_xss(void)
+{
+ return KVM_SUPPORTED_XSS & kvm_x86_ops->supported_xss();
+}
+
#define F(x) bit(X86_FEATURE_##x)
int kvm_update_cpuid(struct kvm_vcpu *vcpu)
@@ -414,6 +419,50 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2
*entry, int index)
}
}
+static inline void do_cpuid_0xd_mask(struct kvm_cpuid_entry2 *entry, int index)
+{
+ unsigned int f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
+ /* cpuid 0xD.1.eax */
+ const u32 kvm_cpuid_D_1_eax_x86_features =
+ F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
+ u64 u_supported = kvm_supported_xcr0();
+ u64 s_supported = kvm_supported_xss();
+ u64 supported;
+
+ switch (index) {
+ case 0:
+ entry->eax &= u_supported;
+ entry->ebx = xstate_required_size(u_supported, false);
+ entry->ecx = entry->ebx;
+ entry->edx = 0;
+ break;
+ case 1:
+ supported = u_supported | s_supported;
+ entry->eax &= kvm_cpuid_D_1_eax_x86_features;
+ cpuid_mask(>eax, CPUID_D_1_EAX);
+ entry->ebx = 0;
+ entry->edx = 0;
+ entry->ecx &= s_supported;
+ if (entry->eax & (F(XSAVES) | F(XSAVEC)))
+ entry->ebx = xstate_required_size(supported, true);
+
+ break;
+ default:
+ supported = (entry->ecx & 1) ? s_supported : u_supported;
+ if (!(supported & ((u64)1 << index))) {
+ entry->eax = 0;
+ entry->ebx = 0;
+ entry->ecx = 0;
+ entry->edx = 0;
+ return;
+ }
+ if (entry->ecx)
+ entry->ebx = 0;
+ entry->edx = 0;
+ break;
+ }
+}
+
static inline int __do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 function,
int *nent, int maxnent)
{
@@ -428,7 +477,6 @@ static inline int __do_cpuid_func(struct kvm_cpuid_entry2
*entry, u32 function,
unsigned f_lm = 0;
#endif
unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
- unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
/* cpuid 1.edx */
@@ -482,10 +530,6 @@ static inline int __do_cpuid_func(struct kvm_cpuid_entry2
*entry, u32 function,
F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
F(PMM) | F(PMM_EN);
- /* cpuid 0xD.1.eax */
- const u32 kvm_cpuid_D_1_eax_x86_features =
- F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
-
/* all calls to cpuid_count() should be made on the same cpu */
get_cpu();
@@ -622,38 +666,22 @@ static inline int __do_cpuid_func(struct kvm_cpuid_entry2
*entry, u32 function,
break;
}
case 0xd: {
- int idx, i;
- u64 supported = kvm_supported_xcr0();
-
- entry->eax &= supported;
- entry->ebx = xstate_required_size(supported, false);
- entry->ecx = entry->ebx;
- entry->edx &= supported >> 32;
- if (!supported)
- break;
[PATCH v7 0/7] Introduce support for Guest CET feature
Control-flow Enforcement Technology (CET) provides protection against Return/Jump-Oriented Programming (ROP/JOP) attack. It includes two sub-features: Shadow Stack (SHSTK) and Indirect Branch Tracking (IBT). KVM modification is required to support Guest CET feature. This patch serial implemented CET related CPUID/XSAVES enumeration, MSRs and VMEntry configuration etc.so that Guest kernel can setup CET runtime infrastructure based on them. Some MSRs and related feature flags used in the patches reference the definitions in kernel patch. CET kernel patches is here: https://lkml.org/lkml/2019/8/13/1110 https://lkml.org/lkml/2019/8/13/1109 v6 -> v7: - Rebased patch to kernel v5.3 - Sean suggested to change CPUID(0xd, n) enumeration code as alined with existing one, and I think it's better to make the fix as an independent patch since XSS MSR are being used widely on X86 platforms. - Check more host and guest status before configure guest CET per Sean's feedback. - Add error-check before guest accesses CET MSRs per Sean's feedback. - Other minor fixes suggested by Sean. v5 -> v6: - Rebase patch to kernel v5.2. - Move CPUID(0xD, n>=1) helper to a seperate patch. - Merge xsave size fix with other patch. - Other minor fixes per community feedback. v4 -> v5: - Rebase patch to kernel v5.1. - Wrap CPUID(0xD, n>=1) code to a helper function. - Pass through MSR_IA32_PL1_SSP and MSR_IA32_PL2_SSP to Guest. - Add Co-developed-by expression in patch description. - Refine patch description. v3 -> v4: - Add Sean's patch for loading Guest fpu state before access XSAVES managed CET MSRs. - Melt down CET bits setting into CPUID configuration patch. - Add VMX interface to query Host XSS. - Check Host and Guest XSS support bits before set Guest XSS. - Make Guest SHSTK and IBT feature enabling independent. - Do not report CET support to Guest when Host CET feature is Disabled. v2 -> v3: - Modified patches to make Guest CET independent to Host enabling. - Added patch 8 to add user space access for Guest CET MSR access. - Modified code comments and patch description to reflect changes. v1 -> v2: - Re-ordered patch sequence, combined one patch. - Added more description for CET related VMCS fields. - Added Host CET capability check while enabling Guest CET loading bit. - Added Host CET capability check while reporting Guest CPUID(EAX=7, EXC=0). - Modified code in reporting Guest CPUID(EAX=D,ECX>=1), make it clearer. - Added Host and Guest XSS mask check while setting bits for Guest XSS. PATCH 1: Fix CPUID(0xD, n) enumeration to support XSS MSR. PATCH 2: Define CET VMCS fields and bits. PATCH 3: Pass through CET MSRs to Guest. PATCH 4: Load Guest CET states when CET is enabled. PATCH 5: Add CET CR4 bit and CET xsaves support in XSS MSR. PATCH 6: Load Guest FPU states for XSAVES managed MSRs. PATCH 7: Add user-space CET MSR access interface. Sean Christopherson (1): KVM: x86: Load Guest fpu state when accessing MSRs managed by XSAVES Yang Weijiang (6): KVM: CPUID: Fix IA32_XSS support in CPUID(0xd,i) enumeration KVM: VMX: Define CET VMCS fields and CPUID flags KVM: VMX: Pass through CET related MSRs to Guest KVM: VMX: Load Guest CET via VMCS when CET is enabled in Guest KVM: X86: Add CET CR4 bit and XSS support KVM: X86: Add user-space access interface for CET MSRs arch/x86/include/asm/kvm_host.h | 5 +- arch/x86/include/asm/vmx.h | 8 ++ arch/x86/kvm/cpuid.c| 110 ++--- arch/x86/kvm/cpuid.h| 2 + arch/x86/kvm/svm.c | 7 ++ arch/x86/kvm/vmx/vmx.c | 169 +++- arch/x86/kvm/x86.c | 22 - arch/x86/kvm/x86.h | 8 ++ 8 files changed, 287 insertions(+), 44 deletions(-) -- 2.17.2
[PATCH v7 2/7] kvm: vmx: Define CET VMCS fields and CPUID flags
CET(Control-flow Enforcement Technology) is an upcoming Intel(R)
processor feature that blocks Return/Jump-Oriented Programming(ROP)
attacks. It provides the following capabilities to defend
against ROP/JOP style control-flow subversion attacks:
Shadow Stack (SHSTK):
A second stack for program which is used exclusively for
control transfer operations.
Indirect Branch Tracking (IBT):
Code branching protection to defend against jump/call oriented
programming.
Several new CET MSRs are defined in kernel to support CET:
MSR_IA32_{U,S}_CET: Controls the CET settings for user
mode and suervisor mode respectively.
MSR_IA32_PL{0,1,2,3}_SSP: Stores shadow stack pointers for
CPL-0,1,2,3 level respectively.
MSR_IA32_INT_SSP_TAB: Stores base address of shadow stack
pointer table.
Two XSAVES state bits are introduced for CET:
IA32_XSS:[bit 11]: For saving/restoring user mode CET states
IA32_XSS:[bit 12]: For saving/restoring supervisor mode CET states.
Six VMCS fields are introduced for CET:
{HOST,GUEST}_S_CET: Stores CET settings for supervisor mode.
{HOST,GUEST}_SSP: Stores shadow stack pointer for supervisor mode.
{HOST,GUEST}_INTR_SSP_TABLE: Stores base address of shadow stack pointer
table.
If VM_EXIT_LOAD_HOST_CET_STATE = 1, the host's CET MSRs are restored
from below VMCS fields at VM-Exit:
HOST_S_CET
HOST_SSP
HOST_INTR_SSP_TABLE
If VM_ENTRY_LOAD_GUEST_CET_STATE = 1, the guest's CET MSRs are loaded
from below VMCS fields at VM-Entry:
GUEST_S_CET
GUEST_SSP
GUEST_INTR_SSP_TABLE
Co-developed-by: Zhang Yi Z
Signed-off-by: Zhang Yi Z
Signed-off-by: Yang Weijiang
---
arch/x86/include/asm/vmx.h | 8
arch/x86/kvm/cpuid.c | 4 ++--
arch/x86/kvm/x86.h | 3 ++-
3 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index a39136b0d509..68bca290a203 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -90,6 +90,7 @@
#define VM_EXIT_CLEAR_BNDCFGS 0x0080
#define VM_EXIT_PT_CONCEAL_PIP 0x0100
#define VM_EXIT_CLEAR_IA32_RTIT_CTL0x0200
+#define VM_EXIT_LOAD_HOST_CET_STATE 0x1000
#define VM_EXIT_ALWAYSON_WITHOUT_TRUE_MSR 0x00036dff
@@ -103,6 +104,7 @@
#define VM_ENTRY_LOAD_BNDCFGS 0x0001
#define VM_ENTRY_PT_CONCEAL_PIP0x0002
#define VM_ENTRY_LOAD_IA32_RTIT_CTL0x0004
+#define VM_ENTRY_LOAD_GUEST_CET_STATE 0x0010
#define VM_ENTRY_ALWAYSON_WITHOUT_TRUE_MSR 0x11ff
@@ -321,6 +323,9 @@ enum vmcs_field {
GUEST_PENDING_DBG_EXCEPTIONS= 0x6822,
GUEST_SYSENTER_ESP = 0x6824,
GUEST_SYSENTER_EIP = 0x6826,
+ GUEST_S_CET = 0x6828,
+ GUEST_SSP = 0x682a,
+ GUEST_INTR_SSP_TABLE= 0x682c,
HOST_CR0= 0x6c00,
HOST_CR3= 0x6c02,
HOST_CR4= 0x6c04,
@@ -333,6 +338,9 @@ enum vmcs_field {
HOST_IA32_SYSENTER_EIP = 0x6c12,
HOST_RSP= 0x6c14,
HOST_RIP= 0x6c16,
+ HOST_S_CET = 0x6c18,
+ HOST_SSP= 0x6c1a,
+ HOST_INTR_SSP_TABLE = 0x6c1c
};
/*
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 9d282fec0a62..1aa86b87b6ab 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -365,13 +365,13 @@ static inline void do_cpuid_7_mask(struct
kvm_cpuid_entry2 *entry, int index)
F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ |
F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) |
F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) |
- F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B);
+ F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B) | F(SHSTK);
/* cpuid 7.0.edx*/
const u32 kvm_cpuid_7_0_edx_x86_features =
F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
- F(MD_CLEAR);
+ F(MD_CLEAR) | F(IBT);
/* cpuid 7.1.eax */
const u32 kvm_cpuid_7_1_eax_x86_features =
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index fbffabad0370..a85800b23e6e 100644
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -298,7 +298,8 @@ int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned
long cr2,
* Right now, no XSS states are used on x86 platform,
* expand the macro for new features.
*/
-#define KVM_SUPPORTED_XSS (0)
+#define KVM_SUPPORTED_XSS
[PATCH v7 5/7] kvm: x86: Add CET CR4 bit and XSS support
CR4.CET(bit 23) is master enable bit for CET feature.
Previously, KVM did not support setting any bits in XSS
so it's hardcoded to check and inject a #GP if Guest
attempted to write a non-zero value to XSS, now it supports
CET related bits setting.
Co-developed-by: Zhang Yi Z
Signed-off-by: Zhang Yi Z
Signed-off-by: Yang Weijiang
---
arch/x86/include/asm/kvm_host.h | 4 +++-
arch/x86/kvm/cpuid.c| 11 +--
arch/x86/kvm/vmx/vmx.c | 6 +-
3 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index d018df8c5f32..8f97269d6d9f 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -90,7 +90,8 @@
| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR |
X86_CR4_PCIDE \
| X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
| X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
- | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
+ | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP \
+ | X86_CR4_CET))
#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
@@ -623,6 +624,7 @@ struct kvm_vcpu_arch {
u64 xcr0;
u64 guest_supported_xcr0;
+ u64 guest_supported_xss;
u32 guest_xstate_size;
struct kvm_pio_request pio;
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 0a47b9e565be..dd3ddc6daa58 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -120,8 +120,15 @@ int kvm_update_cpuid(struct kvm_vcpu *vcpu)
}
best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
- if (best && (best->eax & (F(XSAVES) | F(XSAVEC
- best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
+ if (best && (best->eax & (F(XSAVES) | F(XSAVEC {
+ u64 kvm_xss = kvm_supported_xss();
+
+ best->ebx =
+ xstate_required_size(vcpu->arch.xcr0 | kvm_xss, true);
+ vcpu->arch.guest_supported_xss = best->ecx & kvm_xss;
+ } else {
+ vcpu->arch.guest_supported_xss = 0;
+ }
/*
* The existing code assumes virtual address is 48-bit or 57-bit in the
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index ba1a83d11e69..44913e4ab558 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -1973,11 +1973,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct
msr_data *msr_info)
!(guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
guest_cpuid_has(vcpu, X86_FEATURE_XSAVES
return 1;
- /*
-* The only supported bit as of Skylake is bit 8, but
-* it is not supported on KVM.
-*/
- if (data != 0)
+ if (data & ~vcpu->arch.guest_supported_xss)
return 1;
vcpu->arch.ia32_xss = data;
if (vcpu->arch.ia32_xss != host_xss)
--
2.17.2
RE: [PATCH v5 11/15] dmaengine: imx-sdma: fix ecspi1 rx dma not work on i.mx8mm
On 2019-9-25 22:53 Schrempf Frieder wrote: > On 25.09.19 13:26, Robin Gong wrote: > > On 2019-9-24 21:28 Schrempf Frieder > wrote: > >> > >> Hi Robin, > >> > >>> From: Robin Gong > >>> > >>> Because the number of ecspi1 rx event on i.mx8mm is 0, the condition > >>> check ignore such special case without dma channel enabled, which > >>> caused > >>> ecspi1 rx works failed. Actually, no need to check > >>> event_id0/event_id1 and replace checking 'event_id1' with > >>> 'DMA_DEV_TO_DEV', so that configure > >>> event_id1 only in case DEV_TO_DEV. > >>> > >>> Signed-off-by: Robin Gong > >>> Acked-by: Vinod Koul > >> > >> I have a custom board with i.MX8MM and SPI flash on ecspi1. I'm > >> currently testing with v5.3 and as SPI didn't work, I tried two different > things: > >> > >> 1. Removing 'dmas' and 'dma-names' from the ecspi1 node in > imx8mm.dtsi, > >> to use PIO instead of DMA. This works as expected and the driver > >> boots with the following messages: > >> > >> spi_imx 3082.spi: dma setup error -19, use pio > >> m25p80 spi0.0: mx25v8035f (1024 Kbytes) > >> spi_imx 3082.spi: probed > >> > >> 2. Applying your patchset and use DMA. In this case, the flash also > >> works fine, but there are some error messages printed while > booting: > >> > >> spi_master spi0: I/O Error in DMA RX > >> m25p80 spi0.0: SPI transfer failed: -110 > >> spi_master spi0: failed to transfer one message from queue > >> m25p80 spi0.0: mx25v8035f (1024 Kbytes) > >> spi_imx 3082.spi: probed > >> > >> It would be great to get your patches merged and fix SPI + DMA, but > >> for i.MX8MM, we need to get rid of the error messages. Do you have an > >> idea, what's wrong? > > > Could you check if the length of spi message is bigger than fifo_size > > during spi_nor probe? If yes, at that time maybe sdma firmware not loaded. > > if (transfer->len < spi_imx->devtype_data->fifo_size) > > Indeed, most of the transfers triggered by the SPI NOR dirver are below > fifo_size and work fine, but some are bigger. The transfers therefore try to > use DMA, but the firmware is not loaded yet. > > How is this supposed to work? Shouldn't all transfers use PIO as long as the > SDMA firmware is not loaded yet? Yes, for ecspi should work with ram script, it's better check if sdma firmware is ready in spi_imx_dma_configure(), need modification in sdma driver too. I'll create another patch after this patch set accepted. > > (+ Cc: linux-...@vger.kernel.org)
Re: [PATCH V6 4/4] ASoC: fsl_asrc: Fix error with S24_3LE format bitstream in i.MX8
On Fri, Sep 27, 2019 at 09:46:12AM +0800, Shengjiu Wang wrote:
> There is error "aplay: pcm_write:2023: write error: Input/output error"
> on i.MX8QM/i.MX8QXP platform for S24_3LE format.
>
> In i.MX8QM/i.MX8QXP, the DMA is EDMA, which don't support 24bit
> sample, but we didn't add any constraint, that cause issues.
>
> So we need to query the caps of dma, then update the hw parameters
> according to the caps.
>
> Signed-off-by: Shengjiu Wang
Acked-by: Nicolin Chen
> ---
> sound/soc/fsl/fsl_asrc.c | 4 +--
> sound/soc/fsl/fsl_asrc.h | 3 ++
> sound/soc/fsl/fsl_asrc_dma.c | 64
> 3 files changed, 62 insertions(+), 9 deletions(-)
>
> diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c
> index 584badf956d2..0bf91a6f54b9 100644
> --- a/sound/soc/fsl/fsl_asrc.c
> +++ b/sound/soc/fsl/fsl_asrc.c
> @@ -115,7 +115,7 @@ static void fsl_asrc_sel_proc(int inrate, int outrate,
> * within range [ANCA, ANCA+ANCB-1], depends on the channels of pair A
> * while pair A and pair C are comparatively independent.
> */
> -static int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair)
> +int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair)
> {
> enum asrc_pair_index index = ASRC_INVALID_PAIR;
> struct fsl_asrc *asrc_priv = pair->asrc_priv;
> @@ -158,7 +158,7 @@ static int fsl_asrc_request_pair(int channels, struct
> fsl_asrc_pair *pair)
> *
> * It clears the resource from asrc_priv and releases the occupied channels.
> */
> -static void fsl_asrc_release_pair(struct fsl_asrc_pair *pair)
> +void fsl_asrc_release_pair(struct fsl_asrc_pair *pair)
> {
> struct fsl_asrc *asrc_priv = pair->asrc_priv;
> enum asrc_pair_index index = pair->index;
> diff --git a/sound/soc/fsl/fsl_asrc.h b/sound/soc/fsl/fsl_asrc.h
> index 38af485bdd22..2b57e8c53728 100644
> --- a/sound/soc/fsl/fsl_asrc.h
> +++ b/sound/soc/fsl/fsl_asrc.h
> @@ -462,4 +462,7 @@ struct fsl_asrc {
> #define DRV_NAME "fsl-asrc-dai"
> extern struct snd_soc_component_driver fsl_asrc_component;
> struct dma_chan *fsl_asrc_get_dma_channel(struct fsl_asrc_pair *pair, bool
> dir);
> +int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair);
> +void fsl_asrc_release_pair(struct fsl_asrc_pair *pair);
> +
> #endif /* _FSL_ASRC_H */
> diff --git a/sound/soc/fsl/fsl_asrc_dma.c b/sound/soc/fsl/fsl_asrc_dma.c
> index 01052a0808b0..2a60fc6142b1 100644
> --- a/sound/soc/fsl/fsl_asrc_dma.c
> +++ b/sound/soc/fsl/fsl_asrc_dma.c
> @@ -16,13 +16,11 @@
>
> #define FSL_ASRC_DMABUF_SIZE (256 * 1024)
>
> -static const struct snd_pcm_hardware snd_imx_hardware = {
> +static struct snd_pcm_hardware snd_imx_hardware = {
> .info = SNDRV_PCM_INFO_INTERLEAVED |
> SNDRV_PCM_INFO_BLOCK_TRANSFER |
> SNDRV_PCM_INFO_MMAP |
> - SNDRV_PCM_INFO_MMAP_VALID |
> - SNDRV_PCM_INFO_PAUSE |
> - SNDRV_PCM_INFO_RESUME,
> + SNDRV_PCM_INFO_MMAP_VALID,
> .buffer_bytes_max = FSL_ASRC_DMABUF_SIZE,
> .period_bytes_min = 128,
> .period_bytes_max = 65535, /* Limited by SDMA engine */
> @@ -270,12 +268,25 @@ static int fsl_asrc_dma_hw_free(struct
> snd_pcm_substream *substream)
>
> static int fsl_asrc_dma_startup(struct snd_pcm_substream *substream)
> {
> + bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
> struct snd_soc_pcm_runtime *rtd = substream->private_data;
> struct snd_pcm_runtime *runtime = substream->runtime;
> struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd,
> DRV_NAME);
> + struct snd_dmaengine_dai_dma_data *dma_data;
> struct device *dev = component->dev;
> struct fsl_asrc *asrc_priv = dev_get_drvdata(dev);
> struct fsl_asrc_pair *pair;
> + struct dma_chan *tmp_chan = NULL;
> + u8 dir = tx ? OUT : IN;
> + bool release_pair = true;
> + int ret = 0;
> +
> + ret = snd_pcm_hw_constraint_integer(substream->runtime,
> + SNDRV_PCM_HW_PARAM_PERIODS);
> + if (ret < 0) {
> + dev_err(dev, "failed to set pcm hw params periods\n");
> + return ret;
> + }
>
> pair = kzalloc(sizeof(struct fsl_asrc_pair), GFP_KERNEL);
> if (!pair)
> @@ -285,11 +296,50 @@ static int fsl_asrc_dma_startup(struct
> snd_pcm_substream *substream)
>
> runtime->private_data = pair;
>
> - snd_pcm_hw_constraint_integer(substream->runtime,
> - SNDRV_PCM_HW_PARAM_PERIODS);
> + /* Request a dummy pair, which will be released later.
> + * Request pair function needs channel num as input, for this
> + * dummy pair, we just request "1" channel temporarily.
> + */
> + ret = fsl_asrc_request_pair(1, pair);
> + if (ret < 0) {
> + dev_err(dev, "failed to request asrc pair\n");
> + goto req_pair_err;
> + }
> +
> + /* Request a dummy dma
[PATCH v3] nfp: abm: fix memory leak in nfp_abm_u32_knode_replace
In nfp_abm_u32_knode_replace if the allocation for match fails it should
go to the error handling instead of returning. Updated other gotos to
have correct errno returned, too.
Signed-off-by: Navid Emamdoost
---
Changes in v2:
- Reused err variable for erorr value returning.
Changes in v3:
- Fix the err value in the first goto, and fix subject prefix.
---
drivers/net/ethernet/netronome/nfp/abm/cls.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/netronome/nfp/abm/cls.c
b/drivers/net/ethernet/netronome/nfp/abm/cls.c
index 23ebddfb9532..9f8a1f69c0c4 100644
--- a/drivers/net/ethernet/netronome/nfp/abm/cls.c
+++ b/drivers/net/ethernet/netronome/nfp/abm/cls.c
@@ -176,8 +176,10 @@ nfp_abm_u32_knode_replace(struct nfp_abm_link *alink,
u8 mask, val;
int err;
- if (!nfp_abm_u32_check_knode(alink->abm, knode, proto, extack))
+ if (!nfp_abm_u32_check_knode(alink->abm, knode, proto, extack)) {
+ err = -EOPNOTSUPP;
goto err_delete;
+ }
tos_off = proto == htons(ETH_P_IP) ? 16 : 20;
@@ -198,14 +200,18 @@ nfp_abm_u32_knode_replace(struct nfp_abm_link *alink,
if ((iter->val & cmask) == (val & cmask) &&
iter->band != knode->res->classid) {
NL_SET_ERR_MSG_MOD(extack, "conflict with already
offloaded filter");
+ err = -EOPNOTSUPP;
goto err_delete;
}
}
if (!match) {
match = kzalloc(sizeof(*match), GFP_KERNEL);
- if (!match)
- return -ENOMEM;
+ if (!match) {
+ err = -ENOMEM;
+ goto err_delete;
+ }
+
list_add(>list, >dscp_map);
}
match->handle = knode->handle;
@@ -221,7 +227,7 @@ nfp_abm_u32_knode_replace(struct nfp_abm_link *alink,
err_delete:
nfp_abm_u32_knode_delete(alink, knode);
- return -EOPNOTSUPP;
+ return err;
}
static int nfp_abm_setup_tc_block_cb(enum tc_setup_type type,
--
2.17.1
[PATCH V6 0/4] update supported sample format
This patch serial is to update the supported format for fsl_asrc and fix some format issue Shengjiu Wang (4): ASoC: fsl_asrc: Use in(out)put_format instead of in(out)put_word_width ASoC: fsl_asrc: update supported sample format ASoC: pcm_dmaengine: Extract snd_dmaengine_pcm_refine_runtime_hwparams ASoC: fsl_asrc: Fix error with S24_3LE format bitstream in i.MX8 changes in v2 - extract snd_dmaengine_pcm_set_runtime_hwparams in one separate path. - 4th patch depends on 3rd patch changes in v3 - Fix build report by kbuild test robot - change snd_dmaengine_pcm_set_runtime_hwparams to snd_dmaengine_pcm_refine_runtime_hwparams changes in v4 - update according to Nicolin's comments. changes in v5 - free asrc pair when error happens in patch 4/4 changes in v6 - ignore return value of snd_soc_set_runtime_hwparams in patch 4/4 include/sound/dmaengine_pcm.h | 5 ++ sound/core/pcm_dmaengine.c| 83 +++ sound/soc/fsl/fsl_asrc.c | 65 ++--- sound/soc/fsl/fsl_asrc.h | 7 ++- sound/soc/fsl/fsl_asrc_dma.c | 64 ++--- sound/soc/soc-generic-dmaengine-pcm.c | 61 ++-- 6 files changed, 199 insertions(+), 86 deletions(-) -- 2.21.0
[PATCH V6 3/4] ASoC: pcm_dmaengine: Extract snd_dmaengine_pcm_refine_runtime_hwparams
When set the runtime hardware parameters, we may need to query
the capability of DMA to complete the parameters.
This patch is to Extract this operation from
dmaengine_pcm_set_runtime_hwparams function to a separate function
snd_dmaengine_pcm_refine_runtime_hwparams, that other components
which need this feature can call this function.
Signed-off-by: Shengjiu Wang
Reviewed-by: Nicolin Chen
---
include/sound/dmaengine_pcm.h | 5 ++
sound/core/pcm_dmaengine.c| 83 +++
sound/soc/soc-generic-dmaengine-pcm.c | 61 ++--
3 files changed, 94 insertions(+), 55 deletions(-)
diff --git a/include/sound/dmaengine_pcm.h b/include/sound/dmaengine_pcm.h
index c679f6116580..b65220685920 100644
--- a/include/sound/dmaengine_pcm.h
+++ b/include/sound/dmaengine_pcm.h
@@ -83,6 +83,11 @@ void snd_dmaengine_pcm_set_config_from_dai_data(
const struct snd_dmaengine_dai_dma_data *dma_data,
struct dma_slave_config *config);
+int snd_dmaengine_pcm_refine_runtime_hwparams(
+ struct snd_pcm_substream *substream,
+ struct snd_dmaengine_dai_dma_data *dma_data,
+ struct snd_pcm_hardware *hw,
+ struct dma_chan *chan);
/*
* Try to request the DMA channel using compat_request_channel or
diff --git a/sound/core/pcm_dmaengine.c b/sound/core/pcm_dmaengine.c
index 89a05926ac73..5749a8a49784 100644
--- a/sound/core/pcm_dmaengine.c
+++ b/sound/core/pcm_dmaengine.c
@@ -369,4 +369,87 @@ int snd_dmaengine_pcm_close_release_chan(struct
snd_pcm_substream *substream)
}
EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_close_release_chan);
+/**
+ * snd_dmaengine_pcm_refine_runtime_hwparams - Refine runtime hw params
+ * @substream: PCM substream
+ * @dma_data: DAI DMA data
+ * @hw: PCM hw params
+ * @chan: DMA channel to use for data transfers
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ *
+ * This function will query DMA capability, then refine the pcm hardware
+ * parameters.
+ */
+int snd_dmaengine_pcm_refine_runtime_hwparams(
+ struct snd_pcm_substream *substream,
+ struct snd_dmaengine_dai_dma_data *dma_data,
+ struct snd_pcm_hardware *hw,
+ struct dma_chan *chan)
+{
+ struct dma_slave_caps dma_caps;
+ u32 addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
+ BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
+ BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
+ snd_pcm_format_t i;
+ int ret = 0;
+
+ if (!hw || !chan || !dma_data)
+ return -EINVAL;
+
+ ret = dma_get_slave_caps(chan, _caps);
+ if (ret == 0) {
+ if (dma_caps.cmd_pause && dma_caps.cmd_resume)
+ hw->info |= SNDRV_PCM_INFO_PAUSE |
SNDRV_PCM_INFO_RESUME;
+ if (dma_caps.residue_granularity <=
DMA_RESIDUE_GRANULARITY_SEGMENT)
+ hw->info |= SNDRV_PCM_INFO_BATCH;
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ addr_widths = dma_caps.dst_addr_widths;
+ else
+ addr_widths = dma_caps.src_addr_widths;
+ }
+
+ /*
+* If SND_DMAENGINE_PCM_DAI_FLAG_PACK is set keep
+* hw.formats set to 0, meaning no restrictions are in place.
+* In this case it's the responsibility of the DAI driver to
+* provide the supported format information.
+*/
+ if (!(dma_data->flags & SND_DMAENGINE_PCM_DAI_FLAG_PACK))
+ /*
+* Prepare formats mask for valid/allowed sample types. If the
+* dma does not have support for the given physical word size,
+* it needs to be masked out so user space can not use the
+* format which produces corrupted audio.
+* In case the dma driver does not implement the slave_caps the
+* default assumption is that it supports 1, 2 and 4 bytes
+* widths.
+*/
+ for (i = SNDRV_PCM_FORMAT_FIRST; i <= SNDRV_PCM_FORMAT_LAST;
i++) {
+ int bits = snd_pcm_format_physical_width(i);
+
+ /*
+* Enable only samples with DMA supported physical
+* widths
+*/
+ switch (bits) {
+ case 8:
+ case 16:
+ case 24:
+ case 32:
+ case 64:
+ if (addr_widths & (1 << (bits / 8)))
+ hw->formats |= pcm_format_to_bits(i);
+ break;
+ default:
+ /* Unsupported types */
+ break;
+ }
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_refine_runtime_hwparams);
+
MODULE_LICENSE("GPL");
diff
[PATCH V6 2/4] ASoC: fsl_asrc: update supported sample format
The ASRC support 24bit/16bit/8bit input width, which is
data width, not slot width.
For the S20_3LE format, the data with is 20bit, slot width
is 24bit, if we set ASRMCR1n.IWD to be 24bits, the result
is the volume is lower than expected, it likes 24bit data
right shift 4 bits
So replace S20_3LE with S24_3LE in supported list and add S8
format in TX supported list
Signed-off-by: Shengjiu Wang
Acked-by: Nicolin Chen
---
sound/soc/fsl/fsl_asrc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c
index 4d3804a1ea55..584badf956d2 100644
--- a/sound/soc/fsl/fsl_asrc.c
+++ b/sound/soc/fsl/fsl_asrc.c
@@ -624,7 +624,7 @@ static int fsl_asrc_dai_probe(struct snd_soc_dai *dai)
#define FSL_ASRC_FORMATS (SNDRV_PCM_FMTBIT_S24_LE | \
SNDRV_PCM_FMTBIT_S16_LE | \
-SNDRV_PCM_FMTBIT_S20_3LE)
+SNDRV_PCM_FMTBIT_S24_3LE)
static struct snd_soc_dai_driver fsl_asrc_dai = {
.probe = fsl_asrc_dai_probe,
@@ -635,7 +635,8 @@ static struct snd_soc_dai_driver fsl_asrc_dai = {
.rate_min = 5512,
.rate_max = 192000,
.rates = SNDRV_PCM_RATE_KNOT,
- .formats = FSL_ASRC_FORMATS,
+ .formats = FSL_ASRC_FORMATS |
+ SNDRV_PCM_FMTBIT_S8,
},
.capture = {
.stream_name = "ASRC-Capture",
--
2.21.0
[PATCH V6 4/4] ASoC: fsl_asrc: Fix error with S24_3LE format bitstream in i.MX8
There is error "aplay: pcm_write:2023: write error: Input/output error"
on i.MX8QM/i.MX8QXP platform for S24_3LE format.
In i.MX8QM/i.MX8QXP, the DMA is EDMA, which don't support 24bit
sample, but we didn't add any constraint, that cause issues.
So we need to query the caps of dma, then update the hw parameters
according to the caps.
Signed-off-by: Shengjiu Wang
---
sound/soc/fsl/fsl_asrc.c | 4 +--
sound/soc/fsl/fsl_asrc.h | 3 ++
sound/soc/fsl/fsl_asrc_dma.c | 64
3 files changed, 62 insertions(+), 9 deletions(-)
diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c
index 584badf956d2..0bf91a6f54b9 100644
--- a/sound/soc/fsl/fsl_asrc.c
+++ b/sound/soc/fsl/fsl_asrc.c
@@ -115,7 +115,7 @@ static void fsl_asrc_sel_proc(int inrate, int outrate,
* within range [ANCA, ANCA+ANCB-1], depends on the channels of pair A
* while pair A and pair C are comparatively independent.
*/
-static int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair)
+int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair)
{
enum asrc_pair_index index = ASRC_INVALID_PAIR;
struct fsl_asrc *asrc_priv = pair->asrc_priv;
@@ -158,7 +158,7 @@ static int fsl_asrc_request_pair(int channels, struct
fsl_asrc_pair *pair)
*
* It clears the resource from asrc_priv and releases the occupied channels.
*/
-static void fsl_asrc_release_pair(struct fsl_asrc_pair *pair)
+void fsl_asrc_release_pair(struct fsl_asrc_pair *pair)
{
struct fsl_asrc *asrc_priv = pair->asrc_priv;
enum asrc_pair_index index = pair->index;
diff --git a/sound/soc/fsl/fsl_asrc.h b/sound/soc/fsl/fsl_asrc.h
index 38af485bdd22..2b57e8c53728 100644
--- a/sound/soc/fsl/fsl_asrc.h
+++ b/sound/soc/fsl/fsl_asrc.h
@@ -462,4 +462,7 @@ struct fsl_asrc {
#define DRV_NAME "fsl-asrc-dai"
extern struct snd_soc_component_driver fsl_asrc_component;
struct dma_chan *fsl_asrc_get_dma_channel(struct fsl_asrc_pair *pair, bool
dir);
+int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair);
+void fsl_asrc_release_pair(struct fsl_asrc_pair *pair);
+
#endif /* _FSL_ASRC_H */
diff --git a/sound/soc/fsl/fsl_asrc_dma.c b/sound/soc/fsl/fsl_asrc_dma.c
index 01052a0808b0..2a60fc6142b1 100644
--- a/sound/soc/fsl/fsl_asrc_dma.c
+++ b/sound/soc/fsl/fsl_asrc_dma.c
@@ -16,13 +16,11 @@
#define FSL_ASRC_DMABUF_SIZE (256 * 1024)
-static const struct snd_pcm_hardware snd_imx_hardware = {
+static struct snd_pcm_hardware snd_imx_hardware = {
.info = SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP |
- SNDRV_PCM_INFO_MMAP_VALID |
- SNDRV_PCM_INFO_PAUSE |
- SNDRV_PCM_INFO_RESUME,
+ SNDRV_PCM_INFO_MMAP_VALID,
.buffer_bytes_max = FSL_ASRC_DMABUF_SIZE,
.period_bytes_min = 128,
.period_bytes_max = 65535, /* Limited by SDMA engine */
@@ -270,12 +268,25 @@ static int fsl_asrc_dma_hw_free(struct snd_pcm_substream
*substream)
static int fsl_asrc_dma_startup(struct snd_pcm_substream *substream)
{
+ bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd,
DRV_NAME);
+ struct snd_dmaengine_dai_dma_data *dma_data;
struct device *dev = component->dev;
struct fsl_asrc *asrc_priv = dev_get_drvdata(dev);
struct fsl_asrc_pair *pair;
+ struct dma_chan *tmp_chan = NULL;
+ u8 dir = tx ? OUT : IN;
+ bool release_pair = true;
+ int ret = 0;
+
+ ret = snd_pcm_hw_constraint_integer(substream->runtime,
+ SNDRV_PCM_HW_PARAM_PERIODS);
+ if (ret < 0) {
+ dev_err(dev, "failed to set pcm hw params periods\n");
+ return ret;
+ }
pair = kzalloc(sizeof(struct fsl_asrc_pair), GFP_KERNEL);
if (!pair)
@@ -285,11 +296,50 @@ static int fsl_asrc_dma_startup(struct snd_pcm_substream
*substream)
runtime->private_data = pair;
- snd_pcm_hw_constraint_integer(substream->runtime,
- SNDRV_PCM_HW_PARAM_PERIODS);
+ /* Request a dummy pair, which will be released later.
+* Request pair function needs channel num as input, for this
+* dummy pair, we just request "1" channel temporarily.
+*/
+ ret = fsl_asrc_request_pair(1, pair);
+ if (ret < 0) {
+ dev_err(dev, "failed to request asrc pair\n");
+ goto req_pair_err;
+ }
+
+ /* Request a dummy dma channel, which will be released later. */
+ tmp_chan = fsl_asrc_get_dma_channel(pair, dir);
+ if (!tmp_chan) {
+ dev_err(dev, "failed to get dma channel\n");
+ ret = -EINVAL;
+
[PATCH V6 1/4] ASoC: fsl_asrc: Use in(out)put_format instead of in(out)put_word_width
snd_pcm_format_t is more formal than enum asrc_word_width, which has
two property, width and physical width, which is more accurate than
enum asrc_word_width. So it is better to use in(out)put_format
instead of in(out)put_word_width.
Signed-off-by: Shengjiu Wang
Acked-by: Nicolin Chen
---
sound/soc/fsl/fsl_asrc.c | 56 +++-
sound/soc/fsl/fsl_asrc.h | 4 +--
2 files changed, 40 insertions(+), 20 deletions(-)
diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c
index cfa40ef6b1ca..4d3804a1ea55 100644
--- a/sound/soc/fsl/fsl_asrc.c
+++ b/sound/soc/fsl/fsl_asrc.c
@@ -265,6 +265,8 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair)
struct asrc_config *config = pair->config;
struct fsl_asrc *asrc_priv = pair->asrc_priv;
enum asrc_pair_index index = pair->index;
+ enum asrc_word_width input_word_width;
+ enum asrc_word_width output_word_width;
u32 inrate, outrate, indiv, outdiv;
u32 clk_index[2], div[2];
int in, out, channels;
@@ -283,9 +285,32 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair)
return -EINVAL;
}
- /* Validate output width */
- if (config->output_word_width == ASRC_WIDTH_8_BIT) {
- pair_err("does not support 8bit width output\n");
+ switch (snd_pcm_format_width(config->input_format)) {
+ case 8:
+ input_word_width = ASRC_WIDTH_8_BIT;
+ break;
+ case 16:
+ input_word_width = ASRC_WIDTH_16_BIT;
+ break;
+ case 24:
+ input_word_width = ASRC_WIDTH_24_BIT;
+ break;
+ default:
+ pair_err("does not support this input format, %d\n",
+config->input_format);
+ return -EINVAL;
+ }
+
+ switch (snd_pcm_format_width(config->output_format)) {
+ case 16:
+ output_word_width = ASRC_WIDTH_16_BIT;
+ break;
+ case 24:
+ output_word_width = ASRC_WIDTH_24_BIT;
+ break;
+ default:
+ pair_err("does not support this output format, %d\n",
+config->output_format);
return -EINVAL;
}
@@ -383,8 +408,8 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair)
/* Implement word_width configurations */
regmap_update_bits(asrc_priv->regmap, REG_ASRMCR1(index),
ASRMCR1i_OW16_MASK | ASRMCR1i_IWD_MASK,
- ASRMCR1i_OW16(config->output_word_width) |
- ASRMCR1i_IWD(config->input_word_width));
+ ASRMCR1i_OW16(output_word_width) |
+ ASRMCR1i_IWD(input_word_width));
/* Enable BUFFER STALL */
regmap_update_bits(asrc_priv->regmap, REG_ASRMCR(index),
@@ -497,13 +522,13 @@ static int fsl_asrc_dai_hw_params(struct
snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct fsl_asrc *asrc_priv = snd_soc_dai_get_drvdata(dai);
- int width = params_width(params);
struct snd_pcm_runtime *runtime = substream->runtime;
struct fsl_asrc_pair *pair = runtime->private_data;
unsigned int channels = params_channels(params);
unsigned int rate = params_rate(params);
struct asrc_config config;
- int word_width, ret;
+ snd_pcm_format_t format;
+ int ret;
ret = fsl_asrc_request_pair(channels, pair);
if (ret) {
@@ -513,15 +538,10 @@ static int fsl_asrc_dai_hw_params(struct
snd_pcm_substream *substream,
pair->config =
- if (width == 16)
- width = ASRC_WIDTH_16_BIT;
- else
- width = ASRC_WIDTH_24_BIT;
-
if (asrc_priv->asrc_width == 16)
- word_width = ASRC_WIDTH_16_BIT;
+ format = SNDRV_PCM_FORMAT_S16_LE;
else
- word_width = ASRC_WIDTH_24_BIT;
+ format = SNDRV_PCM_FORMAT_S24_LE;
config.pair = pair->index;
config.channel_num = channels;
@@ -529,13 +549,13 @@ static int fsl_asrc_dai_hw_params(struct
snd_pcm_substream *substream,
config.outclk = OUTCLK_ASRCK1_CLK;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- config.input_word_width = width;
- config.output_word_width = word_width;
+ config.input_format = params_format(params);
+ config.output_format = format;
config.input_sample_rate = rate;
config.output_sample_rate = asrc_priv->asrc_rate;
} else {
- config.input_word_width = word_width;
- config.output_word_width = width;
+ config.input_format = format;
+ config.output_format = params_format(params);
config.input_sample_rate =
IWL AC 8260, kernel 5.3.*, many kernel WARNING
Dear all, (please cc) linux 5.3.1 Debian/sid Thinkpad X260 iwlwifi :04:00.0: Detected Intel(R) Dual Band Wireless AC 8260, REV=0x208 iwlwifi :04:00.0: loaded firmware version 36.8fd77bb3.0 op_mode iwlmvm since about 5.3.0 I get a lot of warnings in the syslog about iwlmvm. It starts with Sep 27 09:08:35 burischnitzel kernel: iwlwifi :04:00.0: Microcode SW error detected. Restarting 0x8200. Sep 27 09:08:35 burischnitzel kernel: iwlwifi :04:00.0: Start IWL Error Log Dump: Sep 27 09:08:35 burischnitzel kernel: iwlwifi :04:00.0: Status: 0x0080, count: 6 Sep 27 09:08:35 burischnitzel kernel: iwlwifi :04:00.0: Loaded firmware version: 36.8fd77bb3.0 Sep 27 09:08:35 burischnitzel kernel: iwlwifi :04:00.0: 0x0038 | BAD_COMMAND Sep 27 09:08:35 burischnitzel kernel: iwlwifi :04:00.0: 0x02F0 | trm_hw_status0 Sep 27 09:08:35 burischnitzel kernel: iwlwifi :04:00.0: 0x | trm_hw_status1 after that Sep 27 09:08:35 burischnitzel kernel: ieee80211 phy0: Hardware restart was requested Sep 27 09:08:35 burischnitzel kernel: iwlwifi :04:00.0: FW Error notification: type 0x cmd_id 0x05 Sep 27 09:08:35 burischnitzel kernel: iwlwifi :04:00.0: FW Error notification: seq 0x0030 service 0x0005 Sep 27 09:08:35 burischnitzel kernel: iwlwifi :04:00.0: FW Error notification: timestamp 0x0037F460 Sep 27 09:08:35 burischnitzel kernel: iwlwifi :04:00.0: FW error in SYNC CMD GEO_TX_POWER_LIMIT Sep 27 09:08:35 burischnitzel kernel: CPU: 0 PID: 525 Comm: kworker/0:1 Tainted: GW OE 5.3.1 #15 Sep 27 09:08:35 burischnitzel kernel: Hardware name: LENOVO 20F5CTO1WW/20F5CTO1WW, BIOS R02ET71W (1.44 ) 05/08/2019 Sep 27 09:08:35 burischnitzel kernel: Workqueue: events iwl_mvm_async_handlers_wk [iwlmvm] Sep 27 09:08:35 burischnitzel kernel: Call Trace: Sep 27 09:08:35 burischnitzel kernel: dump_stack+0x46/0x60 Sep 27 09:08:35 burischnitzel kernel: iwl_trans_pcie_send_hcmd+0x46e/0x490 [iwlwifi] Sep 27 09:08:35 burischnitzel kernel: ? wait_woken+0x70/0x70 Sep 27 09:08:35 burischnitzel kernel: iwl_trans_send_cmd+0x57/0xb0 [iwlwifi] Sep 27 09:08:35 burischnitzel kernel: iwl_mvm_send_cmd+0x23/0x80 [iwlmvm] Sep 27 09:08:35 burischnitzel kernel: iwl_mvm_get_sar_geo_profile+0xae/0x130 [iwlmvm] Sep 27 09:08:35 burischnitzel kernel: ? iwl_mvm_get_regdomain+0x7f/0xc0 [iwlmvm] Sep 27 09:08:35 burischnitzel kernel: iwl_mvm_rx_chub_update_mcc+0xcd/0x110 [iwlmvm] Sep 27 09:08:35 burischnitzel kernel: iwl_mvm_async_handlers_wk+0xaa/0x140 [iwlmvm] Sep 27 09:08:35 burischnitzel kernel: process_one_work+0x1cf/0x370 Sep 27 09:08:35 burischnitzel kernel: worker_thread+0x4a/0x3c0 Sep 27 09:08:35 burischnitzel kernel: ? process_one_work+0x370/0x370 Sep 27 09:08:35 burischnitzel kernel: kthread+0x118/0x130 Sep 27 09:08:35 burischnitzel kernel: ? kthread_create_worker_on_cpu+0x70/0x70 Sep 27 09:08:35 burischnitzel kernel: ret_from_fork+0x35/0x40 Sep 27 09:08:35 burischnitzel kernel: iwlwifi :04:00.0: Failed to get geographic profile info -5 Sep 27 09:08:35 burischnitzel kernel: [ cut here ] Sep 27 09:08:35 burischnitzel kernel: WARNING: CPU: 0 PID: 525 at iwl_mvm_rx_umac_scan_complete_notif.cold+0xc/0x13 [iwlmvm] Sep 27 09:08:35 burischnitzel kernel: Modules linked in: xt_MASQUERADE(E) nf_conntrack_netlink(E) xfrm_user(E) xfrm_algo(E) xt> Sep 27 09:08:35 burischnitzel kernel: libarc4(E) snd_hda_intel(E) x86_pkg_temp_thermal(E) intel_powerclamp(E) iwlwifi(E) core> Sep 27 09:08:35 burischnitzel kernel: rtsx_pci_sdmmc(E) aes_x86_64(E) crypto_simd(E) mmc_core(E) cryptd(E) glue_helper(E) scs> Sep 27 09:08:35 burischnitzel kernel: CPU: 0 PID: 525 Comm: kworker/0:1 Tainted: GW OE 5.3.1 #15 Sep 27 09:08:35 burischnitzel kernel: Hardware name: LENOVO 20F5CTO1WW/20F5CTO1WW, BIOS R02ET71W (1.44 ) 05/08/2019 Sep 27 09:08:35 burischnitzel kernel: Workqueue: events iwl_mvm_async_handlers_wk [iwlmvm] Sep 27 09:08:35 burischnitzel kernel: RIP: 0010:iwl_mvm_rx_umac_scan_complete_notif.cold+0xc/0x13 [iwlmvm] Sep 27 09:08:35 burischnitzel kernel: Code: 48 c7 c7 68 8e d8 c0 e8 8a c3 74 d2 0f 0b 49 8b 47 10 44 8b a0 9c 00 00 00 e9 d2 0> Sep 27 09:08:35 burischnitzel kernel: RSP: 0018:9f524343fdf8 EFLAGS: 00010246 Sep 27 09:08:35 burischnitzel kernel: RAX: 0024 RBX: 8cea7f44b040 RCX: 0006 Sep 27 09:08:35 burischnitzel kernel: RDX: RSI: 0096 RDI: 8ced12216450 Sep 27 09:08:35 burischnitzel kernel: RBP: 8cecf7d81e38 R08: 9f524343fcad R09: 06fe Sep 27 09:08:35 burischnitzel kernel: R10: 0008 R11: 9f524343fcad R12: 8cecf7d81e08 Sep 27 09:08:35 burischnitzel kernel: R13: 8cecf7d81e08 R14: 8cea72eb0540 R15: dead0100 Sep 27 09:08:35 burischnitzel kernel: FS: () GS:8ced1220() knlGS: Sep 27 09:08:35 burischnitzel kernel: CS: 0010
RE: [PATCH] firmware: imx: Skip return value check for some special SCU firmware APIs
Hi, Leonard
> On 2019-09-26 1:06 PM, Marco Felsch wrote:
> > On 19-09-26 08:03, Anson Huang wrote:
> >>> On 19-09-25 18:07, Anson Huang wrote:
> The SCU firmware does NOT always have return value stored in
> message header's function element even the API has response data,
> those special APIs are defined as void function in SCU firmware, so
> they should be treated as return success always.
>
> +static const struct imx_sc_rpc_msg whitelist[] = {
> +{ .svc = IMX_SC_RPC_SVC_MISC, .func =
> >>> IMX_SC_MISC_FUNC_UNIQUE_ID },
> +{ .svc = IMX_SC_RPC_SVC_MISC, .func =
> +IMX_SC_MISC_FUNC_GET_BUTTON_STATUS }, };
> >>>
> >>> Is this going to be extended in the near future? I see some upcoming
> >>> problems here if someone uses a different scu-fw<->kernel
> >>> combination as nxp would suggest.
> >>
> >> Could be, but I checked the current APIs, ONLY these 2 will be used
> >> in Linux kernel, so I ONLY add these 2 APIs for now.
> >
> > Okay.
> >
> >> However, after rethink, maybe we should add another imx_sc_rpc API
> >> for those special APIs? To avoid checking it for all the APIs called which
> may impact some performance.
> >> Still under discussion, if you have better idea, please advise, thanks!
>
> My suggestion is to refactor the code and add a new API for the this "no
> error value" convention. Internally they can call a common function with
> flags.
If I understand your point correctly, that means the loop check of whether the
API
is with "no error value" for every API still NOT be skipped, it is just
refactoring the code,
right?
>
> > Adding a special api shouldn't be the right fix. Imagine if someone
> > (not a nxp-developer) wants to add a new driver. How could he be
> > expected to know which api he should use. The better abbroach would be
> > to fix the scu-fw instead of adding quirks..
Yes, fixing SCU FW is the best solution, but we have talked to SCU FW owner,
the SCU
FW released has been finalized, so the API implementation can NOT be changed,
but
they will pay attention to this issue for new added APIs later. That means the
number
of APIs having this issue a very limited.
>
> Right now developers who want to make SCFW calls in upstream need to
> define the message struct in their driver based on protocol documentation.
> This includes:
>
> * Binary layout of the message (a packed struct)
> * If the message has a response (already a bool flag)
> * If an error code is returned (this patch adds support for it)
>
> Since callers are already exposed to the binary protocol exposing them to
> minor quirks of the calling convention also seems reasonable. Having the
> low-level IPC code peek at message IDs seems like a hack; this belong at a
> slightly higher level.
A little confused, so what you suggested is to add make the imx_scu_call_rpc()
becomes the "slightly higher level" API, then in this API, check the message IDs
to decide whether to return error value, then calls a new API which will have
the low-level IPC code, the this new API will have a flag passed from
imx_scu_call_rpc()
function, am I right?
Anson
memory leak in tls_init
Hello, syzbot found the following crash on: HEAD commit:f41def39 Merge tag 'ceph-for-5.4-rc1' of git://github.com/.. git tree: upstream console output: https://syzkaller.appspot.com/x/log.txt?x=105b7ff960 kernel config: https://syzkaller.appspot.com/x/.config?x=2e29707d7d1530b3 dashboard link: https://syzkaller.appspot.com/bug?extid=35bc8fe94c9f38db8320 compiler: gcc (GCC) 9.0.0 20181231 (experimental) syz repro: https://syzkaller.appspot.com/x/repro.syz?x=145b341960 IMPORTANT: if you fix the bug, please add the following tag to the commit: Reported-by: syzbot+35bc8fe94c9f38db8...@syzkaller.appspotmail.com 2019/09/26 13:11:21 executed programs: 23 BUG: memory leak unreferenced object 0x88810e482a00 (size 512): comm "syz-executor.4", pid 6874, jiffies 4295090041 (age 14.090s) hex dump (first 32 bytes): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 backtrace: [] kmemleak_alloc_recursive include/linux/kmemleak.h:43 [inline] [ ] slab_post_alloc_hook mm/slab.h:586 [inline] [ ] slab_alloc mm/slab.c:3319 [inline] [ ] kmem_cache_alloc_trace+0x145/0x2c0 mm/slab.c:3548 [<268637bd>] kmalloc include/linux/slab.h:552 [inline] [<268637bd>] kzalloc include/linux/slab.h:686 [inline] [<268637bd>] create_ctx net/tls/tls_main.c:611 [inline] [<268637bd>] tls_init net/tls/tls_main.c:794 [inline] [<268637bd>] tls_init+0xbc/0x200 net/tls/tls_main.c:773 [ ] __tcp_set_ulp net/ipv4/tcp_ulp.c:139 [inline] [ ] tcp_set_ulp+0xe2/0x190 net/ipv4/tcp_ulp.c:160 [<09cb49a0>] do_tcp_setsockopt.isra.0+0x1c1/0xe10 net/ipv4/tcp.c:2825 [ ] tcp_setsockopt+0x71/0x80 net/ipv4/tcp.c:3152 [<38a5546c>] sock_common_setsockopt+0x38/0x50 net/core/sock.c:3142 [ ] __sys_setsockopt+0x10f/0x220 net/socket.c:2084 [<3c3afaa0>] __do_sys_setsockopt net/socket.c:2100 [inline] [<3c3afaa0>] __se_sys_setsockopt net/socket.c:2097 [inline] [<3c3afaa0>] __x64_sys_setsockopt+0x26/0x30 net/socket.c:2097 [ ] do_syscall_64+0x73/0x1f0 arch/x86/entry/common.c:290 [ ] entry_SYSCALL_64_after_hwframe+0x44/0xa9 BUG: memory leak unreferenced object 0x88810e71e600 (size 512): comm "syz-executor.4", pid 6888, jiffies 4295090060 (age 13.900s) hex dump (first 32 bytes): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 backtrace: [ ] kmemleak_alloc_recursive include/linux/kmemleak.h:43 [inline] [ ] slab_post_alloc_hook mm/slab.h:586 [inline] [ ] slab_alloc mm/slab.c:3319 [inline] [ ] kmem_cache_alloc_trace+0x145/0x2c0 mm/slab.c:3548 [<268637bd>] kmalloc include/linux/slab.h:552 [inline] [<268637bd>] kzalloc include/linux/slab.h:686 [inline] [<268637bd>] create_ctx net/tls/tls_main.c:611 [inline] [<268637bd>] tls_init net/tls/tls_main.c:794 [inline] [<268637bd>] tls_init+0xbc/0x200 net/tls/tls_main.c:773 [ ] __tcp_set_ulp net/ipv4/tcp_ulp.c:139 [inline] [ ] tcp_set_ulp+0xe2/0x190 net/ipv4/tcp_ulp.c:160 [<09cb49a0>] do_tcp_setsockopt.isra.0+0x1c1/0xe10 net/ipv4/tcp.c:2825 [ ] tcp_setsockopt+0x71/0x80 net/ipv4/tcp.c:3152 [<38a5546c>] sock_common_setsockopt+0x38/0x50 net/core/sock.c:3142 [ ] __sys_setsockopt+0x10f/0x220 net/socket.c:2084 [<3c3afaa0>] __do_sys_setsockopt net/socket.c:2100 [inline] [<3c3afaa0>] __se_sys_setsockopt net/socket.c:2097 [inline] [<3c3afaa0>] __x64_sys_setsockopt+0x26/0x30 net/socket.c:2097 [ ] do_syscall_64+0x73/0x1f0 arch/x86/entry/common.c:290 [ ] entry_SYSCALL_64_after_hwframe+0x44/0xa9 BUG: memory leak unreferenced object 0x88810e356800 (size 512): comm "syz-executor.0", pid 6926, jiffies 4295090085 (age 13.650s) hex dump (first 32 bytes): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 backtrace: [ ] kmemleak_alloc_recursive include/linux/kmemleak.h:43 [inline] [ ] slab_post_alloc_hook mm/slab.h:586 [inline] [ ] slab_alloc mm/slab.c:3319 [inline] [ ] kmem_cache_alloc_trace+0x145/0x2c0 mm/slab.c:3548 [<268637bd>] kmalloc include/linux/slab.h:552 [inline] [<268637bd>] kzalloc include/linux/slab.h:686 [inline] [<268637bd>]
[PATCH RESEND] tools: gpio: Use !building_out_of_srctree to determine srctree
make TARGETS=gpio kselftest fails with: Makefile:23: tools/build/Makefile.include: No such file or directory When the gpio tool make is invoked from tools Makefile, srctree is cleared and the current logic check for srctree equals to empty string to determine srctree location from CURDIR. When the build in invoked from selftests/gpio Makefile, the srctree is set to "." and the same logic used for srctree equals to empty is needed to determine srctree. Check building_out_of_srctree undefined as the condition for both cases to fix "make TARGETS=gpio kselftest" build failure. Signed-off-by: Shuah Khan --- Rsending with corrected address for linux-kselft...@vger.kernel.org tools/gpio/Makefile | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/tools/gpio/Makefile b/tools/gpio/Makefile index 6ecdd1067826..1178d302757e 100644 --- a/tools/gpio/Makefile +++ b/tools/gpio/Makefile @@ -3,7 +3,11 @@ include ../scripts/Makefile.include bindir ?= /usr/bin -ifeq ($(srctree),) +# This will work when gpio is built in tools env. where srctree +# isn't set and when invoked from selftests build, where srctree +# is set to ".". building_out_of_srctree is undefined for in srctree +# builds +ifndef building_out_of_srctree srctree := $(patsubst %/,%,$(dir $(CURDIR))) srctree := $(patsubst %/,%,$(dir $(srctree))) endif -- 2.20.1
[PATCH] tools: bpf: Use !building_out_of_srctree to determine srctree
make TARGETS=bpf kselftest fails with: Makefile:127: tools/build/Makefile.include: No such file or directory When the bpf tool make is invoked from tools Makefile, srctree is cleared and the current logic check for srctree equals to empty string to determine srctree location from CURDIR. When the build in invoked from selftests/bpf Makefile, the srctree is set to "." and the same logic used for srctree equals to empty is needed to determine srctree. Check building_out_of_srctree undefined as the condition for both cases to fix "make TARGETS=bpf kselftest" build failure. Signed-off-by: Shuah Khan --- tools/bpf/Makefile | 6 +- tools/lib/bpf/Makefile | 6 +- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/tools/bpf/Makefile b/tools/bpf/Makefile index fbf5e4a0cb9c..5d1995fd369c 100644 --- a/tools/bpf/Makefile +++ b/tools/bpf/Makefile @@ -12,7 +12,11 @@ INSTALL ?= install CFLAGS += -Wall -O2 CFLAGS += -D__EXPORTED_HEADERS__ -I$(srctree)/include/uapi -I$(srctree)/include -ifeq ($(srctree),) +# This will work when bpf is built in tools env. where srctree +# isn't set and when invoked from selftests build, where srctree +# is set to ".". building_out_of_srctree is undefined for in srctree +# builds +ifndef building_out_of_srctree srctree := $(patsubst %/,%,$(dir $(CURDIR))) srctree := $(patsubst %/,%,$(dir $(srctree))) endif diff --git a/tools/lib/bpf/Makefile b/tools/lib/bpf/Makefile index c6f94cffe06e..20772663d3e1 100644 --- a/tools/lib/bpf/Makefile +++ b/tools/lib/bpf/Makefile @@ -8,7 +8,11 @@ LIBBPF_MAJOR_VERSION := $(firstword $(subst ., ,$(LIBBPF_VERSION))) MAKEFLAGS += --no-print-directory -ifeq ($(srctree),) +# This will work when bpf is built in tools env. where srctree +# isn't set and when invoked from selftests build, where srctree +# is a ".". building_out_of_srctree is undefined for in srctree +# builds +ifndef building_out_of_srctree srctree := $(patsubst %/,%,$(dir $(CURDIR))) srctree := $(patsubst %/,%,$(dir $(srctree))) srctree := $(patsubst %/,%,$(dir $(srctree))) -- 2.20.1
[PATCH] tools: gpio: Use !building_out_of_srctree to determine srctree
make TARGETS=gpio kselftest fails with: Makefile:23: tools/build/Makefile.include: No such file or directory When the gpio tool make is invoked from tools Makefile, srctree is cleared and the current logic check for srctree equals to empty string to determine srctree location from CURDIR. When the build in invoked from selftests/gpio Makefile, the srctree is set to "." and the same logic used for srctree equals to empty is needed to determine srctree. Check building_out_of_srctree undefined as the condition for both cases to fix "make TARGETS=gpio kselftest" build failure. Signed-off-by: Shuah Khan --- tools/gpio/Makefile | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/tools/gpio/Makefile b/tools/gpio/Makefile index 6ecdd1067826..1178d302757e 100644 --- a/tools/gpio/Makefile +++ b/tools/gpio/Makefile @@ -3,7 +3,11 @@ include ../scripts/Makefile.include bindir ?= /usr/bin -ifeq ($(srctree),) +# This will work when gpio is built in tools env. where srctree +# isn't set and when invoked from selftests build, where srctree +# is set to ".". building_out_of_srctree is undefined for in srctree +# builds +ifndef building_out_of_srctree srctree := $(patsubst %/,%,$(dir $(CURDIR))) srctree := $(patsubst %/,%,$(dir $(srctree))) endif -- 2.20.1
Re: [PATCH v2 1/4] lib: introduce copy_struct_from_user() helper
On 2019-09-26, Christian Brauner wrote:
> On Thu, Sep 26, 2019 at 01:03:29AM +0200, Aleksa Sarai wrote:
> > +int is_zeroed_user(const void __user *from, size_t size)
> > +{
> > + unsigned long val;
> > + uintptr_t align = (uintptr_t) from % sizeof(unsigned long);
> > +
> > + if (unlikely(!size))
> > + return true;
>
> You're returning "true" and another implicit boolean with (val == 0)
> down below but -EFAULT in other places. But that function is int
> is_zeroed_user() Would probably be good if you either switch to bool
> is_zeroed_user() as the name suggests or rename the function and have
> it return an int everywhere.
I just checked, and in C11 (and presumably in older specs) it is
guaranteed that "true" and "false" from have the values 1
and 0 (respectively) [ยง7.18]. So this is perfectly well-defined.
Personally, I think it's more readable to have:
if (unlikely(size == 0))
return true;
/* ... */
return (val == 0);
compared to:
if (unlikely(size == 0))
return 1;
/* ... */
return val ? 0 : 1;
But I will change the function name (to check_zeroed_user) to make it
clearer that it isn't returning a boolean and that you need to check for
negative returns.
--
Aleksa Sarai
Senior Software Engineer (Containers)
SUSE Linux GmbH
Re: [PATCH] async: Using current_work() to implement current_is_async()
On 2019/9/26 23:27, Bart Van Assche wrote: > On 9/26/19 1:40 AM, Yunfeng Ye wrote: >> current_is_async() can be implemented using current_work(), it's better >> not to be aware of the workqueue's internal information. > > Reviewed-by: Bart Van Assche > I will update the patch with Reviewed-by, thanks. > . >
Re: [PATCH] async: Let kfree() out of the critical area of the lock
On 2019/9/26 23:18, Bart Van Assche wrote: > On 9/26/19 4:06 AM, David Sterba wrote: >> On Thu, Sep 26, 2019 at 03:58:36PM +0800, Yunfeng Ye wrote: >>> The async_lock is big global lock, I think it's good to put kfree() outside >>> to keep the critical area as short as possible. >> >> Agreed, kfree is not always cheap. We had patches in btrfs moving kfree >> out of critical section(s) after causing softlockups due to increased lock >> contention. > > The above would be a great addition for the commit description. Anyway: > ok, I will update the description, thanks. > Reviewed-by: Bart Van Assche > > . >
Re: [PATCH v5 0/7] hugetlb_cgroup: Add hugetlb_cgroup reservation limits
On Thu, Sep 26, 2019 at 2:23 PM Mike Kravetz wrote: > > On 9/26/19 12:28 PM, David Rientjes wrote: > > On Tue, 24 Sep 2019, Mina Almasry wrote: > > > >>> I personally prefer the one counter approach only for the reason that it > >>> exposes less information about hugetlb reservations. I was not around > >>> for the introduction of hugetlb reservations, but I have fixed several > >>> issues having to do with reservations. IMO, reservations should be hidden > >>> from users as much as possible. Others may disagree. > >>> > >>> I really hope that Aneesh will comment. He added the existing hugetlb > >>> cgroup code. I was not involved in that effort, but it looks like there > >>> might have been some thought given to reservations in early versions of > >>> that code. It would be interesting to get his perspective. > >>> > >>> Changes included in patch 4 (disable region_add file_region coalescing) > >>> would be needed in a one counter approach as well, so I do plan to > >>> review those changes. > >> > >> OK, FWIW, the 1 counter approach should be sufficient for us, so I'm > >> not really opposed. David, maybe chime in if you see a problem here? > >> From the perspective of hiding reservations from the user as much as > >> possible, it is an improvement. > >> > >> I'm only wary about changing the behavior of the current and having > >> that regress applications. I'm hoping you and Aneesh can shed light on > >> this. > >> > > > > I think neither Aneesh nor myself are going to be able to provide a > > complete answer on the use of hugetlb cgroup today, anybody could be using > > it without our knowledge and that opens up the possibility that combining > > the limits would adversely affect a real system configuration. > > I agree that nobody can provide complete information on hugetlb cgroup usage > today. My interest was in anything Aneesh could remember about development > of the current cgroup code. It 'appears' that the idea of including > reservations or mmap ranges was considered or at least discussed. But, those > discussions happened more than 7 years old and my searches are not providing > a complete picture. My hope was that Aneesh may remember those discussions. > > > If that is a possibility, I think we need to do some due diligence and try > > to deprecate allocation limits if possible. One of the benefits to > > separate limits is that we can make reasonable steps to deprecating the > > actual allocation limits, if possible: we could add warnings about the > > deprecation of allocation limits and see if anybody complains. > > > > That could take the form of two separate limits or a tunable in the root > > hugetlb cgroup that defines whether the limits are for allocation or > > reservation. > > > > Combining them in the first pass seems to be very risky and could cause > > pain for users that will not detect this during an rc cycle and will > > report the issue only when their distro gets it. Then we are left with no > > alternative other than stable backports and the separation of the limits > > anyway. > > I agree that changing behavior of the existing controller is too risky. > Such a change is likely to break someone. I'm glad we're converging on keeping the existing behavior unchanged. > The more I think about it, the > best way forward will be to retain the existing controller and create a > new controller that satisfies the new use cases. My guess is that a new controller needs to support cgroups-v2, which is fine. But can a new controller also support v1? Or is there a requirement that new controllers support *only* v2? I need whatever solution here to work on v1. Added Tejun to hopefully comment on this. >The question remains as > to what that new controller will be. Does it control reservations only? > Is it a combination of reservations and allocations? If a combined > controller will work for new use cases, that would be my preference. Of > course, I have not prototyped such a controller so there may be issues when > we get into the details. For a reservation only or combined controller, > the region_* changes proposed by Mina would be used. Provided we keep the existing controller untouched, should the new controller track: 1. only reservations, or 2. both reservations and allocations for which no reservations exist (such as the MAP_NORESERVE case)? I like the 'both' approach. Seems to me a counter like that would work automatically regardless of whether the application is allocating hugetlb memory with NORESERVE or not. NORESERVE allocations cannot cut into reserved hugetlb pages, correct? If so, then applications that allocate with NORESERVE will get sigbused when they hit their limit, and applications that allocate without NORESERVE may get an error at mmap time but will always be within their limits while they access the mmap'd memory, correct? So the 'both' counter seems like a one size fits all. I think the only sticking point left is whether an added
