On Sun, May 24, 2020 at 2:44 PM Alexandre Ghiti wrote:
>
> This is a preparatory patch for sv48 support that will introduce
> dynamic PAGE_OFFSET.
>
> Dynamic PAGE_OFFSET implies that all zones (vmalloc, vmemmap, fixaddr...)
> whose addresses depend on PAGE_OFFSET become dynamic and can't be used
From: Qiushi Wu
Function "pm_runtime_get_sync()" is not handled by "pm_runtime_put()"
if "PTR_ERR(rst) == -EPROBE_DEFER". Fix this issue by adding
"pm_runtime_put()" into this error path.
Fixes: f65bb92ca12e ("ASoC: img-i2s-in: Add runtime PM")
Signed-off-by: Qiushi Wu
---
For very large systems with hundreds of CPUs and TBs of RAM booting can
take a very long time.
Initial reports showed that booting a configuration of several hundred
CPUs and 64TB of RAM would take more than 30 minutes and require kernel
parameters of udev.children-max=1024
Use sym_get_data_offset() helper to get access to the .shstrtab
section data. No functional change is intended because
elf->sechdrs[elf->secindex_strings].sh_addr is 0 for both ET_REL
and ET_EXEC object types.
Signed-off-by: Masahiro Yamada
---
scripts/mod/modpost.c | 22 ++
The kernfs global lock restricts the ability to perform kernfs node
lookup operations in parallel.
Change the kernfs mutex to an rwsem so that, when oppertunity arises,
node searches can be done in parallel.
Signed-off-by: Ian Kent
---
fs/kernfs/dir.c | 119
This may not be a practical problem, but the second pass of ARCH=i386
modpost causes segmentation fault if the -s option is not passed.
MODPOST 12 modules
Segmentation fault (core dumped)
make[2]: *** [scripts/Makefile.modpost:94: __modpost] Error 139
make[1]: *** [Makefile:1339:
If a kernfs directory node hasn't changed there's no need to search for
an added (or removed) child dentry.
Add a revision counter to kernfs directory nodes so it can be used
to detect if a directory node has changed.
Signed-off-by: Ian Kent
---
fs/kernfs/dir.c | 17
Now that an rwsem is used by kernfs, take advantage of it to reduce
lookup overhead.
If there are many lookups (possibly many negative ones) there can
be a lot of overhead during path walks.
To reduce lookup overhead avoid allocating a new dentry where possible.
To do this stay in rcu-walk mode
While the dentry operation kernfs_dop_revalidate() is grouped with
dentry'ish functions it also has a strong afinity to the inode
operation ->lookup(). And when path walk improvements are applied
it will need to call kernfs_find_ns() so move it to be near
kernfs_iop_lookup() to avoid the need for
Hi,
A gentle reminder.
Any suggestions here?
BR,
Sagar Kadam
> -Original Message-
> From: Sagar Kadam
> Sent: Tuesday, May 19, 2020 4:16 PM
> To: linux-ri...@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> m...@lists.infradead.org
> Cc: Paul Walmsley ; pal...@dabbelt.com;
>
On 21/05/20 6:23 pm, Veerabhadrarao Badiganti wrote:
> From: Vijay Viswanath
>
> If vendor platform drivers are controlling whole logic of voltage
> switching, then sdhci driver no need control vqmmc regulator.
> So skip enabling/disable vqmmc from SDHC driver.
>
> Signed-off-by: Vijay
I am Daejun Park who is working to patch HPB driver.
Thank you for your comment, and the following is our answer.
> Splitting the UFS driver into multiple modules would be great if the
> interface between these modules can be kept small and elegant. However,
> I'm not sure that this approach
Christophe Leroy writes:
> Mapping RO data as ROX is not an issue since that data
> cannot be modified to introduce an exploit.
Being pedantic: it is still an issue, in that it means there's more
targets for a code-reuse attack.
But given the entire kernel text is also available for code-reuse
Hello Greg,
This is the second pull request for habanalabs driver for kernel 5.8.
It contains important improvements to our MMU code and our ASIC reset code.
Please see the tag message for more details on what this pull request
contains.
Thanks,
Oded
The following changes since commit
* Mel Gorman wrote:
> The following two patches optimise try_to_wake_up() when the wakee is
> descheduling. In a vanilla kernel, there can be excessive time spent
> spinning on p->on_rq. This is fine if it's a strictly synchronous wakeup
> and the waker is going to sleep but in other cases,
The following commit has been merged into the sched/core branch of tip:
Commit-ID: 2ebb17717550607bcd85fb8cf7d24ac870e9d762
Gitweb:
https://git.kernel.org/tip/2ebb17717550607bcd85fb8cf7d24ac870e9d762
Author:Mel Gorman
AuthorDate:Sun, 24 May 2020 21:29:56 +01:00
Committer:
On Fri, May 22, 2020 at 03:51:58PM +0300, Kirill A. Shutemov wrote:
> == Background / Problem ==
>
> There are a number of hardware features (MKTME, SEV) which protect guest
> memory from some unauthorized host access. The patchset proposes a purely
> software feature that mitigates some of the
The following commit has been merged into the sched/core branch of tip:
Commit-ID: c6e7bd7afaeb3af55ffac122828035f1c01d1d7b
Gitweb:
https://git.kernel.org/tip/c6e7bd7afaeb3af55ffac122828035f1c01d1d7b
Author:Peter Zijlstra
AuthorDate:Sun, 24 May 2020 21:29:55 +01:00
Signature verification is an important security feature, to protect
system from being attacked with a kernel of unknown origin. Kexec
rebooting is a way to replace the running kernel, hence need be
secured carefully.
In the current code of handling signature verification of kexec kernel,
the
On Sun, May 24, 2020 at 11:07 PM Omer Shpigelman wrote:
>
> MMU cache invalidation timeout indicates that the device is unstable and
> therefore unusable.
> Hence in such case do hard reset and return an error to the user if was
> called from ioctl.
> In addition, change the print to error level
Christophe Leroy writes:
> In order to have all flags fit on a 80 chars wide screen,
> reduce the flags to 1 char (2 where ambiguous).
I don't love this, the output is less readable. Is fitting on an 80 char
screen a real issue for you? I just make my terminal window bigger.
cheers
> No cache
The mm-of-the-moment snapshot 2020-05-24-22-09 has been uploaded to
http://www.ozlabs.org/~akpm/mmotm/
mmotm-readme.txt says
README for mm-of-the-moment:
http://www.ozlabs.org/~akpm/mmotm/
This is a snapshot of my -mm patch queue. Uploaded at random hopefully
more than once a week.
You
On Fri, May 22, 2020 at 05:57:24PM +0800, Shengjiu Wang wrote:
> With dedicated power domain for asrc, power can be disabled after
> probe and pm runtime suspend, then the value of all registers need to
> be restored in pm runtime resume. So we can merge suspend/resume function
> to
Hi all,
After merging the block tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
mm/filemap.c: In function 'generic_file_buffered_read':
mm/filemap.c:2075:9: error: 'written' undeclared (first use in this function);
did you mean 'writeb'?
2075 | if (written) {
On 2020/05/25 4:18, Ondrej Mosnacek wrote:
> I'm also not sure if this is really worth it... It would help localize
> the bug in this specific case, but there is nothing systematic about
> it. Are there that many debug print statements that dereference
> pointers that are later passed to
On Sat, 23 May 2020 at 06:51, Darrick J. Wong wrote:
>
> OTOH, it didn't take that long to whip up a patch.
>
> Dave, does this fix your problem?
I reproduced with 5.7.0-rc7, and tried this patch on top in the same
VM doing the same thing.
with this patch I no longer see the lockdep trace.
On Fri, May 15, 2020 at 06:16:44AM -0700, Matthew Wilcox wrote:
> From: "Matthew Wilcox (Oracle)"
>
> A compound page in the page cache will not necessarily be of PMD size,
> so check explicitly.
>
> Signed-off-by: Matthew Wilcox (Oracle)
> ---
> mm/memory.c | 7 ---
> 1 file changed, 4
On Fri, May 15, 2020 at 06:16:31AM -0700, Matthew Wilcox wrote:
> From: "Matthew Wilcox (Oracle)"
>
> We can only kmap() one subpage of a THP at a time, so loop over all
> relevant subpages, skipping ones which don't need to be zeroed. This is
> too large to inline when THPs are enabled and we
Hi Richard,
> -Original Message-
> From: Richard Cochran
> Sent: Sunday, May 24, 2020 10:11 AM
> To: Jianyong Wu
> Cc: net...@vger.kernel.org; yangbo...@nxp.com; john.stu...@linaro.org;
> t...@linutronix.de; pbonz...@redhat.com; sean.j.christopher...@intel.com;
> m...@kernel.org; Mark
On Mon, May 11, 2020 at 10:17:21PM +0300, Kirill A. Shutemov wrote:
> A 5-level paging capable machine can have memory above 46-bit in the
> physical address space. This memory is only addressable in the 5-level
> paging mode: we don't have enough virtual address space to create direct
> mapping
On Sun, May 24, 2020 at 04:43:18PM +0300, Konstantin Khlebnikov wrote:
> Replace superfluous VM_BUG_ON() with comment about correct usage.
>
> Technically reverts commit 1d148e218a0d0566b1c06f2f45f1436d53b049b2
> ("mm: add VM_BUG_ON_PAGE() to page_mapcount()"), but context have changed.
>
>
On Fri, May 22, 2020 at 01:48:48PM +0200, Jan Kara wrote:
> On Thu 21-05-20 12:13:12, ira.we...@intel.com wrote:
> > From: Ira Weiny
> >
> > Add a flag to preserve FS_XFLAG_DAX in the ext4 inode.
> >
> > Set the flag to be user visible and changeable. Set the flag to be
> > inherited. Allow
Add a test for comparing the performance of RCU with various read-side
synchronization mechanisms. The test has proved useful for collecting
data and performing these comparisons.
Currently RCU, SRCU, reader-writer lock, reader-writer semaphore and
reference counting can be measured using
wait_event() already retries if the condition for the wake up is not
satisifed after wake up. Remove them from the rcuperf test.
Signed-off-by: Joel Fernandes (Google)
---
kernel/rcu/rcuperf.c | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git
On Sat, May 23, 2020 at 06:50:15PM -0700, Hugh Dickins wrote:
> When collapse_file() calls try_to_release_page(), it has already
> isolated the page: so if releasing buffers happens to fail (as it
> sometimes does), remember to putback_lru_page(): otherwise that page is
> left unreclaimable and
Hi,
On 5/24/20 9:44 AM, Andrew Lunn wrote:
+++ b/include/linux/phy.h
@@ -275,6 +275,11 @@ struct mii_bus {
int reset_delay_us;
/* RESET GPIO descriptor pointer */
struct gpio_desc *reset_gpiod;
+ /* bus capabilities, used for probing */
+ enum {
+
Hi Moritz:
Thanks for your comments for first 3 patches. And do you have more comments
on last 4 patches?
I have done the changes for those fixes. I'm not sure if I should send
the v6 patchset now?
Thanks,
Yilun.
On Wed, May 06, 2020 at 06:17:27PM -0700, Moritz Fischer wrote:
> Hi Xu,
>
> On
Hi,
On 5/23/20 1:44 PM, Russell King - ARM Linux admin wrote:
On Fri, May 22, 2020 at 04:30:55PM -0500, Jeremy Linton wrote:
MMD's in the device list sometimes return 0 for their id.
When that happens lets reset the id back to 0xfff so
that we don't get a stub device created for it.
This
Maintain a mask of wake-enabled IRQs, and enable them in hardware
during the syscore phase of suspend. The restore the original mask
of enabled IRQs (just the NMI) during resume.
This serves two purposes. First, it lets power management firmware
running on the ARISC coprocessor know which wakeup
All IRQs that can be used to wake up the system must be routed through
r_intc, so they are visible to firmware while the system is suspended.
For the H3/H5, r_intc IRQ numbers are offset by 32 from the GIC IRQ
numbers.
Signed-off-by: Samuel Holland
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 11
All IRQs that can be used to wake up the system must be routed through
r_intc, so they are visible to firmware while the system is suspended.
For the H6, r_intc IRQ numbers are offset by 96 from the GIC IRQ
numbers.
Signed-off-by: Samuel Holland
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
The H3 and H5 SoCs have an additional interrupt controller in the RTC
power domain that can be used to enable wakeup for certain IRQs.
Add a node for it.
Signed-off-by: Samuel Holland
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git
All IRQs that can be used to wake up the system must be routed through
r_intc, so they are visible to firmware while the system is suspended.
For the A64, r_intc IRQ numbers are offset by 32 from the GIC IRQ
numbers.
Signed-off-by: Samuel Holland
---
The R_INTC in the A31 and newer sun8i/sun50i SoCs is more similar to the
original sun4i interrupt controller than the sun7i/sun9i NMI controller.
It is used for two distinct purposes:
1) To control the trigger, latch, and mask for the NMI input pin
2) To provide the interrupt input for the ARISC
This node was indented by two tabs when added instead of one.
Remove the extra tab.
Signed-off-by: Samuel Holland
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 22 ++--
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git
All IRQs that can be used to wake up the system must be routed through
r_intc, so they are visible to firmware while the system is suspended.
For the A83T, r_intc IRQ numbers are offset by 32 from the GIC IRQ
numbers.
Signed-off-by: Samuel Holland
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 9
The Allwinner H3 SoC contains an R_INTC that is, as far as we know,
compatible with the R_INTC present in other sun8i/sun50i SoCs starting
with the A31. Since the R_INTC hardware is undocumented, introduce a new
compatible for the R_INTC variant in this SoC, in case there turns out
to be some
Allwinner sun8i/sun50i SoCs (A31 and newer) have two interrupt
controllers: GIC and R_INTC. GIC does not support wakeup. R_INTC handles
the external NMI pin, and provides 16-32 IRQs to the ARISC. At least the
first 16 of these correspond 1:1 to a block of GIC IRQs starting with
the NMI.
This
Hello, and thanks for the feedback!
I know this is quite the delay in responding; I wanted to make sure my
understanding of the hardware was as clear as possible before sending a v2.
After experimentation, I came up with a diagram describing the hardware
architecture, available here:
If CONFIG_ARCH_ROCKCHIP is not set but COMPILE_TEST is set, the file in
the subdir rockchip can not be built due to CONFIG_ARCH_ROCKCHIP check
in drivers/phy/Makefile.
Since the related configs in drivers/phy/rockchip/Kconfig depend on
ARCH_ROCKCHIP, so remove CONFIG_ARCH_ROCKCHIP check for
When call function devm_platform_ioremap_resource(), we should use IS_ERR()
to check the return value and return PTR_ERR() if failed.
Fixes: b7535a3bc0ba ("phy/rockchip: Add support for Innosilicon MIPI/LVDS/TTL
PHY")
Signed-off-by: Tiezhu Yang
---
On 2020/5/9 17:56, Hanjun Guo wrote:
On 2020/5/9 17:34, Zenghui Yu wrote:
Since commit bc8648d49a95 ("ACPI/IORT: Handle PCI aliases properly for
IOMMUs"), __get_pci_rid() has become actually unused and can be removed.
Signed-off-by: Zenghui Yu
Looks good to me,
Acked-by: Hanjun Guo
Hi
Shutdown test is somtimes hung, since it keeps trying to flush dirty node pages
in an inifinite loop. Let's drop dirty pages at umount in that case.
Signed-off-by: Jaegeuk Kim
---
v3:
- fix wrong unlock
v2:
- fix typos
fs/f2fs/node.c | 9 -
1 file changed, 8 insertions(+), 1
Hi all,
Today's linux-next merge of the drm tree got conflicts in:
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_init.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c
between commit:
31ecebee9c36 ("drm/amd/display: Defer cursor lock until after VUPDATE")
from Linus' tree and commits:
Register "a1" is unsaved in this function,
when CONFIG_TRACE_IRQFLAGS is enabled,
the TRACE_IRQS_OFF macro will call trace_hardirqs_off(),
and this may change register "a1".
The variment of register "a1" may send SIGFPE signal
to task when call do_fpe(),and this may kill the task.
From: dillon min
since chip spi driver need get the transfer direction by 'tx_buf' and
'rx_buf' of 'struct spi_transfer' in 'SPI_3WIRE' mode.
so, we need bypass 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX'
feature in 'SPI_3WIRE' mode
Signed-off-by: dillon min
---
drivers/spi/spi.c |
From: dillon min
Enable the ltdc & ili9341, gyro l3gd20 on stm32429-disco board.
Signed-off-by: dillon min
---
arch/arm/boot/dts/stm32f429-disco.dts | 48 +++
1 file changed, 48 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429-disco.dts
From: dillon min
Enable spi5's dma configuration. for graphics data output to
ilitek ili9341 panel via mipi dbi interface
Signed-off-by: dillon min
---
arch/arm/boot/dts/stm32f429.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi
From: dillon min
V5's update based on Mark Brown's suggestion, use 'SPI_MASTER_MUST_RX'
for SPI_SIMPLEX_RX mode on stm32 spi controller.
V5:
1 instead of add send dummy data out under SIMPLEX_RX mode,
add flags 'SPI_CONTROLLER_MUST_TX' for stm32 spi driver
2 bypass 'SPI_CONTROLLER_MUST_TX'
From: dillon min
This driver combine tiny/ili9341.c mipi_dbi_interface driver
with mipi_dpi_interface driver, can support ili9341 with serial
mode or parallel rgb interface mode by register configuration.
Changes since V3:
accoding to Linus Walleij's suggestion.
1 add more
From: dillon min
This patch adds the pin configuration for ltdc and spi5 controller
on stm32f429-disco board.
Signed-off-by: dillon min
---
arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 67 ++
1 file changed, 67 insertions(+)
diff --git
From: dillon min
in l3gd20 driver startup, there is a setup failed error return from
stm32 spi driver
"
[2.687630] st-gyro-spi spi0.0: supply vdd not found, using dummy
regulator
[2.696869] st-gyro-spi spi0.0: supply vddio not found, using dummy
regulator
[
From: dillon min
Add documentation for "ilitek,ili9341" panel.
Signed-off-by: dillon min
---
.../bindings/display/panel/ilitek,ili9341.yaml | 69 ++
1 file changed, 69 insertions(+)
create mode 100644
From: dillon min
ltdc set clock rate crashed
'post_div_data[]''s pll_num is PLL_I2S, PLL_SAI (number is 1,2). but,
as pll_num is offset of 'clks[]' input to clk_register_pll_div(), which
is FCLK, CLK_LSI, defined in 'include/dt-bindings/clock/stm32fx-clock.h'
so, this is a null
Hi Jason,
On 2020/5/25 11:12, Jason Wang wrote:
>
> On 2020/5/25 上午8:56, Longpeng(Mike) wrote:
>> The system will crash when we insmod crypto/tcrypt.ko whit mode=38.
>>
>> Usually the next entry of one sg will be @sg@ + 1, but if this sg element
>> is part of a chained scatterlist, it could jump
From: dillon min
Add documentation for "ilitek,ili9341" panel.
Signed-off-by: dillon min
---
.../bindings/display/panel/ilitek,ili9341.yaml | 69 ++
1 file changed, 69 insertions(+)
create mode 100644
From: dillon min
since chip spi driver need get the transfer direction by 'tx_buf' and
'rx_buf' of 'struct spi_transfer' in 'SPI_3WIRE' mode.
so, we need bypass 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX'
feature in 'SPI_3WIRE' mode
Signed-off-by: dillon min
---
drivers/spi/spi.c |
From: dillon min
in l3gd20 driver startup, there is a setup failed error return from
stm32 spi driver
"
[2.687630] st-gyro-spi spi0.0: supply vdd not found, using dummy
regulator
[2.696869] st-gyro-spi spi0.0: supply vddio not found, using dummy
regulator
[
From: dillon min
This driver combine tiny/ili9341.c mipi_dbi_interface driver
with mipi_dpi_interface driver, can support ili9341 with serial
mode or parallel rgb interface mode by register configuration.
Changes since V3:
accoding to Linus Walleij's suggestion.
1 add more
From: dillon min
V5's update based on Mark Brown's suggestion, use 'SPI_MASTER_MUST_RX'
for SPI_SIMPLEX_RX mode on stm32 spi controller.
V5:
1 instead of add send dummy data out under SIMPLEX_RX mode,
add flags 'SPI_CONTROLLER_MUST_TX' for stm32 spi driver
2 bypass 'SPI_CONTROLLER_MUST_TX'
From: dillon min
ltdc set clock rate crashed
'post_div_data[]''s pll_num is PLL_I2S, PLL_SAI (number is 1,2). but,
as pll_num is offset of 'clks[]' input to clk_register_pll_div(), which
is FCLK, CLK_LSI, defined in 'include/dt-bindings/clock/stm32fx-clock.h'
so, this is a null
From: dillon min
Enable spi5's dma configuration. for graphics data output to
ilitek ili9341 panel via mipi dbi interface
Signed-off-by: dillon min
---
arch/arm/boot/dts/stm32f429.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi
From: dillon min
This patch adds the pin configuration for ltdc and spi5 controller
on stm32f429-disco board.
Signed-off-by: dillon min
---
arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 67 ++
1 file changed, 67 insertions(+)
diff --git
From: dillon min
Enable the ltdc & ili9341, gyro l3gd20 on stm32429-disco board.
Signed-off-by: dillon min
---
arch/arm/boot/dts/stm32f429-disco.dts | 48 +++
1 file changed, 48 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429-disco.dts
Hi,
On 5/23/20 1:37 PM, Russell King - ARM Linux admin wrote:
On Fri, May 22, 2020 at 04:30:52PM -0500, Jeremy Linton wrote:
Until this point, we have been sanitizing the c22
regs presence bit out of all the MMD device lists.
This is incorrect as it causes the 0x checks
to incorrectly
If CONFIG_ARCH_HISI is not set but COMPILE_TEST is set, the file
in the subdir hisilicon can not be built due to CONFIG_ARCH_HISI
check in drivers/clk/Makefile.
Since the related configs in drivers/clk/hisilicon/Kconfig depend
on ARCH_HISI, so remove CONFIG_ARCH_HISI check for subdir hisilicon
in
The return value about hisi_reset_init() is not correct, fix it.
Signed-off-by: Tiezhu Yang
---
drivers/clk/hisilicon/clk-hi3519.c | 4 ++--
drivers/clk/hisilicon/crg-hi3516cv300.c | 4 ++--
drivers/clk/hisilicon/crg-hi3798cv200.c | 4 ++--
drivers/clk/hisilicon/reset.c | 4 ++--
Hi Rob,
On 5/22/2020 9:24 PM, Rob Herring wrote:
> On Thu, May 21, 2020 at 9:37 PM Kishon Vijay Abraham I wrote:
>>
>> Certain platforms like TI's J721E using Cadence PCIe IP can perform only
>> 32-bit accesses for reading or writing to Cadence registers. Convert all
>> read and write accesses
On Sun, May 24, 2020 at 09:03:56PM +0200, Sebastian Andrzej Siewior wrote:
> On 2020-05-23 17:08:32 [+0200], To Paul E. McKenney wrote:
> > On 2020-05-22 10:39:53 [-0700], Paul E. McKenney wrote:
> > > It looks good to me, but I have not yet tested it. (Happy to let you
> > > take the first crack
Hi Dinghao Liu,
On 5/23/20 3:17 PM, Dinghao Liu wrote:
> When arizona_request_irq() returns an error code, a
> pairing runtime PM usage counter decrement is needed
> to keep the counter balanced. For error paths after
> this function, things are the same.
>
> Also, remove calls to
Hi Marek,
On 5/22/20 7:24 PM, Marek Szyprowski wrote:
> Add device tree compatible strings and create proper modalias structures
> to let this driver load automatically if compiled as module, because
> max14577 MFD driver creates MFD cells with such compatible strings.
>
> Signed-off-by: Marek
Hello,
syzbot found the following crash on:
HEAD commit:caffb99b Merge git://git.kernel.org/pub/scm/linux/kernel/g..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=15a7444110
kernel config: https://syzkaller.appspot.com/x/.config?x=c33c7f7c5471fd39
On 2020/5/25 上午8:56, Longpeng(Mike) wrote:
The system will crash when we insmod crypto/tcrypt.ko whit mode=38.
Usually the next entry of one sg will be @sg@ + 1, but if this sg element
is part of a chained scatterlist, it could jump to the start of a new
scatterlist array. Let's fix it by
drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url:
https://github.com/0day-ci/linux/commits/Peter-Xu/KVM-Dirty-ring-interface/20200524-070926
base: https
On 2020/5/23 17:02, Xin Long wrote:
> On Fri, May 22, 2020 at 8:39 PM Yuehaibing wrote:
>>
>> On 2020/5/22 13:49, Xin Long wrote:
>>> On Fri, May 22, 2020 at 9:45 AM Yuehaibing wrote:
On 2020/5/21 14:49, Xin Long wrote:
> On Tue, May 19, 2020 at 4:53 PM Steffen Klassert
>
Here add pte_sw_mkyoung function to make page readable on MIPS
platform during page fault handling. This patch improves page
fault latency about 10% on my MIPS machine with lmbench
lat_pagefault case.
It is noop function on other arches, there is no negative
influence on those architectures.
If original PTE has _PAGE_ACCESSED bit set, and new pte has no
_PAGE_NO_READ bit set, we can add _PAGE_SILENT_READ bit to enable
page valid bit.
Signed-off-by: Bibo Mao
---
arch/mips/include/asm/pgtable.h | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git
It is not necessary to flush tlb page on all CPUs if suitable PTE
entry exists already during page fault handling, just updating
TLB is fine.
Here redefine flush_tlb_fix_spurious_fault as empty on MIPS system.
V6:
- Add update_mmu_tlb function as empty on all platform except mips
system, we use
If two threads concurrently fault at the same page, the thread that
won the race updates the PTE and its local TLB. For now, the other
thread gives up, simply does nothing, and continues.
It could happen that this second thread triggers another fault, whereby
it only updates its local TLB while
before
--
total 1286
avail 1005
used281
reserved0
min 1024
after
-
total 1286
avail 1005
used281
limit 261
reserved0
min 1024
Signed-off-by: Yanhu Cao
Signed-off-by: Yanhu
Hi,
On 5/23/20 1:36 PM, Russell King - ARM Linux admin wrote:
On Fri, May 22, 2020 at 04:30:50PM -0500, Jeremy Linton wrote:
Since we are already checking for *devs == 0 after
the loop terminates, we can add a mostly F's check
as well. With that change we can simplify the return/break
sequence
On Wed, May 23, 2020 at 5:22 PM Li Yang
> -Original Message-
> From: Li Yang
> Sent: 2020年5月23日 5:22
> To: Kees Cook
> Cc: Gustavo A. R. Silva ; Qiang Zhao
> ; linuxppc-dev ;
> moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
> ; lkml ;
> Gustavo A. R. Silva
> Subject: Re:
Hi,
Thanks for taking a look at this.
On 5/23/20 1:20 PM, Russell King - ARM Linux admin wrote:
On Fri, May 22, 2020 at 04:30:49PM -0500, Jeremy Linton wrote:
C45 devices are to return 0 for registers they haven't
implemented. This means in theory we can terminate the
device search loop
Hi, Daniel
> Subject: RE: [PATCH] thermal: imx8mm: Add get_trend ops
>
> Hi, Daniel
>
> > Subject: Re: [PATCH] thermal: imx8mm: Add get_trend ops
> >
> > On 23/05/2020 02:35, Anson Huang wrote:
> > > Hi, Daniel
> > >
> > >
> > >> Subject: Re: [PATCH] thermal: imx8mm: Add get_trend ops
> > >>
>
On 5/24/20 9:43 AM, Guenter Roeck wrote:
> On 5/24/20 8:30 AM, Greg Kroah-Hartman wrote:
>> Sometimes it is better to unregister individual nodes instead of trying
>> to do them all at once with software_node_unregister_nodes(), so create
>> software_node_unregister() so that you can unregister
Hi,
On 5/23/20 3:01 PM, Russell King - ARM Linux admin wrote:
On Sat, May 23, 2020 at 09:51:31PM +0200, Andrew Lunn wrote:
static int get_phy_c45_ids(struct mii_bus *bus, int addr, u32 *phy_id,
struct phy_c45_device_ids *c45_ids) {
- int phy_reg;
- int
On 2020-05-24 19:25, Wu, Hao wrote:
Hi Moritz and FPGA developers,
Is this OK? And if so, is it going into your git tree? Or should I
send it up through a different tree? (I'm new to the FPGA development
model).
I can take it, sorry for sluggish response.
That's great news, thanks Moritz!
On Sun, 2020-05-24 at 20:13 +0200, Matthias Brugger wrote:
>
> On 24/05/2020 19:31, Dennis-YC Hsieh wrote:
> > Hi Matthias,
> >
> > Thanks for your comment.
> >
> > On Sat, 2020-05-16 at 20:20 +0200, Matthias Brugger wrote:
> >>
> >> On 08/03/2020 11:52, Dennis YC Hsieh wrote:
> >>> add
Hi everyone,
I'm in the process of trying to port a debugging tool (http://rr-project.org/)
from x86 to various other architectures. This tool relies on noting every
change that was made to the memory of the process being debugged.
As such, it has a battery of tests for corner cases of copyin/out
> >> Hi Moritz and FPGA developers,
> >>
> >> Is this OK? And if so, is it going into your git tree? Or should I
> >> send it up through a different tree? (I'm new to the FPGA development
> >> model).
> >
> > I can take it, sorry for sluggish response.
> >
>
> That's great news, thanks Moritz!
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