Re: [PATCH 4.19 00/36] 4.19.132-rc1 review

2020-07-07 Thread Naresh Kamboju
On Tue, 7 Jul 2020 at 20:48, Greg Kroah-Hartman
 wrote:
>
> This is the start of the stable review cycle for the 4.19.132 release.
> There are 36 patches in this series, all will be posted as a response
> to this one.  If anyone has any issues with these being applied, please
> let me know.
>
> Responses should be made by Thu, 09 Jul 2020 14:57:34 +.
> Anything received after that time might be too late.
>
> The whole patch series can be found in one patch at:
> 
> https://www.kernel.org/pub/linux/kernel/v4.x/stable-review/patch-4.19.132-rc1.gz
> or in the git tree and branch at:
> 
> git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git 
> linux-4.19.y
> and the diffstat can be found below.
>
> thanks,
>
> greg k-h

Results from Linaro’s test farm.
No regressions on arm64, arm, x86_64, and i386.

Summary


kernel: 4.19.132-rc1
git repo: 
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git
git branch: linux-4.19.y
git commit: 168e2945aaf526364ca3aa3e674490d363c32a33
git describe: v4.19.130-164-g168e2945aaf5
Test details: 
https://qa-reports.linaro.org/lkft/linux-stable-rc-4.19-oe/build/v4.19.130-164-g168e2945aaf5

No regressions (compared to build v4.19.130)

No fixes (compared to build v4.19.130)

Ran 33084 total tests in the following environments and test suites.

Environments
--
- dragonboard-410c - arm64
- hi6220-hikey - arm64
- i386
- juno-r2 - arm64
- juno-r2-compat
- juno-r2-kasan
- nxp-ls2088
- qemu_arm
- qemu_arm64
- qemu_i386
- qemu_x86_64
- x15 - arm
- x86_64
- x86-kasan

Test Suites
---
* build
* install-android-platform-tools-r2600
* install-android-platform-tools-r2800
* kselftest
* kselftest/drivers
* kselftest/filesystems
* kselftest/net
* libhugetlbfs
* linux-log-parser
* ltp-cap_bounds-tests
* ltp-commands-tests
* ltp-containers-tests
* ltp-cpuhotplug-tests
* ltp-crypto-tests
* ltp-cve-tests
* ltp-fcntl-locktests-tests
* ltp-filecaps-tests
* ltp-fs_bind-tests
* ltp-fs_perms_simple-tests
* ltp-fsx-tests
* ltp-hugetlb-tests
* ltp-ipc-tests
* ltp-math-tests
* ltp-mm-tests
* ltp-nptl-tests
* ltp-pty-tests
* ltp-sched-tests
* ltp-securebits-tests
* ltp-syscalls-tests
* v4l2-compliance
* kvm-unit-tests
* ltp-controllers-tests
* ltp-dio-tests
* ltp-fs-tests
* ltp-io-tests
* network-basic-tests
* perf
* ltp-open-posix-tests
* kselftest-vsyscall-mode-native
* kselftest-vsyscall-mode-native/drivers
* kselftest-vsyscall-mode-native/filesystems
* kselftest-vsyscall-mode-native/net
* kselftest-vsyscall-mode-none
* kselftest-vsyscall-mode-none/drivers
* kselftest-vsyscall-mode-none/filesystems
* kselftest-vsyscall-mode-none/net

-- 
Linaro LKFT
https://lkft.linaro.org


[PATCH RFC] kernel: Implement selective syscall redirection through personality

2020-07-07 Thread Gabriel Krisman Bertazi
The problem I'm trying to solve is that modern Windows applications are
executing system call instructions directly from the application's code
without going through the WinAPI.  This breaks Wine emulation, because
it doesn't have a chance to intercept and emulate these syscalls before
they are submitted to Linux.  There are additional constraints like
performance and inability to dinamically modify the original source
code, which stop us from using regular seccomp filters or patching
userspace.  Those are discussed in the previous discussion in the
mailing list.

The first approach I proposed was a new Seccomp mode to do the trapping
depending on which part of the user memory map issued the syscall. The
main problem with that approach was the use of seccomp for a non-secure
mechanism.  A few other suggestions were made by the community around at
that time:

- A personality mechanism

- A quick redirection to a thunk code in userspace to do the
  syscall filtering in userspace and issue the syscalls from
  a well-known dispatcher

The previous discussion is archived at:
  


I experimented with both approaches and the biggest problem with the
thunk is that native Linux syscalls would also be redirected to
userspace, which added a prohibitive cost for us.  In fact, for quick
syscalls like sysinfo, it almost doubled the execution time of our
benchmarks.  My current understanding is that we cannot do without some
kind of kernel filtering, since it avoids the high overhead to native
Linux syscalls.

A version of the personality mechanism is what I implement in the patch
below.  In order to avoid issuing personality syscalls in each boundary
transition, which we observed to be too prohibitive, it uses a
userspace-defined key to select the personality.  I confess this is a
bit of an awkward interface to me, but it yields very good results.
While it adds a user memory access to every syscall when the mechanism
is enabled, the impact was tiny, even for a small syscall.  More details
in the patch below.

>8

Introduce a mechanism to quickly disable/enable syscall handling for a
specific process and redirect to userspace via SIGSYS.  This is useful
for processes that have different personalities depending on which part
of the application is executing, but who need to perform the personality
switch really fast, without paying the cost of a system call on each
boundary transition.  This is particularly important for Windows games
running over Wine.

The proposed interface looks like this:

  prctl(PR_SET_SYSCALL_DISABLE, , , [fast_selector])

Dispatcher is the address of a syscall instruction that is allowed to
by-pass the blockage, such that in fast paths you don't need to disable
the trap nor check the fast selector.  This is essential to return from
SIGSYS to a blocked area without triggering another SIGSYS from the
rt_sigreturn.

fast-selector is an optional pointer to an aligned int-sized userspace
memory region that has a key switch for the mechanism. The only policy
the kernel enforces on that area is that zero means SYSCALL_ALLOW while
!0 means SYSCALL_BLOCK.

The feature is meant to be set per-thread and it is disabled on
fork/clone/execv.

Internally, this doesn't add overhead to the syscall hot path, and it
requires very little per-architecture support.  I avoided using seccomp,
even though it duplicates some functionality, due to previous feedback
that maybe it shouldn't mix with seccomp since it is not a security
mechanism.  And obviously, this should never be considered a security
mechanism, since any part of the program can by-pass it by using the
syscall dispatcher.

For the sysinfo benchmark, which measures the overhead added to
executing a native syscall that doesn't require interception, the
overhead using only dispatcher to issue syscalls is pretty much
irrelevant.  The overhead of fast-selector goes around 40ns for a
native (untrapped) syscall in my system, and it is (as expected)
dominated by the supervisor-mode user-address access.  In fact, with
SMAP off, the overhead is consistently less than 5ns on my test box.

Right now, it is only supported by x86_64 and x86, but it should be
easily enabled for other architectures.

An example code using this interface can be found at:
  https://gitlab.collabora.com/krisman/syscall-disable-personality

Cc: Matthew Wilcox 
Cc: Andy Lutomirski 
Cc: Paul Gofman 
Cc: Kees Cook 
Signed-off-by: Gabriel Krisman Bertazi 
---
 arch/Kconfig   | 19 +++
 arch/x86/Kconfig   |  1 +
 arch/x86/entry/common.c|  7 +++
 arch/x86/include/asm/thread_info.h |  4 +-
 fs/exec.c  |  4 ++
 include/linux/sched.h  |  5 ++
 include/linux/syscall_disable.h| 29 ++
 include/uapi/asm-generic/siginfo.h |  1 +
 include/uapi/linux/prctl.h |  4 ++
 kernel/Makefile|  1 +
 

Re: [PATCH bpf-next 1/2] bpf: use dedicated bpf_trace_printk event instead of trace_printk()

2020-07-07 Thread Andrii Nakryiko
On Fri, Jul 3, 2020 at 7:47 AM Alan Maguire  wrote:
>
> The bpf helper bpf_trace_printk() uses trace_printk() under the hood.
> This leads to an alarming warning message originating from trace
> buffer allocation which occurs the first time a program using
> bpf_trace_printk() is loaded.
>
> We can instead create a trace event for bpf_trace_printk() and enable
> it in-kernel when/if we encounter a program using the
> bpf_trace_printk() helper.  With this approach, trace_printk()
> is not used directly and no warning message appears.
>
> This work was started by Steven (see Link) and finished by Alan; added
> Steven's Signed-off-by with his permission.
>
> Link: https://lore.kernel.org/r/20200628194334.6238b...@oasis.local.home
> Signed-off-by: Steven Rostedt (VMware) 
> Signed-off-by: Alan Maguire 
> ---
>  kernel/trace/Makefile|  2 ++
>  kernel/trace/bpf_trace.c | 41 +
>  kernel/trace/bpf_trace.h | 34 ++
>  3 files changed, 73 insertions(+), 4 deletions(-)
>  create mode 100644 kernel/trace/bpf_trace.h
>

[...]

> +static DEFINE_SPINLOCK(trace_printk_lock);
> +
> +#define BPF_TRACE_PRINTK_SIZE   1024
> +
> +static inline int bpf_do_trace_printk(const char *fmt, ...)
> +{
> +   static char buf[BPF_TRACE_PRINTK_SIZE];
> +   unsigned long flags;
> +   va_list ap;
> +   int ret;
> +
> +   spin_lock_irqsave(_printk_lock, flags);
> +   va_start(ap, fmt);
> +   ret = vsnprintf(buf, BPF_TRACE_PRINTK_SIZE, fmt, ap);
> +   va_end(ap);
> +   if (ret > 0)
> +   trace_bpf_trace_printk(buf);

Is there any reason to artificially limit the case of printing empty
string? It's kind of an awkward use case, for sure, but having
guarantee that every bpf_trace_printk() invocation triggers tracepoint
is a nice property, no?

> +   spin_unlock_irqrestore(_printk_lock, flags);
> +
> +   return ret;
> +}
> +
>  /*
>   * Only limited trace_printk() conversion specifiers allowed:
>   * %d %i %u %x %ld %li %lu %lx %lld %lli %llu %llx %p %pB %pks %pus %s
> @@ -483,8 +510,7 @@ static void bpf_trace_copy_string(char *buf, void 
> *unsafe_ptr, char fmt_ptype,
>   */
>  #define __BPF_TP_EMIT()__BPF_ARG3_TP()
>  #define __BPF_TP(...)  \
> -   __trace_printk(0 /* Fake ip */, \
> -  fmt, ##__VA_ARGS__)
> +   bpf_do_trace_printk(fmt, ##__VA_ARGS__)
>
>  #define __BPF_ARG1_TP(...) \
> ((mod[0] == 2 || (mod[0] == 1 && __BITS_PER_LONG == 64))\
> @@ -518,13 +544,20 @@ static void bpf_trace_copy_string(char *buf, void 
> *unsafe_ptr, char fmt_ptype,
> .arg2_type  = ARG_CONST_SIZE,
>  };
>
> +int bpf_trace_printk_enabled;

static?

> +
>  const struct bpf_func_proto *bpf_get_trace_printk_proto(void)
>  {
> /*
>  * this program might be calling bpf_trace_printk,
> -* so allocate per-cpu printk buffers
> +* so enable the associated bpf_trace/bpf_trace_printk event.
>  */
> -   trace_printk_init_buffers();
> +   if (!bpf_trace_printk_enabled) {
> +   if (trace_set_clr_event("bpf_trace", "bpf_trace_printk", 1))

just to double check, it's ok to simultaneously enable same event in
parallel, right?

> +   pr_warn_ratelimited("could not enable 
> bpf_trace_printk events");
> +   else
> +   bpf_trace_printk_enabled = 1;
> +   }
>
> return _trace_printk_proto;
>  }

[...]


Re: [PATCH v3 3/3] printk: use the lockless ringbuffer

2020-07-07 Thread lijiang
在 2020年07月03日 19:54, John Ogness 写道:
> On 2020-07-02, lijiang  wrote:
>> About the VMCOREINFO part, I made some tests based on the kernel patch
>> v3, the makedumpfile and crash-utility can work as expected with your
>> patch(userspace patch), but, unfortunately, the
>> vmcore-dmesg(kexec-tools) can't correctly read the printk ring buffer
>> information, and get the following error:
>>
>> "Missing the log_buf symbol"
>>
>> The kexec-tools(vmcore-dmesg) should also have a similar patch, just like
>> in the makedumpfile and crash-utility.
> 
> A patched kexec-tools is available here [0].
> 
> I did not test using 32-bit dumps on 64-bit machines and vice versa. But
> it should work.
> 
> John Ogness
> 
> [0] https://github.com/Linutronix/kexec-tools.git (printk branch)
> 

After applying this patch, the vmcore-dmesg can work.

Thank you, John Ogness.



Re: [PATCH v5 18/25] mm/s390: Use general page fault accounting

2020-07-07 Thread Alexander Gordeev
On Tue, Jul 07, 2020 at 06:50:14PM -0400, Peter Xu wrote:
> Use the general page fault accounting by passing regs into handle_mm_fault().
> It naturally solve the issue of multiple page fault accounting when page fault
> retry happened.
> 
> CC: Heiko Carstens 
> CC: Vasily Gorbik 
> CC: Christian Borntraeger 
> CC: linux-s...@vger.kernel.org
> Reviewed-by: Gerald Schaefer 
> Acked-by: Gerald Schaefer 
> Signed-off-by: Peter Xu 
> ---
>  arch/s390/mm/fault.c | 16 +---
>  1 file changed, 1 insertion(+), 15 deletions(-)
> 
> diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
> index fc14df0b4d6e..9aa201df2e94 100644
> --- a/arch/s390/mm/fault.c
> +++ b/arch/s390/mm/fault.c
> @@ -478,7 +478,7 @@ static inline vm_fault_t do_exception(struct pt_regs 
> *regs, int access)
>* make sure we exit gracefully rather than endlessly redo
>* the fault.
>*/
> - fault = handle_mm_fault(vma, address, flags, NULL);
> + fault = handle_mm_fault(vma, address, flags, regs);
>   if (fault_signal_pending(fault, regs)) {
>   fault = VM_FAULT_SIGNAL;
>   if (flags & FAULT_FLAG_RETRY_NOWAIT)
> @@ -488,21 +488,7 @@ static inline vm_fault_t do_exception(struct pt_regs 
> *regs, int access)
>   if (unlikely(fault & VM_FAULT_ERROR))
>   goto out_up;
>  
> - /*
> -  * Major/minor page fault accounting is only done on the
> -  * initial attempt. If we go through a retry, it is extremely
> -  * likely that the page will be found in page cache at that point.
> -  */
>   if (flags & FAULT_FLAG_ALLOW_RETRY) {

Shouldn't this check ^^^ be dropped as well?

Since commit 4064b9827063 ("mm: allow VM_FAULT_RETRY for multiple times")
FAULT_FLAG_ALLOW_RETRY never gets unset, so no need to check..

> - if (fault & VM_FAULT_MAJOR) {
> - tsk->maj_flt++;
> - perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
> -   regs, address);
> - } else {
> - tsk->min_flt++;
> - perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
> -   regs, address);
> - }
>   if (fault & VM_FAULT_RETRY) {
>   if (IS_ENABLED(CONFIG_PGSTE) && gmap &&
>   (flags & FAULT_FLAG_RETRY_NOWAIT)) {
> -- 
> 2.26.2
> 


Re: [PATCH v2 1/3] arm64/numa: export memory_add_physaddr_to_nid as EXPORT_SYMBOL_GPL

2020-07-07 Thread Dan Williams
On Tue, Jul 7, 2020 at 10:33 PM Mike Rapoport  wrote:
>
> On Tue, Jul 07, 2020 at 08:56:36PM -0700, Dan Williams wrote:
> > On Tue, Jul 7, 2020 at 7:20 PM Justin He  wrote:
> > >
> > > Hi Michal and David
> > >
> > > > -Original Message-
> > > > From: Michal Hocko 
> > > > Sent: Tuesday, July 7, 2020 7:55 PM
> > > > To: Justin He 
> > > > Cc: Catalin Marinas ; Will Deacon
> > > > ; Dan Williams ; Vishal Verma
> > > > ; Dave Jiang ; Andrew
> > > > Morton ; Mike Rapoport ;
> > > > Baoquan He ; Chuhong Yuan ; 
> > > > linux-
> > > > arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> > > > m...@kvack.org; linux-nvd...@lists.01.org; Kaly Xin 
> > > > Subject: Re: [PATCH v2 1/3] arm64/numa: export 
> > > > memory_add_physaddr_to_nid
> > > > as EXPORT_SYMBOL_GPL
> > > >
> > > > On Tue 07-07-20 13:59:15, Jia He wrote:
> > > > > This exports memory_add_physaddr_to_nid() for module driver to use.
> > > > >
> > > > > memory_add_physaddr_to_nid() is a fallback option to get the nid in 
> > > > > case
> > > > > NUMA_NO_NID is detected.
> > > > >
> > > > > Suggested-by: David Hildenbrand 
> > > > > Signed-off-by: Jia He 
> > > > > ---
> > > > >  arch/arm64/mm/numa.c | 5 +++--
> > > > >  1 file changed, 3 insertions(+), 2 deletions(-)
> > > > >
> > > > > diff --git a/arch/arm64/mm/numa.c b/arch/arm64/mm/numa.c
> > > > > index aafcee3e3f7e..7eeb31740248 100644
> > > > > --- a/arch/arm64/mm/numa.c
> > > > > +++ b/arch/arm64/mm/numa.c
> > > > > @@ -464,10 +464,11 @@ void __init arm64_numa_init(void)
> > > > >
> > > > >  /*
> > > > >   * We hope that we will be hotplugging memory on nodes we already 
> > > > > know
> > > > about,
> > > > > - * such that acpi_get_node() succeeds and we never fall back to 
> > > > > this...
> > > > > + * such that acpi_get_node() succeeds. But when SRAT is not present,
> > > > the node
> > > > > + * id may be probed as NUMA_NO_NODE by acpi, Here provide a fallback
> > > > option.
> > > > >   */
> > > > >  int memory_add_physaddr_to_nid(u64 addr)
> > > > >  {
> > > > > -   pr_warn("Unknown node for memory at 0x%llx, assuming node 0\n",
> > > > addr);
> > > > > return 0;
> > > > >  }
> > > > > +EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
> > > >
> > > > Does it make sense to export a noop function? Wouldn't make more sense
> > > > to simply make it static inline somewhere in a header? I haven't checked
> > > > whether there is an easy way to do that sanely bu this just hit my eyes.
> > >
> > > Okay, I can make a change in memory_hotplug.h, sth like:
> > > --- a/include/linux/memory_hotplug.h
> > > +++ b/include/linux/memory_hotplug.h
> > > @@ -149,13 +149,13 @@ int add_pages(int nid, unsigned long start_pfn, 
> > > unsigned long nr_pages,
> > >   struct mhp_params *params);
> > >  #endif /* ARCH_HAS_ADD_PAGES */
> > >
> > > -#ifdef CONFIG_NUMA
> > > -extern int memory_add_physaddr_to_nid(u64 start);
> > > -#else
> > > +#if !defined(CONFIG_NUMA) || !defined(memory_add_physaddr_to_nid)
> > >  static inline int memory_add_physaddr_to_nid(u64 start)
> > >  {
> > > return 0;
> > >  }
> > > +#else
> > > +extern int memory_add_physaddr_to_nid(u64 start);
> > >  #endif
> > >
> > > And then check the memory_add_physaddr_to_nid() helper on all arches,
> > > if it is noop(return 0), I can simply remove it.
> > > if it is not noop, after the helper,
> > > #define memory_add_physaddr_to_nid
> > >
> > > What do you think of this proposal?
> >
> > Especially for architectures that use memblock info for numa info
> > (which seems to be everyone except x86) why not implement a generic
> > memory_add_physaddr_to_nid() that does:
>
> That would be only arm64.
>

Darn, I saw ARCH_KEEP_MEMBLOCK and had delusions of grandeur that it
could solve my numa api woes. At least for x86 the problem is already
solved with reserved numa_meminfo, but now I'm trying to write generic
drivers that use those apis and finding these gaps on other archs.


Re: [PATCH][next] IB/hfi1: Use fallthrough pseudo-keyword

2020-07-07 Thread Leon Romanovsky
On Tue, Jul 07, 2020 at 12:39:42PM -0500, Gustavo A. R. Silva wrote:
> Replace the existing /* fall through */ comments and its variants with
> the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary
> fall-through markings when it is the case.
>
> [1] 
> https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through
>
> Signed-off-by: Gustavo A. R. Silva 
> ---
>  drivers/infiniband/hw/hfi1/chip.c |8 
>  drivers/infiniband/hw/hfi1/firmware.c |   16 
>  drivers/infiniband/hw/hfi1/mad.c  |9 -
>  drivers/infiniband/hw/hfi1/pio.c  |2 +-
>  drivers/infiniband/hw/hfi1/pio_copy.c |   12 ++--
>  drivers/infiniband/hw/hfi1/platform.c |   10 +-
>  drivers/infiniband/hw/hfi1/qp.c   |2 +-
>  drivers/infiniband/hw/hfi1/qsfp.c |4 ++--
>  drivers/infiniband/hw/hfi1/rc.c   |   25 -
>  drivers/infiniband/hw/hfi1/sdma.c |9 -
>  drivers/infiniband/hw/hfi1/tid_rdma.c |4 ++--
>  drivers/infiniband/hw/hfi1/uc.c   |8 
>  12 files changed, 45 insertions(+), 64 deletions(-)
>
> diff --git a/drivers/infiniband/hw/hfi1/chip.c 
> b/drivers/infiniband/hw/hfi1/chip.c
> index 15f9c635f292..132f1df6f23b 100644
> --- a/drivers/infiniband/hw/hfi1/chip.c
> +++ b/drivers/infiniband/hw/hfi1/chip.c
> @@ -7320,7 +7320,7 @@ static u16 link_width_to_bits(struct hfi1_devdata *dd, 
> u16 width)
>   default:
>   dd_dev_info(dd, "%s: invalid width %d, using 4\n",
>   __func__, width);
> - /* fall through */
> + fallthrough;
>   case 4: return OPA_LINK_WIDTH_4X;

"case ..:" after "default:" ???
IMHO, it should be written in more standard way.

>   }
>  }
> @@ -7380,7 +7380,7 @@ static void get_link_widths(struct hfi1_devdata *dd, 
> u16 *tx_width,
>   dd_dev_err(dd,
>  "%s: unexpected max rate %d, using 25Gb\n",
>  __func__, (int)max_rate);
> - /* fall through */
> + fallthrough;
>   case 1:
>   dd->pport[0].link_speed_active = OPA_LINK_SPEED_25G;
>   break;
> @@ -12882,7 +12882,7 @@ static u32 chip_to_opa_lstate(struct hfi1_devdata 
> *dd, u32 chip_lstate)
>   dd_dev_err(dd,
>  "Unknown logical state 0x%x, reporting 
> IB_PORT_DOWN\n",
>  chip_lstate);
> - /* fall through */
> + fallthrough;
>   case LSTATE_DOWN:
>   return IB_PORT_DOWN;
>   case LSTATE_INIT:
> @@ -12901,7 +12901,7 @@ u32 chip_to_opa_pstate(struct hfi1_devdata *dd, u32 
> chip_pstate)
>   default:
>   dd_dev_err(dd, "Unexpected chip physical state of 0x%x\n",
>  chip_pstate);
> - /* fall through */
> + fallthrough;
>   case PLS_DISABLED:
>   return IB_PORTPHYSSTATE_DISABLED;
>   case PLS_OFFLINE:

same comment.


> diff --git a/drivers/infiniband/hw/hfi1/firmware.c 
> b/drivers/infiniband/hw/hfi1/firmware.c
> index 2b57ba70ddd6..0e83d4b61e46 100644
> --- a/drivers/infiniband/hw/hfi1/firmware.c
> +++ b/drivers/infiniband/hw/hfi1/firmware.c
> @@ -1868,11 +1868,8 @@ int parse_platform_config(struct hfi1_devdata *dd)
>   2;
>   break;
>   case PLATFORM_CONFIG_RX_PRESET_TABLE:
> - /* fall through */
>   case PLATFORM_CONFIG_TX_PRESET_TABLE:
> - /* fall through */
>   case PLATFORM_CONFIG_QSFP_ATTEN_TABLE:
> - /* fall through */
>   case PLATFORM_CONFIG_VARIABLE_SETTINGS_TABLE:
>   pcfgcache->config_tables[table_type].num_table =
>   table_length_dwords;
> @@ -1890,15 +1887,10 @@ int parse_platform_config(struct hfi1_devdata *dd)
>   /* metadata table */
>   switch (table_type) {
>   case PLATFORM_CONFIG_SYSTEM_TABLE:
> - /* fall through */
>   case PLATFORM_CONFIG_PORT_TABLE:
> - /* fall through */
>   case PLATFORM_CONFIG_RX_PRESET_TABLE:
> - /* fall through */
>   case PLATFORM_CONFIG_TX_PRESET_TABLE:
> - /* fall through */
>   case PLATFORM_CONFIG_QSFP_ATTEN_TABLE:
> - /* fall through */
>   case PLATFORM_CONFIG_VARIABLE_SETTINGS_TABLE:
>   break;
>   default:
> 

[PATCH 1/1] riscv: Enable compiler optimizations

2020-07-07 Thread Chenxi Mao
Enable ARCH_HAS_FAST_MULTIPLIER and ARCH_SUPPORTS_INT128 for better
code generation.
These 2 configurations works fine on GCC-9.3 and GCC-10.1

Signed-off-by: Chenxi Mao 
---
 arch/riscv/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 128192e14ff2..f21b7e5188ca 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -26,6 +26,8 @@ config RISCV
select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
select ARCH_WANT_FRAME_POINTERS
select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
+   select ARCH_HAS_FAST_MULTIPLIER
+   select ARCH_SUPPORTS_INT128 if GCC_VERSION >= 5 || CC_IS_CLANG
select CLONE_BACKWARDS
select COMMON_CLK
select EDAC_SUPPORT
-- 
2.25.1



Re: [PATCH v2 2/3] xen/privcmd: Mark pages as dirty

2020-07-07 Thread Jürgen Groß

On 07.07.20 21:30, John Hubbard wrote:

On 2020-07-07 04:43, Jürgen Groß wrote:

On 07.07.20 13:30, Souptick Joarder wrote:

On Tue, Jul 7, 2020 at 3:08 PM Jürgen Groß  wrote:

...

diff --git a/drivers/xen/privcmd.c b/drivers/xen/privcmd.c
index 33677ea..f6c1543 100644
--- a/drivers/xen/privcmd.c
+++ b/drivers/xen/privcmd.c
@@ -612,8 +612,11 @@ static void unlock_pages(struct page *pages[], 
unsigned int nr_pages)

   {
   unsigned int i;

- for (i = 0; i < nr_pages; i++)
+ for (i = 0; i < nr_pages; i++) {
+ if (!PageDirty(pages[i]))
+ set_page_dirty_lock(pages[i]);


With put_page() directly following I think you should be able to use
set_page_dirty() instead, as there is obviously a reference to the page
existing.


Patch [3/3] will convert above codes to use 
unpin_user_pages_dirty_lock()
which internally do the same check. So I thought to keep linux-stable 
and
linux-next code in sync. John had a similar concern [1] and later 
agreed to keep

this check.

Shall I keep this check ?  No ?


It doesn't matter *too* much, because patch 3/3 fixes up everything by
changing it all to unpin_user_pages_dirty_lock(). However, there is 
something

to be said for having correct interim patches, too. :)  Details:



[1] 
https://lore.kernel.org/xen-devel/a750e5e5-fd5d-663b-c5fd-261d7c939...@nvidia.com/ 



I wasn't referring to checking PageDirty(), but to the use of
set_page_dirty_lock().

Looking at the comment just before the implementation of
set_page_dirty_lock() suggests that it is fine to use set_page_dirty()
instead (so not calling lock_page()).



no no, that's a misreading of the comment. Unless this xen/privcmd code has
somehow taken a reference on page->mapping->host (which I do *not* think is
the case), then it is still racy to call set_page_dirty() here. Instead,
set_page_dirty_lock() should be used.


Ah, okay. Thanks for the clarification.

So you can add my

Reviewed-by: Juergen Gross 


Juergen


Re: [PATCH v3 09/13] ASoC: ti: omap-mcbsp-st: Remove set, but unused variable 'w'

2020-07-07 Thread Peter Ujfalusi



On 07/07/2020 22.06, Pierre-Louis Bossart wrote:
> From: Lee Jones 
> 
> Looks like 'w' has remained unchecked since the driver's inception.
> 
> Fixes the following W=1 kernel build warning(s):
> 
>  sound/soc/ti/omap-mcbsp-st.c: In function ‘omap_mcbsp_st_chgain’:
>  sound/soc/ti/omap-mcbsp-st.c:145:6: warning: variable ‘w’ set but not used 
> [-Wunused-but-set-variable]
> 
> Peter suggested that the whole read can be removed, so that's
> been done too.

Thank you,

Acked-by: Peter Ujfalusi 

> 
> Cc: Peter Ujfalusi 
> Cc: Jarkko Nikula 
> Cc: Samuel Ortiz 
> Cc: linux-o...@vger.kernel.org
> Signed-off-by: Lee Jones 
> Signed-off-by: Pierre-Louis Bossart 
> ---
>  sound/soc/ti/omap-mcbsp-st.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/sound/soc/ti/omap-mcbsp-st.c b/sound/soc/ti/omap-mcbsp-st.c
> index 5a32b54bbf3b..0bc7d26c660a 100644
> --- a/sound/soc/ti/omap-mcbsp-st.c
> +++ b/sound/soc/ti/omap-mcbsp-st.c
> @@ -142,11 +142,8 @@ static void omap_mcbsp_st_fir_write(struct omap_mcbsp 
> *mcbsp, s16 *fir)
>  
>  static void omap_mcbsp_st_chgain(struct omap_mcbsp *mcbsp)
>  {
> - u16 w;
>   struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
>  
> - w = MCBSP_ST_READ(mcbsp, SSELCR);
> -
>   MCBSP_ST_WRITE(mcbsp, SGAINCR, ST_CH0GAIN(st_data->ch0gain) |
>  ST_CH1GAIN(st_data->ch1gain));
>  }
> 

- Péter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki



[rcu:lkmm-dev] BUILD SUCCESS 5ce63058b5de1c24d39bfab01ea47c6141dbb275

2020-07-07 Thread kernel test robot
tree/branch: 
https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git  lkmm-dev
branch HEAD: 5ce63058b5de1c24d39bfab01ea47c6141dbb275  tools/memory-model: Use 
"-unroll 0" to keep --hw runs finite

elapsed time: 723m

configs tested: 98
configs skipped: 1

The following configs have been built successfully.
More configs may be tested in the coming days.

arm defconfig
arm  allyesconfig
arm  allmodconfig
arm   allnoconfig
arm64allyesconfig
arm64   defconfig
arm64allmodconfig
arm64 allnoconfig
i386  allnoconfig
i386 allyesconfig
i386defconfig
i386  debian-10.3
ia64 allmodconfig
ia64defconfig
ia64  allnoconfig
ia64 allyesconfig
m68k allmodconfig
m68k  allnoconfig
m68k   sun3_defconfig
m68kdefconfig
m68k allyesconfig
nios2   defconfig
nios2allyesconfig
openriscdefconfig
c6x  allyesconfig
c6x   allnoconfig
openrisc allyesconfig
nds32   defconfig
nds32 allnoconfig
csky allyesconfig
cskydefconfig
alpha   defconfig
alphaallyesconfig
xtensa   allyesconfig
h8300allyesconfig
h8300allmodconfig
xtensa  defconfig
arc defconfig
arc  allyesconfig
sh   allmodconfig
shallnoconfig
microblazeallnoconfig
mips allyesconfig
mips  allnoconfig
mips allmodconfig
pariscallnoconfig
parisc  defconfig
parisc   allyesconfig
parisc   allmodconfig
powerpc defconfig
powerpc  allyesconfig
powerpc  rhel-kconfig
powerpc  allmodconfig
powerpc   allnoconfig
i386 randconfig-a001-20200707
i386 randconfig-a002-20200707
i386 randconfig-a006-20200707
i386 randconfig-a004-20200707
i386 randconfig-a005-20200707
i386 randconfig-a003-20200707
x86_64   randconfig-a012-20200707
x86_64   randconfig-a016-20200707
x86_64   randconfig-a014-20200707
x86_64   randconfig-a011-20200707
x86_64   randconfig-a015-20200707
x86_64   randconfig-a013-20200707
i386 randconfig-a011-20200707
i386 randconfig-a014-20200707
i386 randconfig-a015-20200707
i386 randconfig-a016-20200707
i386 randconfig-a012-20200707
i386 randconfig-a013-20200707
riscvallyesconfig
riscv allnoconfig
riscv   defconfig
riscvallmodconfig
s390 allyesconfig
s390  allnoconfig
s390 allmodconfig
s390defconfig
sparcallyesconfig
sparc   defconfig
sparc64 defconfig
sparc64   allnoconfig
sparc64  allyesconfig
sparc64  allmodconfig
umallnoconfig
um  defconfig
um   allmodconfig
um   allyesconfig
x86_64   rhel-7.6
x86_64rhel-7.6-kselftests
x86_64   rhel-8.3
x86_64  kexec
x86_64   rhel
x86_64 rhel-7.2-clear
x86_64lkp
x86_64  fedora-25

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


[rcu:lkmm] BUILD SUCCESS 5ef0a07a7928539d46fdb163acfad28c6d877a89

2020-07-07 Thread kernel test robot
tree/branch: 
https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git  lkmm
branch HEAD: 5ef0a07a7928539d46fdb163acfad28c6d877a89  
Documentation/litmus-tests: Add note on herd7 7.56 in atomic litmus test

elapsed time: 723m

configs tested: 98
configs skipped: 1

The following configs have been built successfully.
More configs may be tested in the coming days.

arm defconfig
arm  allyesconfig
arm  allmodconfig
arm   allnoconfig
arm64allyesconfig
arm64   defconfig
arm64allmodconfig
arm64 allnoconfig
i386  allnoconfig
i386 allyesconfig
i386defconfig
i386  debian-10.3
ia64 allmodconfig
ia64defconfig
ia64  allnoconfig
ia64 allyesconfig
m68k allmodconfig
m68k  allnoconfig
m68k   sun3_defconfig
m68kdefconfig
m68k allyesconfig
nios2   defconfig
nios2allyesconfig
openriscdefconfig
c6x  allyesconfig
c6x   allnoconfig
openrisc allyesconfig
nds32   defconfig
nds32 allnoconfig
csky allyesconfig
cskydefconfig
alpha   defconfig
alphaallyesconfig
xtensa   allyesconfig
h8300allyesconfig
h8300allmodconfig
xtensa  defconfig
arc defconfig
arc  allyesconfig
sh   allmodconfig
shallnoconfig
microblazeallnoconfig
mips allyesconfig
mips  allnoconfig
mips allmodconfig
pariscallnoconfig
parisc  defconfig
parisc   allyesconfig
parisc   allmodconfig
powerpc defconfig
powerpc  allyesconfig
powerpc  rhel-kconfig
powerpc  allmodconfig
powerpc   allnoconfig
i386 randconfig-a001-20200707
i386 randconfig-a002-20200707
i386 randconfig-a006-20200707
i386 randconfig-a004-20200707
i386 randconfig-a005-20200707
i386 randconfig-a003-20200707
x86_64   randconfig-a012-20200707
x86_64   randconfig-a016-20200707
x86_64   randconfig-a014-20200707
x86_64   randconfig-a011-20200707
x86_64   randconfig-a015-20200707
x86_64   randconfig-a013-20200707
i386 randconfig-a011-20200707
i386 randconfig-a014-20200707
i386 randconfig-a015-20200707
i386 randconfig-a016-20200707
i386 randconfig-a012-20200707
i386 randconfig-a013-20200707
riscvallyesconfig
riscv allnoconfig
riscv   defconfig
riscvallmodconfig
s390 allyesconfig
s390  allnoconfig
s390 allmodconfig
s390defconfig
sparcallyesconfig
sparc   defconfig
sparc64 defconfig
sparc64   allnoconfig
sparc64  allyesconfig
sparc64  allmodconfig
umallnoconfig
um  defconfig
um   allmodconfig
um   allyesconfig
x86_64   rhel-7.6
x86_64rhel-7.6-kselftests
x86_64   rhel-8.3
x86_64  kexec
x86_64   rhel
x86_64 rhel-7.2-clear
x86_64lkp
x86_64  fedora-25

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01

[rcu:kcsan] BUILD SUCCESS 61d56d7aa5eca3b909bce51ba8125b0fa44d7e17

2020-07-07 Thread kernel test robot
tree/branch: 
https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git  kcsan
branch HEAD: 61d56d7aa5eca3b909bce51ba8125b0fa44d7e17  kcsan: Disable branch 
tracing in core runtime

elapsed time: 723m

configs tested: 98
configs skipped: 1

The following configs have been built successfully.
More configs may be tested in the coming days.

arm defconfig
arm  allyesconfig
arm  allmodconfig
arm   allnoconfig
arm64allyesconfig
arm64   defconfig
arm64allmodconfig
arm64 allnoconfig
i386  allnoconfig
i386 allyesconfig
i386defconfig
i386  debian-10.3
ia64 allmodconfig
ia64defconfig
ia64  allnoconfig
ia64 allyesconfig
m68k allmodconfig
m68k  allnoconfig
m68k   sun3_defconfig
m68kdefconfig
m68k allyesconfig
nios2   defconfig
nios2allyesconfig
openriscdefconfig
c6x  allyesconfig
c6x   allnoconfig
openrisc allyesconfig
nds32   defconfig
nds32 allnoconfig
csky allyesconfig
cskydefconfig
alpha   defconfig
alphaallyesconfig
xtensa   allyesconfig
h8300allyesconfig
h8300allmodconfig
xtensa  defconfig
arc defconfig
arc  allyesconfig
sh   allmodconfig
shallnoconfig
microblazeallnoconfig
mips allyesconfig
mips  allnoconfig
mips allmodconfig
pariscallnoconfig
parisc  defconfig
parisc   allyesconfig
parisc   allmodconfig
powerpc defconfig
powerpc  allyesconfig
powerpc  rhel-kconfig
powerpc  allmodconfig
powerpc   allnoconfig
i386 randconfig-a001-20200707
i386 randconfig-a002-20200707
i386 randconfig-a006-20200707
i386 randconfig-a004-20200707
i386 randconfig-a005-20200707
i386 randconfig-a003-20200707
x86_64   randconfig-a012-20200707
x86_64   randconfig-a016-20200707
x86_64   randconfig-a014-20200707
x86_64   randconfig-a011-20200707
x86_64   randconfig-a015-20200707
x86_64   randconfig-a013-20200707
i386 randconfig-a011-20200707
i386 randconfig-a014-20200707
i386 randconfig-a015-20200707
i386 randconfig-a016-20200707
i386 randconfig-a012-20200707
i386 randconfig-a013-20200707
riscvallyesconfig
riscv allnoconfig
riscv   defconfig
riscvallmodconfig
s390 allyesconfig
s390  allnoconfig
s390 allmodconfig
s390defconfig
sparcallyesconfig
sparc   defconfig
sparc64 defconfig
sparc64   allnoconfig
sparc64  allyesconfig
sparc64  allmodconfig
umallnoconfig
um  defconfig
um   allmodconfig
um   allyesconfig
x86_64   rhel-7.6
x86_64rhel-7.6-kselftests
x86_64   rhel-8.3
x86_64  kexec
x86_64   rhel
x86_64 rhel-7.2-clear
x86_64lkp
x86_64  fedora-25

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


Re: [PATCH] rds: send: Replace sg++ with sg = sg_next(sg)

2020-07-07 Thread Leon Romanovsky
On Wed, Jul 08, 2020 at 03:42:52AM +, Xu Wang wrote:
> Replace sg++ with sg = sg_next(sg).
>
> Signed-off-by: Xu Wang 
> ---
>  net/rds/send.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/net/rds/send.c b/net/rds/send.c
> index 68e2bdb08fd0..57d03a6753de 100644
> --- a/net/rds/send.c
> +++ b/net/rds/send.c
> @@ -387,7 +387,7 @@ int rds_send_xmit(struct rds_conn_path *cp)
>   ret -= tmp;
>   if (cp->cp_xmit_data_off == sg->length) {
>   cp->cp_xmit_data_off = 0;
> - sg++;
> + sg = sg_next(sg);

What about rest cases?

➜  kernel git:(rdma-next) git grep "sg++" net/rds/
net/rds/message.c:  sg++;
net/rds/message.c:  sg++;
net/rds/message.c:  sg++;
net/rds/send.c: sg++;
net/rds/tcp_send.c: sg++;

Thanks

>   cp->cp_xmit_sg++;
>   BUG_ON(ret != 0 && cp->cp_xmit_sg ==
>  rm->data.op_nents);
> --
> 2.17.1
>


RE: [EXT] [PATCH 4/5] net: fec: get rid of redundant code in fec_ptp_set()

2020-07-07 Thread Andy Duan
From: Sergey Organov  Sent: Tuesday, July 7, 2020 10:43 PM
> Andy Duan  writes:
> 
> > From: Sergey Organov  Sent: Monday, July 6, 2020
> 10:26 PM
> >> Code of the form "if(x) x = 0" replaced with "x = 0".
> >>
> >> Code of the form "if(x == a) x = a" removed.
> >>
> >> Signed-off-by: Sergey Organov 
> >> ---
> >>  drivers/net/ethernet/freescale/fec_ptp.c | 4 +---
> >>  1 file changed, 1 insertion(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/net/ethernet/freescale/fec_ptp.c
> >> b/drivers/net/ethernet/freescale/fec_ptp.c
> >> index e455343..4152cae 100644
> >> --- a/drivers/net/ethernet/freescale/fec_ptp.c
> >> +++ b/drivers/net/ethernet/freescale/fec_ptp.c
> >> @@ -485,9 +485,7 @@ int fec_ptp_set(struct net_device *ndev, struct
> ifreq
> >> *ifr)
> >>
> >> switch (config.rx_filter) {
> >> case HWTSTAMP_FILTER_NONE:
> >> -   if (fep->hwts_rx_en)
> >> -   fep->hwts_rx_en = 0;
> >> -   config.rx_filter = HWTSTAMP_FILTER_NONE;
> > The line should keep according your commit log.
> 
> You mean I should fix commit log like this:
> 
> Code of the form "switch(x) case a: x = a; break" removed.
> 
> ?
Like this:

case HWTSTAMP_FILTER_NONE:
fep->hwts_rx_en = 0;
config.rx_filter = HWTSTAMP_FILTER_NONE;
break;
> 
> I'll do if it's cleaner that way.
> 
> Thanks,
> -- Sergey
> 
> 
> >
> >> +   fep->hwts_rx_en = 0;
> >> break;
> >>
> >> default:
> >> --
> >> 2.10.0.1.g57b01a3


Re: [PATCH v2 1/3] arm64/numa: export memory_add_physaddr_to_nid as EXPORT_SYMBOL_GPL

2020-07-07 Thread Mike Rapoport
On Tue, Jul 07, 2020 at 08:56:36PM -0700, Dan Williams wrote:
> On Tue, Jul 7, 2020 at 7:20 PM Justin He  wrote:
> >
> > Hi Michal and David
> >
> > > -Original Message-
> > > From: Michal Hocko 
> > > Sent: Tuesday, July 7, 2020 7:55 PM
> > > To: Justin He 
> > > Cc: Catalin Marinas ; Will Deacon
> > > ; Dan Williams ; Vishal Verma
> > > ; Dave Jiang ; Andrew
> > > Morton ; Mike Rapoport ;
> > > Baoquan He ; Chuhong Yuan ; linux-
> > > arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> > > m...@kvack.org; linux-nvd...@lists.01.org; Kaly Xin 
> > > Subject: Re: [PATCH v2 1/3] arm64/numa: export memory_add_physaddr_to_nid
> > > as EXPORT_SYMBOL_GPL
> > >
> > > On Tue 07-07-20 13:59:15, Jia He wrote:
> > > > This exports memory_add_physaddr_to_nid() for module driver to use.
> > > >
> > > > memory_add_physaddr_to_nid() is a fallback option to get the nid in case
> > > > NUMA_NO_NID is detected.
> > > >
> > > > Suggested-by: David Hildenbrand 
> > > > Signed-off-by: Jia He 
> > > > ---
> > > >  arch/arm64/mm/numa.c | 5 +++--
> > > >  1 file changed, 3 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/arch/arm64/mm/numa.c b/arch/arm64/mm/numa.c
> > > > index aafcee3e3f7e..7eeb31740248 100644
> > > > --- a/arch/arm64/mm/numa.c
> > > > +++ b/arch/arm64/mm/numa.c
> > > > @@ -464,10 +464,11 @@ void __init arm64_numa_init(void)
> > > >
> > > >  /*
> > > >   * We hope that we will be hotplugging memory on nodes we already know
> > > about,
> > > > - * such that acpi_get_node() succeeds and we never fall back to this...
> > > > + * such that acpi_get_node() succeeds. But when SRAT is not present,
> > > the node
> > > > + * id may be probed as NUMA_NO_NODE by acpi, Here provide a fallback
> > > option.
> > > >   */
> > > >  int memory_add_physaddr_to_nid(u64 addr)
> > > >  {
> > > > -   pr_warn("Unknown node for memory at 0x%llx, assuming node 0\n",
> > > addr);
> > > > return 0;
> > > >  }
> > > > +EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
> > >
> > > Does it make sense to export a noop function? Wouldn't make more sense
> > > to simply make it static inline somewhere in a header? I haven't checked
> > > whether there is an easy way to do that sanely bu this just hit my eyes.
> >
> > Okay, I can make a change in memory_hotplug.h, sth like:
> > --- a/include/linux/memory_hotplug.h
> > +++ b/include/linux/memory_hotplug.h
> > @@ -149,13 +149,13 @@ int add_pages(int nid, unsigned long start_pfn, 
> > unsigned long nr_pages,
> >   struct mhp_params *params);
> >  #endif /* ARCH_HAS_ADD_PAGES */
> >
> > -#ifdef CONFIG_NUMA
> > -extern int memory_add_physaddr_to_nid(u64 start);
> > -#else
> > +#if !defined(CONFIG_NUMA) || !defined(memory_add_physaddr_to_nid)
> >  static inline int memory_add_physaddr_to_nid(u64 start)
> >  {
> > return 0;
> >  }
> > +#else
> > +extern int memory_add_physaddr_to_nid(u64 start);
> >  #endif
> >
> > And then check the memory_add_physaddr_to_nid() helper on all arches,
> > if it is noop(return 0), I can simply remove it.
> > if it is not noop, after the helper,
> > #define memory_add_physaddr_to_nid
> >
> > What do you think of this proposal?
> 
> Especially for architectures that use memblock info for numa info
> (which seems to be everyone except x86) why not implement a generic
> memory_add_physaddr_to_nid() that does:

That would be only arm64.

> int memory_add_physaddr_to_nid(u64 addr)
> {
> unsigned long start_pfn, end_pfn, pfn = PHYS_PFN(addr);
> int nid;
> 
> for_each_online_node(nid) {
> get_pfn_range_for_nid(nid, _pfn, _pfn);
> if (pfn >= start_pfn && pfn <= end_pfn)
> return nid;
> }
> return NUMA_NO_NODE;
> }

-- 
Sincerely yours,
Mike.


Re: [PATCH 5.4 00/65] 5.4.51-rc1 review

2020-07-07 Thread Naresh Kamboju
On Tue, 7 Jul 2020 at 20:49, Greg Kroah-Hartman
 wrote:
>
> This is the start of the stable review cycle for the 5.4.51 release.
> There are 65 patches in this series, all will be posted as a response
> to this one.  If anyone has any issues with these being applied, please
> let me know.
>
> Responses should be made by Thu, 09 Jul 2020 14:57:34 +.
> Anything received after that time might be too late.
>
> The whole patch series can be found in one patch at:
> 
> https://www.kernel.org/pub/linux/kernel/v5.x/stable-review/patch-5.4.51-rc1.gz
> or in the git tree and branch at:
> 
> git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git 
> linux-5.4.y
> and the diffstat can be found below.
>
> thanks,
>
> greg k-h

Results from Linaro’s test farm.
No regressions on arm64, arm, x86_64, and i386.

Summary


kernel: 5.4.51-rc1
git repo: 
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git
git branch: linux-5.4.y
git commit: 47d410b54275a08dfc16b90353866ac1f783c0aa
git describe: v5.4.49-240-g47d410b54275
Test details: 
https://qa-reports.linaro.org/lkft/linux-stable-rc-5.4-oe/build/v5.4.49-240-g47d410b54275

No regressions (compared to build v5.4.49)

No fixes (compared to build v5.4.49)

Ran 35614 total tests in the following environments and test suites.

Environments
--
- dragonboard-410c
- hi6220-hikey
- i386
- juno-r2
- juno-r2-compat
- juno-r2-kasan
- nxp-ls2088
- qemu_arm
- qemu_arm64
- qemu_i386
- qemu_x86_64
- x15
- x86
- x86-kasan

Test Suites
---
* install-android-platform-tools-r2800
* libhugetlbfs
* linux-log-parser
* ltp-cap_bounds-tests
* ltp-commands-tests
* ltp-cpuhotplug-tests
* ltp-crypto-tests
* ltp-cve-tests
* ltp-hugetlb-tests
* ltp-math-tests
* ltp-mm-tests
* ltp-sched-tests
* v4l2-compliance
* kvm-unit-tests
* ltp-containers-tests
* ltp-controllers-tests
* ltp-dio-tests
* ltp-fcntl-locktests-tests
* ltp-filecaps-tests
* ltp-fs-tests
* ltp-fs_bind-tests
* ltp-fs_perms_simple-tests
* ltp-fsx-tests
* ltp-io-tests
* ltp-ipc-tests
* ltp-nptl-tests
* ltp-pty-tests
* ltp-securebits-tests
* ltp-syscalls-tests
* network-basic-tests
* ltp-open-posix-tests

-- 
Linaro LKFT
https://lkft.linaro.org


Re: [PATCH v2] pinctrl: qcom: sc7180: Make gpio28 non wakeup capable for google,lazor

2020-07-07 Thread Maulik Shah

Hi,

On 7/8/2020 4:33 AM, Doug Anderson wrote:

Hi,

On Mon, Jul 6, 2020 at 9:52 PM Rajendra Nayak  wrote:


[]..


@@ -1151,6 +1168,10 @@ static const struct msm_pinctrl_soc_data sc7180_pinctrl 
= {

   static int sc7180_pinctrl_probe(struct platform_device *pdev)
   {
+   if (of_machine_is_compatible("google,lazor")) {
+   sc7180_pinctrl.wakeirq_map = sc7180_lazor_pdc_map;
+   sc7180_pinctrl.nwakeirq_map = ARRAY_SIZE(sc7180_lazor_pdc_map);
+   }

As much as I want patches landed and things working, the above just
doesn't feel like a viable solution.  I guess it could work as a short
term hack but it's going to become untenable pretty quickly.

I second that.


As we
have more variants of this we're going to have to just keep piling
more machines in here, right?  ...this is also already broken for us
because not all boards will have the "google,lazor" compatible.  From
the current Chrome OS here are the compatibles for various revs/SKUs

compatible = "google,lazor-rev0", "qcom,sc7180";
compatible = "google,lazor-rev0-sku0", "qcom,sc7180";
compatible = "google,lazor", "qcom,sc7180";
compatible = "google,lazor-sku0", "qcom,sc7180";
compatible = "google,lazor-rev2", "qcom,sc7180";

...so of the 5 boards you'll only match one of them.


Maybe I'm jumping into a situation again where I'm ignorant since I
haven't followed all the prior conversation, but is it really that
hard to just add dual edge support to the PDC irqchip driver?  ...or

FWIK, this is really a PDC hardware issue (with the specific IP rev that exists
on sc7180) so working it around in SW could get ugly.

Ugh.  I guess it's ugly because the workaround would need to be in the
PDC driver but to properly do the workaround you need to be able to
read the state of the pin from the PDC driver?  ...and I guess you
can't do that with the PDC register space so you'd either need to
violate a layer or 3 of abstraction and snarf into the GPIO register
space from the PDC driver or you'd have to provide some sort of API
access from the PDC back down to the GPIO driver?

--

Actually, though, I'm still not sure why this would need to be in the
PDC driver.  Sure, you can't just magically re-use the existing
dual-edge emulation in pinctrl-msm.c, but you can add some new
dual-edge emulation for when your parent handles your interrupts,
can't you?  As per usually, I'm talking out of my rear end, but I
sorta imagine:

1. At the head of msm_gpio_irq_set_type() if you detect that
"skip_wake_irqs" is set and you're on an SoC with this hardware errata
then you do a loop much like the one in
msm_gpio_update_dual_edge_pos() except that instead of changing the
polarity with msm_writel_intr_cfg() you change the polarity with
"irq_chip_set_type_parent()".

2. At the head of msm_gpio_irq_ack() you make the same function call
if "skip_wake_irqs" is set and you're on an SoC with this hardware
errata.

It doesn't feel all that ugly to me, assuming I'm understanding it
correctly.  ...or maybe you can tell me why it'd be harder than that?



maybe it's just easier to change the pinctrl driver to emulate dual
edge itself and that can work around the problem in the PDC?  There
seem to be a few samples you could copy from:

$ git log --oneline --no-merges --grep=emulate drivers/pinctrl/
3221f40b7631 pinctrl: mediatek: emulate GPIO interrupt on both-edges
5a92750133ff pinctrl: rockchip: emulate both edge triggered interrupts


pinctrl-msm already supports emulating dual edge, but my understanding
was that the problem lies in that somehow this emulation would have to
be tied to or affect the PDC driver?

yes, thats correct, pinctrl-msm already supports it, the problem lies
in the fact that PDC does not. This patch, infact was trying to fix the
issue by removing all PDC involvement for gpio28 and making pinctrl-msm
in charge of it.

If we're going to try to do this, I think we're stuck with one of these:

1. A really really long list that we keep jamming more boards into.

2. Add an entry at the top-level device tree compatible to all
affected boards _just_ for this purpose.  Seems ugly since we don't
need it for any other reasons.

3. Add some sort of property to the pinctrl node on these boards.
Seems ugly since conceivably this _could_ be worked around in
software.

I don't really like any of those options, so I'm really hoping we can
find out how to get a workaround in...

Hi Doug,

The client driver here never uses/needs both the edges at a given time.
Another option (clean & correct IMO) is to update the driver to request 
proper irq type its expecting.


Lets take SD card detect GPIO for example, which uses dual edge interrupt.
one edge (rising type) can be used as a card insert detect interrupt and 
another edge (falling type) may be used for card removal detect.


The sequence of operations, IMO should be..
1. Driver request a rising type irq to start with (the one that detects 
card insertion)
2. once card insertion irq comes in, the driver 

Re: [PATCH v2 1/3] arm64/numa: export memory_add_physaddr_to_nid as EXPORT_SYMBOL_GPL

2020-07-07 Thread Mike Rapoport
On Tue, Jul 07, 2020 at 03:05:48PM -0700, Dan Williams wrote:
> On Tue, Jul 7, 2020 at 11:01 AM Mike Rapoport  wrote:
> >
> > On Tue, Jul 07, 2020 at 02:26:08PM +0200, David Hildenbrand wrote:
> > > On 07.07.20 14:13, Mike Rapoport wrote:
> > > > On Tue, Jul 07, 2020 at 01:54:54PM +0200, Michal Hocko wrote:
> > > >> On Tue 07-07-20 13:59:15, Jia He wrote:
> > > >>> This exports memory_add_physaddr_to_nid() for module driver to use.
> > > >>>
> > > >>> memory_add_physaddr_to_nid() is a fallback option to get the nid in 
> > > >>> case
> > > >>> NUMA_NO_NID is detected.
> > > >>>
> > > >>> Suggested-by: David Hildenbrand 
> > > >>> Signed-off-by: Jia He 
> > > >>> ---
> > > >>>  arch/arm64/mm/numa.c | 5 +++--
> > > >>>  1 file changed, 3 insertions(+), 2 deletions(-)
> > > >>>
> > > >>> diff --git a/arch/arm64/mm/numa.c b/arch/arm64/mm/numa.c
> > > >>> index aafcee3e3f7e..7eeb31740248 100644
> > > >>> --- a/arch/arm64/mm/numa.c
> > > >>> +++ b/arch/arm64/mm/numa.c
> > > >>> @@ -464,10 +464,11 @@ void __init arm64_numa_init(void)
> > > >>>
> > > >>>  /*
> > > >>>   * We hope that we will be hotplugging memory on nodes we already 
> > > >>> know about,
> > > >>> - * such that acpi_get_node() succeeds and we never fall back to 
> > > >>> this...
> > > >>> + * such that acpi_get_node() succeeds. But when SRAT is not present, 
> > > >>> the node
> > > >>> + * id may be probed as NUMA_NO_NODE by acpi, Here provide a fallback 
> > > >>> option.
> > > >>>   */
> > > >>>  int memory_add_physaddr_to_nid(u64 addr)
> > > >>>  {
> > > >>> - pr_warn("Unknown node for memory at 0x%llx, assuming node 0\n", 
> > > >>> addr);
> > > >>>   return 0;
> > > >>>  }
> > > >>> +EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
> > > >>
> > > >> Does it make sense to export a noop function? Wouldn't make more sense
> > > >> to simply make it static inline somewhere in a header? I haven't 
> > > >> checked
> > > >> whether there is an easy way to do that sanely bu this just hit my 
> > > >> eyes.
> > > >
> > > > We'll need to either add a CONFIG_ option or arch specific callback to
> > > > make both non-empty (x86, powerpc, ia64) and empty (arm64, sh)
> > > > implementations coexist ...
> > >
> > > Note: I have a similar dummy (return 0) patch for s390x lying around here.
> >
> > Then we'll call it a tie - 3:3 ;-)
> 
> So I'd be happy to jump on the train of people wanting to export the
> ARM stub for this (and add a new ARM stub for phys_to_target_node()),
> but Will did have a plausibly better idea that I have been meaning to
> circle back to:
> 
> http://lore.kernel.org/r/20200325111039.GA32109@willie-the-truck
> 
> ...i.e. iterate over node data to do the lookup. This would seem to
> work generically for multiple archs unless I am missing something?

I think it would work on arm64, power and, most propbably on s390
(David?), but not on x86. x86 does not have reserved memory in pgdat,
it's never memblock_add()'ed (see e820__memblock_setup()).

I've suggested to add E820_*_RESERVED to memblock.memory a while ago
[1], but apparently there are systems that cannot tolerate OS mappings
of the BIOS reserved areas.

[1] https://lore.kernel.org/lkml/20200522142053.gw1059...@linux.ibm.com/

-- 
Sincerely yours,
Mike.


RE: [PATCH] mm/hugetlb: split hugetlb_cma in nodes with memory

2020-07-07 Thread Song Bao Hua (Barry Song)


> -Original Message-
> From: Anshuman Khandual [mailto:anshuman.khand...@arm.com]
> Sent: Wednesday, July 8, 2020 4:18 PM
> To: Song Bao Hua (Barry Song) ;
> a...@linux-foundation.org
> Cc: x...@kernel.org; linux...@kvack.org; linux-kernel@vger.kernel.org;
> Linuxarm ; linux-arm-ker...@lists.infradead.org;
> Roman Gushchin ; Catalin Marinas
> ; Will Deacon ; Thomas Gleixner
> ; Ingo Molnar ; Borislav Petkov
> ; H . Peter Anvin ; Mike Kravetz
> ; Mike Rapoport ; Jonathan
> Cameron 
> Subject: Re: [PATCH] mm/hugetlb: split hugetlb_cma in nodes with memory
> 
> Hello Barry,
> 
> On 07/08/2020 05:53 AM, Barry Song wrote:
> > Rather than splitting huge_cma in online nodes, it is better to do it in
> > nodes with memory.
> 
> Right, it makes sense to avoid nodes without memory, hence loosing portions
> of CMA reservation intended for HugeTLB. N_MEMORY is better than
> N_ONLINE
> and will help avoid this situation.

Thanks for taking a look, Anshuman.

> 
> > For an ARM64 server with four numa nodes and only node0 has memory. If I
> > set hugetlb_cma=4G in bootargs,
> >
> > without this patch, I got the below printk:
> > hugetlb_cma: reserve 4096 MiB, up to 1024 MiB per node
> > hugetlb_cma: reserved 1024 MiB on node 0
> > hugetlb_cma: reservation failed: err -12, node 1
> > hugetlb_cma: reservation failed: err -12, node 2
> > hugetlb_cma: reservation failed: err -12, node 3
> 
> As expected.
> 
> >
> > hugetlb_cma size is broken once the system has nodes without memory.
> 
> I would not say that it is 'broken'. It is just not optimal but still works
> as designed.
> 
> >
> > With this patch, I got the below printk:
> > hugetlb_cma: reserve 4096 MiB, up to 4096 MiB per node
> > hugetlb_cma: reserved 4096 MiB on node 0
> 
> As expected, the per node CMA reservation quota has changed from
> N_ONLINE
> to N_MEMORY.
> 
> >
> > So this patch fixes the broken hugetlb_cma size on arm64.
> 
> There is nothing arm64 specific here. A platform where N_ONLINE !=
> N_MEMORY
> i.e with some nodes without memory when CMA reservation gets called, will
> have this problem.

Agreed. one fact is that right now only x86 and arm64 are calling 
hugetlb_cma_reserve().
So I don't know how eager other platforms need this function.

> 
> >
> > Jonathan Cameron tested this patch on x86 platform. Jonathan figured out
> x86
> > is much different with arm64. hugetlb_cma size has never broken on x86.
> > On arm64 all nodes are marked online at the same time. On x86, only
> > nodes with memory are initially marked as online:
> > initmem_init()->x86_numa_init()->numa_init()->
> > numa_register_memblks()->alloc_node_data()->node_set_online()
> > So at time of the existing cma setup call only the memory containing nodes
> > are online. The other nodes are brought up much later.
> 
> The problem is always there if N_ONLINE != N_MEMORY but in this case, it
> is just hidden because N_ONLINE happen to match N_MEMORY during the
> boot
> process when hugetlb_cma_reserve() gets called.

Yes. Exactly.

> 
> >
> > Thus, the change is simply to fix ARM64.  A change is needed to x86 only
> > because the inherent assumptions in cma_hugetlb_reserve() have changed.
> 
> cma_hugetlb_reserve() will now scan over N_MEMORY and hence expects all
> platforms to have N_MEMORY initialized properly before calling it. This
> needs to be well documented for the hugetlb_cma_reserve() function along
> with it's call sites.
> 

Yep. will document this.

> >
> > Fixes: cf11e85fc08c ("mm: hugetlb: optionally allocate gigantic hugepages
> using cma")
> 
> I would not call this a "Fix". The current code still works, though in
> a sub optimal manner.

Do you think it is worth linux-stable? For example, is it better for this 
optimal manner
to be in 5.7 and 5.8? or we have this patch in 5.9-rc1?

To me, I would prefer 5.7 and 5.8 users can still have a hugetlb cma size which 
is consistent
with the bootargs.

> 
> > Cc: Roman Gushchin 
> > Cc: Catalin Marinas 
> > Cc: Will Deacon 
> > Cc: Thomas Gleixner 
> > Cc: Ingo Molnar 
> > Cc: Borislav Petkov 
> > Cc: H. Peter Anvin 
> > Cc: Mike Kravetz 
> > Cc: Mike Rapoport 
> > Cc: Andrew Morton 
> > Cc: Anshuman Khandual 
> > Cc: Jonathan Cameron 
> > Signed-off-by: Barry Song 
> > ---
> >  arch/arm64/mm/init.c| 18 +-
> >  arch/x86/kernel/setup.c | 13 ++---
> >  mm/hugetlb.c|  4 ++--
> >  3 files changed, 21 insertions(+), 14 deletions(-)
> >
> > diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
> > index 1e93cfc7c47a..f6090ef6812b 100644
> > --- a/arch/arm64/mm/init.c
> > +++ b/arch/arm64/mm/init.c
> > @@ -420,15 +420,6 @@ void __init bootmem_init(void)
> >
> > arm64_numa_init();
> >
> > -   /*
> > -* must be done after arm64_numa_init() which calls numa_init() to
> > -* initialize node_online_map that gets used in hugetlb_cma_reserve()
> > -* while allocating required CMA size across online nodes.
> > -*/
> > -#ifdef CONFIG_ARM64_4K_PAGES
> > -   

Re: [PATCH v2 00/15] Make the user mode driver code a better citizen

2020-07-07 Thread Luis Chamberlain
On Mon, Jun 29, 2020 at 02:55:05PM -0500, Eric W. Biederman wrote:
> 
> I have tested thes changes by booting with the code compiled in and
> by killing "bpfilter_umh" and running iptables -vnL to restart
> the userspace driver.
> 
> I have compiled tested each change with and without CONFIG_BPFILTER
> enabled.

Sounds like grounds for a selftests driver and respective selftest?
And if so, has the other issues Tetsuo reported be hacked into one?

  Luis


RE: [EXT] Re: [PATCH v5 3/3] ARM: imx6plus: optionally enable internal routing of clk_enet_ref

2020-07-07 Thread Andy Duan
From: Sven Van Asbroeck  Sent: Tuesday, July 7, 2020 11:21 
PM
> Andy, Fabio,
> 
> Sounds like we now have a solution which makes logical sense, although it
> requires changes and additions to drivers/clk/imx/. Before I create a patch,
> can you read the plan below and check that it makes sense, please?
> 
> Problem
> ===
> On the imx6q plus, the NXP hw designers introduced an alternative way to
> clock the built-in ethernet (FEC). One single customer (archronix) seems to be
> currently using this functionality, and would like to add mainline support.
> 
> Changing the ethernet (FEC) driver appears illogical, as this change is
> unrelated to the FEC itself: fundamentally, it's a clock tree change.
> 
> We also need to prevent breaking existing boards with mis-configured FEC
> clocking:
> 
> Some board designers indicate in the devicetree that ENET_REF_CLK is
> connected to the FEC ptp clock, but in reality, they are providing an 
> unrelated
> external clock through the pad. This will work in many cases, because the FEC
> driver does not really care where its PTP clock comes from, and the enet ref
> clock is set up to mirror the external clk frequency by the NXP U-Boot fork.
> 
> Proposed changes must not break these cases.
> 
> Proposed Solution
> =
> On non-plus imx6q there are no changes. On imx6q plus however:
> 
> Create two new clocks (mac_gtx and pad) and a new clock mux:
> 
>   enet_ref-o->pad->| \
>|   |  |
>|   |M1|mac_gtx --- to FEC
>|   |  |
>o---|_/
> 
> The defaults (indicated with ">") are carefully chosen, so these changes will
> not break any existing plus designs.
> 
> We then tie the gtx clock to the FEC driver ptp clock, like so:
> 
> in imx6qp.dtsi:
>  {
> clocks = < IMX6QDL_CLK_ENET>,
> < IMX6QDL_CLK_ENET>,
> < IMX6QDL_CLK_MAC_GTX>;
> };
> 
> Mux M1 is controlled by GPR5[9]. This mux can just write to the GPR5
> memory address. However, the GPR registers are already exposed as a mux
> controller compatible = "mmio-mux". This mux does currently not use GPR5.
> 
> So we have to make a choice here: write straight to the memory address
> (easy), or create a new clock mux type, which uses an underlying mux
> controller.
> 
> When that is done, board designers can choose between:
> 
> 1. internal clocking (GTX clock routed internally)
> 
>  {
> assigned-clocks = < IMX6QDL_CLK_MAC_GTX>;
> assigned-clock-parents = < IMX6QDL_CLK_ENET_REF>; };

The one is our requirement that gtx is from internal pll and only for
6qp boards. It is required to set in board dts file due to depends on board
design.

Here also need to assign enet_ref clk rate to 125Mhz.
> 
> 2. external clocking (GTX clock from pad, pad connected to enet_ref,
>typically via GPIO_16). This is the default and does not need to be
> present.
> 
>  {
> assigned-clocks = < IMX6QDL_CLK_MAC_GTX>;
> assigned-clock-parents = < IMX6QDL_CLK_PAD>; };
> 
As above, here also need to assign the enet_ref clk rate to 125Mhz.
The clk tree:
Pll6 -> enet_ref -> clk_pad -> mac_gtx
Pll6 -> enet_ref -> clk_pad -> route back to supply clk for ptp

> 
> 3. external clocking (GTX clock from pad, pad connected to external PHY
>clock or external oscillator).
> 
> phy_osc: oscillator {
> #clock-cells = <0>;
> compatible = "fixed-clock";
> clock-frequency = <5000>;
> };
> 
>  {
> clocks = < IMX6QDL_CLK_ENET>,
> < IMX6QDL_CLK_ENET>,
> <_osc>;
> };


[RESEND][PATCH v3 7/8] ASoC: qcom: lpass-sc7180: Add platform driver for lpass audio

2020-07-07 Thread Rohit kumar
From: Ajit Pandey 

Add platform driver for configuring sc7180 lpass core I2S and
DMA configuration to support playback & capture to external codecs
connected over primary & secondary MI2S interfaces.

Signed-off-by: Ajit Pandey 
Signed-off-by: Rohit kumar 
---
Resending to update Signed-off mail id.

 sound/soc/qcom/Kconfig|   5 +
 sound/soc/qcom/Makefile   |   2 +
 sound/soc/qcom/lpass-sc7180.c | 216 ++
 3 files changed, 223 insertions(+)
 create mode 100644 sound/soc/qcom/lpass-sc7180.c

diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig
index 0ea4cde..87bec7f 100644
--- a/sound/soc/qcom/Kconfig
+++ b/sound/soc/qcom/Kconfig
@@ -24,6 +24,11 @@ config SND_SOC_LPASS_APQ8016
select SND_SOC_LPASS_CPU
select SND_SOC_LPASS_PLATFORM
 
+config SND_SOC_LPASS_SC7180
+   tristate
+   select SND_SOC_LPASS_CPU
+   select SND_SOC_LPASS_PLATFORM
+
 config SND_SOC_STORM
tristate "ASoC I2S support for Storm boards"
depends on SND_SOC_QCOM
diff --git a/sound/soc/qcom/Makefile b/sound/soc/qcom/Makefile
index 41b2c7a..7972c94 100644
--- a/sound/soc/qcom/Makefile
+++ b/sound/soc/qcom/Makefile
@@ -4,11 +4,13 @@ snd-soc-lpass-cpu-objs := lpass-cpu.o
 snd-soc-lpass-platform-objs := lpass-platform.o
 snd-soc-lpass-ipq806x-objs := lpass-ipq806x.o
 snd-soc-lpass-apq8016-objs := lpass-apq8016.o
+snd-soc-lpass-sc7180-objs := lpass-sc7180.o
 
 obj-$(CONFIG_SND_SOC_LPASS_CPU) += snd-soc-lpass-cpu.o
 obj-$(CONFIG_SND_SOC_LPASS_PLATFORM) += snd-soc-lpass-platform.o
 obj-$(CONFIG_SND_SOC_LPASS_IPQ806X) += snd-soc-lpass-ipq806x.o
 obj-$(CONFIG_SND_SOC_LPASS_APQ8016) += snd-soc-lpass-apq8016.o
+obj-$(CONFIG_SND_SOC_LPASS_SC7180) += snd-soc-lpass-sc7180.o
 
 # Machine
 snd-soc-storm-objs := storm.o
diff --git a/sound/soc/qcom/lpass-sc7180.c b/sound/soc/qcom/lpass-sc7180.c
new file mode 100644
index ..dd85a97
--- /dev/null
+++ b/sound/soc/qcom/lpass-sc7180.c
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ *
+ * lpass-sc7180.c -- ALSA SoC platform-machine driver for QTi LPASS
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "lpass-lpaif-reg.h"
+#include "lpass.h"
+
+static struct snd_soc_dai_driver sc7180_lpass_cpu_dai_driver[] = {
+   [MI2S_PRIMARY] = {
+   .id = MI2S_PRIMARY,
+   .name = "Primary MI2S",
+   .playback = {
+   .stream_name = "Primary Playback",
+   .formats= SNDRV_PCM_FMTBIT_S16,
+   .rates = SNDRV_PCM_RATE_48000,
+   .rate_min   = 48000,
+   .rate_max   = 48000,
+   .channels_min   = 2,
+   .channels_max   = 2,
+   },
+   .capture = {
+   .stream_name = "Primary Capture",
+   .formats = SNDRV_PCM_FMTBIT_S16,
+   .rates = SNDRV_PCM_RATE_48000,
+   .rate_min   = 48000,
+   .rate_max   = 48000,
+   .channels_min   = 2,
+   .channels_max   = 2,
+   },
+   .probe  = _qcom_lpass_cpu_dai_probe,
+   .ops= _qcom_lpass_cpu_dai_ops,
+   },
+
+   [MI2S_SECONDARY] = {
+   .id = MI2S_SECONDARY,
+   .name = "Secondary MI2S",
+   .playback = {
+   .stream_name = "Secondary Playback",
+   .formats= SNDRV_PCM_FMTBIT_S16,
+   .rates = SNDRV_PCM_RATE_48000,
+   .rate_min   = 48000,
+   .rate_max   = 48000,
+   .channels_min   = 2,
+   .channels_max   = 2,
+   },
+   .probe  = _qcom_lpass_cpu_dai_probe,
+   .ops= _qcom_lpass_cpu_dai_ops,
+   },
+};
+
+static int sc7180_lpass_alloc_dma_channel(struct lpass_data *drvdata,
+  int direction)
+{
+   struct lpass_variant *v = drvdata->variant;
+   int chan = 0;
+
+   if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
+   chan = find_first_zero_bit(>dma_ch_bit_map,
+   v->rdma_channels);
+
+   if (chan >= v->rdma_channels)
+   return -EBUSY;
+   } else {
+   chan = find_next_zero_bit(>dma_ch_bit_map,
+   v->wrdma_channel_start +
+   v->wrdma_channels,
+   v->wrdma_channel_start);
+
+   if (chan >=  v->wrdma_channel_start + v->wrdma_channels)
+   return -EBUSY;
+   }
+
+   set_bit(chan, >dma_ch_bit_map);

Re: [PATCH 03/11] fs: add new read_uptr and write_uptr file operations

2020-07-07 Thread Luis Chamberlain
On Sat, Jun 27, 2020 at 09:33:03AM -0700, Linus Torvalds wrote:
> The real problem with
> "set_fs()" has been that we've occasionally had bugs where we ended up
> running odd paths that we really didn't _intend_ to run with kernel
> pointers. The classic example is the SCSI "write as ioctl" example,
> where a write to a SCSI generic device would do various odd things and
> follow pointers and what-not. Then you get into real trouble when
> "splice()" ends up truiong to write a kernel buffer, and because of
> "set_fs()" suddenly the sg code started accessing kernel memory
> willy-nilly.

So the semantics of this interface can create chaos fast if not used
carefully and conservatively.

Christoph, it would be great if you're future series can include some
version of a verbiage for the motivation for the culling of set_fs().
Maybe it was just me, but the original motivation wasn't clear at first
and took some thread digging to get it.

  Luis


Re: [PATCH v3 0/6] powerpc: queued spinlocks and rwlocks

2020-07-07 Thread Nicholas Piggin
Excerpts from Waiman Long's message of July 8, 2020 1:33 pm:
> On 7/7/20 1:57 AM, Nicholas Piggin wrote:
>> Yes, powerpc could certainly get more performance out of the slow
>> paths, and then there are a few parameters to tune.
>>
>> We don't have a good alternate patching for function calls yet, but
>> that would be something to do for native vs pv.
>>
>> And then there seem to be one or two tunable parameters we could
>> experiment with.
>>
>> The paravirt locks may need a bit more tuning. Some simple testing
>> under KVM shows we might be a bit slower in some cases. Whether this
>> is fairness or something else I'm not sure. The current simple pv
>> spinlock code can do a directed yield to the lock holder CPU, whereas
>> the pv qspl here just does a general yield. I think we might actually
>> be able to change that to also support directed yield. Though I'm
>> not sure if this is actually the cause of the slowdown yet.
> 
> Regarding the paravirt lock, I have taken a further look into the 
> current PPC spinlock code. There is an equivalent of pv_wait() but no 
> pv_kick(). Maybe PPC doesn't really need that.

So powerpc has two types of wait, either undirected "all processors" or 
directed to a specific processor which has been preempted by the 
hypervisor.

The simple spinlock code does a directed wait, because it knows the CPU 
which is holding the lock. In this case, there is a sequence that is 
used to ensure we don't wait if the condition has become true, and the
target CPU does not need to kick the waiter it will happen automatically
(see splpar_spin_yield). This is preferable because we only wait as 
needed and don't require the kick operation.

The pv spinlock code I did uses the undirected wait, because we don't
know the CPU number which we are waiting on. This is undesirable because 
it's higher overhead and the wait is not so accurate.

I think perhaps we could change things so we wait on the correct CPU 
when queued, which might be good enough (we could also put the lock
owner CPU in the spinlock word, if we add another format).

> Attached are two 
> additional qspinlock patches that adds a CONFIG_PARAVIRT_QSPINLOCKS_LITE 
> option to not require pv_kick(). There is also a fixup patch to be 
> applied after your patchset.
> 
> I don't have access to a PPC LPAR with shared processor at the moment, 
> so I can't test the performance of the paravirt code. Would you mind 
> adding my patches and do some performance test on your end to see if it 
> gives better result?

Great, I'll do some tests. Any suggestions for what to try?

Thanks,
Nick


[PATCH v3 8/8] dt-bindings: sound: lpass-cpu: Move to yaml format

2020-07-07 Thread Rohit kumar
From: Ajit Pandey 

Update lpass-cpu binding with yaml formats.

Signed-off-by: Ajit Pandey 
Signed-off-by: Rohit kumar 
---
 .../devicetree/bindings/sound/qcom,lpass-cpu.txt   |  80 ---
 .../devicetree/bindings/sound/qcom,lpass-cpu.yaml  | 154 +
 2 files changed, 154 insertions(+), 80 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt
 create mode 100644 Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml

diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt 
b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt
deleted file mode 100644
index 04e34cc..
--- a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt
+++ /dev/null
@@ -1,80 +0,0 @@
-* Qualcomm Technologies LPASS CPU DAI
-
-This node models the Qualcomm Technologies Low-Power Audio SubSystem (LPASS).
-
-Required properties:
-
-- compatible   : "qcom,lpass-cpu" or "qcom,apq8016-lpass-cpu" or
- "qcom,lpass-cpu-sc7180"
-- clocks   : Must contain an entry for each entry in clock-names.
-- clock-names  : A list which must include the following entries:
-   * "ahbix-clk"
-   * "mi2s-osr-clk"
-   * "mi2s-bit-clk"
-   : required clocks for "qcom,lpass-cpu-apq8016"
-   * "ahbix-clk"
-   * "mi2s-bit-clk0"
-   * "mi2s-bit-clk1"
-   * "mi2s-bit-clk2"
-   * "mi2s-bit-clk3"
-   * "pcnoc-mport-clk"
-   * "pcnoc-sway-clk"
-
-- interrupts   : Must contain an entry for each entry in
- interrupt-names.
-- interrupt-names  : A list which must include the following entries:
-   * "lpass-irq-lpaif"
-- pinctrl-N: One property must exist for each entry in
- pinctrl-names.  See ../pinctrl/pinctrl-bindings.txt
- for details of the property values.
-- pinctrl-names: Must contain a "default" entry.
-- reg  : Must contain an address for each entry in reg-names.
-- reg-names: A list which must include the following entries:
-   * "lpass-lpaif"
-- #address-cells   : Must be 1
-- #size-cells  : Must be 0
-
-
-
-Optional properties:
-
-- qcom,adsp: Phandle for the audio DSP node
-
-By default, the driver uses up to 4 MI2S SD lines, for a total of 8 channels.
-The SD lines to use can be configured by adding subnodes for each of the DAIs.
-
-Required properties for each DAI (represented by a subnode):
-- reg  : Must be one of the DAI IDs
- (usually part of dt-bindings header)
-- qcom,playback-sd-lines: List of serial data lines to use for playback
- Each SD line should be represented by a number from 
0-3.
-- qcom,capture-sd-lines: List of serial data lines to use for capture
- Each SD line should be represented by a number from 
0-3.
-
-Note that adding a subnode changes the default to "no lines configured",
-so both playback and capture lines should be configured when a subnode is 
added.
-
-Example:
-
-lpass@2810 {
-   compatible = "qcom,lpass-cpu";
-   clocks = < AHBIX_CLK>, < MI2S_OSR_CLK>, < MI2S_BIT_CLK>;
-   clock-names = "ahbix-clk", "mi2s-osr-clk", "mi2s-bit-clk";
-   interrupts = <0 85 1>;
-   interrupt-names = "lpass-irq-lpaif";
-   pinctrl-names = "default", "idle";
-   pinctrl-0 = <_default>;
-   pinctrl-1 = <_idle>;
-   reg = <0x2810 0x1>;
-   reg-names = "lpass-lpaif";
-   qcom,adsp = <>;
-
-   #address-cells = <1>;
-   #size-cells = <0>;
-
-   /* Optional to set different MI2S SD lines */
-   dai@3 {
-   reg = ;
-   qcom,playback-sd-lines = <0 1>;
-   };
-};
diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml 
b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml
new file mode 100644
index ..9c350bc
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml
@@ -0,0 +1,154 @@
+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/qcom,lpass-cpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm LPASS CPU dai driver bindings
+
+maintainers:
+  - Srinivas Kandagatla 
+  - Rohit kumar 
+
+description:
+  Qualcomm SOC Low-Power Audio SubSystem (LPASS) that consist of MI2S interface
+  for audio data transfer on external codecs. LPASS cpu driver is a module to
+  configure Low-Power Audio Interface(LPAIF) core registers across different
+  IP versions.
+
+properties:
+  

Re: [PATCH -next] Documentation/vm: fix tables in arch_pgtable_helpers

2020-07-07 Thread Anshuman Khandual



On 07/08/2020 07:36 AM, Randy Dunlap wrote:
> On 7/7/20 6:22 PM, Anshuman Khandual wrote:
>>
>>
>> On 07/08/2020 06:37 AM, Randy Dunlap wrote:
>>> From: Randy Dunlap 
>>>
>>> Make the tables be presented as tables in the generated output files
>>> (the line drawing did not present well).
>>>
>>> Signed-off-by: Randy Dunlap 
>>> Cc: Jonathan Corbet 
>>> Cc: linux-...@vger.kernel.org
>>> Cc: Anshuman Khandual 
>>> Cc: Mike Rapoport 
>>> Cc: linux-a...@vger.kernel.org
>>> Cc: linux...@kvack.org
>>> Cc: Andrew Morton 
>>> ---
>>>  Documentation/vm/arch_pgtable_helpers.rst |  333 ++--
>>>  1 file changed, 116 insertions(+), 217 deletions(-)
>>
>> Do you have a git URL some where to see these new output ? This
>> documentation is also useful when reading from a terminal where
>> these manual line drawing tables make sense.
>>
> 
> No, I don't have a git URL.
> You can go to
> https://drive.google.com/file/d/1FO6lCRKldzESwLdylvY8tw10dOBvwz84/view?usp=sharing
> 
> I had to Download the file and then view it locally. I couldn't get Google 
> Drive
> to display it for me as html (only as text).

I could see it locally as well on a browser and the table looks the same
way like those current manual ones on a terminal, so looks good to me.

> 
> I understand about reading tables at a terminal.
> This file could have been a txt file for that, but it's not. It's a RsT file.

Thats right. All files in Documentation/vm/ are .rst type, hence would
not like to have a .txt type in there.

> 
> If you want to leave it as is, please fix these warnings:

Thats right. Can not have in both ways. Lets stick with .rst and change
as required.


[PATCH v3 6/8] dt-bindings: sound: lpass-cpu: Add sc7180 lpass cpu node

2020-07-07 Thread Rohit kumar
Add dt-bindings to support "qcom,lpass-cpu-sc7180" node.

Signed-off-by: Rohit kumar 
---
 Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt 
b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt
index 32c2cdb..04e34cc 100644
--- a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt
+++ b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt
@@ -4,7 +4,8 @@ This node models the Qualcomm Technologies Low-Power Audio 
SubSystem (LPASS).
 
 Required properties:
 
-- compatible   : "qcom,lpass-cpu" or "qcom,apq8016-lpass-cpu"
+- compatible   : "qcom,lpass-cpu" or "qcom,apq8016-lpass-cpu" or
+ "qcom,lpass-cpu-sc7180"
 - clocks   : Must contain an entry for each entry in clock-names.
 - clock-names  : A list which must include the following entries:
* "ahbix-clk"
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.



[PATCH v3 2/8] ASoC: qcom: lpass-cpu: Move ahbix clk to platform specific function

2020-07-07 Thread Rohit kumar
Ahbix clock is optional clock and not needed for all platforms.
Move it to lpass-apq8016/ipq806x as it is not needed for sc7180.

Signed-off-by: Rohit kumar 
---
 sound/soc/qcom/lpass-apq8016.c | 27 ++
 sound/soc/qcom/lpass-cpu.c | 40 ++-
 sound/soc/qcom/lpass-ipq806x.c | 43 ++
 3 files changed, 80 insertions(+), 30 deletions(-)

diff --git a/sound/soc/qcom/lpass-apq8016.c b/sound/soc/qcom/lpass-apq8016.c
index 8210e37..fe4c258 100644
--- a/sound/soc/qcom/lpass-apq8016.c
+++ b/sound/soc/qcom/lpass-apq8016.c
@@ -185,7 +185,33 @@ static int apq8016_lpass_init(struct platform_device *pdev)
return ret;
}
 
+   drvdata->ahbix_clk = devm_clk_get(dev, "ahbix-clk");
+   if (IS_ERR(drvdata->ahbix_clk)) {
+   dev_err(dev, "error getting ahbix-clk: %ld\n",
+   PTR_ERR(drvdata->ahbix_clk));
+   ret = PTR_ERR(drvdata->ahbix_clk);
+   goto err_ahbix_clk;
+   }
+
+   ret = clk_set_rate(drvdata->ahbix_clk, LPASS_AHBIX_CLOCK_FREQUENCY);
+   if (ret) {
+   dev_err(dev, "error setting rate on ahbix_clk: %d\n", ret);
+   goto err_ahbix_clk;
+   }
+   dev_dbg(dev, "set ahbix_clk rate to %lu\n",
+   clk_get_rate(drvdata->ahbix_clk));
+
+   ret = clk_prepare_enable(drvdata->ahbix_clk);
+   if (ret) {
+   dev_err(dev, "error enabling ahbix_clk: %d\n", ret);
+   goto err_ahbix_clk;
+   }
+
return 0;
+
+err_ahbix_clk:
+   clk_bulk_disable_unprepare(drvdata->num_clks, drvdata->clks);
+   return ret;
 }
 
 static int apq8016_lpass_exit(struct platform_device *pdev)
@@ -193,6 +219,7 @@ static int apq8016_lpass_exit(struct platform_device *pdev)
struct lpass_data *drvdata = platform_get_drvdata(pdev);
 
clk_bulk_disable_unprepare(drvdata->num_clks, drvdata->clks);
+   clk_disable_unprepare(drvdata->ahbix_clk);
 
return 0;
 }
diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c
index e00a4af..f0c7e93 100644
--- a/sound/soc/qcom/lpass-cpu.c
+++ b/sound/soc/qcom/lpass-cpu.c
@@ -566,8 +566,13 @@ int asoc_qcom_lpass_cpu_platform_probe(struct 
platform_device *pdev)
return PTR_ERR(drvdata->lpaif_map);
}
 
-   if (variant->init)
-   variant->init(pdev);
+   if (variant->init) {
+   ret = variant->init(pdev);
+   if (ret) {
+   dev_err(dev, "error initializing variant: %d\n", ret);
+   return ret;
+   }
+   }
 
for (i = 0; i < variant->num_dai; i++) {
dai_id = variant->dai_driver[i].id;
@@ -594,46 +599,22 @@ int asoc_qcom_lpass_cpu_platform_probe(struct 
platform_device *pdev)
}
}
 
-   drvdata->ahbix_clk = devm_clk_get(dev, "ahbix-clk");
-   if (IS_ERR(drvdata->ahbix_clk)) {
-   dev_err(dev, "error getting ahbix-clk: %ld\n",
-   PTR_ERR(drvdata->ahbix_clk));
-   return PTR_ERR(drvdata->ahbix_clk);
-   }
-
-   ret = clk_set_rate(drvdata->ahbix_clk, LPASS_AHBIX_CLOCK_FREQUENCY);
-   if (ret) {
-   dev_err(dev, "error setting rate on ahbix_clk: %d\n", ret);
-   return ret;
-   }
-   dev_dbg(dev, "set ahbix_clk rate to %lu\n",
-   clk_get_rate(drvdata->ahbix_clk));
-
-   ret = clk_prepare_enable(drvdata->ahbix_clk);
-   if (ret) {
-   dev_err(dev, "error enabling ahbix_clk: %d\n", ret);
-   return ret;
-   }
-
ret = devm_snd_soc_register_component(dev,
  _cpu_comp_driver,
  variant->dai_driver,
  variant->num_dai);
if (ret) {
dev_err(dev, "error registering cpu driver: %d\n", ret);
-   goto err_clk;
+   goto err;
}
 
ret = asoc_qcom_lpass_platform_register(pdev);
if (ret) {
dev_err(dev, "error registering platform driver: %d\n", ret);
-   goto err_clk;
+   goto err;
}
 
-   return 0;
-
-err_clk:
-   clk_disable_unprepare(drvdata->ahbix_clk);
+err:
return ret;
 }
 EXPORT_SYMBOL_GPL(asoc_qcom_lpass_cpu_platform_probe);
@@ -645,7 +626,6 @@ int asoc_qcom_lpass_cpu_platform_remove(struct 
platform_device *pdev)
if (drvdata->variant->exit)
drvdata->variant->exit(pdev);
 
-   clk_disable_unprepare(drvdata->ahbix_clk);
 
return 0;
 }
diff --git a/sound/soc/qcom/lpass-ipq806x.c b/sound/soc/qcom/lpass-ipq806x.c
index 1987605..b7c0586 100644
--- a/sound/soc/qcom/lpass-ipq806x.c
+++ b/sound/soc/qcom/lpass-ipq806x.c
@@ -55,6 +55,47 @@ static struct snd_soc_dai_driver 

[PATCH v3 4/8] include: dt-bindings: sound: Add sc7180-lpass bindings header

2020-07-07 Thread Rohit kumar
From: Ajit Pandey 

Add header defining dai-id and mclk id for SC7180 lpass soc.

Signed-off-by: Ajit Pandey 
---
 include/dt-bindings/sound/sc7180-lpass.h | 10 ++
 1 file changed, 10 insertions(+)
 create mode 100644 include/dt-bindings/sound/sc7180-lpass.h

diff --git a/include/dt-bindings/sound/sc7180-lpass.h 
b/include/dt-bindings/sound/sc7180-lpass.h
new file mode 100644
index ..7d988f6
--- /dev/null
+++ b/include/dt-bindings/sound/sc7180-lpass.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_SC7180_LPASS_H
+#define __DT_SC7180_LPASS_H
+
+#define MI2S_PRIMARY   0
+#define MI2S_SECONDARY 1
+
+#define LPASS_MCLK00
+
+#endif /* __DT_APQ8016_LPASS_H */
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.



[PATCH v3 5/8] ASoC: qcom: lpass-platform: Replace card->dev with component->dev

2020-07-07 Thread Rohit kumar
From: Ajit Pandey 

We are allocating dma memory for component->dev but trying to mmap
such memory for substream->pcm->card->dev. Replace device argument
in mmap with component->dev to fix this.

Signed-off-by: Ajit Pandey 
---
 sound/soc/qcom/lpass-platform.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/sound/soc/qcom/lpass-platform.c b/sound/soc/qcom/lpass-platform.c
index 445ca193..f9424cc 100644
--- a/sound/soc/qcom/lpass-platform.c
+++ b/sound/soc/qcom/lpass-platform.c
@@ -472,9 +472,8 @@ static int lpass_platform_pcmops_mmap(struct 
snd_soc_component *component,
 {
struct snd_pcm_runtime *runtime = substream->runtime;
 
-   return dma_mmap_coherent(substream->pcm->card->dev, vma,
-   runtime->dma_area, runtime->dma_addr,
-   runtime->dma_bytes);
+   return dma_mmap_coherent(component->dev, vma, runtime->dma_area,
+runtime->dma_addr, runtime->dma_bytes);
 }
 
 static irqreturn_t lpass_dma_interrupt_handler(
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.



[PATCH v3 7/8] ASoC: qcom: lpass-sc7180: Add platform driver for lpass audio

2020-07-07 Thread Rohit kumar
From: Ajit Pandey 

Add platform driver for configuring sc7180 lpass core I2S and
DMA configuration to support playback & capture to external codecs
connected over primary & secondary MI2S interfaces.

Signed-off-by: Ajit Pandey 
Signed-off-by: Rohit kumar 
---
 sound/soc/qcom/Kconfig|   5 +
 sound/soc/qcom/Makefile   |   2 +
 sound/soc/qcom/lpass-sc7180.c | 216 ++
 3 files changed, 223 insertions(+)
 create mode 100644 sound/soc/qcom/lpass-sc7180.c

diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig
index 0ea4cde..87bec7f 100644
--- a/sound/soc/qcom/Kconfig
+++ b/sound/soc/qcom/Kconfig
@@ -24,6 +24,11 @@ config SND_SOC_LPASS_APQ8016
select SND_SOC_LPASS_CPU
select SND_SOC_LPASS_PLATFORM
 
+config SND_SOC_LPASS_SC7180
+   tristate
+   select SND_SOC_LPASS_CPU
+   select SND_SOC_LPASS_PLATFORM
+
 config SND_SOC_STORM
tristate "ASoC I2S support for Storm boards"
depends on SND_SOC_QCOM
diff --git a/sound/soc/qcom/Makefile b/sound/soc/qcom/Makefile
index 41b2c7a..7972c94 100644
--- a/sound/soc/qcom/Makefile
+++ b/sound/soc/qcom/Makefile
@@ -4,11 +4,13 @@ snd-soc-lpass-cpu-objs := lpass-cpu.o
 snd-soc-lpass-platform-objs := lpass-platform.o
 snd-soc-lpass-ipq806x-objs := lpass-ipq806x.o
 snd-soc-lpass-apq8016-objs := lpass-apq8016.o
+snd-soc-lpass-sc7180-objs := lpass-sc7180.o
 
 obj-$(CONFIG_SND_SOC_LPASS_CPU) += snd-soc-lpass-cpu.o
 obj-$(CONFIG_SND_SOC_LPASS_PLATFORM) += snd-soc-lpass-platform.o
 obj-$(CONFIG_SND_SOC_LPASS_IPQ806X) += snd-soc-lpass-ipq806x.o
 obj-$(CONFIG_SND_SOC_LPASS_APQ8016) += snd-soc-lpass-apq8016.o
+obj-$(CONFIG_SND_SOC_LPASS_SC7180) += snd-soc-lpass-sc7180.o
 
 # Machine
 snd-soc-storm-objs := storm.o
diff --git a/sound/soc/qcom/lpass-sc7180.c b/sound/soc/qcom/lpass-sc7180.c
new file mode 100644
index ..dd85a97
--- /dev/null
+++ b/sound/soc/qcom/lpass-sc7180.c
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ *
+ * lpass-sc7180.c -- ALSA SoC platform-machine driver for QTi LPASS
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "lpass-lpaif-reg.h"
+#include "lpass.h"
+
+static struct snd_soc_dai_driver sc7180_lpass_cpu_dai_driver[] = {
+   [MI2S_PRIMARY] = {
+   .id = MI2S_PRIMARY,
+   .name = "Primary MI2S",
+   .playback = {
+   .stream_name = "Primary Playback",
+   .formats= SNDRV_PCM_FMTBIT_S16,
+   .rates = SNDRV_PCM_RATE_48000,
+   .rate_min   = 48000,
+   .rate_max   = 48000,
+   .channels_min   = 2,
+   .channels_max   = 2,
+   },
+   .capture = {
+   .stream_name = "Primary Capture",
+   .formats = SNDRV_PCM_FMTBIT_S16,
+   .rates = SNDRV_PCM_RATE_48000,
+   .rate_min   = 48000,
+   .rate_max   = 48000,
+   .channels_min   = 2,
+   .channels_max   = 2,
+   },
+   .probe  = _qcom_lpass_cpu_dai_probe,
+   .ops= _qcom_lpass_cpu_dai_ops,
+   },
+
+   [MI2S_SECONDARY] = {
+   .id = MI2S_SECONDARY,
+   .name = "Secondary MI2S",
+   .playback = {
+   .stream_name = "Secondary Playback",
+   .formats= SNDRV_PCM_FMTBIT_S16,
+   .rates = SNDRV_PCM_RATE_48000,
+   .rate_min   = 48000,
+   .rate_max   = 48000,
+   .channels_min   = 2,
+   .channels_max   = 2,
+   },
+   .probe  = _qcom_lpass_cpu_dai_probe,
+   .ops= _qcom_lpass_cpu_dai_ops,
+   },
+};
+
+static int sc7180_lpass_alloc_dma_channel(struct lpass_data *drvdata,
+  int direction)
+{
+   struct lpass_variant *v = drvdata->variant;
+   int chan = 0;
+
+   if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
+   chan = find_first_zero_bit(>dma_ch_bit_map,
+   v->rdma_channels);
+
+   if (chan >= v->rdma_channels)
+   return -EBUSY;
+   } else {
+   chan = find_next_zero_bit(>dma_ch_bit_map,
+   v->wrdma_channel_start +
+   v->wrdma_channels,
+   v->wrdma_channel_start);
+
+   if (chan >=  v->wrdma_channel_start + v->wrdma_channels)
+   return -EBUSY;
+   }
+
+   set_bit(chan, >dma_ch_bit_map);
+
+   return chan;
+}
+
+static int 

[PATCH v3 3/8] ASoC: qcom: lpass: Use regmap_field for i2sctl and dmactl registers

2020-07-07 Thread Rohit kumar
I2SCTL and DMACTL registers has different bits alignment for newer
LPASS variants of SC7180 soc. Use REG_FIELD_ID() to define the
reg_fields in platform specific file and removed shifts and mask
macros for such registers from header file.

Signed-off-by: Rohit kumar 
---
 sound/soc/qcom/lpass-apq8016.c   |  24 ++
 sound/soc/qcom/lpass-cpu.c   | 163 +++
 sound/soc/qcom/lpass-ipq806x.c   |  24 ++
 sound/soc/qcom/lpass-lpaif-reg.h | 157 +++--
 sound/soc/qcom/lpass-platform.c  | 151 +++-
 sound/soc/qcom/lpass.h   |  53 +
 6 files changed, 398 insertions(+), 174 deletions(-)

diff --git a/sound/soc/qcom/lpass-apq8016.c b/sound/soc/qcom/lpass-apq8016.c
index fe4c258..dd9e3dd 100644
--- a/sound/soc/qcom/lpass-apq8016.c
+++ b/sound/soc/qcom/lpass-apq8016.c
@@ -240,6 +240,30 @@ static struct lpass_variant apq8016_data = {
.wrdma_reg_stride   = 0x1000,
.wrdma_channel_start= 5,
.wrdma_channels = 2,
+   .loopback   = REG_FIELD_ID(0x1000, 15, 15, 4, 0x1000),
+   .spken  = REG_FIELD_ID(0x1000, 14, 14, 4, 0x1000),
+   .spkmode= REG_FIELD_ID(0x1000, 10, 13, 4, 0x1000),
+   .spkmono= REG_FIELD_ID(0x1000, 9, 9, 4, 0x1000),
+   .micen  = REG_FIELD_ID(0x1000, 8, 8, 4, 0x1000),
+   .micmode= REG_FIELD_ID(0x1000, 4, 7, 4, 0x1000),
+   .micmono= REG_FIELD_ID(0x1000, 3, 3, 4, 0x1000),
+   .wssrc  = REG_FIELD_ID(0x1000, 2, 2, 4, 0x1000),
+   .bitwidth   = REG_FIELD_ID(0x1000, 0, 0, 4, 0x1000),
+
+   .rdma_dyncclk   = REG_FIELD_ID(0x8400, 12, 12, 2, 0x1000),
+   .rdma_bursten   = REG_FIELD_ID(0x8400, 11, 11, 2, 0x1000),
+   .rdma_wpscnt= REG_FIELD_ID(0x8400, 8, 10, 2, 0x1000),
+   .rdma_intf  = REG_FIELD_ID(0x8400, 4, 7, 2, 0x1000),
+   .rdma_fifowm= REG_FIELD_ID(0x8400, 1, 3, 2, 0x1000),
+   .rdma_enable= REG_FIELD_ID(0x8400, 0, 0, 2, 0x1000),
+
+   .wrdma_dyncclk  = REG_FIELD_ID(0xB000, 12, 12, 2, 0x1000),
+   .wrdma_bursten  = REG_FIELD_ID(0xB000, 11, 11, 2, 0x1000),
+   .wrdma_wpscnt   = REG_FIELD_ID(0xB000, 8, 10, 2, 0x1000),
+   .wrdma_intf = REG_FIELD_ID(0xB000, 4, 7, 2, 0x1000),
+   .wrdma_fifowm   = REG_FIELD_ID(0xB000, 1, 3, 2, 0x1000),
+   .wrdma_enable   = REG_FIELD_ID(0xB000, 0, 0, 2, 0x1000),
+
.clk_name   = (const char*[]) {
   "pcnoc-mport-clk",
   "pcnoc-sway-clk",
diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c
index f0c7e93..f358d12 100644
--- a/sound/soc/qcom/lpass-cpu.c
+++ b/sound/soc/qcom/lpass-cpu.c
@@ -29,6 +29,32 @@
 #define LPASS_CPU_I2S_SD0_1_2_MASK GENMASK(2, 0)
 #define LPASS_CPU_I2S_SD0_1_2_3_MASK   GENMASK(3, 0)
 
+static int lpass_cpu_init_i2sctl_bitfields(struct device *dev,
+   struct lpaif_i2sctl *i2sctl, struct regmap *map)
+{
+   struct lpass_data *drvdata = dev_get_drvdata(dev);
+   struct lpass_variant *v = drvdata->variant;
+
+   i2sctl->loopback = devm_regmap_field_alloc(dev, map, v->loopback);
+   i2sctl->spken = devm_regmap_field_alloc(dev, map, v->spken);
+   i2sctl->spkmode = devm_regmap_field_alloc(dev, map, v->spkmode);
+   i2sctl->spkmono = devm_regmap_field_alloc(dev, map, v->spkmono);
+   i2sctl->micen = devm_regmap_field_alloc(dev, map, v->micen);
+   i2sctl->micmode = devm_regmap_field_alloc(dev, map, v->micmode);
+   i2sctl->micmono = devm_regmap_field_alloc(dev, map, v->micmono);
+   i2sctl->wssrc = devm_regmap_field_alloc(dev, map, v->wssrc);
+   i2sctl->bitwidth = devm_regmap_field_alloc(dev, map, v->bitwidth);
+
+   if (IS_ERR(i2sctl->loopback) || IS_ERR(i2sctl->spken) ||
+   IS_ERR(i2sctl->spkmode) || IS_ERR(i2sctl->spkmono) ||
+   IS_ERR(i2sctl->micen) || IS_ERR(i2sctl->micmode) ||
+   IS_ERR(i2sctl->micmono) || IS_ERR(i2sctl->wssrc) ||
+   IS_ERR(i2sctl->bitwidth))
+   return -EINVAL;
+
+   return 0;
+}
+
 static int lpass_cpu_daiops_set_sysclk(struct snd_soc_dai *dai, int clk_id,
unsigned int freq, int dir)
 {
@@ -79,12 +105,13 @@ static int lpass_cpu_daiops_hw_params(struct 
snd_pcm_substream *substream,
struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 {
struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
+   struct lpaif_i2sctl *i2sctl = drvdata->i2sctl;
+   unsigned int id = dai->driver->id;
snd_pcm_format_t format = params_format(params);
unsigned int channels = params_channels(params);
unsigned int rate = params_rate(params);
unsigned int mode;
- 

Re: [PATCH] nvme-pci: use standard block status symbolic names to check return value

2020-07-07 Thread Christoph Hellwig
On Wed, Jul 08, 2020 at 10:18:01AM +0800, Baolin Wang wrote:
> It's better to use the same symbol as the return to check return value,
> and will always work in the unlikely event that the defines are reordered.
> 
> Suggested-by: Keith Busch 
> Signed-off-by: Baolin Wang 

I'm really not sure this is worth it.  When designing the blk_status_t
type keeping 0 as was a deliberate design decision. 


[PATCH v3 1/8] ASoC: qcom: Add common array to initialize soc based core clocks

2020-07-07 Thread Rohit kumar
From: Ajit Pandey 

LPASS variants have their own soc specific clocks that needs to be
enabled for MI2S audio support. Added a common variable in drvdata to
initialize such clocks using bulk clk api. Such clock names is
defined in variants specific data and needs to fetched during init.

Signed-off-by: Ajit Pandey 
Signed-off-by: Rohit kumar 
---
 sound/soc/qcom/lpass-apq8016.c | 39 +++
 sound/soc/qcom/lpass.h | 10 +++---
 2 files changed, 26 insertions(+), 23 deletions(-)

diff --git a/sound/soc/qcom/lpass-apq8016.c b/sound/soc/qcom/lpass-apq8016.c
index b3610d0..8210e37 100644
--- a/sound/soc/qcom/lpass-apq8016.c
+++ b/sound/soc/qcom/lpass-apq8016.c
@@ -161,32 +161,27 @@ static int apq8016_lpass_free_dma_channel(struct 
lpass_data *drvdata, int chan)
 static int apq8016_lpass_init(struct platform_device *pdev)
 {
struct lpass_data *drvdata = platform_get_drvdata(pdev);
+   struct lpass_variant *variant = drvdata->variant;
struct device *dev = >dev;
-   int ret;
+   int ret, i;
 
-   drvdata->pcnoc_mport_clk = devm_clk_get(dev, "pcnoc-mport-clk");
-   if (IS_ERR(drvdata->pcnoc_mport_clk)) {
-   dev_err(dev, "error getting pcnoc-mport-clk: %ld\n",
-   PTR_ERR(drvdata->pcnoc_mport_clk));
-   return PTR_ERR(drvdata->pcnoc_mport_clk);
-   }
 
-   ret = clk_prepare_enable(drvdata->pcnoc_mport_clk);
+   drvdata->clks = devm_kcalloc(dev, variant->num_clks,
+sizeof(*drvdata->clks), GFP_KERNEL);
+   drvdata->num_clks = variant->num_clks;
+
+   for (i = 0; i < drvdata->num_clks; i++)
+   drvdata->clks[i].id = variant->clk_name[i];
+
+   ret = devm_clk_bulk_get(dev, drvdata->num_clks, drvdata->clks);
if (ret) {
-   dev_err(dev, "Error enabling pcnoc-mport-clk: %d\n", ret);
+   dev_err(dev, "Failed to get clocks %d\n", ret);
return ret;
}
 
-   drvdata->pcnoc_sway_clk = devm_clk_get(dev, "pcnoc-sway-clk");
-   if (IS_ERR(drvdata->pcnoc_sway_clk)) {
-   dev_err(dev, "error getting pcnoc-sway-clk: %ld\n",
-   PTR_ERR(drvdata->pcnoc_sway_clk));
-   return PTR_ERR(drvdata->pcnoc_sway_clk);
-   }
-
-   ret = clk_prepare_enable(drvdata->pcnoc_sway_clk);
+   ret = clk_bulk_prepare_enable(drvdata->num_clks, drvdata->clks);
if (ret) {
-   dev_err(dev, "Error enabling pcnoc_sway_clk: %d\n", ret);
+   dev_err(dev, "apq8016 clk_enable failed\n");
return ret;
}
 
@@ -197,8 +192,7 @@ static int apq8016_lpass_exit(struct platform_device *pdev)
 {
struct lpass_data *drvdata = platform_get_drvdata(pdev);
 
-   clk_disable_unprepare(drvdata->pcnoc_mport_clk);
-   clk_disable_unprepare(drvdata->pcnoc_sway_clk);
+   clk_bulk_disable_unprepare(drvdata->num_clks, drvdata->clks);
 
return 0;
 }
@@ -219,6 +213,11 @@ static struct lpass_variant apq8016_data = {
.wrdma_reg_stride   = 0x1000,
.wrdma_channel_start= 5,
.wrdma_channels = 2,
+   .clk_name   = (const char*[]) {
+  "pcnoc-mport-clk",
+  "pcnoc-sway-clk",
+ },
+   .num_clks   = 2,
.dai_driver = apq8016_lpass_cpu_dai_driver,
.num_dai= ARRAY_SIZE(apq8016_lpass_cpu_dai_driver),
.dai_osr_clk_names  = (const char *[]) {
diff --git a/sound/soc/qcom/lpass.h b/sound/soc/qcom/lpass.h
index bd19ec5..450020e 100644
--- a/sound/soc/qcom/lpass.h
+++ b/sound/soc/qcom/lpass.h
@@ -51,9 +51,9 @@ struct lpass_data {
/* used it for handling interrupt per dma channel */
struct snd_pcm_substream *substream[LPASS_MAX_DMA_CHANNELS];
 
-   /* 8016 specific */
-   struct clk *pcnoc_mport_clk;
-   struct clk *pcnoc_sway_clk;
+   /* SOC specific clock list */
+   struct clk_bulk_data *clks;
+   int num_clks;
 
 };
 
@@ -89,6 +89,10 @@ struct lpass_variant {
int num_dai;
const char * const *dai_osr_clk_names;
const char * const *dai_bit_clk_names;
+
+   /* SOC specific clocks configuration */
+   const char **clk_name;
+   int num_clks;
 };
 
 /* register the platform driver from the CPU DAI driver */
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.



[PATCH v3 0/8] ASoC: qcom: Add support for SC7180 lpass variant

2020-07-07 Thread Rohit kumar
This patch chain add audio support for SC7180 soc by doing the required
modification in existing common lpass-cpu/lpass-platform driver.
Below is a brief summary of patch series:

PATCH v3 0001 ... 0005: Update lpass-cpu, lpass-platform drivers to make it 
more generic
and support newer soc registers configuration. This also updates existing 
lpass-apq8096.c
and lpass-ipq806x.c.
PATCH v2 0005 ... 0007: Add documentation and platform driver for newer SC7180 
SOC variant.

Changes since v2:
- Moved yaml conversion of Documentation to the end of patch series
- Used REG_FIELD_ID instead of REG_FIELD for DMACTL and I2SCTL 
registers.
Move reg_fields to struct lpass_variant as suggested by Srinivas.

Ajit Pandey (5):
  ASoC: qcom: Add common array to initialize soc based core clocks
  include: dt-bindings: sound: Add sc7180-lpass bindings header
  ASoC: qcom: lpass-platform: Replace card->dev with component->dev
  ASoC: qcom: lpass-sc7180: Add platform driver for lpass audio
  dt-bindings: sound: lpass-cpu: Move to yaml format

Rohit kumar (3):
  ASoC: qcom: lpass-cpu: Move ahbix clk to platform specific function
  ASoC: qcom: lpass: Use regmap_field for i2sctl and dmactl registers
  dt-bindings: sound: lpass-cpu: Add sc7180 lpass cpu node

 .../devicetree/bindings/sound/qcom,lpass-cpu.txt   |  79 
 .../devicetree/bindings/sound/qcom,lpass-cpu.yaml  | 154 +++
 include/dt-bindings/sound/sc7180-lpass.h   |  10 +
 sound/soc/qcom/Kconfig |   5 +
 sound/soc/qcom/Makefile|   2 +
 sound/soc/qcom/lpass-apq8016.c |  86 ++--
 sound/soc/qcom/lpass-cpu.c | 193 +-
 sound/soc/qcom/lpass-ipq806x.c |  67 +++
 sound/soc/qcom/lpass-lpaif-reg.h   | 157 ---
 sound/soc/qcom/lpass-platform.c| 156 +++
 sound/soc/qcom/lpass-sc7180.c  | 216 +
 sound/soc/qcom/lpass.h |  63 +-
 12 files changed, 886 insertions(+), 302 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt
 create mode 100644 Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml
 create mode 100644 include/dt-bindings/sound/sc7180-lpass.h
 create mode 100644 sound/soc/qcom/lpass-sc7180.c

-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.



Re: [PATCH 5.7 000/112] 5.7.8-rc1 review

2020-07-07 Thread Naresh Kamboju
On Tue, 7 Jul 2020 at 20:55, Greg Kroah-Hartman
 wrote:
>
> This is the start of the stable review cycle for the 5.7.8 release.
> There are 112 patches in this series, all will be posted as a response
> to this one.  If anyone has any issues with these being applied, please
> let me know.
>
> Responses should be made by Thu, 09 Jul 2020 14:57:34 +.
> Anything received after that time might be too late.
>
> The whole patch series can be found in one patch at:
> 
> https://www.kernel.org/pub/linux/kernel/v5.x/stable-review/patch-5.7.8-rc1.gz
> or in the git tree and branch at:
> 
> git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git 
> linux-5.7.y
> and the diffstat can be found below.
>
> thanks,
>
> greg k-h

Results from Linaro’s test farm.
No regressions on arm64, arm, x86_64, and i386.

Summary


kernel: 5.7.8-rc1
git repo: 
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git
git branch: linux-5.7.y
git commit: b371afd12a4884e417026e432f135844c56afb05
git describe: v5.7.6-374-gb371afd12a48
Test details: 
https://qa-reports.linaro.org/lkft/linux-stable-rc-5.7-oe/build/v5.7.6-374-gb371afd12a48

No regressions (compared to build v5.7.6)

No fixes (compared to build v5.7.6)

Ran 31484 total tests in the following environments and test suites.


Environments
--
- dragonboard-410c
- hi6220-hikey
- i386
- juno-r2
- juno-r2-compat
- juno-r2-kasan
- nxp-ls2088
- qemu_arm
- qemu_arm64
- qemu_i386
- qemu_x86_64
- x15
- x86
- x86-kasan

Test Suites
---
* build
* install-android-platform-tools-r2600
* install-android-platform-tools-r2800
* kselftest
* kselftest/drivers
* kselftest/filesystems
* kselftest/net
* libhugetlbfs
* linux-log-parser
* ltp-containers-tests
* ltp-cve-tests
* ltp-dio-tests
* ltp-fcntl-locktests-tests
* ltp-filecaps-tests
* ltp-fs-tests
* ltp-fs_bind-tests
* ltp-fs_perms_simple-tests
* ltp-fsx-tests
* ltp-hugetlb-tests
* ltp-io-tests
* ltp-ipc-tests
* ltp-mm-tests
* ltp-sched-tests
* ltp-syscalls-tests
* perf
* v4l2-compliance
* kvm-unit-tests
* ltp-cap_bounds-tests
* ltp-commands-tests
* ltp-cpuhotplug-tests
* ltp-crypto-tests
* ltp-math-tests
* network-basic-tests
* ltp-controllers-tests
* ltp-nptl-tests
* ltp-open-posix-tests
* ltp-pty-tests
* ltp-securebits-tests
* kselftest-vsyscall-mode-native
* kselftest-vsyscall-mode-native/drivers
* kselftest-vsyscall-mode-native/filesystems
* kselftest-vsyscall-mode-native/net
* kselftest-vsyscall-mode-none
* kselftest-vsyscall-mode-none/drivers
* kselftest-vsyscall-mode-none/filesystems
* kselftest-vsyscall-mode-none/net

-- 
Linaro LKFT
https://lkft.linaro.org


[PATCH v10 5/5] iommu/arm-smmu: Add global/context fault implementation hooks

2020-07-07 Thread Krishna Reddy
Add global/context fault hooks to allow vendor specific implementations
override default fault interrupt handlers.

Update NVIDIA implementation to override the default global/context fault
interrupt handlers and handle interrupts across the two ARM MMU-500s that
are programmed identically.

Signed-off-by: Krishna Reddy 
---
 drivers/iommu/arm-smmu-nvidia.c | 99 +
 drivers/iommu/arm-smmu.c| 17 +-
 drivers/iommu/arm-smmu.h|  3 +
 3 files changed, 117 insertions(+), 2 deletions(-)

diff --git a/drivers/iommu/arm-smmu-nvidia.c b/drivers/iommu/arm-smmu-nvidia.c
index 2f55e5793d34..31368057e9be 100644
--- a/drivers/iommu/arm-smmu-nvidia.c
+++ b/drivers/iommu/arm-smmu-nvidia.c
@@ -127,6 +127,103 @@ static int nvidia_smmu_reset(struct arm_smmu_device *smmu)
return 0;
 }
 
+static irqreturn_t nvidia_smmu_global_fault_inst(int irq,
+struct arm_smmu_device *smmu,
+int inst)
+{
+   u32 gfsr, gfsynr0, gfsynr1, gfsynr2;
+   void __iomem *gr0_base = nvidia_smmu_page(smmu, inst, 0);
+
+   gfsr = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSR);
+   if (!gfsr)
+   return IRQ_NONE;
+
+   gfsynr0 = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSYNR0);
+   gfsynr1 = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSYNR1);
+   gfsynr2 = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSYNR2);
+
+   dev_err_ratelimited(smmu->dev,
+   "Unexpected global fault, this could be serious\n");
+   dev_err_ratelimited(smmu->dev,
+   "\tGFSR 0x%08x, GFSYNR0 0x%08x, GFSYNR1 0x%08x, 
GFSYNR2 0x%08x\n",
+   gfsr, gfsynr0, gfsynr1, gfsynr2);
+
+   writel_relaxed(gfsr, gr0_base + ARM_SMMU_GR0_sGFSR);
+   return IRQ_HANDLED;
+}
+
+static irqreturn_t nvidia_smmu_global_fault(int irq, void *dev)
+{
+   unsigned int inst;
+   irqreturn_t ret = IRQ_NONE;
+   struct arm_smmu_device *smmu = dev;
+
+   for (inst = 0; inst < NUM_SMMU_INSTANCES; inst++) {
+   irqreturn_t irq_ret;
+
+   irq_ret = nvidia_smmu_global_fault_inst(irq, smmu, inst);
+   if (irq_ret == IRQ_HANDLED)
+   ret = IRQ_HANDLED;
+   }
+
+   return ret;
+}
+
+static irqreturn_t nvidia_smmu_context_fault_bank(int irq,
+ struct arm_smmu_device *smmu,
+ int idx, int inst)
+{
+   u32 fsr, fsynr, cbfrsynra;
+   unsigned long iova;
+   void __iomem *gr1_base = nvidia_smmu_page(smmu, inst, 1);
+   void __iomem *cb_base = nvidia_smmu_page(smmu, inst, smmu->numpage + 
idx);
+
+   fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR);
+   if (!(fsr & ARM_SMMU_FSR_FAULT))
+   return IRQ_NONE;
+
+   fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0);
+   iova = readq_relaxed(cb_base + ARM_SMMU_CB_FAR);
+   cbfrsynra = readl_relaxed(gr1_base + ARM_SMMU_GR1_CBFRSYNRA(idx));
+
+   dev_err_ratelimited(smmu->dev,
+   "Unhandled context fault: fsr=0x%x, iova=0x%08lx, 
fsynr=0x%x, cbfrsynra=0x%x, cb=%d\n",
+   fsr, iova, fsynr, cbfrsynra, idx);
+
+   writel_relaxed(fsr, cb_base + ARM_SMMU_CB_FSR);
+   return IRQ_HANDLED;
+}
+
+static irqreturn_t nvidia_smmu_context_fault(int irq, void *dev)
+{
+   int idx;
+   unsigned int inst;
+   irqreturn_t ret = IRQ_NONE;
+   struct arm_smmu_device *smmu;
+   struct iommu_domain *domain = dev;
+   struct arm_smmu_domain *smmu_domain;
+
+   smmu_domain = container_of(domain, struct arm_smmu_domain, domain);
+   smmu = smmu_domain->smmu;
+
+   for (inst = 0; inst < NUM_SMMU_INSTANCES; inst++) {
+   irqreturn_t irq_ret;
+
+   /*
+* Interrupt line is shared between all contexts.
+* Check for faults across all contexts.
+*/
+   for (idx = 0; idx < smmu->num_context_banks; idx++) {
+   irq_ret = nvidia_smmu_context_fault_bank(irq, smmu,
+idx, inst);
+   if (irq_ret == IRQ_HANDLED)
+   ret = IRQ_HANDLED;
+   }
+   }
+
+   return ret;
+}
+
 static const struct arm_smmu_impl nvidia_smmu_impl = {
.read_reg = nvidia_smmu_read_reg,
.write_reg = nvidia_smmu_write_reg,
@@ -134,6 +231,8 @@ static const struct arm_smmu_impl nvidia_smmu_impl = {
.write_reg64 = nvidia_smmu_write_reg64,
.reset = nvidia_smmu_reset,
.tlb_sync = nvidia_smmu_tlb_sync,
+   .global_fault = nvidia_smmu_global_fault,
+   .context_fault = nvidia_smmu_context_fault,
 };
 
 struct arm_smmu_device *nvidia_smmu_impl_init(struct arm_smmu_device *smmu)
diff --git 

[PATCH v10 1/5] iommu/arm-smmu: move TLB timeout and spin count macros

2020-07-07 Thread Krishna Reddy
Move TLB timeout and spin count macros to header file to
allow using the same from vendor specific implementations.

Signed-off-by: Krishna Reddy 
---
 drivers/iommu/arm-smmu.c | 3 ---
 drivers/iommu/arm-smmu.h | 2 ++
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 243bc4cb2705..d2054178df35 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -52,9 +52,6 @@
  */
 #define QCOM_DUMMY_VAL -1
 
-#define TLB_LOOP_TIMEOUT   100 /* 1s! */
-#define TLB_SPIN_COUNT 10
-
 #define MSI_IOVA_BASE  0x800
 #define MSI_IOVA_LENGTH0x10
 
diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h
index d172c024be61..c7d0122a7c6c 100644
--- a/drivers/iommu/arm-smmu.h
+++ b/drivers/iommu/arm-smmu.h
@@ -236,6 +236,8 @@ enum arm_smmu_cbar_type {
 /* Maximum number of context banks per SMMU */
 #define ARM_SMMU_MAX_CBS   128
 
+#define TLB_LOOP_TIMEOUT   100 /* 1s! */
+#define TLB_SPIN_COUNT 10
 
 /* Shared driver definitions */
 enum arm_smmu_arch_version {
-- 
2.26.2



[PATCH v10 3/5] iommu/arm-smmu: add NVIDIA implementation for ARM MMU-500 usage

2020-07-07 Thread Krishna Reddy
NVIDIA's Tegra194 SoC has three ARM MMU-500 instances.
It uses two of the ARM MMU-500s together to interleave IOVA
accesses across them and must be programmed identically.
This implementation supports programming the two ARM MMU-500s
that must be programmed identically.

The third ARM MMU-500 instance is supported by standard
arm-smmu.c driver itself.

Signed-off-by: Krishna Reddy 
---
 MAINTAINERS |   2 +
 drivers/iommu/Makefile  |   2 +-
 drivers/iommu/arm-smmu-impl.c   |   3 +
 drivers/iommu/arm-smmu-nvidia.c | 179 
 drivers/iommu/arm-smmu.c|   1 +
 drivers/iommu/arm-smmu.h|   1 +
 6 files changed, 187 insertions(+), 1 deletion(-)
 create mode 100644 drivers/iommu/arm-smmu-nvidia.c

diff --git a/MAINTAINERS b/MAINTAINERS
index c23352059a6b..534cedaf8e55 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16811,8 +16811,10 @@ F: drivers/i2c/busses/i2c-tegra.c
 
 TEGRA IOMMU DRIVERS
 M: Thierry Reding 
+R: Krishna Reddy 
 L: linux-te...@vger.kernel.org
 S: Supported
+F: drivers/iommu/arm-smmu-nvidia.c
 F: drivers/iommu/tegra*
 
 TEGRA KBC DRIVER
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 342190196dfb..2b8203db73ec 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -15,7 +15,7 @@ obj-$(CONFIG_AMD_IOMMU) += amd/iommu.o amd/init.o amd/quirks.o
 obj-$(CONFIG_AMD_IOMMU_DEBUGFS) += amd/debugfs.o
 obj-$(CONFIG_AMD_IOMMU_V2) += amd/iommu_v2.o
 obj-$(CONFIG_ARM_SMMU) += arm_smmu.o
-arm_smmu-objs += arm-smmu.o arm-smmu-impl.o arm-smmu-qcom.o
+arm_smmu-objs += arm-smmu.o arm-smmu-impl.o arm-smmu-nvidia.o arm-smmu-qcom.o
 obj-$(CONFIG_ARM_SMMU_V3) += arm-smmu-v3.o
 obj-$(CONFIG_DMAR_TABLE) += intel/dmar.o
 obj-$(CONFIG_INTEL_IOMMU) += intel/iommu.o intel/pasid.o
diff --git a/drivers/iommu/arm-smmu-impl.c b/drivers/iommu/arm-smmu-impl.c
index c75b9d957b70..f15571d05474 100644
--- a/drivers/iommu/arm-smmu-impl.c
+++ b/drivers/iommu/arm-smmu-impl.c
@@ -171,6 +171,9 @@ struct arm_smmu_device *arm_smmu_impl_init(struct 
arm_smmu_device *smmu)
if (of_property_read_bool(np, "calxeda,smmu-secure-config-access"))
smmu->impl = _impl;
 
+   if (of_device_is_compatible(np, "nvidia,tegra194-smmu"))
+   return nvidia_smmu_impl_init(smmu);
+
if (of_device_is_compatible(np, "qcom,sdm845-smmu-500") ||
of_device_is_compatible(np, "qcom,sc7180-smmu-500"))
return qcom_smmu_impl_init(smmu);
diff --git a/drivers/iommu/arm-smmu-nvidia.c b/drivers/iommu/arm-smmu-nvidia.c
new file mode 100644
index ..2f55e5793d34
--- /dev/null
+++ b/drivers/iommu/arm-smmu-nvidia.c
@@ -0,0 +1,179 @@
+// SPDX-License-Identifier: GPL-2.0-only
+// Copyright (C) 2019-2020 NVIDIA CORPORATION.  All rights reserved.
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "arm-smmu.h"
+
+/*
+ * Tegra194 has three ARM MMU-500 Instances.
+ * Two of them are used together and must be programmed identically for
+ * interleaved IOVA accesses across them and translates accesses from
+ * non-isochronous HW devices.
+ * Third one is used for translating accesses from isochronous HW devices.
+ * This implementation supports programming of the two instances that must
+ * be programmed identically.
+ * The third instance usage is through standard arm-smmu driver itself and
+ * is out of scope of this implementation.
+ */
+#define NUM_SMMU_INSTANCES 2
+
+struct nvidia_smmu {
+   struct arm_smmu_device  smmu;
+   void __iomem*bases[NUM_SMMU_INSTANCES];
+};
+
+static inline void __iomem *nvidia_smmu_page(struct arm_smmu_device *smmu,
+unsigned int inst, int page)
+{
+   struct nvidia_smmu *nvidia_smmu;
+
+   nvidia_smmu = container_of(smmu, struct nvidia_smmu, smmu);
+   return nvidia_smmu->bases[inst] + (page << smmu->pgshift);
+}
+
+static u32 nvidia_smmu_read_reg(struct arm_smmu_device *smmu,
+   int page, int offset)
+{
+   void __iomem *reg = nvidia_smmu_page(smmu, 0, page) + offset;
+
+   return readl_relaxed(reg);
+}
+
+static void nvidia_smmu_write_reg(struct arm_smmu_device *smmu,
+ int page, int offset, u32 val)
+{
+   unsigned int i;
+
+   for (i = 0; i < NUM_SMMU_INSTANCES; i++) {
+   void __iomem *reg = nvidia_smmu_page(smmu, i, page) + offset;
+
+   writel_relaxed(val, reg);
+   }
+}
+
+static u64 nvidia_smmu_read_reg64(struct arm_smmu_device *smmu,
+ int page, int offset)
+{
+   void __iomem *reg = nvidia_smmu_page(smmu, 0, page) + offset;
+
+   return readq_relaxed(reg);
+}
+
+static void nvidia_smmu_write_reg64(struct arm_smmu_device *smmu,
+   int page, int offset, u64 val)
+{
+   unsigned int i;
+
+   for (i = 0; i < NUM_SMMU_INSTANCES; i++) {
+   void 

[PATCH v10 0/5] NVIDIA ARM SMMU Implementation

2020-07-07 Thread Krishna Reddy
Changes in v10:
Perform SMMU base ioremap before calling implementation init.
Check for Global faults across both ARM MMU-500s during global interrupt.
Check for context faults across all contexts of both ARM MMU-500s during 
context fault interrupt.
Add new DT binding nvidia,smmu-500 for NVIDIA implementation.

v9 - https://lkml.org/lkml/2020/6/30/1282
v8 - https://lkml.org/lkml/2020/6/29/2385
v7 - https://lkml.org/lkml/2020/6/28/347
v6 - https://lkml.org/lkml/2020/6/4/1018
v5 - https://lkml.org/lkml/2020/5/21/1114
v4 - https://lkml.org/lkml/2019/10/30/1054
v3 - https://lkml.org/lkml/2019/10/18/1601
v2 - https://lkml.org/lkml/2019/9/2/980
v1 - https://lkml.org/lkml/2019/8/29/1588


Krishna Reddy (5):
  iommu/arm-smmu: move TLB timeout and spin count macros
  iommu/arm-smmu: ioremap smmu mmio region before implementation init
  iommu/arm-smmu: add NVIDIA implementation for ARM MMU-500 usage
  dt-bindings: arm-smmu: add binding for Tegra194 SMMU
  iommu/arm-smmu: Add global/context fault implementation hooks

 .../devicetree/bindings/iommu/arm,smmu.yaml   |  18 ++
 MAINTAINERS   |   2 +
 drivers/iommu/Makefile|   2 +-
 drivers/iommu/arm-smmu-impl.c |   3 +
 drivers/iommu/arm-smmu-nvidia.c   | 278 ++
 drivers/iommu/arm-smmu.c  |  29 +-
 drivers/iommu/arm-smmu.h  |   6 +
 7 files changed, 328 insertions(+), 10 deletions(-)
 create mode 100644 drivers/iommu/arm-smmu-nvidia.c


base-commit: e5640f21b63d2a5d3e4e0c4111b2b38e99fe5164
-- 
2.26.2



[PATCH v10 2/5] iommu/arm-smmu: ioremap smmu mmio region before implementation init

2020-07-07 Thread Krishna Reddy
ioremap smmu mmio region before calling into implementation init.
This is necessary to allow mapped address available during vendor
specific implementation init.

Signed-off-by: Krishna Reddy 
---
 drivers/iommu/arm-smmu.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index d2054178df35..e03e873d3bca 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -2120,10 +2120,6 @@ static int arm_smmu_device_probe(struct platform_device 
*pdev)
if (err)
return err;
 
-   smmu = arm_smmu_impl_init(smmu);
-   if (IS_ERR(smmu))
-   return PTR_ERR(smmu);
-
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
ioaddr = res->start;
smmu->base = devm_ioremap_resource(dev, res);
@@ -2135,6 +2131,10 @@ static int arm_smmu_device_probe(struct platform_device 
*pdev)
 */
smmu->numpage = resource_size(res);
 
+   smmu = arm_smmu_impl_init(smmu);
+   if (IS_ERR(smmu))
+   return PTR_ERR(smmu);
+
num_irqs = 0;
while ((res = platform_get_resource(pdev, IORESOURCE_IRQ, num_irqs))) {
num_irqs++;
-- 
2.26.2



[PATCH v10 4/5] dt-bindings: arm-smmu: add binding for Tegra194 SMMU

2020-07-07 Thread Krishna Reddy
Add binding for NVIDIA's Tegra194 SoC SMMU.

Signed-off-by: Krishna Reddy 
---
 .../devicetree/bindings/iommu/arm,smmu.yaml| 18 ++
 1 file changed, 18 insertions(+)

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml 
b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index d7ceb4c34423..ac1f526c3424 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -38,6 +38,11 @@ properties:
   - qcom,sc7180-smmu-500
   - qcom,sdm845-smmu-500
   - const: arm,mmu-500
+  - description: NVIDIA SoCs that program two ARM MMU-500s identically
+items:
+  - enum:
+  - nvidia,tegra194-smmu
+  - const: nvidia,smmu-500
   - items:
   - const: arm,mmu-500
   - const: arm,smmu-v2
@@ -138,6 +143,19 @@ required:
 
 additionalProperties: false
 
+allOf:
+  - if:
+  properties:
+compatible:
+  contains:
+enum:
+  - nvidia,tegra194-smmu
+then:
+  properties:
+reg:
+  minItems: 2
+  maxItems: 2
+
 examples:
   - |+
 /* SMMU with stream matching or stream indexing */
-- 
2.26.2



Re: [PATCH] irqchip/stm32-exti: map direct event to irq parent

2020-07-07 Thread kernel test robot
Hi Alexandre,

I love your patch! Perhaps something to improve:

[auto build test WARNING on stm32/stm32-next]
[also build test WARNING on soc/for-next v5.8-rc4 next-20200707]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use  as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Alexandre-Torgue/irqchip-stm32-exti-map-direct-event-to-irq-parent/20200706-161327
base:   https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git 
stm32-next
config: arm-randconfig-s031-20200707 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce:
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.2-31-gabbfd661-dirty
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 
CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

   In file included from include/linux/build_bug.h:5,
from include/linux/bits.h:23,
from include/linux/bitops.h:5,
from drivers/irqchip/irq-stm32-exti.c:8:
   drivers/irqchip/irq-stm32-exti.c: In function 'stm32_exti_h_domain_alloc':
   drivers/irqchip/irq-stm32-exti.c:683:23: warning: comparison of unsigned 
expression >= 0 is always true [-Wtype-limits]
 683 |  if (desc->irq_parent >= 0) {
 |   ^~
   include/linux/compiler.h:58:52: note: in definition of macro '__trace_if_var'
  58 | #define __trace_if_var(cond) (__builtin_constant_p(cond) ? (cond) : 
__trace_if_value(cond))
 |^~~~
>> drivers/irqchip/irq-stm32-exti.c:683:2: note: in expansion of macro 'if'
 683 |  if (desc->irq_parent >= 0) {
 |  ^~
   drivers/irqchip/irq-stm32-exti.c:683:23: warning: comparison of unsigned 
expression >= 0 is always true [-Wtype-limits]
 683 |  if (desc->irq_parent >= 0) {
 |   ^~
   include/linux/compiler.h:58:61: note: in definition of macro '__trace_if_var'
  58 | #define __trace_if_var(cond) (__builtin_constant_p(cond) ? (cond) : 
__trace_if_value(cond))
 | ^~~~
>> drivers/irqchip/irq-stm32-exti.c:683:2: note: in expansion of macro 'if'
 683 |  if (desc->irq_parent >= 0) {
 |  ^~
   drivers/irqchip/irq-stm32-exti.c:683:23: warning: comparison of unsigned 
expression >= 0 is always true [-Wtype-limits]
 683 |  if (desc->irq_parent >= 0) {
 |   ^~
   include/linux/compiler.h:69:3: note: in definition of macro 
'__trace_if_value'
  69 |  (cond) ? \
 |   ^~~~
   include/linux/compiler.h:56:28: note: in expansion of macro '__trace_if_var'
  56 | #define if(cond, ...) if ( __trace_if_var( !!(cond , ## __VA_ARGS__) 
) )
 |^~
>> drivers/irqchip/irq-stm32-exti.c:683:2: note: in expansion of macro 'if'
 683 |  if (desc->irq_parent >= 0) {
 |  ^~

vim +/if +683 drivers/irqchip/irq-stm32-exti.c

   659  
   660  static int stm32_exti_h_domain_alloc(struct irq_domain *dm,
   661   unsigned int virq,
   662   unsigned int nr_irqs, void *data)
   663  {
   664  struct stm32_exti_host_data *host_data = dm->host_data;
   665  struct stm32_exti_chip_data *chip_data;
   666  const struct stm32_desc_irq *desc;
   667  struct irq_fwspec *fwspec = data;
   668  struct irq_fwspec p_fwspec;
   669  irq_hw_number_t hwirq;
   670  int bank;
   671  
   672  hwirq = fwspec->param[0];
   673  bank  = hwirq / IRQS_PER_BANK;
   674  chip_data = _data->chips_data[bank];
   675  
   676  
   677  desc = stm32_exti_get_desc(host_data->drv_data, hwirq);
   678  if (!desc)
   679  return -EINVAL;
   680  
   681  irq_domain_set_hwirq_and_chip(dm, virq, hwirq, desc->chip,
   682chip_data);
 > 683  if (desc->irq_parent >= 0) {
   684  p_fwspec.fwnode = dm->parent->fwnode;
   685  p_fwspec.param_count = 3;
   686  p_fwspec.param[0] = GIC_SPI;
   687  p_fwspec.param[1] = desc->irq_parent;
   688  p_fwspec.param[2] = IRQ_TYPE_LEVEL_HIGH;
   689  
   690  return irq_domain_alloc_irqs_parent(dm, virq, 1, 
_fwspec);
   

[PATCH v1] platform/chrome: cros_ec_debugfs: conditionally create uptime node

2020-07-07 Thread Eizan Miyamoto
Before creating an 'uptime' node in debugfs, this change adds a check to
see if a EC_CMD_GET_UPTIME_INFO command can be successfully run.

If the uptime node is created, userspace programs may periodically poll
it (e.g., timberslide), causing commands to be sent to the EC each time.
If the EC doesn't support EC_CMD_GET_UPTIME_INFO, an error will be
emitted in the EC console, producing noise.

Signed-off-by: Eizan Miyamoto 
---

 drivers/platform/chrome/cros_ec_debugfs.c | 35 +--
 1 file changed, 26 insertions(+), 9 deletions(-)

diff --git a/drivers/platform/chrome/cros_ec_debugfs.c 
b/drivers/platform/chrome/cros_ec_debugfs.c
index ecfada00e6c51..8708fe12f8ca8 100644
--- a/drivers/platform/chrome/cros_ec_debugfs.c
+++ b/drivers/platform/chrome/cros_ec_debugfs.c
@@ -242,17 +242,14 @@ static ssize_t cros_ec_pdinfo_read(struct file *file,
   read_buf, p - read_buf);
 }
 
-static ssize_t cros_ec_uptime_read(struct file *file, char __user *user_buf,
-  size_t count, loff_t *ppos)
+static int cros_ec_get_uptime(struct cros_ec_device *ec_dev,
+ uint32_t *uptime)
 {
-   struct cros_ec_debugfs *debug_info = file->private_data;
-   struct cros_ec_device *ec_dev = debug_info->ec->ec_dev;
struct {
struct cros_ec_command cmd;
struct ec_response_uptime_info resp;
} __packed msg = {};
struct ec_response_uptime_info *resp;
-   char read_buf[32];
int ret;
 
resp = (struct ec_response_uptime_info *)
@@ -264,8 +261,24 @@ static ssize_t cros_ec_uptime_read(struct file *file, char 
__user *user_buf,
if (ret < 0)
return ret;
 
-   ret = scnprintf(read_buf, sizeof(read_buf), "%u\n",
-   resp->time_since_ec_boot_ms);
+   *uptime = resp->time_since_ec_boot_ms;
+   return 0;
+}
+
+static ssize_t cros_ec_uptime_read(struct file *file, char __user *user_buf,
+  size_t count, loff_t *ppos)
+{
+   struct cros_ec_debugfs *debug_info = file->private_data;
+   struct cros_ec_device *ec_dev = debug_info->ec->ec_dev;
+   char read_buf[32];
+   int ret;
+   uint32_t uptime;
+
+   ret = cros_ec_get_uptime(ec_dev, );
+   if (ret < 0)
+   return ret;
+
+   ret = scnprintf(read_buf, sizeof(read_buf), "%u\n", uptime);
 
return simple_read_from_buffer(user_buf, count, ppos, read_buf, ret);
 }
@@ -425,6 +438,7 @@ static int cros_ec_debugfs_probe(struct platform_device *pd)
const char *name = ec_platform->ec_name;
struct cros_ec_debugfs *debug_info;
int ret;
+   uint32_t uptime;
 
debug_info = devm_kzalloc(ec->dev, sizeof(*debug_info), GFP_KERNEL);
if (!debug_info)
@@ -444,8 +458,11 @@ static int cros_ec_debugfs_probe(struct platform_device 
*pd)
debugfs_create_file("pdinfo", 0444, debug_info->dir, debug_info,
_ec_pdinfo_fops);
 
-   debugfs_create_file("uptime", 0444, debug_info->dir, debug_info,
-   _ec_uptime_fops);
+   if (cros_ec_get_uptime(debug_info->ec->ec_dev, ) >= 0)
+   debugfs_create_file("uptime", 0444, debug_info->dir, debug_info,
+   _ec_uptime_fops);
+   else
+   dev_dbg(ec->dev, "EC does not provide uptime");
 
debugfs_create_x32("last_resume_result", 0444, debug_info->dir,
   >ec_dev->last_resume_result);
-- 
2.27.0.383.g050319c2ae-goog



[PATCH v3 5/9] powerpc/watchpoint: Set CPU_FTR_DAWR1 based on pa-features bit

2020-07-07 Thread Ravi Bangoria
As per the PAPR, bit 0 of byte 64 in pa-features property indicates
availability of 2nd DAWR registers. i.e. If this bit is set, 2nd
DAWR is present, otherwise not. Host generally uses "cpu-features",
which masks "pa-features". But "cpu-features" are still not used for
guests and thus this change is mostly applicable for guests only.

Signed-off-by: Ravi Bangoria 
---
 arch/powerpc/kernel/prom.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 9cc49f265c86..c76c09b97bc8 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -175,6 +175,8 @@ static struct ibm_pa_feature {
 */
{ .pabyte = 22, .pabit = 0, .cpu_features = CPU_FTR_TM_COMP,
  .cpu_user_ftrs2 = PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_HTM_NOSC_COMP 
},
+
+   { .pabyte = 64, .pabit = 0, .cpu_features = CPU_FTR_DAWR1 },
 };
 
 static void __init scan_features(unsigned long node, const unsigned char *ftrs,
-- 
2.26.2



[PATCH v3 8/9] powerpc/watchpoint: Return available watchpoints dynamically

2020-07-07 Thread Ravi Bangoria
So far Book3S Powerpc supported only one watchpoint. Power10 is
introducing 2nd DAWR. Enable 2nd DAWR support for Power10.
Availability of 2nd DAWR will depend on CPU_FTR_DAWR1.

Signed-off-by: Ravi Bangoria 
---
 arch/powerpc/include/asm/cputable.h  | 4 +++-
 arch/powerpc/include/asm/hw_breakpoint.h | 5 +++--
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/include/asm/cputable.h 
b/arch/powerpc/include/asm/cputable.h
index 3445c86e1f6f..36a0851a7a9b 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -633,7 +633,9 @@ enum {
  * Maximum number of hw breakpoint supported on powerpc. Number of
  * breakpoints supported by actual hw might be less than this.
  */
-#define HBP_NUM_MAX1
+#define HBP_NUM_MAX2
+#define HBP_NUM_ONE1
+#define HBP_NUM_TWO2
 
 #endif /* !__ASSEMBLY__ */
 
diff --git a/arch/powerpc/include/asm/hw_breakpoint.h 
b/arch/powerpc/include/asm/hw_breakpoint.h
index cb424799da0d..d4eab1694bcd 100644
--- a/arch/powerpc/include/asm/hw_breakpoint.h
+++ b/arch/powerpc/include/asm/hw_breakpoint.h
@@ -5,10 +5,11 @@
  * Copyright 2010, IBM Corporation.
  * Author: K.Prasad 
  */
-
 #ifndef _PPC_BOOK3S_64_HW_BREAKPOINT_H
 #define _PPC_BOOK3S_64_HW_BREAKPOINT_H
 
+#include 
+
 #ifdef __KERNEL__
 struct arch_hw_breakpoint {
unsigned long   address;
@@ -46,7 +47,7 @@ struct arch_hw_breakpoint {
 
 static inline int nr_wp_slots(void)
 {
-   return HBP_NUM_MAX;
+   return cpu_has_feature(CPU_FTR_DAWR1) ? HBP_NUM_TWO : HBP_NUM_ONE;
 }
 
 #ifdef CONFIG_HAVE_HW_BREAKPOINT
-- 
2.26.2



Re: [PATCH v10 0/9] firmware: add request_partial_firmware_into_buf

2020-07-07 Thread Scott Branden

Hi Florian,

On 2020-07-07 9:38 p.m., Florian Fainelli wrote:


On 7/6/2020 4:23 PM, Scott Branden wrote:

This patch series adds partial read support via a new call
request_partial_firmware_into_buf.
Such support is needed when the whole file is not needed and/or
only a smaller portion of the file will fit into allocated memory
at any one time.
In order to accept the enhanced API it has been requested that kernel
selftests and upstreamed driver utilize the API enhancement and so
are included in this patch series.

Also in this patch series is the addition of a new Broadcom VK driver
utilizing the new request_firmware_into_buf enhanced API.

Further comment followed to add IMA support of the partial reads
originating from request_firmware_into_buf calls.  And another request
to move existing kernel_read_file* functions to its own include file.

Do you have any way to separate the VK drivers submission from the
request_partial_firmware_into_buf() work that you are doing? It looks
like it is going to require quite a few iterations of this patch set for
the firmware/fs/IMA part to be ironed out, so if you could get your
driver separated out, it might help you achieve partial success here.

Originally I did not submit the driver.
But Greg K-H rejected the pread support unless there was an actual user 
in the kernel.

Hence the need to submit this all in the patch series.



[PATCH v3 7/9] powerpc/watchpoint: Guest support for 2nd DAWR hcall

2020-07-07 Thread Ravi Bangoria
2nd DAWR can be set/unset using H_SET_MODE hcall with resource value 5.
Enable powervm guest support with that. This has no effect on kvm guest
because kvm will return error if guest does hcall with resource value 5.

Signed-off-by: Ravi Bangoria 
---
 arch/powerpc/include/asm/hvcall.h | 1 +
 arch/powerpc/include/asm/machdep.h| 2 +-
 arch/powerpc/include/asm/plpar_wrappers.h | 5 +
 arch/powerpc/kernel/dawr.c| 2 +-
 arch/powerpc/platforms/pseries/setup.c| 7 +--
 5 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/include/asm/hvcall.h 
b/arch/powerpc/include/asm/hvcall.h
index a7f6f1aeda6b..3f170b9496a1 100644
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -357,6 +357,7 @@
 #define H_SET_MODE_RESOURCE_SET_DAWR0  2
 #define H_SET_MODE_RESOURCE_ADDR_TRANS_MODE3
 #define H_SET_MODE_RESOURCE_LE 4
+#define H_SET_MODE_RESOURCE_SET_DAWR1  5
 
 /* Values for argument to H_SIGNAL_SYS_RESET */
 #define H_SIGNAL_SYS_RESET_ALL -1
diff --git a/arch/powerpc/include/asm/machdep.h 
b/arch/powerpc/include/asm/machdep.h
index 7bcb6a39..a90b892f0bfe 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -131,7 +131,7 @@ struct machdep_calls {
unsigned long dabrx);
 
/* Set DAWR for this platform, leave empty for default implementation */
-   int (*set_dawr)(unsigned long dawr,
+   int (*set_dawr)(int nr, unsigned long dawr,
unsigned long dawrx);
 
 #ifdef CONFIG_PPC32/* XXX for now */
diff --git a/arch/powerpc/include/asm/plpar_wrappers.h 
b/arch/powerpc/include/asm/plpar_wrappers.h
index 93eb133d572c..d7a1acc83593 100644
--- a/arch/powerpc/include/asm/plpar_wrappers.h
+++ b/arch/powerpc/include/asm/plpar_wrappers.h
@@ -315,6 +315,11 @@ static inline long plpar_set_watchpoint0(unsigned long 
dawr0, unsigned long dawr
return plpar_set_mode(0, H_SET_MODE_RESOURCE_SET_DAWR0, dawr0, dawrx0);
 }
 
+static inline long plpar_set_watchpoint1(unsigned long dawr1, unsigned long 
dawrx1)
+{
+   return plpar_set_mode(0, H_SET_MODE_RESOURCE_SET_DAWR1, dawr1, dawrx1);
+}
+
 static inline long plpar_signal_sys_reset(long cpu)
 {
return plpar_hcall_norets(H_SIGNAL_SYS_RESET, cpu);
diff --git a/arch/powerpc/kernel/dawr.c b/arch/powerpc/kernel/dawr.c
index 500f52fa4711..cdc2dccb987d 100644
--- a/arch/powerpc/kernel/dawr.c
+++ b/arch/powerpc/kernel/dawr.c
@@ -37,7 +37,7 @@ int set_dawr(int nr, struct arch_hw_breakpoint *brk)
dawrx |= (mrd & 0x3f) << (63 - 53);
 
if (ppc_md.set_dawr)
-   return ppc_md.set_dawr(dawr, dawrx);
+   return ppc_md.set_dawr(nr, dawr, dawrx);
 
if (nr == 0) {
mtspr(SPRN_DAWR0, dawr);
diff --git a/arch/powerpc/platforms/pseries/setup.c 
b/arch/powerpc/platforms/pseries/setup.c
index 2db8469e475f..d516ee8eb7fc 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -831,12 +831,15 @@ static int pseries_set_xdabr(unsigned long dabr, unsigned 
long dabrx)
return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
 }
 
-static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx)
+static int pseries_set_dawr(int nr, unsigned long dawr, unsigned long dawrx)
 {
/* PAPR says we can't set HYP */
dawrx &= ~DAWRX_HYP;
 
-   return  plpar_set_watchpoint0(dawr, dawrx);
+   if (nr == 0)
+   return plpar_set_watchpoint0(dawr, dawrx);
+   else
+   return plpar_set_watchpoint1(dawr, dawrx);
 }
 
 #define CMO_CHARACTERISTICS_TOKEN 44
-- 
2.26.2



[PATCH v3 6/9] powerpc/watchpoint: Rename current H_SET_MODE DAWR macro

2020-07-07 Thread Ravi Bangoria
Current H_SET_MODE hcall macro name for setting/resetting DAWR0 is
H_SET_MODE_RESOURCE_SET_DAWR. Add suffix 0 to macro name as well.

Signed-off-by: Ravi Bangoria 
---
 arch/powerpc/include/asm/hvcall.h | 2 +-
 arch/powerpc/include/asm/plpar_wrappers.h | 2 +-
 arch/powerpc/kvm/book3s_hv.c  | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/include/asm/hvcall.h 
b/arch/powerpc/include/asm/hvcall.h
index e90c073e437e..a7f6f1aeda6b 100644
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -354,7 +354,7 @@
 
 /* Values for 2nd argument to H_SET_MODE */
 #define H_SET_MODE_RESOURCE_SET_CIABR  1
-#define H_SET_MODE_RESOURCE_SET_DAWR   2
+#define H_SET_MODE_RESOURCE_SET_DAWR0  2
 #define H_SET_MODE_RESOURCE_ADDR_TRANS_MODE3
 #define H_SET_MODE_RESOURCE_LE 4
 
diff --git a/arch/powerpc/include/asm/plpar_wrappers.h 
b/arch/powerpc/include/asm/plpar_wrappers.h
index 4497c8afb573..93eb133d572c 100644
--- a/arch/powerpc/include/asm/plpar_wrappers.h
+++ b/arch/powerpc/include/asm/plpar_wrappers.h
@@ -312,7 +312,7 @@ static inline long plpar_set_ciabr(unsigned long ciabr)
 
 static inline long plpar_set_watchpoint0(unsigned long dawr0, unsigned long 
dawrx0)
 {
-   return plpar_set_mode(0, H_SET_MODE_RESOURCE_SET_DAWR, dawr0, dawrx0);
+   return plpar_set_mode(0, H_SET_MODE_RESOURCE_SET_DAWR0, dawr0, dawrx0);
 }
 
 static inline long plpar_signal_sys_reset(long cpu)
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 6bf66649ab92..7ad692c2d7c7 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -764,7 +764,7 @@ static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, 
unsigned long mflags,
return H_P3;
vcpu->arch.ciabr  = value1;
return H_SUCCESS;
-   case H_SET_MODE_RESOURCE_SET_DAWR:
+   case H_SET_MODE_RESOURCE_SET_DAWR0:
if (!kvmppc_power8_compatible(vcpu))
return H_P2;
if (!ppc_breakpoint_available())
-- 
2.26.2



[PATCH v3 9/9] powerpc/watchpoint: Remove 512 byte boundary

2020-07-07 Thread Ravi Bangoria
Power10 has removed 512 bytes boundary from match criteria. i.e. The watch
range can cross 512 bytes boundary.

Signed-off-by: Ravi Bangoria 
---
 arch/powerpc/kernel/hw_breakpoint.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/hw_breakpoint.c 
b/arch/powerpc/kernel/hw_breakpoint.c
index 7a66c370a105..270fbb4d01ce 100644
--- a/arch/powerpc/kernel/hw_breakpoint.c
+++ b/arch/powerpc/kernel/hw_breakpoint.c
@@ -418,8 +418,9 @@ static int hw_breakpoint_validate_len(struct 
arch_hw_breakpoint *hw)
 
if (dawr_enabled()) {
max_len = DAWR_MAX_LEN;
-   /* DAWR region can't cross 512 bytes boundary */
-   if (ALIGN_DOWN(start_addr, SZ_512) != ALIGN_DOWN(end_addr - 1, 
SZ_512))
+   /* DAWR region can't cross 512 bytes boundary on p10 
predecessors */
+   if (!cpu_has_feature(CPU_FTR_ARCH_31) &&
+   (ALIGN_DOWN(start_addr, SZ_512) != ALIGN_DOWN(end_addr - 1, 
SZ_512)))
return -EINVAL;
} else if (IS_ENABLED(CONFIG_PPC_8xx)) {
/* 8xx can setup a range without limitation */
-- 
2.26.2



[PATCH v3 1/9] powerpc/watchpoint: Fix 512 byte boundary limit

2020-07-07 Thread Ravi Bangoria
Milton Miller reported that we are aligning start and end address to
wrong size SZ_512M. It should be SZ_512. Fix that.

While doing this change I also found a case where ALIGN() comparison
fails. Within a given aligned range, ALIGN() of two addresses does not
match when start address is pointing to the first byte and end address
is pointing to any other byte except the first one. But that's not true
for ALIGN_DOWN(). ALIGN_DOWN() of any two addresses within that range
will always point to the first byte. So use ALIGN_DOWN() instead of
ALIGN().

Fixes: e68ef121c1f4 ("powerpc/watchpoint: Use builtin ALIGN*() macros")
Reported-by: Milton Miller 
Signed-off-by: Ravi Bangoria 
---
 arch/powerpc/kernel/hw_breakpoint.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kernel/hw_breakpoint.c 
b/arch/powerpc/kernel/hw_breakpoint.c
index daf0e1da..031e6defc08e 100644
--- a/arch/powerpc/kernel/hw_breakpoint.c
+++ b/arch/powerpc/kernel/hw_breakpoint.c
@@ -419,7 +419,7 @@ static int hw_breakpoint_validate_len(struct 
arch_hw_breakpoint *hw)
if (dawr_enabled()) {
max_len = DAWR_MAX_LEN;
/* DAWR region can't cross 512 bytes boundary */
-   if (ALIGN(start_addr, SZ_512M) != ALIGN(end_addr - 1, SZ_512M))
+   if (ALIGN_DOWN(start_addr, SZ_512) != ALIGN_DOWN(end_addr - 1, 
SZ_512))
return -EINVAL;
} else if (IS_ENABLED(CONFIG_PPC_8xx)) {
/* 8xx can setup a range without limitation */
-- 
2.26.2



[PATCH v3 4/9] powerpc/dt_cpu_ftrs: Add feature for 2nd DAWR

2020-07-07 Thread Ravi Bangoria
Add new device-tree feature for 2nd DAWR. If this feature is present,
2nd DAWR is supported, otherwise not.

Signed-off-by: Ravi Bangoria 
---
 arch/powerpc/include/asm/cputable.h | 7 +--
 arch/powerpc/kernel/dt_cpu_ftrs.c   | 7 +++
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/cputable.h 
b/arch/powerpc/include/asm/cputable.h
index e506d429b1af..3445c86e1f6f 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -214,6 +214,7 @@ static inline void cpu_feature_keys_init(void) { }
 #define CPU_FTR_P9_TLBIE_ERAT_BUG  LONG_ASM_CONST(0x0001)
 #define CPU_FTR_P9_RADIX_PREFETCH_BUG  LONG_ASM_CONST(0x0002)
 #define CPU_FTR_ARCH_31
LONG_ASM_CONST(0x0004)
+#define CPU_FTR_DAWR1  LONG_ASM_CONST(0x0008)
 
 #ifndef __ASSEMBLY__
 
@@ -497,14 +498,16 @@ static inline void cpu_feature_keys_init(void) { }
 #define CPU_FTRS_POSSIBLE  \
(CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | CPU_FTRS_POWER8 | \
 CPU_FTR_ALTIVEC_COMP | CPU_FTR_VSX_COMP | CPU_FTRS_POWER9 | \
-CPU_FTRS_POWER9_DD2_1 | CPU_FTRS_POWER9_DD2_2 | CPU_FTRS_POWER10)
+CPU_FTRS_POWER9_DD2_1 | CPU_FTRS_POWER9_DD2_2 | CPU_FTRS_POWER10 | 
\
+CPU_FTR_DAWR1)
 #else
 #define CPU_FTRS_POSSIBLE  \
(CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | \
 CPU_FTRS_POWER6 | CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | \
 CPU_FTRS_POWER8 | CPU_FTRS_CELL | CPU_FTRS_PA6T | \
 CPU_FTR_VSX_COMP | CPU_FTR_ALTIVEC_COMP | CPU_FTRS_POWER9 | \
-CPU_FTRS_POWER9_DD2_1 | CPU_FTRS_POWER9_DD2_2 | CPU_FTRS_POWER10)
+CPU_FTRS_POWER9_DD2_1 | CPU_FTRS_POWER9_DD2_2 | CPU_FTRS_POWER10 | 
\
+CPU_FTR_DAWR1)
 #endif /* CONFIG_CPU_LITTLE_ENDIAN */
 #endif
 #else
diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c 
b/arch/powerpc/kernel/dt_cpu_ftrs.c
index a0edeb391e3e..be694567cebd 100644
--- a/arch/powerpc/kernel/dt_cpu_ftrs.c
+++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
@@ -573,6 +573,12 @@ static int __init feat_enable_mma(struct dt_cpu_feature *f)
return 1;
 }
 
+static int __init feat_enable_debug_facilities_v31(struct dt_cpu_feature *f)
+{
+   cur_cpu_spec->cpu_features |= CPU_FTR_DAWR1;
+   return 1;
+}
+
 struct dt_cpu_feature_match {
const char *name;
int (*enable)(struct dt_cpu_feature *f);
@@ -648,6 +654,7 @@ static struct dt_cpu_feature_match __initdata
{"wait-v3", feat_enable, 0},
{"prefix-instructions", feat_enable, 0},
{"matrix-multiply-assist", feat_enable_mma, 0},
+   {"debug-facilities-v31", feat_enable_debug_facilities_v31, 0},
 };
 
 static bool __initdata using_dt_cpu_ftrs;
-- 
2.26.2



[PATCH v3 3/9] powerpc/watchpoint: Enable watchpoint functionality on power10 guest

2020-07-07 Thread Ravi Bangoria
CPU_FTR_DAWR is by default enabled for host via CPU_FTRS_DT_CPU_BASE
(controlled by CONFIG_PPC_DT_CPU_FTRS). But cpu-features device-tree
node is not PAPR compatible and thus not yet used by kvm or pHyp
guests. Enable watchpoint functionality on power10 guest (both kvm
and powervm) by adding CPU_FTR_DAWR to CPU_FTRS_POWER10. Note that
this change does not enable 2nd DAWR support.

Signed-off-by: Ravi Bangoria 
---
 arch/powerpc/include/asm/cputable.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/cputable.h 
b/arch/powerpc/include/asm/cputable.h
index bac2252c839e..e506d429b1af 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -478,7 +478,7 @@ static inline void cpu_feature_keys_init(void) { }
CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \
CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S | \
CPU_FTR_TM_COMP | CPU_FTR_ARCH_300 | CPU_FTR_PKEY | \
-   CPU_FTR_ARCH_31)
+   CPU_FTR_ARCH_31 | CPU_FTR_DAWR)
 #define CPU_FTRS_CELL  (CPU_FTR_LWSYNC | \
CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
-- 
2.26.2



[PATCH v3 2/9] powerpc/watchpoint: Fix DAWR exception constraint

2020-07-07 Thread Ravi Bangoria
Pedro Miraglia Franco de Carvalho noticed that on p8, DAR value is
inconsistent with different type of load/store. Like for byte,word
etc. load/stores, DAR is set to the address of the first byte of
overlap between watch range and real access. But for quadword load/
store it's set to the address of the first byte of real access. This
issue has been fixed in p10. In p10(ISA 3.1), DAR is always set to
the address of the first byte of overlap. Commit 27985b2a640e
("powerpc/watchpoint: Don't ignore extraneous exceptions blindly")
wrongly assumes that DAR is set to the address of the first byte of
overlap for all load/stores on p8 as well. Fix that. With the fix,
we now rely on 'ea' provided by analyse_instr(). If analyse_instr()
fails, generate event unconditionally on p8, and on p10 generate
event only if DAR is within a DAWR range.

Note: 8xx is not affected.

Fixes: 27985b2a640e ("powerpc/watchpoint: Don't ignore extraneous exceptions 
blindly")
Fixes: 74c6881019b7 ("powerpc/watchpoint: Prepare handler to handle more than 
one watchpoint")
Reported-by: Pedro Miraglia Franco de Carvalho 
Signed-off-by: Ravi Bangoria 
---
 arch/powerpc/kernel/hw_breakpoint.c | 93 +++--
 1 file changed, 63 insertions(+), 30 deletions(-)

diff --git a/arch/powerpc/kernel/hw_breakpoint.c 
b/arch/powerpc/kernel/hw_breakpoint.c
index 031e6defc08e..7a66c370a105 100644
--- a/arch/powerpc/kernel/hw_breakpoint.c
+++ b/arch/powerpc/kernel/hw_breakpoint.c
@@ -498,11 +498,11 @@ static bool dar_in_user_range(unsigned long dar, struct 
arch_hw_breakpoint *info
return ((info->address <= dar) && (dar - info->address < info->len));
 }
 
-static bool dar_user_range_overlaps(unsigned long dar, int size,
-   struct arch_hw_breakpoint *info)
+static bool ea_user_range_overlaps(unsigned long ea, int size,
+  struct arch_hw_breakpoint *info)
 {
-   return ((dar < info->address + info->len) &&
-   (dar + size > info->address));
+   return ((ea < info->address + info->len) &&
+   (ea + size > info->address));
 }
 
 static bool dar_in_hw_range(unsigned long dar, struct arch_hw_breakpoint *info)
@@ -515,20 +515,22 @@ static bool dar_in_hw_range(unsigned long dar, struct 
arch_hw_breakpoint *info)
return ((hw_start_addr <= dar) && (hw_end_addr > dar));
 }
 
-static bool dar_hw_range_overlaps(unsigned long dar, int size,
- struct arch_hw_breakpoint *info)
+static bool ea_hw_range_overlaps(unsigned long ea, int size,
+struct arch_hw_breakpoint *info)
 {
unsigned long hw_start_addr, hw_end_addr;
 
hw_start_addr = ALIGN_DOWN(info->address, HW_BREAKPOINT_SIZE);
hw_end_addr = ALIGN(info->address + info->len, HW_BREAKPOINT_SIZE);
 
-   return ((dar < hw_end_addr) && (dar + size > hw_start_addr));
+   return ((ea < hw_end_addr) && (ea + size > hw_start_addr));
 }
 
 /*
  * If hw has multiple DAWR registers, we also need to check all
  * dawrx constraint bits to confirm this is _really_ a valid event.
+ * If type is UNKNOWN, but privilege level matches, consider it as
+ * a positive match.
  */
 static bool check_dawrx_constraints(struct pt_regs *regs, int type,
struct arch_hw_breakpoint *info)
@@ -536,7 +538,12 @@ static bool check_dawrx_constraints(struct pt_regs *regs, 
int type,
if (OP_IS_LOAD(type) && !(info->type & HW_BRK_TYPE_READ))
return false;
 
-   if (OP_IS_STORE(type) && !(info->type & HW_BRK_TYPE_WRITE))
+   /*
+* The Cache Management instructions other than dcbz never
+* cause a match. i.e. if type is CACHEOP, the instruction
+* is dcbz, and dcbz is treated as Store.
+*/
+   if ((OP_IS_STORE(type) || type == CACHEOP) && !(info->type & 
HW_BRK_TYPE_WRITE))
return false;
 
if (is_kernel_addr(regs->nip) && !(info->type & HW_BRK_TYPE_KERNEL))
@@ -553,7 +560,8 @@ static bool check_dawrx_constraints(struct pt_regs *regs, 
int type,
  * including extraneous exception. Otherwise return false.
  */
 static bool check_constraints(struct pt_regs *regs, struct ppc_inst instr,
- int type, int size, struct arch_hw_breakpoint 
*info)
+ unsigned long ea, int type, int size,
+ struct arch_hw_breakpoint *info)
 {
bool in_user_range = dar_in_user_range(regs->dar, info);
bool dawrx_constraints;
@@ -569,11 +577,10 @@ static bool check_constraints(struct pt_regs *regs, 
struct ppc_inst instr,
}
 
if (unlikely(ppc_inst_equal(instr, ppc_inst(0 {
-   if (in_user_range)
-   return true;
-
-   if (dar_in_hw_range(regs->dar, info)) {
-   info->type |= HW_BRK_TYPE_EXTRANEOUS_IRQ;
+   if (cpu_has_feature(CPU_FTR_ARCH_31)) {
+  

[PATCH v3 0/9] powerpc/watchpoint: Enable 2nd DAWR on baremetal and powervm

2020-07-07 Thread Ravi Bangoria
Last series[1] was to add basic infrastructure support for more than
one watchpoint on Book3S powerpc. This series actually enables the 2nd 
DAWR for baremetal and powervm. Kvm guest is still not supported.

v2: 
https://lore.kernel.org/linuxppc-dev/20200604033443.70591-1-ravi.bango...@linux.ibm.com/

v2->v3:
 - patch #2 is new. It fixes an issue with DAWR exception constraint
 - Rename dawr1 to debug-facilities-v31 in dt cpu feature, suggested
   by Nick Piggin.
 - Rebased to powerpc/next

[1]: 
https://lore.kernel.org/linuxppc-dev/20200514111741.97993-1-ravi.bango...@linux.ibm.com/

Ravi Bangoria (9):
  powerpc/watchpoint: Fix 512 byte boundary limit
  powerpc/watchpoint: Fix DAWR exception constraint
  powerpc/watchpoint: Enable watchpoint functionality on power10 guest
  powerpc/dt_cpu_ftrs: Add feature for 2nd DAWR
  powerpc/watchpoint: Set CPU_FTR_DAWR1 based on pa-features bit
  powerpc/watchpoint: Rename current H_SET_MODE DAWR macro
  powerpc/watchpoint: Guest support for 2nd DAWR hcall
  powerpc/watchpoint: Return available watchpoints dynamically
  powerpc/watchpoint: Remove 512 byte boundary

 arch/powerpc/include/asm/cputable.h   | 13 ++-
 arch/powerpc/include/asm/hvcall.h |  3 +-
 arch/powerpc/include/asm/hw_breakpoint.h  |  5 +-
 arch/powerpc/include/asm/machdep.h|  2 +-
 arch/powerpc/include/asm/plpar_wrappers.h |  7 +-
 arch/powerpc/kernel/dawr.c|  2 +-
 arch/powerpc/kernel/dt_cpu_ftrs.c |  7 ++
 arch/powerpc/kernel/hw_breakpoint.c   | 98 +++
 arch/powerpc/kernel/prom.c|  2 +
 arch/powerpc/kvm/book3s_hv.c  |  2 +-
 arch/powerpc/platforms/pseries/setup.c|  7 +-
 11 files changed, 103 insertions(+), 45 deletions(-)

-- 
2.26.2



Re: [PATCH][next] Bluetooth: Use fallthrough pseudo-keyword

2020-07-07 Thread Marcel Holtmann
Hi Gustavo,

> Replace the existing /* fall through */ comments and its variants with
> the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary
> fall-through markings when it is the case.
> 
> [1] 
> https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through
> 
> Signed-off-by: Gustavo A. R. Silva 
> ---
> drivers/bluetooth/bcm203x.c |  2 +-
> drivers/bluetooth/bluecard_cs.c |  2 --
> drivers/bluetooth/hci_ll.c  |  2 +-
> drivers/bluetooth/hci_qca.c |  8 +---
> net/bluetooth/hci_event.c   |  4 ++--
> net/bluetooth/hci_sock.c|  3 +--
> net/bluetooth/l2cap_core.c  | 19 +--
> net/bluetooth/l2cap_sock.c  |  4 ++--
> net/bluetooth/mgmt.c|  4 ++--
> net/bluetooth/rfcomm/core.c |  2 +-
> net/bluetooth/rfcomm/sock.c |  2 +-
> net/bluetooth/smp.c |  2 +-
> 12 files changed, 22 insertions(+), 32 deletions(-)

can we split these a little bit between drivers, core and rfcomm. Thanks.

Regards

Marcel



Re: [PATCH v2] powerpc/uaccess: Use flexible addressing with __put_user()/__get_user()

2020-07-07 Thread Christophe Leroy




Le 07/07/2020 à 21:02, Christophe Leroy a écrit :



Le 07/07/2020 à 14:44, Christophe Leroy a écrit :



Le 30/06/2020 à 03:19, Michael Ellerman a écrit :

Michael Ellerman  writes:

Christophe Leroy  writes:

Hi Michael,

I see this patch is marked as "defered" in patchwork, but I can't see
any related discussion. Is it normal ?


Because it uses the "m<>" constraint which didn't work on GCC 4.6.

https://github.com/linuxppc/issues/issues/297

So we should be able to pick it up for v5.9 hopefully.


It seems to break the build with the kernel.org 4.9.4 compiler and
corenet64_smp_defconfig:


Most likely a GCC bug ?

It seems the problem vanishes with patch 
https://patchwork.ozlabs.org/project/linuxppc-dev/patch/173de3b659fa3a5f126a0eb170522cccd909950f.1594125164.git.christophe.le...@csgroup.eu/ 



Same kind of issue in signal_64.c now.

The following patch fixes it: 
https://patchwork.ozlabs.org/project/linuxppc-dev/patch/810bd8840ef990a200f58c9dea9abe767ca02a3a.1594146723.git.christophe.le...@csgroup.eu/ 





This time I confirm, with the two above mentioned patches, it builds OK 
with 4.9, see 
http://kisskb.ellerman.id.au/kisskb/head/810bd8840ef990a200f58c9dea9abe767ca02a3a/


Christophe


Re: [PATCH v2 00/15] Make the user mode driver code a better citizen

2020-07-07 Thread Eric W. Biederman


Just to make certain I understand what is going on I instrumented a
kernel with some print statements.

a) The workqueues and timers start before populate_rootfs.

b) populate_rootfs does indeed happen long before the bpfilter
   module is intialized.

c) What prevents populate_rootfs and the umd_load_blob from
   having problems when they call flush_delayed_put is the
   fact that fput_many does:
   "schedule_delayed_work(_fput_work,1)".

   That 1 requests a delay of at least 1 jiffy.  A jiffy is between
   1ms and 10ms depending on how Linux is configured.

   In my test configuration running a kernel in kvm printing to a serial
   console I measured 0.8ms between the fput in blob_to_mnt and
   flush_delayed_fput which immediately follows it.

   So unless the fput becomes incredibly slow there is nothing to worry
   about in blob_to_mnt.

d) As the same mechanism is used by populate_rootfs.  A but in the
   mechanism applies to both.

e) No one appears to have reported a problem executing files out of
   initramfs these last several years since the flush_delayed_fput was
   introduced.
 
f) The code works for me.  There is real reason to believe the code will
   work for everyone else, as the exact same logic is used by initramfs.
   So it should be perfectly fine for the patchset and the
   usermode_driver code to go ahead as written.

h) If there is something to be fixed it is flush_delayed_fput as that is
   much more important than anything in the usermode driver code.

Eric

p.s.) When I talked of restarts of the usermode driver code ealier I was
   referring to the code that restarts the usermode driver if it is
   killed, the next time the kernel tries to talk to it.

   That could mask an -ETXTBUSY except if it happens on the first exec
   the net/bfilter/bpfilter_kern.c:load_umh() will return an error.



[PATCH net-next] net: dsa: loop: Print when registration is successful

2020-07-07 Thread Florian Fainelli
We have a number of error conditions that can lead to the driver not
probing successfully, move the print when we are sure
dsa_register_switch() has suceeded. This avoids repeated prints in case
of probe deferral for instance.

Signed-off-by: Florian Fainelli 
---
 drivers/net/dsa/dsa_loop.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/net/dsa/dsa_loop.c b/drivers/net/dsa/dsa_loop.c
index 400207c5c7de..f8bc85a6e670 100644
--- a/drivers/net/dsa/dsa_loop.c
+++ b/drivers/net/dsa/dsa_loop.c
@@ -280,13 +280,11 @@ static int dsa_loop_drv_probe(struct mdio_device *mdiodev)
struct dsa_loop_pdata *pdata = mdiodev->dev.platform_data;
struct dsa_loop_priv *ps;
struct dsa_switch *ds;
+   int ret;
 
if (!pdata)
return -ENODEV;
 
-   dev_info(>dev, "%s: 0x%0x\n",
-pdata->name, pdata->enabled_ports);
-
ds = devm_kzalloc(>dev, sizeof(*ds), GFP_KERNEL);
if (!ds)
return -ENOMEM;
@@ -311,7 +309,12 @@ static int dsa_loop_drv_probe(struct mdio_device *mdiodev)
 
dev_set_drvdata(>dev, ds);
 
-   return dsa_register_switch(ds);
+   ret = dsa_register_switch(ds);
+   if (!ret)
+   dev_info(>dev, "%s: 0x%0x\n",
+pdata->name, pdata->enabled_ports);
+
+   return ret;
 }
 
 static void dsa_loop_drv_remove(struct mdio_device *mdiodev)
-- 
2.25.1



Re: [PATCH v10 2/9] fs: introduce kernel_pread_file* support

2020-07-07 Thread Scott Branden

Hi Kees,

one more comment below.

On 2020-07-07 9:01 p.m., Scott Branden wrote:



On 2020-07-07 4:56 p.m., Kees Cook wrote:

On Mon, Jul 06, 2020 at 04:23:02PM -0700, Scott Branden wrote:

Add kernel_pread_file* support to kernel to allow for partial read
of files with an offset into the file.

Signed-off-by: Scott Branden 
---
  fs/exec.c    | 93 


  include/linux/kernel_read_file.h | 17 ++
  2 files changed, 87 insertions(+), 23 deletions(-)

diff --git a/fs/exec.c b/fs/exec.c
index 4ea87db5e4d5..e6a8a65f7478 100644
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -928,10 +928,14 @@ struct file *open_exec(const char *name)
  }
  EXPORT_SYMBOL(open_exec);
  -int kernel_read_file(struct file *file, void **buf, loff_t *size,
- loff_t max_size, enum kernel_read_file_id id)
-{
-    loff_t i_size, pos;
+int kernel_pread_file(struct file *file, void **buf, loff_t *size,
+  loff_t max_size, loff_t pos,
+  enum kernel_read_file_id id)
+{
+    loff_t alloc_size;
+    loff_t buf_pos;
+    loff_t read_end;
+    loff_t i_size;
  ssize_t bytes = 0;
  int ret;
  @@ -951,21 +955,32 @@ int kernel_read_file(struct file *file, void 
**buf, loff_t *size,

  ret = -EINVAL;
  goto out;
  }
-    if (i_size > SIZE_MAX || (max_size > 0 && i_size > max_size)) {
+
+    /* Default read to end of file */
+    read_end = i_size;
+
+    /* Allow reading partial portion of file */
+    if ((id == READING_FIRMWARE_PARTIAL_READ) &&
+    (i_size > (pos + max_size)))
+    read_end = pos + max_size;

There's no need to involve "id" here. There are other signals about
what's happening (i.e. pos != 0, max_size != i_size, etc).
There are other signals other than the fact that kernel_read_file 
requires
the entire file to be read while kernel_pread_file allows partial 
files to be read.
So if you do a pread at pos = 0 you need another key to indicate it is 
"ok" if max_size < i_size.
If id == READING_FIRMWARE_PARTIAL_READ is removed (and we want to 
share 99% of the code
between kernel_read_file and kernel_pread_file then I need to add 
another parameter to a common function
called between these functions.  And adding another parameter was 
rejected previously in the review as a "swiss army knife approach" by 
another reviewer.  I am happy to add it back in because it is 
necessary to share code and differentiate whether we are performing a 
partial read or not.



+
+    alloc_size = read_end - pos;
+    if (i_size > SIZE_MAX || (max_size > 0 && alloc_size > 
max_size)) {

  ret = -EFBIG;
  goto out;
  }
  -    if (id != READING_FIRMWARE_PREALLOC_BUFFER)
-    *buf = vmalloc(i_size);
+    if ((id != READING_FIRMWARE_PARTIAL_READ) &&
+    (id != READING_FIRMWARE_PREALLOC_BUFFER))
+    *buf = vmalloc(alloc_size);
  if (!*buf) {
  ret = -ENOMEM;
  goto out;
  }

The id usage here was a mistake in upstream, and the series I sent is
trying to clean that up.
I see that cleanup and it works fine with the pread.  Other than I 
need some sort of key to share code and indicate whether it is "ok" to 
do a partial read of the file or not.


Greg, it seems this series is going to end up in your tree due to it
being drivers/misc? I guess I need to direct my series to Greg then, but
get LSM folks Acks.


  -    pos = 0;
-    while (pos < i_size) {
-    bytes = kernel_read(file, *buf + pos, i_size - pos, );
+    buf_pos = 0;
+    while (pos < read_end) {
+    bytes = kernel_read(file, *buf + buf_pos, read_end - pos, 
);

  if (bytes < 0) {
  ret = bytes;
  goto out_free;
@@ -973,20 +988,23 @@ int kernel_read_file(struct file *file, void 
**buf, loff_t *size,

    if (bytes == 0)
  break;
+
+    buf_pos += bytes;
  }
  -    if (pos != i_size) {
+    if (pos != read_end) {
  ret = -EIO;
  goto out_free;
  }
  -    ret = security_kernel_post_read_file(file, *buf, i_size, id);
+    ret = security_kernel_post_read_file(file, *buf, alloc_size, id);
  if (!ret)
  *size = pos;

This call cannot be inside kernel_pread_file(): any future LSMs will see
a moving window of contents, etc. It'll need to be in kernel_read_file()
proper.
If IMA still passes (after testing my next patch series with your 
changes and my modifications)

I will need some more help here.



    out_free:
  if (ret < 0) {
-    if (id != READING_FIRMWARE_PREALLOC_BUFFER) {
+    if ((id != READING_FIRMWARE_PARTIAL_READ) &&
+    (id != READING_FIRMWARE_PREALLOC_BUFFER)) {
  vfree(*buf);
  *buf = NULL;
  }
@@ -996,10 +1014,18 @@ int kernel_read_file(struct file *file, void 
**buf, loff_t *size,

  allow_write_access(file);
  return ret;
  }
+
+int kernel_read_file(struct file *file, void **buf, loff_t *size,
+ loff_t max_size, enum kernel_read_file_id id)
+{
+    

[PATCH] drivers/net/wan/x25_asy: Fix to make it work

2020-07-07 Thread Xie He
This driver is not working because of problems of its receiving code.
This patch fixes it to make it work.

When the driver receives an LAPB frame, it should first pass the frame
to the LAPB module to process. After processing, the LAPB module passes
the data (the packet) back to the driver, the driver should then add a
one-byte pseudo header and pass the data to upper layers.

The changes to the "x25_asy_bump" function and the
"x25_asy_data_indication" function are to correctly implement this
procedure.

Also, the "x25_asy_unesc" function ignores any frame that is shorter
than 3 bytes. However the shortest frames are 2-byte long. So we need
to change it to allow 2-byte frames to pass.

Signed-off-by: Xie He 
---
 drivers/net/wan/x25_asy.c | 16 +---
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/net/wan/x25_asy.c b/drivers/net/wan/x25_asy.c
index 69773d228ec1..3fd8938e591b 100644
--- a/drivers/net/wan/x25_asy.c
+++ b/drivers/net/wan/x25_asy.c
@@ -183,7 +183,7 @@ static inline void x25_asy_unlock(struct x25_asy *sl)
netif_wake_queue(sl->dev);
 }
 
-/* Send one completely decapsulated IP datagram to the IP layer. */
+/* Send an LAPB frame to the LAPB module to process. */
 
 static void x25_asy_bump(struct x25_asy *sl)
 {
@@ -195,13 +195,12 @@ static void x25_asy_bump(struct x25_asy *sl)
count = sl->rcount;
dev->stats.rx_bytes += count;
 
-   skb = dev_alloc_skb(count+1);
+   skb = dev_alloc_skb(count);
if (skb == NULL) {
netdev_warn(sl->dev, "memory squeeze, dropping packet\n");
dev->stats.rx_dropped++;
return;
}
-   skb_push(skb, 1);   /* LAPB internal control */
skb_put_data(skb, sl->rbuff, count);
skb->protocol = x25_type_trans(skb, sl->dev);
err = lapb_data_received(skb->dev, skb);
@@ -209,7 +208,6 @@ static void x25_asy_bump(struct x25_asy *sl)
kfree_skb(skb);
printk(KERN_DEBUG "x25_asy: data received err - %d\n", err);
} else {
-   netif_rx(skb);
dev->stats.rx_packets++;
}
 }
@@ -356,12 +354,16 @@ static netdev_tx_t x25_asy_xmit(struct sk_buff *skb,
  */
 
 /*
- * Called when I frame data arrives. We did the work above - throw it
- * at the net layer.
+ * Called when I frame data arrives. We add a pseudo header for upper
+ * layers and pass it to upper layers.
  */
 
 static int x25_asy_data_indication(struct net_device *dev, struct sk_buff *skb)
 {
+   skb_push(skb, 1);
+   skb->data[0] = X25_IFACE_DATA;
+   skb->protocol = x25_type_trans(skb, dev);
+
return netif_rx(skb);
 }
 
@@ -657,7 +659,7 @@ static void x25_asy_unesc(struct x25_asy *sl, unsigned char 
s)
switch (s) {
case X25_END:
if (!test_and_clear_bit(SLF_ERROR, >flags) &&
-   sl->rcount > 2)
+   sl->rcount >= 2)
x25_asy_bump(sl);
clear_bit(SLF_ESCAPE, >flags);
sl->rcount = 0;
-- 
2.25.1



linux-next: manual merge of the spi tree with the mtd tree

2020-07-07 Thread Stephen Rothwell
Hi all,

Today's linux-next merge of the spi tree got conflicts in:

  drivers/memory/Kconfig
  drivers/memory/Makefile

between commit:

  66b8173a197f ("memory: stm32-fmc2-ebi: add STM32 FMC2 EBI controller driver")

from the mtd tree and commit:

  ca7d8b980b67 ("memory: add Renesas RPC-IF driver")

from the spi tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/memory/Kconfig
index be69c07b8941,e438d79857da..
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@@ -174,16 -174,15 +174,25 @@@ config PL353_SM
  This driver is for the ARM PL351/PL353 Static Memory
  Controller(SMC) module.
  
+ config RENESAS_RPCIF
+   tristate "Renesas RPC-IF driver"
+   depends on ARCH_RENESAS
+   select REGMAP_MMIO
+   help
+ This supports Renesas R-Car Gen3 RPC-IF which provides either SPI
+ host or HyperFlash. You'll have to select individual components
+ under the corresponding menu.
+ 
 +config STM32_FMC2_EBI
 +  tristate "Support for FMC2 External Bus Interface on STM32MP SoCs"
 +  depends on MACH_STM32MP157 || COMPILE_TEST
 +  select MFD_SYSCON
 +  help
 +Select this option to enable the STM32 FMC2 External Bus Interface
 +controller. This driver configures the transactions with external
 +devices (like SRAM, ethernet adapters, FPGAs, LCD displays, ...) on
 +SOCs containing the FMC2 External Bus Interface.
 +
  source "drivers/memory/samsung/Kconfig"
  source "drivers/memory/tegra/Kconfig"
  
diff --cc drivers/memory/Makefile
index d3d8d6ced342,d105f8ebe8b8..
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@@ -22,7 -22,7 +22,8 @@@ obj-$(CONFIG_JZ4780_NEMC) += jz4780-nem
  obj-$(CONFIG_MTK_SMI) += mtk-smi.o
  obj-$(CONFIG_DA8XX_DDRCTL)+= da8xx-ddrctl.o
  obj-$(CONFIG_PL353_SMC)   += pl353-smc.o
+ obj-$(CONFIG_RENESAS_RPCIF)   += renesas-rpc-if.o
 +obj-$(CONFIG_STM32_FMC2_EBI)  += stm32-fmc2-ebi.o
  
  obj-$(CONFIG_SAMSUNG_MC)  += samsung/
  obj-$(CONFIG_TEGRA_MC)+= tegra/


pgp3KEIxsEzsY.pgp
Description: OpenPGP digital signature


Re: [PATCH v5 08/12] init: main: add KUnit to kernel init

2020-07-07 Thread Luis Chamberlain
On Fri, Jun 26, 2020 at 02:09:13PM -0700, Brendan Higgins wrote:
> Remove KUnit from init calls entirely, instead call directly from
> kernel_init().

The commit log does not explain *why*.

> Co-developed-by: Alan Maguire 
> Signed-off-by: Alan Maguire 
> Signed-off-by: Brendan Higgins 
> Reviewed-by: Stephen Boyd 

Other than that:

Reviewed-by: Luis Chamberlain 

  Luis


Re: [PATCH v10 0/9] firmware: add request_partial_firmware_into_buf

2020-07-07 Thread Florian Fainelli



On 7/6/2020 4:23 PM, Scott Branden wrote:
> This patch series adds partial read support via a new call
> request_partial_firmware_into_buf.
> Such support is needed when the whole file is not needed and/or
> only a smaller portion of the file will fit into allocated memory
> at any one time.
> In order to accept the enhanced API it has been requested that kernel
> selftests and upstreamed driver utilize the API enhancement and so
> are included in this patch series.
> 
> Also in this patch series is the addition of a new Broadcom VK driver
> utilizing the new request_firmware_into_buf enhanced API.
> 
> Further comment followed to add IMA support of the partial reads
> originating from request_firmware_into_buf calls.  And another request
> to move existing kernel_read_file* functions to its own include file.

Do you have any way to separate the VK drivers submission from the
request_partial_firmware_into_buf() work that you are doing? It looks
like it is going to require quite a few iterations of this patch set for
the firmware/fs/IMA part to be ironed out, so if you could get your
driver separated out, it might help you achieve partial success here.
-- 
Florian


Re: [PATCH v5 01/12] vmlinux.lds.h: add linker section for KUnit test suites

2020-07-07 Thread Luis Chamberlain
On Fri, Jun 26, 2020 at 02:22:11PM -0700, Brendan Higgins wrote:
> On Fri, Jun 26, 2020 at 2:20 PM Kees Cook  wrote:
> >
> > On Fri, Jun 26, 2020 at 02:09:06PM -0700, Brendan Higgins wrote:
> > > Add a linker section where KUnit can put references to its test suites.
> > > This patch is the first step in transitioning to dispatching all KUnit
> > > tests from a centralized executor rather than having each as its own
> > > separate late_initcall.
> > >
> > > Co-developed-by: Iurii Zaikin 
> > > Signed-off-by: Iurii Zaikin 
> > > Signed-off-by: Brendan Higgins 
> > > Reviewed-by: Stephen Boyd 
> > > ---
> > >  include/asm-generic/vmlinux.lds.h | 8 
> > >  1 file changed, 8 insertions(+)
> > >
> > > diff --git a/include/asm-generic/vmlinux.lds.h 
> > > b/include/asm-generic/vmlinux.lds.h
> > > index db600ef218d7d..4f9b036fc9616 100644
> > > --- a/include/asm-generic/vmlinux.lds.h
> > > +++ b/include/asm-generic/vmlinux.lds.h
> > > @@ -881,6 +881,13 @@
> > >   KEEP(*(.con_initcall.init)) \
> > >   __con_initcall_end = .;
> > >
> > > +/* Alignment must be consistent with (kunit_suite *) in 
> > > include/kunit/test.h */
> >
> > Nit on naming:
> >
> > > +#define KUNIT_TEST_SUITES\
> >
> > I would call this KUNIT_TABLE to maintain the same names as other things
> > of this nature.
> >
> > > + . = ALIGN(8);   \
> > > + __kunit_suites_start = .;   \
> > > + KEEP(*(.kunit_test_suites)) \
> > > + __kunit_suites_end = .;
> > > +
> > >  #ifdef CONFIG_BLK_DEV_INITRD
> > >  #define INIT_RAM_FS  \
> > >   . = ALIGN(4);   \
> > > @@ -1056,6 +1063,7 @@
> > >   INIT_CALLS  \
> > >   CON_INITCALL\
> > >   INIT_RAM_FS \
> > > + KUNIT_TEST_SUITES   \
> > >   }
> >
> > Nack: this must be in INIT_DATA, not in INIT_DATA_SECTION. Not all
> > architectures use the INIT_DATA_SECTION macro (e.g. arm64), but everything
> > uses INIT_DATA.
> 
> Oh, maybe that would eliminate the need for the other linkerscript
> patches? That would be nice.

Curious, did changing it as Kees suggest fix it for m68k?

  Luis


Re: [PATCH v10 7/9] misc: bcm-vk: add Broadcom VK driver

2020-07-07 Thread Scott Branden




On 2020-07-07 5:03 p.m., Kees Cook wrote:

On Mon, Jul 06, 2020 at 04:23:07PM -0700, Scott Branden wrote:

Add Broadcom VK driver offload engine.
This driver interfaces to the VK PCIe offload engine to perform
should offload functions as video transcoding on multiple streams
in parallel.  VK device is booted from files loaded using
request_firmware_into_buf mechanism.  After booted card status is updated
and messages can then be sent to the card.
Such messages contain scatter gather list of addresses
to pull data from the host to perform operations on.

Signed-off-by: Scott Branden 
Signed-off-by: Desmond Yan 

nit: your S-o-b chain doesn't make sense (I would expect you at the end
since you're sending it and showing as the Author). Is it Co-developed-by?
https://www.kernel.org/doc/html/latest/process/submitting-patches.html#when-to-use-acked-by-cc-and-co-developed-by

Yes, Co-developed-by.  Will adjust.



[...]
+
+   max_buf = SZ_4M;
+   bufp = dma_alloc_coherent(dev,
+ max_buf,
+ _dma_addr, GFP_KERNEL);
+   if (!bufp) {
+   dev_err(dev, "Error allocating 0x%zx\n", max_buf);
+   ret = -ENOMEM;
+   goto err_buf_out;
+   }
+
+   bcm_vk_buf_notify(vk, bufp, boot_dma_addr, max_buf);
+   } else {
+   dev_err(dev, "Error invalid image type 0x%x\n", load_type);
+   ret = -EINVAL;
+   goto err_buf_out;
+   }
+
+   ret = request_partial_firmware_into_buf(, filename, dev,
+   bufp, max_buf, 0);

Unless I don't understand what's happening here, this needs to be
reordered if you're going to keep Mimi happy and disallow the device
being able to see the firmware before it has been verified. (i.e. please
load the firmware before mapping DMA across the buffer.)
I don't understand your concern here.  We request partial firmware into 
a buffer that we allocated.
After loading it we signal the card the firmware has been loaded into 
that memory region.
The card then pulls the data into its internal memory.  And, 
authenticates it.


Even if the card randomly read and writes to that buffer it shouldn't 
matter to the linux kernel security subsystem.

It passed the security check already when placed in the buffer.
If there is a concern could we add an "nosecurity" 
request_partial_firmware_into_buf instead as there is no need for any 
security on this particular request?




Re: [PATCH v2 1/3] arm64/numa: export memory_add_physaddr_to_nid as EXPORT_SYMBOL_GPL

2020-07-07 Thread Dan Williams
On Tue, Jul 7, 2020 at 9:08 PM Justin He  wrote:
[..]
> > Especially for architectures that use memblock info for numa info
> > (which seems to be everyone except x86) why not implement a generic
> > memory_add_physaddr_to_nid() that does:
> >
> > int memory_add_physaddr_to_nid(u64 addr)
> > {
> > unsigned long start_pfn, end_pfn, pfn = PHYS_PFN(addr);
> > int nid;
> >
> > for_each_online_node(nid) {
> > get_pfn_range_for_nid(nid, _pfn, _pfn);
> > if (pfn >= start_pfn && pfn <= end_pfn)
> > return nid;
> > }
> > return NUMA_NO_NODE;
> > }
>
> Thanks for your suggestion,
> Could I wrap the codes and let memory_add_physaddr_to_nid simply invoke
> phys_to_target_node()?

I think it needs to be the reverse. phys_to_target_node() should call
memory_add_physaddr_to_nid() by default, but fall back to searching
reserved memory address ranges in memblock. See phys_to_target_node()
in arch/x86/mm/numa.c. That one uses numa_meminfo instead of memblock,
but the principle is the same i.e. that a target node may not be
represented in memblock.memory, but memblock.reserved. I'm working on
a patch to provide a function similar to get_pfn_range_for_nid() that
operates on reserved memory.


Re: [PATCH v5 0/4] vmalloc kernel mapping and relocatable kernel

2020-07-07 Thread Alex Ghiti

Hi Palmer,

Le 6/7/20 à 3:59 AM, Alexandre Ghiti a écrit :

This patchset originally implemented relocatable kernel support but now
also moves the kernel mapping into the vmalloc zone.
  
The first patch explains why we need to move the kernel into vmalloc

zone (instead of memcpying it around). That patch should ease KASLR
implementation a lot.
  
The second patch allows to build relocatable kernels but is not selected

by default.
  
The third and fourth patches take advantage of an already existing powerpc

script that checks relocations at compile-time, and uses it for riscv.
  
Changes in v5:

   * Add "static __init" to create_kernel_page_table function as reported by
 Kbuild test robot
   * Add reviewed-by from Zong
   * Rebase onto v5.7

Changes in v4:
   * Fix BPF region that overlapped with kernel's as suggested by Zong
   * Fix end of module region that could be larger than 2GB as suggested by Zong
   * Fix the size of the vm area reserved for the kernel as we could lose
 PMD_SIZE if the size was already aligned on PMD_SIZE
   * Split compile time relocations check patch into 2 patches as suggested by 
Anup
   * Applied Reviewed-by from Zong and Anup
  
Changes in v3:

   * Move kernel mapping to vmalloc
  
Changes in v2:

   * Make RELOCATABLE depend on MMU as suggested by Anup
   * Rename kernel_load_addr into kernel_virt_addr as suggested by Anup
   * Use __pa_symbol instead of __pa, as suggested by Zong
   * Rebased on top of v5.6-rc3
   * Tested with sv48 patchset
   * Add Reviewed/Tested-by from Zong and Anup

Alexandre Ghiti (4):
   riscv: Move kernel mapping to vmalloc zone
   riscv: Introduce CONFIG_RELOCATABLE
   powerpc: Move script to check relocations at compile time in scripts/
   riscv: Check relocations at compile time

  arch/powerpc/tools/relocs_check.sh |  18 +
  arch/riscv/Kconfig |  12 +++
  arch/riscv/Makefile|   5 +-
  arch/riscv/Makefile.postlink   |  36 +
  arch/riscv/boot/loader.lds.S   |   3 +-
  arch/riscv/include/asm/page.h  |  10 ++-
  arch/riscv/include/asm/pgtable.h   |  38 ++---
  arch/riscv/kernel/head.S   |   3 +-
  arch/riscv/kernel/module.c |   4 +-
  arch/riscv/kernel/vmlinux.lds.S|   9 ++-
  arch/riscv/mm/Makefile |   4 +
  arch/riscv/mm/init.c   | 121 +
  arch/riscv/mm/physaddr.c   |   2 +-
  arch/riscv/tools/relocs_check.sh   |  26 +++
  scripts/relocs_check.sh|  20 +
  15 files changed, 259 insertions(+), 52 deletions(-)
  create mode 100644 arch/riscv/Makefile.postlink
  create mode 100755 arch/riscv/tools/relocs_check.sh
  create mode 100755 scripts/relocs_check.sh



Do you have any remark regarding this series ?

Thanks,

Alex


[PATCH 17/17] tools: gpio: fix spurious close warning in gpio-event-mon

2020-07-07 Thread Kent Gibson
Fix bogus close warning that occurs when opening the character device
fails.

Signed-off-by: Kent Gibson 
---
 tools/gpio/gpio-event-mon.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/gpio/gpio-event-mon.c b/tools/gpio/gpio-event-mon.c
index 30ed0e06f52a..1a303a81aeef 100644
--- a/tools/gpio/gpio-event-mon.c
+++ b/tools/gpio/gpio-event-mon.c
@@ -45,7 +45,7 @@ int monitor_device(const char *device_name,
if (fd == -1) {
ret = -errno;
fprintf(stderr, "Failed to open %s\n", chrdev_name);
-   goto exit_close_error;
+   goto exit_free_name;
}
 
req.lineoffset = line;
@@ -117,6 +117,7 @@ int monitor_device(const char *device_name,
 exit_close_error:
if (close(fd) == -1)
perror("Failed to close GPIO character device file");
+exit_free_name:
free(chrdev_name);
return ret;
 }
-- 
2.27.0



[PATCH 12/17] gpiolib: cdev: refactor linehandle cleanup into linehandle_free

2020-07-07 Thread Kent Gibson
Consolidate the cleanup of linehandles, currently duplicated in
linehandle_create and linehandle_release, into a helper function
linehandle_free.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-cdev.c | 39 ++---
 1 file changed, 19 insertions(+), 20 deletions(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index c86fb9305681..d56b367239cc 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -228,17 +228,21 @@ static long linehandle_ioctl_compat(struct file *file, 
unsigned int cmd,
 }
 #endif
 
-static int linehandle_release(struct inode *inode, struct file *file)
+static void linehandle_free(struct linehandle_state *lh)
 {
-   struct linehandle_state *lh = file->private_data;
-   struct gpio_device *gdev = lh->gdev;
int i;
 
for (i = 0; i < lh->num_descs; i++)
-   gpiod_free(lh->descs[i]);
+   if (lh->descs[i])
+   gpiod_free(lh->descs[i]);
kfree(lh->label);
+   put_device(>gdev->dev);
kfree(lh);
-   put_device(>dev);
+}
+
+static int linehandle_release(struct inode *inode, struct file *file)
+{
+   linehandle_free(file->private_data);
return 0;
 }
 
@@ -257,7 +261,7 @@ static int linehandle_create(struct gpio_device *gdev, void 
__user *ip)
struct gpiohandle_request handlereq;
struct linehandle_state *lh;
struct file *file;
-   int fd, i, count = 0, ret;
+   int fd, i, ret;
u32 lflags;
 
if (copy_from_user(, ip, sizeof(handlereq)))
@@ -288,6 +292,8 @@ static int linehandle_create(struct gpio_device *gdev, void 
__user *ip)
}
}
 
+   lh->num_descs = handlereq.lines;
+
/* Request each GPIO */
for (i = 0; i < handlereq.lines; i++) {
u32 offset = handlereq.lineoffsets[i];
@@ -295,19 +301,18 @@ static int linehandle_create(struct gpio_device *gdev, 
void __user *ip)
 
if (IS_ERR(desc)) {
ret = PTR_ERR(desc);
-   goto out_free_descs;
+   goto out_free_lh;
}
 
ret = gpiod_request(desc, lh->label);
if (ret)
-   goto out_free_descs;
+   goto out_free_lh;
lh->descs[i] = desc;
-   count = i + 1;
linehandle_flags_to_desc_flags(handlereq.flags, >flags);
 
ret = gpiod_set_transitory(desc, false);
if (ret < 0)
-   goto out_free_descs;
+   goto out_free_lh;
 
/*
 * Lines have to be requested explicitly for input
@@ -318,11 +323,11 @@ static int linehandle_create(struct gpio_device *gdev, 
void __user *ip)
 
ret = gpiod_direction_output(desc, val);
if (ret)
-   goto out_free_descs;
+   goto out_free_lh;
} else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
ret = gpiod_direction_input(desc);
if (ret)
-   goto out_free_descs;
+   goto out_free_lh;
}
 
blocking_notifier_call_chain(>gdev->notifier,
@@ -331,12 +336,11 @@ static int linehandle_create(struct gpio_device *gdev, 
void __user *ip)
dev_dbg(>dev, "registered chardev handle for line %d\n",
offset);
}
-   lh->num_descs = handlereq.lines;
 
fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
if (fd < 0) {
ret = fd;
-   goto out_free_descs;
+   goto out_free_lh;
}
 
file = anon_inode_getfile("gpio-linehandle",
@@ -368,13 +372,8 @@ static int linehandle_create(struct gpio_device *gdev, 
void __user *ip)
 
 out_put_unused_fd:
put_unused_fd(fd);
-out_free_descs:
-   for (i = 0; i < count; i++)
-   gpiod_free(lh->descs[i]);
-   kfree(lh->label);
 out_free_lh:
-   kfree(lh);
-   put_device(>dev);
+   linehandle_free(lh);
return ret;
 }
 
-- 
2.27.0



[PATCH 16/17] tools: gpio: fix spurious close warning in gpio-utils

2020-07-07 Thread Kent Gibson
Fix bogus close warning that occurs when opening the character device
fails.

Signed-off-by: Kent Gibson 
---
 tools/gpio/gpio-utils.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/gpio/gpio-utils.c b/tools/gpio/gpio-utils.c
index 06003789e7c7..16a5d9cb9da2 100644
--- a/tools/gpio/gpio-utils.c
+++ b/tools/gpio/gpio-utils.c
@@ -75,7 +75,7 @@ int gpiotools_request_linehandle(const char *device_name, 
unsigned int *lines,
ret = -errno;
fprintf(stderr, "Failed to open %s, %s\n",
chrdev_name, strerror(errno));
-   goto exit_close_error;
+   goto exit_free_name;
}
 
for (i = 0; i < nlines; i++)
@@ -94,9 +94,9 @@ int gpiotools_request_linehandle(const char *device_name, 
unsigned int *lines,
"GPIO_GET_LINEHANDLE_IOCTL", ret, strerror(errno));
}
 
-exit_close_error:
if (close(fd) == -1)
perror("Failed to close GPIO character device file");
+exit_free_name:
free(chrdev_name);
return ret < 0 ? ret : req.fd;
 }
-- 
2.27.0



[PATCH 14/17] gpio: uapi: fix misplaced comment line

2020-07-07 Thread Kent Gibson
The second line of the description for event_type is before the first.
Move it to after the first line.

Signed-off-by: Kent Gibson 
---
 include/uapi/linux/gpio.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/uapi/linux/gpio.h b/include/uapi/linux/gpio.h
index 0206383c0383..9c27cecf406f 100644
--- a/include/uapi/linux/gpio.h
+++ b/include/uapi/linux/gpio.h
@@ -71,8 +71,8 @@ enum {
  * of a GPIO line
  * @info: updated line information
  * @timestamp: estimate of time of status change occurrence, in nanoseconds
- * and GPIOLINE_CHANGED_CONFIG
  * @event_type: one of GPIOLINE_CHANGED_REQUESTED, GPIOLINE_CHANGED_RELEASED
+ * and GPIOLINE_CHANGED_CONFIG
  *
  * Note: struct gpioline_info embedded here has 32-bit alignment on its own,
  * but it works fine with 64-bit alignment too. With its 72 byte size, we can
-- 
2.27.0



[PATCH 13/17] gpiolib: cdev: refactor lineevent cleanup into lineevent_free

2020-07-07 Thread Kent Gibson
Consolidate the cleanup of lineevents, currently duplicated in
lineevent_create and lineevent_release, into a helper function
lineevent_free.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-cdev.c | 44 ++---
 1 file changed, 21 insertions(+), 23 deletions(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index d56b367239cc..e6c9b78adfc2 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -478,16 +478,20 @@ static ssize_t lineevent_read(struct file *file,
return bytes_read;
 }
 
-static int lineevent_release(struct inode *inode, struct file *file)
+static void lineevent_free(struct lineevent_state *le)
 {
-   struct lineevent_state *le = file->private_data;
-   struct gpio_device *gdev = le->gdev;
-
-   free_irq(le->irq, le);
-   gpiod_free(le->desc);
+   if (le->irq)
+   free_irq(le->irq, le);
+   if (le->desc)
+   gpiod_free(le->desc);
kfree(le->label);
+   put_device(>gdev->dev);
kfree(le);
-   put_device(>dev);
+}
+
+static int lineevent_release(struct inode *inode, struct file *file)
+{
+   lineevent_free(file->private_data);
return 0;
 }
 
@@ -612,7 +616,7 @@ static int lineevent_create(struct gpio_device *gdev, void 
__user *ip)
u32 eflags;
int fd;
int ret;
-   int irqflags = 0;
+   int irq, irqflags = 0;
 
if (copy_from_user(, ip, sizeof(eventreq)))
return -EFAULT;
@@ -663,7 +667,7 @@ static int lineevent_create(struct gpio_device *gdev, void 
__user *ip)
 
ret = gpiod_request(desc, le->label);
if (ret)
-   goto out_free_label;
+   goto out_free_le;
le->desc = desc;
le->eflags = eflags;
 
@@ -671,16 +675,17 @@ static int lineevent_create(struct gpio_device *gdev, 
void __user *ip)
 
ret = gpiod_direction_input(desc);
if (ret)
-   goto out_free_desc;
+   goto out_free_le;
 
blocking_notifier_call_chain(>gdev->notifier,
 GPIOLINE_CHANGED_REQUESTED, desc);
 
-   le->irq = gpiod_to_irq(desc);
-   if (le->irq <= 0) {
+   irq = gpiod_to_irq(desc);
+   if (irq <= 0) {
ret = -ENODEV;
-   goto out_free_desc;
+   goto out_free_le;
}
+   le->irq = irq;
 
if (eflags & GPIOEVENT_REQUEST_RISING_EDGE)
irqflags |= test_bit(FLAG_ACTIVE_LOW, >flags) ?
@@ -701,12 +706,12 @@ static int lineevent_create(struct gpio_device *gdev, 
void __user *ip)
   le->label,
   le);
if (ret)
-   goto out_free_desc;
+   goto out_free_le;
 
fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
if (fd < 0) {
ret = fd;
-   goto out_free_irq;
+   goto out_free_le;
}
 
file = anon_inode_getfile("gpio-event",
@@ -735,15 +740,8 @@ static int lineevent_create(struct gpio_device *gdev, void 
__user *ip)
 
 out_put_unused_fd:
put_unused_fd(fd);
-out_free_irq:
-   free_irq(le->irq, le);
-out_free_desc:
-   gpiod_free(le->desc);
-out_free_label:
-   kfree(le->label);
 out_free_le:
-   kfree(le);
-   put_device(>dev);
+   lineevent_free(le);
return ret;
 }
 
-- 
2.27.0



[PATCH 15/17] tools: gpio: fix spurious close warning in lsgpio

2020-07-07 Thread Kent Gibson
Fix bogus close warning that occurs when opening the character device
fails.

Signed-off-by: Kent Gibson 
---
 tools/gpio/lsgpio.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/gpio/lsgpio.c b/tools/gpio/lsgpio.c
index 8a71ad36f83b..b08d7a5e779b 100644
--- a/tools/gpio/lsgpio.c
+++ b/tools/gpio/lsgpio.c
@@ -94,7 +94,7 @@ int list_device(const char *device_name)
if (fd == -1) {
ret = -errno;
fprintf(stderr, "Failed to open %s\n", chrdev_name);
-   goto exit_close_error;
+   goto exit_free_name;
}
 
/* Inspect this GPIO chip */
@@ -141,6 +141,7 @@ int list_device(const char *device_name)
 exit_close_error:
if (close(fd) == -1)
perror("Failed to close GPIO character device file");
+exit_free_name:
free(chrdev_name);
return ret;
 }
-- 
2.27.0



[PATCH 11/17] gpiolib: cdev: remove recalculation of offset

2020-07-07 Thread Kent Gibson
Remove recalculation of offset from desc, where desc itself was calculated
from offset.

There is no benefit from the desc -> hwgpio conversion in this context.
The only implicit benefit of the offset -> desc -> hwgpio is
the range check in the offset -> desc, but where desc is required you
still get that, and where desc isn't required it is simpler to perform
the range check directly.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-cdev.c | 20 +++-
 1 file changed, 7 insertions(+), 13 deletions(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index b2b26dc25051..c86fb9305681 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -832,7 +832,6 @@ static long gpio_ioctl(struct file *file, unsigned int cmd, 
unsigned long arg)
void __user *ip = (void __user *)arg;
struct gpio_desc *desc;
__u32 offset;
-   int hwgpio;
 
/* We fail any subsequent ioctl():s when the chip is gone */
if (!gc)
@@ -860,12 +859,11 @@ static long gpio_ioctl(struct file *file, unsigned int 
cmd, unsigned long arg)
if (copy_from_user(, ip, sizeof(lineinfo)))
return -EFAULT;
 
+   /* this doubles as a range check on line_offset */
desc = gpiochip_get_desc(gc, lineinfo.line_offset);
if (IS_ERR(desc))
return PTR_ERR(desc);
 
-   hwgpio = gpio_chip_hwgpio(desc);
-
gpio_desc_to_lineinfo(desc, );
 
if (copy_to_user(ip, , sizeof(lineinfo)))
@@ -881,19 +879,18 @@ static long gpio_ioctl(struct file *file, unsigned int 
cmd, unsigned long arg)
if (copy_from_user(, ip, sizeof(lineinfo)))
return -EFAULT;
 
+   /* this doubles as a range check on line_offset */
desc = gpiochip_get_desc(gc, lineinfo.line_offset);
if (IS_ERR(desc))
return PTR_ERR(desc);
 
-   hwgpio = gpio_chip_hwgpio(desc);
-
-   if (test_and_set_bit(hwgpio, cdev->watched_lines))
+   if (test_and_set_bit(lineinfo.line_offset, cdev->watched_lines))
return -EBUSY;
 
gpio_desc_to_lineinfo(desc, );
 
if (copy_to_user(ip, , sizeof(lineinfo))) {
-   clear_bit(hwgpio, cdev->watched_lines);
+   clear_bit(lineinfo.line_offset, cdev->watched_lines);
return -EFAULT;
}
 
@@ -902,13 +899,10 @@ static long gpio_ioctl(struct file *file, unsigned int 
cmd, unsigned long arg)
if (copy_from_user(, ip, sizeof(offset)))
return -EFAULT;
 
-   desc = gpiochip_get_desc(gc, offset);
-   if (IS_ERR(desc))
-   return PTR_ERR(desc);
-
-   hwgpio = gpio_chip_hwgpio(desc);
+   if (offset >= cdev->gdev->ngpio)
+   return -EINVAL;
 
-   if (!test_and_clear_bit(hwgpio, cdev->watched_lines))
+   if (!test_and_clear_bit(offset, cdev->watched_lines))
return -EBUSY;
 
return 0;
-- 
2.27.0



[PATCH 10/17] gpiolib: cdev: fix minor race in GET_LINEINFO_WATCH

2020-07-07 Thread Kent Gibson
Merge separate usage of test_bit/set_bit into test_and_set_bit to remove
the possibility of a race between the test and set.

Similarly test_bit and clear_bit.

In the existing code it is possible for two threads to race past the
test_bit and then set or clear the watch bit, and neither return EBUSY.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-cdev.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index fe1b385deecc..b2b26dc25051 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -887,15 +887,16 @@ static long gpio_ioctl(struct file *file, unsigned int 
cmd, unsigned long arg)
 
hwgpio = gpio_chip_hwgpio(desc);
 
-   if (test_bit(hwgpio, cdev->watched_lines))
+   if (test_and_set_bit(hwgpio, cdev->watched_lines))
return -EBUSY;
 
gpio_desc_to_lineinfo(desc, );
 
-   if (copy_to_user(ip, , sizeof(lineinfo)))
+   if (copy_to_user(ip, , sizeof(lineinfo))) {
+   clear_bit(hwgpio, cdev->watched_lines);
return -EFAULT;
+   }
 
-   set_bit(hwgpio, cdev->watched_lines);
return 0;
} else if (cmd == GPIO_GET_LINEINFO_UNWATCH_IOCTL) {
if (copy_from_user(, ip, sizeof(offset)))
@@ -907,10 +908,9 @@ static long gpio_ioctl(struct file *file, unsigned int 
cmd, unsigned long arg)
 
hwgpio = gpio_chip_hwgpio(desc);
 
-   if (!test_bit(hwgpio, cdev->watched_lines))
+   if (!test_and_clear_bit(hwgpio, cdev->watched_lines))
return -EBUSY;
 
-   clear_bit(hwgpio, cdev->watched_lines);
return 0;
}
return -EINVAL;
-- 
2.27.0



[PATCH 09/17] gpiolib: cdev: rename priv to cdev

2020-07-07 Thread Kent Gibson
Rename priv to cdev to improve readability.

The name "priv" indicates that the object is pointed to by
file->private_data, not what the object is actually is.
As it is always used to point to a struct gpio_chardev_data, renaming
it to cdev is more appropriate.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-cdev.c | 90 ++---
 1 file changed, 45 insertions(+), 45 deletions(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index 352d815bbd07..fe1b385deecc 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -826,8 +826,8 @@ struct gpio_chardev_data {
  */
 static long gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 {
-   struct gpio_chardev_data *priv = file->private_data;
-   struct gpio_device *gdev = priv->gdev;
+   struct gpio_chardev_data *cdev = file->private_data;
+   struct gpio_device *gdev = cdev->gdev;
struct gpio_chip *gc = gdev->chip;
void __user *ip = (void __user *)arg;
struct gpio_desc *desc;
@@ -887,7 +887,7 @@ static long gpio_ioctl(struct file *file, unsigned int cmd, 
unsigned long arg)
 
hwgpio = gpio_chip_hwgpio(desc);
 
-   if (test_bit(hwgpio, priv->watched_lines))
+   if (test_bit(hwgpio, cdev->watched_lines))
return -EBUSY;
 
gpio_desc_to_lineinfo(desc, );
@@ -895,7 +895,7 @@ static long gpio_ioctl(struct file *file, unsigned int cmd, 
unsigned long arg)
if (copy_to_user(ip, , sizeof(lineinfo)))
return -EFAULT;
 
-   set_bit(hwgpio, priv->watched_lines);
+   set_bit(hwgpio, cdev->watched_lines);
return 0;
} else if (cmd == GPIO_GET_LINEINFO_UNWATCH_IOCTL) {
if (copy_from_user(, ip, sizeof(offset)))
@@ -907,10 +907,10 @@ static long gpio_ioctl(struct file *file, unsigned int 
cmd, unsigned long arg)
 
hwgpio = gpio_chip_hwgpio(desc);
 
-   if (!test_bit(hwgpio, priv->watched_lines))
+   if (!test_bit(hwgpio, cdev->watched_lines))
return -EBUSY;
 
-   clear_bit(hwgpio, priv->watched_lines);
+   clear_bit(hwgpio, cdev->watched_lines);
return 0;
}
return -EINVAL;
@@ -933,12 +933,12 @@ to_gpio_chardev_data(struct notifier_block *nb)
 static int lineinfo_changed_notify(struct notifier_block *nb,
   unsigned long action, void *data)
 {
-   struct gpio_chardev_data *priv = to_gpio_chardev_data(nb);
+   struct gpio_chardev_data *cdev = to_gpio_chardev_data(nb);
struct gpioline_info_changed chg;
struct gpio_desc *desc = data;
int ret;
 
-   if (!test_bit(gpio_chip_hwgpio(desc), priv->watched_lines))
+   if (!test_bit(gpio_chip_hwgpio(desc), cdev->watched_lines))
return NOTIFY_DONE;
 
memset(, 0, sizeof(chg));
@@ -947,9 +947,9 @@ static int lineinfo_changed_notify(struct notifier_block 
*nb,
chg.timestamp = ktime_get_ns();
gpio_desc_to_lineinfo(desc, );
 
-   ret = kfifo_in_spinlocked(>events, , 1, >wait.lock);
+   ret = kfifo_in_spinlocked(>events, , 1, >wait.lock);
if (ret)
-   wake_up_poll(>wait, EPOLLIN);
+   wake_up_poll(>wait, EPOLLIN);
else
pr_debug_ratelimited("lineinfo event FIFO is full - event 
dropped\n");
 
@@ -959,13 +959,13 @@ static int lineinfo_changed_notify(struct notifier_block 
*nb,
 static __poll_t lineinfo_watch_poll(struct file *file,
struct poll_table_struct *pollt)
 {
-   struct gpio_chardev_data *priv = file->private_data;
+   struct gpio_chardev_data *cdev = file->private_data;
__poll_t events = 0;
 
-   poll_wait(file, >wait, pollt);
+   poll_wait(file, >wait, pollt);
 
-   if (!kfifo_is_empty_spinlocked_noirqsave(>events,
->wait.lock))
+   if (!kfifo_is_empty_spinlocked_noirqsave(>events,
+>wait.lock))
events = EPOLLIN | EPOLLRDNORM;
 
return events;
@@ -974,7 +974,7 @@ static __poll_t lineinfo_watch_poll(struct file *file,
 static ssize_t lineinfo_watch_read(struct file *file, char __user *buf,
   size_t count, loff_t *off)
 {
-   struct gpio_chardev_data *priv = file->private_data;
+   struct gpio_chardev_data *cdev = file->private_data;
struct gpioline_info_changed event;
ssize_t bytes_read = 0;
int ret;
@@ -983,28 +983,28 @@ static ssize_t lineinfo_watch_read(struct file *file, 
char __user *buf,
return -EINVAL;
 
do {
-   spin_lock(>wait.lock);
-   if (kfifo_is_empty(>events)) {
+   spin_lock(>wait.lock);
+   if 

[PATCH 06/17] gpiolib: cdev: rename numdescs to num_descs

2020-07-07 Thread Kent Gibson
Rename numdescs to num_descs to be more consistent with the naming of
other counters and improve readability.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-cdev.c | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index 0d3a799e09ae..b39e7ef8c0d4 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -39,13 +39,13 @@
  * @gdev: the GPIO device the handle pertains to
  * @label: consumer label used to tag descriptors
  * @descs: the GPIO descriptors held by this handle
- * @numdescs: the number of descriptors held in the descs array
+ * @num_descs: the number of descriptors held in the descs array
  */
 struct linehandle_state {
struct gpio_device *gdev;
const char *label;
struct gpio_desc *descs[GPIOHANDLES_MAX];
-   u32 numdescs;
+   u32 num_descs;
 };
 
 #define GPIOHANDLE_REQUEST_VALID_FLAGS \
@@ -138,7 +138,7 @@ static long linehandle_set_config(struct linehandle_state 
*lh,
if (ret)
return ret;
 
-   for (i = 0; i < lh->numdescs; i++) {
+   for (i = 0; i < lh->num_descs; i++) {
desc = lh->descs[i];
linehandle_flags_to_desc_flags(gcnf.flags, >flags);
 
@@ -177,7 +177,7 @@ static long linehandle_ioctl(struct file *file, unsigned 
int cmd,
/* NOTE: It's ok to read values of output lines. */
int ret = gpiod_get_array_value_complex(false,
true,
-   lh->numdescs,
+   lh->num_descs,
lh->descs,
NULL,
vals);
@@ -185,7 +185,7 @@ static long linehandle_ioctl(struct file *file, unsigned 
int cmd,
return ret;
 
memset(, 0, sizeof(ghd));
-   for (i = 0; i < lh->numdescs; i++)
+   for (i = 0; i < lh->num_descs; i++)
ghd.values[i] = test_bit(i, vals);
 
if (copy_to_user(ip, , sizeof(ghd)))
@@ -204,13 +204,13 @@ static long linehandle_ioctl(struct file *file, unsigned 
int cmd,
return -EFAULT;
 
/* Clamp all values to [0,1] */
-   for (i = 0; i < lh->numdescs; i++)
+   for (i = 0; i < lh->num_descs; i++)
__assign_bit(i, vals, ghd.values[i]);
 
/* Reuse the array setting function */
return gpiod_set_array_value_complex(false,
 true,
-lh->numdescs,
+lh->num_descs,
 lh->descs,
 NULL,
 vals);
@@ -234,7 +234,7 @@ static int linehandle_release(struct inode *inode, struct 
file *file)
struct gpio_device *gdev = lh->gdev;
int i;
 
-   for (i = 0; i < lh->numdescs; i++)
+   for (i = 0; i < lh->num_descs; i++)
gpiod_free(lh->descs[i]);
kfree(lh->label);
kfree(lh);
@@ -333,7 +333,7 @@ static int linehandle_create(struct gpio_device *gdev, void 
__user *ip)
}
/* Let i point at the last handle */
i--;
-   lh->numdescs = handlereq.lines;
+   lh->num_descs = handlereq.lines;
 
fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
if (fd < 0) {
@@ -364,7 +364,7 @@ static int linehandle_create(struct gpio_device *gdev, void 
__user *ip)
fd_install(fd, file);
 
dev_dbg(>dev, "registered chardev handle for %d lines\n",
-   lh->numdescs);
+   lh->num_descs);
 
return 0;
 
-- 
2.27.0



[PATCH 07/17] gpiolib: cdev: remove pointless decrement of i

2020-07-07 Thread Kent Gibson
Remove pointless decrement of variable, and associated comment.

While i is used subsequently, it is re-initialized so this decrement
serves no purpose.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-cdev.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index b39e7ef8c0d4..d50339ef6f05 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -331,8 +331,6 @@ static int linehandle_create(struct gpio_device *gdev, void 
__user *ip)
dev_dbg(>dev, "registered chardev handle for line %d\n",
offset);
}
-   /* Let i point at the last handle */
-   i--;
lh->num_descs = handlereq.lines;
 
fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
-- 
2.27.0



[PATCH 03/17] gpiolib: cdev: minor indentation fixes

2020-07-07 Thread Kent Gibson
Make indentation consistent with other use to improve readability.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-cdev.c | 28 ++--
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index 55a9b7b44304..889ed2dc9e58 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -98,7 +98,7 @@ static int linehandle_validate_flags(u32 flags)
/* Only one bias flag can be set. */
if (((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
 (flags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
-   GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
+  GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
((flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
return -EINVAL;
@@ -212,11 +212,11 @@ static long linehandle_ioctl(struct file *filep, unsigned 
int cmd,
 
/* Reuse the array setting function */
return gpiod_set_array_value_complex(false,
- true,
- lh->numdescs,
- lh->descs,
- NULL,
- vals);
+true,
+lh->numdescs,
+lh->descs,
+NULL,
+vals);
} else if (cmd == GPIOHANDLE_SET_CONFIG_IOCTL) {
return linehandle_set_config(lh, ip);
}
@@ -225,7 +225,7 @@ static long linehandle_ioctl(struct file *filep, unsigned 
int cmd,
 
 #ifdef CONFIG_COMPAT
 static long linehandle_ioctl_compat(struct file *filep, unsigned int cmd,
-unsigned long arg)
+   unsigned long arg)
 {
return linehandle_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
 }
@@ -428,7 +428,7 @@ struct lineevent_state {
GPIOEVENT_REQUEST_FALLING_EDGE)
 
 static __poll_t lineevent_poll(struct file *filep,
-  struct poll_table_struct *wait)
+  struct poll_table_struct *wait)
 {
struct lineevent_state *le = filep->private_data;
__poll_t events = 0;
@@ -720,11 +720,11 @@ static int lineevent_create(struct gpio_device *gdev, 
void __user *ip)
 
/* Request a thread to read the events */
ret = request_threaded_irq(le->irq,
-   lineevent_irq_handler,
-   lineevent_irq_thread,
-   irqflags,
-   le->label,
-   le);
+  lineevent_irq_handler,
+  lineevent_irq_thread,
+  irqflags,
+  le->label,
+  le);
if (ret)
goto out_free_desc;
 
@@ -1052,7 +1052,7 @@ static ssize_t lineinfo_watch_read(struct file *filep, 
char __user *buf,
 static int gpio_chrdev_open(struct inode *inode, struct file *filp)
 {
struct gpio_device *gdev = container_of(inode->i_cdev,
- struct gpio_device, chrdev);
+   struct gpio_device, chrdev);
struct gpio_chardev_data *priv;
int ret = -ENOMEM;
 
-- 
2.27.0



[PATCH 04/17] gpiolib: cdev: refactor gpiohandle_flags_to_desc_flags

2020-07-07 Thread Kent Gibson
Refactor the mapping from handle flags to desc flags into a helper
function.

The assign_bit is overkill where it is replacing the set_bit cases, as is
rechecking bits known to be clear in some circumstances, but the DRY
simplification more than makes up for any performance degradation,
especially as this is not a hot path.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-cdev.c | 60 -
 1 file changed, 19 insertions(+), 41 deletions(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index 889ed2dc9e58..e64613b8d0ba 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -106,6 +106,22 @@ static int linehandle_validate_flags(u32 flags)
return 0;
 }
 
+static void linehandle_flags_to_desc_flags(u32 lflags, unsigned long *flagsp)
+{
+   assign_bit(FLAG_ACTIVE_LOW, flagsp,
+  lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW);
+   assign_bit(FLAG_OPEN_DRAIN, flagsp,
+  lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN);
+   assign_bit(FLAG_OPEN_SOURCE, flagsp,
+  lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE);
+   assign_bit(FLAG_PULL_UP, flagsp,
+  lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP);
+   assign_bit(FLAG_PULL_DOWN, flagsp,
+  lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN);
+   assign_bit(FLAG_BIAS_DISABLE, flagsp,
+  lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE);
+}
+
 static long linehandle_set_config(struct linehandle_state *lh,
  void __user *ip)
 {
@@ -113,7 +129,6 @@ static long linehandle_set_config(struct linehandle_state 
*lh,
struct gpio_desc *desc;
int i, ret;
u32 lflags;
-   unsigned long *flagsp;
 
if (copy_from_user(, ip, sizeof(gcnf)))
return -EFAULT;
@@ -125,25 +140,7 @@ static long linehandle_set_config(struct linehandle_state 
*lh,
 
for (i = 0; i < lh->numdescs; i++) {
desc = lh->descs[i];
-   flagsp = >flags;
-
-   assign_bit(FLAG_ACTIVE_LOW, flagsp,
-   lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW);
-
-   assign_bit(FLAG_OPEN_DRAIN, flagsp,
-   lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN);
-
-   assign_bit(FLAG_OPEN_SOURCE, flagsp,
-   lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE);
-
-   assign_bit(FLAG_PULL_UP, flagsp,
-   lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP);
-
-   assign_bit(FLAG_PULL_DOWN, flagsp,
-   lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN);
-
-   assign_bit(FLAG_BIAS_DISABLE, flagsp,
-   lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE);
+   linehandle_flags_to_desc_flags(gcnf.flags, >flags);
 
/*
 * Lines have to be requested explicitly for input
@@ -306,19 +303,7 @@ static int linehandle_create(struct gpio_device *gdev, 
void __user *ip)
goto out_free_descs;
lh->descs[i] = desc;
count = i + 1;
-
-   if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
-   set_bit(FLAG_ACTIVE_LOW, >flags);
-   if (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN)
-   set_bit(FLAG_OPEN_DRAIN, >flags);
-   if (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)
-   set_bit(FLAG_OPEN_SOURCE, >flags);
-   if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
-   set_bit(FLAG_BIAS_DISABLE, >flags);
-   if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
-   set_bit(FLAG_PULL_DOWN, >flags);
-   if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
-   set_bit(FLAG_PULL_UP, >flags);
+   linehandle_flags_to_desc_flags(handlereq.flags, >flags);
 
ret = gpiod_set_transitory(desc, false);
if (ret < 0)
@@ -685,14 +670,7 @@ static int lineevent_create(struct gpio_device *gdev, void 
__user *ip)
le->desc = desc;
le->eflags = eflags;
 
-   if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
-   set_bit(FLAG_ACTIVE_LOW, >flags);
-   if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
-   set_bit(FLAG_BIAS_DISABLE, >flags);
-   if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
-   set_bit(FLAG_PULL_DOWN, >flags);
-   if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
-   set_bit(FLAG_PULL_UP, >flags);
+   linehandle_flags_to_desc_flags(lflags, >flags);
 
ret = gpiod_direction_input(desc);
if (ret)
-- 
2.27.0



[PATCH 05/17] gpiolib: cdev: rename 'filep' and 'filp' to 'file' to be consistent with other use

2020-07-07 Thread Kent Gibson
Rename 'filep' and 'filp' to 'file' to be consistent with other use
and improve readability.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-cdev.c | 70 ++---
 1 file changed, 35 insertions(+), 35 deletions(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index e64613b8d0ba..0d3a799e09ae 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -164,10 +164,10 @@ static long linehandle_set_config(struct linehandle_state 
*lh,
return 0;
 }
 
-static long linehandle_ioctl(struct file *filep, unsigned int cmd,
+static long linehandle_ioctl(struct file *file, unsigned int cmd,
 unsigned long arg)
 {
-   struct linehandle_state *lh = filep->private_data;
+   struct linehandle_state *lh = file->private_data;
void __user *ip = (void __user *)arg;
struct gpiohandle_data ghd;
DECLARE_BITMAP(vals, GPIOHANDLES_MAX);
@@ -221,16 +221,16 @@ static long linehandle_ioctl(struct file *filep, unsigned 
int cmd,
 }
 
 #ifdef CONFIG_COMPAT
-static long linehandle_ioctl_compat(struct file *filep, unsigned int cmd,
+static long linehandle_ioctl_compat(struct file *file, unsigned int cmd,
unsigned long arg)
 {
-   return linehandle_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
+   return linehandle_ioctl(file, cmd, (unsigned long)compat_ptr(arg));
 }
 #endif
 
-static int linehandle_release(struct inode *inode, struct file *filep)
+static int linehandle_release(struct inode *inode, struct file *file)
 {
-   struct linehandle_state *lh = filep->private_data;
+   struct linehandle_state *lh = file->private_data;
struct gpio_device *gdev = lh->gdev;
int i;
 
@@ -412,13 +412,13 @@ struct lineevent_state {
(GPIOEVENT_REQUEST_RISING_EDGE | \
GPIOEVENT_REQUEST_FALLING_EDGE)
 
-static __poll_t lineevent_poll(struct file *filep,
+static __poll_t lineevent_poll(struct file *file,
   struct poll_table_struct *wait)
 {
-   struct lineevent_state *le = filep->private_data;
+   struct lineevent_state *le = file->private_data;
__poll_t events = 0;
 
-   poll_wait(filep, >wait, wait);
+   poll_wait(file, >wait, wait);
 
if (!kfifo_is_empty_spinlocked_noirqsave(>events, >wait.lock))
events = EPOLLIN | EPOLLRDNORM;
@@ -427,12 +427,12 @@ static __poll_t lineevent_poll(struct file *filep,
 }
 
 
-static ssize_t lineevent_read(struct file *filep,
+static ssize_t lineevent_read(struct file *file,
  char __user *buf,
  size_t count,
  loff_t *f_ps)
 {
-   struct lineevent_state *le = filep->private_data;
+   struct lineevent_state *le = file->private_data;
struct gpioevent_data ge;
ssize_t bytes_read = 0;
int ret;
@@ -448,7 +448,7 @@ static ssize_t lineevent_read(struct file *filep,
return bytes_read;
}
 
-   if (filep->f_flags & O_NONBLOCK) {
+   if (file->f_flags & O_NONBLOCK) {
spin_unlock(>wait.lock);
return -EAGAIN;
}
@@ -481,9 +481,9 @@ static ssize_t lineevent_read(struct file *filep,
return bytes_read;
 }
 
-static int lineevent_release(struct inode *inode, struct file *filep)
+static int lineevent_release(struct inode *inode, struct file *file)
 {
-   struct lineevent_state *le = filep->private_data;
+   struct lineevent_state *le = file->private_data;
struct gpio_device *gdev = le->gdev;
 
free_irq(le->irq, le);
@@ -494,10 +494,10 @@ static int lineevent_release(struct inode *inode, struct 
file *filep)
return 0;
 }
 
-static long lineevent_ioctl(struct file *filep, unsigned int cmd,
+static long lineevent_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
 {
-   struct lineevent_state *le = filep->private_data;
+   struct lineevent_state *le = file->private_data;
void __user *ip = (void __user *)arg;
struct gpiohandle_data ghd;
 
@@ -524,10 +524,10 @@ static long lineevent_ioctl(struct file *filep, unsigned 
int cmd,
 }
 
 #ifdef CONFIG_COMPAT
-static long lineevent_ioctl_compat(struct file *filep, unsigned int cmd,
+static long lineevent_ioctl_compat(struct file *file, unsigned int cmd,
   unsigned long arg)
 {
-   return lineevent_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
+   return lineevent_ioctl(file, cmd, (unsigned long)compat_ptr(arg));
 }
 #endif
 
@@ -826,9 +826,9 @@ struct gpio_chardev_data {
 /*
  * gpio_ioctl() - ioctl handler for the GPIO chardev
  */
-static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+static long gpio_ioctl(struct file *file, 

[PATCH 08/17] gpiolib: cdev: use blocking notifier call chain instead of atomic

2020-07-07 Thread Kent Gibson
Replace usage of atomic_notifier_call_chain with
blocking_notifier_call_chain as the notifier function,
lineinfo_changed_notify, calls gpio_desc_to_lineinfo,
which calls pinctrl_gpio_can_use_line, which can sleep.

The chain isn't being called from an atomic context so the
the blocking notifier is a suitable substitute.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-cdev.c | 24 
 drivers/gpio/gpiolib.c  | 14 +++---
 drivers/gpio/gpiolib.h  |  2 +-
 3 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index d50339ef6f05..352d815bbd07 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -158,8 +158,8 @@ static long linehandle_set_config(struct linehandle_state 
*lh,
return ret;
}
 
-   atomic_notifier_call_chain(>gdev->notifier,
-  GPIOLINE_CHANGED_CONFIG, desc);
+   blocking_notifier_call_chain(>gdev->notifier,
+GPIOLINE_CHANGED_CONFIG, desc);
}
return 0;
 }
@@ -325,8 +325,8 @@ static int linehandle_create(struct gpio_device *gdev, void 
__user *ip)
goto out_free_descs;
}
 
-   atomic_notifier_call_chain(>gdev->notifier,
-  GPIOLINE_CHANGED_REQUESTED, desc);
+   blocking_notifier_call_chain(>gdev->notifier,
+GPIOLINE_CHANGED_REQUESTED, desc);
 
dev_dbg(>dev, "registered chardev handle for line %d\n",
offset);
@@ -674,8 +674,8 @@ static int lineevent_create(struct gpio_device *gdev, void 
__user *ip)
if (ret)
goto out_free_desc;
 
-   atomic_notifier_call_chain(>gdev->notifier,
-  GPIOLINE_CHANGED_REQUESTED, desc);
+   blocking_notifier_call_chain(>gdev->notifier,
+GPIOLINE_CHANGED_REQUESTED, desc);
 
le->irq = gpiod_to_irq(desc);
if (le->irq <= 0) {
@@ -1049,8 +1049,8 @@ static int gpio_chrdev_open(struct inode *inode, struct 
file *file)
priv->gdev = gdev;
 
priv->lineinfo_changed_nb.notifier_call = lineinfo_changed_notify;
-   ret = atomic_notifier_chain_register(>notifier,
->lineinfo_changed_nb);
+   ret = blocking_notifier_chain_register(>notifier,
+  >lineinfo_changed_nb);
if (ret)
goto out_free_bitmap;
 
@@ -1064,8 +1064,8 @@ static int gpio_chrdev_open(struct inode *inode, struct 
file *file)
return ret;
 
 out_unregister_notifier:
-   atomic_notifier_chain_unregister(>notifier,
->lineinfo_changed_nb);
+   blocking_notifier_chain_unregister(>notifier,
+  >lineinfo_changed_nb);
 out_free_bitmap:
bitmap_free(priv->watched_lines);
 out_free_priv:
@@ -1085,8 +1085,8 @@ static int gpio_chrdev_release(struct inode *inode, 
struct file *file)
struct gpio_device *gdev = priv->gdev;
 
bitmap_free(priv->watched_lines);
-   atomic_notifier_chain_unregister(>notifier,
->lineinfo_changed_nb);
+   blocking_notifier_chain_unregister(>notifier,
+  >lineinfo_changed_nb);
put_device(>dev);
kfree(priv);
 
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 4d267c69482c..80137c1b3cdc 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -615,7 +615,7 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void 
*data,
 
spin_unlock_irqrestore(_lock, flags);
 
-   ATOMIC_INIT_NOTIFIER_HEAD(>notifier);
+   BLOCKING_INIT_NOTIFIER_HEAD(>notifier);
 
 #ifdef CONFIG_PINCTRL
INIT_LIST_HEAD(>pin_ranges);
@@ -2049,8 +2049,8 @@ static bool gpiod_free_commit(struct gpio_desc *desc)
}
 
spin_unlock_irqrestore(_lock, flags);
-   atomic_notifier_call_chain(>gdev->notifier,
-  GPIOLINE_CHANGED_RELEASED, desc);
+   blocking_notifier_call_chain(>gdev->notifier,
+GPIOLINE_CHANGED_RELEASED, desc);
 
return ret;
 }
@@ -3927,8 +3927,8 @@ struct gpio_desc *__must_check gpiod_get_index(struct 
device *dev,
return ERR_PTR(ret);
}
 
-   atomic_notifier_call_chain(>gdev->notifier,
-  GPIOLINE_CHANGED_REQUESTED, desc);
+   blocking_notifier_call_chain(>gdev->notifier,
+GPIOLINE_CHANGED_REQUESTED, desc);
 
return desc;
 }
@@ -3995,8 +3995,8 @@ struct gpio_desc *fwnode_get_named_gpiod(struct 
fwnode_handle *fwnode,
 

[PATCH 00/17] gpiolib: cdev: pre-uAPI v2 cleanups

2020-07-07 Thread Kent Gibson
This collection of patches provides improvements to or
address minor problems in gpiolib-cdev.

The majority of the patches (1-7, 9-11) have been pulled directly from
my "gpio: cdev: add uAPI V2" patch set, as they are not related to any
uAPI changes.
The remaining patches were either split out of the remaining patches
from that set, as they are not directly part of the uAPI changes, or
were inspired by fixes for issues in that set, or were only noticed
subsequent to that set.

Changes since "gpio: cdev: add uAPI V2":
 - rebase onto latest gpio/devel
 - fix typo in patch 1 commit description
 - replace patch 8 with the blocking notifier call chain patch
 - rename priv to cdev instead of gcdev in patch 9
 - fix error handling in patch 10
 - add patches 12 to 17

Kent Gibson (17):
  gpiolib: move gpiolib-sysfs function declarations into their own
header
  gpiolib: cdev: sort includes
  gpiolib: cdev: minor indentation fixes
  gpiolib: cdev: refactor gpiohandle_flags_to_desc_flags
  gpiolib: cdev: rename 'filep' and 'filp' to 'file' to be consistent
with other use
  gpiolib: cdev: rename numdescs to num_descs
  gpiolib: cdev: remove pointless decrement of i
  gpiolib: cdev: use blocking notifier call chain instead of atomic
  gpiolib: cdev: rename priv to cdev
  gpiolib: cdev: fix minor race in GET_LINEINFO_WATCH
  gpiolib: cdev: remove recalculation of offset
  gpiolib: cdev: refactor linehandle cleanup into linehandle_free
  gpiolib: cdev: refactor lineevent cleanup into lineevent_free
  gpio: uapi: fix misplaced comment line
  tools: gpio: fix spurious close warning in lsgpio
  tools: gpio: fix spurious close warning in gpio-utils
  tools: gpio: fix spurious close warning in gpio-event-mon

 drivers/gpio/gpiolib-cdev.c  | 385 ---
 drivers/gpio/gpiolib-sysfs.c |   1 +
 drivers/gpio/gpiolib-sysfs.h |  24 +++
 drivers/gpio/gpiolib.c   |  15 +-
 drivers/gpio/gpiolib.h   |  20 +-
 include/uapi/linux/gpio.h|   2 +-
 tools/gpio/gpio-event-mon.c  |   3 +-
 tools/gpio/gpio-utils.c  |   4 +-
 tools/gpio/lsgpio.c  |   3 +-
 9 files changed, 217 insertions(+), 240 deletions(-)
 create mode 100644 drivers/gpio/gpiolib-sysfs.h


base-commit: b239e4454e59bc85d466eb5630da46f6a876df77
-- 
2.27.0



[PATCH 01/17] gpiolib: move gpiolib-sysfs function declarations into their own header

2020-07-07 Thread Kent Gibson
Move gpiolib-sysfs function declarations into their own header.

These functions are in gpiolib-sysfs.c, and are only required by gpiolib.c,
and so should be in a module header, not gpiolib.h.

This brings gpiolib-sysfs into line with gpiolib-cdev, and is another step
towards removing the sysfs inferface.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-sysfs.c |  1 +
 drivers/gpio/gpiolib-sysfs.h | 24 
 drivers/gpio/gpiolib.c   |  1 +
 drivers/gpio/gpiolib.h   | 18 --
 4 files changed, 26 insertions(+), 18 deletions(-)
 create mode 100644 drivers/gpio/gpiolib-sysfs.h

diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c
index 82371fe2ccc6..728f6c687182 100644
--- a/drivers/gpio/gpiolib-sysfs.c
+++ b/drivers/gpio/gpiolib-sysfs.c
@@ -11,6 +11,7 @@
 #include 
 
 #include "gpiolib.h"
+#include "gpiolib-sysfs.h"
 
 #define GPIO_IRQF_TRIGGER_FALLING  BIT(0)
 #define GPIO_IRQF_TRIGGER_RISING   BIT(1)
diff --git a/drivers/gpio/gpiolib-sysfs.h b/drivers/gpio/gpiolib-sysfs.h
new file mode 100644
index ..ddd0e503f8eb
--- /dev/null
+++ b/drivers/gpio/gpiolib-sysfs.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef GPIOLIB_SYSFS_H
+#define GPIOLIB_SYSFS_H
+
+#ifdef CONFIG_GPIO_SYSFS
+
+int gpiochip_sysfs_register(struct gpio_device *gdev);
+void gpiochip_sysfs_unregister(struct gpio_device *gdev);
+
+#else
+
+static inline int gpiochip_sysfs_register(struct gpio_device *gdev)
+{
+   return 0;
+}
+
+static inline void gpiochip_sysfs_unregister(struct gpio_device *gdev)
+{
+}
+
+#endif /* CONFIG_GPIO_SYSFS */
+
+#endif /* GPIOLIB_SYSFS_H */
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 291c088a5964..4d267c69482c 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -26,6 +26,7 @@
 #include "gpiolib-of.h"
 #include "gpiolib-acpi.h"
 #include "gpiolib-cdev.h"
+#include "gpiolib-sysfs.h"
 
 #define CREATE_TRACE_POINTS
 #include 
diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h
index 9ed242316414..2dee4e1e12dc 100644
--- a/drivers/gpio/gpiolib.h
+++ b/drivers/gpio/gpiolib.h
@@ -175,22 +175,4 @@ static inline int gpio_chip_hwgpio(const struct gpio_desc 
*desc)
 #define chip_dbg(gc, fmt, ...) \
dev_dbg(>gpiodev->dev, "(%s): " fmt, gc->label, ##__VA_ARGS__)
 
-#ifdef CONFIG_GPIO_SYSFS
-
-int gpiochip_sysfs_register(struct gpio_device *gdev);
-void gpiochip_sysfs_unregister(struct gpio_device *gdev);
-
-#else
-
-static inline int gpiochip_sysfs_register(struct gpio_device *gdev)
-{
-   return 0;
-}
-
-static inline void gpiochip_sysfs_unregister(struct gpio_device *gdev)
-{
-}
-
-#endif /* CONFIG_GPIO_SYSFS */
-
 #endif /* GPIOLIB_H */
-- 
2.27.0



[PATCH 02/17] gpiolib: cdev: sort includes

2020-07-07 Thread Kent Gibson
Sort the includes of gpiolib-cdev.c to make it easier to identify if a
module is included and to avoid duplication.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-cdev.c | 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index b8b872724628..55a9b7b44304 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -1,24 +1,24 @@
 // SPDX-License-Identifier: GPL-2.0
 
+#include 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
+#include 
+#include 
 #include 
 #include 
+#include 
 #include 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
+#include 
+#include 
+#include 
 #include 
+#include 
+#include 
 #include 
+#include 
 #include 
+#include 
 #include 
 
 #include "gpiolib.h"
-- 
2.27.0



Re: [PATCH] mm/hugetlb: split hugetlb_cma in nodes with memory

2020-07-07 Thread Anshuman Khandual
Hello Barry,

On 07/08/2020 05:53 AM, Barry Song wrote:
> Rather than splitting huge_cma in online nodes, it is better to do it in
> nodes with memory.

Right, it makes sense to avoid nodes without memory, hence loosing portions
of CMA reservation intended for HugeTLB. N_MEMORY is better than N_ONLINE
and will help avoid this situation.

> For an ARM64 server with four numa nodes and only node0 has memory. If I
> set hugetlb_cma=4G in bootargs,
> 
> without this patch, I got the below printk:
> hugetlb_cma: reserve 4096 MiB, up to 1024 MiB per node
> hugetlb_cma: reserved 1024 MiB on node 0
> hugetlb_cma: reservation failed: err -12, node 1
> hugetlb_cma: reservation failed: err -12, node 2
> hugetlb_cma: reservation failed: err -12, node 3

As expected.

> 
> hugetlb_cma size is broken once the system has nodes without memory.

I would not say that it is 'broken'. It is just not optimal but still works
as designed.

> 
> With this patch, I got the below printk:
> hugetlb_cma: reserve 4096 MiB, up to 4096 MiB per node
> hugetlb_cma: reserved 4096 MiB on node 0

As expected, the per node CMA reservation quota has changed from N_ONLINE
to N_MEMORY.

> 
> So this patch fixes the broken hugetlb_cma size on arm64.

There is nothing arm64 specific here. A platform where N_ONLINE != N_MEMORY
i.e with some nodes without memory when CMA reservation gets called, will
have this problem.

> 
> Jonathan Cameron tested this patch on x86 platform. Jonathan figured out x86
> is much different with arm64. hugetlb_cma size has never broken on x86.
> On arm64 all nodes are marked online at the same time. On x86, only
> nodes with memory are initially marked as online:
> initmem_init()->x86_numa_init()->numa_init()->
> numa_register_memblks()->alloc_node_data()->node_set_online()
> So at time of the existing cma setup call only the memory containing nodes
> are online. The other nodes are brought up much later.

The problem is always there if N_ONLINE != N_MEMORY but in this case, it
is just hidden because N_ONLINE happen to match N_MEMORY during the boot
process when hugetlb_cma_reserve() gets called.

> 
> Thus, the change is simply to fix ARM64.  A change is needed to x86 only
> because the inherent assumptions in cma_hugetlb_reserve() have changed.

cma_hugetlb_reserve() will now scan over N_MEMORY and hence expects all
platforms to have N_MEMORY initialized properly before calling it. This
needs to be well documented for the hugetlb_cma_reserve() function along
with it's call sites.

> 
> Fixes: cf11e85fc08c ("mm: hugetlb: optionally allocate gigantic hugepages 
> using cma")

I would not call this a "Fix". The current code still works, though in
a sub optimal manner.

> Cc: Roman Gushchin 
> Cc: Catalin Marinas 
> Cc: Will Deacon 
> Cc: Thomas Gleixner 
> Cc: Ingo Molnar 
> Cc: Borislav Petkov 
> Cc: H. Peter Anvin 
> Cc: Mike Kravetz 
> Cc: Mike Rapoport 
> Cc: Andrew Morton 
> Cc: Anshuman Khandual 
> Cc: Jonathan Cameron 
> Signed-off-by: Barry Song 
> ---
>  arch/arm64/mm/init.c| 18 +-
>  arch/x86/kernel/setup.c | 13 ++---
>  mm/hugetlb.c|  4 ++--
>  3 files changed, 21 insertions(+), 14 deletions(-)
> 
> diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
> index 1e93cfc7c47a..f6090ef6812b 100644
> --- a/arch/arm64/mm/init.c
> +++ b/arch/arm64/mm/init.c
> @@ -420,15 +420,6 @@ void __init bootmem_init(void)
>  
>   arm64_numa_init();
>  
> - /*
> -  * must be done after arm64_numa_init() which calls numa_init() to
> -  * initialize node_online_map that gets used in hugetlb_cma_reserve()
> -  * while allocating required CMA size across online nodes.
> -  */
> -#ifdef CONFIG_ARM64_4K_PAGES
> - hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
> -#endif
> -
>   /*
>* Sparsemem tries to allocate bootmem in memory_present(), so must be
>* done after the fixed reservations.
> @@ -438,6 +429,15 @@ void __init bootmem_init(void)
>   sparse_init();
>   zone_sizes_init(min, max);
>  
> + /*
> +  * must be done after zone_sizes_init() which calls node_set_state() to
> +  * setup node_states[N_MEMORY] that gets used in hugetlb_cma_reserve()
> +  * while allocating required CMA size across nodes with memory.
> +  */

Needs better wording here, in particular a reference to free_area_init()
that updates N_MEMORY via node_set_state(). Also mention the fact that
now hugetlb_cma_reserve() scans over N_MEMORY nodemask and hence expects
the platforms to have a properly initialized one.

> +#ifdef CONFIG_ARM64_4K_PAGES
> + hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
> +#endif
> +
>   memblock_dump_all();
>  }
>  
> diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
> index a3767e74c758..fdb3a934b6c6 100644
> --- a/arch/x86/kernel/setup.c
> +++ b/arch/x86/kernel/setup.c
> @@ -1164,9 +1164,6 @@ void __init setup_arch(char **cmdline_p)
>   initmem_init();
>   dma_contiguous_reserve(max_pfn_mapped 

Re: [PATCH v11 2/4] fs: Add standard casefolding support

2020-07-07 Thread Eric Biggers
On Tue, Jul 07, 2020 at 08:05:50PM -0700, Daniel Rosenberg wrote:
> +/**
> + * generic_ci_d_compare - generic d_compare implementation for casefolding 
> filesystems
> + * @dentry:  dentry whose name we are checking against
> + * @len: len of name of dentry
> + * @str: str pointer to name of dentry
> + * @name:Name to compare against
> + *
> + * Return: 0 if names match, 1 if mismatch, or -ERRNO
> + */
> +int generic_ci_d_compare(const struct dentry *dentry, unsigned int len,
> +   const char *str, const struct qstr *name)
> +{
> + const struct dentry *parent = READ_ONCE(dentry->d_parent);
> + const struct inode *inode = READ_ONCE(parent->d_inode);

How about calling the 'inode' variable 'dir' instead?

That would help avoid confusion about what is the directory and what is a file
in the directory.

Likewise in generic_ci_d_hash().

> +/**
> + * generic_ci_d_hash - generic d_hash implementation for casefolding 
> filesystems
> + * @dentry:  dentry whose name we are hashing

This comment for @dentry needs to be updated.

It's the parent dentry, not the dentry whose name we are hashing.

> + * @str: qstr of name whose hash we should fill in
> + *
> + * Return: 0 if hash was successful, or -ERRNO

As I mentioned on v9, this can also return 0 if the hashing was not done because
it wants to fallback to the standard hashing.  Can you please fix the comment?

> +int generic_ci_d_hash(const struct dentry *dentry, struct qstr *str)
> +{
> + const struct inode *inode = READ_ONCE(dentry->d_inode);
> + struct super_block *sb = dentry->d_sb;
> + const struct unicode_map *um = sb->s_encoding;
> + int ret = 0;
> +
> + if (!inode || !needs_casefold(inode))
> + return 0;
> +
> + ret = utf8_casefold_hash(um, dentry, str);
> + if (ret < 0)
> + goto err;
> +
> + return 0;
> +err:
> + if (sb_has_strict_encoding(sb))
> + ret = -EINVAL;
> + else
> + ret = 0;
> + return ret;
> +}

On v9, Gabriel suggested simplifying this to:

ret = utf8_casefold_hash(um, dentry, str);
if (ret < 0 && sb_has_enc_strict_mode(sb))
return -EINVAL;
return 0;

Any reason not to do that?

- Eric


Re: [PATCH v10 4/9] test_firmware: add partial read support for request_firmware_into_buf

2020-07-07 Thread Scott Branden




On 2020-07-07 4:59 p.m., Kees Cook wrote:

On Mon, Jul 06, 2020 at 04:23:04PM -0700, Scott Branden wrote:

Add additional hooks to test_firmware to pass in support
for partial file read using request_firmware_into_buf.
buf_size: size of buffer to request firmware into
partial: indicates that a partial file request is being made
file_offset: to indicate offset into file to request

Signed-off-by: Scott Branden 

I am a fan of tests. :) If Luis gives an Ack here, you're good.
There were not even any tests for request_firmware_into_buf before I 
started this partial read support.
Fortunately those base changes have already been accepted so I think 
this change is a simple addition to those accepted patches.






[PATCH v4 2/2] devicetree: hwmon: shtc1: Add sensirion,shtc1.yaml

2020-07-07 Thread Chris Ruehl
Add documentation for the newly added DTS support in the shtc1 driver.
To align with the drivers logic to have high precision by default
a boolean sensirion,low_precision is used to switch to low precision.

Signed-off-by: Chris Ruehl 
---
 .../bindings/hwmon/sensirion,shtc1.yaml   | 60 +++
 1 file changed, 60 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml

diff --git a/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml 
b/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml
new file mode 100644
index ..6725a7b646b7
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/hwmon/sensirion,shtc1.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Sensirion SHTC1 Humidity and Temperature Sensor IC
+
+maintainers:
+  - chris.ru...@gtsys.com.hk
+
+description: |
+  The SHTC1, SHTW1 and SHTC3 are digital humidity and temperature sensor
+  designed especially for battery-driven high-volume consumer electronics
+  applications.
+  For further information refere to Documentation/hwmon/shtc1.rst
+
+  This binding document describes the binding for the hardware monitor
+  portion of the driver.
+
+properties:
+  compatible:
+enum:
+  - sensirion,shtc1
+  - sensirion,shtw1
+  - sensirion,shtc3
+
+  reg:
+maxItems: 1
+description: I2C address 0x70
+
+  sensirion,blocking_io:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+  If set the i2c bus hold until measure finished.
+
+  sensirion,low_precision:
+$ref: /schemas/types.yaml#definitions/flag
+description:
+  If set aquire data with low precision (not recommended).
+  The driver aquire data with high precision by default.
+
+required:
+  - compatible
+  - reg
+
+examples:
+  - |
+i2c1 {
+  status = "okay";
+  clock-frequency = <40>;
+
+  shtc3@70 {
+compatible = "sensirion,shtc3";
+reg = <0x70>
+sensirion,blocking_io;
+status = "okay";
+  };
+};
+...
-- 
2.20.1



[PATCH v4 1/2] hwmon: shtc1: add support for device tree bindings

2020-07-07 Thread Chris Ruehl
Add support for DTS bindings for the sensirion shtc1,shtw1 and shtc3.

Signed-off-by: Chris Ruehl 
Reviewed-by: Guenter Roeck 
---
 drivers/hwmon/shtc1.c | 25 ++---
 1 file changed, 22 insertions(+), 3 deletions(-)

diff --git a/drivers/hwmon/shtc1.c b/drivers/hwmon/shtc1.c
index a0078ccede03..827d421b2b8f 100644
--- a/drivers/hwmon/shtc1.c
+++ b/drivers/hwmon/shtc1.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /* commands (high precision mode) */
 static const unsigned char shtc1_cmd_measure_blocking_hpm[]= { 0x7C, 0xA2 
};
@@ -196,6 +197,7 @@ static int shtc1_probe(struct i2c_client *client,
enum shtcx_chips chip = id->driver_data;
struct i2c_adapter *adap = client->adapter;
struct device *dev = >dev;
+   struct device_node *np = dev->of_node;
 
if (!i2c_check_functionality(adap, I2C_FUNC_I2C)) {
dev_err(dev, "plain i2c transactions not supported\n");
@@ -233,8 +235,14 @@ static int shtc1_probe(struct i2c_client *client,
data->client = client;
data->chip = chip;
 
-   if (client->dev.platform_data)
-   data->setup = *(struct shtc1_platform_data *)dev->platform_data;
+   if (np) {
+   data->setup.blocking_io = of_property_read_bool(np, 
"sensirion,blocking_io");
+   data->setup.high_precision = !of_property_read_bool(np, 
"sensicon,low_precision");
+   } else {
+   if (client->dev.platform_data)
+   data->setup = *(struct shtc1_platform_data 
*)dev->platform_data;
+   }
+
shtc1_select_command(data);
mutex_init(>update_lock);
 
@@ -257,8 +265,19 @@ static const struct i2c_device_id shtc1_id[] = {
 };
 MODULE_DEVICE_TABLE(i2c, shtc1_id);
 
+static const struct of_device_id shtc1_of_match[] = {
+   { .compatible = "sensirion,shtc1" },
+   { .compatible = "sensirion,shtw1" },
+   { .compatible = "sensirion,shtc3" },
+   { }
+};
+MODULE_DEVICE_TABLE(of, shtc1_of_match);
+
 static struct i2c_driver shtc1_i2c_driver = {
-   .driver.name  = "shtc1",
+   .driver = {
+   .name = "shtc1",
+   .of_match_table = shtc1_of_match,
+   },
.probe= shtc1_probe,
.id_table = shtc1_id,
 };
-- 
2.20.1



[PATCH v4 0/2] shtc1: add support for device tree bindings

2020-07-07 Thread Chris Ruehl
Add support for DTS bindings to the shtc driver
The patches add the compatible table and of_property_read_bool to the
shtc1.c. Newly created Yaml document has been released to the
Documentation/devicetree/hwmon/sensirion,shtc1.yaml

Signed-off-by: Chris Ruehl 
---
 Version 4
Fix errors report by make dt_binding_check (devicetree)
Set maintainers for the yaml document to my own.
 Version 3
Fix errors report with checkpatch.pl
Correct logic, add (!) when check for sensirion,low_precision
 Version 2
remove the #ifdef CONFIG_OF
ignore platform data if dev->of_node is valid
use boolean only therefor use sensirion,low_precise to fit the logic
add missing driver.of_match_table entry
 Version 1
initial version


RE: [PATCH v2 1/3] arm64/numa: export memory_add_physaddr_to_nid as EXPORT_SYMBOL_GPL

2020-07-07 Thread Justin He
Hi Dan

> -Original Message-
> From: Dan Williams 
> Sent: Wednesday, July 8, 2020 11:57 AM
> To: Justin He 
> Cc: Michal Hocko ; David Hildenbrand ;
> Catalin Marinas ; Will Deacon ;
> Vishal Verma ; Dave Jiang ;
> Andrew Morton ; Mike Rapoport
> ; Baoquan He ; Chuhong Yuan
> ; linux-arm-ker...@lists.infradead.org; linux-
> ker...@vger.kernel.org; linux...@kvack.org; linux-nvd...@lists.01.org;
> Kaly Xin 
> Subject: Re: [PATCH v2 1/3] arm64/numa: export memory_add_physaddr_to_nid
> as EXPORT_SYMBOL_GPL
> 
> On Tue, Jul 7, 2020 at 7:20 PM Justin He  wrote:
> >
> > Hi Michal and David
> >
> > > -Original Message-
> > > From: Michal Hocko 
> > > Sent: Tuesday, July 7, 2020 7:55 PM
> > > To: Justin He 
> > > Cc: Catalin Marinas ; Will Deacon
> > > ; Dan Williams ; Vishal
> Verma
> > > ; Dave Jiang ; Andrew
> > > Morton ; Mike Rapoport ;
> > > Baoquan He ; Chuhong Yuan ;
> linux-
> > > arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> > > m...@kvack.org; linux-nvd...@lists.01.org; Kaly Xin 
> > > Subject: Re: [PATCH v2 1/3] arm64/numa: export
> memory_add_physaddr_to_nid
> > > as EXPORT_SYMBOL_GPL
> > >
> > > On Tue 07-07-20 13:59:15, Jia He wrote:
> > > > This exports memory_add_physaddr_to_nid() for module driver to use.
> > > >
> > > > memory_add_physaddr_to_nid() is a fallback option to get the nid in
> case
> > > > NUMA_NO_NID is detected.
> > > >
> > > > Suggested-by: David Hildenbrand 
> > > > Signed-off-by: Jia He 
> > > > ---
> > > >  arch/arm64/mm/numa.c | 5 +++--
> > > >  1 file changed, 3 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/arch/arm64/mm/numa.c b/arch/arm64/mm/numa.c
> > > > index aafcee3e3f7e..7eeb31740248 100644
> > > > --- a/arch/arm64/mm/numa.c
> > > > +++ b/arch/arm64/mm/numa.c
> > > > @@ -464,10 +464,11 @@ void __init arm64_numa_init(void)
> > > >
> > > >  /*
> > > >   * We hope that we will be hotplugging memory on nodes we already
> know
> > > about,
> > > > - * such that acpi_get_node() succeeds and we never fall back to
> this...
> > > > + * such that acpi_get_node() succeeds. But when SRAT is not present,
> > > the node
> > > > + * id may be probed as NUMA_NO_NODE by acpi, Here provide a
> fallback
> > > option.
> > > >   */
> > > >  int memory_add_physaddr_to_nid(u64 addr)
> > > >  {
> > > > -   pr_warn("Unknown node for memory at 0x%llx, assuming node 0\n",
> > > addr);
> > > > return 0;
> > > >  }
> > > > +EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
> > >
> > > Does it make sense to export a noop function? Wouldn't make more sense
> > > to simply make it static inline somewhere in a header? I haven't
> checked
> > > whether there is an easy way to do that sanely bu this just hit my
> eyes.
> >
> > Okay, I can make a change in memory_hotplug.h, sth like:
> > --- a/include/linux/memory_hotplug.h
> > +++ b/include/linux/memory_hotplug.h
> > @@ -149,13 +149,13 @@ int add_pages(int nid, unsigned long start_pfn,
> unsigned long nr_pages,
> >   struct mhp_params *params);
> >  #endif /* ARCH_HAS_ADD_PAGES */
> >
> > -#ifdef CONFIG_NUMA
> > -extern int memory_add_physaddr_to_nid(u64 start);
> > -#else
> > +#if !defined(CONFIG_NUMA) || !defined(memory_add_physaddr_to_nid)
> >  static inline int memory_add_physaddr_to_nid(u64 start)
> >  {
> > return 0;
> >  }
> > +#else
> > +extern int memory_add_physaddr_to_nid(u64 start);
> >  #endif
> >
> > And then check the memory_add_physaddr_to_nid() helper on all arches,
> > if it is noop(return 0), I can simply remove it.
> > if it is not noop, after the helper,
> > #define memory_add_physaddr_to_nid
> >
> > What do you think of this proposal?
> 
> Especially for architectures that use memblock info for numa info
> (which seems to be everyone except x86) why not implement a generic
> memory_add_physaddr_to_nid() that does:
> 
> int memory_add_physaddr_to_nid(u64 addr)
> {
> unsigned long start_pfn, end_pfn, pfn = PHYS_PFN(addr);
> int nid;
> 
> for_each_online_node(nid) {
> get_pfn_range_for_nid(nid, _pfn, _pfn);
> if (pfn >= start_pfn && pfn <= end_pfn)
> return nid;
> }
> return NUMA_NO_NODE;
> }

Thanks for your suggestion,
Could I wrap the codes and let memory_add_physaddr_to_nid simply invoke
phys_to_target_node()? 


--
Cheers,
Justin (Jia He)




Re: [PATCH v10 3/9] firmware: add request_partial_firmware_into_buf

2020-07-07 Thread Scott Branden




On 2020-07-07 4:58 p.m., Kees Cook wrote:

On Mon, Jul 06, 2020 at 04:23:03PM -0700, Scott Branden wrote:

Add request_partial_firmware_into_buf to allow for portions
of firmware file to be read into a buffer.  Necessary where firmware
needs to be loaded in portions from file in memory constrained systems.

Just tear out the differing "id" and just use FW_OPT_PARTIAL and I think
if Luis is happy, you're all set.

I hope so.  Also, I will need to call 
kernel_pread_file_from_path_initns() if FW_OPT_PARTIAL is set
and kernel_read_file_from_path_initns() otherwise to avoid a swiss 
army-knife approach of calling a common function with multiple parameters.





ld.lld: warning: drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral) is being placed in '.data..compoundliteral'

2020-07-07 Thread kernel test robot
tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   dcde237b9b0eb1d19306e6f48c0a4e058907619f
commit: e4f4ffa8a98c24a4ab482669b1e2b4cfce3f52f4 input: i8042 - Remove special 
PowerPC handling
date:   6 weeks ago
config: powerpc64-randconfig-r004-20200707 (attached as .config)
compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project 
02946de3802d3bc65bc9f2eb9b8d4969b5a7add8)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc64 cross compiling tool for clang build
# apt-get install binutils-powerpc64-linux-gnu
git checkout e4f4ffa8a98c24a4ab482669b1e2b4cfce3f52f4
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross 
ARCH=powerpc64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

   ld.lld: warning: drivers/built-in.a(misc/ds1682.o):(.data..compoundliteral) 
is being placed in '.data..compoundliteral'
>> ld.lld: warning: 
>> drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral) is being 
>> placed in '.data..compoundliteral'
>> ld.lld: warning: 
>> drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.16) is being 
>> placed in '.data..compoundliteral.16'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.18) is being 
placed in '.data..compoundliteral.18'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.20) is being 
placed in '.data..compoundliteral.20'
>> ld.lld: warning: 
>> drivers/built-in.a(net/phy/mdio_bus.o):(.bss..compoundliteral.22) is being 
>> placed in '.bss..compoundliteral.22'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.24) is being 
placed in '.data..compoundliteral.24'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.26) is being 
placed in '.data..compoundliteral.26'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.28) is being 
placed in '.data..compoundliteral.28'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.30) is being 
placed in '.data..compoundliteral.30'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.32) is being 
placed in '.data..compoundliteral.32'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.34) is being 
placed in '.data..compoundliteral.34'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.36) is being 
placed in '.data..compoundliteral.36'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.38) is being 
placed in '.data..compoundliteral.38'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.40) is being 
placed in '.data..compoundliteral.40'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.42) is being 
placed in '.data..compoundliteral.42'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.44) is being 
placed in '.data..compoundliteral.44'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.46) is being 
placed in '.data..compoundliteral.46'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.48) is being 
placed in '.data..compoundliteral.48'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.50) is being 
placed in '.data..compoundliteral.50'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.52) is being 
placed in '.data..compoundliteral.52'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.54) is being 
placed in '.data..compoundliteral.54'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.56) is being 
placed in '.data..compoundliteral.56'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.58) is being 
placed in '.data..compoundliteral.58'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.60) is being 
placed in '.data..compoundliteral.60'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.62) is being 
placed in '.data..compoundliteral.62'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.64) is being 
placed in '.data..compoundliteral.64'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..compoundliteral.66) is being 
placed in '.data..compoundliteral.66'
   ld.lld: warning: 
drivers/built-in.a(net/phy/mdio_bus.o):(.data..com

Re: [PATCH v10 2/9] fs: introduce kernel_pread_file* support

2020-07-07 Thread Scott Branden




On 2020-07-07 4:56 p.m., Kees Cook wrote:

On Mon, Jul 06, 2020 at 04:23:02PM -0700, Scott Branden wrote:

Add kernel_pread_file* support to kernel to allow for partial read
of files with an offset into the file.

Signed-off-by: Scott Branden 
---
  fs/exec.c| 93 
  include/linux/kernel_read_file.h | 17 ++
  2 files changed, 87 insertions(+), 23 deletions(-)

diff --git a/fs/exec.c b/fs/exec.c
index 4ea87db5e4d5..e6a8a65f7478 100644
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -928,10 +928,14 @@ struct file *open_exec(const char *name)
  }
  EXPORT_SYMBOL(open_exec);
  
-int kernel_read_file(struct file *file, void **buf, loff_t *size,

-loff_t max_size, enum kernel_read_file_id id)
-{
-   loff_t i_size, pos;
+int kernel_pread_file(struct file *file, void **buf, loff_t *size,
+ loff_t max_size, loff_t pos,
+ enum kernel_read_file_id id)
+{
+   loff_t alloc_size;
+   loff_t buf_pos;
+   loff_t read_end;
+   loff_t i_size;
ssize_t bytes = 0;
int ret;
  
@@ -951,21 +955,32 @@ int kernel_read_file(struct file *file, void **buf, loff_t *size,

ret = -EINVAL;
goto out;
}
-   if (i_size > SIZE_MAX || (max_size > 0 && i_size > max_size)) {
+
+   /* Default read to end of file */
+   read_end = i_size;
+
+   /* Allow reading partial portion of file */
+   if ((id == READING_FIRMWARE_PARTIAL_READ) &&
+   (i_size > (pos + max_size)))
+   read_end = pos + max_size;

There's no need to involve "id" here. There are other signals about
what's happening (i.e. pos != 0, max_size != i_size, etc).

There are other signals other than the fact that kernel_read_file requires
the entire file to be read while kernel_pread_file allows partial files 
to be read.
So if you do a pread at pos = 0 you need another key to indicate it is 
"ok" if max_size < i_size.
If id == READING_FIRMWARE_PARTIAL_READ is removed (and we want to share 
99% of the code
between kernel_read_file and kernel_pread_file then I need to add 
another parameter to a common function
called between these functions.  And adding another parameter was 
rejected previously in the review as a "swiss army knife approach" by 
another reviewer.  I am happy to add it back in because it is necessary 
to share code and differentiate whether we are performing a partial read 
or not.



+
+   alloc_size = read_end - pos;
+   if (i_size > SIZE_MAX || (max_size > 0 && alloc_size > max_size)) {
ret = -EFBIG;
goto out;
}
  
-	if (id != READING_FIRMWARE_PREALLOC_BUFFER)

-   *buf = vmalloc(i_size);
+   if ((id != READING_FIRMWARE_PARTIAL_READ) &&
+   (id != READING_FIRMWARE_PREALLOC_BUFFER))
+   *buf = vmalloc(alloc_size);
if (!*buf) {
ret = -ENOMEM;
goto out;
}

The id usage here was a mistake in upstream, and the series I sent is
trying to clean that up.
I see that cleanup and it works fine with the pread.  Other than I need 
some sort of key to share code and indicate whether it is "ok" to do a 
partial read of the file or not.


Greg, it seems this series is going to end up in your tree due to it
being drivers/misc? I guess I need to direct my series to Greg then, but
get LSM folks Acks.

  
-	pos = 0;

-   while (pos < i_size) {
-   bytes = kernel_read(file, *buf + pos, i_size - pos, );
+   buf_pos = 0;
+   while (pos < read_end) {
+   bytes = kernel_read(file, *buf + buf_pos, read_end - pos, );
if (bytes < 0) {
ret = bytes;
goto out_free;
@@ -973,20 +988,23 @@ int kernel_read_file(struct file *file, void **buf, 
loff_t *size,
  
  		if (bytes == 0)

break;
+
+   buf_pos += bytes;
}
  
-	if (pos != i_size) {

+   if (pos != read_end) {
ret = -EIO;
goto out_free;
}
  
-	ret = security_kernel_post_read_file(file, *buf, i_size, id);

+   ret = security_kernel_post_read_file(file, *buf, alloc_size, id);
if (!ret)
*size = pos;

This call cannot be inside kernel_pread_file(): any future LSMs will see
a moving window of contents, etc. It'll need to be in kernel_read_file()
proper.
If IMA still passes (after testing my next patch series with your 
changes and my modifications)

I will need some more help here.


  
  out_free:

if (ret < 0) {
-   if (id != READING_FIRMWARE_PREALLOC_BUFFER) {
+   if ((id != READING_FIRMWARE_PARTIAL_READ) &&
+   (id != READING_FIRMWARE_PREALLOC_BUFFER)) {
vfree(*buf);
*buf = NULL;
}
@@ -996,10 +1014,18 @@ int kernel_read_file(struct file *file, void **buf, 
loff_t *size,
  

linux-next: build failure after merge of the security tree

2020-07-07 Thread Stephen Rothwell
Hi all,

After merging the security tree, today's linux-next build (powerpc
ppc64_defconfig) failed like this:

fs/anon_inodes.c: In function 'anon_inode_make_secure_inode':
fs/anon_inodes.c:70:10: error: implicit declaration of function 
'security_inode_init_security_anon'; did you mean 
'security_inode_init_security'? [-Werror=implicit-function-declaration]
   70 |  error = security_inode_init_security_anon(
  |  ^
  |  security_inode_init_security

Caused by commit

  2749d3f84a70 ("Add a new LSM-supporting anonymous inode interface")

# CONFIG_SECURITY is not set

Also, the explicit include of linux/security.h is missing ...

I have added the following patch for today.

From b2bae25c9b715e06f7e802ec7b51cfbfec046e6c Mon Sep 17 00:00:00 2001
From: Stephen Rothwell 
Date: Wed, 8 Jul 2020 13:43:01 +1000
Subject: [PATCH] fix up for "Add a new LSM-supporting anonymous inode interface"

Signed-off-by: Stephen Rothwell 
---
 fs/anon_inodes.c | 1 +
 include/linux/security.h | 7 +++
 2 files changed, 8 insertions(+)

diff --git a/fs/anon_inodes.c b/fs/anon_inodes.c
index f87f221167cf..25d92c64411e 100644
--- a/fs/anon_inodes.c
+++ b/fs/anon_inodes.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
diff --git a/include/linux/security.h b/include/linux/security.h
index 95c133a8f8bb..7c6b3dcf4721 100644
--- a/include/linux/security.h
+++ b/include/linux/security.h
@@ -735,6 +735,13 @@ static inline int security_inode_init_security(struct 
inode *inode,
return 0;
 }
 
+static inline int security_inode_init_security_anon(struct inode *inode,
+   const struct qstr *name,
+   const struct inode 
*context_inode)
+{
+   return 0;
+}
+
 static inline int security_old_inode_init_security(struct inode *inode,
   struct inode *dir,
   const struct qstr *qstr,
-- 
2.27.0

-- 
Cheers,
Stephen Rothwell


pgpIn_hpNJfJi.pgp
Description: OpenPGP digital signature


[PATCH v5] f2fs: add F2FS_IOC_SEC_TRIM_FILE ioctl

2020-07-07 Thread Daeho Jeong
From: Daeho Jeong 

Added a new ioctl to send discard commands or/and zero out
to selected data area of a regular file for security reason.

Signed-off-by: Daeho Jeong 
Reviewed-by: Chao Yu 
Signed-off-by: Jaegeuk Kim 
---
 fs/f2fs/f2fs.h |  15 
 fs/f2fs/file.c | 181 +
 2 files changed, 196 insertions(+)

diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index b35a50f4953c..917fb2f63cd7 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -434,6 +434,8 @@ static inline bool __has_cursum_space(struct f2fs_journal 
*journal,
_IOR(F2FS_IOCTL_MAGIC, 18, __u64)
 #define F2FS_IOC_RESERVE_COMPRESS_BLOCKS   \
_IOR(F2FS_IOCTL_MAGIC, 19, __u64)
+#define F2FS_IOC_SEC_TRIM_FILE _IOW(F2FS_IOCTL_MAGIC, 20,  \
+   struct f2fs_sectrim_range)
 
 #define F2FS_IOC_GET_VOLUME_NAME   FS_IOC_GETFSLABEL
 #define F2FS_IOC_SET_VOLUME_NAME   FS_IOC_SETFSLABEL
@@ -453,6 +455,13 @@ static inline bool __has_cursum_space(struct f2fs_journal 
*journal,
 #define F2FS_GOING_DOWN_METAFLUSH  0x3 /* going down with meta flush */
 #define F2FS_GOING_DOWN_NEED_FSCK  0x4 /* going down to trigger fsck */
 
+/*
+ * Flags used by F2FS_IOC_SEC_TRIM_FILE
+ */
+#define F2FS_TRIM_FILE_DISCARD 0x1 /* send discard command */
+#define F2FS_TRIM_FILE_ZEROOUT 0x2 /* zero out */
+#define F2FS_TRIM_FILE_MASK0x3
+
 #if defined(__KERNEL__) && defined(CONFIG_COMPAT)
 /*
  * ioctl commands in 32 bit emulation
@@ -488,6 +497,12 @@ struct f2fs_flush_device {
u32 segments;   /* # of segments to flush */
 };
 
+struct f2fs_sectrim_range {
+   u64 start;
+   u64 len;
+   u64 flags;
+};
+
 /* for inline stuff */
 #define DEF_INLINE_RESERVED_SIZE   1
 static inline int get_extra_isize(struct inode *inode);
diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
index 98721f9bef25..41d057ffa8c3 100644
--- a/fs/f2fs/file.c
+++ b/fs/f2fs/file.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "f2fs.h"
 #include "node.h"
@@ -3754,6 +3755,183 @@ static int f2fs_reserve_compress_blocks(struct file 
*filp, unsigned long arg)
return ret;
 }
 
+static int f2fs_secure_erase(struct block_device *bdev, block_t block,
+   block_t len, u32 flags)
+{
+   struct request_queue *q = bdev_get_queue(bdev);
+   sector_t sector = SECTOR_FROM_BLOCK(block);
+   sector_t nr_sects = SECTOR_FROM_BLOCK(len);
+   int ret = 0;
+
+   if (!q)
+   return -ENXIO;
+
+   if (flags & F2FS_TRIM_FILE_DISCARD)
+   ret = blkdev_issue_discard(bdev, sector, nr_sects, GFP_NOFS,
+   blk_queue_secure_erase(q) ?
+   BLKDEV_DISCARD_SECURE : 0);
+
+   if (!ret && (flags & F2FS_TRIM_FILE_ZEROOUT))
+   ret = blkdev_issue_zeroout(bdev, sector, nr_sects, GFP_NOFS, 0);
+
+   return ret;
+}
+
+static int f2fs_sec_trim_file(struct file *filp, unsigned long arg)
+{
+   struct inode *inode = file_inode(filp);
+   struct f2fs_sb_info *sbi = F2FS_I_SB(inode);
+   struct address_space *mapping = inode->i_mapping;
+   struct block_device *prev_bdev = NULL;
+   struct f2fs_sectrim_range range;
+   pgoff_t index, pg_end;
+   block_t prev_block = 0, len = 0;
+   loff_t end_addr;
+   bool to_end;
+   int ret = 0;
+
+   if (!(filp->f_mode & FMODE_WRITE))
+   return -EBADF;
+
+   if (copy_from_user(, (struct f2fs_sectrim_range __user *)arg,
+   sizeof(range)))
+   return -EFAULT;
+
+   if (range.flags == 0 || (range.flags & ~F2FS_TRIM_FILE_MASK) ||
+   !S_ISREG(inode->i_mode))
+   return -EINVAL;
+
+   if ((range.flags & F2FS_TRIM_FILE_DISCARD) &&
+   !f2fs_hw_support_discard(sbi))
+   return -EOPNOTSUPP;
+
+   file_start_write(filp);
+   inode_lock(inode);
+
+   if (f2fs_is_atomic_file(inode) || f2fs_compressed_file(inode)) {
+   ret = -EINVAL;
+   goto err;
+   }
+
+   if (range.start >= inode->i_size) {
+   ret = -EINVAL;
+   goto err;
+   }
+
+   if (inode->i_size - range.start < range.len) {
+   ret = -E2BIG;
+   goto err;
+   }
+   end_addr = range.start + range.len;
+
+   to_end = (end_addr == inode->i_size);
+   if (!IS_ALIGNED(range.start, F2FS_BLKSIZE) ||
+   (!to_end && !IS_ALIGNED(end_addr, F2FS_BLKSIZE))) {
+   ret = -EINVAL;
+   goto err;
+   }
+
+   index = F2FS_BYTES_TO_BLK(range.start);
+   pg_end = DIV_ROUND_UP(end_addr, F2FS_BLKSIZE);
+
+   ret = 

Re: [PATCH v2 1/3] arm64/numa: export memory_add_physaddr_to_nid as EXPORT_SYMBOL_GPL

2020-07-07 Thread Dan Williams
On Tue, Jul 7, 2020 at 7:20 PM Justin He  wrote:
>
> Hi Michal and David
>
> > -Original Message-
> > From: Michal Hocko 
> > Sent: Tuesday, July 7, 2020 7:55 PM
> > To: Justin He 
> > Cc: Catalin Marinas ; Will Deacon
> > ; Dan Williams ; Vishal Verma
> > ; Dave Jiang ; Andrew
> > Morton ; Mike Rapoport ;
> > Baoquan He ; Chuhong Yuan ; linux-
> > arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> > m...@kvack.org; linux-nvd...@lists.01.org; Kaly Xin 
> > Subject: Re: [PATCH v2 1/3] arm64/numa: export memory_add_physaddr_to_nid
> > as EXPORT_SYMBOL_GPL
> >
> > On Tue 07-07-20 13:59:15, Jia He wrote:
> > > This exports memory_add_physaddr_to_nid() for module driver to use.
> > >
> > > memory_add_physaddr_to_nid() is a fallback option to get the nid in case
> > > NUMA_NO_NID is detected.
> > >
> > > Suggested-by: David Hildenbrand 
> > > Signed-off-by: Jia He 
> > > ---
> > >  arch/arm64/mm/numa.c | 5 +++--
> > >  1 file changed, 3 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/arch/arm64/mm/numa.c b/arch/arm64/mm/numa.c
> > > index aafcee3e3f7e..7eeb31740248 100644
> > > --- a/arch/arm64/mm/numa.c
> > > +++ b/arch/arm64/mm/numa.c
> > > @@ -464,10 +464,11 @@ void __init arm64_numa_init(void)
> > >
> > >  /*
> > >   * We hope that we will be hotplugging memory on nodes we already know
> > about,
> > > - * such that acpi_get_node() succeeds and we never fall back to this...
> > > + * such that acpi_get_node() succeeds. But when SRAT is not present,
> > the node
> > > + * id may be probed as NUMA_NO_NODE by acpi, Here provide a fallback
> > option.
> > >   */
> > >  int memory_add_physaddr_to_nid(u64 addr)
> > >  {
> > > -   pr_warn("Unknown node for memory at 0x%llx, assuming node 0\n",
> > addr);
> > > return 0;
> > >  }
> > > +EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
> >
> > Does it make sense to export a noop function? Wouldn't make more sense
> > to simply make it static inline somewhere in a header? I haven't checked
> > whether there is an easy way to do that sanely bu this just hit my eyes.
>
> Okay, I can make a change in memory_hotplug.h, sth like:
> --- a/include/linux/memory_hotplug.h
> +++ b/include/linux/memory_hotplug.h
> @@ -149,13 +149,13 @@ int add_pages(int nid, unsigned long start_pfn, 
> unsigned long nr_pages,
>   struct mhp_params *params);
>  #endif /* ARCH_HAS_ADD_PAGES */
>
> -#ifdef CONFIG_NUMA
> -extern int memory_add_physaddr_to_nid(u64 start);
> -#else
> +#if !defined(CONFIG_NUMA) || !defined(memory_add_physaddr_to_nid)
>  static inline int memory_add_physaddr_to_nid(u64 start)
>  {
> return 0;
>  }
> +#else
> +extern int memory_add_physaddr_to_nid(u64 start);
>  #endif
>
> And then check the memory_add_physaddr_to_nid() helper on all arches,
> if it is noop(return 0), I can simply remove it.
> if it is not noop, after the helper,
> #define memory_add_physaddr_to_nid
>
> What do you think of this proposal?

Especially for architectures that use memblock info for numa info
(which seems to be everyone except x86) why not implement a generic
memory_add_physaddr_to_nid() that does:

int memory_add_physaddr_to_nid(u64 addr)
{
unsigned long start_pfn, end_pfn, pfn = PHYS_PFN(addr);
int nid;

for_each_online_node(nid) {
get_pfn_range_for_nid(nid, _pfn, _pfn);
if (pfn >= start_pfn && pfn <= end_pfn)
return nid;
}
return NUMA_NO_NODE;
}


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