On Fri, Jul 10, 2020 at 08:51:56AM -0700, Kees Cook wrote:
> On Fri, Jul 10, 2020 at 07:32:57PM +0900, Masami Hiramatsu wrote:
> > On Fri, 10 Jul 2020 02:45:19 +0300
> > Jarkko Sakkinen wrote:
> > > +#ifdef CONFIG_MODULES
> > > /* Lock modules while optimizing kprobes */
> > >
On Fri, Jul 10, 2020 at 09:22:43AM -0400, Steven Rostedt wrote:
> On Fri, 10 Jul 2020 22:18:02 +0900
> Masami Hiramatsu wrote:
>
> >
> > Agreed. As far as I know, ftrace and bpf also depends on module_alloc(),
> > so text_alloc() will help them too.
> >
>
> Yes please.
>
>
On 05-07-20, 14:47, Sivaprakash Murugesan wrote:
> There were some problem in ipq8074 gen2 pcie phy init sequence, fix
Can you please describe these problems, it would help review to
understand the issues and also for future reference to you
> these to make gen2 pcie port on ipq8074 to work.
>
Excerpts from Pratik Rajesh Sampat's message of July 10, 2020 3:22 pm:
> POWER9 onwards the support for the registers HID1, HID4, HID5 has been
> receded.
> Although mfspr on the above registers worked in Power9, In Power10
> simulator is unrecognized. Moving their assignment under the
> check for
usb_free_coherent() is safe with NULL usb_pcwd->intr_buffer and
this check is not required.
Signed-off-by: Xu Wang
---
drivers/watchdog/pcwd_usb.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/watchdog/pcwd_usb.c b/drivers/watchdog/pcwd_usb.c
index
Excerpts from Pratik Rajesh Sampat's message of July 10, 2020 3:22 pm:
> Additional registers DAWR0, DAWRX0 may be lost on Power 10 for
> stop levels < 4.
> Therefore save the values of these SPRs before entering a "stop"
> state and restore their values on wakeup.
Hmm, where do you get this
On Fri, Jul 10, 2020 at 03:04:29PM +0200, Christoph Hellwig wrote:
> On Fri, Jul 10, 2020 at 01:32:38PM +0200, Peter Zijlstra wrote:
> > On Fri, Jul 10, 2020 at 07:32:57PM +0900, Masami Hiramatsu wrote:
> > > > - page = module_alloc(PAGE_SIZE);
> > > > + page = vmalloc(PAGE_SIZE);
> >
On 19-06-20, 12:00, Álvaro Fernández Rojas wrote:
> Add BCM63xx USBH PHY driver for BMIPS.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v5: use devm_reset_control_get_exclusive.
> v4: several improvements:
> - Use devm_platform_ioremap_resource.
> - Code cleanups.
> - Improve device
On Fri, Jul 10, 2020 at 01:32:38PM +0200, Peter Zijlstra wrote:
> On Fri, Jul 10, 2020 at 07:32:57PM +0900, Masami Hiramatsu wrote:
> > > - page = module_alloc(PAGE_SIZE);
> > > + page = vmalloc(PAGE_SIZE);
> >
> > No, you can not use vmalloc here. The reason why we use module_alloc()
> > is to
v5 -> v6: tested the rebase to v5.8-rc2 based for-next
.../devicetree/bindings/leds/leds-pwm.txt | 2 +
drivers/leds/leds-pwm.c| 54 +++---
2 files changed, 50 insertions(+), 6 deletions(-)
Message-Id:
Add hw monitor volume control for POD HD500. The same change may
work for HD500X but I don't have it to test.
Signed-off-by: Vasily Khoruzhick
---
v3: - use EXPORT_SYMBOL_GPL instead of EXPORT_SYMBOL
- use GFP_KERNEL instead of GFP_ATOMIC for allocating a message
- use lower case for
On Fri, 10 Jul 2020 at 17:15, Alexander Tsoy wrote:
>
> You've probably hit this bug:
> https://bugzilla.kernel.org/show_bug.cgi?id=208353
>
The issue already not reproduced at least on commit git 0bddd227f3dc
--
Best Regards,
Mike Gavrilov.
The default-state is now supported for PWM leds.
Signed-off-by: Denis Osterland-Heim
Acked-by: Jacek Anaszewski
Acked-by: Pavel Machek
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/leds/leds-pwm.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git
This patch adds support for "default-state" devicetree property, which
allows to defer pwm init to first use of led.
This allows to configure the PWM early in bootloader to let the LED
blink until an application in Linux userspace sets something different.
Signed-off-by: Denis Osterland-Heim
On Mon, Jul 13, 2020 at 01:59:59PM +0900, Benjamin Poirier wrote:
> On 2020-07-11 18:16 +0530, Suraj Upadhyay wrote:
> > The legacy API wrappers in include/linux/pci-dma-compat.h
> > should go away as it creates unnecessary midlayering
> > for include/linux/dma-mapping.h APIs, instead use
On Mon, Jul 13, 2020 at 2:06 AM Matthias Brugger wrote:
>
>
>
> On 11/07/2020 08:48, Yong Wu wrote:
> > Put all the macros about smi larb/port togethers, this is a preparing
> > patch for extending LARB_NR and adding new dom-id support.
> >
> > Signed-off-by: Yong Wu
> > ---
> >
On Fri, Jul 10, 2020 at 07:32:57PM +0900, Masami Hiramatsu wrote:
> Hi Jarkko,
>
> On Fri, 10 Jul 2020 02:45:19 +0300
> Jarkko Sakkinen wrote:
>
> > Remove MODULES dependency and migrate from module_alloc to vmalloc().
> > According to Andi, the history with this dependency is that kprobes
> >
On 02-07-20, 08:09, Wan Ahmad Zainie wrote:
> Add support for eMMC PHY on Intel Keem Bay SoC.
>
> Signed-off-by: Wan Ahmad Zainie
> ---
> drivers/phy/intel/Kconfig| 12 +
> drivers/phy/intel/Makefile | 1 +
> drivers/phy/intel/phy-keembay-emmc.c | 314
On Sat, Jul 11, 2020 at 2:50 PM Yong Wu wrote:
>
> This patch adds decriptions for mt8192 IOMMU and SMI.
>
> mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> table format. The M4U-SMI HW diagram is as below:
>
> EMI
>
On 15-06-20, 22:53, Ansuel Smith wrote:
> @@ -0,0 +1,593 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/* Copyright (c) 2014-2015, Code Aurora Forum. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU
When we enter into fadump crash path via system reset we fail to update
the pstore.
On the system reset path we first update the pstore then we go for fadump
crash. But the problem here is when all the CPUs try to get the pstore
lock to initiate the pstore write, only one CPUs will acquire the
Hi all,
Today's linux-next merge of the tty tree got a conflict in:
drivers/video/fbdev/core/fbcon.c
between commit:
fcf918b96662 ("fbcon: Use array3_size() helper in scr_memcpyw()")
from the drm-misc tree and commit:
28bc24fc46f9 ("vc: separate state")
from the tty tree.
I fixed it
On Mon, 2020-07-13 at 10:56 +0800, Shawn Guo wrote:
> On Mon, Jun 29, 2020 at 01:49:27PM +0200, Bruno Thomsen wrote:
> > Add myself as reviewer of device trees for Kamstrup
> > Concentrators.
> >
> > Signed-off-by: Bruno Thomsen
> > ---
> > MAINTAINERS | 5 +
> > 1 file changed, 5
On 12/7/2020 12:44 pm, Chris Ruehl wrote:
Add support for DTS bindings for the sensirion shtc1,shtw1 and shtc3.
Signed-off-by: Chris Ruehl
Reviewed-by: Guenter Roeck
Received new PCBA from the factory today, with the chip installed.
Probe working, the measurement of temperature and
Excerpts from Pratik Rajesh Sampat's message of July 10, 2020 3:22 pm:
> Changelog v1 --> v2:
> 1. Save-restore DAWR and DAWRX unconditionally as they are lost in
> shallow idle states too
> 2. Rename pnv_first_spr_loss_level to pnv_first_fullstate_loss_level to
> correct naming terminology
>
>
Hi Yoshihiro,
On 09-07-20, 19:36, Yoshihiro Shimoda wrote:
> If CONFIG_DEBUG_SHIRQ was enabled, r8a77951-salvator-xs could boot
> correctly. If we appended "earlycon keep_bootcon" to the kernel
> command like, we could get kernel log like below.
>
> SError Interrupt on CPU0, code 0xbf02
On Mon, Jul 6, 2020 at 4:47 AM Maxime Ripard wrote:
>
> Hi,
>
> On Sun, Jul 05, 2020 at 12:51:10PM -0700, Vasily Khoruzhick wrote:
> > Pinebook has an RTL8723CS WiFi + BT chip, BT is connected to UART1
> > and uses PL5 as device wake GPIO, PL6 as host wake GPIO the I2C
> > controlling signals are
On 08-07-20, 15:38, Marek Szyprowski wrote:
> PHY calibration is needed only for USB2.0 (UTMI) PHY, so skip calling
> calibration code when phy_calibrate() is called for USB3.0 (PIPE3) PHY.
Applied, thanks
--
~Vinod
On 08-07-20, 17:57, Kunihiko Hayashi wrote:
> The usb3-hsphy for PXs3 SoC needs to accept 3 clocks like usb3-ssphy.
Applied, thanks
>
> Fixes: 134ab2845acb ("dt-bindings: phy: Convert UniPhier USB3-PHY conroller
> to json-schema")
> Signed-off-by: Kunihiko Hayashi
> ---
>
On 07-07-20, 17:22, Tiezhu Yang wrote:
> When CONFIG_ARCH_SUNXI is not set but CONFIG_COMPILE_TEST=y,
> CONFIG_HAVE_CLK=y, CONFIG_HAVE_LEGACY_CLK=y, there exists
> the following build errors with CONFIG_PHY_SUN6I_MIPI_DPHY=y:
>
> drivers/phy/allwinner/phy-sun6i-mipi-dphy.o: In function
On Mon, Jul 13, 2020 at 1:11 AM Sedat Dilek wrote:
>
> When using Clang's Integrated Assembler (LLVM_IAS=1) we fell over
> ClangBuiltLinux (CBL) issue #1043 where Jian Cai provided a fix.
>
Just FYI: Patch submitted by Jian.
- Sedat -
[1] https://lore.kernel.org/patchwork/patch/1271455/
[2]
On Tue, Jul 7, 2020 at 9:03 AM Marcel Holtmann wrote:
>
> Hi Vasily,
>
> > Some adapters (e.g. RTL8723CS) advertise that they have more than
> > 2 pages for local ext features, but they don't support any features
> > declared in these pages. RTL8723CS reports max_page = 2 and declares
> > support
On 01-07-20, 21:06, Liam Beguin wrote:
> From: Liam Beguin
>
> Start by reading the content of the VENDOR_SPECIFIC2 register and update
> each bit field based on device properties when defined.
>
> The use of bit masks prevents fields from overriding each other and
> enables users to clear bits
On Sun, 2020-07-12 at 13:02 +0100, Jonathan Cameron wrote:
> On Thu, 9 Jul 2020 17:21:56 +0200
> Artur Rojek wrote:
>
> > Introduce error checks for the clk_enable calls used in this driver.
> > As part of the changes, move clk_enable/clk_disable calls out of
> > ingenic_adc_set_config and into
On Tue, Jul 7, 2020 at 9:01 AM Marcel Holtmann wrote:
>
> Hi Vasily,
>
> > The Realtek RTL8723CS is SDIO WiFi chip. It also contains a Bluetooth
> > module which is connected via UART to the host.
> >
> > It shares lmp subversion with 8703B, so Realtek's userspace
> > initialization tool
On 30-06-20, 17:59, Kunihiko Hayashi wrote:
> +++ b/drivers/phy/socionext/phy-uniphier-ahci.c
> @@ -0,0 +1,335 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * phy-uniphier-ahci.c - PHY driver for UniPhier AHCI controller
> + * Copyright 2016-2018, Socionext Inc.
we are in 2020 now!
>
On Fri, Jul 10, 2020 at 12:49:10PM +0200, Peter Zijlstra wrote:
> On Fri, Jul 10, 2020 at 01:36:38PM +0300, Jarkko Sakkinen wrote:
> > Just so that I know (and learn), what did exactly disable optprobes?
>
> So regular, old-skool style kprobe is:
>
> - copy original instruction out
> -
Error recovery can be invoked from multiple paths, including hibern8
enter/exit, some vendor vops, ufshcd_eh_host_reset_handler(), resume and
eh_work scheduled from IRQ context. Ultimately, these paths are trying to
invoke ufshcd_reset_and_restore(), in either sync or async manner.
Having both
Dumping testbus registers needs to sleep a bit intermittently as there are
too many of them. Skip them for those contexts where sleep is not allowed.
Meanwhile, if ufs_qcom_dump_dbg_regs() calls ufs_qcom_testbus_config() from
ufshcd_suspend/resume and/or clk gate/ungate context,
Clock gating features can be turned on/off selectively which means its
state information is only important if it is enabled. This change makes
sure that we only look at state of clk-gating if it is enabled.
Signed-off-by: Can Guo
---
drivers/scsi/ufs/ufshcd.c | 17 ++---
1 file
The scsi_block_reqs_cnt increased in ufshcd_hold() is supposed to be
decreased back in ufshcd_ungate_work() in a paired way. However, if
specific ufshcd_hold/release sequences are met, it is possible that
scsi_block_reqs_cnt is increased twice but only one ungate work is
queued. To make sure
On 2020-07-11 18:16 +0530, Suraj Upadhyay wrote:
> The legacy API wrappers in include/linux/pci-dma-compat.h
> should go away as it creates unnecessary midlayering
> for include/linux/dma-mapping.h APIs, instead use dma-mapping.h
> APIs directly.
>
> The patch has been generated with the
On 09/07/2020 01:24, Christoph Hellwig wrote:
> Several IOMMU drivers have a bypass mode where they can use a direct
> mapping if the devices DMA mask is large enough. Add generic support
> to the core dma-mapping code to do that to switch those drivers to
> a common solution.
>
>
On 30-06-20, 17:59, Kunihiko Hayashi wrote:
> Add DT bindings for PHY interface built into ahci controller implemented
> in UniPhier SoCs.
Rob ?
>
> Signed-off-by: Kunihiko Hayashi
> ---
> .../bindings/phy/socionext,uniphier-ahci-phy.yaml | 76
> ++
> 1 file changed, 76
Excerpts from Peter Zijlstra's message of July 10, 2020 7:35 pm:
> On Fri, Jul 10, 2020 at 11:56:46AM +1000, Nicholas Piggin wrote:
>> On big systems, the mm refcount can become highly contented when doing
>> a lot of context switching with threaded applications (particularly
>> switching between
Hi Tetsuhiro,
> Retain ActiveFat, MediaFailure and ClearToZero fields.
> And, never clear VolumeDirty, if it is dirty at mount.
>
> In '3.1.13.3 Media Failure Field' of exfat specification says ...
> If, upon mounting a volume, the value of this field is 1, implementations
> which scan the
Hi all,
Today's linux-next merge of the kvms390 tree got a conflict in:
include/uapi/linux/kvm.h
between commit:
1aa561b1a4c0 ("kvm: x86: Add "last CPU" to some KVM_EXIT information")
from the kvm tree and commit:
23a60f834406 ("s390/kvm: diagnose 0x318 sync and reset")
from the
The wlan firmware memory is statically mapped in
the Trusted Firmware, hence the wlan driver does
not need to map/unmap this region dynamically.
Hence add the property to indicate the wlan driver
to not map/unamp the firmware memory region
dynamically.
Also add the chain1 voltage supply for
Excerpts from Andy Lutomirski's message of July 11, 2020 3:04 am:
> On Thu, Jul 9, 2020 at 6:57 PM Nicholas Piggin wrote:
>>
>> And get rid of the generic sync_core_before_usermode facility.
>>
>> This helper is the wrong way around I think. The idea that membarrier
>> state requires a core sync
This patch implements the basic functions of the BMC chip for some Intel
FPGA PCIe Acceleration Cards (PAC). The BMC is implemented using the
intel max10 CPLD.
This BMC chip is connected to FPGA by a SPI bus. To provide reliable
register access from FPGA, an Avalon Memory-Mapped (Avmm)
Hi all,
Today's linux-next merge of the kvm-arm tree got a conflict in:
arch/arm64/kvm/mmu.c
between commit:
c1a33aebe91d ("KVM: arm64: Use common KVM implementation of MMU memory
caches")
from the kvm tree and commit:
a0e50aa3f4a8 ("KVM: arm64: Factor out stage 2 page table data from
From: Matthew Gerlach
This patch works around a bug in the SPI Slave to Avalon Master bridge.
The SPI slave will send an unexpected extra SOP in the following case.
One in approximately one million read requests results in an apparant
stall on the avalon bus where the SPI slave inserts IDLE
Hi all,
Today's linux-next merge of the kvm-arm tree got conflicts in:
arch/arm64/include/asm/kvm_coproc.h
arch/arm64/kvm/handle_exit.c
between commit:
74cc7e0c35c1 ("KVM: arm64: clean up redundant 'kvm_run' parameters")
from the kvm tree and commits:
6b33e0d64f85 ("KVM: arm64: Drop
This patchset add basic functions for Intel Max10 BMC chip.
Patch #1 implements the main feature.
Patch #2 is a fix for the HW issue lies in the "SPI Slave to Avalon Master
bridge" IP block, which is used for communication between host and the BMC
chip.
Matthew Gerlach (1):
mfd: intel-m10-bmc:
The usage of "capture group (...)" in the immediate condition after `&&`
results in `$1` being uninitialized. This issues a warning "Use of
uninitialized value $1 in regexp compilation at ./scripts/checkpatch.pl
line 2638".
I noticed this bug while running checkpatch on the set of commits from
Hi Mauro,
On 09-07-20, 13:11, Mauro Carvalho Chehab wrote:
> Em Mon, 06 Jul 2020 06:30:01 -0700
> Joe Perches escreveu:
> >
> > $ git grep -i -w -P '\w*slave\w*' drivers | \
> > cut -f1,2 -d/ | uniq -c | sort -rn | head -20 | cat -n
> > 1 5683 drivers/net
> > 2 2118
Hi Dan,
On 08-07-20, 11:14, Dan Williams wrote:
> Linux maintains a coding-style and its own idiomatic set of terminology.
> Update the style guidelines to recommend replacements for the terms
> master/slave and blacklist/whitelist.
>
> Link:
>
On 7/12/20 9:02 PM, Stephen Rothwell wrote:
> Hi Randy,
>
> On Fri, 10 Jul 2020 10:40:29 -0700 Randy Dunlap wrote:
>>
>> on i386:
>>
>> In file included from
>> ../drivers/net/ethernet/mellanox/mlx5/core/en_main.c:49:0:
>> ../drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h: In
Excerpts from Waiman Long's message of July 13, 2020 9:05 am:
> On 7/12/20 1:34 PM, Peter Zijlstra wrote:
>> On Sat, Jul 11, 2020 at 02:21:28PM -0400, Waiman Long wrote:
>>> The previous patch enables native qspinlock to store lock holder cpu
>>> number into the lock word when the lock is acquired
On Sat, Jul 04, 2020 at 12:11:43AM +0200, Michael Walle wrote:
> Although the Kontron SMARC-sAL28 board is now supported, there is still
> missing driver support for the hardware clock, audio interface and audio
> codec. Let's enable them as modules (where possible).
>
> Signed-off-by: Michael
On Sat, Jul 11, 2020 at 08:29:12PM +0200, Andrew Lunn wrote:
> On Fri, Jul 10, 2020 at 02:08:51PM +0200, Oleksij Rempel wrote:
> > This patch support for cable test for the ksz886x switches and the
> > ksz8081 PHY.
> >
> > The patch was tested on a KSZ8873RLL switch with following results:
> >
>
On Sat, Jul 04, 2020 at 12:19:38AM +0800, Robin Gong wrote:
> Add pca9450 pmic driver.
>
> Signed-off-by: Robin Gong
Updated subject prefix like 'arm64: defconfig: ...' and applied patch.
Shawn
On Sat, Jul 04, 2020 at 12:19:37AM +0800, Robin Gong wrote:
> Add pca9450 pmic driver for i.mx8mn-evk board.
>
> Signed-off-by: Robin Gong
Applied, thanks.
On Fri, Jul 10, 2020 at 04:30:47PM +0800, Richard Zhu wrote:
> Enable SATA on iMX6QP SABREAUTO board.
>
> Signed-off-by: Richard Zhu
> Reviewed-by: Fabio Estevam
Applied both, thanks.
From: Qiwu Huang
Broadcast battery soc with decimal form.
soc_decimal is the decimal part of battery soc.
soc_decimal_rate is update frequency of decimal
part of battery soc.
We want to report such as 0.01 to 99.99% to
user space to improve user experience
when do very quick charging.
From: Qiwu Huang
reports wireless signal strength.
The value show degree of coupling between tx and rx.
Signed-off-by: Qiwu Huang
---
Documentation/ABI/testing/sysfs-class-power | 11 +++
drivers/power/supply/power_supply_sysfs.c | 1 +
include/linux/power_supply.h|
From: Qiwu Huang
Reports what type of wireless adapter connection is
currently active forthe supply.
for example it can show if ADAPTER_PD capable source is attached.
Signed-off-by: Qiwu Huang
---
Documentation/ABI/testing/sysfs-class-power | 11 +++
Hi Kees,
On Mon, Jul 13, 2020 at 10:40 AM Kees Cook wrote:
>
> On Fri, Jul 10, 2020 at 04:19:58PM +, guo...@kernel.org wrote:
> > From: Guo Ren
> >
> > This enables the use of per-task stack canary values if GCC has
> > support for emitting the stack canary reference relative to the
> >
From: Qiwu Huang
Reports the kind of quick charge type based on
different adapter power. UI will show different
animation effect for different quick charge type.
Signed-off-by: Qiwu Huang
---
Documentation/ABI/testing/sysfs-class-power | 10 ++
From: Qiwu Huang
Interface to control wireless reverse charge.
Supply reverse charge function when enabled.
Signed-off-by: Qiwu Huang
---
Documentation/ABI/testing/sysfs-class-power | 12
drivers/power/supply/power_supply_sysfs.c | 1 +
include/linux/power_supply.h
From: Guo Ren
TSK_STACK_CANARY only used in arm64/Makefile with
CONFIG_STACKPROTECTOR_PER_TASK wrap. So use the same policy in
asm-offset.c.
Signed-off-by: Guo Ren
Co-developed-by: Kees Cook
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/kernel/asm-offsets.c | 2 +-
1 file changed, 1
Hi Randy,
On Fri, 10 Jul 2020 10:40:29 -0700 Randy Dunlap wrote:
>
> on i386:
>
> In file included from
> ../drivers/net/ethernet/mellanox/mlx5/core/en_main.c:49:0:
> ../drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h: In function
> ‘mlx5e_accel_sk_get_rxq’:
>
On Sun, Jul 12, 2020 at 10:54:29PM -0400, Arvind Sankar wrote:
> On Sun, Jul 12, 2020 at 06:24:22PM -0700, Jian Cai wrote:
> > Clang's integrated assembler does not allow symbols with non-absolute
> > values to be reassigned. This patch allows the affected code to be
> > compatible with IAS.
> >
On 6/23/20 9:30 PM, Pratyush Yadav wrote:
> diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
> index 9a86cc27fcc0..93e255287ab9 100644
> --- a/drivers/spi/spi-mem.c
> +++ b/drivers/spi/spi-mem.c
> @@ -156,6 +156,9 @@ bool spi_mem_default_supports_op(struct spi_mem *mem,
>
On 7/12/2020 8:30 PM, Chunfeng Yun wrote:
> Use readl_poll_timeout() to poll register status
>
> Cc: Florian Fainelli
> Signed-off-by: Chunfeng Yun
> ---
> v2 changes, suggested by Stephen:
> 1. use unsigned int instead of int for @usec parameter
> 2. add dev_log() back
> 3. drop "Err"
On Sun, Jul 12, 2020 at 7:53 PM Joel Fernandes wrote:
>
> > But I do feel like you figured out why the bug happened, now we're
> > just discussing whether the patch is the right thing to do.
>
> Yes.
>
> > Maybe saying "doing the pmd copies for the initial stack isn't
> > important, so let's just
Hi Thomas,
Thanks for the review. My comments inline.
On 7/9/2020 3:54 PM, Langer, Thomas wrote:
-Original Message-
From: devicetree-ow...@vger.kernel.org On Behalf Of Amireddy Mallikarjuna reddy
Sent: Donnerstag, 9. Juli 2020 08:01
To: dmaeng...@vger.kernel.org; vk...@kernel.org;
On 2020/7/10 下午7:31, Michael S. Tsirkin wrote:
Page reporting features were never supported by legacy hypervisors.
Supporting them poses a problem: should we use native endian-ness (like
current code assumes)? Or little endian-ness like the virtio spec says?
Rather than try to figure out, and
On 2020/7/10 下午6:49, Michael S. Tsirkin wrote:
virtio_store_mb was built with split ring in mind so it accepts
__virtio16 arguments. Packed ring uses __le16 values, so sparse
complains. It's just a store with some barriers so let's convert it to
a macro, we don't loose too much type safety by
In case of error, the function platform_device_register_full()
returns ERR_PTR() and never returns NULL. The NULL test in the
return value check should be replaced with IS_ERR().
Signed-off-by: Xu Wang
---
drivers/fsi/fsi-occ.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Use readl_poll_timeout() to poll register status
Cc: Florian Fainelli
Signed-off-by: Chunfeng Yun
---
v2 changes, suggested by Stephen:
1. use unsigned int instead of int for @usec parameter
2. add dev_log() back
3. drop "Err" in error log
---
drivers/usb/gadget/udc/bdc/bdc_core.c | 26
On 2020/7/10 下午6:48, Michael S. Tsirkin wrote:
vhost/scsi doesn't handle type conversion correctly
for request type when using virtio 1.0 and up for BE,
or cross-endian platforms.
Fix it up using vhost_32_to_cpu.
Cc: sta...@vger.kernel.org
Signed-off-by: Michael S. Tsirkin
---
在 2020/7/11 14:37, Zhihao Cheng 写道:
在 2020/7/7 20:47, Richard Weinberger 写道:
- Ursprüngliche Mail -
Perhaps I misunderstood what commit 32fe905c17f001 ("ubifs: Fix
O_TMPFILE corner case in ubifs_link()") wanted to fix.
I think orphan area is used to remind filesystem don't forget to
On 2020/7/10 下午6:48, Michael S. Tsirkin wrote:
balloon uses virtio32_to_cpu instead of cpu_to_virtio32
to convert a native endian number to virtio.
No practical difference but makes sparse warn.
Fix it up.
Signed-off-by: Michael S. Tsirkin
---
drivers/virtio/virtio_balloon.c | 2 +-
1
On Wed, Jul 01, 2020 at 05:10:39PM -0500, Bjorn Helgaas wrote:
> From: Bjorn Helgaas
>
> No callers of imx_add_imx_dma() need an error IRQ, so they supply 0 as
> "irq_err", which means we register a resource of IRQ 0, which is invalid
> and causes a warning if used.
>
> Remove the "irq_err"
On 12-07-20, 11:06, Jon Hunter wrote:
> We always put the reference to BPMP device on exit of the Tegra186
> CPUFREQ driver and so there is no need to have separate exit paths
> for success and failure. Therefore, simplify the probe return path
> in the Tegra186 CPUFREQ driver by combining the
On 12-07-20, 11:06, Jon Hunter wrote:
> Commit 6cc3d0e9a097 ("cpufreq: tegra186: add
> CPUFREQ_NEED_INITIAL_FREQ_CHECK flag") fixed CPUFREQ support for
> Tegra186 but as a consequence the following warnings are now seen on
> boot ...
>
> cpufreq: cpufreq_online: CPU0: Running at unlisted freq: 0
On Wed, Jul 01, 2020 at 03:03:25PM +0200, Oleksij Rempel wrote:
> Oleksij Rempel (5):
> dt-bindings: arm: fsl: add different Protonic boards
> ARM: dts: add Protonic PRTI6Q board
> ARM: dts: add Protonic WD2 board
> ARM: dts: add Protonic VT7 board
> ARM: dts: add Protonic RVT board
This adds a specific description file for all arch page table helpers which
is in sync with the semantics being tested via CONFIG_DEBUG_VM_PGTABLE. All
future changes either to these descriptions here or the debug test should
always remain in sync.
Cc: Jonathan Corbet
Cc: Andrew Morton
Cc:
This adds debug print information that enlists all tests getting executed
on a given platform. With dynamic debug enabled, the following information
will be splashed during boot. For compactness purpose, dropped both time
stamp and prefix (i.e debug_vm_pgtable) from this sample output.
This adds new tests validating for these following arch advanced page table
helpers. These tests create and test specific mapping types at various page
table levels.
1. pxxp_set_wrprotect()
2. pxxp_get_and_clear()
3. pxxp_set_access_flags()
4. pxxp_get_and_clear_full()
5.
This adds new tests validating arch page table helpers for these following
core memory features. These tests create and test specific mapping types at
various page table levels.
1. SPECIAL mapping
2. PROTNONE mapping
3. DEVMAP mapping
4. SOFTDIRTY mapping
5. SWAP mapping
6. MIGRATION mapping
7.
This series adds some more arch page table helper validation tests which
are related to core and advanced memory functions. This also creates a
documentation, enlisting expected semantics for all page table helpers as
suggested by Mike Rapoport previously (https://lkml.org/lkml/2020/1/30/40).
On Wed, Jul 01, 2020 at 11:46:56AM +0800, Shengjiu Wang wrote:
> Add ASRC device node.
>
> Signed-off-by: Shengjiu Wang
Applied, thanks.
In case of error, the function clk_register() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check
should be replaced with IS_ERR().
Signed-off-by: Xu Wang
---
drivers/clk/sirf/clk-atlas6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Wed, Jul 8, 2020 at 4:50 PM Alexey Budankov
wrote:
>
>
> Implement functions of initialization, finalization and processing
> of control command messages coming from control file descriptors.
> Allocate control file descriptor as descriptor at struct pollfd
> object of evsel_list for atomic
HI Dmitry:
1. Could you please explain relationship between IC types and "pattern"?
--> There is no direct connection between IC_type and "pattern".
2. Can there be controllers with same IC type but different patterns?
--> Yes, same IC type might have different pattern, ir depends on the TP
On Thu, Jul 02, 2020 at 03:33:59AM +, Andy Tang wrote:
> Hi Shawn,
>
> Do you think it is ok if the cooling devices are shared between thermal zones?
Yeah, Amit has the authority on thermal support, so follow his
suggestion, I would say :)
Shawn
Hello,
On Wed, Jul 8, 2020 at 4:47 PM Alexey Budankov
wrote:
>
>
> Define and initialize control file descriptors.
>
> Signed-off-by: Alexey Budankov
> ---
> tools/perf/util/evlist.c | 3 +++
> tools/perf/util/evlist.h | 5 +
> 2 files changed, 8 insertions(+)
>
> diff --git
From: Daeho Jeong
Changed the way of handling range.len of F2FS_IOC_SEC_TRIM_FILE.
1. Added -1 value support for range.len to secure trim the whole blocks
starting from range.start regardless of i_size.
2. If the end of the range passes over the end of file, it means until
the end of
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