There is no need to calculate wildcard in each loop
since wildcard is not changed.
Signed-off-by: Yi Li
---
virt/kvm/eventfd.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/virt/kvm/eventfd.c b/virt/kvm/eventfd.c
index d6408bb497dc..c2323c27a28b 100644
---
David,
>
> Commit 12cc923f1ccc ("tasklet: Introduce new initialization API")'
> introduced a new tasklet initialization API. This series converts
> all the net/* drivers to use the new tasklet_setup() API
>
> Allen Pais (8):
> net: dccp: convert tasklets to use new tasklet_setup() API
> net:
Em Thu, 10 Sep 2020 10:42:50 -0600
Jonathan Corbet escreveu:
> On Wed, 9 Sep 2020 16:10:31 +0200
> Mauro Carvalho Chehab wrote:
>
> > Currently, there are several warnings/errors produced when building
> > the documentation with "make htmldocs".
> >
> > This series fixes almost all such
On 10-09-20, 09:02, Pierre-Louis Bossart wrote:
>
> > > > May be we could make the enumerated devices discovery bit more verbose!
> > >
> > > Maybe adding a device number sysfs entry would help, e.g. reporting
> > > NotAttched or a value in [0,11] would tell you if the device is actually
> > >
On Fri, Sep 11, 2020 at 12:14:19PM +0900, Chanwoo Choi wrote:
> On 9/10/20 12:01 AM, Krzysztof Kozlowski wrote:
> > The register addresses are not continuous, so use simple defines for
> > them. This also makes it easier to find the address for register.
> >
> > No functional change.
> >
> >
On Fri, Sep 11, 2020 at 12:47:03AM +0100, Matthew Wilcox (Oracle) wrote:
> Size the uptodate array dynamically to support larger pages in the
> page cache. With a 64kB page, we're only saving 8 bytes per page today,
> but with a 2MB maximum page size, we'd have to allocate more than 4kB
> per
On Fri, Sep 11, 2020 at 12:47:04AM +0100, Matthew Wilcox (Oracle) wrote:
> Instead of counting bio segments, count the number of bytes submitted.
> This insulates us from the block layer's definition of what a 'same page'
> is, which is not necessarily clear once THPs are involved.
>
>
On Wed, 9 Sep 2020 at 09:09, Ben Pai wrote:
>
> The Mowgli BMC is an ASPEED ast2500 based BMC that is part of an
> OpenPower Power9 server.
>
> Signed-off-by: Ben Pai
This looks good to me. I assume you have all the hardware correctly described.
I notice you don't have any gpio-line-names. If
On 10.09.20 18:55, Jan Kiszka wrote:
> On 10.09.20 18:53, Guenter Roeck wrote:
>> Hi Jan,
>>
>> On 9/10/20 9:34 AM, Jan Kiszka wrote:
>>> On 10.09.20 18:31, Guenter Roeck wrote:
On Family 17h (Ryzen) devices, the WatchdogTmrEn bit of PmDecodeEn not only
enables watchdog memory decoding
allyesconfig
powerpc allmodconfig
powerpc allnoconfig
powerpc defconfig
x86_64 randconfig-a004-20200910
x86_64 randconfig-a006-20200910
x86_64 randconfig-a003
This commit adds device tree binding reset constants for mmc controller
present on Actions S700 Soc.
Reviewed-by: Manivannan Sadhasivam
Acked-by: Rob Herring
Signed-off-by: Amit Singh Tomar
---
Changes since v6:
* No change.
Changes since v5:
* Added Mani's Reviewed-by: tag.
The commit adds a new SoC specific compatible string "actions,s700-mmc"
in combination with more generic string "actions,owl-mmc".
Placement order of these strings should abide by the principle of
"from most specific to most general".
Reviewed-by: Manivannan Sadhasivam
Reviewed-by: Rob Herring
Fix formating of struct description to avoid warning highlighted
by W=1 compilation.
warning: cannot understand function prototype: 'struct sti_mbox_device '
warning: cannot understand function prototype: 'struct sti_mbox_pdata '
warning: cannot understand function prototype: 'struct sti_channel
Hi Greg,
Here are some FSI changes for the 5.10 merge window.
The following changes since commit 4a851d714eadeabd65c7e321a2e7830f77d945c4:
fsi: aspeed: Support CFAM reset GPIO (2020-09-10 12:26:43 +0930)
are available in the Git repository at:
changes v2:
- fsl.yaml: reorder ply,plym2m
- imx6dl-plym2m.dts: use hyphen instead of underscore in phy-clock
Oleksij Rempel (3):
dt-bindings: vendor-prefixes: Add an entry for Plymovent
dt-bindings: arm: fsl: add Plymovent M2M board
ARM: dts: add Plymovent M2M board
Plymovent M2M is a control interface produced for the Plymovent filter
systems.
Signed-off-by: David Jander
Signed-off-by: Oleksij Rempel
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6dl-plym2m.dts | 394
2 files changed, 395 insertions(+)
Add Plymovent Group BV M2M iMX6dl based board
Signed-off-by: Oleksij Rempel
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml
b/Documentation/devicetree/bindings/arm/fsl.yaml
index
Add "ply" entry for Plymovent Group BV: https://www.plymovent.com/
Signed-off-by: Oleksij Rempel
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
On 11/09/2020 04:53, Paul E. McKenney wrote:
> On Wed, Sep 09, 2020 at 10:31:03PM +1000, Alexey Kardashevskiy wrote:
>>
>>
>> On 09/09/2020 21:50, Paul E. McKenney wrote:
>>> On Wed, Sep 09, 2020 at 07:24:11PM +1000, Alexey Kardashevskiy wrote:
On 09/09/2020 00:43, Alexey
Before the commit identified below, pages tables allocation was
performed after the allocation of final shadow area for linear memory.
But that commit switched the order, leading to page tables being
already allocated at the time 8xx kasan_init_shadow_8M() is called.
Due to this,
This patch tries to clarify the difference between hard_header_len and
needed_headroom by fixing an outdated comment and adding a WARN_ON_ONCE
warning for hard_header_len.
The difference between hard_header_len and needed_headroom as understood
by this patch is based on the following reasons:
1.
Hi Chunfeng,
> From: Chunfeng Yun, Sent: Friday, September 11, 2020 1:13 PM
>
> On Fri, 2020-09-11 at 03:13 +, Yoshihiro Shimoda wrote:
> > Hi Daniel, Chunfeng,
> >
> > > From: Chunfeng Yun, Sent: Friday, September 11, 2020 11:33 AM
> > >
> > > On Thu, 2020-09-10 at 14:12 +0100, Daniel
On Fri, 11 Sep 2020, at 13:33, Joel Stanley wrote:
> Hello,
>
> On Fri, 11 Sep 2020 at 03:46, Chia-Wei, Wang
> wrote:
> >
> > The LPC controller has no concept of the BMC and the Host partitions.
> > The incorrect partitioning can impose unnecessary range restrictions
> > on register access
On 2020/9/10 22:57, Lubomir Rintel wrote:
> On Thu, Sep 10, 2020 at 05:18:15PM +0800, Yuehaibing wrote:
>> On 2020/9/10 16:22, Lubomir Rintel wrote:
>>> On Thu, Sep 10, 2020 at 04:09:33PM +0800, YueHaibing wrote:
If CONFIG_PM is n, gcc warns:
Hi all,
On Wed, 2 Sep 2020 15:12:35 +1000 Stephen Rothwell
wrote:
>
> Today's linux-next merge of the scsi-mkp tree got a conflict in:
>
> drivers/scsi/aacraid/aachba.c
>
> between commit:
>
> df561f6688fe ("treewide: Use fallthrough pseudo-keyword")
>
> from Linus' tree and commit:
>
In exfat_move_file(), the identity of source and target directory has been
checked by the caller.
Also, it gets stream.start_clu from file dir-entry, which is an invalid
determination.
Signed-off-by: Tetsuhiro Kohada
---
fs/exfat/namei.c | 5 -
1 file changed, 5 deletions(-)
diff --git
Use structure assignment instead of memcpy.
Signed-off-by: Tetsuhiro Kohada
---
fs/exfat/dir.c | 7 ++-
fs/exfat/inode.c | 2 +-
fs/exfat/namei.c | 15 +++
3 files changed, 10 insertions(+), 14 deletions(-)
diff --git a/fs/exfat/dir.c b/fs/exfat/dir.c
index
There is nothing in directory just created, so there is no need to scan.
Signed-off-by: Tetsuhiro Kohada
---
fs/exfat/namei.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/fs/exfat/namei.c b/fs/exfat/namei.c
index b966b9120c9c..803748946ddb 100644
---
On Wed, Sep 02, 2020 at 01:28:17PM +0300, Atte Tommiska wrote:
> Xiphera XIP8001B is an FPGA-based True Random Number Generator
> Intellectual Property (IP) Core which can be instantiated in
> multiple FPGA families. This driver adds Linux support for it through
> the hwrng interface.
>
>
On Thu, Sep 10, 2020 at 08:18:01PM -0700, Alexei Starovoitov wrote:
> On Thu, Sep 10, 2020 at 1:20 PM wrote:
> >
> > From: "Paul E. McKenney"
> >
> > The various RCU tasks flavors currently wait 100 milliseconds between each
> > grace period in order to prevent CPU-bound loops and to favor
On Fri, Sep 04, 2020 at 01:25:27PM +0200, Nicolas Toromanoff wrote:
> If STM32 CRC device is already in use, calculate CRC by software.
>
> This will release CPU constraint for a concurrent access to the
> hardware, and avoid masking irqs during the whole block processing.
>
> Fixes:
On Thu, Sep 03, 2020 at 09:12:34PM +0800, Tianjia Zhang wrote:
>
> ---
> v6 changes:
> 1. remove mpi_sub_ui function from mpi library.
> 2. rebase on mainline.
This series is still missing acks for patches 6-8. Without them
it cannot proceed.
Thanks,
--
Email: Herbert Xu
Home Page:
As discussed in [1], KUnit tests have hitherto not had a particularly
consistent naming scheme. This adds documentation outlining how tests
and test suites should be named, including how those names should be
used in Kconfig entries and filenames.
[1]:
Update the B53 driver to support VLANs while not filtering. This
requires us to enable VLAN globally within the switch upon driver
initial configuration (dev->vlan_enabled).
We also need to remove the code that dealt with PVID re-configuration in
b53_vlan_filtering() since that function worked
On Thu, 2020-09-10 at 15:21 +0100, Robin Murphy wrote:
> On 2020-09-09 21:06, Joe Perches wrote:
> > fallthrough to a separate case/default label break; isn't very readable.
> >
> > Convert pseudo-keyword fallthrough; statements to a simple break; when
> > the next label is case or default and
The LPC register offsets are fixed to adapt to the LPC DTS change,
where the LPC partitioning is removed.
Signed-off-by: Chia-Wei, Wang
---
drivers/soc/aspeed/aspeed-lpc-ctrl.c | 6 +++---
drivers/soc/aspeed/aspeed-lpc-snoop.c | 11 +--
2 files changed, 8 insertions(+), 9 deletions(-)
The LPC controller has no concept of the BMC and the Host partitions.
The incorrect partitioning can impose unnecessary range restrictions
on register access through the syscon regmap interface.
For instance, HICRB contains the I/O port address configuration
of KCS channel 1/2. However, the
The LPC register offsets are fixed to adapt to the LPC DTS change,
where the LPC partitioning is removed.
Signed-off-by: Chia-Wei, Wang
---
drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
The LPC register offsets are fixed to adapt to the LPC DTS change,
where the LPC partitioning is removed.
Signed-off-by: Chia-Wei, Wang
---
drivers/char/ipmi/kcs_bmc_aspeed.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/char/ipmi/kcs_bmc_aspeed.c
The LPC controller has no concept of the BMC and the Host partitions.
A concrete instance is that the HICRB[5:4] are for the I/O port address
configurtaion of KCS channel 1/2. However, the KCS driver cannot access
HICRB for channel 1/2 initialization via syscon regmap interface due to
the
On Fri, 2020-09-11 at 03:13 +, Yoshihiro Shimoda wrote:
> Hi Daniel, Chunfeng,
>
> > From: Chunfeng Yun, Sent: Friday, September 11, 2020 11:33 AM
> >
> > On Thu, 2020-09-10 at 14:12 +0100, Daniel Thompson wrote:
> > > On Thu, Sep 10, 2020 at 04:21:45PM +0800, Chunfeng Yun wrote:
> > > > Use
On Thu, Sep 10, 2020 at 02:22:48PM +0200, Corentin Labbe wrote:
>
> I get some md5 error on both A20+BE:
> alg: ahash: md5 test failed (wrong result) on test vector \"random: psize=129
> ksize=0\", cfg=\"random: inplace use_finup nosimd
> src_divs=[85.99%@+3999, 5.85%@+30, 0.96%@+25,
>
Fixes coccicheck warning:
fs/nfsd/nfs4proc.c:3234:5-29: WARNING: Comparison to bool
Signed-off-by: Zheng Bin
---
fs/nfsd/nfs4proc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/nfsd/nfs4proc.c b/fs/nfsd/nfs4proc.c
index eaf50eafa935..63e5a4844d8c 100644
---
Hello,
On Fri, 11 Sep 2020 at 03:46, Chia-Wei, Wang
wrote:
>
> The LPC controller has no concept of the BMC and the Host partitions.
> The incorrect partitioning can impose unnecessary range restrictions
> on register access through the syscon regmap interface.
>
> For instance, HICRB contains
Fixes coccicheck warning:
fs/cifs/cifsacl.c:371:6-49: WARNING: Comparison to bool
Signed-off-by: Zheng Bin
---
fs/cifs/cifsacl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/cifs/cifsacl.c b/fs/cifs/cifsacl.c
index fcff14ef1c70..9447ff1a5b6a 100644
---
Fixes coccicheck warning:
fs/cifs/file.c:780:22-38: WARNING: Comparison to bool
Signed-off-by: Zheng Bin
---
fs/cifs/file.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/cifs/file.c b/fs/cifs/file.c
index be46fab4c96d..bad749f606d5 100644
--- a/fs/cifs/file.c
+++
Zheng Bin (5):
cifs: fix comparison to bool warning in cifsacl.c
cifs: fix comparison to bool warning in file.c
cifs: fix comparison to bool warning in smb2misc.c
cifs: fix comparison to bool warning in connect.c
cifs: fix comparison to bool warning in smb2ops.c
fs/cifs/cifsacl.c | 2
We found the following warning when using W=1 to build kernel:
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c:3634:6: warning: variable
‘ret’ set but not used [-Wunused-but-set-variable]
int ret, coe = priv->hw->rx_csum;
When digging stmmac_get_rx_header_len(), dwmac4_get_rx_header_len() and
Fixes coccicheck warning:
fs/cifs/connect.c:2478:5-16: WARNING: Comparison to bool
fs/cifs/connect.c:3560:10-35: WARNING: Comparison to bool
fs/cifs/connect.c:4297:6-21: WARNING: Comparison to bool
Signed-off-by: Zheng Bin
---
fs/cifs/connect.c | 6 +++---
1 file changed, 3 insertions(+), 3
Fixes coccicheck warning:
fs/cifs/smb2misc.c:416:5-51: WARNING: Comparison to bool
Signed-off-by: Zheng Bin
---
fs/cifs/smb2misc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/cifs/smb2misc.c b/fs/cifs/smb2misc.c
index d88e2683626e..0864cfa87834 100644
---
Fixes coccicheck warning:
fs/cifs/smb2ops.c:3199:6-15: WARNING: Comparison to bool
fs/cifs/smb2ops.c:3223:5-14: WARNING: Comparison to bool
fs/cifs/smb2ops.c:3301:6-15: WARNING: Comparison to bool
fs/cifs/smb2ops.c:3311:6-15: WARNING: Comparison to bool
fs/cifs/smb2ops.c:3341:6-15: WARNING:
On 2020/9/11 3:29, Jakub Kicinski wrote:
On Thu, 10 Sep 2020 10:42:45 +0800 Luo Jiaxing wrote:
Fixes the following warning when using W=1 to build kernel:
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c:3634:6: warning: variable
‘ret’ set but not used [-Wunused-but-set-variable]
int ret,
On 9/10/20 8:48 PM, Jie Deng wrote:
> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
> index 293e7a0..70c8e30 100644
> --- a/drivers/i2c/busses/Kconfig
> +++ b/drivers/i2c/busses/Kconfig
> @@ -21,6 +21,17 @@ config I2C_ALI1535
> This driver can also be built as a
On Fri, 11 Sep 2020, at 13:03, Joel Stanley wrote:
> On Fri, 11 Sep 2020 at 02:49, Andrew Jeffery wrote:
> >
> >
> >
> > On Fri, 11 Sep 2020, at 11:32, Joel Stanley wrote:
> > > On Thu, 10 Sep 2020 at 10:55, Andrew Jeffery wrote:
> > > >
> > > > Allow sample phase adjustment to deal with
Ping guys. Thanks.
On Mon, Sep 7, 2020 at 9:53 PM Muchun Song wrote:
>
> On Mon, Sep 7, 2020 at 7:24 PM Alexander Popov wrote:
> >
> > On 07.09.2020 05:54, Muchun Song wrote:
> > > Hi all,
> > >
> > > Any comments or suggestions? Thanks.
> > >
> > > On Fri, Aug 28, 2020 at 11:19 AM Muchun Song
On Fri, Sep 11, 2020 at 12:02 AM Shakeel Butt wrote:
>
> On Thu, Sep 10, 2020 at 1:46 AM Muchun Song wrote:
> >
> > In the cgroup v1, we have a numa_stat interface. This is useful for
> > providing visibility into the numa locality information within an
> > memcg since the pages are allowed to
Add an I2C bus driver for virtio para-virtualization.
The controller can be emulated by the backend driver in
any device model software by following the virtio protocol.
This driver communicates with the backend driver through a
virtio I2C message structure which includes following parts:
-
As per DP-1.3, First check DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT.
If DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT is 1, read the DP_DP13_DPCD_REV to
get the faster capability.
If DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT is 0, read DP_DPCD_REV.
Signed-off-by: Koba Ko
Reviewed-by: Lyude Paul
---
On 20:08 Thu 10 Sep 2020, Randy Dunlap wrote:
On 9/10/20 6:54 PM, Bhaskar Chowdhury wrote:
This patch extends the help section by adding an explicit example of use.
Signed-off-by: Bhaskar Chowdhury
---
Difference between versions goes here.
scripts/config | 17 +
1 file
Some MediaTek UFS platforms support high-performance mode that inline
encryption engine can be boosted while UFS is not clock-gated.
The high-performance mode will be enabled if all below conditions are
well-declaired in device tree,
1. Proper platform-specific compatible string which enables
From: Peng Fan
Enable cpufreq for i.MX7ULP when imx cpufreq dt driver enabled.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/mach-imx7ulp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-imx/mach-imx7ulp.c b/arch/arm/mach-imx/mach-imx7ulp.c
index
Add "mediatek,mt8192-ufshci" compatible string to for MediaTek
UFS host controller present on MT8192 chipsets.
Signed-off-by: Stanley Chu
---
Documentation/devicetree/bindings/ufs/ufs-mediatek.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
在 2020/9/10 下午9:49, Matthew Wilcox 写道:
> On Mon, Aug 24, 2020 at 08:54:39PM +0800, Alex Shi wrote:
>> lru_lock and page cache xa_lock have no reason with current sequence,
>> put them together isn't necessary. let's narrow the lru locking, but
>> left the local_irq_disable to block interrupt
From: Peng Fan
When cpu runs in HSRUN mode, cpuidle is not allowed to run into
Stop mode. So add imx7ulp_get_mode to get thr cpu run mode,
and use WAIT mode instead, when cpu in HSRUN mode.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/common.h | 1 +
Hello,
On Thu, Sep 10, 2020 at 10:48 PM wrote:
>
> From: Andi Kleen
>
> Icelake has support for reporting per thread TopDown metrics.
> These are reported differently than the previous TopDown support,
> each metric is standalone, but scaled to pipeline "slots".
> We don't need to do anything
From: Peng Fan
Configure PMPROT to let ARM core could run into HSRUN mode.
In LDO-enabled mode, HSRUN mode is not allowed, so add a check before
configure PMPROT.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/pm-imx7ulp.c | 15 +++
1 file changed, 15 insertions(+)
diff --git
From: Peng Fan
Add i.MX7ULP pmc node for m4 and a7.
Signed-off-by: Peng Fan
---
arch/arm/boot/dts/imx7ulp.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index b7ea37ad4e55..d5d67e3db123 100644
---
From: Peng Fan
Add i.MX7ULP Power Management Controller binding doc
Signed-off-by: Peng Fan
---
.../bindings/arm/freescale/imx7ulp-pmc.yaml | 33 +++
1 file changed, 33 insertions(+)
create mode 100644
Documentation/devicetree/bindings/arm/freescale/imx7ulp-pmc.yaml
diff
Hi Martin, Rob, Avri,
This series adds high-performance mode support for MediaTek UFS inline
encryption engine.
This feature is only required in specific platforms, i.e., MT8192 series.
Please help consider this patch set in kernel v5.10.
Thanks.
Changes since v1:
- Remove unnecessary
From: Peng Fan
This patchset is to add HSRUN mode support.
Patch 1,2 is to add binding doc and dts node
Patch 3 is to support HSRUN mode
Patch 4 is to use wait mode when HSRUN working per hardware state machine
requirement.
Peng Fan (4):
dt-bindings: fsl: add i.MX7ULP PMC binding doc
ARM:
On Fri, 11 Sep 2020 at 02:49, Andrew Jeffery wrote:
>
>
>
> On Fri, 11 Sep 2020, at 11:32, Joel Stanley wrote:
> > On Thu, 10 Sep 2020 at 10:55, Andrew Jeffery wrote:
> > >
> > > Allow sample phase adjustment to deal with layout or tolerance issues.
> > >
> > > Signed-off-by: Andrew Jeffery
> >
Fix to return negative error code -ENOMEM from the error handling
case instead of 0.
Signed-off-by: Jing Xiangfeng
---
drivers/i3c/master/i3c-master-cdns.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/i3c/master/i3c-master-cdns.c
randconfig-a003-20200911
i386 randconfig-a002-20200911
i386 randconfig-a005-20200911
i386 randconfig-a004-20200910
i386 randconfig-a006-20200910
i386 randconfig-a001-20200910
i386 randconfig-a003
On Fri, Sep 11, 2020 at 09:36:19AM +0800, Xiaoliang Pang wrote:
>
> diff --git a/drivers/crypto/mediatek/mtk-platform.c
> b/drivers/crypto/mediatek/mtk-platform.c
> index 7e3ad085b5bd..ebb3bdef0dbe 100644
> --- a/drivers/crypto/mediatek/mtk-platform.c
> +++
Matthias, Guenter,
These patches have all been reviewed (apart from fairly trivial 2/5),
which maintainer should be picking those up?
Thanks!
On Mon, Aug 3, 2020 at 3:15 PM Crystal Guo wrote:
>
> v4 changes:
> revise commit messages.
>
> v3 changes:
>
Some MediaTek UFS platforms support high-performance mode that inline
encryption engine can be boosted while UFS is not clock-gated.
The high-performance mode will be enabled if all below conditions are
well-declaired in device tree,
1. Proper platform-specific compatible string which enables
Hi Martin, Rob, Avri,
This series adds high-performance mode support for MediaTek UFS inline
encryption engine.
This feature is only required in specific platforms, i.e., MT8192 series.
Please help consider this patch set in kernel v5.10.
Thanks.
Stanley Chu (2):
scsi: ufs-mediatek: Support
Thanks for catching this.
On 9/11/20 12:16 AM, Joao Martins wrote:
After commit 26e495f34107 ("iommu/amd: Restore IRTE.RemapEn bit after
programming IRTE"), smatch warns:
drivers/iommu/amd/iommu.c:3870 amd_iommu_deactivate_guest_mode()
warn: variable dereferenced before check
Add "mediatek,mt8192-ufshci" compatible string to for MediaTek
UFS host controller present on MT8192 chipsets.
Signed-off-by: Stanley Chu
---
Documentation/devicetree/bindings/ufs/ufs-mediatek.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
On 09/11/2020 10:35 AM, Oliver O'Halloran wrote:
On Fri, Sep 11, 2020 at 11:55 AM Tiezhu Yang wrote:
On 09/11/2020 04:21 AM, Bjorn Helgaas wrote:
[+cc Huacai]
On Thu, Sep 10, 2020 at 02:41:39PM -0500, Bjorn Helgaas wrote:
On Sat, Sep 05, 2020 at 04:33:26PM +0800, Tiezhu Yang wrote:
After
On Thu, Sep 10, 2020 at 1:20 PM wrote:
>
> From: "Paul E. McKenney"
>
> The various RCU tasks flavors currently wait 100 milliseconds between each
> grace period in order to prevent CPU-bound loops and to favor efficiency
> over latency. However, RCU Tasks Trace needs to have a grace-period
>
Hi Daniel, Chunfeng,
> From: Chunfeng Yun, Sent: Friday, September 11, 2020 11:33 AM
>
> On Thu, 2020-09-10 at 14:12 +0100, Daniel Thompson wrote:
> > On Thu, Sep 10, 2020 at 04:21:45PM +0800, Chunfeng Yun wrote:
> > > Use readl_poll_timeout_atomic() to simplify code
> > >
> > > Cc: Mathias
On 9/10/20 6:54 PM, Bhaskar Chowdhury wrote:
> This patch extends the help section by adding an explicit example of use.
>
> Signed-off-by: Bhaskar Chowdhury
> ---
Difference between versions goes here.
> scripts/config | 17 +
> 1 file changed, 17 insertions(+)
>
> diff
The patch partially reverts some of the UAPI bits of the buffer
cache management hints. Namely, the queue consistency (memory
coherency) user-space hint because, as it turned out, the kernel
implementation of this feature was misusing DMA_ATTR_NON_CONSISTENT.
The patch revers both kernel and user
On Fri, Sep 11, 2020 at 3:02 AM Ian Rogers wrote:
>
> A metric like DRAM_BW_Use has on SkylakeX events uncore_imc/cas_count_read/
> and uncore_imc/case_count_write/. These events open 6 events per socket
> with pmu names of uncore_imc_[0-5]. The current metric setup code in
> find_evsel_group
Hi Jiri,
On Thu, Sep 10, 2020 at 11:50 PM Jiri Olsa wrote:
>
> On Thu, Sep 10, 2020 at 10:48:02PM +0900, Namhyung Kim wrote:
>
> SNIP
>
> > > _do_fork+0x83/0x3a0
> > > __do_sys_wait4+0x83/0x90
> > > __do_sys_clone+0x85/0xa0
> > > do_syscall_64+0x5b/0x1e0
> > >
On 9/10/20 12:01 AM, Krzysztof Kozlowski wrote:
> The register addresses are not continuous, so use simple defines for
> them. This also makes it easier to find the address for register.
>
> No functional change.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> drivers/extcon/extcon-ptn5150.c |
On 9/10/20 7:06 PM, Tianxianting wrote:
> Hi viro,
> Could I get your feedback?
> This patch fixed the build warning, I think it can be applied, thanks :)
>
> -Original Message-
> From: tianxianting (RD)
> Sent: Saturday, September 05, 2020 3:15 PM
> To: v...@zeniv.linux.org.uk
> Cc:
Hi Ian,
On Fri, Sep 11, 2020 at 2:11 AM Ian Rogers wrote:
> Just to throw in some 2c worth. A nice thing about Namhyung's approach
> is that it can apply for metrics, events and pfm-events. It would be
> nice if there were a single option for specifying these, perhaps we
> can figure one out.
On 9/10/20 9:42 PM, Crystal Guo wrote:
> On Wed, 2020-09-09 at 23:39 +0800, Suman Anna wrote:
>> On 9/8/20 9:57 PM, Crystal Guo wrote:
>>> On Thu, 2020-09-03 at 07:40 +0800, Suman Anna wrote:
Hi Crystal,
On 8/16/20 10:03 PM, Crystal Guo wrote:
> Introduce ti_syscon_reset() to
在 2020/9/10 上午7:16, Hugh Dickins 写道:
> On Wed, 9 Sep 2020, Alex Shi wrote:
>> 在 2020/9/9 上午7:41, Hugh Dickins 写道:
>>>
>>> [PATCH v18 05/32] mm/thp: remove code path which never got into
>>> This is a good simplification, but I see no sign that you understand
>>> why it's valid: it relies on
On Fri, Sep 11, 2020 at 07:03:03AM +0800, Mathieu Poirier wrote:
> On Fri, Aug 21, 2020 at 11:44:42AM +0800, Tingwei Zhang wrote:
> > Allow to build coresight-cti as a module, for ease of development.
> >
> > - Kconfig becomes a tristate, to allow =m
> > - append -core to source file name to
On Fri, Sep 11, 2020 at 06:28:40AM +0800, Mathieu Poirier wrote:
> On Fri, Aug 21, 2020 at 11:44:29AM +0800, Tingwei Zhang wrote:
> > When coresight_build_path() fails on all the cpus, etm_setup_aux
> > calls etm_free_aux() to free allocated event_data.
> > WARN_ON(cpumask_empty(mask) will be
On Fri, 11 Sep 2020, at 11:32, Joel Stanley wrote:
> On Thu, 10 Sep 2020 at 10:55, Andrew Jeffery wrote:
> >
> > Allow sample phase adjustment to deal with layout or tolerance issues.
> >
> > Signed-off-by: Andrew Jeffery
> > ---
> > drivers/mmc/host/sdhci-of-aspeed.c | 137
Hi Greg,
On 9/11/2020 00:28, Greg Kroah-Hartman wrote:
> On Thu, Sep 10, 2020 at 02:19:00PM +0800, Shuo A Liu wrote:
>> On Wed 9.Sep'20 at 11:45:16 +0200, Greg Kroah-Hartman wrote:
>>> On Wed, Sep 09, 2020 at 05:08:25PM +0800, shuo.a@intel.com wrote:
From: Shuo Liu
The VM
On Wed, 2020-09-09 at 23:39 +0800, Suman Anna wrote:
> On 9/8/20 9:57 PM, Crystal Guo wrote:
> > On Thu, 2020-09-03 at 07:40 +0800, Suman Anna wrote:
> >> Hi Crystal,
> >>
> >> On 8/16/20 10:03 PM, Crystal Guo wrote:
> >>> Introduce ti_syscon_reset() to integrate assert and deassert together.
>
On Fri, Sep 11, 2020 at 06:19:18AM +0800, Mathieu Poirier wrote:
> On Fri, Aug 21, 2020 at 11:44:25AM +0800, Tingwei Zhang wrote:
> > Add coresight prefix to make it specific. It will be a export symbol.
> >
> > Signed-off-by: Mian Yousaf Kaukab
> > Signed-off-by: Tingwei Zhang
> > Reviewed-by:
On Tue, Sep 08, 2020 at 09:56:22AM +0200, Oscar Salvador wrote:
> The crux of the matter is that historically we left poisoned pages
> in the buddy system because we have some checks in place when
> allocating a page that a gatekeeper for poisoned pages.
> Unfortunately, we do have other users
On Thu, 2020-09-10 at 14:12 +0100, Daniel Thompson wrote:
> On Thu, Sep 10, 2020 at 04:21:45PM +0800, Chunfeng Yun wrote:
> > Use readl_poll_timeout_atomic() to simplify code
> >
> > Cc: Mathias Nyman
> > Cc: Yoshihiro Shimoda
> > Signed-off-by: Chunfeng Yun
> > ---
> > v2~v3: no changes
> >
Hi Andi,
On Fri, Sep 11, 2020 at 1:05 AM Andi Kleen wrote:
>
> On Tue, Sep 08, 2020 at 01:42:24PM +0900, Namhyung Kim wrote:
> > When we profile cgroup events with perf stat, it's very annoying to
> > specify events and cgroups on the command line as it requires the
> > mapping between events
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