On Tue, 20 Oct 2020 at 22:16, Nick Desaulniers wrote:
>
> On Tue, Oct 20, 2020 at 10:57 AM Will Deacon wrote:
> >
> > On Fri, 16 Oct 2020 10:53:39 -0700, Nick Desaulniers wrote:
> > > With CONFIG_EXPERT=y, CONFIG_KASAN=y, CONFIG_RANDOMIZE_BASE=n,
> > > CONFIG_RELOCATABLE=n, we observe the followi
Since we already in hard IRQ context when running megasas_isr(), so use
spin_lock() is enough, which is faster than spin_lock_irqsave().
Signed-off-by: Xianting Tian
---
drivers/scsi/megaraid/megaraid_sas_base.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/scs
Linus, everyone,
during this short break of my holidays, I send the first pull request of
I2C for 5.10. Main changes:
* if a host can be a client, too, the I2C core can now use it to emulate
SMBus HostNotify support (STM32 and R-Car added this so far)
* also for client mode, a testunit has been
Hi,
On Tue, Oct 13, 2020 at 8:30 PM Alexey Budankov
wrote:
> On 12.10.2020 19:49, Alexey Budankov wrote:
> > On 12.10.2020 19:09, Andi Kleen wrote:
> >> On Mon, Oct 12, 2020 at 11:58:58AM +0300, Alexey Budankov wrote:
> >>> diff --git a/tools/perf/util/session.c b/tools/perf/util/session.c
> >>>
On Mon Oct 19 2020, Christian Eggers wrote:
> Convert the bindings document for Microchip KSZ Series Ethernet switches
> from txt to yaml.
A few comments/questions below.
> diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
> b/Documentation/devicetree/bindings/net/dsa/mic
Hi Bjorn, Steve,
On 20-10-20, 08:03, Bjorn Andersson wrote:
> From: Stephen Boyd
>
> The SMMU that sits in front of the QUP needs to be programmed properly
> so that the i2c geni driver can allocate DMA descriptors. Failure to do
> this leads to faults when using devices such as an i2c touchscre
Hi Rob,
Em Thu, 8 Oct 2020 09:24:20 -0500
Rob Herring escreveu:
> booting-without-of.rstt is an ancient document that first outlined
> Flattened DeviceTree on PowerPC initially. The DT world has evolved a
> lot in the 15 years since and booting-without-of.rst is pretty stale.
> The name of the
From: Peng Fan
To i.MX8MP, always met "Waiting for root device /dev/mmcblk1p2...",
it is because the gpio driver not enabled. So enable CONFIG_GPIO_MXC
to make sure it could boot well.
Signed-off-by: Peng Fan
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/
On Wed, 21 Oct 2020 at 07:18, Greg Kroah-Hartman
wrote:
>
> On Tue, Oct 20, 2020 at 10:01:41PM -0700, Furquan Shaikh wrote:
> > GSMI driver uses dma_pool_* API functions for buffer allocation
> > because it requires that the SMI buffers are allocated within 32-bit
> > physical address space. Howev
Hi Naresh,
On 21.10.2020 07:05, Naresh Kamboju wrote:
> arm64 build broken while building linux next 20201021 tag.
>
> include/uapi/asm-generic/unistd.h:862:26: error: array index in
> initializer exceeds array bounds
> #define __NR_watch_mount 441
> ^
>
> Reported-by: Na
On 20. 10. 20, 14:20, Arnaldo Carvalho de Melo wrote:
Yeah, I observe the very same. I reported it at:
https://bugzilla.suse.com/show_bug.cgi?id=1177921
Would it be possible to try with
https://git.kernel.org/pub/scm/devel/pahole/pahole.git/commit/?h=tmp.libbtf_encoder
?
Yes, that branch fixe
Add some basic sanity-check tests for the fat_checksum() function and
the fat_time_unix2fat() and fat_time_fat2unix() functions. These unit
tests verify these functions return correct output for a number of test
inputs.
These tests were inspored by -- and serve a similar purpose to -- the
timestam
On 2020/10/16 13:14, Daeho Jeong wrote:
From: Daeho Jeong
Added compr_inode to show compressed inode count and compr_blocks to
show compressed block count in sysfs.
As there are so many entries in ../f2fs// directory, it looks a mess
there, I suggest that we can add a new directory 'stats' in
> Il giorno 20 ott 2020, alle ore 18:54, Jens Axboe ha
> scritto:
>
> On 10/20/20 1:15 AM, Paolo Valente wrote:
>>> Il giorno 20 ott 2020, alle ore 08:15, Mike Galbraith ha
>>> scritto:
>>>
>>> [ 1917.361401] ==
>>> [ 1917.361406] WARNING
On 2020-10-21 12:52, jaeg...@kernel.org wrote:
On 10/21, Can Guo wrote:
On 2020-10-21 03:52, Jaegeuk Kim wrote:
> The below call stack prevents clk_gating at every IO completion.
> We can remove the condition, ufshcd_any_tag_in_use(), since
> clkgating_work
> will check it again.
>
I think chec
Hi,
Please CC the driver maintainer(s) for relevant patches. For this driver,
I've been listed as the maintainer in the MAINTAINERS file.
On Wed, Oct 21, 2020 at 10:15:52AM +0800, Huang Yiwei wrote:
> Change CONFIG_QCOM_IPCC to tristate and add exit function to
> support module build for QCOM IPC
Hi Naresh,
On Wed, 21 Oct 2020 10:35:10 +0530 Naresh Kamboju
wrote:
>
> arm64 build broken while building linux next 20201021 tag.
>
> include/uapi/asm-generic/unistd.h:862:26: error: array index in
> initializer exceeds array bounds
> #define __NR_watch_mount 441
Yeah, the __NR_syscalls in in
On 20. 10. 20, 19:15, Andrii Nakryiko wrote:
On Tue, Oct 20, 2020 at 3:51 AM Jiri Slaby wrote:
Hi,
On 19. 10. 20, 1:18, Érico Rolim wrote:
I'm trying to build kernel 5.9.1 for arm64, and my dotconfig has
`CONFIG_DEBUG_INFO_BTF=y`, which requires pahole for building. However, pahole
version 1
On 2020-10-20 17:07:50, Mimi Zohar wrote:
> On Tue, 2020-09-29 at 13:52 -0400, Mimi Zohar wrote:
> > On Mon, 2020-09-28 at 22:16 +0800, Kai-Heng Feng wrote:
> > > Hi Jarkko,
> > >
> > > > On Sep 28, 2020, at 22:06, Jarkko Sakkinen
> > > > wrote:
> > > >
> > > > On Mon, Sep 28, 2020 at 08:31:04P
Thanks Mimi for your comments.
On Wed, 21 Oct 2020 at 08:51, Mimi Zohar wrote:
>
> On Wed, 2020-10-07 at 15:37 +0530, Sumit Garg wrote:
>
> > +/*
> > + * trusted_destroy - clear and free the key's payload
> > + */
> > +static void trusted_destroy(struct key *key)
> > +{
> > + kfree_sensitive(
On Wed, 21 Oct 2020, at 15:35, Joel Stanley wrote:
> On Fri, 16 Oct 2020 at 04:36, Andrew Jeffery wrote:
> >
> > Reserve a 1.5MiB region of memory to record kmsg dumps, console and
> > userspace message state into 16kiB ring-buffer slots. The sizing allows
> > for up to 32 dumps to be captured
There is one error handling path does not free ref,
which may cause a memory leak.
Signed-off-by: Dinghao Liu
---
fs/btrfs/ref-verify.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fs/btrfs/ref-verify.c b/fs/btrfs/ref-verify.c
index 7f03dbe5b609..78693d3dd15b 100644
--- a/fs/btrfs/ref-ver
> -Original Message-
> From: Joakim Zhang
> Sent: 2020年10月21日 13:25
> To: m...@pengutronix.de; robh...@kernel.org; shawn...@kernel.org;
> s.ha...@pengutronix.de
> Cc: ker...@pengutronix.de; dl-linux-imx ; Ying Liu
> ; linux-...@vger.kernel.org; net...@vger.kernel.org;
> linux-kernel@vger.
On Mon, Oct 19, 2020 at 12:03 AM Dae R. Jeong wrote:
>
> > diff --git i/drivers/md/md.c w/drivers/md/md.c
> > index 6072782070230..49442a3f4605b 100644
> > --- i/drivers/md/md.c
> > +++ w/drivers/md/md.c
> > @@ -7591,8 +7591,10 @@ static int md_ioctl(struct block_device *bdev,
> > fmode_t mode,
>
On Tue, Oct 20, 2020 at 09:44:23PM -0700, Eric Biggers wrote:
> On Fri, Oct 16, 2020 at 08:20:44AM +0100, Christoph Hellwig wrote:
> > And this just validates my argument that calling the inline crypto work
> > directly from the block layer instead of just down below in blk-mq was
> > wrong. We sh
The System Controller Firmware (SCFW) is a low-level system function
which runs on a dedicated Cortex-M core to provide power, clock, and
resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
(QM, QP), and i.MX8QX (QXP, DX). SCU driver manages the IPC interface
between host CPU and
The first patch from Liu Ying aims to export SCU symbols for SoCs w/wo SCU,
so that no need to check CONFIG_IMX_SCU in the specific driver.
The following patches are flexcan fixes and add stop mode support for i.MX8QM.
ChangeLogs:
V3->V4:
* can_idx->scu_idx.
* return imx_scu_get_h
Add IMX_SC_R_CAN(x) macro for CAN.
Suggested-by: Marc Kleine-Budde
Signed-off-by: Joakim Zhang
---
include/dt-bindings/firmware/imx/rsrc.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/firmware/imx/rsrc.h
b/include/dt-bindings/firmware/imx/rsrc.h
index 54278d5c1856..4
From: Liu Ying
Always export SCU symbols for both SCU SoCs and non-SCU SoCs to avoid
build error.
Signed-off-by: Liu Ying
Signed-off-by: Peng Fan
Signed-off-by: Joakim Zhang
---
include/linux/firmware/imx/ipc.h | 15 +++
include/linux/firmware/imx/svc/misc.h | 23 +++
Correct fsl,clk-source example since flexcan driver uses "of_property_read_u8"
to get this property.
Fixes: 9d733992772d ("dt-bindings: can: flexcan: add PE clock source property
to device tree")
Signed-off-by: Joakim Zhang
---
Documentation/devicetree/bindings/net/can/fsl-flexcan.txt | 2 +-
1
This patch intends to rename FLEXCAN_QUIRK_SETUP_STOP_MODE quirk
to FLEXCAN_QUIRK_SETUP_STOP_MODE_GRP for non-scu SoCs, coming patch will
add quirk for scu SoCs.
For non-scu SoCs, setup stop mode with GPR register.
For scu SoCs, setup stop mode with SCU firmware.
Signed-off-by: Joakim Zhang
---
For SoCs with SCU support, need setup stop mode via SCU firmware,
so this property can help indicate a resource in SCU firmware.
Signed-off-by: Joakim Zhang
---
Documentation/devicetree/bindings/net/can/fsl-flexcan.txt | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devic
On Tue, 20 Oct 2020 at 18:02, Marc Zyngier wrote:
>
> On 2020-10-20 13:25, Daniel Thompson wrote:
> > On Tue, Oct 20, 2020 at 04:52:43PM +0530, Sumit Garg wrote:
>
> [...]
>
> >> So in general, IPI as a normal IRQ is still useful for debugging but
> >> it can't debug a core which is stuck in deadl
When rtnl_configure_link() fails, peer needs to be
freed just like when register_netdevice() fails.
Signed-off-by: Dinghao Liu
---
drivers/net/can/vxcan.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/can/vxcan.c b/drivers/net/can/vxcan.c
index d6ba9426be4d..aefc5a61d239 100644
David Gow writes:
>> Hm, can this export only if FAT_KUNIT_TEST is builtin or module (maybe
>> #if IS_ENABLED(...))? And #if will also be worked as the comment too.
>>
>
> That's possible, but I'd prefer to export it unconditionally for two reasons:
> 1. It'd make it possible to build the fat_tes
On Tue, Oct 20, 2020 at 10:01:41PM -0700, Furquan Shaikh wrote:
> GSMI driver uses dma_pool_* API functions for buffer allocation
> because it requires that the SMI buffers are allocated within 32-bit
> physical address space. However, this does not work well with IOMMU
> since there is no real dev
On Tue, Oct 20, 2020 at 10:54:57PM +0100, André Przywara wrote:
> On 29/09/2020 14:39, Leo Yan wrote:
>
> Hi,
>
> > For the operation type packet payload with load/store class, it misses
> > to support these sub classes:
> >
> > - A load/store targeting the general-purpose registers;
> > - A
On Tue, Oct 20, 2020 at 10:54:44PM +0100, André Przywara wrote:
> On 29/09/2020 14:39, Leo Yan wrote:
>
> Hi,
>
> > From: Wei Li
> >
> > This patch is to support Armv8.3 extension for SPE, it adds alignment
> > field in the Events packet and it supports the Scalable Vector Extension
> > (SVE) f
On Wed, Oct 21, 2020 at 12:12:16PM +0900, HyungJae Im wrote:
> >From ec9859ee01b7bc0e04255971e0fe97348847dab7 Mon Sep 17 00:00:00 2001
You sent this 3 times, why?
And why is this in the body of the email, have you read the "how to send
your first kernel patch" document at kernelnewbies.org?
> Fr
On Fri, 16 Oct 2020 at 04:36, Andrew Jeffery wrote:
>
> Reserve a 1.5MiB region of memory to record kmsg dumps, console and
> userspace message state into 16kiB ring-buffer slots. The sizing allows
> for up to 32 dumps to be captured and read out.
>
> Set max-reason to KMSG_DUMP_EMERG to capture b
arm64 build broken while building linux next 20201021 tag.
include/uapi/asm-generic/unistd.h:862:26: error: array index in
initializer exceeds array bounds
#define __NR_watch_mount 441
^
Reported-by: Naresh Kamboju
build error log on arm64:
-
GSMI driver uses dma_pool_* API functions for buffer allocation
because it requires that the SMI buffers are allocated within 32-bit
physical address space. However, this does not work well with IOMMU
since there is no real device and hence no domain associated with the
device.
Since this is not a
Both values are from memory values.
2020년 10월 21일 (수) 오후 1:36, Eric Biggers 님이 작성:
>
> On Fri, Oct 16, 2020 at 02:14:55PM +0900, Daeho Jeong wrote:
> > From: Daeho Jeong
> >
> > Added compr_inode to show compressed inode count and compr_blocks to
> > show compressed block count in sysfs.
> >
> >
On Tue, Oct 20, 2020 at 10:54:16PM +0100, André Przywara wrote:
> On 29/09/2020 14:39, Leo Yan wrote:
>
> Hi,
>
> > Use macros instead of the enum values for event types, this is more
> > directive and without bit shifting when parse packet.
> >
> > Signed-off-by: Leo Yan
> > ---
> > .../util/
On 10/21, Can Guo wrote:
> On 2020-10-21 03:52, Jaegeuk Kim wrote:
> > From: Jaegeuk Kim
> >
> > Must have WQ_MEM_RECLAIM
> > ``WQ_MEM_RECLAIM``
> > All wq which might be used in the memory reclaim paths **MUST**
> > have this flag set. The wq is guaranteed to have at least one
> > executi
On 10/21, Can Guo wrote:
> On 2020-10-21 03:52, Jaegeuk Kim wrote:
> > The below call stack prevents clk_gating at every IO completion.
> > We can remove the condition, ufshcd_any_tag_in_use(), since
> > clkgating_work
> > will check it again.
> >
>
> I think checking ufshcd_any_tag_in_use() in e
On Fri, 16 Oct 2020 at 04:36, Andrew Jeffery wrote:
>
> Hi,
>
> We're looking to improve our crash data capture for the BMC on some IBM
> platforms. This small series enables ramoops for Rainier and Tacoma.
>
> Please review.
Reviewed-by: Joel Stanley
>
> Andrew
>
> Andrew Jeffery (2):
> ARM:
On Fri, Oct 16, 2020 at 08:20:44AM +0100, Christoph Hellwig wrote:
> And this just validates my argument that calling the inline crypto work
> directly from the block layer instead of just down below in blk-mq was
> wrong. We should not require any support from stacking drivers at the
> keyslot ma
On 10/21, Can Guo wrote:
> On 2020-10-21 03:52, Jaegeuk Kim wrote:
> > From: Jaegeuk Kim
> >
> > When giving a stress test which enables/disables clkgating, we hit
> > device
> > timeout sometimes. This patch avoids subtle racy condition to address
> > it.
> >
> > Cc: Alim Akhtar
> > Cc: Avri A
On Fri, Oct 16, 2020 at 02:14:55PM +0900, Daeho Jeong wrote:
> From: Daeho Jeong
>
> Added compr_inode to show compressed inode count and compr_blocks to
> show compressed block count in sysfs.
>
> Signed-off-by: Daeho Jeong
> ---
> Documentation/ABI/testing/sysfs-fs-f2fs | 10 ++
> fs
Hi,
> -Original Message-
> From: Bart Van Assche
> Sent: Wednesday, October 21, 2020 12:15 PM
> To: Chanho Park ; j...@linux.ibm.com;
> martin.peter...@oracle.com
> Cc: alim.akh...@samsung.com; avri.alt...@wdc.com; linux-
> s...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re:
On 10/20/2020 11:39 PM, Valentin Schneider wrote:
>
> Hi,
>
> Nit on the subject: this only increases the default, the max is still 2¹⁰.
Agreed.
>
> On 20/10/20 18:34, Vanshidhar Konda wrote:
>> The current arm64 max NUMA nodes default to 4. Today's arm64 systems can
>> reach or exceed 16.
Hi all,
Since the merge window is open, please do not add any v5.11 material to
your linux-next included branches until after v5.10-rc1 has been released.
Changes since 20201016:
The ext4 tree gained a conflict against Linus' tree.
The pm tree gained a conflict against the arm-soc tree.
The rp
On Tue, Oct 13, 2020 at 2:38 PM 'SeongJae Park' via KUnit Development
wrote:
>
> From: SeongJae Park
>
> If 'CONFIG_KUNIT=m', letting kunit tests that do not support loadable
> module build depends on 'KUNIT' instead of 'KUNIT=y' result in compile
> errors. This commit updates the document for t
On Tue, 20 Oct 2020 09:51:39 -0700 Florian Fainelli wrote:
> On 10/20/20 9:50 AM, Colin King wrote:
> > From: Colin Ian King
> >
> > Don't populate the const array rate_table on the stack but instead it
> > static. Makes the object code smaller by 46 bytes.
> >
> > Before:
> >textdat
On Tue, 20 Oct 2020 11:26:34 +0200 Matthieu Baerts wrote:
> On 20/10/2020 09:38, Geert Uytterhoeven wrote:
> > MPTCP_IPV6 selects IPV6, thus enabling an optional feature the user may
> > not want to enable. Fix this by making MPTCP_IPV6 depend on IPV6, like
> > is done for all other IPv6 features.
On Tue, Oct 20, 2020 at 10:53:47PM +0100, André Przywara wrote:
> On 29/09/2020 14:39, Leo Yan wrote:
>
> Hi,
>
> > This patch defines macros for counter packet header, and uses macro to
> > replace hard code values for packet parsing.
> >
> > Signed-off-by: Leo Yan
> > ---
> > .../util/arm-sp
Hi Lakshmi,
On Tue, 2020-10-20 at 19:38 -0700, Lakshmi Ramasubramanian wrote:
> On 10/20/20 1:01 PM, Mimi Zohar wrote:
> > On Wed, 2020-09-30 at 13:59 -0700, Lakshmi Ramasubramanian wrote:
> >> The functions ima_get_kexec_buffer() and ima_free_kexec_buffer(),
> >> that handle carrying forward the
On Tue, Oct 20, 2020 at 2:51 PM OGAWA Hirofumi
wrote:
>
> David Gow writes:
>
> > diff --git a/fs/fat/misc.c b/fs/fat/misc.c
> > index f1b2a1fc2a6a..445ad3542e74 100644
> > --- a/fs/fat/misc.c
> > +++ b/fs/fat/misc.c
> > @@ -229,6 +229,7 @@ void fat_time_fat2unix(struct msdos_sb_info *sbi,
> > s
x86_64 randconfig-a006-20201021
x86_64 randconfig-a005-20201021
x86_64 randconfig-a004-20201021
i386 randconfig-a002-20201020
i386 randconfig-a005-20201020
i386 randconfig-a003-20201020
i386
On Tue, Oct 20, 2020 at 6:46 AM Daniel Latypov wrote:
>
> Add basic test coverage for files that don't require any config options:
> * gcd.c
> * lcm.c
> * int_sqrt.c
> * reciprocal_div.c
> (Ignored int_pow.c since it's a simple textbook algorithm.)
>
I don't see a particular reason why int_pow.c b
On 10/20/20 6:38 AM, David Hildenbrand wrote:
>
> I'm bisecting the warning right now. Looks like it was introduced in v5.7.
I found the following bugs in the cgroup reservation accounting. The ones
in region_del are pretty obvious as the number of pages to uncharge would
always be zero. The on
On Wed, 21 Oct 2020 at 00:00, Benjamin Herrenschmidt
wrote:
>
> On Wed, 2020-10-21 at 08:36 +1030, Joel Stanley wrote:
> > We must ensure the tx descriptor updates are visible before updating
> > the tx pointer.
> >
> > This resolves the tx hangs observed on the 2600 when running iperf:
>
> To cla
This allows mixing direct DMA (to/from RAM) and
IOMMU (to/from apersistent memory) on the PPC64/pseries
platform. This was supposed to be a single patch but
unexpected move of direct DMA functions happened.
This is based on sha1
7cf726a59435 Linus Torvalds "Merge tag 'linux-kselftest-kunit-5.10-rc
So far we have been using huge DMA windows to map all the RAM available.
The RAM is normally mapped to the VM address space contiguously, and
there is always a reasonable upper limit for possible future hot plugged
RAM which makes it easy to map all RAM via IOMMU.
Now there is persistent memory ("
This reverts commit 19c65c3d30bb5a97170e425979d2e44ab2096c7d which
was a right move but sadly there is a POWERPC/pseries hardware config
which uses a mixture of direct and IOMMU DMA but bringing this
logic to the generic code won't benefit anybody else. The user of
this revert comes in the next pat
Hi Linus,
On Tue, Oct 20, 2020 at 04:08:03PM -0700, Linus Torvalds wrote:
> On Tue, Oct 20, 2020 at 12:26 PM Amit Klein wrote:
> >
> > Quick question: is this patch still planned for inclusion in 5.10-rc1?
>
> It doesn't even build for me, so no. It clearly hasn't been in
> linux-next or anythin
Hi Greg,
I was debugging without a live repro and I was told this patch
improved behavior but it's only by chance (someone bisected a Dell
D6000 dock's displayport issue to this commit and this change seemed
to help; udev logs later shows that's not the case). I took another
look at device_init_wa
bio_alloc with __GFP_DIRECT_RECLAIM(which is included in GFP_NOIO,
GFP_KERNEL) never fails, as stated in the comments of bio_alloc_bioset.
So we can remove multiple unneeded null checks of bio_alloc and simplify
the code.
We have done it in fs/ext4/readpage.c, fs/ext4/page-io.c, fs/direct-io.c,
a
On Wed, 2020-10-07 at 15:37 +0530, Sumit Garg wrote:
> +/*
> + * trusted_destroy - clear and free the key's payload
> + */
> +static void trusted_destroy(struct key *key)
> +{
> + kfree_sensitive(key->payload.data[0]);
> +}
> +
> +struct key_type key_type_trusted = {
> + .name = "trusted",
On Tue, 2020-10-20 at 19:25 -0700, Lakshmi Ramasubramanian wrote:
> On 10/20/20 1:00 PM, Mimi Zohar wrote:
> > Hi Lakshmi,
> >
> > On Wed, 2020-09-30 at 13:59 -0700, Lakshmi Ramasubramanian wrote:
> >> The functions remove_ima_buffer() and delete_fdt_mem_rsv() that handle
> >> carrying forward the
On 10/20/20 12:05 AM, Chanho Park wrote:
> By doing scan as asynchronous way, scsi device scannning can be out of
> order execution. It is no problem if there is a ufs host but the scsi
> device name of each host can be changed according to the scan sequences.
>
> Ideal Case) host0 scan first
> ho
>From ec9859ee01b7bc0e04255971e0fe97348847dab7 Mon Sep 17 00:00:00 2001
From: "hj2.im"
Date: Tue, 20 Oct 2020 16:57:04 +0900
Subject: [PATCH] FROMLIST: input: add 2 kind of switch
We need support to various accessories on the device,
some switch does not exist in switch list.
So added switch for
From ec9859ee01b7bc0e04255971e0fe97348847dab7 Mon Sep 17 00:00:00 2001
From: "hj2.im"
Date: Tue, 20 Oct 2020 16:57:04 +0900
Subject: [PATCH] FROMLIST: input: add 2 kind of switch
We need support to various accessories on the device,
some switch does not exist in switch list.
So added switch for
The LG LGSBWAC92/TWCM-K505D/EAT64454801/EAT64454802 (it goes by many
names) is a combo WiFi/Bluetooth module that's used in several models of
LG TVs. It uses the MediaTek MT7668AUN, which is already supported in
btusb, but this device has a non-MediaTek USB VID so to get it to work
we just need to
The code has been in a irq-disabled context since it is hard IRQ. There
is no necessity to do it again.
Signed-off-by: Tian Tao
---
drivers/thermal/rcar_thermal.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/thermal/rcar_thermal.c b/drivers/thermal/rcar_therma
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: c4d6fe7311762f2e03b3c27ad38df7c40c80cc93
commit: 5ceda74093a5c1c3f42a02b894df031f3bbc9af1 dma-direct: rename and cleanup
__phys_to_dma
date: 6 weeks ago
config: mips-randconfig-r022-20201021 (attached as .
>From ec9859ee01b7bc0e04255971e0fe97348847dab7 Mon Sep 17 00:00:00 2001
From: "hj2.im"
Date: Tue, 20 Oct 2020 16:57:04 +0900
Subject: [PATCH] FROMLIST: input: add 2 kind of switch
We need support to various accessories on the device,
some switch does not exist in switch list.
So added switch for
On Tue, 2020-10-20 at 14:20 +0300, Serge Semin wrote:
> The generic USB HCD properties have been described in the legacy bindings
> text file: Documentation/devicetree/bindings/usb/generic.txt . Let's
> convert it' content into the USB HCD DT schema properties so all USB DT
^ its?
> nodes
From: Ramuthevar Vadivel Murugan
On Intel Lightning Mountain(LGM) SoCs QSPI controller do not use
Direct Access Controller(DAC).
This patch adds a quirk to disable the Direct Access Controller
for data transfer instead it uses indirect data transfer.
Signed-off-by: Ramuthevar Vadivel Murugan
From: Ramuthevar Vadivel Murugan
Add compatible string for Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
Documentation/devicetree/bindings/spi/cadence-quadspi.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
b/
From: Ramuthevar Vadivel Murugan
Move the Documentation/devicetree/bindings/mtd/cadence-quadspi.txt to
Documentation/devicetree/bindings/spi/
Signed-off-by: Ramuthevar Vadivel Murugan
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/{mtd => spi}/cadence-quadspi.txt | 0
1 file cha
From: Ramuthevar Vadivel Murugan
Add multiple chipselect support for Intel LGM SoCs,
currently QSPI-NOR and QSPI-NAND supported.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/spi/spi-cadence-quadspi.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/spi/spi-
From: Ramuthevar Vadivel Murugan
Convert the cadence-quadspi.txt documentation to cadence-quadspi.yaml
remove the cadence-quadspi.txt from Documentation/devicetree/bindings/spi/
Signed-off-by: Ramuthevar Vadivel Murugan
---
.../devicetree/bindings/spi/cadence-quadspi.txt| 67 --
Add QSPI controller support for Intel LGM SoC.
Note from Vignesh(mtd subsystem maintainer):
This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add
support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX
that intended to move
cadence-quadspi driver to spi-mem framewo
From: Ramuthevar Vadivel Murugan
Add QSPI controller support for Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/spi/Kconfig | 2 +-
drivers/spi/spi-cadence-quadspi.c | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/Kconfig
On 10/20/20 9:08 PM, Muchun Song wrote:
On Tue, Oct 20, 2020 at 7:51 PM Xu, Yanfei wrote:
On 10/19/20 10:58 PM, Muchun Song wrote:
On Mon, Oct 19, 2020 at 8:31 PM Michal Hocko wrote:
On Mon 19-10-20 18:15:20, Muchun Song wrote:
For the exclusive reference page, the non-atomic operati
On 10/14/20 11:05 AM, Cristian Marussi wrote:
Add custom_dummy SCMI devname.
Signed-off-by: Cristian Marussi
---
drivers/firmware/arm_scmi/driver.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/firmware/arm_scmi/driver.c
b/drivers/firmware/arm_scmi/driver.c
index 55df134c23
On 10/14/20 11:05 AM, Cristian Marussi wrote:
Modify protocol initialization callback adding a new parameter representing
a reference to the available xfer core operations and introduce a macro to
simply register with the core new protocols as loadable drivers.
Keep standard protocols as built
Hi Cristian,
Thanks for this series!
On 10/14/20 11:05 AM, Cristian Marussi wrote:
Extend common protocol registration routines and provide some new generic
protocols' init/deinit helpers that tracks protocols' users and automatically
perform the proper initialization/de-initialization on deman
On 10/14/20 11:05 AM, Cristian Marussi wrote:
Introduce generic get_ops/put_ops handle operations: any protocol, both
standard or custom, now exposes its operations through this common
interface which internally takes care to account for protocols' usage:
protocols' initialization is now perfo
Hi, Manivannan
On Tue, 2020-10-20 at 21:09 +0530, Manivannan Sadhasivam wrote:
> Add devicetree documentation for 'qcom,freq-domain' property specific
> to Qualcomm CPUs. This property is used to reference the CPUFREQ node
> along with Domain ID (0/1).
>
> Signed-off-by: Manivannan Sadhasivam
>
On 10/20/20 1:01 PM, Mimi Zohar wrote:
On Wed, 2020-09-30 at 13:59 -0700, Lakshmi Ramasubramanian wrote:
The functions ima_get_kexec_buffer() and ima_free_kexec_buffer(),
that handle carrying forward the IMA measurement logs on kexec for
powerpc do not have architecture specific code, but they a
Hi Jakub,
Jakub Kicinski 于2020年10月21日周三 上午7:39写道:
>
> On Mon, 19 Oct 2020 18:23:14 +0800 Geliang Tang wrote:
> > This patchset deals with initializations of mptcp_options_received's two
> > fields, ahmac and port.
>
> Applied, but two extra comments:
> - please make sure the commit messages are
From: Ramuthevar Vadivel Murugan
Add compatible string for Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
Documentation/devicetree/bindings/spi/cadence-quadspi.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
b/
From: Ramuthevar Vadivel Murugan
Move the Documentation/devicetree/bindings/mtd/cadence-quadspi.txt to
Documentation/devicetree/bindings/spi/
Signed-off-by: Ramuthevar Vadivel Murugan
---
Documentation/devicetree/bindings/{mtd => spi}/cadence-quadspi.txt | 0
1 file changed, 0 insertions(+),
From: Ramuthevar Vadivel Murugan
Convert the cadence-quadspi.txt documentation to cadence-quadspi.yaml
remove the cadence-quadspi.txt from Documentation/devicetree/bindings/spi/
Signed-off-by: Ramuthevar Vadivel Murugan
Acked-by: Rob Herring
---
.../devicetree/bindings/spi/cadence-quadspi.tx
From: Ramuthevar Vadivel Murugan
Add multiple chipselect support for Intel LGM SoCs,
currently QSPI-NOR and QSPI-NAND supported.
Signed-off-by: Ramuthevar Vadivel Murugan
---
drivers/spi/spi-cadence-quadspi.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/spi/spi-
From: Ramuthevar Vadivel Murugan
Add compatible string for Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan
---
.../devicetree/bindings/spi/cadence-quadspi.yaml | 68 +++---
1 file changed, 34 insertions(+), 34 deletions(-)
diff --git a/Documentation/devicetree/bind
Add QSPI controller support for Intel LGM SoC.
Note from Vignesh(mtd subsystem maintainer):
This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add
support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX
that intended to move
cadence-quadspi driver to spi-mem framewo
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