Re: [PATCHv4] perf kvm: add kvm-stat for arm64
On (20/10/13 23:29), Leo Yan wrote: > On Tue, Oct 13, 2020 at 11:37:09AM -0300, Arnaldo Carvalho de Melo wrote: > > Em Tue, Sep 29, 2020 at 12:34:50PM +0900, Sergey Senozhatsky escreveu: > > > On (20/09/17 19:02), Sergey Senozhatsky wrote: > > > > Add support for perf kvm stat on arm64 platform. [..] > > > Arnaldo, any opinion on this? > > > > I'm not finding the actual patch, just this reply from you, lets try > > with b4 using this message Message-Id... Magic! But it isn't applying, > > can you please refresh the patch to what is in my perf/core branch? > > I did a quick trying, the merge confliction is caused by the file > tools/perf/arch/arm64/util/Build (for the new added tsc.c). > > @Sergey, please help to rebase on the latest perf/core branch [1]. Will do by the end of today! Sorry for the delay, somehow this whole followup conversation missed my inbox. -ss
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[PATCH v2 4/4] ALSA: hda: Reinstate runtime_allow() for all hda controllers
The broken jack detection should be fixed by commit a6e7d0a4bdb0 ("ALSA:
hda: fix jack detection with Realtek codecs when in D3"), let's try
enabling runtime PM by default again.
Signed-off-by: Kai-Heng Feng
---
v2:
- No change.
sound/pci/hda/hda_intel.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 4cf90e4602c7..573250d2c6c9 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -2350,6 +2350,7 @@ static int azx_probe_continue(struct azx *chip)
if (azx_has_pm_runtime(chip)) {
pm_runtime_use_autosuspend(>dev);
+ pm_runtime_allow(>dev);
pm_runtime_put_autosuspend(>dev);
}
--
2.17.1
[PATCH v2 0/4] HDA controller and PM cleanups
While working on the issue "ALSA: hda: fix jack detection with Realtek
codecs when in D3", I've found using pm_runtime_force_{suspend,resume}()
have surprising behavior, specifically, pm_runtime_need_not_resume()
uses pm_runtime_need_not_resume() to avoid calling resume callback, so
jackpoll was used to really power up the codec.
We can use direct-complete to do the keep the codec suspended throughout
the system PM flow, namely, keep the codec suspended all the way, unless
the codec needs to be woken up after resume.
For HDA controller, PCI core may enable direct-complete for it if
conditions are met. So make runtime and system PM distinctive to always
apply correct wake up setting.
At least point, hopefully all runtime PM issues are solved, let's enable
runtime PM by default again.
Kai-Heng Feng (4):
ALSA: hda: Refactor codec PM to use direct-complete optimization
ALSA: hda: Stop mangling PCI IRQ
ALSA: hda: Separate runtime and system suspend
ALSA: hda: Reinstate runtime_allow() for all hda controllers
sound/pci/hda/hda_codec.c | 45 +---
sound/pci/hda/hda_controller.h | 3 +-
sound/pci/hda/hda_intel.c | 77 --
3 files changed, 67 insertions(+), 58 deletions(-)
--
2.17.1
[PATCH v2 2/4] ALSA: hda: Stop mangling PCI IRQ
The code predates 2005, it should be unnecessary now as PCI core handles
IRQ much better nowadays.
So stop PCI IRQ mangling in suspend/resume callbacks.
Takashi Iwai mentioned that IRQ number can change after S3 on some
really old hardwares. We should use quirks to handle those platforms, as
most modern systems won't have that issue.
Signed-off-by: Kai-Heng Feng
---
v2:
- Wording.
- Add info on IRQ # can change on old hardwares.
sound/pci/hda/hda_intel.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 749b88090970..b4aa1dcf1aae 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1022,13 +1022,11 @@ static int azx_suspend(struct device *dev)
{
struct snd_card *card = dev_get_drvdata(dev);
struct azx *chip;
- struct hdac_bus *bus;
if (!azx_is_pm_ready(card))
return 0;
chip = card->private_data;
- bus = azx_bus(chip);
snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
/* An ugly workaround: direct call of __azx_runtime_suspend() and
* __azx_runtime_resume() for old Intel platforms that suffer from
@@ -1038,14 +1036,6 @@ static int azx_suspend(struct device *dev)
__azx_runtime_suspend(chip);
else
pm_runtime_force_suspend(dev);
- if (bus->irq >= 0) {
- free_irq(bus->irq, chip);
- bus->irq = -1;
- chip->card->sync_irq = -1;
- }
-
- if (chip->msi)
- pci_disable_msi(chip->pci);
trace_azx_suspend(chip);
return 0;
@@ -1060,11 +1050,6 @@ static int azx_resume(struct device *dev)
return 0;
chip = card->private_data;
- if (chip->msi)
- if (pci_enable_msi(chip->pci) < 0)
- chip->msi = 0;
- if (azx_acquire_irq(chip, 1) < 0)
- return -EIO;
if (chip->driver_caps & AZX_DCAPS_SUSPEND_SPURIOUS_WAKEUP)
__azx_runtime_resume(chip, false);
--
2.17.1
[PATCH v2 3/4] ALSA: hda: Separate runtime and system suspend
Both pm_runtime_force_suspend() and pm_runtime_force_resume() have
some implicit checks, so it can make code flow more straightfoward if we
separate runtime and systemd suspend callbacks.
High Definition Audio Specification, 4.5.9.3 Codec Wake From System S3
states that codec can wake the system up from S3 if WAKEEN is toggled.
Since HDA controller has different wakeup settings for runtime and
system susend, we also need to explicitly disable direct-complete which
can be enabled automatically by PCI core. In addition to that, avoid
waking up codec if runtime resume is for system suspend, to not break
direct-complete for codecs.
While at it, also remove AZX_DCAPS_SUSPEND_SPURIOUS_WAKEUP, as the
original bug commit a6630529aecb ("ALSA: hda: Workaround for spurious
wakeups on some Intel platforms") solves doesn't happen with this
patch.
Signed-off-by: Kai-Heng Feng
---
v2:
- Make sure WAKEEN is disabled for system suspend.
- Avoid waking up codec if runtime resume is for system suspend
sound/pci/hda/hda_controller.h | 3 +-
sound/pci/hda/hda_intel.c | 61 +++---
2 files changed, 37 insertions(+), 27 deletions(-)
diff --git a/sound/pci/hda/hda_controller.h b/sound/pci/hda/hda_controller.h
index be63ead8161f..7176ef8170ba 100644
--- a/sound/pci/hda/hda_controller.h
+++ b/sound/pci/hda/hda_controller.h
@@ -41,7 +41,7 @@
/* 24 unused */
#define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */
#define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */
-#define AZX_DCAPS_SUSPEND_SPURIOUS_WAKEUP (1 << 27) /* Workaround for spurious
wakeups after suspend */
+/* 27 unused */
#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after
reset */
#define AZX_DCAPS_NO_MSI64 (1 << 29) /* Stick to 32-bit MSIs */
#define AZX_DCAPS_SEPARATE_STREAM_TAG (1 << 30) /* capture and playback use
separate stream tag */
@@ -143,6 +143,7 @@ struct azx {
unsigned int align_buffer_size:1;
unsigned int region_requested:1;
unsigned int disabled:1; /* disabled by vga_switcheroo */
+ unsigned int prepared:1;
/* GTS present */
unsigned int gts_present:1;
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index b4aa1dcf1aae..4cf90e4602c7 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -297,8 +297,7 @@ enum {
/* PCH for HSW/BDW; with runtime PM */
/* no i915 binding for this as HSW/BDW has another controller for HDMI */
#define AZX_DCAPS_INTEL_PCH \
- (AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME |\
-AZX_DCAPS_SUSPEND_SPURIOUS_WAKEUP)
+ (AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME)
/* HSW HDMI */
#define AZX_DCAPS_INTEL_HASWELL \
@@ -1002,7 +1001,8 @@ static void __azx_runtime_resume(struct azx *chip, bool
from_rt)
azx_init_pci(chip);
hda_intel_init_chip(chip, true);
- if (from_rt) {
+ /* Avoid codec resume if runtime resume is for system suspend */
+ if (from_rt && !chip->prepared) {
list_for_each_codec(codec, >bus) {
if (codec->relaxed_resume)
continue;
@@ -1018,6 +1018,29 @@ static void __azx_runtime_resume(struct azx *chip, bool
from_rt)
}
#ifdef CONFIG_PM_SLEEP
+static int azx_prepare(struct device *dev)
+{
+ struct snd_card *card = dev_get_drvdata(dev);
+ struct azx *chip;
+
+ chip = card->private_data;
+ chip->prepared = 1;
+
+ /* HDA controller always requires different WAKEEN for runtime suspend
+* and system suspend, so don't use direct-complete here.
+*/
+ return 0;
+}
+
+static void azx_complete(struct device *dev)
+{
+ struct snd_card *card = dev_get_drvdata(dev);
+ struct azx *chip;
+
+ chip = card->private_data;
+ chip->prepared = 0;
+}
+
static int azx_suspend(struct device *dev)
{
struct snd_card *card = dev_get_drvdata(dev);
@@ -1028,14 +1051,7 @@ static int azx_suspend(struct device *dev)
chip = card->private_data;
snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
- /* An ugly workaround: direct call of __azx_runtime_suspend() and
-* __azx_runtime_resume() for old Intel platforms that suffer from
-* spurious wakeups after S3 suspend
-*/
- if (chip->driver_caps & AZX_DCAPS_SUSPEND_SPURIOUS_WAKEUP)
- __azx_runtime_suspend(chip);
- else
- pm_runtime_force_suspend(dev);
+ __azx_runtime_suspend(chip);
trace_azx_suspend(chip);
return 0;
@@ -1050,11 +1066,7 @@ static int azx_resume(struct device *dev)
return 0;
chip = card->private_data;
-
- if (chip->driver_caps & AZX_DCAPS_SUSPEND_SPURIOUS_WAKEUP)
- __azx_runtime_resume(chip, false);
- else
- pm_runtime_force_resume(dev);
+ __azx_runtime_resume(chip, false);
[PATCH v2 1/4] ALSA: hda: Refactor codec PM to use direct-complete optimization
Upon system resume, hda_codec_pm_resume() uses hda_codec_force_resume()
to resume the codec. However, pm_runtime_force_resume() won't really
resume the codec because of pm_runtime_need_not_resume() check.
Hence, hda_codec_force_resume() schedules a jackpoll work, which is to
really power up the codec.
Instead of doing that, we can use direct-complete to make the PM flow
more straightforward, and keep codec always suspended through system PM
flow if conditions are met.
On system suspend, PM core will decide what to do based on
hda_codec_pm_prepare():
- If codec is not runtime-suspended, PM core will suspend and resume the
device as normal.
- If codec is runtime-suspended, PM core will try to keep it suspended.
If it's still suspended after system resume, we use
hda_codec_pm_complete() to resume codec if it's needed.
Signed-off-by: Kai-Heng Feng
---
v2:
- Also resume when codec->jackpoll_interval is set
sound/pci/hda/hda_codec.c | 45 +--
1 file changed, 29 insertions(+), 16 deletions(-)
diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c
index a356c21edb90..4bb58e8b08a8 100644
--- a/sound/pci/hda/hda_codec.c
+++ b/sound/pci/hda/hda_codec.c
@@ -2934,7 +2934,7 @@ static void hda_call_codec_resume(struct hda_codec *codec)
snd_hdac_leave_pm(>core);
}
-static int hda_codec_runtime_suspend(struct device *dev)
+static int hda_codec_suspend(struct device *dev)
{
struct hda_codec *codec = dev_to_hda_codec(dev);
unsigned int state;
@@ -2953,7 +2953,7 @@ static int hda_codec_runtime_suspend(struct device *dev)
return 0;
}
-static int hda_codec_runtime_resume(struct device *dev)
+static int hda_codec_resume(struct device *dev)
{
struct hda_codec *codec = dev_to_hda_codec(dev);
@@ -2967,57 +2967,70 @@ static int hda_codec_runtime_resume(struct device *dev)
pm_runtime_mark_last_busy(dev);
return 0;
}
+
+static int hda_codec_runtime_suspend(struct device *dev)
+{
+ return hda_codec_suspend(dev);
+}
+
+static int hda_codec_runtime_resume(struct device *dev)
+{
+ return hda_codec_resume(dev);
+}
+
#endif /* CONFIG_PM */
#ifdef CONFIG_PM_SLEEP
-static int hda_codec_force_resume(struct device *dev)
+static int hda_codec_pm_prepare(struct device *dev)
+{
+ return pm_runtime_suspended(dev);
+}
+
+static void hda_codec_pm_complete(struct device *dev)
{
struct hda_codec *codec = dev_to_hda_codec(dev);
- int ret;
- ret = pm_runtime_force_resume(dev);
- /* schedule jackpoll work for jack detection update */
- if (codec->jackpoll_interval ||
- (pm_runtime_suspended(dev) && hda_codec_need_resume(codec)))
- schedule_delayed_work(>jackpoll_work,
- codec->jackpoll_interval);
- return ret;
+ if (pm_runtime_suspended(dev) && (codec->jackpoll_interval ||
+ hda_codec_need_resume(codec) || codec->forced_resume))
+ pm_request_resume(dev);
}
static int hda_codec_pm_suspend(struct device *dev)
{
dev->power.power_state = PMSG_SUSPEND;
- return pm_runtime_force_suspend(dev);
+ return hda_codec_suspend(dev);
}
static int hda_codec_pm_resume(struct device *dev)
{
dev->power.power_state = PMSG_RESUME;
- return hda_codec_force_resume(dev);
+ return hda_codec_resume(dev);
}
static int hda_codec_pm_freeze(struct device *dev)
{
dev->power.power_state = PMSG_FREEZE;
- return pm_runtime_force_suspend(dev);
+ return hda_codec_suspend(dev);
}
static int hda_codec_pm_thaw(struct device *dev)
{
dev->power.power_state = PMSG_THAW;
- return hda_codec_force_resume(dev);
+ return hda_codec_resume(dev);
}
static int hda_codec_pm_restore(struct device *dev)
{
dev->power.power_state = PMSG_RESTORE;
- return hda_codec_force_resume(dev);
+ return hda_codec_resume(dev);
}
#endif /* CONFIG_PM_SLEEP */
/* referred in hda_bind.c */
const struct dev_pm_ops hda_codec_driver_pm = {
#ifdef CONFIG_PM_SLEEP
+ .prepare = hda_codec_pm_prepare,
+ .complete = hda_codec_pm_complete,
.suspend = hda_codec_pm_suspend,
.resume = hda_codec_pm_resume,
.freeze = hda_codec_pm_freeze,
--
2.17.1
[PATCH v4 2/2] f2fs: add F2FS_IOC_SET_COMPRESS_OPTION ioctl
From: Daeho Jeong
Added a new F2FS_IOC_SET_COMPRESS_OPTION ioctl to change file
compression option of a file.
struct f2fs_comp_option {
u8 algorithm; => compression algorithm
=> 0:lzo, 1:lz4, 2:zstd, 3:lzorle
u8 log_cluster_size; => log scale cluster size
=> 2 ~ 8
};
struct f2fs_comp_option option;
option.algorithm = 1;
option.log_cluster_size = 7;
ioctl(fd, F2FS_IOC_SET_COMPRESS_OPTION, );
Signed-off-by: Daeho Jeong
---
v4: changed commit message.
v3: changed the error number more specific.
folded in fix for build breakage reported by kernel test robot
and Dan Carpenter .
v2: added ioctl description.
---
fs/f2fs/compress.c | 5 +
fs/f2fs/f2fs.h | 7 +++
fs/f2fs/file.c | 52 ++
3 files changed, 64 insertions(+)
diff --git a/fs/f2fs/compress.c b/fs/f2fs/compress.c
index 7895186cc765..816d7adc914c 100644
--- a/fs/f2fs/compress.c
+++ b/fs/f2fs/compress.c
@@ -514,6 +514,11 @@ bool f2fs_is_compress_backend_ready(struct inode *inode)
return f2fs_cops[F2FS_I(inode)->i_compress_algorithm];
}
+bool f2fs_is_compress_algorithm_ready(unsigned char algorithm)
+{
+ return algorithm < COMPRESS_MAX && f2fs_cops[algorithm] != NULL;
+}
+
static mempool_t *compress_page_pool;
static int num_compress_pages = 512;
module_param(num_compress_pages, uint, 0444);
diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index a33c90cf979b..cc38afde6c04 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -435,6 +435,8 @@ static inline bool __has_cursum_space(struct f2fs_journal
*journal,
struct f2fs_sectrim_range)
#define F2FS_IOC_GET_COMPRESS_OPTION _IOR(F2FS_IOCTL_MAGIC, 21, \
struct f2fs_comp_option)
+#define F2FS_IOC_SET_COMPRESS_OPTION _IOW(F2FS_IOCTL_MAGIC, 22, \
+ struct f2fs_comp_option)
/*
* should be same as XFS_IOC_GOINGDOWN.
@@ -3915,6 +3917,7 @@ bool f2fs_compress_write_end(struct inode *inode, void
*fsdata,
int f2fs_truncate_partial_cluster(struct inode *inode, u64 from, bool lock);
void f2fs_compress_write_end_io(struct bio *bio, struct page *page);
bool f2fs_is_compress_backend_ready(struct inode *inode);
+bool f2fs_is_compress_algorithm_ready(unsigned char algorithm);
int f2fs_init_compress_mempool(void);
void f2fs_destroy_compress_mempool(void);
void f2fs_decompress_pages(struct bio *bio, struct page *page, bool verity);
@@ -3945,6 +3948,10 @@ static inline bool f2fs_is_compress_backend_ready(struct
inode *inode)
/* not support compression */
return false;
}
+static inline bool f2fs_is_compress_algorithm_ready(unsigned char algorithm)
+{
+ return false;
+}
static inline struct page *f2fs_compress_control_page(struct page *page)
{
WARN_ON_ONCE(1);
diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
index 8922ab191a9d..8048b150e43b 100644
--- a/fs/f2fs/file.c
+++ b/fs/f2fs/file.c
@@ -3963,6 +3963,55 @@ static int f2fs_ioc_get_compress_option(struct file
*filp, unsigned long arg)
return 0;
}
+static int f2fs_ioc_set_compress_option(struct file *filp, unsigned long arg)
+{
+ struct inode *inode = file_inode(filp);
+ struct f2fs_sb_info *sbi = F2FS_I_SB(inode);
+ struct f2fs_comp_option option;
+ int ret = 0;
+
+ if (!f2fs_sb_has_compression(sbi))
+ return -EOPNOTSUPP;
+
+ if (!(filp->f_mode & FMODE_WRITE))
+ return -EBADF;
+
+ if (copy_from_user(, (struct f2fs_comp_option __user *)arg,
+ sizeof(option)))
+ return -EFAULT;
+
+ if (!f2fs_compressed_file(inode) ||
+ option.log_cluster_size < MIN_COMPRESS_LOG_SIZE ||
+ option.log_cluster_size > MAX_COMPRESS_LOG_SIZE)
+ return -EINVAL;
+
+ if (!f2fs_is_compress_algorithm_ready(option.algorithm))
+ return -ENOPKG;
+
+ file_start_write(filp);
+ inode_lock(inode);
+
+ if (f2fs_is_mmap_file(inode) || get_dirty_pages(inode)) {
+ ret = -EBUSY;
+ goto out;
+ }
+
+ if (inode->i_size != 0) {
+ ret = -EFBIG;
+ goto out;
+ }
+
+ F2FS_I(inode)->i_compress_algorithm = option.algorithm;
+ F2FS_I(inode)->i_log_cluster_size = option.log_cluster_size;
+ F2FS_I(inode)->i_cluster_size = 1 << option.log_cluster_size;
+ f2fs_mark_inode_dirty_sync(inode, true);
+out:
+ inode_unlock(inode);
+ file_end_write(filp);
+
+ return ret;
+}
+
long f2fs_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
{
if (unlikely(f2fs_cp_error(F2FS_I_SB(file_inode(filp)
@@ -4053,6 +4102,8 @@ long f2fs_ioctl(struct file *filp, unsigned int cmd,
unsigned long arg)
return
[PATCH v4 1/2] f2fs: add F2FS_IOC_GET_COMPRESS_OPTION ioctl
From: Daeho Jeong
Added a new F2FS_IOC_GET_COMPRESS_OPTION ioctl to get file compression
option of a file.
struct f2fs_comp_option {
u8 algorithm; => compression algorithm
=> 0:lzo, 1:lz4, 2:zstd, 3:lzorle
u8 log_cluster_size; => log scale cluster size
=> 2 ~ 8
};
struct f2fs_comp_option option;
ioctl(fd, F2FS_IOC_GET_COMPRESS_OPTION, );
Signed-off-by: Daeho Jeong
---
v4: changed commit message.
v3: changed the error number more specific.
v2: added ioctl description.
---
fs/f2fs/f2fs.h | 7 +++
fs/f2fs/file.c | 30 ++
2 files changed, 37 insertions(+)
diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index 53fe2853579c..a33c90cf979b 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -433,6 +433,8 @@ static inline bool __has_cursum_space(struct f2fs_journal
*journal,
_IOR(F2FS_IOCTL_MAGIC, 19, __u64)
#define F2FS_IOC_SEC_TRIM_FILE _IOW(F2FS_IOCTL_MAGIC, 20, \
struct f2fs_sectrim_range)
+#define F2FS_IOC_GET_COMPRESS_OPTION _IOR(F2FS_IOCTL_MAGIC, 21, \
+ struct f2fs_comp_option)
/*
* should be same as XFS_IOC_GOINGDOWN.
@@ -481,6 +483,11 @@ struct f2fs_sectrim_range {
u64 flags;
};
+struct f2fs_comp_option {
+ u8 algorithm;
+ u8 log_cluster_size;
+};
+
/* for inline stuff */
#define DEF_INLINE_RESERVED_SIZE 1
static inline int get_extra_isize(struct inode *inode);
diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
index ef5a844de53f..8922ab191a9d 100644
--- a/fs/f2fs/file.c
+++ b/fs/f2fs/file.c
@@ -3936,6 +3936,33 @@ static int f2fs_sec_trim_file(struct file *filp,
unsigned long arg)
return ret;
}
+static int f2fs_ioc_get_compress_option(struct file *filp, unsigned long arg)
+{
+ struct inode *inode = file_inode(filp);
+ struct f2fs_comp_option option;
+
+ if (!f2fs_sb_has_compression(F2FS_I_SB(inode)))
+ return -EOPNOTSUPP;
+
+ inode_lock(inode);
+
+ if (!f2fs_compressed_file(inode)) {
+ inode_unlock(inode);
+ return -ENODATA;
+ }
+
+ option.algorithm = F2FS_I(inode)->i_compress_algorithm;
+ option.log_cluster_size = F2FS_I(inode)->i_log_cluster_size;
+
+ inode_unlock(inode);
+
+ if (copy_to_user((struct f2fs_comp_option __user *)arg, ,
+ sizeof(option)))
+ return -EFAULT;
+
+ return 0;
+}
+
long f2fs_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
{
if (unlikely(f2fs_cp_error(F2FS_I_SB(file_inode(filp)
@@ -4024,6 +4051,8 @@ long f2fs_ioctl(struct file *filp, unsigned int cmd,
unsigned long arg)
return f2fs_reserve_compress_blocks(filp, arg);
case F2FS_IOC_SEC_TRIM_FILE:
return f2fs_sec_trim_file(filp, arg);
+ case F2FS_IOC_GET_COMPRESS_OPTION:
+ return f2fs_ioc_get_compress_option(filp, arg);
default:
return -ENOTTY;
}
@@ -4194,6 +4223,7 @@ long f2fs_compat_ioctl(struct file *file, unsigned int
cmd, unsigned long arg)
case F2FS_IOC_RELEASE_COMPRESS_BLOCKS:
case F2FS_IOC_RESERVE_COMPRESS_BLOCKS:
case F2FS_IOC_SEC_TRIM_FILE:
+ case F2FS_IOC_GET_COMPRESS_OPTION:
break;
default:
return -ENOIOCTLCMD;
--
2.29.0.rc2.309.g374f81d7ae-goog
[PATCH] bus: mhi: core: Fix null pointer access
From: carl
function parse_ev_cfg and parse_ch_cfg access mhi_cntrl->mhi_dev
before it is set in function mhi_register_controller,
use cntrl_dev to instead mhi_dev.
Signed-off-by: carl
---
drivers/bus/mhi/core/init.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c
index 0ffdebde8..c6b43e90b 100644
--- a/drivers/bus/mhi/core/init.c
+++ b/drivers/bus/mhi/core/init.c
@@ -610,7 +610,7 @@ static int parse_ev_cfg(struct mhi_controller *mhi_cntrl,
{
struct mhi_event *mhi_event;
const struct mhi_event_config *event_cfg;
- struct device *dev = _cntrl->mhi_dev->dev;
+ struct device *dev = mhi_cntrl->cntrl_dev;
int i, num;
num = config->num_events;
@@ -692,7 +692,7 @@ static int parse_ch_cfg(struct mhi_controller *mhi_cntrl,
const struct mhi_controller_config *config)
{
const struct mhi_channel_config *ch_cfg;
- struct device *dev = _cntrl->mhi_dev->dev;
+ struct device *dev = mhi_cntrl->cntrl_dev;
int i;
u32 chan;
--
2.17.1
[rcu:dev.2020.10.22a] BUILD SUCCESS e8b795e5dd23eaf0f7e9e75121d82a16f1c722db
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git dev.2020.10.22a branch HEAD: e8b795e5dd23eaf0f7e9e75121d82a16f1c722db kcsan: Never set up watchpoints on NULL pointers elapsed time: 720m configs tested: 107 configs skipped: 2 The following configs have been built successfully. More configs may be tested in the coming days. gcc tested configs: arm defconfig arm64allyesconfig arm64 defconfig arm allyesconfig arm allmodconfig sh landisk_defconfig powerpc obs600_defconfig mips decstation_defconfig arm sama5_defconfig m68k m5249evb_defconfig mipsmaltaup_xpa_defconfig sh secureedge5410_defconfig mips rbtx49xx_defconfig sh sh7710voipgw_defconfig powerpc mpc85xx_cds_defconfig sh rsk7264_defconfig ia64defconfig riscvallyesconfig powerpc sbc8548_defconfig arm exynos_defconfig xtensa virt_defconfig mips bmips_stb_defconfig pariscgeneric-32bit_defconfig arm integrator_defconfig arm simpad_defconfig sh espt_defconfig arm iop32x_defconfig xtensa defconfig armmulti_v7_defconfig xtensa nommu_kc705_defconfig arc axs101_defconfig powerpc linkstation_defconfig c6x defconfig sh j2_defconfig mipsgpr_defconfig shmigor_defconfig arm stm32_defconfig powerpcgamecube_defconfig arm assabet_defconfig mips pistachio_defconfig ia64 allmodconfig ia64 allyesconfig m68k allmodconfig m68kdefconfig m68k allyesconfig nios2 defconfig arc allyesconfig nds32 allnoconfig c6x allyesconfig nds32 defconfig nios2allyesconfig cskydefconfig alpha defconfig alphaallyesconfig xtensa allyesconfig h8300allyesconfig arc defconfig sh allmodconfig parisc defconfig s390 allyesconfig parisc allyesconfig s390defconfig i386 allyesconfig sparcallyesconfig sparc defconfig i386defconfig mips allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig powerpc allnoconfig i386 randconfig-a002-20201026 i386 randconfig-a003-20201026 i386 randconfig-a005-20201026 i386 randconfig-a001-20201026 i386 randconfig-a006-20201026 i386 randconfig-a004-20201026 x86_64 randconfig-a011-20201026 x86_64 randconfig-a013-20201026 x86_64 randconfig-a016-20201026 x86_64 randconfig-a015-20201026 x86_64 randconfig-a012-20201026 x86_64 randconfig-a014-20201026 i386 randconfig-a016-20201026 i386 randconfig-a015-20201026 i386 randconfig-a014-20201026 i386 randconfig-a012-20201026 i386 randconfig-a013-20201026 i386 randconfig-a011-20201026 riscvnommu_k210_defconfig riscvnommu_virt_defconfig riscv allnoconfig riscv defconfig riscv rv32_defconfig riscvallmodconfig x86_64 rhel x86_64 allyesconfig x86_64rhel-7.6-kselftests x86_64 defconfig x86_64 rhel-8.3 x86_64
linux-next: Tree for Oct 27
Hi all, Changes since 20201026: Removed trees: unifier-fixes, unifier (no longer maintained) The sunxi tree gained a build failure for which I reverted a commit. The vfs tree gained a bad merge for which I added a fix patch. The v4l-dvb-next tree gained a conflict against the kunit-fixes tree. The amdgpu tree gained a conflict against Linus' tree and a build failure so I used the version from next-20201026. The drm-misc tree gained conflicts against Linus' tree. Non-merge commits (relative to Linus' tree): 1177 1552 files changed, 307467 insertions(+), 15104 deletions(-) I have created today's linux-next tree at git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git (patches at http://www.kernel.org/pub/linux/kernel/next/ ). If you are tracking the linux-next tree using git, you should not use "git pull" to do so as that will try to merge the new linux-next release with the old one. You should use "git fetch" and checkout or reset to the new master. You can see which trees have been included by looking in the Next/Trees file in the source. There are also quilt-import.log and merge.log files in the Next directory. Between each merge, the tree was built with a ppc64_defconfig for powerpc, an allmodconfig for x86_64, a multi_v7_defconfig for arm and a native build of tools/perf. After the final fixups (if any), I do an x86_64 modules_install followed by builds for x86_64 allnoconfig, powerpc allnoconfig (32 and 64 bit), ppc44x_defconfig, allyesconfig and pseries_le_defconfig and i386, sparc and sparc64 defconfig and htmldocs. And finally, a simple boot test of the powerpc pseries_le_defconfig kernel in qemu (with and without kvm enabled). Below is a summary of the state of the merge. I am currently merging 327 trees (counting Linus' and 85 trees of bug fix patches pending for the current merge release). Stats about the size of the tree over time can be seen at http://neuling.org/linux-next-size.html . Status of my local build tests will be at http://kisskb.ellerman.id.au/linux-next . If maintainers want to give advice about cross compilers/configs that work, we are always open to add more builds. Thanks to Randy Dunlap for doing many randconfig builds. And to Paul Gortmaker for triage and bug fixes. -- Cheers, Stephen Rothwell $ git checkout master $ git reset --hard stable Merging origin/master (41ba50b0572e Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6) Merging fixes/fixes (9123e3a74ec7 Linux 5.9-rc1) Merging kbuild-current/fixes (f11901ed723d Merge tag 'xfs-5.10-merge-7' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linux) Merging arc-current/for-curr (3650b228f83a Linux 5.10-rc1) Merging arm-current/fixes (9123e3a74ec7 Linux 5.9-rc1) Merging arm64-fixes/for-next/fixes (0fa97e9403c7 arm64: vdso32: Allow ld.lld to properly link the VDSO) Merging arm-soc-fixes/arm/fixes (dff61e683e74 Merge tag 'imx-fixes-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes) Merging drivers-memory-fixes/fixes (3650b228f83a Linux 5.10-rc1) Merging m68k-current/for-linus (50c5feeea0af ide/macide: Convert Mac IDE driver to platform driver) Merging powerpc-fixes/fixes (4ff753feab02 powerpc/pseries: Avoid using addr_to_pfn in real mode) Merging s390-fixes/fixes (8e90b4b1305a s390: correct __bootdata / __bootdata_preserved macros) Merging sparc/master (0a95a6d1a4cd sparc: use for_each_child_of_node() macro) Merging fscrypt-current/for-stable (2b4eae95c736 fscrypt: don't evict dirty inodes after removing key) Merging net/master (435ccfa894e3 tcp: Prevent low rmem stalls with SO_RCVLOWAT.) Merging bpf/master (472547778de2 selftest/bpf: Fix profiler test using CO-RE relocation for enums) Merging ipsec/master (a779d91314ca net: xfrm: fix a race condition during allocing spi) Merging netfilter/master (c77761c8a594 netfilter: nf_fwd_netdev: clear timestamp in forwarding path) Merging ipvs/master (48d072c4e8cd selftests: netfilter: add time counter check) Merging wireless-drivers/master (3650b228f83a Linux 5.10-rc1) Merging mac80211/master (435ccfa894e3 tcp: Prevent low rmem stalls with SO_RCVLOWAT.) Merging rdma-fixes/for-rc (3650b228f83a Linux 5.10-rc1) Merging sound-current/for-linus (2a6eca16f376 ALSA: make snd_kcontrol_new name a normal string) Merging sound-asoc-fixes/for-linus (8099fe48df2c Merge remote-tracking branch 'asoc/for-5.10' into asoc-linus) Merging regmap-fixes/for-linus (3493d90df3aa Merge remote-tracking branch 'regmap/for-5.10' into regmap-linus) Merging regulator-fixes/for-linus (dc3afaa95f47 Merge remote-tracking branch 'regulator/for-5.10' into regulator-linus) Merging spi-fixes/for-linus (91cbcc28a2ee Merge remote-tracking branch 'spi/for-5.10' into spi-linus) Merging pci-current/for-linus (3650b228f83a Linux 5.10-rc1) Merging driver-core.current/driver-core-linus (3650b228f83a Linux 5.10-rc1)
[tip:x86/cleanups] BUILD SUCCESS 3adb776384f2042ef6bda876e91a7a7ac2872c5e
allyesconfig arc defconfig sh allmodconfig parisc defconfig s390 allyesconfig parisc allyesconfig s390defconfig i386 allyesconfig sparcallyesconfig sparc defconfig i386defconfig mips allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig powerpc allnoconfig i386 randconfig-a002-20201026 i386 randconfig-a003-20201026 i386 randconfig-a005-20201026 i386 randconfig-a001-20201026 i386 randconfig-a006-20201026 i386 randconfig-a004-20201026 x86_64 randconfig-a011-20201026 x86_64 randconfig-a013-20201026 x86_64 randconfig-a016-20201026 x86_64 randconfig-a015-20201026 x86_64 randconfig-a012-20201026 x86_64 randconfig-a014-20201026 i386 randconfig-a016-20201026 i386 randconfig-a015-20201026 i386 randconfig-a014-20201026 i386 randconfig-a012-20201026 i386 randconfig-a013-20201026 i386 randconfig-a011-20201026 riscvnommu_k210_defconfig riscvallyesconfig riscvnommu_virt_defconfig riscv allnoconfig riscv defconfig riscv rv32_defconfig riscvallmodconfig x86_64 rhel x86_64rhel-7.6-kselftests x86_64 defconfig x86_64 rhel-8.3 x86_64 kexec clang tested configs: x86_64 randconfig-a001-20201026 x86_64 randconfig-a003-20201026 x86_64 randconfig-a002-20201026 x86_64 randconfig-a006-20201026 x86_64 randconfig-a004-20201026 x86_64 randconfig-a005-20201026 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
RE: [PATCH] ath10k: add option for chip-id based BDF selection
> -Original Message-
> From: Doug Anderson
> Sent: Tuesday, October 27, 2020 4:21 AM
> To: Rakesh Pillai
> Cc: Abhishek Kumar ; Kalle Valo
> ; ath10k ; LKML
> ; linux-wireless wirel...@vger.kernel.org>; Brian Norris
> Subject: Re: [PATCH] ath10k: add option for chip-id based BDF selection
>
> Hi,
>
> On Sat, Oct 24, 2020 at 9:40 AM Rakesh Pillai wrote:
> >
> > > if (bd_ie_type == ATH10K_BD_IE_BOARD) {
> > > + /* With variant and chip id */
> > > ret = ath10k_core_create_board_name(ar, boardname,
> > > - sizeof(boardname),
> > > true);
> > > + sizeof(boardname), true,
> > > true);
> >
> > Instead of adding a lot of code to generate a second fallback name, its
> better to just modify the condition inside the function
> “ath10k_core_create_board_name” to allow the generation of BDF tag using
> chip id, even “if ar->id.bdf_ext[0] == '\0 “.
> >
> > This will make sure that the variant string is NULL, and just board-id and
> chip-id is used. This will help avoid most of the code changes.
> > The code would look as shown below
> >
> > @@ -1493,7 +1493,7 @@ static int ath10k_core_create_board_name(struct
> ath10k *ar, char *name,
> > }
> >
> > if (ar->id.qmi_ids_valid) {
> > - if (with_variant && ar->id.bdf_ext[0] != '\0')
> > + if (with_variant)
>
> Wouldn't the above just be "if (with_chip_id)" instead? ...but yeah,
> that would be a cleaner way to do this. Abhishek: do you want to post
> a v2?
The parameter name passed to this function is "with_variant", since other
non-qmi targets (eg QCA6174) use this as a flag to just add the variant field.
This can be renamed to something meaningful for both qmi and non-qmi targets.
>
> -Doug
Re: [PATCH v3 1/2] kunit: Support for Parameterized Testing
On 27/10/20 4:44 am, Marco Elver wrote:
> On Mon, 26 Oct 2020 at 19:36, Arpitha Raghunandan <98.a...@gmail.com> wrote:
>>
>> Implementation of support for parameterized testing in KUnit.
>> This approach requires the creation of a test case using the
>> KUNIT_CASE_PARAM macro that accepts a generator function as input.
>> This generator function should return the next parameter given the
>> previous parameter in parameterized tests. It also provides
>> a macro to generate common-case generators.
>>
>> Signed-off-by: Arpitha Raghunandan <98.a...@gmail.com>
>> Co-developed-by: Marco Elver
>> Signed-off-by: Marco Elver
>> ---
>> Changes v2->v3:
>> - Modifictaion of generator macro and method
>
> Great to see it worked as expected!
>
>> Changes v1->v2:
>> - Use of a generator method to access test case parameters
>>
>> include/kunit/test.h | 32
>> lib/kunit/test.c | 20 +++-
>> 2 files changed, 51 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/kunit/test.h b/include/kunit/test.h
>> index a423fffefea0..16bf9f334e2c 100644
>> --- a/include/kunit/test.h
>> +++ b/include/kunit/test.h
>> @@ -142,6 +142,12 @@ struct kunit_case {
>> void (*run_case)(struct kunit *test);
>> const char *name;
>>
>> + /*
>> +* Pointer to test parameter generator function.
>> +* Used only for parameterized tests.
>
> What I meant was to give a description of the protocol, so that if
> somebody wanted, they could (without reading the implementation)
> implement their own custom generator without the helper macro.
>
> E.g. something like: "The generator function is used to lazily
> generate a series of arbitrarily typed values that fit into a void*.
> The argument @prev is the previously returned value, which should be
> used to derive the next value; @prev is set to NULL on the initial
> generator call. When no more values are available, the generator must
> return NULL."
>
Oh okay. I am not sure if this is the best place to add documentation for this.
>> +*/
>> + void* (*generate_params)(void *prev);
>> +
>> /* private: internal use only. */
>> bool success;
>> char *log;
>> @@ -162,6 +168,9 @@ static inline char *kunit_status_to_string(bool status)
>> * kunit_case for an example on how to use it.
>> */
>> #define KUNIT_CASE(test_name) { .run_case = test_name, .name = #test_name }
>> +#define KUNIT_CASE_PARAM(test_name, gen_params)\
>> + { .run_case = test_name, .name = #test_name,\
>> + .generate_params = gen_params }
>>
>> /**
>> * struct kunit_suite - describes a related collection of kunit_case
>> @@ -208,6 +217,15 @@ struct kunit {
>> const char *name; /* Read only after initialization! */
>> char *log; /* Points at case log after initialization */
>> struct kunit_try_catch try_catch;
>> + /* param_values points to test case parameters in parameterized
>> tests */
>> + void *param_values;
>> + /*
>> +* current_param stores the index of the parameter in
>> +* the array of parameters in parameterized tests.
>> +* current_param + 1 is printed to indicate the parameter
>> +* that causes the test to fail in case of test failure.
>> +*/
>> + int current_param;
>> /*
>> * success starts as true, and may only be set to false during a
>> * test case; thus, it is safe to update this across multiple
>> @@ -1742,4 +1760,18 @@ do {
>> \
>> fmt,
>> \
>> ##__VA_ARGS__)
>>
>> +/**
>> + * KUNIT_PARAM_GENERATOR() - Helper method for test parameter generators
>> + * required in parameterized tests.
>
> This is only for arrays, which is why I suggested KUNIT_ARRAY_PARAM()
> as the name.
>
> A generator can very well be implemented without an array, so this
> macro name is confusing. In future somebody might want to provide a
> macro that takes a start + end value (and maybe a step value) to
> generate a series of values. That generator could be named
> KUNIT_RANGE_PARAM(name, start, end, step) and gives us a generator
> that is also named name##_gen_params. (If you want to try implementing
> that macro, I'd suggest doing it as a separate patch.)
>
> And I don't think we need to put "GENERATOR" into the name of these
> macros, because the generators are now the fundamental method with
> which to get parameterized tests. We don't need to state the obvious,
> in favor of some brevity.
>
Okay, makes sense. I will change it to KUNIT_ARRAY_PARAM() for the next version.
>> + * @name: prefix of the name for the test parameter generator function.
>> + * @prev: a pointer to the previous test parameter, NULL
Re: [PATCH v6 46/52] opp: Put interconnect paths outside of opp_table_lock
On 26-10-20, 01:17, Dmitry Osipenko wrote:
> This patch fixes lockup which happens when OPP table is released if
> interconnect provider uses OPP in the icc_provider->set() callback
> and bandwidth of the ICC path is set to 0 by the ICC core when path
> is released. The icc_put() doesn't need the opp_table_lock protection,
> hence let's move it outside of the lock in order to resolve the problem.
>
> In particular this fixes tegra-devfreq driver lockup on trying to unload
> the driver module. The devfreq driver uses OPP-bandwidth API and its ICC
> provider also uses OPP for DVFS, hence they both take same opp_table_lock
> when OPP table of the devfreq is released.
>
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/opp/core.c | 21 ++---
> 1 file changed, 14 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/opp/core.c b/drivers/opp/core.c
> index 2483e765318a..1134df360fe0 100644
> --- a/drivers/opp/core.c
> +++ b/drivers/opp/core.c
> @@ -1187,12 +1187,6 @@ static void _opp_table_kref_release(struct kref *kref)
> if (!IS_ERR(opp_table->clk))
> clk_put(opp_table->clk);
>
> - if (opp_table->paths) {
> - for (i = 0; i < opp_table->path_count; i++)
> - icc_put(opp_table->paths[i]);
> - kfree(opp_table->paths);
> - }
> -
> WARN_ON(!list_empty(_table->opp_list));
>
> list_for_each_entry_safe(opp_dev, temp, _table->dev_list, node) {
> @@ -1209,9 +1203,22 @@ static void _opp_table_kref_release(struct kref *kref)
> mutex_destroy(_table->genpd_virt_dev_lock);
> mutex_destroy(_table->lock);
> list_del(_table->node);
> - kfree(opp_table);
>
> mutex_unlock(_table_lock);
> +
> + /*
> + * Interconnect provider may use OPP too, hence icc_put() needs to be
> + * invoked outside of the opp_table_lock in order to prevent nested
> + * locking which happens when bandwidth of the ICC path is set to 0
> + * by ICC core on release of the path.
> + */
> + if (opp_table->paths) {
> + for (i = 0; i < opp_table->path_count; i++)
> + icc_put(opp_table->paths[i]);
> + kfree(opp_table->paths);
> + }
> +
> + kfree(opp_table);
> }
Never make such _fixes_ part of such a big patchset. Always send them
separately.
Having said that, I already have a patch with me which shall fix it for you as
well:
diff --git a/drivers/opp/core.c b/drivers/opp/core.c
index 4ac4e7ce6b8b..0e0a5269dc82 100644
--- a/drivers/opp/core.c
+++ b/drivers/opp/core.c
@@ -1181,6 +1181,10 @@ static void _opp_table_kref_release(struct kref *kref)
struct opp_device *opp_dev, *temp;
int i;
+ /* Drop the lock as soon as we can */
+ list_del(_table->node);
+ mutex_unlock(_table_lock);
+
_of_clear_opp_table(opp_table);
/* Release clk */
@@ -1208,10 +1212,7 @@ static void _opp_table_kref_release(struct kref *kref)
mutex_destroy(_table->genpd_virt_dev_lock);
mutex_destroy(_table->lock);
- list_del(_table->node);
kfree(opp_table);
-
- mutex_unlock(_table_lock);
}
void dev_pm_opp_put_opp_table(struct opp_table *opp_table)
--
viresh
Re: [PATCH v2] perf trace: Segfault when trying to trace events by cgroup
Hello,
On Mon, Oct 26, 2020 at 10:21 PM Stanislav Ivanichkin
wrote:
>
> v2:
> - struct declaration fixed (Namhyung Kim)
>
> Fixes: 9ea42ba4411ac ("perf trace: Support setting cgroups as targets")
> Signed-off-by: Stanislav Ivanichkin
Looks ok but you'd better add the commit description in v1.
Acked-by: Namhyung Kim
Thanks
Namhyung
> ---
> tools/perf/builtin-trace.c | 15 +--
> 1 file changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/tools/perf/builtin-trace.c b/tools/perf/builtin-trace.c
> index 44a75f234db1..de80534473af 100644
> --- a/tools/perf/builtin-trace.c
> +++ b/tools/perf/builtin-trace.c
> @@ -4639,9 +4639,9 @@ static int trace__parse_events_option(const struct
> option *opt, const char *str,
> err = 0;
>
> if (lists[0]) {
> - struct option o = OPT_CALLBACK('e', "event", >evlist,
> "event",
> - "event selector. use 'perf
> list' to list available events",
> - parse_events_option);
> + struct option o = {
> + .value = >evlist,
> + };
> err = parse_events_option(, lists[0], 0);
> }
> out:
> @@ -4655,9 +4655,12 @@ static int trace__parse_cgroups(const struct option
> *opt, const char *str, int u
> {
> struct trace *trace = opt->value;
>
> - if (!list_empty(>evlist->core.entries))
> - return parse_cgroups(opt, str, unset);
> -
> + if (!list_empty(>evlist->core.entries)) {
> + struct option o = {
> + .value = >evlist,
> + };
> + return parse_cgroups(, str, unset);
> + }
> trace->cgroup = evlist__findnew_cgroup(trace->evlist, str);
>
> return 0;
> --
> 2.17.1
>
Re: Perf raw sample overflows perf record
+ LKML On Sat, Oct 24, 2020 at 8:44 AM George Prekas wrote: > > The header of a perf sample has a u16 field for the size of the record. > On the other hand, a PERF_SAMPLE_RAW has a u32 field for its size. > > I've written a test perf driver that creates large raw samples and it > doesn't work correctly (as expected). For example, perf record fails with: > > Can't parse sample, err = -14 > 0x4688 [0x8]: failed to process type: 68 [Bad address] > > Is this expected? Is the developer of the perf driver responsible to > make sure that each perf record does not exceed 64KB in size? If that's > the case, I am wondering why the raw sample has a u32 for its size. For the large records, you may consider an auxtrace interface. Thanks Namhyung
Re: [Regression] "tpm: Require that all digests are present in TCG_PCR_EVENT2 structures" causes null pointer dereference
On 2020-10-26 13:49:59, Kai-Heng Feng wrote: > > > > On Oct 21, 2020, at 13:48, Tyler Hicks wrote: > > > > On 2020-10-20 17:07:50, Mimi Zohar wrote: > >> On Tue, 2020-09-29 at 13:52 -0400, Mimi Zohar wrote: > >>> On Mon, 2020-09-28 at 22:16 +0800, Kai-Heng Feng wrote: > Hi Jarkko, > > > On Sep 28, 2020, at 22:06, Jarkko Sakkinen > > wrote: > > > > On Mon, Sep 28, 2020 at 08:31:04PM +0800, Kai-Heng Feng wrote: > >> Commit 7f3d176f5f7e "tpm: Require that all digests are present in > >> TCG_PCR_EVENT2 structures" causes a null pointer dereference on all > >> laptops I have: > > > > ... > > > >> [ 17.868849] BUG: kernel NULL pointer dereference, address: > >> 002c > >> [ 17.868852] #PF: supervisor read access in kernel mode > >> [ 17.868854] #PF: error_code(0x) - not-present page > >> [ 17.868855] PGD 0 P4D 0 > >> [ 17.868858] Oops: [#1] SMP PTI > >> [ 17.868860] CPU: 0 PID: 1873 Comm: fwupd Not tainted 5.8.0-rc6+ #25 > >> [ 17.868861] Hardware name: LENOVO 20LAZ3TXCN/20LAZ3TXCN, BIOS > >> N27ET38W (1.24 ) 11/28/2019 > >> [ 17.868866] RIP: 0010:tpm2_bios_measurements_start+0x38/0x1f0 > >> [ 17.868868] Code: 55 41 54 53 48 83 ec 30 4c 8b 16 65 48 8b 04 25 > >> 28 00 00 00 48 89 45 d0 48 8b 47 70 4c 8b a0 d0 06 00 00 48 8b 88 d8 > >> 06 00 00 <41> 8b 5c 24 1c 48 89 4d b0 48 89 d8 48 83 c3 20 4d 85 d2 75 > >> 31 4c > >> [ 17.868869] RSP: 0018:9da500a9fde0 EFLAGS: 00010282 > >> [ 17.868871] RAX: 917d03dc4000 RBX: RCX: > >> 0010 > >> [ 17.868872] RDX: 1000 RSI: 917c99b19460 RDI: > >> 917c99b19438 > >> [ 17.868873] RBP: 9da500a9fe38 R08: bda4ffa33fc0 R09: > >> 917cbfeae4c0 > >> [ 17.868874] R10: R11: 0002 R12: > >> 0010 > >> [ 17.868875] R13: 917c99b19438 R14: 917c99b19460 R15: > >> 917c99b19470 > >> [ 17.868876] FS: 7f9d80988b00() GS:917d0740() > >> knlGS: > >> [ 17.868877] CS: 0010 DS: ES: CR0: 80050033 > >> [ 17.868878] CR2: 002c CR3: 000219b12004 CR4: > >> 003606f0 > >> [ 17.868879] Call Trace: > >> [ 17.868884] seq_read+0x95/0x470 > >> [ 17.868887] ? security_file_permission+0x150/0x160 > >> [ 17.868889] vfs_read+0xaa/0x190 > >> [ 17.868891] ksys_read+0x67/0xe0 > >> [ 17.868893] __x64_sys_read+0x1a/0x20 > >> [ 17.868896] do_syscall_64+0x52/0xc0 > >> [ 17.868898] entry_SYSCALL_64_after_hwframe+0x44/0xa9 > >> [ 17.868900] RIP: 0033:0x7f9d83be91dc > >> [ 17.868901] Code: Bad RIP value. > >> [ 17.868902] RSP: 002b:7fff7f5e0250 EFLAGS: 0246 ORIG_RAX: > >> > >> [ 17.868903] RAX: ffda RBX: 5651d262f420 RCX: > >> 7f9d83be91dc > >> [ 17.868904] RDX: 1000 RSI: 7fff7f5e0350 RDI: > >> 0010 > >> [ 17.868905] RBP: 7f9d83cc54a0 R08: R09: > >> 5651d26c1830 > >> [ 17.868906] R10: 5651d2582010 R11: 0246 R12: > >> 1000 > >> [ 17.868907] R13: 7fff7f5e0350 R14: 0d68 R15: > >> 7f9d83cc48a0 > >> [ 17.868909] Modules linked in: rfcomm ccm cmac algif_hash > >> algif_skcipher af_alg snd_hda_codec_hdmi snd_hda_codec_realtek > >> snd_hda_codec_generic bnep joydev mei_hdcp wmi_bmof intel_rapl_msr > >> intel_wmi_thunderbolt x86_pkg_temp_thermal intel_powerclamp coretemp > >> nls_iso8859_1 kvm_intel kvm crct10dif_pclmul crc32_pclmul > >> ghash_clmulni_intel aesni_intel glue_helper crypto_simd cryptd rapl > >> input_leds intel_cstate snd_hda_intel snd_intel_dspcfg rmi_smbus > >> iwlmvm snd_hda_codec serio_raw snd_hwdep mac80211 rmi_core > >> snd_hda_core libarc4 uvcvideo snd_pcm videobuf2_vmalloc btusb > >> videobuf2_memops iwlwifi videobuf2_v4l2 btrtl btbcm videobuf2_common > >> btintel thunderbolt i915 bluetooth mei_me videodev thinkpad_acpi nvram > >> cfg80211 ledtrig_audio mei mc ecdh_generic ecc i2c_algo_bit > >> processor_thermal_device snd_seq_midi drm_kms_helper > >> snd_seq_midi_event intel_soc_dts_iosf syscopyarea sysfillrect > >> snd_rawmidi intel_pch_thermal sysimgblt intel_rapl_common > >> intel_xhci_usb_role_switch fb_sys_fops > >> u > >>> cs > i_acpi r > o > > les cec > >> [ 17.868935] typec_ucsi typec nxp_nci_i2c snd_seq nxp_nci wmi nci > >> nfc snd_timer snd_seq_device snd int3403_thermal soundcore > >> int340x_thermal_zone video mac_hid int3400_thermal acpi_pad > >> acpi_thermal_rel sch_fq_codel parport_pc ppdev lp parport drm > >> ip_tables x_tables autofs4 btrfs blake2b_generic
Re: [PATCH v2 2/2] perf stat: Support regex pattern in --for-each-cgroup
Hi Arnaldo, On Tue, Oct 27, 2020 at 2:53 AM Arnaldo Carvalho de Melo wrote: > > Em Mon, Oct 26, 2020 at 09:32:34PM +0900, Namhyung Kim escreveu: > > Hi Jiri, > > > > On Mon, Oct 26, 2020 at 8:40 PM Jiri Olsa wrote: > > > also perhaps we want to warn if there's no match found: > > > > > > $ sudo ./perf stat -a -e cpu-clock,cycles --for-each-cgroup ^foo > > > sleep 1 > > > > > > Performance counter stats for 'system wide': > > > > > > > > >1.002375575 seconds time elapsed > > > > > > > Right, will check this case. > > Hum, I thought that could be done on top of this one, but then, the > ambiguity of: > > 1. No samples for a cgroups matching that expression > > 2. No cgroups match that expression > > Is real and warrants a warning for the 'no cgroups match the > --for-each-group regexp' case. The 1 will be handled by perf stat showing and I'll add a warning for the item 2 like below: # perf stat -a -e cycles --for-each-cgroup ^foo sleep 1 no cgroup matched: ^foo Usage: perf stat [] [] --for-each-cgroup expand events for each cgroup Thanks Namhyung
Re: linux-next: build failure after merge of the vfs tree
On Tue, Oct 27, 2020 at 03:14:14PM +1100, Stephen Rothwell wrote:
> Hi all,
>
> After merging the vfs tree, today's linux-next build (sparc_defconfig)
> failed like this:
>
> arch/sparc/lib/memset.S: Assembler messages:
> arch/sparc/lib/memset.S:149: Error: Unknown opcode: `ext(12b, 13b,21f)'
>
> Caused by commit
>
> 0e0bbae08a6e ("sparc32: switch __bzero() away from range exception table
> entries")
>
> merging badly with commit
>
> 7780918b3648 ("sparc32: fix a user-triggerable oops in clear_user()")
>
> from the sparc tree.
>
> The sparc tree commit above appears as commit
>
> 80537bbf19d6 ("sparc32: fix a user-triggerable oops in clear_user()")
>
> in the vfs tree as well. The patch adds one line which is later removed
> by commit
>
> 0e0bbae08a6e ("sparc32: switch __bzero() away from range exception table
> entries")
>
> in the vfs tree, but the git merge puts the line back again :-(
>
> I have added the following fix to the vfs tree merge
I'll rebase that branch on top of sparc tree tomorrow (and eventually I'd like
it to go through the sparc tree anyway).
[v2 07/11] arm64: dts: ls208xa: add DT node for external interrupt lines
From: Biwen Li
Add device-tree node for external interrupt lines IRQ0-IRQ11.
Signed-off-by: Biwen Li
---
Change in v2:
- none
.../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 33 ++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index 41102dacc2e1..f75aa2ce4e2b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -3,7 +3,7 @@
* Device Tree Include file for Freescale Layerscape-2080A family SoC.
*
* Copyright 2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017-2020 NXP
*
* Abhimanyu Saini
*
@@ -154,6 +154,37 @@
little-endian;
};
+ isc: syscon@1f7 {
+ compatible = "fsl,ls2080a-isc", "syscon";
+ reg = <0x0 0x1f7 0x0 0x1>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x1f7 0x1>;
+
+ extirq: interrupt-controller@14 {
+ compatible = "fsl,ls2080a-extirq",
"fsl,ls1088a-extirq";
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x14 4>;
+ interrupt-map =
+ <0 0 GIC_SPI 0
IRQ_TYPE_LEVEL_HIGH>,
+ <1 0 GIC_SPI 1
IRQ_TYPE_LEVEL_HIGH>,
+ <2 0 GIC_SPI 2
IRQ_TYPE_LEVEL_HIGH>,
+ <3 0 GIC_SPI 3
IRQ_TYPE_LEVEL_HIGH>,
+ <4 0 GIC_SPI 4
IRQ_TYPE_LEVEL_HIGH>,
+ <5 0 GIC_SPI 5
IRQ_TYPE_LEVEL_HIGH>,
+ <6 0 GIC_SPI 6
IRQ_TYPE_LEVEL_HIGH>,
+ <7 0 GIC_SPI 7
IRQ_TYPE_LEVEL_HIGH>,
+ <8 0 GIC_SPI 8
IRQ_TYPE_LEVEL_HIGH>,
+ <9 0 GIC_SPI 9
IRQ_TYPE_LEVEL_HIGH>,
+ <10 0 GIC_SPI 10
IRQ_TYPE_LEVEL_HIGH>,
+ <11 0 GIC_SPI 11
IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0x 0x0>;
+ };
+ };
+
tmu: tmu@1f8 {
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f8 0x0 0x1>;
--
2.17.1
[v2 08/11] arm64: dts: ls208xa-rdb: add interrupt line for RTC node
From: Biwen Li
Add interrupt line for RTC node on ls208xa-rdb
Signed-off-by: Biwen Li
---
Change in v2:
- none
arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
index d0d670227ae2..4b71c4fcb35f 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
@@ -3,7 +3,7 @@
* Device Tree file for Freescale LS2080A RDB Board.
*
* Copyright 2016 Freescale Semiconductor, Inc.
- * Copyright 2017 NXP
+ * Copyright 2017-2020 NXP
*
* Abhimanyu Saini
*
@@ -56,6 +56,8 @@
rtc@68 {
compatible = "dallas,ds3232";
reg = <0x68>;
+ /* IRQ_RTC_B -> IRQ06, active low */
+ interrupts-extended = < 6
IRQ_TYPE_LEVEL_LOW>;
};
};
--
2.17.1
[v2 09/11] arm64: dts: lx2160a: add DT node for external interrupt lines
From: Biwen Li
Add device-tree node for external interrupt lines IRQ0-IRQ11.
Signed-off-by: Biwen Li
---
Change in v2:
- none
.../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index d247e4228d60..095298a84f4e 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -664,6 +664,37 @@
little-endian;
};
+ isc: syscon@1f7 {
+ compatible = "fsl,lx2160a-isc", "syscon";
+ reg = <0x0 0x1f7 0x0 0x1>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x1f7 0x1>;
+
+ extirq: interrupt-controller@14 {
+ compatible = "fsl,lx2160a-extirq",
"fsl,ls1088a-extirq";
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x14 4>;
+ interrupt-map =
+ <0 0 GIC_SPI 0
IRQ_TYPE_LEVEL_HIGH>,
+ <1 0 GIC_SPI 1
IRQ_TYPE_LEVEL_HIGH>,
+ <2 0 GIC_SPI 2
IRQ_TYPE_LEVEL_HIGH>,
+ <3 0 GIC_SPI 3
IRQ_TYPE_LEVEL_HIGH>,
+ <4 0 GIC_SPI 4
IRQ_TYPE_LEVEL_HIGH>,
+ <5 0 GIC_SPI 5
IRQ_TYPE_LEVEL_HIGH>,
+ <6 0 GIC_SPI 6
IRQ_TYPE_LEVEL_HIGH>,
+ <7 0 GIC_SPI 7
IRQ_TYPE_LEVEL_HIGH>,
+ <8 0 GIC_SPI 8
IRQ_TYPE_LEVEL_HIGH>,
+ <9 0 GIC_SPI 9
IRQ_TYPE_LEVEL_HIGH>,
+ <10 0 GIC_SPI 10
IRQ_TYPE_LEVEL_HIGH>,
+ <11 0 GIC_SPI 11
IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0x 0x0>;
+ };
+ };
+
tmu: tmu@1f8 {
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f8 0x0 0x1>;
--
2.17.1
[v2 11/11] dt-bindings: interrupt-controller: update bindings for supporting more SoCs
From: Biwen Li Update bindings for Layerscape external irqs, support more SoCs(LS1043A, LS1046A, LS1088A, LS208xA, LX216xA) Signed-off-by: Biwen Li --- Change in v2: - update reg property - update compatible property .../bindings/interrupt-controller/fsl,ls-extirq.txt| 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt index f0ad7801e8cf..0d635c24ef8b 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt @@ -1,6 +1,7 @@ * Freescale Layerscape external IRQs -Some Layerscape SOCs (LS1021A, LS1043A, LS1046A) support inverting +Some Layerscape SOCs (LS1021A, LS1043A, LS1046A +LS1088A, LS208xA, LX216xA) support inverting the polarity of certain external interrupt lines. The device node must be a child of the node representing the @@ -8,12 +9,17 @@ Supplemental Configuration Unit (SCFG). Required properties: - compatible: should be "fsl,-extirq", e.g. "fsl,ls1021a-extirq". + "fsl,ls1043a-extirq": for LS1043A, LS1046A. SCFG_INTPCR[31:0] of these SoCs + is stored/read as SCFG_INTPCR[0:31] defaultly(bit reverse). + "fsl,ls1088a-extirq": for LS1088A, LS208xA, LX216xA. + - #interrupt-cells: Must be 2. The first element is the index of the external interrupt line. The second element is the trigger type. - #address-cells: Must be 0. - interrupt-controller: Identifies the node as an interrupt controller - reg: Specifies the Interrupt Polarity Control Register (INTPCR) in - the SCFG. + the SCFG or the External Interrupt Control Register (IRQCR) in + the ISC. - interrupt-map: Specifies the mapping from external interrupts to GIC interrupts. - interrupt-map-mask: Must be <0x 0>. -- 2.17.1
[v2 10/11] arm64: dts: lx2160ardb: fix interrupt line for RTC node
From: Biwen Li
Fix interrupt line for RTC node on lx2160ardb
Signed-off-by: Biwen Li
---
Change in v2:
- none
arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
index 54fe8cd3a711..f3bab76797fb 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
@@ -2,7 +2,7 @@
//
// Device Tree file for LX2160ARDB
//
-// Copyright 2018 NXP
+// Copyright 2018-2020 NXP
/dts-v1/;
@@ -151,8 +151,8 @@
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
- // IRQ10_B
- interrupts = <0 150 0x4>;
+ /* IRQ_RTC_B -> IRQ08, active low */
+ interrupts-extended = < 8 IRQ_TYPE_LEVEL_LOW>;
};
};
--
2.17.1
[v2 03/11] arm64: dts: ls1046a: add DT node for external interrupt lines
From: Biwen Li
Add device-tree node for external interrupt lines IRQ0-IRQ11.
Signed-off-by: Biwen Li
---
Change in v2:
- none
.../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 27 ++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 0246d975a206..dff3ee84c294 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -3,7 +3,7 @@
* Device Tree Include file for Freescale Layerscape-1046A family SoC.
*
* Copyright 2016 Freescale Semiconductor, Inc.
- * Copyright 2018 NXP
+ * Copyright 2018-2020 NXP
*
* Mingkai Hu
*/
@@ -314,6 +314,31 @@
compatible = "fsl,ls1046a-scfg", "syscon";
reg = <0x0 0x157 0x0 0x1>;
big-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x157 0x1>;
+
+ extirq: interrupt-controller@1ac {
+ compatible = "fsl,ls1046a-extirq",
"fsl,ls1043a-extirq";
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x1ac 4>;
+ interrupt-map =
+ <0 0 GIC_SPI 131
IRQ_TYPE_LEVEL_HIGH>,
+ <1 0 GIC_SPI 132
IRQ_TYPE_LEVEL_HIGH>,
+ <2 0 GIC_SPI 133
IRQ_TYPE_LEVEL_HIGH>,
+ <3 0 GIC_SPI 135
IRQ_TYPE_LEVEL_HIGH>,
+ <4 0 GIC_SPI 136
IRQ_TYPE_LEVEL_HIGH>,
+ <5 0 GIC_SPI 137
IRQ_TYPE_LEVEL_HIGH>,
+ <6 0 GIC_SPI 145
IRQ_TYPE_LEVEL_HIGH>,
+ <7 0 GIC_SPI 146
IRQ_TYPE_LEVEL_HIGH>,
+ <8 0 GIC_SPI 147
IRQ_TYPE_LEVEL_HIGH>,
+ <9 0 GIC_SPI 149
IRQ_TYPE_LEVEL_HIGH>,
+ <10 0 GIC_SPI 150
IRQ_TYPE_LEVEL_HIGH>,
+ <11 0 GIC_SPI 151
IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0x 0x0>;
+ };
};
crypto: crypto@170 {
--
2.17.1
[v2 06/11] arm64: dts: ls1088ardb: fix interrupt line for RTC node
From: Biwen Li
Fix interrupt line for RTC node on ls1088ardb
Signed-off-by: Biwen Li
---
Change in v2:
- none
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
index 5633e59febc3..89c40d3f9a50 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
@@ -2,7 +2,7 @@
/*
* Device Tree file for NXP LS1088A RDB Board.
*
- * Copyright 2017 NXP
+ * Copyright 2017-2020 NXP
*
* Harninder Rai
*
@@ -51,8 +51,8 @@
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
- /* IRQ10_B */
- interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
+ /* IRQ_RTC_B -> IRQ0_B(CPLD) -> IRQ00(CPU),
active low */
+ interrupts-extended = < 0
IRQ_TYPE_LEVEL_LOW>;
};
};
};
--
2.17.1
[v2 04/11] arm64: dts: ls1046ardb: Add interrupt line for RTC node
From: Hou Zhiqiang
Add interrupt line for RTC node, which is low level active.
Signed-off-by: Hou Zhiqiang
---
Change in v2:
- none
arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
index d53ccc56bb63..60acdf0b689e 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
@@ -3,6 +3,7 @@
* Device Tree Include file for Freescale Layerscape-1046A family SoC.
*
* Copyright 2016 Freescale Semiconductor, Inc.
+ * Copyright 2019-2020 NXP
*
* Mingkai Hu
*/
@@ -74,6 +75,8 @@
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
+ /* IRQ_RTC_B -> IRQ05, active low */
+ interrupts-extended = < 5 IRQ_TYPE_LEVEL_LOW>;
};
};
--
2.17.1
[v2 05/11] arm64: dts: ls1088a: add DT node for external interrupt lines
From: Biwen Li
Add device-tree node for external interrupt lines IRQ0-IRQ11.
Signed-off-by: Biwen Li
---
Change in v2:
- none
.../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 33 ++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 169f4742ae3b..12fe8f079c28 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -2,7 +2,7 @@
/*
* Device Tree Include file for NXP Layerscape-1088A family SoC.
*
- * Copyright 2017 NXP
+ * Copyright 2017-2020 NXP
*
* Harninder Rai
*
@@ -206,6 +206,37 @@
little-endian;
};
+ isc: syscon@1f7 {
+ compatible = "fsl,ls1088a-isc", "syscon";
+ reg = <0x0 0x1f7 0x0 0x1>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x1f7 0x1>;
+
+ extirq: interrupt-controller@14 {
+ compatible = "fsl,ls1088a-extirq";
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x14 4>;
+ interrupt-map =
+ <0 0 GIC_SPI 0
IRQ_TYPE_LEVEL_HIGH>,
+ <1 0 GIC_SPI 1
IRQ_TYPE_LEVEL_HIGH>,
+ <2 0 GIC_SPI 2
IRQ_TYPE_LEVEL_HIGH>,
+ <3 0 GIC_SPI 3
IRQ_TYPE_LEVEL_HIGH>,
+ <4 0 GIC_SPI 4
IRQ_TYPE_LEVEL_HIGH>,
+ <5 0 GIC_SPI 5
IRQ_TYPE_LEVEL_HIGH>,
+ <6 0 GIC_SPI 6
IRQ_TYPE_LEVEL_HIGH>,
+ <7 0 GIC_SPI 7
IRQ_TYPE_LEVEL_HIGH>,
+ <8 0 GIC_SPI 8
IRQ_TYPE_LEVEL_HIGH>,
+ <9 0 GIC_SPI 9
IRQ_TYPE_LEVEL_HIGH>,
+ <10 0 GIC_SPI 10
IRQ_TYPE_LEVEL_HIGH>,
+ <11 0 GIC_SPI 11
IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0x 0x0>;
+ };
+ };
+
tmu: tmu@1f8 {
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f8 0x0 0x1>;
--
2.17.1
[v2 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt
From: Hou Zhiqiang Add an new IRQ chip declaration for LS1043A and LS1088A - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A. SCFG_INTPCR[31:0] of these SoCs is stored/read as SCFG_INTPCR[0:31] defaultly(bit reverse) - compatible "fsl,ls1088a-extirq" for LS1088A, LS208xA, LX216xA Signed-off-by: Hou Zhiqiang Signed-off-by: Biwen Li --- Change in v2: - add despcription of bit reverse - update copyright drivers/irqchip/irq-ls-extirq.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-ls-extirq.c b/drivers/irqchip/irq-ls-extirq.c index 4d1179fed77c..9587bc2607fc 100644 --- a/drivers/irqchip/irq-ls-extirq.c +++ b/drivers/irqchip/irq-ls-extirq.c @@ -1,5 +1,8 @@ // SPDX-License-Identifier: GPL-2.0 - +/* + * Author: Rasmus Villemoes + * Copyright 2020 NXP + */ #define pr_fmt(fmt) "irq-ls-extirq: " fmt #include @@ -183,6 +186,9 @@ ls_extirq_of_init(struct device_node *node, struct device_node *parent) priv->bit_reverse = (revcr != 0); } + if (of_device_is_compatible(node, "fsl,ls1043a-extirq")) + priv->bit_reverse = true; + domain = irq_domain_add_hierarchy(parent_domain, 0, priv->nirq, node, _domain_ops, priv); if (!domain) @@ -195,3 +201,5 @@ ls_extirq_of_init(struct device_node *node, struct device_node *parent) } IRQCHIP_DECLARE(ls1021a_extirq, "fsl,ls1021a-extirq", ls_extirq_of_init); +IRQCHIP_DECLARE(ls1043a_extirq, "fsl,ls1043a-extirq", ls_extirq_of_init); +IRQCHIP_DECLARE(ls1088a_extirq, "fsl,ls1088a-extirq", ls_extirq_of_init); -- 2.17.1
[v2 02/11] arm64: dts: ls1043a: add DT node for external interrupt lines
From: Biwen Li
Add device-tree node for external interrupt lines IRQ0-IRQ11.
Signed-off-by: Biwen Li
---
Change in v2:
- none
.../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 27 ++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 5c2e370f6316..38a6d951ecc5 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -3,7 +3,7 @@
* Device Tree Include file for Freescale Layerscape-1043A family SoC.
*
* Copyright 2014-2015 Freescale Semiconductor, Inc.
- * Copyright 2018 NXP
+ * Copyright 2018-2020 NXP
*
* Mingkai Hu
*/
@@ -311,6 +311,31 @@
compatible = "fsl,ls1043a-scfg", "syscon";
reg = <0x0 0x157 0x0 0x1>;
big-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x157 0x1>;
+
+ extirq: interrupt-controller@1ac {
+ compatible = "fsl,ls1043a-extirq";
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x1ac 4>;
+ interrupt-map =
+ <0 0 GIC_SPI 131
IRQ_TYPE_LEVEL_HIGH>,
+ <1 0 GIC_SPI 132
IRQ_TYPE_LEVEL_HIGH>,
+ <2 0 GIC_SPI 133
IRQ_TYPE_LEVEL_HIGH>,
+ <3 0 GIC_SPI 135
IRQ_TYPE_LEVEL_HIGH>,
+ <4 0 GIC_SPI 136
IRQ_TYPE_LEVEL_HIGH>,
+ <5 0 GIC_SPI 137
IRQ_TYPE_LEVEL_HIGH>,
+ <6 0 GIC_SPI 145
IRQ_TYPE_LEVEL_HIGH>,
+ <7 0 GIC_SPI 146
IRQ_TYPE_LEVEL_HIGH>,
+ <8 0 GIC_SPI 147
IRQ_TYPE_LEVEL_HIGH>,
+ <9 0 GIC_SPI 149
IRQ_TYPE_LEVEL_HIGH>,
+ <10 0 GIC_SPI 150
IRQ_TYPE_LEVEL_HIGH>,
+ <11 0 GIC_SPI 151
IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-map-mask = <0x 0x0>;
+ };
};
crypto: crypto@170 {
--
2.17.1
Re: [RFC] perf evlist: Warn if event group has mixed sw/hw events
Hi,
On Tue, Oct 27, 2020 at 12:49 AM Alexander Shishkin
wrote:
>
> Andi Kleen writes:
>
> > On Mon, Oct 26, 2020 at 11:19:37PM +0900, Namhyung Kim wrote:
> >> This patch just added a warning before running it. I'd really want to
> >> fix the kernel if possible but don't have a good idea. Thoughts?
> >
> > The easiest fix would be some multi threading in perf stat opening, then
> > then
> > extra latencies could be mostly hidden. One thread per group would probably
> > be overkill, but just a few threads would lower the penalty significantly.
> >
> > I think that would be better than this patch and it's likely not that much
> > more complicated, as this is already a lot of code.
> >
> >> +{
> >> +const char *known_sw_pmu[] = {
> >> +"software", "tracepoint", "breakpoint", "kprobe", "uprobe",
> >> "msr"
> >
> > That's a non scalable approach. New pmus get added regularly. It would be
> > better to
> > indicate this in a generic way from the kernel.
>
> That, and also, intel_pt is a software PMU and a few of its features
> depend on intel_pt/.../ being a group leader.
Thanks for the info, that's good to know.
So do you mean intel_pt requires other HW events in the same group?
Thanks
Namhyung
Re: [RFC] perf evlist: Warn if event group has mixed sw/hw events
Hi Andi,
On Tue, Oct 27, 2020 at 12:21 AM Andi Kleen wrote:
>
> On Mon, Oct 26, 2020 at 11:19:37PM +0900, Namhyung Kim wrote:
> > This patch just added a warning before running it. I'd really want to
> > fix the kernel if possible but don't have a good idea. Thoughts?
>
> The easiest fix would be some multi threading in perf stat opening, then then
> extra latencies could be mostly hidden. One thread per group would probably
> be overkill, but just a few threads would lower the penalty significantly.
Thanks for the suggestion. Yeah we could use threads to circumvent
the problem in userspace. But I think it'd better to solve it in the kernel.
Another problem I see is when there's a concurrent perf event in the
same context. Since it holds ctx->mutex during the synchronize_rcu
the other event should wait for it too. It'd be nice if it can release the
ctx->mutex before going to sleep unless we can remove it.
>
> I think that would be better than this patch and it's likely not that much
> more complicated, as this is already a lot of code.
>
> > +{
> > + const char *known_sw_pmu[] = {
> > + "software", "tracepoint", "breakpoint", "kprobe", "uprobe",
> > "msr"
>
> That's a non scalable approach. New pmus get added regularly. It would be
> better to
> indicate this in a generic way from the kernel.
Maybe we can add a new attribute (task_ctx?) for that.
>
> > + pr_warning("WARNING: Event group has mixed hw/sw
> > events.\n"
> > +"This will slow down the perf_event_open
> > syscall.\n"
> > +"Consider putting a hw event as a
> > leader.\n\n");
>
> You really need to tell the user which group, otherwise it is hard to find
> in a large command line.
OK
Thanks
Namhyung
Re: [PATCH 2/2] Makefile.extrawarn: limit -Wnested-externs to clang
On Mon, Oct 26, 2020 at 06:48:46PM -0700, Nathan Chancellor wrote:
> On Mon, Oct 26, 2020 at 11:03:14PM +0100, Arnd Bergmann wrote:
> > From: Arnd Bergmann
> >
> > The -Wnested-externs warning has become useless with gcc, since
> > this warns every time that BUILD_BUG_ON() or similar macros
> > are used.
> >
> > Signed-off-by: Arnd Bergmann
>
> Also see:
>
> 2486baae2cf6 ("objtool: Allow nested externs to enable BUILD_BUG()")
> 6cf4ecf5c51d ("perf build: Allow nested externs to enable BUILD_BUG() usage")
>
> Reviewed-by: Nathan Chancellor
Actually, just delete this line altogether. -Wnested-externs is a GCC
only warning, the flag is only present in clang for compatibility with
GCC:
https://clang.llvm.org/docs/DiagnosticsReference.html#wnested-externs
With that, my reviewed by still stands.
Cheers,
Nathan
Re: [PATCH v2 4/4] cpufreq: schedutil: Always call drvier if need_freq_update is set
Spelling mistake in $subject (driver)
On 23-10-20, 17:36, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> Because sugov_update_next_freq() may skip a frequency update even if
> the need_freq_update flag has been set for the policy at hand, policy
> limits updates may not take effect as expected.
>
> For example, if the intel_pstate driver operates in the passive mode
> with HWP enabled, it needs to update the HWP min and max limits when
> the policy min and max limits change, respectively, but that may not
> happen if the target frequency does not change along with the limit
> at hand. In particular, if the policy min is changed first, causing
> the target frequency to be adjusted to it, and the policy max limit
> is changed later to the same value, the HWP max limit will not be
> updated to follow it as expected, because the target frequency is
> still equal to the policy min limit and it will not change until
> that limit is updated.
>
> To address this issue, modify get_next_freq() to clear
> need_freq_update only if the CPUFREQ_NEED_UPDATE_LIMITS flag is
> not set for the cpufreq driver in use (and it should be set for all
> potentially affected drivers) and make sugov_update_next_freq()
> check need_freq_update and continue when it is set regardless of
> whether or not the new target frequency is equal to the old one.
>
> Fixes: f6ebbcf08f37 ("cpufreq: intel_pstate: Implement passive mode with HWP
> enabled")
> Reported-by: Zhang Rui
> Cc: 5.9+ # 5.9+
> Signed-off-by: Rafael J. Wysocki
> ---
>
> New patch in v2.
>
> ---
> kernel/sched/cpufreq_schedutil.c |8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> Index: linux-pm/kernel/sched/cpufreq_schedutil.c
> ===
> --- linux-pm.orig/kernel/sched/cpufreq_schedutil.c
> +++ linux-pm/kernel/sched/cpufreq_schedutil.c
> @@ -102,11 +102,12 @@ static bool sugov_should_update_freq(str
> static bool sugov_update_next_freq(struct sugov_policy *sg_policy, u64 time,
> unsigned int next_freq)
> {
> - if (sg_policy->next_freq == next_freq)
> + if (sg_policy->next_freq == next_freq && !sg_policy->need_freq_update)
> return false;
>
> sg_policy->next_freq = next_freq;
> sg_policy->last_freq_update_time = time;
> + sg_policy->need_freq_update = false;
>
> return true;
> }
> @@ -164,7 +165,10 @@ static unsigned int get_next_freq(struct
> if (freq == sg_policy->cached_raw_freq && !sg_policy->need_freq_update)
> return sg_policy->next_freq;
>
> - sg_policy->need_freq_update = false;
> + if (sg_policy->need_freq_update)
> + sg_policy->need_freq_update =
> + cpufreq_driver_test_flags(CPUFREQ_NEED_UPDATE_LIMITS);
> +
The behavior here is a bit different from what we did in cpufreq.c. In cpufreq
core we are _always_ allowing the call to reach the driver's target() routine,
but here we do it only if limits have changed. Wonder if we should have similar
behavior here as well ?
Over that the code here can be rewritten a bit like:
if (sg_policy->need_freq_update)
sg_policy->need_freq_update =
cpufreq_driver_test_flags(CPUFREQ_NEED_UPDATE_LIMITS);
else if (freq == sg_policy->cached_raw_freq)
return sg_policy->next_freq;
--
viresh
[PATCH 0/1] drm/vc4: drv: Add error handding for bind
Hello all, There is a problem that if vc4_drm bind fails, a memory leak occurs on the drm_property_create side as shown below. Add error handding for drm_mode_config. unreferenced object 0xff80f5a7a6c8 (size 576): comm "swapper/0", pid 1, jiffies 4294892559 (age 181.448s) hex dump (first 32 bytes): 00 00 1e 00 00 00 00 00 00 00 00 00 00 00 00 00 f8 f1 0e f5 80 ff ff ff e0 a6 a7 f5 80 ff ff ff backtrace: [] kmem_cache_alloc+0x1a4/0x328 [<9dfa1aab>] radix_tree_node_alloc.constprop.19+0x50/0x108 [ ] idr_get_free+0x21c/0x2b8 [<99f2eea6>] idr_alloc_u32+0x68/0xf0 [<525beb52>] idr_alloc+0x44/0x80 [ ] __drm_mode_object_add+0x64/0xc0 [<2c24dfc8>] drm_mode_object_add+0x3c/0x50 [ ] drm_property_create+0xf0/0x1a0 [<2e1a296b>] drm_connector_create_standard_properties+0x30/0x130 [<7c53e4bd>] drm_mode_config_init+0x138/0x498 [ ] vc4_drm_bind+0x168/0x1f8 [<41d69f98>] try_to_bring_up_master+0x180/0x1e8 [ ] component_master_add_with_match+0xbc/0x108 [<85cea46d>] vc4_platform_drm_probe+0xd8/0x108 [ ] platform_drv_probe+0x58/0xa8 [<3822d094>] really_probe+0x10c/0x350 Best regards, Hoegeun Hoegeun Kwon (1): drm/vc4: drv: Add error handding for bind drivers/gpu/drm/vc4/vc4_drv.c | 1 + 1 file changed, 1 insertion(+) -- 2.17.1
[PATCH 1/1] drm/vc4: drv: Add error handding for bind
There is a problem that if vc4_drm bind fails, a memory leak occurs on the drm_property_create side. Add error handding for drm_mode_config. Signed-off-by: Hoegeun Kwon --- drivers/gpu/drm/vc4/vc4_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c index f1a5fd5dab6f..a17aa1db11b6 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.c +++ b/drivers/gpu/drm/vc4/vc4_drv.c @@ -314,6 +314,7 @@ static int vc4_drm_bind(struct device *dev) component_unbind_all(dev, drm); gem_destroy: vc4_gem_destroy(drm); + drm_mode_config_cleanup(drm); vc4_bo_cache_destroy(drm); dev_put: drm_dev_put(drm); -- 2.17.1
linux-next: build failure after merge of the vfs tree
Hi all,
After merging the vfs tree, today's linux-next build (sparc_defconfig)
failed like this:
arch/sparc/lib/memset.S: Assembler messages:
arch/sparc/lib/memset.S:149: Error: Unknown opcode: `ext(12b, 13b,21f)'
Caused by commit
0e0bbae08a6e ("sparc32: switch __bzero() away from range exception table
entries")
merging badly with commit
7780918b3648 ("sparc32: fix a user-triggerable oops in clear_user()")
from the sparc tree.
The sparc tree commit above appears as commit
80537bbf19d6 ("sparc32: fix a user-triggerable oops in clear_user()")
in the vfs tree as well. The patch adds one line which is later removed
by commit
0e0bbae08a6e ("sparc32: switch __bzero() away from range exception table
entries")
in the vfs tree, but the git merge puts the line back again :-(
I have added the following fix to the vfs tree merge
From: Stephen Rothwell
Date: Tue, 27 Oct 2020 15:05:28 +1100
Subject: [PATCH] fix up for merge of arch/sparc/lib/memset.S
Signed-off-by: Stephen Rothwell
---
arch/sparc/lib/memset.S | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/sparc/lib/memset.S b/arch/sparc/lib/memset.S
index 522f45a952a0..eaff68213fdf 100644
--- a/arch/sparc/lib/memset.S
+++ b/arch/sparc/lib/memset.S
@@ -146,7 +146,6 @@ __bzero:
ZERO_LAST_BLOCKS(%o0, 0x48, %g2)
ZERO_LAST_BLOCKS(%o0, 0x08, %g2)
13:
- EXT(12b, 13b, 21f)
be 8f
andcc %o1, 4, %g0
--
2.28.0
--
Cheers,
Stephen Rothwell
pgp9n65n8RG92.pgp
Description: OpenPGP digital signature
Re: [PATCH v2 1/1] KVM: arm64: Correctly handle the mmio faulting
Hi Santosh,
On 10/26/20 10:24 PM, Santosh Shukla wrote:
The Commit:6d674e28 introduces a notion to detect and handle the
device mapping. The commit checks for the VM_PFNMAP flag is set
in vma->flags and if set then marks force_pte to true such that
if force_pte is true then ignore the THP function check
(/transparent_hugepage_adjust()).
There could be an issue with the VM_PFNMAP flag setting and checking.
For example consider a case where the mdev vendor driver register's
the vma_fault handler named vma_mmio_fault(), which maps the
host MMIO region in-turn calls remap_pfn_range() and maps
the MMIO's vma space. Where, remap_pfn_range implicitly sets
the VM_PFNMAP flag into vma->flags.
Now lets assume a mmio fault handing flow where guest first access
the MMIO region whose 2nd stage translation is not present.
So that results to arm64-kvm hypervisor executing guest abort handler,
like below:
kvm_handle_guest_abort() -->
user_mem_abort()--> {
...
0. checks the vma->flags for the VM_PFNMAP.
1. Since VM_PFNMAP flag is not yet set so force_pte _is_ false;
2. gfn_to_pfn_prot() -->
__gfn_to_pfn_memslot() -->
fixup_user_fault() -->
handle_mm_fault()-->
__do_fault() -->
vma_mmio_fault() --> // vendor's mdev fault handler
remap_pfn_range()--> // Here sets the VM_PFNMAP
flag into vma->flags.
3. Now that force_pte is set to false in step-2),
will execute transparent_hugepage_adjust() func and
that lead to Oops [4].
}
The proposition is to set force_pte=true if kvm_is_device_pfn is true.
[4] THP Oops:
pc: kvm_is_transparent_hugepage+0x18/0xb0
...
...
user_mem_abort+0x340/0x9b8
kvm_handle_guest_abort+0x248/0x468
handle_exit+0x150/0x1b0
kvm_arch_vcpu_ioctl_run+0x4d4/0x778
kvm_vcpu_ioctl+0x3c0/0x858
ksys_ioctl+0x84/0xb8
__arm64_sys_ioctl+0x28/0x38
Tested on Huawei Kunpeng Taishan-200 arm64 server, Using VFIO-mdev device.
Linux-5.10-rc1 tip: 3650b228
Fixes: 6d674e28 ("KVM: arm/arm64: Properly handle faulting of device mappings")
Suggested-by: Marc Zyngier
Signed-off-by: Santosh Shukla
---
v2:
- Per Marc's suggestion - setting force_pte=true.
- Rebased and tested for 5.10-rc1 commit: 3650b228
v1: https://lkml.org/lkml/2020/10/21/460
arch/arm64/kvm/mmu.c | 1 +
1 file changed, 1 insertion(+)
Reviewed-by: Gavin Shan
diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
index 19aacc7..d4cd253 100644
--- a/arch/arm64/kvm/mmu.c
+++ b/arch/arm64/kvm/mmu.c
@@ -839,6 +839,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu,
phys_addr_t fault_ipa,
if (kvm_is_device_pfn(pfn)) {
device = true;
+ force_pte = true;
} else if (logging_active && !write_fault) {
/*
* Only actually map the page as writable if this was a write
Cheers,
Gavin
Re: [PATCH net-next 01/11] atm: horizon: shut up clang null pointer arithmetic warning
On Mon, Oct 26, 2020 at 8:56 PM Xie He wrote: > > > - for (mem = (HDW *) memmap; mem < (HDW *) (memmap + 1); ++mem) > > + for (mem = (HDW *) memmap; mem < (HDW *) ((uintptr_t)memmap + 1); ++mem) > > Note that these two lines are semantically different. In the first line, > "+ 1" moves the pointer by (sizeof memmap) bytes. However in the second > line, "+ 1" moves the pointer by only 1 byte. Correction: in the first line "+ 1" moves the pointer by (sizeof *memmap) bytes.
RE: [PATCH v3] usb: cdns3: Variable 'length' set but not used
> > > > A gentle ping. > > > > I assume that you should add this and the rest overdue cdsn3 patches > > as first to you ci-for-usb-next branch. > > Am I right? > > > > Hi Pawel, > > I queued them locally, and I waited for v5.10-rc1 which was out yesterday, > then > I will apply them, and add cdns3 patches to my kernel.org branch. Will update > you these two days. > > Peter Hi Pawel, The cdns3 -next patches pushed to: for-usb-next; cdns3 -fixes patches pushed to: for-usb-fixes. The git is: git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git Currently, I only pushed three of your patches, would you please review my patches, thanks. Peter
Re: [PATCH net-next 01/11] atm: horizon: shut up clang null pointer arithmetic warning
> - for (mem = (HDW *) memmap; mem < (HDW *) (memmap + 1); ++mem) > + for (mem = (HDW *) memmap; mem < (HDW *) ((uintptr_t)memmap + 1); ++mem) Note that these two lines are semantically different. In the first line, "+ 1" moves the pointer by (sizeof memmap) bytes. However in the second line, "+ 1" moves the pointer by only 1 byte. This driver is old, but let's still keep its code correct!
Re: [PATCH v3 01/56] scripts: kernel-doc: fix typedef parsing
On Mon, 2020-10-26 at 08:03 +0100, Mauro Carvalho Chehab wrote:
[]
> Well, this can help:
> my $typedef_type = qr { ((?:\w+\s+){1,}) }x;
unbounded captures are generally bad, I suggest a limit like {1,5}
> if ($x =~ /typedef\s+((?:\w+\s+){1,})\(\*?\s*(\w\S+)\s*\)\s*\((.*)\);/ ||
> $x =~ /typedef\s+((?:\w+\s+){1,})\s*\*?(\w\S+)\s*\s*\((.*)\);/) {
[]
> Fix the regex in order to accept composite types when
> defining a typedef for a function pointer.
[]
> diff --git a/scripts/kernel-doc b/scripts/kernel-doc
[]
> @@ -1438,13 +1438,14 @@ sub dump_typedef($$) {
> $x =~ s@/\*.*?\*/@@gos; # strip comments.
>
>
> # Parse function prototypes
> -if ($x =~ /typedef\s+(\w+)\s*\(\*\s*(\w\S+)\s*\)\s*\((.*)\);/ ||
> - $x =~ /typedef\s+(\w+)\s*(\w\S+)\s*\s*\((.*)\);/) {
> +if ($x =~ /typedef\s+((?:\w+\s+){1,})\(\*?\s*(\w\S+)\s*\)\s*\((.*)\);/ ||
> + $x =~ /typedef\s+((?:\w+\s+){1,})\s*\*?(\w\S+)\s*\s*\((.*)\);/) {
This typedef does not allow * returns like
const unsigned char *(*string)(args...);
or
unsigned char *const(*fn)(args...);
or
void *(*alloc)(args...);
(not to mention the truly unusual stuff like the typedefs in
tools/testing/selftests/bpf/progs/btf_dump_test_case_syntax.c)
typedef void (* (*signal_t)(int, void (*)(int)))(int);
typedef char * (*fn_ptr_arr1_t[10])(int **);
typedef char * (* const (* const fn_ptr_arr2_t[5])())(char * (*)(int));
Re: [PATCH v1] Input: ads7846: do not overwrite spi->mode flags set by spi framework
On Thu, Oct 22, 2020 at 08:54:02AM +0200, Oleksij Rempel wrote: > On Wed, Oct 21, 2020 at 11:27:57AM -0700, Dmitry Torokhov wrote: > > On Wed, Oct 21, 2020 at 12:56:14PM +0200, Oleksij Rempel wrote: > > > > > > As you can see, I would need to configure my dts with spi-cs-high flag, > > > even if the hardware is actually ACTIVE_LOW. If I will go this way, I > > > would risk a regression as soon as this issue is fixed. > > > > > > Since the spi framework is already parsing devicetree and set all needed > > > flags, I assume it is wrong to blindly drop all this flags in the > > > driver. > > > > Yes, but I wonder if the devices can only work in mode 0 we should be > > doing: > > > > spi->mode &= ~SPI_MODE_MASK; // to be defined as 0x03 in spi.h > > spi->mode |= SPI_MODE_0; > > > > as we can't simply "or" mode value as is > > Why not? This values are taken from device tree. If some developer > decided to add them, then driver should take it over. Even if this > values will break the functionality. > > Other properties of this driver will break the functionality too of this > driver too, so why should we silently filter only set of this bits? What I was trying to say is that if driver wants to set mode to particular value it should not "or" the value, as it will not reset the relevant bits. I.e. if there some undesirable data in spi->mode mode bits it will not get set properly by essentially doing "spi->mode |= 0". That is why I said the driver needs to clear mode bits and set them to the desired mode. Thanks. -- Dmitry
Re: [PATCH v1] Input: touchscreen: ads7846.c: Fix race that causes missing releases
Hi Oleksij,
On Mon, Oct 26, 2020 at 02:21:17PM +0100, Oleksij Rempel wrote:
> From: David Jander
>
> If touchscreen is released while busy reading HWMON device, the release
> can be missed. The IRQ thread is not started because no touch is active
> and BTN_TOUCH release event is never sent.
>
> Fixes: f5a28a7d4858f94a ("Input: ads7846 - avoid pen up/down when reading
> hwmon")
> Co-Developed-by: David Jander
> Signed-off-by: David Jander
> Signed-off-by: Oleksij Rempel
> ---
> drivers/input/touchscreen/ads7846.c | 16
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/input/touchscreen/ads7846.c
> b/drivers/input/touchscreen/ads7846.c
> index ea31956f3a90..0236a119c52d 100644
> --- a/drivers/input/touchscreen/ads7846.c
> +++ b/drivers/input/touchscreen/ads7846.c
> @@ -211,10 +211,26 @@ static void ads7846_stop(struct ads7846 *ts)
> }
> }
>
> +static int get_pendown_state(struct ads7846 *ts);
Not a fan forward declarations, just move the definition if needed.
> +
> /* Must be called with ts->lock held */
> static void ads7846_restart(struct ads7846 *ts)
> {
> + unsigned int pdstate;
I do not see it being used. Do you have more patches for the driver?
> +
> if (!ts->disabled && !ts->suspended) {
> + /* Check if pen was released since last stop */
> + if (ts->pendown && !get_pendown_state(ts)) {
> + struct input_dev *input = ts->input;
> +
> + input_report_key(input, BTN_TOUCH, 0);
> + input_report_abs(input, ABS_PRESSURE, 0);
> + input_sync(input);
> +
> + ts->pendown = false;
> + dev_vdbg(>spi->dev, "UP\n");
I wonder if we should not have ads7846_report_pen_up(struct ads7846 *ts)
> + }
> +
> /* Tell IRQ thread that it may poll the device. */
> ts->stopped = false;
> mb();
> --
> 2.28.0
>
Thanks.
--
Dmitry
Re: [PATCH v3 5/6] dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml
Hi Rob,
Thank you very much for the review comments...
On 26/10/2020 9:08 pm, Rob Herring wrote:
On Mon, Oct 26, 2020 at 05:45:18PM +0800, Ramuthevar,Vadivel MuruganX wrote:
From: Ramuthevar Vadivel Murugan
Convert the cadence-quadspi.txt documentation to cadence-quadspi.yaml
remove the cadence-quadspi.txt from Documentation/devicetree/bindings/spi/
Signed-off-by: Ramuthevar Vadivel Murugan
---
.../devicetree/bindings/spi/cadence-quadspi.txt| 67 --
.../devicetree/bindings/spi/cadence-quadspi.yaml | 148 +
2 files changed, 148 insertions(+), 67 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/spi/cadence-quadspi.txt
create mode 100644 Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
b/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
deleted file mode 100644
index 945be7d5b236..
--- a/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
+++ /dev/null
@@ -1,67 +0,0 @@
-* Cadence Quad SPI controller
-
-Required properties:
-- compatible : should be one of the following:
- Generic default - "cdns,qspi-nor".
- For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".
- For TI AM654 SoC - "ti,am654-ospi", "cdns,qspi-nor".
-- reg : Contains two entries, each of which is a tuple consisting of a
- physical address and length. The first entry is the address and
- length of the controller register set. The second entry is the
- address and length of the QSPI Controller data area.
-- interrupts : Unit interrupt specifier for the controller interrupt.
-- clocks : phandle to the Quad SPI clock.
-- cdns,fifo-depth : Size of the data FIFO in words.
-- cdns,fifo-width : Bus width of the data FIFO in bytes.
-- cdns,trigger-address : 32-bit indirect AHB trigger address.
-
-Optional properties:
-- cdns,is-decoded-cs : Flag to indicate whether decoder is used or not.
-- cdns,rclk-en : Flag to indicate that QSPI return clock is used to latch
- the read data rather than the QSPI clock. Make sure that QSPI return
- clock is populated on the board before using this property.
-
-Optional subnodes:
-Subnodes of the Cadence Quad SPI controller are spi slave nodes with additional
-custom properties:
-- cdns,read-delay : Delay for read capture logic, in clock cycles
-- cdns,tshsl-ns : Delay in nanoseconds for the length that the master
- mode chip select outputs are de-asserted between
- transactions.
-- cdns,tsd2d-ns : Delay in nanoseconds between one chip select being
- de-activated and the activation of another.
-- cdns,tchsh-ns : Delay in nanoseconds between last bit of current
- transaction and deasserting the device chip select
- (qspi_n_ss_out).
-- cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low
- and first bit transfer.
-- resets : Must contain an entry for each entry in reset-names.
- See ../reset/reset.txt for details.
-- reset-names : Must include either "qspi" and/or "qspi-ocp".
-
-Example:
-
- qspi: spi@ff705000 {
- compatible = "cdns,qspi-nor";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0xff705000 0x1000>,
- <0xffa0 0x1000>;
- interrupts = <0 151 4>;
- clocks = <_clk>;
- cdns,is-decoded-cs;
- cdns,fifo-depth = <128>;
- cdns,fifo-width = <4>;
- cdns,trigger-address = <0x>;
- resets = < QSPI_RESET>, < QSPI_OCP_RESET>;
- reset-names = "qspi", "qspi-ocp";
-
- flash0: n25q00@0 {
- ...
- cdns,read-delay = <4>;
- cdns,tshsl-ns = <50>;
- cdns,tsd2d-ns = <50>;
- cdns,tchsh-ns = <4>;
- cdns,tslch-ns = <4>;
- };
- };
diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
new file mode 100644
index ..b1b3d3ce0cc2
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
@@ -0,0 +1,148 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/cadence-quadspi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence Quad SPI controller
+
+maintainers:
+ - Vadivel Murugan
+
+allOf:
+ - $ref: "spi-controller.yaml#"
+
+properties:
+ compatible:
+oneOf:
+ - items:
+ - const: cdns,qspi-nor
+ - const: ti,k2g-qspi, cdns,qspi-nor
+ - const: ti,am654-ospi, cdns,qspi-nor
+
+ reg:
+items:
+ - description: the controller register set
+ - description: the controller data area
+
+
Re:Re: [PATCH] sched/rt.c: use list_is_singular() instead of '->prev != ->next'
>Perhaps there should be a list_has_more_than_one() API, as list_is_singular >requires two checks, and the "more_than_one" only requires a single check. > >list_is_singular() is: > > return !list_empty(list) && (list->next == list->prev); > > >which is more work than what you are replacing. > Hi, Steve: Thanks for your explanation. Maybe we should add another api called "list_more_than_one" just without list_empty() check. I will send PATCH V2 later. Thank.
[PATCH v2 2/2] scsi: arcmsr: Confirm getting a free ccb is in spin_lock circle
From: ching Huang
Confirm getting a free ccb is in spin_lock circle.
Signed-off-by: ching Huang
---
diff --git a/drivers/scsi/arcmsr/arcmsr_hba.c b/drivers/scsi/arcmsr/arcmsr_hba.c
index 7cfae1d..127fe50 100644
--- a/drivers/scsi/arcmsr/arcmsr_hba.c
+++ b/drivers/scsi/arcmsr/arcmsr_hba.c
@@ -3162,10 +3162,12 @@ message_out:
static struct CommandControlBlock *arcmsr_get_freeccb(struct
AdapterControlBlock *acb)
{
- struct list_head *head = >ccb_free_list;
+ struct list_head *head;
struct CommandControlBlock *ccb = NULL;
unsigned long flags;
+
spin_lock_irqsave(>ccblist_lock, flags);
+ head = >ccb_free_list;
if (!list_empty(head)) {
ccb = list_entry(head->next, struct CommandControlBlock, list);
list_del_init(>list);
Re: [PATCH v4 1/5] scsi: ufs: atomic update for clkgating_enable
On 2020-10-27 11:33, Jaegeuk Kim wrote:
On 10/27, Can Guo wrote:
On 2020-10-27 03:51, Jaegeuk Kim wrote:
> From: Jaegeuk Kim
>
> When giving a stress test which enables/disables clkgating, we hit
> device
> timeout sometimes. This patch avoids subtle racy condition to address
> it.
>
> Note that, this requires a patch to address the device stuck by
> REQ_CLKS_OFF in
> __ufshcd_release().
>
> The fix is "scsi: ufs: avoid to call REQ_CLKS_OFF to CLKS_OFF".
Why don't you just squash the fix into this one?
I'm seeing this patch just revealed that problem.
That scenario (back to back calling of ufshcd_release()) only happens
when you stress the clkgate_enable sysfs node, so let's keep the fix
as one to make things simple. What do you think?
Thanks,
Can Guo.
Thanks,
Can Guo.
>
> Signed-off-by: Jaegeuk Kim
> ---
> drivers/scsi/ufs/ufshcd.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
> index cc8d5f0c3fdc..6c9269bffcbd 100644
> --- a/drivers/scsi/ufs/ufshcd.c
> +++ b/drivers/scsi/ufs/ufshcd.c
> @@ -1808,19 +1808,19 @@ static ssize_t
> ufshcd_clkgate_enable_store(struct device *dev,
>return -EINVAL;
>
>value = !!value;
> +
> + spin_lock_irqsave(hba->host->host_lock, flags);
>if (value == hba->clk_gating.is_enabled)
>goto out;
>
> - if (value) {
> - ufshcd_release(hba);
> - } else {
> - spin_lock_irqsave(hba->host->host_lock, flags);
> + if (value)
> + __ufshcd_release(hba);
> + else
>hba->clk_gating.active_reqs++;
> - spin_unlock_irqrestore(hba->host->host_lock, flags);
> - }
>
>hba->clk_gating.is_enabled = value;
> out:
> + spin_unlock_irqrestore(hba->host->host_lock, flags);
>return count;
> }
Re: [PATCH v4 1/5] scsi: ufs: atomic update for clkgating_enable
On 10/27, Can Guo wrote:
> On 2020-10-27 03:51, Jaegeuk Kim wrote:
> > From: Jaegeuk Kim
> >
> > When giving a stress test which enables/disables clkgating, we hit
> > device
> > timeout sometimes. This patch avoids subtle racy condition to address
> > it.
> >
> > Note that, this requires a patch to address the device stuck by
> > REQ_CLKS_OFF in
> > __ufshcd_release().
> >
> > The fix is "scsi: ufs: avoid to call REQ_CLKS_OFF to CLKS_OFF".
>
> Why don't you just squash the fix into this one?
I'm seeing this patch just revealed that problem.
>
> Thanks,
>
> Can Guo.
>
> >
> > Signed-off-by: Jaegeuk Kim
> > ---
> > drivers/scsi/ufs/ufshcd.c | 12 ++--
> > 1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
> > index cc8d5f0c3fdc..6c9269bffcbd 100644
> > --- a/drivers/scsi/ufs/ufshcd.c
> > +++ b/drivers/scsi/ufs/ufshcd.c
> > @@ -1808,19 +1808,19 @@ static ssize_t
> > ufshcd_clkgate_enable_store(struct device *dev,
> > return -EINVAL;
> >
> > value = !!value;
> > +
> > + spin_lock_irqsave(hba->host->host_lock, flags);
> > if (value == hba->clk_gating.is_enabled)
> > goto out;
> >
> > - if (value) {
> > - ufshcd_release(hba);
> > - } else {
> > - spin_lock_irqsave(hba->host->host_lock, flags);
> > + if (value)
> > + __ufshcd_release(hba);
> > + else
> > hba->clk_gating.active_reqs++;
> > - spin_unlock_irqrestore(hba->host->host_lock, flags);
> > - }
> >
> > hba->clk_gating.is_enabled = value;
> > out:
> > + spin_unlock_irqrestore(hba->host->host_lock, flags);
> > return count;
> > }
[PATCH v2] sched: sched_domain fix highest_flag_domain function
the highest_flag_domain is to search the highest sched_domain
containing flag, but if the lower sched_domain didn't contain
the flag, but the higher sched_domain contains the flag, the
function will return NULL instead of the higher sched_domain.
For example:
In MC domain : no SD_ASYM_CPUCAPACITY flag;
In DIE domain : containing SD_ASYM_CPUCAPACITY flag;
the "highest_flag_domain(cpu, SD_ASYM_CPUCAPACITY)" will return NULL.
Signed-off-by: Xuewen Yan
---
kernel/sched/sched.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
index 28709f6..2c7c566 100644
--- a/kernel/sched/sched.h
+++ b/kernel/sched/sched.h
@@ -1427,7 +1427,7 @@ static inline struct sched_domain
*highest_flag_domain(int cpu, int flag)
for_each_domain(cpu, sd) {
if (!(sd->flags & flag))
- break;
+ continue;
hsd = sd;
}
--
1.9.1
Re: [RFC PATCH 1/6] docs: networking: add the document for DFL Ether Group driver
On Mon, Oct 26, 2020 at 08:14:00PM +0100, Andrew Lunn wrote: > > > > > Do you really mean PHY? I actually expect it is PCS? > > > > > > > > For this implementation, yes. > > > > > > Yes, you have a PHY? Or Yes, it is PCS? > > > > Sorry, I mean I have a PHY. > > > > > > > > To me, the phylib maintainer, having a PHY means you have a base-T > > > interface, 25Gbase-T, 40Gbase-T? That would be an odd and expensive > > > architecture when you should be able to just connect SERDES interfaces > > > together. > > You really have 25Gbase-T, 40Gbase-T? Between the FPGA & XL710? > What copper PHYs are using? Sorry for the confusing. I'll check with our board designer and reply later. > > > I see your concerns about the SERDES interface between FPGA & XL710. > > I have no concerns about direct SERDES connections. That is the normal > way of doing this. It keeps it a lot simpler, since you don't have to > worry about driving the PHYs. > > > I did some investigation about the DSA, and actually I wrote a > > experimental DSA driver. It works and almost meets my need, I can make > > configuration, run pktgen on slave inf. > > Cool. As i said, I don't know if this actually needs to be a DSA > driver. It might just need to borrow some ideas from DSA. > > > Mm.. seems the hardware should be changed, either let host directly > > access the QSFP, or re-design the BMC to provide more info for QSFP. > > At a minimum, you need to support ethtool -m. It could be a firmware > call to the BMC, our you expose the i2c bus somehow. There are plenty > of MAC drivers which implement eththool -m without using phylink. > > But i think you need to take a step back first, and look at the bigger > picture. What is Intel's goal? Are they just going to sell complete > cards? Or do they also want to sell the FPGA as a components anybody > get put onto their own board? > > If there are only ever going to be compete cards, then you can go the > firmware direction, push a lot of functionality into the BMC, and have > the card driver make firmware calls to control the SFP, retimer, > etc. You can then throw away your mdio and phy driver hacks. > > If however, the FPGA is going to be available as a component, can you > also assume there is a BMC? Running Intel firmware? Can the customer > also modify this firmware for their own needs? I think that is going > to be difficult. So you need to push as much as possible towards > linux, and let Linux drive all the hardware, the SFP, retimer, FPGA, > etc. This is a very helpful. I'll share with our team and reconsider about the design. Thanks, Yilun > > Andrew >
[PATCH v2 1/2] scsi: arcmsr: configure the default SCSI device command timeout value
From: ching Huang
Configure the default SCSI device command timeout value.
Signed-off-by: ching Huang
---
diff --git a/drivers/scsi/arcmsr/arcmsr.h b/drivers/scsi/arcmsr/arcmsr.h
index 5d054d5..0f6abd2 100644
--- a/drivers/scsi/arcmsr/arcmsr.h
+++ b/drivers/scsi/arcmsr/arcmsr.h
@@ -83,6 +83,7 @@ struct device_attribute;
#define PCI_DEVICE_ID_ARECA_1886 0x188A
#defineARCMSR_HOURS(1000 * 60 * 60 * 4)
#defineARCMSR_MINUTES (1000 * 60 * 60)
+#define ARCMSR_DEFAULT_TIMEOUT 90
/*
**
**
diff --git a/drivers/scsi/arcmsr/arcmsr_hba.c b/drivers/scsi/arcmsr/arcmsr_hba.c
index e4fdb47..7cfae1d 100644
--- a/drivers/scsi/arcmsr/arcmsr_hba.c
+++ b/drivers/scsi/arcmsr/arcmsr_hba.c
@@ -99,6 +99,10 @@ static int set_date_time = 0;
module_param(set_date_time, int, S_IRUGO);
MODULE_PARM_DESC(set_date_time, " send date, time to iop(0 ~ 1),
set_date_time=1(enable), default(=0) is disable");
+static int cmd_timeout = ARCMSR_DEFAULT_TIMEOUT;
+module_param(cmd_timeout, int, S_IRUGO);
+MODULE_PARM_DESC(cmd_timeout, " scsi cmd timeout(0 ~ 120 sec.), default is
90");
+
#defineARCMSR_SLEEPTIME10
#defineARCMSR_RETRYCOUNT 12
@@ -140,6 +144,7 @@ static irqreturn_t arcmsr_interrupt(struct
AdapterControlBlock *acb);
static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *);
static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb);
static void arcmsr_set_iop_datetime(struct timer_list *);
+static int arcmsr_slave_config(struct scsi_device *sdev);
static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int
queue_depth)
{
if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
@@ -155,6 +160,7 @@ static struct scsi_host_template arcmsr_scsi_host_template
= {
.eh_abort_handler = arcmsr_abort,
.eh_bus_reset_handler = arcmsr_bus_reset,
.bios_param = arcmsr_bios_param,
+ .slave_configure= arcmsr_slave_config,
.change_queue_depth = arcmsr_adjust_disk_queue_depth,
.can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD,
.this_id= ARCMSR_SCSI_INITIATOR_ID,
@@ -3256,6 +3262,16 @@ static int arcmsr_queue_command_lck(struct scsi_cmnd
*cmd,
static DEF_SCSI_QCMD(arcmsr_queue_command)
+static int arcmsr_slave_config(struct scsi_device *sdev)
+{
+ unsigned intdev_timeout;
+
+ dev_timeout = sdev->request_queue->rq_timeout;
+ if ((cmd_timeout > 0) && ((cmd_timeout * HZ) > dev_timeout))
+ blk_queue_rq_timeout(sdev->request_queue, cmd_timeout * HZ);
+ return 0;
+}
+
static void arcmsr_get_adapter_config(struct AdapterControlBlock *pACB,
uint32_t *rwbuffer)
{
int count;
Re: [PATCH v1] of: platform: Batch fwnode parsing in the init_machine() path
On Fri, Oct 2, 2020 at 5:14 PM Laurent Pinchart
wrote:
>
> Hi Saravana,
>
> On Fri, Oct 02, 2020 at 12:56:30PM -0700, Saravana Kannan wrote:
> > On Fri, Oct 2, 2020 at 11:35 AM 'Grygorii Strashko' via kernel-team wrote:
> > > On 02/10/2020 21:27, Laurent Pinchart wrote:
> > > > On Fri, Oct 02, 2020 at 10:58:55AM -0700, Saravana Kannan wrote:
> > > >> On Fri, Oct 2, 2020 at 10:55 AM Laurent Pinchart wrote:
> > > >>> On Fri, Oct 02, 2020 at 10:51:51AM -0700, Saravana Kannan wrote:
> > > On Fri, Oct 2, 2020 at 7:08 AM Rob Herring
> > > wrote:
> > > > On Thu, Oct 1, 2020 at 5:59 PM Saravana Kannan
> > > > wrote:
> > > >>
> > > >> When commit 93d2e4322aa7 ("of: platform: Batch fwnode parsing when
> > > >> adding all top level devices") optimized the fwnode parsing when
> > > >> all top
> > > >> level devices are added, it missed out optimizing this for platform
> > > >> where the top level devices are added through the init_machine()
> > > >> path.
> > > >>
> > > >> This commit does the optimization for all paths by simply moving
> > > >> the
> > > >> fw_devlink_pause/resume() inside of_platform_default_populate().
> > > >>
> > > >> Reported-by: Tomi Valkeinen
> > > >> Signed-off-by: Saravana Kannan
> > > >> ---
> > > >> drivers/of/platform.c | 19 +++
> > > >> 1 file changed, 15 insertions(+), 4 deletions(-)
> > > >>
> > > >> diff --git a/drivers/of/platform.c b/drivers/of/platform.c
> > > >> index 071f04da32c8..79972e49b539 100644
> > > >> --- a/drivers/of/platform.c
> > > >> +++ b/drivers/of/platform.c
> > > >> @@ -501,8 +501,21 @@ int of_platform_default_populate(struct
> > > >> device_node *root,
> > > >> const struct of_dev_auxdata
> > > >> *lookup,
> > > >> struct device *parent)
> > > >> {
> > > >> - return of_platform_populate(root,
> > > >> of_default_bus_match_table, lookup,
> > > >> - parent);
> > > >> + int ret;
> > > >> +
> > > >> + /*
> > > >> +* fw_devlink_pause/resume() are only safe to be called
> > > >> around top
> > > >> +* level device addition due to locking constraints.
> > > >> +*/
> > > >> + if (!root)
> > > >> + fw_devlink_pause();
> > > >> +
> > > >> + ret = of_platform_populate(root,
> > > >> of_default_bus_match_table, lookup,
> > > >> + parent);
> > > >
> > > > of_platform_default_populate() vs. of_platform_populate() is just a
> > > > different match table. I don't think the behavior should otherwise
> > > > be
> > > > different.
> > > >
> > > > There's also of_platform_probe() which has slightly different
> > > > matching
> > > > behavior. It should not behave differently either with respect to
> > > > devlinks.
> > >
> > > So I'm trying to do this only when the top level devices are added
> > > for
> > > the first time. of_platform_default_populate() seems to be the most
> > > common path. For other cases, I think we just need to call
> > > fw_devlink_pause/resume() wherever the top level devices are added
> > > for
> > > the first time. As I said in the other email, we can't add
> > > fw_devlink_pause/resume() by default to of_platform_populate().
> > >
> > > Do you have other ideas for achieving "call fw_devlink_pause/resume()
> > > only when top level devices are added for the first time"?
> > > >>>
> > > >>> I'm not an expert in this domain, but before investigating it, would
> > > >>> you
> > > >>> be able to share a hack patch that implements this (in the most simple
> > > >>> way) to check if it actually fixes the delays I experience on my
> > > >>> system
> > > >>> ?
> > > >>
> > > >> So I take it the patch I sent out didn't work for you? Can you tell me
> > > >> what machine/DT you are using?
> > > >
> > > > I've replied to the patch:
> > > >
> > > > Based on v5.9-rc5, before the patch:
> > > >
> > > > [0.652887] cpuidle: using governor menu
> > > > [ 12.349476] No ATAGs?
> > > >
> > > > After the patch:
> > > >
> > > > [0.650460] cpuidle: using governor menu
> > > > [ 12.262101] No ATAGs?
> > > >
> > > > I'm using an AM57xx EVM, whose DT is not upstream, but it's essentially
> > > > a am57xx-beagle-x15-revb1.dts (it includes that DTS) with a few
> > > > additional nodes for GPIO keys, LCD panel, backlight and touchscreen.
> > > >
> > >
> > > hope you are receiving my mails as I've provided you with all required
> > > information already [1]
> >
> > Laurent/Grygorii,
> >
> > Looks like I'm definitely missing emails. Sorry about the confusion.
> >
> > I have some other urgent things on my plate right now. Is it okay if I
> >
Re: [PATCH] rtlwifi: Fix non-canonical address access issues
On Tue, 2020-10-27 at 11:16 +0800, WeitaoWangoc wrote: > During realtek USB wireless NIC initialization, it's unexpected > disconnection will cause urb sumbmit fail. On the one hand, > _rtl_usb_cleanup_rx will be called to clean up rx stuff, especially for > rtl_wq. On the other hand, disconnection will cause rtl_usb_disconnect > and _rtl_usb_cleanup_rx to be called. So, rtl_wq will be flush/destroy > twice, which will cause non-canonical address 0xdead0122 access > and general protection fault. > > Fixed this issue by remove _rtl_usb_cleanup_rx when urb sumbmit fail. > > Signed-off-by: WeitaoWangoc Thanks for your patch. Acked-by: Ping-Ke Shih > --- > drivers/net/wireless/realtek/rtlwifi/usb.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/net/wireless/realtek/rtlwifi/usb.c > b/drivers/net/wireless/realtek/rtlwifi/usb.c > index 06e073d..d62b87f 100644 > --- a/drivers/net/wireless/realtek/rtlwifi/usb.c > +++ b/drivers/net/wireless/realtek/rtlwifi/usb.c > @@ -731,7 +731,6 @@ static int _rtl_usb_receive(struct ieee80211_hw *hw) > > err_out: > usb_kill_anchored_urbs(>rx_submitted); > - _rtl_usb_cleanup_rx(hw); > return err; > } >
[PATCH v2 0/2] scsi: arcmsr: configure the default SCSI device command timeout value
This patch is against to mkp's 5.10/scsi-fixes. 1. Configure the default SCSI device command timeout value. 2. Confirm get free ccb in spin_lock circle. ---
Re: [PATCH net] net: hns3: Clear the CMDQ registers before unmapping BAR region
On Tue, 27 Oct 2020 09:42:01 +0800 Yunsheng Lin wrote:
> On 2020/10/27 9:25, Jakub Kicinski wrote:
> > On Tue, 27 Oct 2020 09:24:10 +0800 Yunsheng Lin wrote:
> >>> Fixes: 862d969a3a4d ("net: hns3: do VF's pci re-initialization while PF
> >>> doing FLR")
> >>
> >> The correct Fixes tag should be:
> >>
> >> Fixes: e3338205f0c7 ("net: hns3: uninitialize pci in the hclgevf_uninit")
> >
> > Why is that?
> >
> > Isn't the issue the order of cmd vs pci calls? e3338205f0c7 only takes
> > the pci call from under an if, the order was wrong before.
>
> You are right, the e3338205f0c7 only add the missing hclgevf_pci_uninit()
> when HCLGEVF_STATE_IRQ_INITED is not set.
>
> So I think the tag you provided is correct, thanks.
Great, added the tag and applied, thanks!
Re: [rcu:rcu/test 76/76] drivers/dax/super.c:21:1: error: use of undeclared identifier '___srcu_struct_ptrs'
On Mon, Oct 26, 2020 at 06:53:34PM -0700, Nathan Chancellor wrote:
> Hi Paul,
>
> On Tue, Oct 27, 2020 at 08:50:52AM +0800, kernel test robot wrote:
> > tree:
> > https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git
> > rcu/test
> > head: 784a6343c3660446ae62db13628b20e9f876100f
> > commit: 784a6343c3660446ae62db13628b20e9f876100f [76/76] Merge commit
> > '3650b22' into rcu/test
> > config: arm-randconfig-r026-20201026 (attached as .config)
> > compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project
> > f2c25c70791de95d2466e09b5b58fc37f6ccd7a4)
> > reproduce (this is a W=1 build):
> > wget
> > https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
> > ~/bin/make.cross
> > chmod +x ~/bin/make.cross
> > # install arm cross compiling tool for clang build
> > # apt-get install binutils-arm-linux-gnueabi
> > #
> > https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git/commit/?id=784a6343c3660446ae62db13628b20e9f876100f
> > git remote add rcu
> > https://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git
> > git fetch --no-tags rcu rcu/test
> > git checkout 784a6343c3660446ae62db13628b20e9f876100f
> > # save the attached .config to linux build tree
> > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm
> >
> > If you fix the issue, kindly add following tag as appropriate
> > Reported-by: kernel test robot
> >
> > All errors (new ones prefixed by >>):
> >
> > >> drivers/dax/super.c:21:1: error: use of undeclared identifier
> > >> '___srcu_struct_ptrs'
> >DEFINE_STATIC_SRCU(dax_srcu);
> >^
> >include/linux/srcutree.h:135:34: note: expanded from macro
> > 'DEFINE_STATIC_SRCU'
> >#define DEFINE_STATIC_SRCU(name)__DEFINE_SRCU(name, static)
> >^
> >include/linux/srcutree.h:127:13: note: expanded from macro
> > '__DEFINE_SRCU'
> >__section(___srcu_struct_ptrs) =
> > ^
> >drivers/dax/super.c:70:6: warning: no previous prototype for function
> > '__generic_fsdax_supported' [-Wmissing-prototypes]
> >bool __generic_fsdax_supported(struct dax_device *dax_dev,
> > ^
> >drivers/dax/super.c:70:1: note: declare 'static' if the function is not
> > intended to be used outside of this translation unit
> >bool __generic_fsdax_supported(struct dax_device *dax_dev,
> >^
> >static
> >drivers/dax/super.c:168:6: warning: no previous prototype for function
> > '__bdev_dax_supported' [-Wmissing-prototypes]
> >bool __bdev_dax_supported(struct block_device *bdev, int blocksize)
> > ^
> >drivers/dax/super.c:168:1: note: declare 'static' if the function is not
> > intended to be used outside of this translation unit
> >bool __bdev_dax_supported(struct block_device *bdev, int blocksize)
> >^
> >static
> >drivers/dax/super.c:452:6: warning: no previous prototype for function
> > 'run_dax' [-Wmissing-prototypes]
> >void run_dax(struct dax_device *dax_dev)
> > ^
> >drivers/dax/super.c:452:1: note: declare 'static' if the function is not
> > intended to be used outside of this translation unit
> >void run_dax(struct dax_device *dax_dev)
> >^
> >static
> >3 warnings and 1 error generated.
>
> Please drop commit c1370c128cf4 ("srcu: Avoid escaped section names"),
> it has been fixed in a different way as of v5.10-rc1, in
> commit 33def8498fdd ("treewide: Convert macro and uses of __section(foo)
> to __section("foo")").
Thank you, and will do!
Thanx, Paul
RE: [RESEND 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt
> Subject: Re: [RESEND 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external > interrupt > > On 26/10/2020 09.44, Marc Zyngier wrote: > > On 2020-10-26 08:01, Biwen Li wrote: > >> From: Hou Zhiqiang > >> > >> Add an new IRQ chip declaration for LS1043A and LS1088A > >> - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A > >> - compatible "fsl,ls1088a-extirq" for LS1088A, LS208xA, LX216xA > > > > Three things: > > - This commit message doesn't describe the bit_reverse change > > Yeah, please elaborate on that, as the RM for 1043 or 1046 doesn't mention > anything about bit reversal for the scfg registers - they don't seem to have > the > utter nonsense that is SCFG_SCFGREVCR, but perhaps, instead of removing it, > that has just become a hard-coded part of the IP. Yeah, you are right, I will update it in v2. > > Also, IANAL etc., but > > >> +// Copyright 2019-2020 NXP > > really? Seems to be a bit of a stretch. > > At the very least, cc'ing the original author and only person to ever touch > that > file would have been appreciated. Okay, it's my fault, I will update it, thanks. > > Rasmus
[PATCH v12 2/2] ASoC: qcom: sc7180: Add machine driver for sound card registration
From: Ajit Pandey
Add new driver to register sound card on sc7180 trogdor board and
do the required configuration for lpass cpu dai and external codecs
connected over MI2S interfaces.
Signed-off-by: Ajit Pandey
Signed-off-by: Cheng-Yi Chiang
---
Changes from v11 to v12
- Machine driver:
- Use the definitaion of index LPASS_DP_RX in sc7180-lpass.h.
- Fix compatible string.
- Replace a comma with semicolon.
sound/soc/qcom/Kconfig | 12 ++
sound/soc/qcom/Makefile | 2 +
sound/soc/qcom/sc7180.c | 266
3 files changed, 280 insertions(+)
create mode 100644 sound/soc/qcom/sc7180.c
diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig
index 484cad31da25..41cb08bd5588 100644
--- a/sound/soc/qcom/Kconfig
+++ b/sound/soc/qcom/Kconfig
@@ -138,4 +138,16 @@ config SND_SOC_SM8250
SM8250 SoC-based systems.
Say Y if you want to use audio device on this SoCs.
+config SND_SOC_SC7180
+ tristate "SoC Machine driver for SC7180 boards"
+ depends on I2C
+ select SND_SOC_QCOM_COMMON
+ select SND_SOC_LPASS_SC7180
+ select SND_SOC_MAX98357A
+ select SND_SOC_RT5682_I2C
+ help
+ To add support for audio on Qualcomm Technologies Inc.
+ SC7180 SoC-based systems.
+ Say Y if you want to use audio device on this SoCs.
+
endif #SND_SOC_QCOM
diff --git a/sound/soc/qcom/Makefile b/sound/soc/qcom/Makefile
index effa4b3f58fa..1600ae55bd34 100644
--- a/sound/soc/qcom/Makefile
+++ b/sound/soc/qcom/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_SND_SOC_LPASS_SC7180) += snd-soc-lpass-sc7180.o
snd-soc-storm-objs := storm.o
snd-soc-apq8016-sbc-objs := apq8016_sbc.o
snd-soc-apq8096-objs := apq8096.o
+snd-soc-sc7180-objs := sc7180.o
snd-soc-sdm845-objs := sdm845.o
snd-soc-sm8250-objs := sm8250.o
snd-soc-qcom-common-objs := common.o
@@ -25,6 +26,7 @@ snd-soc-qcom-common-objs := common.o
obj-$(CONFIG_SND_SOC_STORM) += snd-soc-storm.o
obj-$(CONFIG_SND_SOC_APQ8016_SBC) += snd-soc-apq8016-sbc.o
obj-$(CONFIG_SND_SOC_MSM8996) += snd-soc-apq8096.o
+obj-$(CONFIG_SND_SOC_SC7180) += snd-soc-sc7180.o
obj-$(CONFIG_SND_SOC_SDM845) += snd-soc-sdm845.o
obj-$(CONFIG_SND_SOC_SM8250) += snd-soc-sm8250.o
obj-$(CONFIG_SND_SOC_QCOM_COMMON) += snd-soc-qcom-common.o
diff --git a/sound/soc/qcom/sc7180.c b/sound/soc/qcom/sc7180.c
new file mode 100644
index ..b391f64c3a80
--- /dev/null
+++ b/sound/soc/qcom/sc7180.c
@@ -0,0 +1,266 @@
+// SPDX-License-Identifier: GPL-2.0-only
+//
+// Copyright (c) 2020, The Linux Foundation. All rights reserved.
+//
+// sc7180.c -- ALSA SoC Machine driver for SC7180
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "../codecs/rt5682.h"
+#include "common.h"
+#include "lpass.h"
+
+#define DEFAULT_MCLK_RATE 1920
+#define RT5682_PLL1_FREQ (48000 * 512)
+
+#define DRIVER_NAME "SC7180"
+
+struct sc7180_snd_data {
+ struct snd_soc_card card;
+ u32 pri_mi2s_clk_count;
+ struct snd_soc_jack hs_jack;
+ struct snd_soc_jack hdmi_jack;
+};
+
+static void sc7180_jack_free(struct snd_jack *jack)
+{
+ struct snd_soc_component *component = jack->private_data;
+
+ snd_soc_component_set_jack(component, NULL, NULL);
+}
+
+static int sc7180_headset_init(struct snd_soc_pcm_runtime *rtd)
+{
+ struct snd_soc_card *card = rtd->card;
+ struct sc7180_snd_data *pdata = snd_soc_card_get_drvdata(card);
+ struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
+ struct snd_soc_component *component = codec_dai->component;
+ struct snd_jack *jack;
+ int rval;
+
+ rval = snd_soc_card_jack_new(
+ card, "Headset Jack",
+ SND_JACK_HEADSET |
+ SND_JACK_HEADPHONE |
+ SND_JACK_BTN_0 | SND_JACK_BTN_1 |
+ SND_JACK_BTN_2 | SND_JACK_BTN_3,
+ >hs_jack, NULL, 0);
+
+ if (rval < 0) {
+ dev_err(card->dev, "Unable to add Headset Jack\n");
+ return rval;
+ }
+
+ jack = pdata->hs_jack.jack;
+
+ snd_jack_set_key(jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
+ snd_jack_set_key(jack, SND_JACK_BTN_1, KEY_VOICECOMMAND);
+ snd_jack_set_key(jack, SND_JACK_BTN_2, KEY_VOLUMEUP);
+ snd_jack_set_key(jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN);
+
+ jack->private_data = component;
+ jack->private_free = sc7180_jack_free;
+
+ return snd_soc_component_set_jack(component, >hs_jack, NULL);
+}
+
+static int sc7180_hdmi_init(struct snd_soc_pcm_runtime *rtd)
+{
+ struct snd_soc_card *card = rtd->card;
+ struct sc7180_snd_data *pdata = snd_soc_card_get_drvdata(card);
+ struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
+ struct snd_soc_component *component = codec_dai->component;
+ struct snd_jack *jack;
+ int rval;
+
+ rval =
[PATCH v12 1/2] ASoC: google: dt-bindings: Add sc7180-trogdor machine bindings
Add devicetree bindings documentation file for sc7180 sound card.
Signed-off-by: Cheng-Yi Chiang
---
Changes from v11 to v12
- Documentation:
- Change the file and title name for new compatible string
google,sc7180-trogdor.
- Change the example of model name.
.../bindings/sound/google,sc7180-trogdor.yaml | 130 ++
1 file changed, 130 insertions(+)
create mode 100644
Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml
diff --git a/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml
b/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml
new file mode 100644
index ..efc34689d6b5
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml
@@ -0,0 +1,130 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/google,sc7180-trogdor.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Google SC7180-Trogdor ASoC sound card driver
+
+maintainers:
+ - Rohit kumar
+ - Cheng-Yi Chiang
+
+description:
+ This binding describes the SC7180 sound card which uses LPASS for audio.
+
+properties:
+ compatible:
+const: google,sc7180-trogdor
+
+ audio-routing:
+$ref: /schemas/types.yaml#/definitions/non-unique-string-array
+description:
+ A list of the connections between audio components. Each entry is a
+ pair of strings, the first being the connection's sink, the second
+ being the connection's source.
+
+ model:
+$ref: /schemas/types.yaml#/definitions/string
+description: User specified audio sound card name
+
+ "#address-cells":
+const: 1
+
+ "#size-cells":
+const: 0
+
+patternProperties:
+ "^dai-link(@[0-9])?$":
+description:
+ Each subnode represents a dai link. Subnodes of each dai links would be
+ cpu/codec dais.
+
+type: object
+
+properties:
+ link-name:
+description: Indicates dai-link name and PCM stream name.
+$ref: /schemas/types.yaml#/definitions/string
+maxItems: 1
+
+ reg:
+description: dai link address.
+
+ cpu:
+description: Holds subnode which indicates cpu dai.
+type: object
+properties:
+ sound-dai: true
+
+ codec:
+description: Holds subnode which indicates codec dai.
+type: object
+properties:
+ sound-dai: true
+
+required:
+ - link-name
+ - cpu
+ - codec
+
+additionalProperties: false
+
+required:
+ - compatible
+ - model
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+
+ - |
+sound {
+compatible = "google,sc7180-trogdor";
+model = "sc7180-rt5682-max98357a-1mic";
+
+audio-routing =
+"Headphone Jack", "HPOL",
+"Headphone Jack", "HPOR";
+
+#address-cells = <1>;
+#size-cells = <0>;
+
+dai-link@0 {
+link-name = "MultiMedia0";
+reg = <0>;
+cpu {
+sound-dai = <_cpu 0>;
+};
+
+codec {
+sound-dai = < 0>;
+};
+};
+
+dai-link@1 {
+link-name = "MultiMedia1";
+reg = <1>;
+cpu {
+sound-dai = <_cpu 1>;
+};
+
+codec {
+sound-dai = <>;
+};
+};
+
+dai-link@2 {
+link-name = "MultiMedia2";
+reg = <2>;
+cpu {
+sound-dai = <_hdmi 0>;
+};
+
+codec {
+sound-dai = <_dp>;
+};
+};
+};
--
2.29.0.rc2.309.g374f81d7ae-goog
[PATCH v12 0/2] Add documentation and machine driver for SC7180 sound card
Note: - The machine driver patch is made by the collaboration of Cheng-Yi Chiang Rohit kumar Ajit Pandey But Ajit has left codeaurora. Changes from v1 to v2: - Ducumentation: Addressed all suggestions from Doug. - Machine driver: - Fix comment style for license. - Sort includes. - Remove sc7180_snd_hw_params. - Remove sc7180_dai_init and use aux device instead for headset jack registration. - Statically define format for Primary MI2S. - Atomic is not a concern because there is mutex in card to make sure startup and shutdown happen sequentially. - Fix missing return -EINVAL in startup. - Use static sound card. - Use devm_kzalloc to avoid kfree. Changes from v2 to v3: - Ducumentation: Addressed suggestions from Srini. - Machine driver: - Reuse qcom_snd_parse_of to parse properties. - Remove playback-only and capture-only. - Misc fixes to address comments. Changes from v3 to v4: - Ducumentation: Addressed suggestions from Rob. - Remove definition of dai. - Use 'sound-dai: true' for sound-dai schema. - Add reg property to pass 'make dt_binding_check' check although reg is not used in the driver. - Machine driver: - Add Reviewed-by: Tzung-Bi Shih Changes from v4 to v5: - Documentation: Addressed suggestions from Rob. - Add definition for "#address-cells" and "#size-cells". - Add additionalProperties: false - Add required properties. Changes from v5 to v6: - Documentation: Addressed suggestions from Rob. - Drop contains in compatible strings. - Only allow dai-link@[0-9] - Remove reg ref since it has a type definition already. Changes from v6 to v7 - Documentation: - Add headset-jack and hdmi-jack to specify the codec responsible for jack detection. - HDMI codec driver: - Use component set_jack ops instead of exporting hdmi_codec_set_jack_detect. - Machine driver: - Removed aux device following Stephan's suggestion. - Use headset-jack and hdmi-jack to specify the codec responsible for jack detection. - Add support for HDMI(actually DP) playback. Changes from v7 to v8 - Documentation: - Remove headset-jack and hdmi-jack. - Machine driver: - Let machine driver decide whether there is a jack on the DAI. Changes from v8 to v9 - hdmi-codec driver: - Fixed the naming. - Machine driver: - Fixed unused fields. - Moved snd_soc_card_set_drvdata - Keep the naming of HDMI as dai name until v5 of lpass-hdmi patches. Changes from v9 to v10 - Documentation: - Let compatible string be more specific for board configuration to allow for future changes. - Machine driver: - Fixed unused include and macro. - Add temporary macro SC7180_LPASS_DP for future change in sc7180-lpass.h. - Let sound card be dynamically allocated. - Change compatible string accordingly. Changes from v10 to v11 - Machine driver: - Use temporary macro LPASS_DP_RX for future change in sc7180-lpass.h. Changes from v11 to v12 - Documentation: - Change the file and title name for new compatible string google,sc7180-trogdor. - Change the example of model name. - Machine driver: - Use the definitaion of index LPASS_DP_RX in sc7180-lpass.h. - Fix for compatible string. - Replace a comma with semicolon. Ajit Pandey (1): ASoC: qcom: sc7180: Add machine driver for sound card registration Cheng-Yi Chiang (1): ASoC: google: dt-bindings: Add sc7180-trogdor machine bindings .../bindings/sound/google,sc7180-trogdor.yaml | 130 + sound/soc/qcom/Kconfig| 12 + sound/soc/qcom/Makefile | 2 + sound/soc/qcom/sc7180.c | 266 ++ 4 files changed, 410 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml create mode 100644 sound/soc/qcom/sc7180.c -- 2.29.0.rc2.309.g374f81d7ae-goog
[PATCH v2 01/10] media: tegra-video: Use zero crop settings if subdev has no get_selection
Currently try format implementation doesn't check if subdevice has
get_selection ops implemented and returns -EINVAL on error from
direct v4l2_subdev_call of get_selection.
Selection API's are not mandatory for all V4L2 subdevices.
This patch fixes it by adding v4l2_subdev_has_ops check prior to
calling get_selection ops and continues with try or set format with
zero crop settings for subdevices that don't have get_selection and
returns -EINVAL only for subdevices that has get_selection ops.
Signed-off-by: Sowjanya Komatineni
---
drivers/staging/media/tegra-video/vi.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/staging/media/tegra-video/vi.c
b/drivers/staging/media/tegra-video/vi.c
index 560d8b3..7edd35c 100644
--- a/drivers/staging/media/tegra-video/vi.c
+++ b/drivers/staging/media/tegra-video/vi.c
@@ -533,11 +533,18 @@ static int __tegra_channel_try_format(struct
tegra_vi_channel *chan,
fse.code = fmtinfo->code;
ret = v4l2_subdev_call(subdev, pad, enum_frame_size, pad_cfg, );
if (ret) {
- ret = v4l2_subdev_call(subdev, pad, get_selection, NULL,
);
- if (ret)
- return -EINVAL;
- pad_cfg->try_crop.width = sdsel.r.width;
- pad_cfg->try_crop.height = sdsel.r.height;
+ if (!v4l2_subdev_has_op(subdev, pad, get_selection)) {
+ pad_cfg->try_crop.width = 0;
+ pad_cfg->try_crop.height = 0;
+ } else {
+ ret = v4l2_subdev_call(subdev, pad, get_selection,
+ NULL, );
+ if (ret)
+ return -EINVAL;
+
+ pad_cfg->try_crop.width = sdsel.r.width;
+ pad_cfg->try_crop.height = sdsel.r.height;
+ }
} else {
pad_cfg->try_crop.width = fse.max_width;
pad_cfg->try_crop.height = fse.max_height;
--
2.7.4
[PATCH v2 09/10] media: tegra-video: Implement V4L2 device notify callback
Implement V4L2 device notify callback to handle
V4L2_EVENT_SOURCE_CHANGE event from subdevices.
HDMI-to-CSI bridge drivers trigger V4L2_EVENT_SOURCE_CHANGE when
source DV timing changes are detected or when HDMI hotplug happens.
Runtime source parameter changes during active streaming is not
allowed and Tegra video driver calls vb2_queue_error to signal a
fatal error if a notification of this event happens during an active
streaming.
Signed-off-by: Sowjanya Komatineni
---
drivers/staging/media/tegra-video/vi.c| 3 +++
drivers/staging/media/tegra-video/video.c | 18 ++
2 files changed, 21 insertions(+)
diff --git a/drivers/staging/media/tegra-video/vi.c
b/drivers/staging/media/tegra-video/vi.c
index 28c06a9..e866f7d 100644
--- a/drivers/staging/media/tegra-video/vi.c
+++ b/drivers/staging/media/tegra-video/vi.c
@@ -1634,6 +1634,9 @@ static int tegra_vi_graph_notify_complete(struct
v4l2_async_notifier *notifier)
v4l2_set_subdev_hostdata(subdev, chan);
+ subdev = tegra_channel_get_remote_source_subdev(chan);
+ v4l2_set_subdev_hostdata(subdev, chan);
+
return 0;
unregister_video:
diff --git a/drivers/staging/media/tegra-video/video.c
b/drivers/staging/media/tegra-video/video.c
index e50bd70..d966b31 100644
--- a/drivers/staging/media/tegra-video/video.c
+++ b/drivers/staging/media/tegra-video/video.c
@@ -7,6 +7,8 @@
#include
#include
+#include
+
#include "video.h"
static void tegra_v4l2_dev_release(struct v4l2_device *v4l2_dev)
@@ -24,6 +26,21 @@ static void tegra_v4l2_dev_release(struct v4l2_device
*v4l2_dev)
kfree(vid);
}
+static void tegra_v4l2_dev_notify(struct v4l2_subdev *sd,
+ unsigned int notification, void *arg)
+{
+ struct tegra_vi_channel *chan;
+ const struct v4l2_event *ev = arg;
+
+ if (notification != V4L2_DEVICE_NOTIFY_EVENT)
+ return;
+
+ chan = v4l2_get_subdev_hostdata(sd);
+ v4l2_event_queue(>video, arg);
+ if (ev->type == V4L2_EVENT_SOURCE_CHANGE &&
vb2_is_streaming(>queue))
+ vb2_queue_error(>queue);
+}
+
static int host1x_video_probe(struct host1x_device *dev)
{
struct tegra_video_device *vid;
@@ -49,6 +66,7 @@ static int host1x_video_probe(struct host1x_device *dev)
vid->v4l2_dev.mdev = >media_dev;
vid->v4l2_dev.release = tegra_v4l2_dev_release;
+ vid->v4l2_dev.notify = tegra_v4l2_dev_notify;
ret = v4l2_device_register(>dev, >v4l2_dev);
if (ret < 0) {
dev_err(>dev,
--
2.7.4
[PATCH v2 05/10] media: tegra-video: Add DV timing support
This patch adds below v4l2 DV timing ioctls to support HDMI-to-CSI
bridges.
Signed-off-by: Sowjanya Komatineni
---
drivers/staging/media/tegra-video/vi.c | 97 ++
1 file changed, 97 insertions(+)
diff --git a/drivers/staging/media/tegra-video/vi.c
b/drivers/staging/media/tegra-video/vi.c
index 525c087..d0d84da 100644
--- a/drivers/staging/media/tegra-video/vi.c
+++ b/drivers/staging/media/tegra-video/vi.c
@@ -18,6 +18,7 @@
#include
#include
+#include
#include
#include
#include
@@ -720,6 +721,97 @@ static int tegra_channel_s_selection(struct file *file,
void *fh,
return ret;
}
+static int tegra_channel_g_dv_timings(struct file *file, void *fh,
+ struct v4l2_dv_timings *timings)
+{
+ struct tegra_vi_channel *chan = video_drvdata(file);
+ struct v4l2_subdev *subdev;
+
+ subdev = tegra_channel_get_remote_source_subdev(chan);
+ if (!v4l2_subdev_has_op(subdev, video, g_dv_timings))
+ return -ENOTTY;
+
+ return v4l2_device_call_until_err(chan->video.v4l2_dev, 0,
+ video, g_dv_timings, timings);
+}
+
+static int tegra_channel_s_dv_timings(struct file *file, void *fh,
+ struct v4l2_dv_timings *timings)
+{
+ struct tegra_vi_channel *chan = video_drvdata(file);
+ struct v4l2_subdev *subdev;
+ struct v4l2_bt_timings *bt = >bt;
+ struct v4l2_dv_timings curr_timings;
+ int ret;
+
+ subdev = tegra_channel_get_remote_source_subdev(chan);
+ if (!v4l2_subdev_has_op(subdev, video, s_dv_timings))
+ return -ENOTTY;
+
+ ret = tegra_channel_g_dv_timings(file, fh, _timings);
+ if (ret)
+ return ret;
+
+ if (v4l2_match_dv_timings(timings, _timings, 0, false))
+ return 0;
+
+ if (vb2_is_busy(>queue))
+ return -EBUSY;
+
+ ret = v4l2_device_call_until_err(chan->video.v4l2_dev, 0,
+video, s_dv_timings, timings);
+ if (ret)
+ return ret;
+
+ chan->format.width = bt->width;
+ chan->format.height = bt->height;
+ chan->format.bytesperline = bt->width * chan->fmtinfo->bpp;
+ chan->format.sizeimage = chan->format.bytesperline * bt->height;
+ tegra_channel_fmt_align(chan, >format, chan->fmtinfo->bpp);
+
+ return 0;
+}
+
+static int tegra_channel_query_dv_timings(struct file *file, void *fh,
+ struct v4l2_dv_timings *timings)
+{
+ struct tegra_vi_channel *chan = video_drvdata(file);
+ struct v4l2_subdev *subdev;
+
+ subdev = tegra_channel_get_remote_source_subdev(chan);
+ if (!v4l2_subdev_has_op(subdev, video, query_dv_timings))
+ return -ENOTTY;
+
+ return v4l2_device_call_until_err(chan->video.v4l2_dev, 0,
+ video, query_dv_timings, timings);
+}
+
+static int tegra_channel_enum_dv_timings(struct file *file, void *fh,
+struct v4l2_enum_dv_timings *timings)
+{
+ struct tegra_vi_channel *chan = video_drvdata(file);
+ struct v4l2_subdev *subdev;
+
+ subdev = tegra_channel_get_remote_source_subdev(chan);
+ if (!v4l2_subdev_has_op(subdev, pad, enum_dv_timings))
+ return -ENOTTY;
+
+ return v4l2_subdev_call(subdev, pad, enum_dv_timings, timings);
+}
+
+static int tegra_channel_dv_timings_cap(struct file *file, void *fh,
+ struct v4l2_dv_timings_cap *cap)
+{
+ struct tegra_vi_channel *chan = video_drvdata(file);
+ struct v4l2_subdev *subdev;
+
+ subdev = tegra_channel_get_remote_source_subdev(chan);
+ if (!v4l2_subdev_has_op(subdev, pad, dv_timings_cap))
+ return -ENOTTY;
+
+ return v4l2_subdev_call(subdev, pad, dv_timings_cap, cap);
+}
+
static int tegra_channel_enum_input(struct file *file, void *fh,
struct v4l2_input *inp)
{
@@ -779,6 +871,11 @@ static const struct v4l2_ioctl_ops tegra_channel_ioctl_ops
= {
.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
.vidioc_g_selection = tegra_channel_g_selection,
.vidioc_s_selection = tegra_channel_s_selection,
+ .vidioc_g_dv_timings= tegra_channel_g_dv_timings,
+ .vidioc_s_dv_timings= tegra_channel_s_dv_timings,
+ .vidioc_query_dv_timings= tegra_channel_query_dv_timings,
+ .vidioc_enum_dv_timings = tegra_channel_enum_dv_timings,
+ .vidioc_dv_timings_cap = tegra_channel_dv_timings_cap,
};
/*
--
2.7.4
[PATCH v2 10/10] media: tegra-video: Add support for x8 captures with gang ports
Tegra VI/CSI hardware don't have native 8 lane capture support.
Each CSI port has max 4 lanes only. So for x8 captures, consecutive
ports are ganged up for left half and right half captures on to each
x4 ports with buffer offsets based on source image split width to align
side-by-side.
All ports in gang are configured together during the corresponding
video device node streaming for x8 captures.
x8 capture with gang ports are supported with HDMI-to-CSI bridges
where they split 4K image into left half onto one x4 port and
right half onto second x4 port.
Signed-off-by: Sowjanya Komatineni
---
drivers/staging/media/tegra-video/csi.c | 47 -
drivers/staging/media/tegra-video/csi.h | 14 +-
drivers/staging/media/tegra-video/tegra210.c | 304 ++-
drivers/staging/media/tegra-video/vi.c | 117 ---
drivers/staging/media/tegra-video/vi.h | 17 +-
5 files changed, 347 insertions(+), 152 deletions(-)
diff --git a/drivers/staging/media/tegra-video/csi.c
b/drivers/staging/media/tegra-video/csi.c
index a19c85c..a6c54f8 100644
--- a/drivers/staging/media/tegra-video/csi.c
+++ b/drivers/staging/media/tegra-video/csi.c
@@ -253,13 +253,14 @@ static unsigned int csi_get_pixel_rate(struct
tegra_csi_channel *csi_chan)
}
void tegra_csi_calc_settle_time(struct tegra_csi_channel *csi_chan,
+ u8 csi_port_num,
u8 *clk_settle_time,
u8 *ths_settle_time)
{
struct tegra_csi *csi = csi_chan->csi;
unsigned int cil_clk_mhz;
unsigned int pix_clk_mhz;
- int clk_idx = (csi_chan->csi_port_num >> 1) + 1;
+ int clk_idx = (csi_port_num >> 1) + 1;
cil_clk_mhz = clk_get_rate(csi->clks[clk_idx].clk) / MHZ;
pix_clk_mhz = csi_get_pixel_rate(csi_chan) / MHZ;
@@ -410,7 +411,7 @@ static int tegra_csi_channel_alloc(struct tegra_csi *csi,
unsigned int num_pads)
{
struct tegra_csi_channel *chan;
- int ret = 0;
+ int ret = 0, i;
chan = kzalloc(sizeof(*chan), GFP_KERNEL);
if (!chan)
@@ -418,8 +419,21 @@ static int tegra_csi_channel_alloc(struct tegra_csi *csi,
list_add_tail(>list, >csi_chans);
chan->csi = csi;
- chan->csi_port_num = port_num;
- chan->numlanes = lanes;
+ /*
+* Each CSI brick has maximum of 4 lanes.
+* For lanes more than 4, use multiple of immediate CSI bricks as gang.
+*/
+ if (lanes <= CSI_LANES_PER_BRICK) {
+ chan->numlanes = lanes;
+ chan->numgangports = 1;
+ } else {
+ chan->numlanes = CSI_LANES_PER_BRICK;
+ chan->numgangports = lanes / CSI_LANES_PER_BRICK;
+ }
+
+ for (i = 0; i < chan->numgangports; i++)
+ chan->csi_port_nums[i] = port_num + i * CSI_PORTS_PER_BRICK;
+
chan->of_node = node;
chan->numpads = num_pads;
if (num_pads & 0x2) {
@@ -461,9 +475,6 @@ static int tegra_csi_tpg_channels_alloc(struct tegra_csi
*csi)
static int tegra_csi_channels_alloc(struct tegra_csi *csi)
{
struct device_node *node = csi->dev->of_node;
- struct v4l2_fwnode_endpoint v4l2_ep = {
- .bus_type = V4L2_MBUS_CSI2_DPHY
- };
struct fwnode_handle *fwh;
struct device_node *channel;
struct device_node *ep;
@@ -471,6 +482,8 @@ static int tegra_csi_channels_alloc(struct tegra_csi *csi)
int ret;
for_each_child_of_node(node, channel) {
+ struct v4l2_fwnode_endpoint v4l2_ep = { .bus_type = 0 };
+
if (!of_node_name_eq(channel, "channel"))
continue;
@@ -499,8 +512,20 @@ static int tegra_csi_channels_alloc(struct tegra_csi *csi)
goto err_node_put;
}
- lanes = v4l2_ep.bus.mipi_csi2.num_data_lanes;
- if (!lanes || ((lanes & (lanes - 1)) != 0)) {
+ if (v4l2_ep.bus_type == V4L2_MBUS_PARALLEL)
+ lanes = v4l2_ep.bus.parallel.bus_width;
+ else
+ lanes = v4l2_ep.bus.mipi_csi2.num_data_lanes;
+
+ /*
+* Each CSI brick has maximum 4 data lanes.
+* For lanes more than 4, validate lanes to be multiple of 4
+* so multiple of consecutive CSI bricks can be ganged up for
+* streaming.
+*/
+ if (!lanes || ((lanes & (lanes - 1)) != 0) ||
+ (lanes > CSI_LANES_PER_BRICK && (((lanes & 3) != 0) ||
+ ((portno & 1) != 0 {
dev_err(csi->dev, "invalid data-lanes %d for %pOF\n",
lanes, channel);
ret = -EINVAL;
@@ -544,7 +569,7 @@ static int tegra_csi_channel_init(struct tegra_csi_channel
*chan)
subdev->dev = csi->dev;
if
[PATCH v2 08/10] media: tegra-video: Add support for V4L2_EVENT_SOURCE_CHANGE
Current implementation uses v4l2_ctrl_subscribe_event() and this
does not handle V4L2_EVENT_SOURCE_CHANGE.
So, update driver to handle V4L2_EVENT_SOURCE_CHANGE.
Signed-off-by: Sowjanya Komatineni
---
drivers/staging/media/tegra-video/vi.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/media/tegra-video/vi.c
b/drivers/staging/media/tegra-video/vi.c
index 936e5e5..28c06a9 100644
--- a/drivers/staging/media/tegra-video/vi.c
+++ b/drivers/staging/media/tegra-video/vi.c
@@ -642,6 +642,18 @@ static int tegra_channel_set_subdev_active_fmt(struct
tegra_vi_channel *chan)
return 0;
}
+static int
+tegra_channel_subscribe_event(struct v4l2_fh *fh,
+ const struct v4l2_event_subscription *sub)
+{
+ switch (sub->type) {
+ case V4L2_EVENT_SOURCE_CHANGE:
+ return v4l2_event_subscribe(fh, sub, 4, NULL);
+ }
+
+ return v4l2_ctrl_subscribe_event(fh, sub);
+}
+
static int tegra_channel_g_selection(struct file *file, void *priv,
struct v4l2_selection *sel)
{
@@ -902,7 +914,7 @@ static const struct v4l2_ioctl_ops tegra_channel_ioctl_ops
= {
.vidioc_expbuf = vb2_ioctl_expbuf,
.vidioc_streamon= vb2_ioctl_streamon,
.vidioc_streamoff = vb2_ioctl_streamoff,
- .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
+ .vidioc_subscribe_event = tegra_channel_subscribe_event,
.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
.vidioc_g_selection = tegra_channel_g_selection,
.vidioc_s_selection = tegra_channel_s_selection,
--
2.7.4
[PATCH v2 00/10] media: tegra-video: Add support for capturing from HDMI-to-CSI bridge
This series includes below changes to allow capturing from HDMI-to-CSI bridges. - Add DV timing, EDID and log status V4L2 IOCTLs - Subscribe V4L2_EVENT_SOURCE_CHANGE - Implement V4L2 device notify callback to report queue error on source change during active streaming. - Add support for NV16 V4L2 Pixel format. - Add x8 capture by multiple ports gang up for 4K captures from HDMI-to-CSI bridges. Note: These patches are tested with TC358840 HDMI-to-CSI bridge. This series also include below fixes - Allow format change for subdevs that don't have crop support. - Correct V4L2 Pixel format for RGB888_1X24 - Enable VI pixel transform for YUV and RGB formats. Delta between patch versions: [v2]: v1 + additional patch for x8 capture support Sowjanya Komatineni (10): media: tegra-video: Use zero crop settings if subdev has no get_selection media: tegra-video: Enable VI pixel transform for YUV and RGB formats media: tegra-video: Fix V4L2 pixel format for RGB888_1X24 media: tegra-video: Add support for V4L2_PIX_FMT_NV16 media: tegra-video: Add DV timing support media: tegra-video: Add support for EDID ioctl ops media: tegra-video: Add support for VIDIOC_LOG_STATUS ioctl media: tegra-video: Add support for V4L2_EVENT_SOURCE_CHANGE media: tegra-video: Implement V4L2 device notify callback media: tegra-video: Add support for x8 captures with gang ports drivers/staging/media/tegra-video/csi.c | 47 +++- drivers/staging/media/tegra-video/csi.h | 14 +- drivers/staging/media/tegra-video/tegra210.c | 312 +++ drivers/staging/media/tegra-video/vi.c | 288 + drivers/staging/media/tegra-video/vi.h | 17 +- drivers/staging/media/tegra-video/video.c| 18 ++ 6 files changed, 547 insertions(+), 149 deletions(-) -- 2.7.4
[PATCH v2 04/10] media: tegra-video: Add support for V4L2_PIX_FMT_NV16
NV16 are two-plane versions of YUV422 format.
VI/CSI surface0 registers corresponds to first Y plane and
surface1 registers corresponds to seconds UV plane.
This patch updates image size for NV16 format to include both planes
and programs VI/CSI surface1 registers for UV plane capture.
Signed-off-by: Sowjanya Komatineni
---
drivers/staging/media/tegra-video/tegra210.c | 13 +
drivers/staging/media/tegra-video/vi.c | 2 ++
2 files changed, 15 insertions(+)
diff --git a/drivers/staging/media/tegra-video/tegra210.c
b/drivers/staging/media/tegra-video/tegra210.c
index c883925..929d277 100644
--- a/drivers/staging/media/tegra-video/tegra210.c
+++ b/drivers/staging/media/tegra-video/tegra210.c
@@ -287,6 +287,7 @@ static int tegra_channel_capture_frame(struct
tegra_vi_channel *chan,
{
u32 thresh, value, frame_start, mw_ack_done;
int bytes_per_line = chan->format.bytesperline;
+ u32 sizeimage = chan->format.sizeimage;
int err;
/* program buffer address by using surface 0 */
@@ -296,6 +297,18 @@ static int tegra_channel_capture_frame(struct
tegra_vi_channel *chan,
vi_csi_write(chan, TEGRA_VI_CSI_SURFACE0_STRIDE, bytes_per_line);
/*
+* Program surface 1 for UV plane with offset sizeimage from Y plane.
+*/
+ if (chan->fmtinfo->fourcc == V4L2_PIX_FMT_NV16) {
+ vi_csi_write(chan, TEGRA_VI_CSI_SURFACE1_OFFSET_MSB,
+((u64)buf->addr + sizeimage / 2) >> 32);
+ vi_csi_write(chan, TEGRA_VI_CSI_SURFACE1_OFFSET_LSB,
+buf->addr + sizeimage / 2);
+ vi_csi_write(chan, TEGRA_VI_CSI_SURFACE1_STRIDE,
+bytes_per_line);
+ }
+
+ /*
* Tegra VI block interacts with host1x syncpt for synchronizing
* programmed condition of capture state and hardware operation.
* Frame start and Memory write acknowledge syncpts has their own
diff --git a/drivers/staging/media/tegra-video/vi.c
b/drivers/staging/media/tegra-video/vi.c
index 7edd35c..525c087 100644
--- a/drivers/staging/media/tegra-video/vi.c
+++ b/drivers/staging/media/tegra-video/vi.c
@@ -484,6 +484,8 @@ static void tegra_channel_fmt_align(struct tegra_vi_channel
*chan,
pix->bytesperline = clamp(bpl, min_bpl, max_bpl);
pix->sizeimage = pix->bytesperline * pix->height;
+ if (pix->pixelformat == V4L2_PIX_FMT_NV16)
+ pix->sizeimage *= 2;
}
static int __tegra_channel_try_format(struct tegra_vi_channel *chan,
--
2.7.4
[PATCH v2 06/10] media: tegra-video: Add support for EDID ioctl ops
This patch adds support for EDID get and set v4l2 ioctl ops to use
with HDMI to CSI bridges.
Signed-off-by: Sowjanya Komatineni
---
drivers/staging/media/tegra-video/vi.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/staging/media/tegra-video/vi.c
b/drivers/staging/media/tegra-video/vi.c
index d0d84da..92f36b1 100644
--- a/drivers/staging/media/tegra-video/vi.c
+++ b/drivers/staging/media/tegra-video/vi.c
@@ -721,6 +721,32 @@ static int tegra_channel_s_selection(struct file *file,
void *fh,
return ret;
}
+static int tegra_channel_g_edid(struct file *file, void *fh,
+ struct v4l2_edid *edid)
+{
+ struct tegra_vi_channel *chan = video_drvdata(file);
+ struct v4l2_subdev *subdev;
+
+ subdev = tegra_channel_get_remote_source_subdev(chan);
+ if (!v4l2_subdev_has_op(subdev, pad, get_edid))
+ return -ENOTTY;
+
+ return v4l2_subdev_call(subdev, pad, get_edid, edid);
+}
+
+static int tegra_channel_s_edid(struct file *file, void *fh,
+ struct v4l2_edid *edid)
+{
+ struct tegra_vi_channel *chan = video_drvdata(file);
+ struct v4l2_subdev *subdev;
+
+ subdev = tegra_channel_get_remote_source_subdev(chan);
+ if (!v4l2_subdev_has_op(subdev, pad, set_edid))
+ return -ENOTTY;
+
+ return v4l2_subdev_call(subdev, pad, set_edid, edid);
+}
+
static int tegra_channel_g_dv_timings(struct file *file, void *fh,
struct v4l2_dv_timings *timings)
{
@@ -871,6 +897,8 @@ static const struct v4l2_ioctl_ops tegra_channel_ioctl_ops
= {
.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
.vidioc_g_selection = tegra_channel_g_selection,
.vidioc_s_selection = tegra_channel_s_selection,
+ .vidioc_g_edid = tegra_channel_g_edid,
+ .vidioc_s_edid = tegra_channel_s_edid,
.vidioc_g_dv_timings= tegra_channel_g_dv_timings,
.vidioc_s_dv_timings= tegra_channel_s_dv_timings,
.vidioc_query_dv_timings= tegra_channel_query_dv_timings,
--
2.7.4
[PATCH v2 03/10] media: tegra-video: Fix V4L2 pixel format for RGB888_1X24
V4L2 pixel format is incorrect for RGB888_1X24.
This patch fixes it.
Signed-off-by: Sowjanya Komatineni
---
drivers/staging/media/tegra-video/tegra210.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/media/tegra-video/tegra210.c
b/drivers/staging/media/tegra-video/tegra210.c
index 6b23aa7..c883925 100644
--- a/drivers/staging/media/tegra-video/tegra210.c
+++ b/drivers/staging/media/tegra-video/tegra210.c
@@ -619,7 +619,7 @@ static const struct tegra_video_format
tegra210_video_formats[] = {
TEGRA210_VIDEO_FMT(RAW12, 12, SGBRG12_1X12, 2, T_R16_I, SGBRG12),
TEGRA210_VIDEO_FMT(RAW12, 12, SBGGR12_1X12, 2, T_R16_I, SBGGR12),
/* RGB888 */
- TEGRA210_VIDEO_FMT(RGB888, 24, RGB888_1X24, 4, T_A8R8G8B8, RGB24),
+ TEGRA210_VIDEO_FMT(RGB888, 24, RGB888_1X24, 4, T_A8R8G8B8, XRGB32),
TEGRA210_VIDEO_FMT(RGB888, 24, RGB888_1X32_PADHI, 4, T_A8B8G8R8,
XBGR32),
/* YUV422 */
--
2.7.4
[PATCH v2 02/10] media: tegra-video: Enable VI pixel transform for YUV and RGB formats
VI Pixel transforms converts source pixel data to selected destination pixel formats in memory and aligns properly. YUV and RGB formats need this pixel transform to be enabled. RAW formats use T_R16_I destination pixel format in memory and does not need pixel transform as they support direct write to memory. So, this patch enables pixel transform for YUV and RGB and keeps it bypass for RAW formats. Signed-off-by: Sowjanya Komatineni --- drivers/staging/media/tegra-video/tegra210.c | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/staging/media/tegra-video/tegra210.c b/drivers/staging/media/tegra-video/tegra210.c index ac066c0..6b23aa7 100644 --- a/drivers/staging/media/tegra-video/tegra210.c +++ b/drivers/staging/media/tegra-video/tegra210.c @@ -178,10 +178,23 @@ static int tegra_channel_capture_setup(struct tegra_vi_channel *chan) u32 format = chan->fmtinfo->img_fmt; u32 data_type = chan->fmtinfo->img_dt; u32 word_count = (width * chan->fmtinfo->bit_width) / 8; + u32 bypass_pixel_transform = BIT(BYPASS_PXL_TRANSFORM_OFFSET); + + /* +* VI Pixel transformation unit converts source pixels data format +* into selected destination pixel format and aligns properly while +* interfacing with memory packer. +* This pixel transformation should be enabled for YUV and RGB +* formats and should be bypassed for RAW formats as RAW formats +* only support direct to memory. +*/ + if (chan->pg_mode || data_type == TEGRA_IMAGE_DT_YUV422_8 || + data_type == TEGRA_IMAGE_DT_RGB888) + bypass_pixel_transform = 0; vi_csi_write(chan, TEGRA_VI_CSI_ERROR_STATUS, 0x); vi_csi_write(chan, TEGRA_VI_CSI_IMAGE_DEF, -((chan->pg_mode ? 0 : 1) << BYPASS_PXL_TRANSFORM_OFFSET) | +bypass_pixel_transform | (format << IMAGE_DEF_FORMAT_OFFSET) | IMAGE_DEF_DEST_MEM); vi_csi_write(chan, TEGRA_VI_CSI_IMAGE_DT, data_type); -- 2.7.4
[PATCH v2 07/10] media: tegra-video: Add support for VIDIOC_LOG_STATUS ioctl
This patch adds support for log_status ioctl.
Signed-off-by: Sowjanya Komatineni
---
drivers/staging/media/tegra-video/vi.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/staging/media/tegra-video/vi.c
b/drivers/staging/media/tegra-video/vi.c
index 92f36b1..936e5e5 100644
--- a/drivers/staging/media/tegra-video/vi.c
+++ b/drivers/staging/media/tegra-video/vi.c
@@ -838,6 +838,15 @@ static int tegra_channel_dv_timings_cap(struct file *file,
void *fh,
return v4l2_subdev_call(subdev, pad, dv_timings_cap, cap);
}
+static int tegra_channel_log_status(struct file *file, void *fh)
+{
+ struct tegra_vi_channel *chan = video_drvdata(file);
+
+ v4l2_device_call_all(chan->video.v4l2_dev, 0, core, log_status);
+
+ return 0;
+}
+
static int tegra_channel_enum_input(struct file *file, void *fh,
struct v4l2_input *inp)
{
@@ -904,6 +913,7 @@ static const struct v4l2_ioctl_ops tegra_channel_ioctl_ops
= {
.vidioc_query_dv_timings= tegra_channel_query_dv_timings,
.vidioc_enum_dv_timings = tegra_channel_enum_dv_timings,
.vidioc_dv_timings_cap = tegra_channel_dv_timings_cap,
+ .vidioc_log_status = tegra_channel_log_status,
};
/*
--
2.7.4
Re: [RFC PATCH 0/8] KVM: x86/mmu: Introduce pinned SPTEs framework
Hi Sean, On 8/4/20 2:40 PM, Brijesh Singh wrote: > On 8/3/20 12:16 PM, Sean Christopherson wrote: >> On Mon, Aug 03, 2020 at 10:52:05AM -0500, Brijesh Singh wrote: >>> Thanks for series Sean. Some thoughts >>> >>> >>> On 7/31/20 4:23 PM, Sean Christopherson wrote: SEV currently needs to pin guest memory as it doesn't support migrating encrypted pages. Introduce a framework in KVM's MMU to support pinning pages on demand without requiring additional memory allocations, and with (somewhat hazy) line of sight toward supporting more advanced features for encrypted guest memory, e.g. host page migration. >>> Eric's attempt to do a lazy pinning suffers with the memory allocation >>> problem and your series seems to address it. As you have noticed, >>> currently the SEV enablement in the KVM does not support migrating the >>> encrypted pages. But the recent SEV firmware provides a support to >>> migrate the encrypted pages (e.g host page migration). The support is >>> available in SEV FW >= 0.17. >> I assume SEV also doesn't support ballooning? Ballooning would be a good >> first step toward page migration as I think it'd be easier for KVM to >> support, e.g. only needs to deal with the "zap" and not the "move". > > Yes, the ballooning does not work with the SEV. > > The idea is to use a software available bit in the SPTE to track that a page has been pinned. The decision to pin a page and the actual pinning managment is handled by vendor code via kvm_x86_ops hooks. There are intentionally two hooks (zap and unzap) introduced that are not needed for SEV. I included them to again show how the flag (probably renamed?) could be used for more than just pin/unpin. >>> If using the available software bits for the tracking the pinning is >>> acceptable then it can be used for the non-SEV guests (if needed). I >>> will look through your patch more carefully but one immediate question, >>> when do we unpin the pages? In the case of the SEV, once a page is >>> pinned then it should not be unpinned until the guest terminates. If we >>> unpin the page before the VM terminates then there is a chance the host >>> page migration will kick-in and move the pages. The KVM MMU code may >>> call to drop the spte's during the zap/unzap and this happens a lot >>> during a guest execution and it will lead us to the path where a vendor >>> specific code will unpin the pages during the guest execution and cause >>> a data corruption for the SEV guest. >> The pages are unpinned by: >> >> drop_spte() >> | >> -> rmap_remove() >> | >> -> sev_drop_pinned_spte() >> >> >> The intent is to allow unpinning pages when the mm_struct dies, i.e. when >> the memory is no longer reachable (as opposed to when the last reference to >> KVM is put), but typing that out, I realize there are dependencies and >> assumptions that don't hold true for SEV as implemented. > > So, I tried this RFC with the SEV guest (of course after adding some of > the stuff you highlighted below), the guest fails randomly. I have seen > a two to three type of failures 1) boot 2) kernbench execution and 3) > device addition/removal, the failure signature is not consistent. I > believe after addressing some of the dependencies we may able to make > some progress but it will add new restriction which did not existed before. > >> - Parent shadow pages won't be zapped. Recycling MMU pages and zapping >> all SPs due to memslot updates are the two concerns. >> >> The easy way out for recycling is to not recycle SPs with pinned >> children, though that may or may not fly with VMM admins. >> >> I'm trying to resolve the memslot issue[*], but confirming that there's >> no longer an issue with not zapping everything is proving difficult as >> we haven't yet reproduced the original bug. >> >> - drop_large_spte() won't be invoked. I believe the only semi-legitimate >> scenario is if the NX huge page workaround is toggled on while a VM is >> running. Disallowing that if there is an SEV guest seems reasonable? >> >> There might be an issue with the host page size changing, but I don't >> think that can happen if the page is pinned. That needs more >> investigation. >> >> >> [*] >> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.kernel.org%2Fr%2F20200703025047.13987-1-sean.j.christopherson%40intel.comdata=02%7C01%7Cbrijesh.singh%40amd.com%7C8d0dd94297ff4d24e54108d837d0f1dc%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637320717832773086sdata=yAHvMptxstoczXBZkFCpNC4AbADOJOgluwAtIYCuNVo%3Dreserved=0 We would like to pin the guest memory on #NPF to reduce the boot delay for the SEV guest. Are you planning to proceed with this RFC? With the some fixes, I am able to get the RFC working for the SEV guest. I can share those fixes with you so that you can include them on next revision. One of the main roadblock I see is that the proposed framework
Re: [PATCH v8 -tip 02/26] sched: Introduce sched_class::pick_task()
On 2020/10/26 17:01, Peter Zijlstra wrote:
> On Sat, Oct 24, 2020 at 08:27:16AM -0400, Vineeth Pillai wrote:
>>
>>
>> On 10/24/20 7:10 AM, Vineeth Pillai wrote:
>>>
>>> diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
>>> index 93a3b874077d..4cae5ac48b60 100644
>>> --- a/kernel/sched/fair.c
>>> +++ b/kernel/sched/fair.c
>>> @@ -4428,12 +4428,14 @@ pick_next_entity(struct cfs_rq *cfs_rq, struct
>>> sched_entity *curr)
>>> se = second;
>>> }
>>>
>>> - if (cfs_rq->next && wakeup_preempt_entity(cfs_rq->next, left) <
>>> 1) {
>>> + if (left && cfs_rq->next &&
>>> + wakeup_preempt_entity(cfs_rq->next, left) < 1) {
>>> /*
>>> * Someone really wants this to run. If it's not unfair,
>>> run it.
>>> */
>>> se = cfs_rq->next;
>>> - } else if (cfs_rq->last && wakeup_preempt_entity(cfs_rq->last,
>>> left) < 1) {
>>> + } else if (left && cfs_rq->last &&
>>> + wakeup_preempt_entity(cfs_rq->last, left) < 1) {
>>> /*
>>> * Prefer last buddy, try to return the CPU to a
>>> preempted task.
>>>
>>>
>>> There reason for left being NULL needs to be investigated. This was
>>> there from v1 and we did not yet get to it. I shall try to debug later
>>> this week.
>>
>> Thinking more about it and looking at the crash, I think that
>> 'left == NULL' can happen in pick_next_entity for core scheduling.
>> If a cfs_rq has only one task that is running, then it will be
>> dequeued and 'left = __pick_first_entity()' will be NULL as the
>> cfs_rq will be empty. This would not happen outside of coresched
>> because we never call pick_tack() before put_prev_task() which
>> will enqueue the task back.
>>
>> With core scheduling, a cpu can call pick_task() for its sibling while
>> the sibling is still running the active task and put_prev_task has yet
>> not been called. This can result in 'left == NULL'.
>
> Quite correct. Hurmph.. the reason we do this is because... we do the
> update_curr() the wrong way around. And I can't seem to remember why we
> do that (it was in my original patches).
>
> Something like so seems the obvious thing to do, but I can't seem to
> remember why we're not doing it :-(
>
> --- a/kernel/sched/fair.c
> +++ b/kernel/sched/fair.c
> @@ -6950,15 +6950,10 @@ static struct task_struct *pick_task_fai
> do {
> struct sched_entity *curr = cfs_rq->curr;
>
> - se = pick_next_entity(cfs_rq, NULL);
> + if (curr && curr->on_rq)
> + update_curr(cfs_rq);
>
> - if (curr) {
> - if (se && curr->on_rq)
> - update_curr(cfs_rq);
> -
> - if (!se || entity_before(curr, se))
> - se = curr;
> - }
> + se = pick_next_entity(cfs_rq, curr);
>
> cfs_rq = group_cfs_rq(se);
> } while (cfs_rq);
>
This patch works too for my benchmark, thanks Peter!
[PATCH] rtlwifi: Fix non-canonical address access issues
During realtek USB wireless NIC initialization, it's unexpected disconnection will cause urb sumbmit fail. On the one hand, _rtl_usb_cleanup_rx will be called to clean up rx stuff, especially for rtl_wq. On the other hand, disconnection will cause rtl_usb_disconnect and _rtl_usb_cleanup_rx to be called. So, rtl_wq will be flush/destroy twice, which will cause non-canonical address 0xdead0122 access and general protection fault. Fixed this issue by remove _rtl_usb_cleanup_rx when urb sumbmit fail. Signed-off-by: WeitaoWangoc --- drivers/net/wireless/realtek/rtlwifi/usb.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/net/wireless/realtek/rtlwifi/usb.c b/drivers/net/wireless/realtek/rtlwifi/usb.c index 06e073d..d62b87f 100644 --- a/drivers/net/wireless/realtek/rtlwifi/usb.c +++ b/drivers/net/wireless/realtek/rtlwifi/usb.c @@ -731,7 +731,6 @@ static int _rtl_usb_receive(struct ieee80211_hw *hw) err_out: usb_kill_anchored_urbs(>rx_submitted); - _rtl_usb_cleanup_rx(hw); return err; } -- 2.7.4
RE: [RESEND 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt
> > -Original Message- > > From: Marc Zyngier > > Sent: Monday, October 26, 2020 4:23 AM > > To: Rasmus Villemoes > > Cc: Biwen Li (OSS) ; shawn...@kernel.org; > > robh...@kernel.org; mark.rutl...@arm.com; Leo Li ; > > Z.q. Hou ; t...@linutronix.de; > > ja...@lakedaemon.net; devicet...@vger.kernel.org; linux- > > ker...@vger.kernel.org; Jiafei Pan ; Xiaobo Xie > > ; linux-arm-ker...@lists.infradead.org; Biwen Li > > > > Subject: Re: [RESEND 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A > > external interrupt > > > > On 2020-10-26 09:06, Rasmus Villemoes wrote: > > > On 26/10/2020 09.44, Marc Zyngier wrote: > > >> On 2020-10-26 08:01, Biwen Li wrote: > > >>> From: Hou Zhiqiang > > >>> > > >>> Add an new IRQ chip declaration for LS1043A and LS1088A > > >>> - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A > > >>> - compatible "fsl,ls1088a-extirq" for LS1088A, LS208xA, LX216xA > > >> > > >> Three things: > > >> - This commit message doesn't describe the bit_reverse change > > > > > > Yeah, please elaborate on that, as the RM for 1043 or 1046 doesn't > > > mention anything about bit reversal for the scfg registers - they > > > don't seem to have the utter nonsense that is SCFG_SCFGREVCR, but > > > perhaps, instead of removing it, that has just become a hard-coded > > > part of the IP. > > > > > > Also, IANAL etc., but > > > > > >>> +// Copyright 2019-2020 NXP > > > > > > really? Seems to be a bit of a stretch. > > > > > > At the very least, cc'ing the original author and only person to > > > ever touch that file would have been appreciated. > > > > Huh. Well spotted. That's definitely not on. > > NXP people, please talk to your legal department. > > We do have an internal policy to require developer adding/updating NXP > copyright on non-trivial changes. I'm not sure if this change should be > considered trivial, but adding copyright claim on a file without prior > copyright > claims could causing confusion like in this case. One potential solution is > to > add a more specific description on the NXP change together with the copyright > claim. But maybe an easier solution is to add Rasmus your Copyright claim > first if you are ok with it. Yes, added a wrong Copyright. > > Regards, > Leo
Re: [PATCH v3 20/20] perf arm-spe: Add support for ARMv8.3-SPE
On Mon, Oct 26, 2020 at 06:17:20PM +, André Przywara wrote:
> On 22/10/2020 15:58, Leo Yan wrote:
>
> Hi,
>
> > From: Wei Li
> >
> > This patch is to support Armv8.3 extension for SPE, it adds alignment
> > field in the Events packet and it supports the Scalable Vector Extension
> > (SVE) for Operation packet and Events packet with two additions:
> >
> > - The vector length for SVE operations in the Operation Type packet;
> > - The incomplete predicate and empty predicate fields in the Events
> > packet.
> >
> > Signed-off-by: Wei Li
> > Signed-off-by: Leo Yan
> > ---
> > .../arm-spe-decoder/arm-spe-pkt-decoder.c | 74 ++-
> > .../arm-spe-decoder/arm-spe-pkt-decoder.h | 18 +
> > 2 files changed, 90 insertions(+), 2 deletions(-)
> >
> > diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> > b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> > index 74ac12cbec69..6da4cfbc9914 100644
> > --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> > +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> > @@ -332,6 +332,21 @@ static int arm_spe_pkt_desc_event(const struct
> > arm_spe_pkt *packet,
> > if (ret < 0)
> > return ret;
> > }
> > + if (payload & BIT(EV_ALIGNMENT)) {
> > + ret = arm_spe_pkt_snprintf(, , " ALIGNMENT");
> > + if (ret < 0)
> > + return ret;
> > + }
> > + if (payload & BIT(EV_PARTIAL_PREDICATE)) {
> > + ret = arm_spe_pkt_snprintf(, , " SVE-PARTIAL-PRED");
> > + if (ret < 0)
> > + return ret;
> > + }
> > + if (payload & BIT(EV_EMPTY_PREDICATE)) {
> > + ret = arm_spe_pkt_snprintf(, , " SVE-EMPTY-PRED");
> > + if (ret < 0)
> > + return ret;
> > + }
> >
> > return buf_len - blen;
> > }
> > @@ -345,8 +360,43 @@ static int arm_spe_pkt_desc_op_type(const struct
> > arm_spe_pkt *packet,
> >
> > switch (class) {
> > case SPE_OP_PKT_HDR_CLASS_OTHER:
> > - return arm_spe_pkt_snprintf(, ,
> > - payload & SPE_OP_PKT_COND ? "COND-SELECT" :
> > "INSN-OTHER");
> > + if (SPE_OP_PKT_OTHER_SUBCLASS_SVE_OP_GET(payload) ==
> > + SPE_OP_PKT_OTHER_SUBCLASS_SVE_OP) {
>
> Same comment as in the other patch, can you combine those two into one
> symbol?
Thanks for the suggestion, have refined patches for this and sent out
patch set v4 for reviewing.
Leo
[PATCH v4 21/21] perf arm-spe: Add support for ARMv8.3-SPE
From: Wei Li
This patch is to support Armv8.3 extension for SPE, it adds alignment
field in the Events packet and it supports the Scalable Vector Extension
(SVE) for Operation packet and Events packet with two additions:
- The vector length for SVE operations in the Operation Type packet;
- The incomplete predicate and empty predicate fields in the Events
packet.
Signed-off-by: Wei Li
Signed-off-by: Leo Yan
---
.../arm-spe-decoder/arm-spe-pkt-decoder.c | 72 ++-
.../arm-spe-decoder/arm-spe-pkt-decoder.h | 16 +
2 files changed, 86 insertions(+), 2 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 5195ec3b1ec4..40b12d6893f9 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -332,6 +332,21 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt
*packet,
if (ret < 0)
return ret;
}
+ if (payload & BIT(EV_ALIGNMENT)) {
+ ret = arm_spe_pkt_snprintf(, , " ALIGNMENT");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & BIT(EV_PARTIAL_PREDICATE)) {
+ ret = arm_spe_pkt_snprintf(, , " SVE-PARTIAL-PRED");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & BIT(EV_EMPTY_PREDICATE)) {
+ ret = arm_spe_pkt_snprintf(, , " SVE-EMPTY-PRED");
+ if (ret < 0)
+ return ret;
+ }
return buf_len - blen;
}
@@ -345,8 +360,42 @@ static int arm_spe_pkt_desc_op_type(const struct
arm_spe_pkt *packet,
switch (class) {
case SPE_OP_PKT_HDR_CLASS_OTHER:
- return arm_spe_pkt_snprintf(, ,
- payload & SPE_OP_PKT_COND ? "COND-SELECT" :
"INSN-OTHER");
+ if (SPE_OP_PKT_IS_OTHER_SVE_OP(payload)) {
+
+ ret = arm_spe_pkt_snprintf(, , "SVE-OTHER");
+ if (ret < 0)
+ return ret;
+
+ /* SVE effective vector length */
+ ret = arm_spe_pkt_snprintf(, , " EVLEN %d",
+ SPE_OP_PKG_SVE_EVL(payload));
+ if (ret < 0)
+ return ret;
+
+ if (payload & SPE_OP_PKT_SVE_FP) {
+ ret = arm_spe_pkt_snprintf(, , " FP");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & SPE_OP_PKT_SVE_PRED) {
+ ret = arm_spe_pkt_snprintf(, , "
PRED");
+ if (ret < 0)
+ return ret;
+ }
+ } else {
+ ret = arm_spe_pkt_snprintf(, , "OTHER");
+ if (ret < 0)
+ return ret;
+
+ ret = arm_spe_pkt_snprintf(, , " %s",
+ payload & SPE_OP_PKT_COND ?
+ "COND-SELECT" : "INSN-OTHER");
+ if (ret < 0)
+ return ret;
+ }
+
+ return buf_len - blen;
+
case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC:
ret = arm_spe_pkt_snprintf(, ,
payload & SPE_OP_PKT_ST ? "ST" :
"LD");
@@ -400,6 +449,25 @@ static int arm_spe_pkt_desc_op_type(const struct
arm_spe_pkt *packet,
break;
}
+ if (SPE_OP_PKT_IS_LDST_SVE(payload)) {
+ /* SVE effective vector length */
+ ret = arm_spe_pkt_snprintf(, , " EVLEN %d",
+ SPE_OP_PKG_SVE_EVL(payload));
+ if (ret < 0)
+ return ret;
+
+ if (payload & SPE_OP_PKT_SVE_PRED) {
+ ret = arm_spe_pkt_snprintf(, , "
PRED");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & SPE_OP_PKT_SVE_SG) {
+ ret = arm_spe_pkt_snprintf(, , " SG");
+ if (ret < 0)
+ return ret;
+ }
+ }
+
return buf_len - blen;
case SPE_OP_PKT_HDR_CLASS_BR_ERET:
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index 1ad14885c2a1..9b970e7bf1e2 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++
[PATCH v4 18/21] perf arm-spe: Refactor operation packet handling
Defines macros for operation packet header and formats (support sub
classes for 'other', 'branch', 'load and store', etc). Uses these
macros for operation packet decoding and dumping.
Signed-off-by: Leo Yan
---
.../arm-spe-decoder/arm-spe-pkt-decoder.c | 32 ++-
.../arm-spe-decoder/arm-spe-pkt-decoder.h | 23 +
2 files changed, 40 insertions(+), 15 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 7c6a0caed976..e3b0d22743e8 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -144,7 +144,7 @@ static int arm_spe_get_op_type(const unsigned char *buf,
size_t len,
struct arm_spe_pkt *packet)
{
packet->type = ARM_SPE_OP_TYPE;
- packet->index = buf[0] & 0x3;
+ packet->index = SPE_OP_PKT_HDR_CLASS(buf[0]);
return arm_spe_get_payload(buf, len, 0, packet);
}
@@ -339,37 +339,38 @@ static int arm_spe_pkt_desc_event(const struct
arm_spe_pkt *packet,
static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet,
char *buf, size_t buf_len)
{
- int ret, idx = packet->index;
+ int ret, class = packet->index;
unsigned long long payload = packet->payload;
size_t blen = buf_len;
- switch (idx) {
- case 0:
+ switch (class) {
+ case SPE_OP_PKT_HDR_CLASS_OTHER:
return arm_spe_pkt_snprintf(, ,
- payload & 0x1 ? "COND-SELECT" : "INSN-OTHER");
- case 1:
+ payload & SPE_OP_PKT_COND ? "COND-SELECT" :
"INSN-OTHER");
+ case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC:
ret = arm_spe_pkt_snprintf(, ,
- payload & 0x1 ? "ST" : "LD");
+ payload & SPE_OP_PKT_ST ? "ST" :
"LD");
if (ret < 0)
return ret;
- if (payload & 0x2) {
- if (payload & 0x4) {
+ if (SPE_OP_PKT_IS_LDST_ATOMIC(payload)) {
+ if (payload & SPE_OP_PKT_AT) {
ret = arm_spe_pkt_snprintf(, , " AT");
if (ret < 0)
return ret;
}
- if (payload & 0x8) {
+ if (payload & SPE_OP_PKT_EXCL) {
ret = arm_spe_pkt_snprintf(, , "
EXCL");
if (ret < 0)
return ret;
}
- if (payload & 0x10) {
+ if (payload & SPE_OP_PKT_AR) {
ret = arm_spe_pkt_snprintf(, , " AR");
if (ret < 0)
return ret;
}
- } else if (payload & 0x4) {
+ } else if (SPE_OP_PKT_LDST_SUBCLASS_GET(payload) ==
+ SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP) {
ret = arm_spe_pkt_snprintf(, , " SIMD-FP");
if (ret < 0)
return ret;
@@ -377,17 +378,18 @@ static int arm_spe_pkt_desc_op_type(const struct
arm_spe_pkt *packet,
return buf_len - blen;
- case 2:
+ case SPE_OP_PKT_HDR_CLASS_BR_ERET:
ret = arm_spe_pkt_snprintf(, , "B");
if (ret < 0)
return ret;
- if (payload & 0x1) {
+ if (payload & SPE_OP_PKT_COND) {
ret = arm_spe_pkt_snprintf(, , " COND");
if (ret < 0)
return ret;
}
- if (payload & 0x2) {
+
+ if (SPE_OP_PKT_IS_INDIRECT_BRANCH(payload)) {
ret = arm_spe_pkt_snprintf(, , " IND");
if (ret < 0)
return ret;
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index 42ed4e61ede2..7032fc141ad4 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
@@ -105,6 +105,29 @@ enum arm_spe_events {
EV_EMPTY_PREDICATE = 18,
};
+/* Operation packet header */
+#define SPE_OP_PKT_HDR_CLASS(h)((h) & GENMASK_ULL(1,
0))
+#define SPE_OP_PKT_HDR_CLASS_OTHER 0x0
+#define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC 0x1
+#define SPE_OP_PKT_HDR_CLASS_BR_ERET 0x2
+
+#define SPE_OP_PKT_CONDBIT(0)
+
+#define SPE_OP_PKT_LDST_SUBCLASS_GET(v)((v) & GENMASK_ULL(7,
[PATCH v4 19/21] perf arm-spe: Add more sub classes for operation packet
For the operation type packet payload with load/store class, it misses
to support these sub classes:
- A load/store targeting the general-purpose registers;
- A load/store targeting unspecified registers;
- The ARMv8.4 nested virtualisation extension can redirect system
register accesses to a memory page controlled by the hypervisor.
The SPE profiling feature in newer implementations can tag those
memory accesses accordingly.
Add the bit pattern describing load/store sub classes, so that the perf
tool can decode it properly.
Inspired by Andre Przywara, refined the commit log and code for more
clear description.
Co-developed-by: Andre Przywara
Signed-off-by: Leo Yan
Reviewed-by: Andre Przywara
---
.../arm-spe-decoder/arm-spe-pkt-decoder.c | 28 +--
1 file changed, 26 insertions(+), 2 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index e3b0d22743e8..d3925521d0f4 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -369,11 +369,35 @@ static int arm_spe_pkt_desc_op_type(const struct
arm_spe_pkt *packet,
if (ret < 0)
return ret;
}
- } else if (SPE_OP_PKT_LDST_SUBCLASS_GET(payload) ==
- SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP) {
+ }
+
+ switch (SPE_OP_PKT_LDST_SUBCLASS_GET(payload)) {
+ case SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP:
ret = arm_spe_pkt_snprintf(, , " SIMD-FP");
if (ret < 0)
return ret;
+
+ break;
+ case SPE_OP_PKT_LDST_SUBCLASS_GP_REG:
+ ret = arm_spe_pkt_snprintf(, , " GP-REG");
+ if (ret < 0)
+ return ret;
+
+ break;
+ case SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG:
+ ret = arm_spe_pkt_snprintf(, , " UNSPEC-REG");
+ if (ret < 0)
+ return ret;
+
+ break;
+ case SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG:
+ ret = arm_spe_pkt_snprintf(, , " NV-SYSREG");
+ if (ret < 0)
+ return ret;
+
+ break;
+ default:
+ break;
}
return buf_len - blen;
--
2.17.1
[PATCH v4 13/21] perf arm-spe: Refactor counter packet handling
This patch defines macros for counter packet header, and uses macros to
replace hard code values in functions arm_spe_get_counter() and
arm_spe_pkt_desc().
In the function arm_spe_get_counter(), adds a new line for more
readable.
Signed-off-by: Leo Yan
---
tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 11 ++-
tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h | 5 +
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 8f481c6ea054..4be649c26002 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -152,10 +152,11 @@ static int arm_spe_get_counter(const unsigned char *buf,
size_t len,
const unsigned char ext_hdr, struct arm_spe_pkt
*packet)
{
packet->type = ARM_SPE_COUNTER;
+
if (ext_hdr)
- packet->index = ((buf[0] & 0x3) << 3) | (buf[1] & 0x7);
+ packet->index = SPE_HDR_EXTENDED_INDEX(buf[0], buf[1]);
else
- packet->index = buf[0] & 0x7;
+ packet->index = SPE_HDR_SHORT_INDEX(buf[0]);
return arm_spe_get_payload(buf, len, ext_hdr, packet);
}
@@ -307,17 +308,17 @@ static int arm_spe_pkt_desc_counter(const struct
arm_spe_pkt *packet,
return ret;
switch (packet->index) {
- case 0:
+ case SPE_CNT_PKT_HDR_INDEX_TOTAL_LAT:
ret = arm_spe_pkt_snprintf(, , "TOT");
if (ret < 0)
return ret;
break;
- case 1:
+ case SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT:
ret = arm_spe_pkt_snprintf(, , "ISSUE");
if (ret < 0)
return ret;
break;
- case 2:
+ case SPE_CNT_PKT_HDR_INDEX_TRANS_LAT:
ret = arm_spe_pkt_snprintf(, , "XLAT");
if (ret < 0)
return ret;
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index 9bc876bffd35..7d8e34e35f05 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
@@ -82,6 +82,11 @@ struct arm_spe_pkt {
/* Context packet header */
#define SPE_CTX_PKT_HDR_INDEX(h) ((h) & GENMASK_ULL(1, 0))
+/* Counter packet header */
+#define SPE_CNT_PKT_HDR_INDEX_TOTAL_LAT0x0
+#define SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT0x1
+#define SPE_CNT_PKT_HDR_INDEX_TRANS_LAT0x2
+
const char *arm_spe_pkt_name(enum arm_spe_pkt_type);
int arm_spe_get_packet(const unsigned char *buf, size_t len,
--
2.17.1
[PATCH v4 20/21] perf arm_spe: Decode memory tagging properties
From: Andre Przywara
When SPE records a physical address, it can additionally tag the event
with information from the Memory Tagging architecture extension.
Decode the two additional fields in the SPE event payload.
[leoy: Refined patch to use predefined macros]
Signed-off-by: Andre Przywara
Signed-off-by: Leo Yan
---
tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 6 +-
tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h | 2 ++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index d3925521d0f4..5195ec3b1ec4 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -430,6 +430,7 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt
*packet,
char *buf, size_t buf_len)
{
int ns, el, idx = packet->index;
+ int ch, pat;
u64 payload = packet->payload;
switch (idx) {
@@ -446,9 +447,12 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt
*packet,
"VA 0x%llx", payload);
case SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS:
ns = !!SPE_ADDR_PKT_GET_NS(payload);
+ ch = !!SPE_ADDR_PKT_GET_CH(payload);
+ pat = SPE_ADDR_PKT_GET_PAT(payload);
payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload);
return arm_spe_pkt_snprintf(, _len,
- "PA 0x%llx ns=%d", payload, ns);
+ "PA 0x%llx ns=%d ch=%d, pat=%x",
+ payload, ns, ch, pat);
default:
return 0;
}
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index 7032fc141ad4..1ad14885c2a1 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
@@ -73,6 +73,8 @@ struct arm_spe_pkt {
#define SPE_ADDR_PKT_GET_NS(v) (((v) & BIT_ULL(63)) >> 63)
#define SPE_ADDR_PKT_GET_EL(v) (((v) & GENMASK_ULL(62, 61)) >>
61)
+#define SPE_ADDR_PKT_GET_CH(v) (((v) & BIT_ULL(62)) >> 62)
+#define SPE_ADDR_PKT_GET_PAT(v)(((v) & GENMASK_ULL(59,
56)) >> 56)
#define SPE_ADDR_PKT_EL0 0
#define SPE_ADDR_PKT_EL1 1
--
2.17.1
[PATCH v4 12/21] perf arm-spe: Add new function arm_spe_pkt_desc_counter()
This patch moves out the counter packet parsing code from
arm_spe_pkt_desc() to the new function arm_spe_pkt_desc_counter().
Signed-off-by: Leo Yan
Reviewed-by: Andre Przywara
---
.../arm-spe-decoder/arm-spe-pkt-decoder.c | 64 +++
1 file changed, 37 insertions(+), 27 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 9304dfe72ebd..8f481c6ea054 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -293,6 +293,42 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt
*packet,
}
}
+static int arm_spe_pkt_desc_counter(const struct arm_spe_pkt *packet,
+ char *buf, size_t buf_len)
+{
+ u64 payload = packet->payload;
+ const char *name = arm_spe_pkt_name(packet->type);
+ size_t blen = buf_len;
+ int ret;
+
+ ret = arm_spe_pkt_snprintf(, , "%s %d ", name,
+ (unsigned short)payload);
+ if (ret < 0)
+ return ret;
+
+ switch (packet->index) {
+ case 0:
+ ret = arm_spe_pkt_snprintf(, , "TOT");
+ if (ret < 0)
+ return ret;
+ break;
+ case 1:
+ ret = arm_spe_pkt_snprintf(, , "ISSUE");
+ if (ret < 0)
+ return ret;
+ break;
+ case 2:
+ ret = arm_spe_pkt_snprintf(, , "XLAT");
+ if (ret < 0)
+ return ret;
+ break;
+ default:
+ break;
+ }
+
+ return buf_len - blen;
+}
+
int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf,
size_t buf_len)
{
@@ -435,33 +471,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet,
char *buf,
return arm_spe_pkt_snprintf(, , "%s 0x%lx el%d",
name, (unsigned long)payload, idx +
1);
case ARM_SPE_COUNTER:
- ret = arm_spe_pkt_snprintf(, , "%s %d ", name,
- (unsigned short)payload);
- if (ret < 0)
- return ret;
-
- switch (idx) {
- case 0:
- ret = arm_spe_pkt_snprintf(, , "TOT");
- if (ret < 0)
- return ret;
- break;
- case 1:
- ret = arm_spe_pkt_snprintf(, , "ISSUE");
- if (ret < 0)
- return ret;
- break;
- case 2:
- ret = arm_spe_pkt_snprintf(, , "XLAT");
- if (ret < 0)
- return ret;
- break;
- default:
- break;
- }
-
- return buf_len - blen;
-
+ return arm_spe_pkt_desc_counter(packet, buf, buf_len);
default:
break;
}
--
2.17.1
[PATCH v4 10/21] perf arm_spe: Fixup top byte for data virtual address
To establish a valid address from the address packet payload and finally
the address value can be used for parsing data symbol in DSO, current
code uses 0xff to replace the tag in the top byte of data virtual
address.
So far the code only fixups top byte for the memory layouts with 4KB
pages, it misses to support memory layouts with 64KB pages.
This patch adds the conditions for checking bits [55:48] are 0xf0 or
0xfd, if detects the patterns it will fill 0xff into the top byte of the
address, also adds comment to explain the fixing up.
Signed-off-by: Leo Yan
---
.../util/arm-spe-decoder/arm-spe-decoder.c| 24 ---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
index 776b3e6628bb..e135ac01d94a 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
@@ -24,7 +24,7 @@
static u64 arm_spe_calc_ip(int index, u64 payload)
{
- u64 ns, el;
+ u64 ns, el, val;
/* Instruction virtual address or Branch target address */
if (index == SPE_ADDR_PKT_HDR_INDEX_INS ||
@@ -45,8 +45,26 @@ static u64 arm_spe_calc_ip(int index, u64 payload)
/* Clean tags */
payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload);
- /* Fill highest byte if bits [48..55] is 0xff */
- if (SPE_ADDR_PKT_ADDR_GET_BYTE_6(payload) == 0xffULL)
+ /*
+* Armv8 ARM (ARM DDI 0487F.c), chapter "D10.2.1 Address packet"
+* defines the data virtual address payload format, the top byte
+* (bits [63:56]) is assigned as top-byte tag; so we only can
+* retrieve address value from bits [55:0].
+*
+* According to Documentation/arm64/memory.rst, if detects the
+* specific pattern in bits [55:48] of payload which falls in
+* the kernel space, should fixup the top byte and this allows
+* perf tool to parse DSO symbol for data address correctly.
+*
+* For this reason, if detects the bits [55:48] is one of
+* following values, will fill 0xff into the top byte:
+*
+* - 0xff (for most kernel memory regions);
+* - 0xf0 (for kernel logical memory map with 64KB pages);
+* - 0xfd (for kasan shadow region with 64KB pages).
+*/
+ val = SPE_ADDR_PKT_ADDR_GET_BYTE_6(payload);
+ if (val == 0xffULL || val == 0xf0ULL || val == 0xfdULL)
payload |= 0xffULL << SPE_ADDR_PKT_ADDR_BYTE7_SHIFT;
/* Data access physical address */
--
2.17.1
[PATCH v4 11/21] perf arm-spe: Refactor context packet handling
Minor refactoring to use macro for index mask.
Signed-off-by: Leo Yan
Reviewed-by: Andre Przywara
---
tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 2 +-
tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 1218a731638f..9304dfe72ebd 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -136,7 +136,7 @@ static int arm_spe_get_context(const unsigned char *buf,
size_t len,
struct arm_spe_pkt *packet)
{
packet->type = ARM_SPE_CONTEXT;
- packet->index = buf[0] & 0x3;
+ packet->index = SPE_CTX_PKT_HDR_INDEX(buf[0]);
return arm_spe_get_payload(buf, len, 0, packet);
}
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index f97d6840be3a..9bc876bffd35 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
@@ -79,6 +79,9 @@ struct arm_spe_pkt {
#define SPE_ADDR_PKT_EL2 2
#define SPE_ADDR_PKT_EL3 3
+/* Context packet header */
+#define SPE_CTX_PKT_HDR_INDEX(h) ((h) & GENMASK_ULL(1, 0))
+
const char *arm_spe_pkt_name(enum arm_spe_pkt_type);
int arm_spe_get_packet(const unsigned char *buf, size_t len,
--
2.17.1
[PATCH v4 15/21] perf arm-spe: Refactor event type handling
Move the enums of event types to arm-spe-pkt-decoder.h, thus function
arm_spe_pkt_desc() can them for bitmasks.
Suggested-by: Andre Przywara
Signed-off-by: Leo Yan
Reviewed-by: Andre Przywara
---
.../util/arm-spe-decoder/arm-spe-decoder.h| 17 --
.../arm-spe-decoder/arm-spe-pkt-decoder.c | 22 +--
.../arm-spe-decoder/arm-spe-pkt-decoder.h | 18 +++
3 files changed, 29 insertions(+), 28 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
index a5111a8d4360..24727b8ca7ff 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
@@ -13,23 +13,6 @@
#include "arm-spe-pkt-decoder.h"
-enum arm_spe_events {
- EV_EXCEPTION_GEN= 0,
- EV_RETIRED = 1,
- EV_L1D_ACCESS = 2,
- EV_L1D_REFILL = 3,
- EV_TLB_ACCESS = 4,
- EV_TLB_WALK = 5,
- EV_NOT_TAKEN= 6,
- EV_MISPRED = 7,
- EV_LLC_ACCESS = 8,
- EV_LLC_MISS = 9,
- EV_REMOTE_ACCESS= 10,
- EV_ALIGNMENT= 11,
- EV_PARTIAL_PREDICATE= 17,
- EV_EMPTY_PREDICATE = 18,
-};
-
enum arm_spe_sample_type {
ARM_SPE_L1D_ACCESS = 1 << 0,
ARM_SPE_L1D_MISS= 1 << 1,
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 0522d28d731a..8e4c4c90eeb0 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -277,58 +277,58 @@ static int arm_spe_pkt_desc_event(const struct
arm_spe_pkt *packet,
if (ret < 0)
return ret;
- if (payload & 0x1) {
+ if (payload & BIT(EV_EXCEPTION_GEN)) {
ret = arm_spe_pkt_snprintf(, , " EXCEPTION-GEN");
if (ret < 0)
return ret;
}
- if (payload & 0x2) {
+ if (payload & BIT(EV_RETIRED)) {
ret = arm_spe_pkt_snprintf(, , " RETIRED");
if (ret < 0)
return ret;
}
- if (payload & 0x4) {
+ if (payload & BIT(EV_L1D_ACCESS)) {
ret = arm_spe_pkt_snprintf(, , " L1D-ACCESS");
if (ret < 0)
return ret;
}
- if (payload & 0x8) {
+ if (payload & BIT(EV_L1D_REFILL)) {
ret = arm_spe_pkt_snprintf(, , " L1D-REFILL");
if (ret < 0)
return ret;
}
- if (payload & 0x10) {
+ if (payload & BIT(EV_TLB_ACCESS)) {
ret = arm_spe_pkt_snprintf(, , " TLB-ACCESS");
if (ret < 0)
return ret;
}
- if (payload & 0x20) {
+ if (payload & BIT(EV_TLB_WALK)) {
ret = arm_spe_pkt_snprintf(, , " TLB-REFILL");
if (ret < 0)
return ret;
}
- if (payload & 0x40) {
+ if (payload & BIT(EV_NOT_TAKEN)) {
ret = arm_spe_pkt_snprintf(, , " NOT-TAKEN");
if (ret < 0)
return ret;
}
- if (payload & 0x80) {
+ if (payload & BIT(EV_MISPRED)) {
ret = arm_spe_pkt_snprintf(, , " MISPRED");
if (ret < 0)
return ret;
}
if (packet->index > 1) {
- if (payload & 0x100) {
+ if (payload & BIT(EV_LLC_ACCESS)) {
ret = arm_spe_pkt_snprintf(, , " LLC-ACCESS");
if (ret < 0)
return ret;
}
- if (payload & 0x200) {
+ if (payload & BIT(EV_LLC_MISS)) {
ret = arm_spe_pkt_snprintf(, , " LLC-REFILL");
if (ret < 0)
return ret;
}
- if (payload & 0x400) {
+ if (payload & BIT(EV_REMOTE_ACCESS)) {
ret = arm_spe_pkt_snprintf(, , "
REMOTE-ACCESS");
if (ret < 0)
return ret;
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index 7d8e34e35f05..42ed4e61ede2 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
@@ -87,6 +87,24 @@ struct arm_spe_pkt {
#define SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT0x1
#define SPE_CNT_PKT_HDR_INDEX_TRANS_LAT0x2
+/* Event packet payload */
+enum arm_spe_events {
+ EV_EXCEPTION_GEN= 0,
+ EV_RETIRED = 1,
+ EV_L1D_ACCESS = 2,
+ EV_L1D_REFILL
[PATCH v4 17/21] perf arm-spe: Add new function arm_spe_pkt_desc_op_type()
The operation type packet is complex and contains subclass; the parsing
flow causes deep indentation; for more readable, this patch introduces
a new function arm_spe_pkt_desc_op_type() which is used for operation
type parsing.
Signed-off-by: Leo Yan
Reviewed-by: Andre Przywara
---
.../arm-spe-decoder/arm-spe-pkt-decoder.c | 122 ++
1 file changed, 66 insertions(+), 56 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 74f5fcebdc56..7c6a0caed976 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -336,6 +336,70 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt
*packet,
return buf_len - blen;
}
+static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet,
+ char *buf, size_t buf_len)
+{
+ int ret, idx = packet->index;
+ unsigned long long payload = packet->payload;
+ size_t blen = buf_len;
+
+ switch (idx) {
+ case 0:
+ return arm_spe_pkt_snprintf(, ,
+ payload & 0x1 ? "COND-SELECT" : "INSN-OTHER");
+ case 1:
+ ret = arm_spe_pkt_snprintf(, ,
+ payload & 0x1 ? "ST" : "LD");
+ if (ret < 0)
+ return ret;
+
+ if (payload & 0x2) {
+ if (payload & 0x4) {
+ ret = arm_spe_pkt_snprintf(, , " AT");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & 0x8) {
+ ret = arm_spe_pkt_snprintf(, , "
EXCL");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & 0x10) {
+ ret = arm_spe_pkt_snprintf(, , " AR");
+ if (ret < 0)
+ return ret;
+ }
+ } else if (payload & 0x4) {
+ ret = arm_spe_pkt_snprintf(, , " SIMD-FP");
+ if (ret < 0)
+ return ret;
+ }
+
+ return buf_len - blen;
+
+ case 2:
+ ret = arm_spe_pkt_snprintf(, , "B");
+ if (ret < 0)
+ return ret;
+
+ if (payload & 0x1) {
+ ret = arm_spe_pkt_snprintf(, , " COND");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & 0x2) {
+ ret = arm_spe_pkt_snprintf(, , " IND");
+ if (ret < 0)
+ return ret;
+ }
+
+ return buf_len - blen;
+
+ default:
+ return 0;
+ }
+}
+
static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet,
char *buf, size_t buf_len)
{
@@ -403,7 +467,7 @@ static int arm_spe_pkt_desc_counter(const struct
arm_spe_pkt *packet,
int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf,
size_t buf_len)
{
- int ret, idx = packet->index;
+ int idx = packet->index;
unsigned long long payload = packet->payload;
const char *name = arm_spe_pkt_name(packet->type);
size_t blen = buf_len;
@@ -416,61 +480,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet,
char *buf,
case ARM_SPE_EVENTS:
return arm_spe_pkt_desc_event(packet, buf, buf_len);
case ARM_SPE_OP_TYPE:
- switch (idx) {
- case 0:
- return arm_spe_pkt_snprintf(, ,
- payload & 0x1 ? "COND-SELECT" :
"INSN-OTHER");
- case 1:
- ret = arm_spe_pkt_snprintf(, ,
- payload & 0x1 ? "ST" : "LD");
- if (ret < 0)
- return ret;
-
- if (payload & 0x2) {
- if (payload & 0x4) {
- ret = arm_spe_pkt_snprintf(, ,
" AT");
- if (ret < 0)
- return ret;
- }
- if (payload & 0x8) {
- ret = arm_spe_pkt_snprintf(, ,
" EXCL");
- if (ret < 0)
- return ret;
- }
- if (payload & 0x10) {
-
[PATCH v4 16/21] perf arm-spe: Remove size condition checking for events
In the Armv8 ARM (ARM DDI 0487F.c), chapter "D10.2.6 Events packet", it
describes the event bit is valid with specific payload requirement. For
example, the Last Level cache access event, the bit is defined as:
E[8], byte 1 bit [0], when SZ == 0b01 , when SZ == 0b10 ,
or when SZ == 0b11
It requires the payload size is at least 2 bytes, when byte 1 (start
counting from 0) is valid, E[8] (bit 0 in byte 1) can be used for LLC
access event type. For safety, the code checks the condition for
payload size firstly, if meet the requirement for payload size, then
continue to parse event type.
If review function arm_spe_get_payload(), it has used cast, so any bytes
beyond the valid size have been set to zeros.
For this reason, we don't need to check payload size anymore afterwards
when parse events, thus this patch removes payload size conditions.
Suggested-by: Andre Przywara
Signed-off-by: Leo Yan
Reviewed-by: Andre Przywara
---
.../util/arm-spe-decoder/arm-spe-decoder.c| 9 ++
.../arm-spe-decoder/arm-spe-pkt-decoder.c | 30 +--
2 files changed, 17 insertions(+), 22 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
index e135ac01d94a..db93e8130916 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
@@ -196,16 +196,13 @@ static int arm_spe_read_record(struct arm_spe_decoder
*decoder)
if (payload & BIT(EV_TLB_ACCESS))
decoder->record.type |= ARM_SPE_TLB_ACCESS;
- if ((idx == 2 || idx == 4 || idx == 8) &&
- (payload & BIT(EV_LLC_MISS)))
+ if (payload & BIT(EV_LLC_MISS))
decoder->record.type |= ARM_SPE_LLC_MISS;
- if ((idx == 2 || idx == 4 || idx == 8) &&
- (payload & BIT(EV_LLC_ACCESS)))
+ if (payload & BIT(EV_LLC_ACCESS))
decoder->record.type |= ARM_SPE_LLC_ACCESS;
- if ((idx == 2 || idx == 4 || idx == 8) &&
- (payload & BIT(EV_REMOTE_ACCESS)))
+ if (payload & BIT(EV_REMOTE_ACCESS))
decoder->record.type |= ARM_SPE_REMOTE_ACCESS;
if (payload & BIT(EV_MISPRED))
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 8e4c4c90eeb0..74f5fcebdc56 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -317,22 +317,20 @@ static int arm_spe_pkt_desc_event(const struct
arm_spe_pkt *packet,
if (ret < 0)
return ret;
}
- if (packet->index > 1) {
- if (payload & BIT(EV_LLC_ACCESS)) {
- ret = arm_spe_pkt_snprintf(, , " LLC-ACCESS");
- if (ret < 0)
- return ret;
- }
- if (payload & BIT(EV_LLC_MISS)) {
- ret = arm_spe_pkt_snprintf(, , " LLC-REFILL");
- if (ret < 0)
- return ret;
- }
- if (payload & BIT(EV_REMOTE_ACCESS)) {
- ret = arm_spe_pkt_snprintf(, , "
REMOTE-ACCESS");
- if (ret < 0)
- return ret;
- }
+ if (payload & BIT(EV_LLC_ACCESS)) {
+ ret = arm_spe_pkt_snprintf(, , " LLC-ACCESS");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & BIT(EV_LLC_MISS)) {
+ ret = arm_spe_pkt_snprintf(, , " LLC-REFILL");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & BIT(EV_REMOTE_ACCESS)) {
+ ret = arm_spe_pkt_snprintf(, , " REMOTE-ACCESS");
+ if (ret < 0)
+ return ret;
}
return buf_len - blen;
--
2.17.1
[PATCH v4 14/21] perf arm-spe: Add new function arm_spe_pkt_desc_event()
This patch moves out the event packet parsing from arm_spe_pkt_desc()
to the new function arm_spe_pkt_desc_event().
Signed-off-by: Leo Yan
Reviewed-by: Andre Przywara
---
.../arm-spe-decoder/arm-spe-pkt-decoder.c | 136 ++
1 file changed, 73 insertions(+), 63 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 4be649c26002..0522d28d731a 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -266,6 +266,78 @@ static int arm_spe_pkt_snprintf(char **buf_p, size_t *blen,
return ret;
}
+static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet,
+ char *buf, size_t buf_len)
+{
+ u64 payload = packet->payload;
+ size_t blen = buf_len;
+ int ret;
+
+ ret = arm_spe_pkt_snprintf(, , "EV");
+ if (ret < 0)
+ return ret;
+
+ if (payload & 0x1) {
+ ret = arm_spe_pkt_snprintf(, , " EXCEPTION-GEN");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & 0x2) {
+ ret = arm_spe_pkt_snprintf(, , " RETIRED");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & 0x4) {
+ ret = arm_spe_pkt_snprintf(, , " L1D-ACCESS");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & 0x8) {
+ ret = arm_spe_pkt_snprintf(, , " L1D-REFILL");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & 0x10) {
+ ret = arm_spe_pkt_snprintf(, , " TLB-ACCESS");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & 0x20) {
+ ret = arm_spe_pkt_snprintf(, , " TLB-REFILL");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & 0x40) {
+ ret = arm_spe_pkt_snprintf(, , " NOT-TAKEN");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & 0x80) {
+ ret = arm_spe_pkt_snprintf(, , " MISPRED");
+ if (ret < 0)
+ return ret;
+ }
+ if (packet->index > 1) {
+ if (payload & 0x100) {
+ ret = arm_spe_pkt_snprintf(, , " LLC-ACCESS");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & 0x200) {
+ ret = arm_spe_pkt_snprintf(, , " LLC-REFILL");
+ if (ret < 0)
+ return ret;
+ }
+ if (payload & 0x400) {
+ ret = arm_spe_pkt_snprintf(, , "
REMOTE-ACCESS");
+ if (ret < 0)
+ return ret;
+ }
+ }
+
+ return buf_len - blen;
+}
+
static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet,
char *buf, size_t buf_len)
{
@@ -344,69 +416,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet,
char *buf,
case ARM_SPE_END:
return arm_spe_pkt_snprintf(, , "%s", name);
case ARM_SPE_EVENTS:
- ret = arm_spe_pkt_snprintf(, , "EV");
- if (ret < 0)
- return ret;
-
- if (payload & 0x1) {
- ret = arm_spe_pkt_snprintf(, , "
EXCEPTION-GEN");
- if (ret < 0)
- return ret;
- }
- if (payload & 0x2) {
- ret = arm_spe_pkt_snprintf(, , " RETIRED");
- if (ret < 0)
- return ret;
- }
- if (payload & 0x4) {
- ret = arm_spe_pkt_snprintf(, , " L1D-ACCESS");
- if (ret < 0)
- return ret;
- }
- if (payload & 0x8) {
- ret = arm_spe_pkt_snprintf(, , " L1D-REFILL");
- if (ret < 0)
- return ret;
- }
- if (payload & 0x10) {
- ret = arm_spe_pkt_snprintf(, , " TLB-ACCESS");
- if (ret < 0)
- return ret;
- }
- if (payload & 0x20) {
- ret = arm_spe_pkt_snprintf(, , " TLB-REFILL");
- if (ret < 0)
- return ret;
- }
- if (payload & 0x40) {
- ret = arm_spe_pkt_snprintf(, , " NOT-TAKEN");
- if (ret < 0)
- return ret;
- }
- if (payload & 0x80)
[PATCH v4 00/21] perf arm-spe: Refactor decoding & dumping flow
This is patch set v4 for refactoring Arm SPE trace decoding and dumping.
It follows Andre's suggestions for minor improvement comparing to patch
set v3.
This patch set is to refactor the Arm SPE decoding with:
- Patches 01, 02 are minor cleans up for header, typos;
- Patches 03, 04 and 05 are used to fix and polish the packet and
payload length calculation;
- Patch 06 is to add a helper to wrap up printing strings, this can
avoid bunch of duplicate code lines;
- Patches 07 ~ 19 are used to refactor decoding for different types
packet one by one; in this patch set it introduces a new patch
"perf arm_spe: Fixup top byte for data virtual address" to fixup
the data virtual address for 64KB pages;
- Patch 20 comes from Andre to dump memory tagging;
- Patch 21 comes from Wei Li to add decoding for ARMv8.3 SVE extension.
This patch set is cleanly applied on the top of perf/core branch
with commit 7cf726a59435 ("Merge tag 'linux-kselftest-kunit-5.10-rc1' of
git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest"),
And I tested this patch set on Hisilicon D06 platform with commands
"perf script" and "perf script -D".
Changes from v3:
- Refined arm_spe_payload_len() and removed macro SPE_HEADER_SZ()
(Andre);
- Refined packet header index macros (Andre);
- Added patch "perf arm_spe: Fixup top byte for data virtual address" to
fixup the data virtual address for 64KB pages and refined comments for
the fixup (Andre);
- Added Andre's review tag (using "b4 am" command);
- Changed the macros to SPE_PKT_IS_XXX() format to check operation types
(Andre);
Changes from v2:
- Tried best to address Andre's comments and refined patches;
- Added new patches 08, 11, 13, 16 for introducing new functions for
packets parsing (Andre);
- Removed size condition checking for event packet (Andre);
- Used PKT_XXX_GET() form to replace PKT_XXX_MASK()/PKT_XXX_SHIFT()
(Andre).
Changes from v1:
- Heavily rewrote the patch 05 for refactoring printing strings; this
is fundamental change, so adjusted the sequence for patches and moved
the printing string patch ahead from patch 10 (v1) to patch 05;
- Changed to use GENMASK_ULL() for bits mask;
- Added Andre's patch 13 for dumping memory tagging;
- Refined patch 12 for adding sub classes for Operation packet, merged
some commit log from Andre's patch, which allows commit log and code
to be more clear; Added "Co-developed-by: Andre Przywara" tag to
reflect this.
Andre Przywara (1):
perf arm_spe: Decode memory tagging properties
Leo Yan (19):
perf arm-spe: Include bitops.h for BIT() macro
perf arm-spe: Fix a typo in comment
perf arm-spe: Refactor payload size calculation
perf arm-spe: Refactor arm_spe_get_events()
perf arm-spe: Fix packet length handling
perf arm-spe: Refactor printing string to buffer
perf arm-spe: Refactor packet header parsing
perf arm-spe: Add new function arm_spe_pkt_desc_addr()
perf arm-spe: Refactor address packet handling
perf arm_spe: Fixup top byte for data virtual address
perf arm-spe: Refactor context packet handling
perf arm-spe: Add new function arm_spe_pkt_desc_counter()
perf arm-spe: Refactor counter packet handling
perf arm-spe: Add new function arm_spe_pkt_desc_event()
perf arm-spe: Refactor event type handling
perf arm-spe: Remove size condition checking for events
perf arm-spe: Add new function arm_spe_pkt_desc_op_type()
perf arm-spe: Refactor operation packet handling
perf arm-spe: Add more sub classes for operation packet
Wei Li (1):
perf arm-spe: Add support for ARMv8.3-SPE
.../util/arm-spe-decoder/arm-spe-decoder.c| 63 +-
.../util/arm-spe-decoder/arm-spe-decoder.h| 17 -
.../arm-spe-decoder/arm-spe-pkt-decoder.c | 654 +++---
.../arm-spe-decoder/arm-spe-pkt-decoder.h | 122 +++-
4 files changed, 541 insertions(+), 315 deletions(-)
--
2.17.1
[PATCH v4 06/21] perf arm-spe: Refactor printing string to buffer
When outputs strings to the decoding buffer with function snprintf(),
SPE decoder needs to detects if any error returns from snprintf() and if
so needs to directly bail out. If snprintf() returns success, it needs
to update buffer pointer and reduce the buffer length so can continue to
output the next string into the consequent memory space.
This complex logics are spreading in the function arm_spe_pkt_desc() so
there has many duplicate codes for handling error detecting, increment
buffer pointer and decrement buffer size.
To avoid the duplicate code, this patch introduces a new helper function
arm_spe_pkt_snprintf() which is used to wrap up the complex logics, and
the caller arm_spe_pkt_desc() will call it and simply check the returns
value.
This patch also moves the variable 'blen' as the function's local
variable, this allows to remove the unnecessary braces and improve the
readability.
Suggested-by: Dave Martin
Signed-off-by: Leo Yan
Reviewed-by: Andre Przywara
---
.../arm-spe-decoder/arm-spe-pkt-decoder.c | 247 ++
1 file changed, 135 insertions(+), 112 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 04fd7fd7c15f..b400636e6da2 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include "arm-spe-pkt-decoder.h"
@@ -258,192 +259,214 @@ int arm_spe_get_packet(const unsigned char *buf, size_t
len,
return ret;
}
+static int arm_spe_pkt_snprintf(char **buf_p, size_t *blen,
+ const char *fmt, ...)
+{
+ va_list ap;
+ int ret;
+
+ va_start(ap, fmt);
+ ret = vsnprintf(*buf_p, *blen, fmt, ap);
+ va_end(ap);
+
+ if (ret < 0)
+ return ret;
+
+ *buf_p += ret;
+ *blen -= ret;
+ return ret;
+}
+
int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf,
size_t buf_len)
{
int ret, ns, el, idx = packet->index;
unsigned long long payload = packet->payload;
const char *name = arm_spe_pkt_name(packet->type);
+ size_t blen = buf_len;
switch (packet->type) {
case ARM_SPE_BAD:
case ARM_SPE_PAD:
case ARM_SPE_END:
- return snprintf(buf, buf_len, "%s", name);
- case ARM_SPE_EVENTS: {
- size_t blen = buf_len;
-
- ret = 0;
- ret = snprintf(buf, buf_len, "EV");
- buf += ret;
- blen -= ret;
+ return arm_spe_pkt_snprintf(, , "%s", name);
+ case ARM_SPE_EVENTS:
+ ret = arm_spe_pkt_snprintf(, , "EV");
+ if (ret < 0)
+ return ret;
+
if (payload & 0x1) {
- ret = snprintf(buf, buf_len, " EXCEPTION-GEN");
- buf += ret;
- blen -= ret;
+ ret = arm_spe_pkt_snprintf(, , "
EXCEPTION-GEN");
+ if (ret < 0)
+ return ret;
}
if (payload & 0x2) {
- ret = snprintf(buf, buf_len, " RETIRED");
- buf += ret;
- blen -= ret;
+ ret = arm_spe_pkt_snprintf(, , " RETIRED");
+ if (ret < 0)
+ return ret;
}
if (payload & 0x4) {
- ret = snprintf(buf, buf_len, " L1D-ACCESS");
- buf += ret;
- blen -= ret;
+ ret = arm_spe_pkt_snprintf(, , " L1D-ACCESS");
+ if (ret < 0)
+ return ret;
}
if (payload & 0x8) {
- ret = snprintf(buf, buf_len, " L1D-REFILL");
- buf += ret;
- blen -= ret;
+ ret = arm_spe_pkt_snprintf(, , " L1D-REFILL");
+ if (ret < 0)
+ return ret;
}
if (payload & 0x10) {
- ret = snprintf(buf, buf_len, " TLB-ACCESS");
- buf += ret;
- blen -= ret;
+ ret = arm_spe_pkt_snprintf(, , " TLB-ACCESS");
+ if (ret < 0)
+ return ret;
}
if (payload & 0x20) {
- ret = snprintf(buf, buf_len, " TLB-REFILL");
- buf += ret;
- blen -= ret;
+ ret = arm_spe_pkt_snprintf(, , " TLB-REFILL");
+ if (ret < 0)
+ return ret;
}
if (payload &
[PATCH v4 03/21] perf arm-spe: Refactor payload size calculation
This patch defines macro to extract "sz" field from header, and renames
the function payloadlen() to arm_spe_payload_len().
Signed-off-by: Leo Yan
---
.../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 7c7b5eb09fba..06b3eec4494e 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -69,22 +69,22 @@ const char *arm_spe_pkt_name(enum arm_spe_pkt_type type)
return arm_spe_packet_name[type];
}
-/* return ARM SPE payload size from its encoding,
- * which is in bits 5:4 of the byte.
- * 00 : byte
- * 01 : halfword (2)
- * 10 : word (4)
- * 11 : doubleword (8)
+/*
+ * Extracts the field "sz" from header bits and converts to bytes:
+ * 00 : byte (1)
+ * 01 : halfword (2)
+ * 10 : word (4)
+ * 11 : doubleword (8)
*/
-static int payloadlen(unsigned char byte)
+static unsigned int arm_spe_payload_len(unsigned char hdr)
{
- return 1 << ((byte & 0x30) >> 4);
+ return 1U << ((hdr & GENMASK_ULL(5, 4)) >> 4);
}
static int arm_spe_get_payload(const unsigned char *buf, size_t len,
struct arm_spe_pkt *packet)
{
- size_t payload_len = payloadlen(buf[0]);
+ size_t payload_len = arm_spe_payload_len(buf[0]);
if (len < 1 + payload_len)
return ARM_SPE_NEED_MORE_BYTES;
--
2.17.1
Re: [PATCH] scsi: ufs: Make sure clk scaling happens only when hba is runtime ACTIVE
Hi Can,
On Tue, 2020-10-20 at 10:35 +0800, Can Guo wrote:
> Hi Stanley,
>
> On 2020-09-22 15:09, Can Guo wrote:
> > If someone plays with the UFS clk scaling devfreq governor through
> > sysfs,
> > ufshcd_devfreq_scale may be called even when hba is not runtime ACTIVE,
> > which can lead to unexpected error. We cannot just protect it by
> > calling
> > pm_runtime_get_sync, because that may cause racing problem since hba
> > runtime suspend ops needs to suspend clk scaling. In order to fix it,
> > call
> > pm_runtime_get_noresume and check hba's runtime status, then only
> > proceed
> > if hba is runtime ACTIVE, otherwise just bail.
> >
> > governor_store
> > devfreq_performance_handler
> > update_devfreq
> >devfreq_set_target
> > ufshcd_devfreq_target
> > ufshcd_devfreq_scale
> >
> > Signed-off-by: Can Guo
> >
> > diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
> > index e4cb994..847f355 100644
> > --- a/drivers/scsi/ufs/ufshcd.c
> > +++ b/drivers/scsi/ufs/ufshcd.c
> > @@ -1294,8 +1294,15 @@ static int ufshcd_devfreq_target(struct device
> > *dev,
> > }
> > spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
> >
> > + pm_runtime_get_noresume(hba->dev);
> > + if (!pm_runtime_active(hba->dev)) {
> > + pm_runtime_put_noidle(hba->dev);
> > + ret = -EAGAIN;
> > + goto out;
> > + }
> > start = ktime_get();
> > ret = ufshcd_devfreq_scale(hba, scale_up);
> > + pm_runtime_put(hba->dev);
> >
> > trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
> > (scale_up ? "up" : "down"),
>
> Could you please review this one since we may be the only two
> users of clk scaling?
>
Looks good to me.
Reviewed-by: Stanley Chu
[PATCH v4 07/21] perf arm-spe: Refactor packet header parsing
The packet header parsing uses the hard coded values and it uses nested
if-else statements.
To improve the readability, this patch refactors the macros for packet
header format so it removes the hard coded values. Furthermore, based
on the new mask macros it reduces the nested if-else statements and
changes to use the flat conditions checking, this is directive and can
easily map to the descriptions in ARMv8-a architecture reference manual
(ARM DDI 0487E.a), chapter 'D10.1.5 Statistical Profiling Extension
protocol packet headers'.
Signed-off-by: Leo Yan
Reviewed-by: Andre Przywara
---
.../arm-spe-decoder/arm-spe-pkt-decoder.c | 92 +--
.../arm-spe-decoder/arm-spe-pkt-decoder.h | 20
2 files changed, 61 insertions(+), 51 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index b400636e6da2..40007c3a28bc 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -16,28 +16,6 @@
#define NS_FLAGBIT(63)
#define EL_FLAG(BIT(62) | BIT(61))
-#define SPE_HEADER0_PAD0x0
-#define SPE_HEADER0_END0x1
-#define SPE_HEADER0_ADDRESS0x30 /* address packet (short) */
-#define SPE_HEADER0_ADDRESS_MASK 0x38
-#define SPE_HEADER0_COUNTER0x18 /* counter packet (short) */
-#define SPE_HEADER0_COUNTER_MASK 0x38
-#define SPE_HEADER0_TIMESTAMP 0x71
-#define SPE_HEADER0_TIMESTAMP 0x71
-#define SPE_HEADER0_EVENTS 0x2
-#define SPE_HEADER0_EVENTS_MASK0xf
-#define SPE_HEADER0_SOURCE 0x3
-#define SPE_HEADER0_SOURCE_MASK0xf
-#define SPE_HEADER0_CONTEXT0x24
-#define SPE_HEADER0_CONTEXT_MASK 0x3c
-#define SPE_HEADER0_OP_TYPE0x8
-#define SPE_HEADER0_OP_TYPE_MASK 0x3c
-#define SPE_HEADER1_ALIGNMENT 0x0
-#define SPE_HEADER1_ADDRESS0xb0 /* address packet (extended) */
-#define SPE_HEADER1_ADDRESS_MASK 0xf8
-#define SPE_HEADER1_COUNTER0x98 /* counter packet (extended) */
-#define SPE_HEADER1_COUNTER_MASK 0xf8
-
#if __BYTE_ORDER == __BIG_ENDIAN
#define le16_to_cpu bswap_16
#define le32_to_cpu bswap_32
@@ -200,46 +178,58 @@ static int arm_spe_get_addr(const unsigned char *buf,
size_t len,
static int arm_spe_do_get_packet(const unsigned char *buf, size_t len,
struct arm_spe_pkt *packet)
{
- unsigned int byte;
+ unsigned int hdr;
+ unsigned char ext_hdr = 0;
memset(packet, 0, sizeof(struct arm_spe_pkt));
if (!len)
return ARM_SPE_NEED_MORE_BYTES;
- byte = buf[0];
- if (byte == SPE_HEADER0_PAD)
+ hdr = buf[0];
+
+ if (hdr == SPE_HEADER0_PAD)
return arm_spe_get_pad(packet);
- else if (byte == SPE_HEADER0_END) /* no timestamp at end of record */
+
+ if (hdr == SPE_HEADER0_END) /* no timestamp at end of record */
return arm_spe_get_end(packet);
- else if (byte & 0xc0 /* 0y11xx */) {
- if (byte & 0x80) {
- if ((byte & SPE_HEADER0_ADDRESS_MASK) ==
SPE_HEADER0_ADDRESS)
- return arm_spe_get_addr(buf, len, 0, packet);
- if ((byte & SPE_HEADER0_COUNTER_MASK) ==
SPE_HEADER0_COUNTER)
- return arm_spe_get_counter(buf, len, 0, packet);
- } else
- if (byte == SPE_HEADER0_TIMESTAMP)
- return arm_spe_get_timestamp(buf, len, packet);
- else if ((byte & SPE_HEADER0_EVENTS_MASK) ==
SPE_HEADER0_EVENTS)
- return arm_spe_get_events(buf, len, packet);
- else if ((byte & SPE_HEADER0_SOURCE_MASK) ==
SPE_HEADER0_SOURCE)
- return arm_spe_get_data_source(buf, len,
packet);
- else if ((byte & SPE_HEADER0_CONTEXT_MASK) ==
SPE_HEADER0_CONTEXT)
- return arm_spe_get_context(buf, len, packet);
- else if ((byte & SPE_HEADER0_OP_TYPE_MASK) ==
SPE_HEADER0_OP_TYPE)
- return arm_spe_get_op_type(buf, len, packet);
- } else if ((byte & 0xe0) == 0x20 /* 0y001x */) {
- /* 16-bit header */
- byte = buf[1];
- if (byte == SPE_HEADER1_ALIGNMENT)
+
+ if (hdr == SPE_HEADER0_TIMESTAMP)
+ return arm_spe_get_timestamp(buf, len, packet);
+
+ if ((hdr & SPE_HEADER0_MASK1) == SPE_HEADER0_EVENTS)
+ return arm_spe_get_events(buf, len, packet);
+
+ if ((hdr & SPE_HEADER0_MASK1) == SPE_HEADER0_SOURCE)
+ return arm_spe_get_data_source(buf, len, packet);
+
+ if ((hdr &
[PATCH v4 02/21] perf arm-spe: Fix a typo in comment
Fix a typo: s/iff/if. Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 46ddb53a6457..7c7b5eb09fba 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -142,7 +142,7 @@ static int arm_spe_get_events(const unsigned char *buf, size_t len, /* we use index to identify Events with a less number of * comparisons in arm_spe_pkt_desc(): E.g., the LLC-ACCESS, -* LLC-REFILL, and REMOTE-ACCESS events are identified iff +* LLC-REFILL, and REMOTE-ACCESS events are identified if * index > 1. */ packet->index = ret - 1; -- 2.17.1
[PATCH v4 08/21] perf arm-spe: Add new function arm_spe_pkt_desc_addr()
This patch moves out the address parsing code from arm_spe_pkt_desc()
and uses the new introduced function arm_spe_pkt_desc_addr() to process
address packet.
Signed-off-by: Leo Yan
Reviewed-by: Andre Przywara
---
.../arm-spe-decoder/arm-spe-pkt-decoder.c | 49 ---
1 file changed, 30 insertions(+), 19 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 40007c3a28bc..e372e85e1c14 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -267,10 +267,38 @@ static int arm_spe_pkt_snprintf(char **buf_p, size_t
*blen,
return ret;
}
+static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet,
+char *buf, size_t buf_len)
+{
+ int ns, el, idx = packet->index;
+ u64 payload = packet->payload;
+
+ switch (idx) {
+ case 0:
+ case 1:
+ ns = !!(packet->payload & NS_FLAG);
+ el = (packet->payload & EL_FLAG) >> 61;
+ payload &= ~(0xffULL << 56);
+ return arm_spe_pkt_snprintf(, _len,
+ "%s 0x%llx el%d ns=%d",
+ (idx == 1) ? "TGT" : "PC", payload, el, ns);
+ case 2:
+ return arm_spe_pkt_snprintf(, _len,
+ "VA 0x%llx", payload);
+ case 3:
+ ns = !!(packet->payload & NS_FLAG);
+ payload &= ~(0xffULL << 56);
+ return arm_spe_pkt_snprintf(, _len,
+ "PA 0x%llx ns=%d", payload, ns);
+ default:
+ return 0;
+ }
+}
+
int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf,
size_t buf_len)
{
- int ret, ns, el, idx = packet->index;
+ int ret, idx = packet->index;
unsigned long long payload = packet->payload;
const char *name = arm_spe_pkt_name(packet->type);
size_t blen = buf_len;
@@ -404,24 +432,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet,
char *buf,
case ARM_SPE_TIMESTAMP:
return arm_spe_pkt_snprintf(, , "%s %lld", name,
payload);
case ARM_SPE_ADDRESS:
- switch (idx) {
- case 0:
- case 1: ns = !!(packet->payload & NS_FLAG);
- el = (packet->payload & EL_FLAG) >> 61;
- payload &= ~(0xffULL << 56);
- return arm_spe_pkt_snprintf(, ,
- "%s 0x%llx el%d ns=%d",
- (idx == 1) ? "TGT" : "PC", payload, el,
ns);
- case 2:
- return arm_spe_pkt_snprintf(, ,
- "VA 0x%llx", payload);
- case 3: ns = !!(packet->payload & NS_FLAG);
- payload &= ~(0xffULL << 56);
- return arm_spe_pkt_snprintf(, ,
- "PA 0x%llx ns=%d", payload,
ns);
- default:
- return 0;
- }
+ return arm_spe_pkt_desc_addr(packet, buf, buf_len);
case ARM_SPE_CONTEXT:
return arm_spe_pkt_snprintf(, , "%s 0x%lx el%d",
name, (unsigned long)payload, idx +
1);
--
2.17.1
[PATCH v4 01/21] perf arm-spe: Include bitops.h for BIT() macro
Include header linux/bitops.h, directly use its BIT() macro and remove
the self defined macros.
Signed-off-by: Leo Yan
Reviewed-by: Andre Przywara
---
tools/perf/util/arm-spe-decoder/arm-spe-decoder.c | 5 +
tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 3 +--
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
index 93e063f22be5..cc18a1e8c212 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
@@ -21,10 +22,6 @@
#include "arm-spe-decoder.h"
-#ifndef BIT
-#define BIT(n) (1UL << (n))
-#endif
-
static u64 arm_spe_calc_ip(int index, u64 payload)
{
u8 *addr = (u8 *)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index b94001b756c7..46ddb53a6457 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -8,11 +8,10 @@
#include
#include
#include
+#include
#include "arm-spe-pkt-decoder.h"
-#define BIT(n) (1ULL << (n))
-
#define NS_FLAGBIT(63)
#define EL_FLAG(BIT(62) | BIT(61))
--
2.17.1
[PATCH v4 04/21] perf arm-spe: Refactor arm_spe_get_events()
In function arm_spe_get_events(), the event packet's 'index' is assigned
as payload length, but the flow is not directive: it firstly gets the
packet length from the return value of arm_spe_get_payload(), the value
includes header length (1) and payload length:
int ret = arm_spe_get_payload(buf, len, packet);
and then reduces header length from packet length, so finally get the
payload length:
packet->index = ret - 1;
To simplify the code, this patch directly assigns payload length to
event packet's index; and at the end it calls arm_spe_get_payload() to
return the payload value.
Signed-off-by: Leo Yan
Reviewed-by: Andre Przywara
---
tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 06b3eec4494e..f1b4cb008837 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -136,8 +136,6 @@ static int arm_spe_get_timestamp(const unsigned char *buf,
size_t len,
static int arm_spe_get_events(const unsigned char *buf, size_t len,
struct arm_spe_pkt *packet)
{
- int ret = arm_spe_get_payload(buf, len, packet);
-
packet->type = ARM_SPE_EVENTS;
/* we use index to identify Events with a less number of
@@ -145,9 +143,9 @@ static int arm_spe_get_events(const unsigned char *buf,
size_t len,
* LLC-REFILL, and REMOTE-ACCESS events are identified if
* index > 1.
*/
- packet->index = ret - 1;
+ packet->index = arm_spe_payload_len(buf[0]);
- return ret;
+ return arm_spe_get_payload(buf, len, packet);
}
static int arm_spe_get_data_source(const unsigned char *buf, size_t len,
--
2.17.1
