Re: simplify gendisk lookup and remove struct block_device aliases v4
Jens, can you take a look and possibly pick this series up? On Thu, Oct 29, 2020 at 03:58:23PM +0100, Christoph Hellwig wrote: > Hi all, > > this series removes the annoying struct block_device aliases, which can > happen for a bunch of old floppy drivers (and z2ram). In that case > multiple struct block device instances for different dev_t's can point > to the same gendisk, without being partitions. The cause for that > is the probe/get callback registered through blk_register_regions. > > This series removes blk_register_region entirely, splitting it it into > a simple xarray lookup of registered gendisks, and a probe callback > stored in the major_names array that can be used for modprobe overrides > or creating devices on demands when no gendisk is found. The old > remapping is gone entirely, and instead the 4 remaining drivers just > register a gendisk for each operating mode. In case of the two drivers > that have lots of aliases that is done on-demand using the new probe > callback, while for the other two I simply register all at probe time > to keep things simple. > > Note that the m68k drivers are compile tested only. > > Changes since v3: > - keep kobj_map for char dev lookup for now, as the testbot found >some very strange and unexplained regressions, so I'll get back to >this later separately > - fix a commit message typo > > Changes since v2: > - fix a wrong variable passed to ERR_PTR in the floppy driver > - slightly adjust the del_gendisk cleanups to prepare for the next >series touching this area > > Changes since v1: > - add back a missing kobject_put in the cdev code > - improve the xarray delete loops ---end quoted text---
[PATCH] drm/msm/dp: remove duplicate include statement
linux/rational.h is included more than once, Remove the one that isn't necessary. Signed-off-by: Tian Tao --- drivers/gpu/drm/msm/dp/dp_catalog.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c index b15b4ce..105fa65 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.c +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c @@ -5,7 +5,6 @@ #define pr_fmt(fmt)"[drm-dp] %s: " fmt, __func__ -#include #include #include #include -- 2.7.4
Re: [PATCH 1/6] seq_file: add seq_read_iter
On Tue, Nov 10, 2020 at 11:20:28PM +, Al Viro wrote: > On Tue, Nov 10, 2020 at 09:35:11PM +, Al Viro wrote: > > On Tue, Nov 10, 2020 at 09:32:53PM +, Al Viro wrote: > > > > > AFAICS, not all callers want that semantics, but I think it's worth > > > a new primitive. I'm not saying it should be a prereq for your > > > series, but either that or an explicit iov_iter_revert() is needed. > > > > Seeing that it already went into mainline, it needs a followup fix. > > And since it's not -stable fodder (AFAICS), I'd rather go with > > adding a new primitive... > > Any objections to the following? > > Fix seq_read_iter() behaviour on full pipe > > generic_file_splice_read() will purge what we'd left in pipe in case > of error; it will *not* do so in case of short write, so we must make > sure that reported amount of data stored by ->read_iter() matches the > reality. > > It's not a rare situation (and we already have it open-coded in at least > one place), so let's introduce a new primitive - copy_to_iter_full(). > Similar to copy_from_iter_full(), it returns true if we had been able > to copy everything we'd been asked to and false otherwise. Iterator > is advanced only on success. > > Signed-off-by: Al Viro Looks ok to me.
Re: BUG: KASAN: global-out-of-bounds in soc_device_match on arm
Hi Naresh, On 11/11/20 12:08 PM, Stephen Rothwell wrote: > Hi Naresh, > > On Wed, 11 Nov 2020 11:55:46 +0530 Naresh Kamboju > wrote: >> >> The following kernel warning noticed on arm KASAN enabled config while >> booting on >> TI beagleboard x15 device. >> >> [ 32.127451] BUG: KASAN: global-out-of-bounds in soc_device_match+0x64/0xe4 >> [ 32.127485] Read of size 4 at addr c21701f8 by task swapper/0/1 >> [ 32.127508] >> [ 32.127549] CPU: 0 PID: 1 Comm: swapper/0 Tainted: GW >> 5.10.0-rc3-next-20201110 #2 >> [ 32.127577] Hardware name: Generic DRA74X (Flattened Device Tree) >> [ 32.127604] Backtrace: >> [ 32.127670] [] (dump_backtrace) from [] >> (show_stack+0x20/0x24) >> [ 32.127717] r9:0080 r8:c4208000 r7:c3023060 r6:4093 >> r5: r4:c3023060 >> [ 32.127766] [] (show_stack) from [] >> (dump_stack+0xe8/0x10c) >> [ 32.127824] [] (dump_stack) from [] >> (print_address_description.constprop.0+0x3c/0x4b0) >> [ 32.127871] r10:0030 r9:c5da4010 r8:c5da4000 r7: >> r6:c0fd5c20 r5:eebf33c0 >> [ 32.127903] r4:c21701f8 r3:eebf33c4 >> [ 32.127958] [] (print_address_description.constprop.0) >> from [] (kasan_report+0x160/0x17c) >> [ 32.128000] r8:c5da4000 r7: r6:c0fd5c20 r5:0001 r4:c21701f8 >> [ 32.128053] [] (kasan_report) from [] >> (__asan_load4+0x6c/0x9c) >> [ 32.128093] r7:c3c3ede0 r6:c354dea0 r5:c0fd5b88 r4:c21701f8 >> [ 32.128144] [] (__asan_load4) from [] >> (soc_device_match+0x64/0xe4) >> [ 32.128197] [] (soc_device_match) from [] >> (omap8250_probe+0x628/0x75c) >> [ 32.128236] r7:b7841730 r6:c6db2c4e r5:0001 r4:c6db2c40 >> [ 32.128290] [] (omap8250_probe) from [] >> (platform_drv_probe+0x70/0xc8) >> [ 32.128335] r10:c5da4044 r9:c5da4048 r8:c34ff834 r7:c3c3e240 >> r6:c34ff834 r5: >> [ 32.128363] r4:c5da4010 >> [ 32.128413] [] (platform_drv_probe) from [] >> (really_probe+0x184/0x72c) >> [ 32.128452] r7:c3c3e240 r6: r5:c3c3e1c0 r4:c5da4010 >> [ 32.128499] [] (really_probe) from [] >> (driver_probe_device+0xa4/0x270) >> [ 32.128544] r10:c34ff834 r9:c416fa58 r8:c379e840 r7:c5d75a00 >> r6:c5da4034 r5:c37c01c0 >> [ 32.128572] r4:c5da4010 >> [ 32.128620] [] (driver_probe_device) from [] >> (device_driver_attach+0x94/0x9c) >> [ 32.128665] r10: r9:c416fa58 r8:c0f956b4 r7:c5d75a00 >> r6:c5da4034 r5:c34ff834 >> [ 32.128693] r4:c5da4010 >> [ 32.128741] [] (device_driver_attach) from [] >> (__driver_attach+0xe4/0x19c) >> [ 32.128780] r7:c34ff834 r6:c5da4010 r5:c34ff834 r4: >> [ 32.128826] [] (__driver_attach) from [] >> (bus_for_each_dev+0x100/0x154) >> [ 32.128865] r7:c34ff834 r6:b78417a4 r5:c420bd40 r4:c5d75a34 >> [ 32.128910] [] (bus_for_each_dev) from [] >> (driver_attach+0x38/0x3c) >> [ 32.128955] r9:c34ff87c r8:c416fa00 r7:c3541a70 r6:c3541a20 >> r5:c6db4f00 r4:c34ff834 >> [ 32.129001] [] (driver_attach) from [] >> (bus_add_driver+0x21c/0x2dc) >> [ 32.129034] r5:c6db4f00 r4:c34ff834 >> [ 32.129080] [] (bus_add_driver) from [] >> (driver_register+0xdc/0x1b0) >> [ 32.129125] r10: r9:c2b00468 r8:c378a0c0 r7:c2170360 >> r6:c34ff838 r5:c3541a20 >> [ 32.129153] r4:c34ff834 >> [ 32.129202] [] (driver_register) from [] >> (__platform_driver_register+0x7c/0x84) >> [ 32.129241] r7:c000 r6:c2bc509c r5: r4:c34ff820 >> [ 32.129300] [] (__platform_driver_register) from >> [] (omap8250_platform_driver_init+0x24/0x28) >> [ 32.129333] r5:c420bf20 r4:b78417d0 >> [ 32.129387] [] (omap8250_platform_driver_init) from >> [] (do_one_initcall+0xc4/0x400) >> [ 32.129437] [] (do_one_initcall) from [] >> (kernel_init_freeable+0x214/0x268) >> [ 32.129482] r10:c2d128a8 r9:c2b00468 r8:c2c50834 r7:c2c50854 >> r6:c2a55ac8 r5:0007 >> [ 32.129511] r4:c425a700 >> [ 32.129563] [] (kernel_init_freeable) from [] >> (kernel_init+0x18/0x140) >> [ 32.129607] r10: r9: r8: r7: >> r6: r5:c19bfd04 >> [ 32.129635] r4: >> [ 32.129684] [] (kernel_init) from [] >> (ret_from_fork+0x14/0x38) >> [ 32.129715] Exception stack(0xc420bfb0 to 0xc420bff8) >> [ 32.129753] bfa0: >> >> [ 32.129798] bfc0: >> >> [ 32.129839] bfe0: 0
Re: [PATCH v8 09/26] memory: tegra30: Support interconnect framework
On 11-11-20, 10:32, Dmitry Osipenko wrote: > 11.11.2020 09:18, Viresh Kumar пишет: > > On 11-11-20, 09:14, Dmitry Osipenko wrote: > >> The dev_pm_opp_of_add_table() will produce a error message which doesn't > >> give a clue about what's wrong, i.e. that device-tree needs to be updated. > > > > If you think that you need to print something more, then you can do > > that in the error message you print when dev_pm_opp_of_add_table() > > fails. I would suggest to drop this redundant check here. > > > > Please give the rationale. The rationale is that the check is already performed by dev_pm_opp_of_add_table() and it isn't going to add *any* benefit to check it again here. Such a check for matching compatible platforms is normally fine, but not for this. This is like open coding part of dev_pm_opp_of_add_table(), and so is redundant. The dev_pm_opp_of_add_table() helper also checks for OPPv1 bindings in the DT (yes you won't be using them on your platform) and so relying on that API is a better thing to do. As you already said, you just wanted a better print message and so you have added this check. If you really care only about the print message, then you can add a print of your choice in the driver but otherwise this check is not going to benefit you much I am afraid. Having said that, this isn't the code I maintain. I need to guarantee that the OPP core APIs are used properly and are not misused and so I have a higher say there. But in this case all I can do is _suggest_ and not enforce. And as I said earlier, I suggest to drop this redundant check in order to make your code better and faster. Thanks. -- viresh
Re: [PATCH] ASoC: pcm512x: Add support for data formats RJ and LJ
Hello Peter, than you for your review! > The bus format and > >> switch (pcm512x->fmt & SND_SOC_DAIFMT_MASTER_MASK) { > >> case SND_SOC_DAIFMT_CBS_CFS: >> ret = regmap_update_bits(pcm512x->regmap, > > the clock generation role should be set in pcm512x_set_fmt(), in that > way you can deny specific setups earlier. I think we could move both checks for`SND_SOC_DAIFMT_FORMAT_MASK` and `SND_SOC_DAIFMT_MASTER_MASK` into `pcm512x_set_fmt()`. But it would be a different scope, and I didn't intend to do that level of refactoring. Looking at other codecs in kernel, I would say, that doing those checks in `pcm512x_hw_params()`, as they are done currently, is an equally valid approach. As technically keeping checs where they are now doesn't break anything, and is aligned with ASoC codecs design, I suggest to keep the checks where they are. Would you agree? > I would also add DSP_A and DSP_B modes at the same time, DSP_A would > need a write of 1 to register 41 (PCM512x_I2S_2, offset = 1), other > formats should set the offset to 0. That's a good idea, than you for technical details! I just didn't know how to use DSP_A and DSP_B. I will add them, and submit as patch v2 Best regards, Kirill On 11/10/2020 07:59 AM, Peter Ujfalusi wrote: > > > On 09/11/2020 23.21, Kirill Marinushkin wrote: >> Currently, pcm512x driver supports only I2S data format. >> This commit adds RJ and LJ as well. >> >> I don't expect regression WRT existing sound cards, because: >> >> * default value in corresponding register of pcm512x codec is 0 == I2S >> * existing in-tree sound cards with pcm512x codec are configured for I2S >> * i don't see how existing off-tree sound cards with pcm512x codec could be >> configured differently - it would not work >> * tested explicitly, that there is no regression with Raspberry Pi + >> sound card `sound/soc/bcm/hifiberry_dacplus.c` >> >> Signed-off-by: Kirill Marinushkin >> Cc: Mark Brown >> Cc: Takashi Iwai >> Cc: Liam Girdwood >> Cc: Matthias Reichl >> Cc: Kuninori Morimoto >> Cc: Peter Ujfalusi >> Cc: alsa-de...@alsa-project.org >> Cc: linux-kernel@vger.kernel.org >> --- >> sound/soc/codecs/pcm512x.c | 24 >> 1 file changed, 24 insertions(+) >> >> diff --git a/sound/soc/codecs/pcm512x.c b/sound/soc/codecs/pcm512x.c >> index 8153d3d01654..c6e975fb4a43 100644 >> --- a/sound/soc/codecs/pcm512x.c >> +++ b/sound/soc/codecs/pcm512x.c >> @@ -1167,6 +1167,7 @@ static int pcm512x_hw_params(struct snd_pcm_substream >> *substream, >> struct snd_soc_component *component = dai->component; >> struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component); >> int alen; >> +int afmt; >> int gpio; >> int clock_output; >> int master_mode; >> @@ -1195,6 +1196,22 @@ static int pcm512x_hw_params(struct snd_pcm_substream >> *substream, >> return -EINVAL; >> } >> >> +switch (pcm512x->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { >> +case SND_SOC_DAIFMT_I2S: >> +afmt = PCM512x_AFMT_I2S; >> +break; >> +case SND_SOC_DAIFMT_RIGHT_J: >> +afmt = PCM512x_AFMT_RTJ; >> +break; >> +case SND_SOC_DAIFMT_LEFT_J: >> +afmt = PCM512x_AFMT_LTJ; >> +break; >> +default: >> +dev_err(component->dev, "unsupported DAI format: 0x%x\n", >> +pcm512x->fmt); >> +return -EINVAL; >> +} >> + > > The bus format and > >> switch (pcm512x->fmt & SND_SOC_DAIFMT_MASTER_MASK) { > >> case SND_SOC_DAIFMT_CBS_CFS: >> ret = regmap_update_bits(pcm512x->regmap, > > the clock generation role should be set in pcm512x_set_fmt(), in that > way you can deny specific setups earlier. > > I would also add DSP_A and DSP_B modes at the same time, DSP_A would > need a write of 1 to register 41 (PCM512x_I2S_2, offset = 1), other > formats should set the offset to 0. > >> @@ -1236,6 +1253,13 @@ static int pcm512x_hw_params(struct snd_pcm_substream >> *substream, >> return ret; >> } >> >> +ret = regmap_update_bits(pcm512x->regmap, PCM512x_I2S_1, >> + PCM512x_AFMT, afmt); >> +if (ret != 0) { >> +dev_err(component->dev, "Failed to set data format: %d\n", ret); >> +return ret; >> +} >> + >> if (pcm512x->pll_out) { >> ret = regmap_write(pcm512x->regmap, PCM512x_FLEX_A, 0x11); >> if (ret != 0) { >> > > - Péter > > Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. > Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki >
Re: [PATCH] mm/rmap: always do TTU_IGNORE_ACCESS
On Fri, 6 Nov 2020, Shakeel Butt wrote: > On Thu, Nov 5, 2020 at 7:00 PM Hugh Dickins wrote: > > > > I don't know why this was addressed to me in particular (easy to imagine > > I've made a mod at some time that bears on this, but I haven't found it); > > but have spent longer considering the patch than I should have done - > > apologies to everyone else I should be replying to. > > > > I really appreciate your insights and historical anecdotes. I always > learn something new. :) > > > On Wed, 4 Nov 2020, Shakeel Butt wrote: > > > > > Since the commit 369ea8242c0f ("mm/rmap: update to new mmu_notifier > > > semantic v2"), the code to check the secondary MMU's page table access > > > bit is broken for !(TTU_IGNORE_ACCESS) because the page is unmapped from > > > the secondary MMU's page table before the check. More specifically for > > > those secondary MMUs which unmap the memory in > > > mmu_notifier_invalidate_range_start() like kvm. > > > > Well, "broken" seems a bit unfair to 369ea8242c0f. It put a warning > > mmu_notifier_invalidate_range_start() at the beginning, and matching > > mmu_notifier_invalidate_range_end() at the end of try_to_unmap_one(); > > with its mmu_notifier_invalidate_range() exactly where the > > mmu_notifier_invalidate_page() was before (I think the story gets > > more complicated later). Yes, if notifiee takes invalidate_range_start() > > as signal to invalidate all their own range, then that will sometimes > > cause them unnecessary invalidations. > > > > Not just for !TTU_IGNORE_ACCESS: there's also the !TTU_IGNORE_MLOCK > > case meeting a VM_LOCKED vma and setting PageMlocked where that had > > been missed earlier (and page_check_references() has intentionally but > > confusingly marked this case as PAGEREF_RECLAIM, not to reclaim the page, > > but to reach the try_to_unmap_one() which will recognize and fix it up - > > historically easier to do there than in page_referenced_one()). > > > > But I think mmu_notifier is a diversion from what needs thinking about. > > > > > > > > However memory reclaim is the only user of !(TTU_IGNORE_ACCESS) or the > > > absence of TTU_IGNORE_ACCESS and it explicitly performs the page table > > > access check before trying to unmap the page. So, at worst the reclaim > > > will miss accesses in a very short window if we remove page table access > > > check in unmapping code. > > > > I agree with you and Johannes that the short race window when the page > > might be re-referenced is no issue at all: the functional issue is the > > one in your next paragraph. If that's agreed by memcg guys, great, > > then this patch is a nice observation and a welcome cleanup. > > > > > > > > There is an unintented consequence of !(TTU_IGNORE_ACCESS) for the memcg > > > reclaim. From memcg reclaim the page_referenced() only account the > > > accesses from the processes which are in the same memcg of the target > > > page but the unmapping code is considering accesses from all the > > > processes, so, decreasing the effectiveness of memcg reclaim. > > > > Are you sure it was unintended? > > > > Since the dawn of memcg reclaim, it has been the case that a recent > > reference in a "foreign" vma has rescued that page from being reclaimed: > > now you propose to change that. I expect some workflows will benefit > > and others be disadvantaged. I have no objection myself to the change, > > but I do think it needs to be better highlighted here, and explicitly > > agreed by those more familiar with memcg reclaim. > > The reason I said unintended was due to bed7161a519a2 ("Memory > controller: make page_referenced() cgroup aware"). From the commit > message it seems like the intention was to not be influenced by > foreign accesses during memcg reclaim but it missed to make > try_to_unmap_one() memcg aware. Oooh, that's a good reference (much better than the mmu_notifier one you cited in the patch). Yes, I agree Balbir was explicit about the intention then, and you're simply fixing it up. > > I agree with you that this is a behavior change and we have explicitly > agree to not let memcg reclaim be influenced by foreign accesses. I've not seen anyone else protesting, and Johannes and Andrew happy with this: so no more protest from me, let's proceed with the nice cleanup, and hope no regression surfaces. Hugh
Re: [PATCH v4 bpf-next 5/5] tools/bpftool: add support for in-kernel and named BTF in `btf show`
> On Nov 10, 2020, at 8:19 PM, Andrii Nakryiko > wrote: > > On Tue, Nov 10, 2020 at 5:15 PM Song Liu wrote: >> >> >> >>> On Nov 9, 2020, at 5:19 PM, Andrii Nakryiko wrote: >> >> [...] >> >>> ... >>> >>> Tested-by: Alan Maguire >>> Signed-off-by: Andrii Nakryiko >> >> Acked-by: Song Liu >> >> With one nit: >> >>> --- >>> tools/bpf/bpftool/btf.c | 28 +++- >>> 1 file changed, 27 insertions(+), 1 deletion(-) >>> >>> diff --git a/tools/bpf/bpftool/btf.c b/tools/bpf/bpftool/btf.c >>> index c96b56e8e3a4..ed5e97157241 100644 >>> --- a/tools/bpf/bpftool/btf.c >>> +++ b/tools/bpf/bpftool/btf.c >>> @@ -742,9 +742,14 @@ show_btf_plain(struct bpf_btf_info *info, int fd, >>> struct btf_attach_table *btf_map_table) >>> { >>> struct btf_attach_point *obj; >>> + const char *name = u64_to_ptr(info->name); >>> int n; >>> >>> printf("%u: ", info->id); >>> + if (info->kernel_btf) >>> + printf("name [%s] ", name); >>> + else if (name && name[0]) >>> + printf("name %s ", name); >> >> Maybe explicitly say "name " for btf without a name? I think >> it will benefit plain output. > > This patch set is already landed. But I can do a follow-up patch to add this. I realized this was applied soon after sending this. Yeah, a follow-up patch would be great. Thanks, Song
linux-next boot error: BUG: unable to handle kernel NULL pointer dereference in mempool_init_node
Hello, syzbot found the following issue on: HEAD commit:3e14f70c Add linux-next specific files for 2020 git tree: linux-next console output: https://syzkaller.appspot.com/x/log.txt?x=12e6af6250 kernel config: https://syzkaller.appspot.com/x/.config?x=d6f4c7e100b61b76 dashboard link: https://syzkaller.appspot.com/bug?extid=2d6f3dad1a42d86a5801 compiler: gcc (GCC) 10.1.0-syz 20200507 IMPORTANT: if you fix the issue, please add the following tag to the commit: Reported-by: syzbot+2d6f3dad1a42d86a5...@syzkaller.appspotmail.com RPC: Registered named UNIX socket transport module. RPC: Registered udp transport module. RPC: Registered tcp transport module. RPC: Registered tcp NFSv4.1 backchannel transport module. NET: Registered protocol family 44 pci_bus :00: resource 4 [io 0x-0x0cf7 window] pci_bus :00: resource 5 [io 0x0d00-0x window] pci_bus :00: resource 6 [mem 0x000a-0x000b window] pci_bus :00: resource 7 [mem 0xc000-0xfebfefff window] pci :00:00.0: Limiting direct PCI/PCI transfers PCI: CLS 0 bytes, default 64 PCI-DMA: Using software bounce buffering for IO (SWIOTLB) software IO TLB: mapped [mem 0xb5e0-0xb9e0] (64MB) RAPL PMU: API unit is 2^-32 Joules, 0 fixed counters, 10737418240 ms ovfl timer kvm: already loaded the other module clocksource: tsc: mask: 0x max_cycles: 0x212735223b2, max_idle_ns: 440795277976 ns clocksource: Switched to clocksource tsc Initialise system trusted keyrings workingset: timestamp_bits=40 max_order=21 bucket_order=0 zbud: loaded DLM installed squashfs: version 4.0 (2009/01/31) Phillip Lougher FS-Cache: Netfs 'nfs' registered for caching NFS: Registering the id_resolver key type Key type id_resolver registered Key type id_legacy registered nfs4filelayout_init: NFSv4 File Layout Driver Registering... Installing knfsd (copyright (C) 1996 o...@monad.swb.de). FS-Cache: Netfs 'cifs' registered for caching Key type cifs.spnego registered Key type cifs.idmap registered ntfs: driver 2.1.32 [Flags: R/W]. efs: 1.0a - http://aeschi.ch.eu.org/efs/ jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc. romfs: ROMFS MTD (C) 2007 Red Hat, Inc. QNX4 filesystem 0.2.3 registered. qnx6: QNX6 filesystem 1.0.0 registered. fuse: init (API version 7.32) orangefs_debugfs_init: called with debug mask: :none: :0: orangefs_init: module version upstream loaded JFS: nTxBlock = 8192, nTxLock = 65536 SGI XFS with ACLs, security attributes, realtime, quota, no debug enabled 9p: Installing v9fs 9p2000 file system support FS-Cache: Netfs '9p' registered for caching NILFS version 2 loaded befs: version: 0.9.3 ocfs2: Registered cluster interface o2cb ocfs2: Registered cluster interface user OCFS2 User DLM kernel interface loaded gfs2: GFS2 installed BUG: kernel NULL pointer dereference, address: 0018 #PF: supervisor read access in kernel mode #PF: error_code(0x) - not-present page PGD 0 P4D 0 Oops: [#1] PREEMPT SMP KASAN CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.10.0-rc3-next-2020-syzkaller #0 Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011 RIP: 0010:nearest_obj include/linux/slub_def.h:169 [inline] RIP: 0010:kasan_slab_free+0x19/0x110 mm/kasan/common.c:350 Code: 00 48 c7 c0 fb ff ff ff c3 cc cc cc cc cc cc cc cc 41 55 49 89 d5 41 54 49 89 fc 48 89 f7 55 48 89 f5 53 89 cb e8 f7 27 7e ff <41> 8b 7c 24 18 48 be 00 00 00 00 00 16 00 00 48 c1 e8 0c 48 89 c1 RSP: :c9c67d30 EFLAGS: 00010293 RAX: 0001436d RBX: RCX: 8130a760 RDX: 888140748000 RSI: 8130a76a RDI: 0007 RBP: 8881436d R08: 00fe R09: ed10286da800 R10: R11: R12: R13: 81945766 R14: 888143557944 R15: 81943b80 FS: () GS:8880b9e0() knlGS: CS: 0010 DS: ES: CR0: 80050033 CR2: 0018 CR3: 0b08e000 CR4: 001506f0 DR0: DR1: DR2: DR3: DR6: fffe0ff0 DR7: 0400 Call Trace: kasan_slab_free_mempool include/linux/kasan.h:202 [inline] kasan_poison_element mm/mempool.c:107 [inline] add_element mm/mempool.c:124 [inline] mempool_init_node+0x37e/0x580 mm/mempool.c:205 mempool_create_node mm/mempool.c:269 [inline] mempool_create+0x76/0xc0 mm/mempool.c:254 mempool_create_kmalloc_pool include/linux/mempool.h:88 [inline] init_caches fs/ceph/super.c:785 [inline] init_ceph+0x193/0x2d7 fs/ceph/super.c:1261 do_one_initcall+0x103/0x650 init/main.c:1212 do_initcall_level init/main.c:1285 [inline] do_initcalls init/main.c:1301 [inline] do_basic_setup init/main.c:1321 [inline] kernel_init_freeable+0x600/0x684 init/main.c:1521 kernel_init+0xd/0x1b8 init/main.c:1410 ret_from_fork+0x1f/0x30 arch/x86/entry/entry_64.S:296 Modules linked in: CR2:
drivers/watchdog/pcwd_usb.c:375:37: sparse: sparse: incorrect type in argument 1 (different address spaces)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: eccc876724927ff3b9ff91f36f7b6b159e948f0c commit: e5fc436f06eef54ef512ea55a9db8eb9f2e76959 sparse: use static inline for __chk_{user,io}_ptr() date: 2 months ago config: sh-randconfig-s032-2020 (attached as .config) compiler: sh4-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.3-106-gd020cf33-dirty # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e5fc436f06eef54ef512ea55a9db8eb9f2e76959 git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git git fetch --no-tags linus master git checkout e5fc436f06eef54ef512ea55a9db8eb9f2e76959 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=sh If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot "sparse warnings: (new ones prefixed by >>)" drivers/watchdog/pcwd_usb.c:375:37: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected char const *__gu_addr @@ got char const [noderef] __user * @@ drivers/watchdog/pcwd_usb.c:375:37: sparse: expected char const *__gu_addr drivers/watchdog/pcwd_usb.c:375:37: sparse: got char const [noderef] __user * >> drivers/watchdog/pcwd_usb.c:375:37: sparse: sparse: incorrect type in >> argument 1 (different address spaces) @@ expected void const volatile >> [noderef] __user *ptr @@ got char const *__gu_addr @@ >> drivers/watchdog/pcwd_usb.c:375:37: sparse: expected void const volatile >> [noderef] __user *ptr drivers/watchdog/pcwd_usb.c:375:37: sparse: got char const *__gu_addr drivers/watchdog/pcwd_usb.c:423:21: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected int const *__gu_addr @@ got int [noderef] __user *p @@ drivers/watchdog/pcwd_usb.c:423:21: sparse: expected int const *__gu_addr drivers/watchdog/pcwd_usb.c:423:21: sparse: got int [noderef] __user *p >> drivers/watchdog/pcwd_usb.c:423:21: sparse: sparse: incorrect type in >> argument 1 (different address spaces) @@ expected void const volatile >> [noderef] __user *ptr @@ got int const *__gu_addr @@ drivers/watchdog/pcwd_usb.c:423:21: sparse: expected void const volatile [noderef] __user *ptr drivers/watchdog/pcwd_usb.c:423:21: sparse: got int const *__gu_addr drivers/watchdog/pcwd_usb.c:447:21: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected int const *__gu_addr @@ got int [noderef] __user *p @@ drivers/watchdog/pcwd_usb.c:447:21: sparse: expected int const *__gu_addr drivers/watchdog/pcwd_usb.c:447:21: sparse: got int [noderef] __user *p drivers/watchdog/pcwd_usb.c:447:21: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const volatile [noderef] __user *ptr @@ got int const *__gu_addr @@ drivers/watchdog/pcwd_usb.c:447:21: sparse: expected void const volatile [noderef] __user *ptr drivers/watchdog/pcwd_usb.c:447:21: sparse: got int const *__gu_addr -- drivers/usb/misc/sisusbvga/sisusb.c:542:9: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned short header @@ got restricted __le16 [usertype] @@ drivers/usb/misc/sisusbvga/sisusb.c:542:9: sparse: expected unsigned short header drivers/usb/misc/sisusbvga/sisusb.c:542:9: sparse: got restricted __le16 [usertype] drivers/usb/misc/sisusbvga/sisusb.c:542:9: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned int [usertype] address @@ got restricted __le32 [usertype] @@ drivers/usb/misc/sisusbvga/sisusb.c:542:9: sparse: expected unsigned int [usertype] address drivers/usb/misc/sisusbvga/sisusb.c:542:9: sparse: got restricted __le32 [usertype] drivers/usb/misc/sisusbvga/sisusb.c:542:9: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned int [usertype] data @@ got restricted __le32 [usertype] @@ drivers/usb/misc/sisusbvga/sisusb.c:542:9: sparse: expected unsigned int [usertype] data drivers/usb/misc/sisusbvga/sisusb.c:542:9: sparse: got restricted __le32 [usertype] drivers/usb/misc/sisusbvga/sisusb.c:578:9: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned short header @@ got restricted __le16 [usertype] @@ drivers/usb/misc/sisusbvga/sisusb.c:578:9: sparse: expected unsigned short header drivers/usb/misc/sisusbvga/sisusb.c:578:9: sparse:
Re: [RESEND PATCH v3] fuse: Abort waiting for a response if the daemon receives a fatal signal
Miklos Szeredi writes: > On Mon, Nov 9, 2020 at 7:54 PM Eric W. Biederman > wrote: >> >> Miklos Szeredi writes: >> >> > On Mon, Nov 9, 2020 at 1:48 PM Alexey Gladkov >> > wrote: >> >> >> >> This patch removes one kind of the deadlocks inside the fuse daemon. The >> >> problem appear when the fuse daemon itself makes a file operation on its >> >> filesystem and receives a fatal signal. >> >> >> >> This deadlock can be interrupted via fusectl filesystem. But if you have >> >> many fuse mountpoints, it will be difficult to figure out which >> >> connection to break. >> >> >> >> This patch aborts the connection if the fuse server receives a fatal >> >> signal. >> > >> > The patch itself might be acceptable, but I have some questions. >> > >> > To logic of this patch says: >> > >> > "If a task having the fuse device open in it's fd table receives >> > SIGKILL (and filesystem was initially mounted in a non-init user >> > namespace), then abort the filesystem operation" >> > >> > You just say "server" instead of "task having the fuse device open in >> > it's fd table" which is sloppy to say the least. It might also lead >> > to regressions, although I agree that it's unlikely. >> > >> > Also how is this solving any security issue? Just create the request >> > loop using two fuse filesystems and the deadlock avoidance has just >> > been circumvented. So AFAICS "selling" this as a CVE fix is not >> > appropriate. >> >> The original report came in with a CVE on it. So referencing that CVE >> seems reasonable. Even if the issue isn't particularly serious. It is >> very annoying not to be able to kill processes with SIGKILL or the OOM >> killer. >> >> You have a good point about the looping issue. I wonder if there is a >> way to enhance this comparatively simple approach to prevent the more >> complex scenario you mention. > > Let's take a concrete example: > > - task A is "server" for fuse fs a > - task B is "server" for fuse fs b > - task C: chmod(/a/x, ...) > - task A: read UNLINK request > - task A: chmod(/b/x, ...) > - task B: read UNLINK request > - task B: chmod (/a/x, ...) > > Now B is blocking on i_mutex on x , A is waiting for reply from B, C > is holding i_mutex on x and waiting for reply from A. > > At this point B is truly uninterruptible (and I'm not betting large > sums on Al accepting killable VFS locks patches), so killing B is out. > > Killing A with this patch does nothing, since A does not have b's dev > fd in its fdtable. > > Killing C again does nothing, since it has no fuse dev fd at all. > >> Does tweaking the code to close every connection represented by a fuse >> file descriptor after a SIGKILL has been delevered create any problems? > > In the above example are you suggesting that SIGKILL on A would abort > "a" from fs b's code? Yeah, that would work, I guess. Poking into > another instance this way sounds pretty horrid, though. Yes. That is what I am suggesting. Layering purity it does not have. It is also fragile as it only handles interactions between fuse instances. The advantage is that it is a very small amount of code. I think there is enough care to get a small change like that in. (With a big fat comment describing why it is imperfect). I don't know if there is enough care to get the general solution (you describe below) implemented and merged in any kind of timely manner. >> > What's the reason for making this user-ns only? If we drop the >> > security aspect, then I don't see any reason not to do this >> > unconditionally. >> >> >> > Also note, there's a proper solution for making fuse requests always >> > killable, and that is to introduce a shadow locking that ensures >> > correct fs operation in the face of requests that have returned and >> > released their respective VFS locks. Now this would be a much more >> > complex solution, but also a much more correct one, not having issues >> > with correctly defining what a server is (which is not a solvable >> > problem). >> >> Is this the solution that was removed at some point from fuse, >> or are you talking about something else? >> >> I think you are talking about adding a set of fuse specific locks >> so fuse does not need to rely on the vfs locks. I don't quite have >> enough insight to see that bigger problem so if you can expand in more >> detail I would appreciate it. > > Okay, so the problem with making the wait_event() at the end of > request_wait_answer() killable is that it would allow compromising the > server's integrity by unlocking the VFS level lock (which protects the > fs) while the server hasn't yet finished the request. > > The way this would be solvable is to add a fuse level lock for each > VFS level lock. That lock would be taken before the request is sent > to userspace and would be released when the answer is received. > Normally there would be zero contention on these shadow locks, but if > a request is forcibly killed, then the VFS lock is released and the > shadow
Re: [PATCH v21 06/19] mm/rmap: stop store reordering issue on page->mapping
On Fri, 6 Nov 2020, Alex Shi wrote: > > updated for comments change from Johannes > > > From 2fd278b1ca6c3e260ad249808b62f671d8db5a7b Mon Sep 17 00:00:00 2001 > From: Alex Shi > Date: Thu, 5 Nov 2020 11:38:24 +0800 > Subject: [PATCH v21 06/19] mm/rmap: stop store reordering issue on > page->mapping > > Hugh Dickins and Minchan Kim observed a long time issue which > discussed here, but actully the mentioned fix missed. > https://lore.kernel.org/lkml/20150504031722.GA2768@blaptop/ > The store reordering may cause problem in the scenario: > > CPU 0 CPU1 >do_anonymous_page > page_add_new_anon_rmap() > page->mapping = anon_vma + PAGE_MAPPING_ANON > lru_cache_add_inactive_or_unevictable() > spin_lock(lruvec->lock) > SetPageLRU() > spin_unlock(lruvec->lock) > /* idletacking judged it as LRU >* page so pass the page in >* page_idle_clear_pte_refs >*/ > page_idle_clear_pte_refs > rmap_walk > if PageAnon(page) > > Johannes give detailed examples how the store reordering could cause > a trouble: > "The concern is the SetPageLRU may get reorder before 'page->mapping' > setting, That would make CPU 1 will observe at page->mapping after > observing PageLRU set on the page. > > 1. anon_vma + PAGE_MAPPING_ANON > >That's the in-order scenario and is fine. > > 2. NULL > >That's possible if the page->mapping store gets reordered to occur >after SetPageLRU. That's fine too because we check for it. > > 3. anon_vma without the PAGE_MAPPING_ANON bit > >That would be a problem and could lead to all kinds of undesirable >behavior including crashes and data corruption. > >Is it possible? AFAICT the compiler is allowed to tear the store to >page->mapping and I don't see anything that would prevent it. > > That said, I also don't see how the reader testing PageLRU under the > lru_lock would prevent that in the first place. AFAICT we need that > WRITE_ONCE() around the page->mapping assignment." > > Signed-off-by: Alex Shi > Cc: Johannes Weiner > Cc: Andrew Morton > Cc: Hugh Dickins Acked-by: Hugh Dickins Many thanks to Johannes for spotting my falsehood in the next patch, and to Alex for making it true with this patch. As I just remarked against the v20, I do have some more of these WRITE_ONCEs, but consider them merely theoretical: so please don't let me hold this series up. Andrew, I am hoping that Alex's v21 will appear in the next mmotm? Thanks, Hugh > Cc: Matthew Wilcox > Cc: Minchan Kim > Cc: Vladimir Davydov > Cc: linux-kernel@vger.kernel.org > Cc: linux...@kvack.org > --- > mm/rmap.c | 8 +++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/mm/rmap.c b/mm/rmap.c > index 1b84945d655c..380c6b9956c2 100644 > --- a/mm/rmap.c > +++ b/mm/rmap.c > @@ -1054,8 +1054,14 @@ static void __page_set_anon_rmap(struct page *page, > if (!exclusive) > anon_vma = anon_vma->root; > > + /* > + * page_idle does a lockless/optimistic rmap scan on page->mapping. > + * Make sure the compiler doesn't split the stores of anon_vma and > + * the PAGE_MAPPING_ANON type identifier, otherwise the rmap code > + * could mistake the mapping for a struct address_space and crash. > + */ > anon_vma = (void *) anon_vma + PAGE_MAPPING_ANON; > - page->mapping = (struct address_space *) anon_vma; > + WRITE_ONCE(page->mapping, (struct address_space *) anon_vma); > page->index = linear_page_index(vma, address); > } > > -- > 1.8.3.1
Re: [RFC PATCH 1/9] cxl/acpi: Add an acpi_cxl module for the CXL interconnect
On Wed, 2020-11-11 at 07:34 +, h...@infradead.org wrote: > On Wed, Nov 11, 2020 at 07:30:34AM +, Verma, Vishal L wrote: > > Hi Christpph, > > > > I thought 100 col. lines were acceptable now. > > Quote from the coding style document: > > "The preferred limit on the length of a single line is 80 columns. > > Statements longer than 80 columns should be broken into sensible chunks, > unless exceeding 80 columns significantly increases readability and does > not hide information." > > So yes, they are acceptable as an expception. Not for crap like this. Ah fair enough, I'll reflow all of these for the next revision.
[PATCH v3] tcp: fix race condition when creating child sockets from syncookies
When the TCP stack is in SYN flood mode, the server child socket is created from the SYN cookie received in a TCP packet with the ACK flag set. The child socket is created when the server receives the first TCP packet with a valid SYN cookie from the client. Usually, this packet corresponds to the final step of the TCP 3-way handshake, the ACK packet. But is also possible to receive a valid SYN cookie from the first TCP data packet sent by the client, and thus create a child socket from that SYN cookie. Since a client socket is ready to send data as soon as it receives the SYN+ACK packet from the server, the client can send the ACK packet (sent by the TCP stack code), and the first data packet (sent by the userspace program) almost at the same time, and thus the server will equally receive the two TCP packets with valid SYN cookies almost at the same instant. When such event happens, the TCP stack code has a race condition that occurs between the momement a lookup is done to the established connections hashtable to check for the existence of a connection for the same client, and the moment that the child socket is added to the established connections hashtable. As a consequence, this race condition can lead to a situation where we add two child sockets to the established connections hashtable and deliver two sockets to the userspace program to the same client. This patch fixes the race condition by checking if an existing child socket exists for the same client when we are adding the second child socket to the established connections socket. If an existing child socket exists, we return that socket and use it to process the TCP packet received, and discard the second child socket to the same client. Signed-off-by: Ricardo Dias --- v3 (2020-11-11): * Fixed IPv6 handling in inet_ehash_insert * Removed unecessary comparison while traversing the ehash bucket list. v2 (2020-11-09): * Changed the author's email domain. * Removed the helper function inet_ehash_insert_chk_dup and moved the logic to the existing inet_ehash_insert. * Updated the callers of iner_ehash_nolisten to deal with the new logic. include/net/inet_hashtables.h | 6 +-- net/dccp/ipv4.c | 4 +- net/dccp/ipv6.c | 4 +- net/ipv4/inet_hashtables.c| 69 ++- net/ipv4/syncookies.c | 5 ++- net/ipv4/tcp_ipv4.c | 10 - net/ipv6/tcp_ipv6.c | 17 - 7 files changed, 97 insertions(+), 18 deletions(-) diff --git a/include/net/inet_hashtables.h b/include/net/inet_hashtables.h index 92560974ea67..dffa345d52a7 100644 --- a/include/net/inet_hashtables.h +++ b/include/net/inet_hashtables.h @@ -247,9 +247,9 @@ void inet_hashinfo2_init(struct inet_hashinfo *h, const char *name, unsigned long high_limit); int inet_hashinfo2_init_mod(struct inet_hashinfo *h); -bool inet_ehash_insert(struct sock *sk, struct sock *osk); -bool inet_ehash_nolisten(struct sock *sk, struct sock *osk); -int __inet_hash(struct sock *sk, struct sock *osk); +bool inet_ehash_insert(struct sock *sk, struct sock **osk); +bool inet_ehash_nolisten(struct sock *sk, struct sock **osk); +int __inet_hash(struct sock *sk, struct sock **osk); int inet_hash(struct sock *sk); void inet_unhash(struct sock *sk); diff --git a/net/dccp/ipv4.c b/net/dccp/ipv4.c index 9c28c8251125..99bbba478991 100644 --- a/net/dccp/ipv4.c +++ b/net/dccp/ipv4.c @@ -400,6 +400,7 @@ struct sock *dccp_v4_request_recv_sock(const struct sock *sk, struct inet_request_sock *ireq; struct inet_sock *newinet; struct sock *newsk; + struct sock *osk; if (sk_acceptq_is_full(sk)) goto exit_overflow; @@ -427,7 +428,8 @@ struct sock *dccp_v4_request_recv_sock(const struct sock *sk, if (__inet_inherit_port(sk, newsk) < 0) goto put_and_exit; - *own_req = inet_ehash_nolisten(newsk, req_to_sk(req_unhash)); + osk = req_to_sk(req_unhash); + *own_req = inet_ehash_nolisten(newsk, ); if (*own_req) ireq->ireq_opt = NULL; else diff --git a/net/dccp/ipv6.c b/net/dccp/ipv6.c index ef4ab28cfde0..91a825c00a97 100644 --- a/net/dccp/ipv6.c +++ b/net/dccp/ipv6.c @@ -407,6 +407,7 @@ static struct sock *dccp_v6_request_recv_sock(const struct sock *sk, struct inet_sock *newinet; struct dccp6_sock *newdp6; struct sock *newsk; + struct sock *osk; if (skb->protocol == htons(ETH_P_IP)) { /* @@ -533,7 +534,8 @@ static struct sock *dccp_v6_request_recv_sock(const struct sock *sk, dccp_done(newsk); goto out; } - *own_req = inet_ehash_nolisten(newsk, req_to_sk(req_unhash)); + osk = req_to_sk(req_unhash); + *own_req = inet_ehash_nolisten(newsk, ); /* Clone pktoptions received with SYN, if we own the req */ if (*own_req && ireq->pktopts) {
Re: [RFC PATCH 1/9] cxl/acpi: Add an acpi_cxl module for the CXL interconnect
On Wed, Nov 11, 2020 at 07:30:34AM +, Verma, Vishal L wrote: > Hi Christpph, > > I thought 100 col. lines were acceptable now. Quote from the coding style document: "The preferred limit on the length of a single line is 80 columns. Statements longer than 80 columns should be broken into sensible chunks, unless exceeding 80 columns significantly increases readability and does not hide information." So yes, they are acceptable as an expception. Not for crap like this.
Re: [PATCH v13 3/3] binder: add transaction latency tracer
On Wed, Nov 11, 2020 at 11:02:44AM +0800, Frankie Chang wrote: > From: "Frankie.Chang" > > Record start/end timestamp for binder transaction. > When transaction is completed or transaction is free, > it would be checked if transaction latency over threshold > (default 2 sec), if yes, printing related information for tracing. I've applied the first 2 patches (finally!), but in looking at this some more, I have some questions: > /* Implement details */ > - Add latency tracer module to monitor transaction > by attaching to new tracepoints introduced > when transactions are allocated and freed. > The trace_binder_txn_latency_free would not be enabled > by default. Monitoring which transaction is too slow to > cause some of exceptions is important. So we hook the > tracepoint to call the monitor function. This feels odd, but ok... > - Since some of modules would trigger timeout NE > if their binder transaction don't finish in time, > such as audio timeout (5 sec), even BT command > timeout (2 sec), etc. > Therefore, setting the timeout threshold as default > 2 seconds could be helpful to debug. > But this timeout threshold is configurable, to let > all users determine the more suitable threshold. You made this a module parameter, which while it works, is very unfriendly as it requires people to modify the boot command line or their module parameter configuration file. Also, you are doing this on as a "global binder" operation, for all instances, not on a per-instance basis. Which is my larger question, you seem to want this tracer either on or off for ALL of the binder instances, which feels like overkill. Why not make this a per-instance thing, and allow it to be configured properly in the binder filesystem interface, to allow individual instances to enable/disable this. This also prevents binder instances from seeing data outside of their instances, and leaking that to the kernel log, which brings me to: > - The reason why printing the related information to > kernel information log but not trace buffer is that > some abnormal transactions may be pending for a long > time ago, they could not be recorded due to buffer > limited. Don't abuse the kernel information log for stuff that is just normal operations. What is wrong with using the trace buffers here? That's what they are designed for from what I can tell. You don't want to "leak" this information to the world in the kernel log for stuff that should only go to a user/process that has the correct permissions to see it as specified by the tracing permissions, right? Some implementation questions below: > > Signed-off-by: Frankie.Chang > Acked-by: Todd Kjos > Reported-by: kernel test robot > --- > drivers/android/Kconfig |8 +++ > drivers/android/Makefile|1 + > drivers/android/binder.c|6 ++ > drivers/android/binder_internal.h | 13 > drivers/android/binder_latency_tracer.c | 107 > +++ > drivers/android/binder_trace.h | 26 +++- > 6 files changed, 158 insertions(+), 3 deletions(-) > create mode 100644 drivers/android/binder_latency_tracer.c > > diff --git a/drivers/android/Kconfig b/drivers/android/Kconfig > index 53b22e2..8aadaf4 100644 > --- a/drivers/android/Kconfig > +++ b/drivers/android/Kconfig > @@ -54,6 +54,14 @@ config ANDROID_BINDER_IPC_SELFTEST > exhaustively with combinations of various buffer sizes and > alignments. > > +config BINDER_TRANSACTION_LATENCY_TRACKING > + tristate "Android Binder transaction tracking" > + help > + Used for track abnormal binder transaction which is over threshold, > + when the transaction is done or be free, this transaction would be > + checked whether it executed overtime. > + If yes, printing out the detailed info. Why is this a separate module? Who will ever want this split out? > + > endif # if ANDROID > > endmenu > diff --git a/drivers/android/Makefile b/drivers/android/Makefile > index c9d3d0c9..c2ffdb6 100644 > --- a/drivers/android/Makefile > +++ b/drivers/android/Makefile > @@ -4,3 +4,4 @@ ccflags-y += -I$(src) # needed for trace > events > obj-$(CONFIG_ANDROID_BINDERFS) += binderfs.o > obj-$(CONFIG_ANDROID_BINDER_IPC) += binder.o binder_alloc.o > obj-$(CONFIG_ANDROID_BINDER_IPC_SELFTEST) += binder_alloc_selftest.o > +obj-$(CONFIG_BINDER_TRANSACTION_LATENCY_TRACKING)+= > binder_latency_tracer.o > diff --git a/drivers/android/binder.c b/drivers/android/binder.c > index 20b08f52..6384a37 100644 > --- a/drivers/android/binder.c > +++ b/drivers/android/binder.c > @@ -2651,6 +2651,7 @@ static void binder_transaction(struct binder_proc *proc, > return_error_line = __LINE__; > goto err_alloc_t_failed; > } > + trace_binder_txn_latency_alloc(t); > INIT_LIST_HEAD(>fd_fixups); >
Re: [PATCH v13] binder: add transaction latency tracer
On Wed, Nov 11, 2020 at 11:02:41AM +0800, Frankie Chang wrote: > > Frankie.Chang (3): > binder: move structs from core file to header file > binder: add trace at free transaction. > binder: add transaction latency tracer > > drivers/android/Kconfig | 8 + > drivers/android/Makefile| 1 + > drivers/android/binder.c| 430 ++-- > drivers/android/binder_internal.h | 419 +++ > drivers/android/binder_latency_tracer.c | 107 ++ > drivers/android/binder_trace.h | 49 +++ > 6 files changed, 608 insertions(+), 406 deletions(-) > create mode 100644 drivers/android/binder_latency_tracer.c Your cover letter here lost all of the information that used to be in other versions of the series :(
Re: [PATCH v8 09/26] memory: tegra30: Support interconnect framework
11.11.2020 09:18, Viresh Kumar пишет: > On 11-11-20, 09:14, Dmitry Osipenko wrote: >> 11.11.2020 08:53, Viresh Kumar пишет: +static int tegra_emc_opp_table_init(struct tegra_emc *emc) +{ + struct opp_table *reg_opp_table = NULL, *clk_opp_table, *hw_opp_table; + u32 hw_version = BIT(tegra_sku_info.soc_speedo_id); + const char *rname = "core"; + int err; + + /* + * Legacy device-trees don't have OPP table and EMC driver isn't + * useful in this case. + */ + if (!device_property_present(emc->dev, "operating-points-v2")) { >>> I don't understand why you want to check this ? The below call to >>> dev_pm_opp_of_add_table() will fail anyway and that should be good for >>> you. >>> >> >> The dev_pm_opp_of_add_table() will produce a error message which doesn't >> give a clue about what's wrong, i.e. that device-tree needs to be updated. > > If you think that you need to print something more, then you can do > that in the error message you print when dev_pm_opp_of_add_table() > fails. I would suggest to drop this redundant check here. > Please give the rationale.
Re: [RFC PATCH 1/9] cxl/acpi: Add an acpi_cxl module for the CXL interconnect
On Wed, 2020-11-11 at 07:10 +, Christoph Hellwig wrote: > On Tue, Nov 10, 2020 at 09:43:48PM -0800, Ben Widawsky wrote: > > +menuconfig CXL_BUS > > + tristate "CXL (Compute Express Link) Devices Support" > > + help > > + CXL is a bus that is electrically compatible with PCI-E, but layers > > + three protocols on that signalling (CXL.io, CXL.cache, and CXL.mem). > > The > > + CXL.cache protocol allows devices to hold cachelines locally, the > > + CXL.mem protocol allows devices to be fully coherent memory targets, > > the > > + CXL.io protocol is equivalent to PCI-E. Say 'y' to enable support for > > + the configuration and management of devices supporting these > > protocols. > > + > > Please fix the overly long lines. > > > +static void acpi_cxl_desc_init(struct acpi_cxl_desc *acpi_desc, struct > > device *dev) > > Another overly long line. Hi Christpph, I thought 100 col. lines were acceptable now. > > > +{ > > + dev_set_drvdata(dev, acpi_desc); > > + acpi_desc->dev = dev; > > +} > > But this helper seems pretty pointless to start with. > > > +static int acpi_cxl_remove(struct acpi_device *adev) > > +{ > > + return 0; > > +} > > The emptry remove callback is not needed. Agreed on both of the above comments - these are just boilerplate for now, I expect they will get filled in in the next revision as more functionality gets fleshed out. If they are still empty/no-op by then I will remove them. > > > +/* > > + * If/when CXL support is defined by other platform firmware the kernel > > + * will need a mechanism to select between the platform specific version > > + * of this routine, until then, hard-code ACPI assumptions > > + */ > > +int cxl_bus_prepared(struct pci_dev *pdev) > > +{ > > + struct acpi_device *adev; > > + struct pci_dev *root_port; > > + struct device *root; > > + > > + root_port = pcie_find_root_port(pdev); > > + if (!root_port) > > + return -ENXIO; > > + > > + root = root_port->dev.parent; > > + if (!root) > > + return -ENXIO; > > + > > + adev = ACPI_COMPANION(root); > > + if (!adev) > > + return -ENXIO; > > + > > + /* TODO: OSC enabling */ > > + > > + return 0; > > +} > > +EXPORT_SYMBOL_GPL(cxl_bus_prepared); > > What is the point of this function? I doesn't realy do anything, > not even a CXL specific check. This gets a bit more fleshed out in patch 2. I kept that separate so that it is easier to review the bulk of the _OSC work in that patch without this driver boilerplate getting in the way. > > > > > +/*** > > + * > > + * CEDT - CXL Early Discovery Table (ACPI 6.4) > > + *Version 1 > > + * > > + > > **/ > > + > > Pleae use the normal Linux comment style. > > > > +#define ACPI_CEDT_CHBS_VERSION_CXL11(0) > > +#define ACPI_CEDT_CHBS_VERSION_CXL20(1) > > + > > +/* Values for length field above */ > > + > > +#define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000) > > +#define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x1) > > No need for the braces. For both of these - see the note in the commit message. I just followed the ACPI header's style, and these hunks are only in this series to make it usable. I expect the 'actual' struct definitions, naming etc will come through ACPICA.
Re: [PATCH v20 08/20] mm: page_idle_get_page() does not need lru_lock
On Mon, 2 Nov 2020, Johannes Weiner wrote: > On Thu, Oct 29, 2020 at 06:44:53PM +0800, Alex Shi wrote: > > From: Hugh Dickins > > > > It is necessary for page_idle_get_page() to recheck PageLRU() after > > get_page_unless_zero(), but holding lru_lock around that serves no > > useful purpose, and adds to lru_lock contention: delete it. > > > > See https://lore.kernel.org/lkml/20150504031722.GA2768@blaptop for the > > discussion that led to lru_lock there; but __page_set_anon_rmap() now > > uses WRITE_ONCE(), > > That doesn't seem to be the case in Linus's or Andrew's tree. Am I > missing a dependent patch series? Sorry, I was out of action, then slower than ever, for a while. Many thanks for calling out my falsehood there, Johannes. What led me to write that? It has baffled me, but at last I see: this patch to page_idle_get_page() was 0002 in my lru_lock patchset against v5.3 last year, and 0001 was the patch which made it true. Then when I checked against mainline, I must have got confused by the similar WRITE_ONCE in page_move_anon_rmap(). Appended below, but not rediffed, and let's not hold up Alex's set for the rest of it: it is all theoretical until the kernel gets to be built with a suitably malicious compiler; but I'll follow up with a fresh version of the below after his set is safely in. >From a1abcbc2aac70c6ba47b8991992bb85b86b4a160 Mon Sep 17 00:00:00 2001 From: Hugh Dickins Date: Thu, 22 Aug 2019 15:49:44 -0700 Subject: [PATCH 1/9] mm: more WRITE_ONCE and READ_ONCE on page->mapping v4.2 commit 414e2fb8ce5a ("rmap: fix theoretical race between do_wp_page and shrink_active_list") added a WRITE_ONCE() where page_move_anon_rmap() composes page->mapping from anon_vma pointer and PAGE_MAPPING_ANON. Now do the same where __page_set_anon_rmap() does the same, and where compaction.c applies PAGE_MAPPING_MOVABLE, and ksm.c PAGE_MAPPING_KSM. rmap.c already uses READ_ONCE(page->mapping), but util.c should too: add READ_ONCE() in page_rmapping(), page_anon_vma() and page_mapping(). Delete the then unused helper __page_rmapping(). I doubt that this commit fixes anything, but it's harmless and unintrusive, and makes reasoning about page mapping flags easier. What if a compiler implements "page->mapping = mapping" in other places by, say, first assigning the odd bits of mapping, then adding in the even bits? Then we shall not build the kernel with such a compiler. Signed-off-by: Hugh Dickins Cc: Vladimir Davydov Cc: Vlastimil Babka Cc: Minchan Kim Cc: Yu Zhao Cc: Alex Shi --- mm/compaction.c | 7 --- mm/ksm.c| 2 +- mm/rmap.c | 7 ++- mm/util.c | 24 ++-- 4 files changed, 21 insertions(+), 19 deletions(-) diff --git a/mm/compaction.c b/mm/compaction.c index 952dc2fb24e5..c405f4362624 100644 --- a/mm/compaction.c +++ b/mm/compaction.c @@ -113,7 +113,8 @@ void __SetPageMovable(struct page *page, struct address_space *mapping) { VM_BUG_ON_PAGE(!PageLocked(page), page); VM_BUG_ON_PAGE((unsigned long)mapping & PAGE_MAPPING_MOVABLE, page); - page->mapping = (void *)((unsigned long)mapping | PAGE_MAPPING_MOVABLE); + WRITE_ONCE(page->mapping, + (unsigned long)mapping | PAGE_MAPPING_MOVABLE); } EXPORT_SYMBOL(__SetPageMovable); @@ -126,8 +127,8 @@ void __ClearPageMovable(struct page *page) * flag so that VM can catch up released page by driver after isolation. * With it, VM migration doesn't try to put it back. */ - page->mapping = (void *)((unsigned long)page->mapping & - PAGE_MAPPING_MOVABLE); + WRITE_ONCE(page->mapping, + (unsigned long)page->mapping & PAGE_MAPPING_MOVABLE); } EXPORT_SYMBOL(__ClearPageMovable); diff --git a/mm/ksm.c b/mm/ksm.c index 3dc4346411e4..426b6a40ea41 100644 --- a/mm/ksm.c +++ b/mm/ksm.c @@ -865,7 +865,7 @@ static inline struct stable_node *page_stable_node(struct page *page) static inline void set_page_stable_node(struct page *page, struct stable_node *stable_node) { - page->mapping = (void *)((unsigned long)stable_node | PAGE_MAPPING_KSM); + WRITE_ONCE(page->mapping, (unsigned long)stable_node | PAGE_MAPPING_KSM); } #ifdef CONFIG_SYSFS diff --git a/mm/rmap.c b/mm/rmap.c index 003377e24232..9480df437edc 100644 --- a/mm/rmap.c +++ b/mm/rmap.c @@ -1044,7 +1044,12 @@ static void __page_set_anon_rmap(struct page *page, anon_vma = anon_vma->root; anon_vma = (void *) anon_vma + PAGE_MAPPING_ANON; - page->mapping = (struct address_space *) anon_vma; + /* +* Ensure that anon_vma and the PAGE_MAPPING_ANON bit are written +* simultaneously, so a concurrent reader (eg page_referenced()'s +* PageAnon()) will not see one without the other. +*/ + WRITE_ONCE(page->mapping, (struct address_space *) anon_vma); page->index = linear_page_index(vma,
Re: [PATCH v8 17/18] scsi: megaraid_sas: Added support for shared host tagset for cpuhotplug
On Tue, Nov 10, 2020 at 11:12 PM John Garry wrote: > > On 09/11/2020 14:05, John Garry wrote: > > On 09/11/2020 13:39, Qian Cai wrote: > >>> I suppose I could try do this myself also, but an authentic version > >>> would be nicer. > >> The closest one I have here is: > >> https://cailca.coding.net/public/linux/mm/git/files/master/arm64.config > >> > >> but it only selects the Thunder X2 platform and needs to manually select > >> CONFIG_MEGARAID_SAS=m to start with, but none of arm64 systems here have > >> megaraid_sas. > > > > Thanks, I'm confident I can fix it up to get it going on my Huawei arm64 > > D06CS. > > > > So that board has a megaraid sas card. In addition, it also has hisi_sas > > HW, which is another storage controller which we enabled this same > > feature which is causing the problem. > > > > I'll report back when I can. > > So I had to hack that arm64 config a bit to get it booting: > https://github.com/hisilicon/kernel-dev/commits/private-topic-sas-5.10-megaraid-hang > > Boot is ok on my board without the megaraid sas card, but includes > hisi_sas HW (which enables the equivalent option which is exposing the > problem). > > But the board with the megaraid sas boots very slowly, specifically > around the megaraid sas probe: > > : ttyS0 at MMIO 0x3f2f8 (irq = 17, base_baud = 115200) is a 16550A > [ 50.023726][T1] printk: console [ttyS0] enabled > [ 50.412597][T1] megasas: 07.714.04.00-rc1 > [ 50.436614][T5] megaraid_sas :08:00.0: FW now in Ready state > [ 50.450079][T5] megaraid_sas :08:00.0: 63 bit DMA mask and 63 > bit consistent mask > [ 50.467811][T5] megaraid_sas :08:00.0: firmware supports msix > : (128) > [ 50.845995][T5] megaraid_sas :08:00.0: requested/available > msix 128/128 > [ 50.861476][T5] megaraid_sas :08:00.0: current msix/online > cpus : (128/128) > [ 50.877616][T5] megaraid_sas :08:00.0: RDPQ mode : (enabled) > [ 50.891018][T5] megaraid_sas :08:00.0: Current firmware > supports maximum commands: 4077 LDIO threshold: 0 > [ 51.262942][T5] megaraid_sas :08:00.0: Performance mode > :Latency (latency index = 1) > [ 51.280749][T5] megaraid_sas :08:00.0: FW supports sync cache > : Yes > [ 51.295451][T5] megaraid_sas :08:00.0: > megasas_disable_intr_fusion is called outbound_intr_mask:0x4009 > [ 51.387474][T5] megaraid_sas :08:00.0: FW provided > supportMaxExtLDs: 1 max_lds: 64 > [ 51.404931][T5] megaraid_sas :08:00.0: controller type > : MR(2048MB) > [ 51.419616][T5] megaraid_sas :08:00.0: Online Controller > Reset(OCR) : Enabled > [ 51.436132][T5] megaraid_sas :08:00.0: Secure JBOD support > : Yes > [ 51.450265][T5] megaraid_sas :08:00.0: NVMe passthru support > : Yes > [ 51.464757][T5] megaraid_sas :08:00.0: FW provided TM > TaskAbort/Reset timeout: 6 secs/60 secs > [ 51.484379][T5] megaraid_sas :08:00.0: JBOD sequence map > support : Yes > [ 51.499607][T5] megaraid_sas :08:00.0: PCI Lane Margining > support: No > [ 51.547610][T5] megaraid_sas :08:00.0: NVME page size > : (4096) > [ 51.608635][T5] megaraid_sas :08:00.0: > megasas_enable_intr_fusion is called outbound_intr_mask:0x4000 > [ 51.630285][T5] megaraid_sas :08:00.0: INIT adapter done > [ 51.649854][T5] megaraid_sas :08:00.0: pci id > : (0x1000)/(0x0016)/(0x19e5)/(0xd215) > [ 51.667873][T5] megaraid_sas :08:00.0: unevenspan support: no > [ 51.681646][T5] megaraid_sas :08:00.0: firmware crash dump : no > [ 51.695596][T5] megaraid_sas :08:00.0: JBOD sequence map > : enabled > [ 51.711521][T5] megaraid_sas :08:00.0: Max firmware commands: > 4076 shared with nr_hw_queues = 127 > [ 51.733056][T5] scsi host0: Avago SAS based MegaRAID driver > [ 65.304363][T5] scsi 0:0:0:0: Direct-Access ATA SAMSUNG > MZ7KH1T9 404Q PQ: 0 ANSI: 6 > [ 65.392401][T5] scsi 0:0:1:0: Direct-Access ATA SAMSUNG > MZ7KH1T9 404Q PQ: 0 ANSI: 6 > [ 79.508307][T5] scsi 0:0:65:0: Enclosure HUAWEI > Expander 12Gx16 131 PQ: 0 ANSI: 6 > [ 183.965109][ C14] random: fast init done > > Notice the 14 and 104 second delays. > > But does boot fully to get to the console. I'll wait for further issues, > which you guys seem to experience after a while. > > Thanks, > John "megaraid_sas" driver calls “scsi_scan_host()” to discover SCSI devices. In this failure case, scsi_scan_host() is taking a long time to complete, hence causing delay in system boot. With "host_tagset" enabled, scsi_scan_host() takes around 20 mins. With "host_tagset" disabled, scsi_scan_host() takes upto 5-8 mins. The scan time depends upon the number of scsi channels and devices per scsi channel is exposed by LLD. megaraid_sas driver exposes 4 channels and 128 drives per channel. Each target scan takes 2
RE: [PATCH] platform/x86: dell-privacy: Add support for new privacy driver
> -Original Message- > From: Hans de Goede > Sent: Monday, November 9, 2020 7:16 PM > To: Yuan, Perry; mgr...@linux.intel.com; mj...@srcf.ucam.org; > p...@kernel.org > Cc: linux-kernel@vger.kernel.org; platform-driver-...@vger.kernel.org; > Limonciello, Mario > Subject: Re: [PATCH] platform/x86: dell-privacy: Add support for new privacy > driver > > > [EXTERNAL EMAIL] > > Hi, > > On 11/3/20 1:55 PM, Perry Yuan wrote: > > From: perry_yuan > > > > add support for dell privacy driver for the dell units equipped > > hardware privacy design, which protect users privacy of audio and > > camera from hardware level. once the audio or camera privacy mode > > enabled, any applications will not get any audio or video stream. > > when user pressed ctrl+F4 hotkey, audio privacy mode will be enabled > > and camera mute hotkey is ctrl+F9. > > > > Signed-off-by: Perry Yuan > > Signed-off-by: Limonciello Mario > > Perry, you have had multiple comments and kernel-test-robot reports about > this patch. Please prepare a new version addressing these. > > Once you have send out a new version I will try to make some time to do a > full review soon(ish). > > Regards, > > Hans Hi Hans: I got some review feedback from Barnabás and Matthew,Mario. I am working on another new version and will submit v2 patch soon for your review. Thank you in advance. Perry > > > > --- > > drivers/platform/x86/Kconfig | 12 ++ > > drivers/platform/x86/Makefile| 4 +- > > drivers/platform/x86/dell-laptop.c | 41 ++-- > > drivers/platform/x86/dell-privacy-acpi.c | 139 > > drivers/platform/x86/dell-privacy-wmi.c | 259 +++ > > drivers/platform/x86/dell-privacy-wmi.h | 23 ++ > > drivers/platform/x86/dell-wmi.c | 90 > > 7 files changed, 513 insertions(+), 55 deletions(-) create mode > > 100644 drivers/platform/x86/dell-privacy-acpi.c > > create mode 100644 drivers/platform/x86/dell-privacy-wmi.c > > create mode 100644 drivers/platform/x86/dell-privacy-wmi.h > > > > diff --git a/drivers/platform/x86/Kconfig > > b/drivers/platform/x86/Kconfig index 40219bba6801..0cb6bf5a9565 > 100644 > > --- a/drivers/platform/x86/Kconfig > > +++ b/drivers/platform/x86/Kconfig > > @@ -454,6 +454,18 @@ config DELL_WMI_LED > > This adds support for the Latitude 2100 and similar > > notebooks that have an external LED. > > > > +config DELL_PRIVACY > > +tristate "Dell Hardware Privacy Support" > > +depends on ACPI > > +depends on ACPI_WMI > > +depends on INPUT > > +depends on DELL_LAPTOP > > +select DELL_WMI > > +help > > + This driver provides a driver to support messaging related to the > > + privacy button presses on applicable Dell laptops from 2021 and > > + newer. > > + > > config AMILO_RFKILL > > tristate "Fujitsu-Siemens Amilo rfkill support" > > depends on RFKILL > > diff --git a/drivers/platform/x86/Makefile > > b/drivers/platform/x86/Makefile index 5f823f7eff45..111f7215db2f > > 100644 > > --- a/drivers/platform/x86/Makefile > > +++ b/drivers/platform/x86/Makefile > > @@ -47,7 +47,9 @@ obj-$(CONFIG_DELL_WMI)+= > dell-wmi.o > > obj-$(CONFIG_DELL_WMI_DESCRIPTOR) += dell-wmi-descriptor.o > > obj-$(CONFIG_DELL_WMI_AIO) += dell-wmi-aio.o > > obj-$(CONFIG_DELL_WMI_LED) += dell-wmi-led.o > > - > > +obj-$(CONFIG_DELL_PRIVACY) += dell-privacy.o > > +dell-privacy-objs := dell-privacy-wmi.o \ > > + dell-privacy-acpi.o > > # Fujitsu > > obj-$(CONFIG_AMILO_RFKILL) += amilo-rfkill.o > > obj-$(CONFIG_FUJITSU_LAPTOP) += fujitsu-laptop.o > > diff --git a/drivers/platform/x86/dell-laptop.c > > b/drivers/platform/x86/dell-laptop.c > > index 5e9c2296931c..12b91de09356 100644 > > --- a/drivers/platform/x86/dell-laptop.c > > +++ b/drivers/platform/x86/dell-laptop.c > > @@ -30,6 +30,7 @@ > > #include > > #include "dell-rbtn.h" > > #include "dell-smbios.h" > > +#include "dell-privacy-wmi.h" > > > > struct quirk_entry { > > bool touchpad_led; > > @@ -90,6 +91,7 @@ static struct rfkill *wifi_rfkill; static struct > > rfkill *bluetooth_rfkill; static struct rfkill *wwan_rfkill; static > > bool force_rfkill; > > +static bool privacy_valid; > > > > module_param(force_rfkill, bool, 0444); > > MODULE_PARM_DESC(force_rfkill, "enable rfkill on non whitelisted > > models"); @@ -2202,20 +2204,25 @@ static int __init dell_init(void) > > debugfs_create_file("rfkill", 0444, dell_laptop_dir, NULL, > > _debugfs_fops); > > > > - dell_laptop_register_notifier(_laptop_notifier); > > - > > - if (dell_smbios_find_token(GLOBAL_MIC_MUTE_DISABLE) && > > - dell_smbios_find_token(GLOBAL_MIC_MUTE_ENABLE)) { > > - micmute_led_cdev.brightness = > ledtrig_audio_get(LED_AUDIO_MICMUTE); > > - ret =
Re: [PATCH] platform/x86: dell-privacy: Add support for new privacy driver
On Wed, Nov 11, 2020 at 07:21:07AM +, Yuan, Perry wrote: > > > +status = acpi_evaluate_object(NULL, ACPI_PRIVACY_EC_ACK, NULL, > > NULL); > > > +if (ACPI_FAILURE(status)) { > > > +dev_err(led_cdev->dev, "Error setting privacy audio EC ack > > value: %d\n",status); > > > +return -EIO; > > > +} > > > +return 0; > > > +} > > > > What's actually being set here? You don't seem to be passing any arguments. > > Yes, it is a EC ack notification without any arguments needed. I'm confused why it's being exposed as an LED device in that case - there's an expectation that this is something that actually controls a real LED, which means responding to state. Are you able to share the acpidump of a machine with this device? -- Matthew Garrett | mj...@srcf.ucam.org
[PATCH v8 01/22] perf arm-spe: Include bitops.h for BIT() macro
Include header linux/bitops.h, directly use its BIT() macro and remove the self defined macros. Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- tools/perf/util/arm-spe-decoder/arm-spe-decoder.c | 5 + tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 3 +-- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c index 93e063f22be5..cc18a1e8c212 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -21,10 +22,6 @@ #include "arm-spe-decoder.h" -#ifndef BIT -#define BIT(n) (1UL << (n)) -#endif - static u64 arm_spe_calc_ip(int index, u64 payload) { u8 *addr = (u8 *) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index b94001b756c7..46ddb53a6457 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -8,11 +8,10 @@ #include #include #include +#include #include "arm-spe-pkt-decoder.h" -#define BIT(n) (1ULL << (n)) - #define NS_FLAGBIT(63) #define EL_FLAG(BIT(62) | BIT(61)) -- 2.17.1
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Re: [RFC PATCH 3/9] cxl/mem: Add a driver for the type-3 mailbox
On Tue, Nov 10, 2020 at 09:43:50PM -0800, Ben Widawsky wrote: > +config CXL_MEM > +tristate "CXL.mem Device Support" > +depends on PCI && CXL_BUS_PROVIDER != n depend on PCI && CXL_BUS_PROVIDER > +default m if CXL_BUS_PROVIDER Please don't set weird defaults for new code. Especially not default to module crap like this. > +// Copyright(c) 2020 Intel Corporation. All rights reserved. Please don't use '//' for anything but the SPDX header. > + > + pci_read_config_word(pdev, pos + PCI_DVSEC_VENDOR_OFFSET, > ); > + pci_read_config_word(pdev, pos + PCI_DVSEC_ID_OFFSET, ); > + if (vendor == PCI_DVSEC_VENDOR_CXL && dvsec == id) > + return pos; > + > + pos = pci_find_next_ext_capability(pdev, pos, > PCI_EXT_CAP_ID_DVSEC); Overly long lines again. > +static void cxl_mem_remove(struct pci_dev *pdev) > +{ > +} No need for the empty remove callback. > +MODULE_AUTHOR("Intel Corporation"); A module author is not a company.
[PATCH v8 08/22] perf arm-spe: Refactor packet header parsing
The packet header parsing uses the hard coded values and it uses nested if-else statements. To improve the readability, this patch refactors the macros for packet header format so it removes the hard coded values. Furthermore, based on the new mask macros it reduces the nested if-else statements and changes to use the flat conditions checking, this is directive and can easily map to the descriptions in ARMv8-a architecture reference manual (ARM DDI 0487E.a), chapter 'D10.1.5 Statistical Profiling Extension protocol packet headers'. Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 92 +-- .../arm-spe-decoder/arm-spe-pkt-decoder.h | 20 2 files changed, 61 insertions(+), 51 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 424ff5862aa1..a43880e06547 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -16,28 +16,6 @@ #define NS_FLAGBIT(63) #define EL_FLAG(BIT(62) | BIT(61)) -#define SPE_HEADER0_PAD0x0 -#define SPE_HEADER0_END0x1 -#define SPE_HEADER0_ADDRESS0x30 /* address packet (short) */ -#define SPE_HEADER0_ADDRESS_MASK 0x38 -#define SPE_HEADER0_COUNTER0x18 /* counter packet (short) */ -#define SPE_HEADER0_COUNTER_MASK 0x38 -#define SPE_HEADER0_TIMESTAMP 0x71 -#define SPE_HEADER0_TIMESTAMP 0x71 -#define SPE_HEADER0_EVENTS 0x2 -#define SPE_HEADER0_EVENTS_MASK0xf -#define SPE_HEADER0_SOURCE 0x3 -#define SPE_HEADER0_SOURCE_MASK0xf -#define SPE_HEADER0_CONTEXT0x24 -#define SPE_HEADER0_CONTEXT_MASK 0x3c -#define SPE_HEADER0_OP_TYPE0x8 -#define SPE_HEADER0_OP_TYPE_MASK 0x3c -#define SPE_HEADER1_ALIGNMENT 0x0 -#define SPE_HEADER1_ADDRESS0xb0 /* address packet (extended) */ -#define SPE_HEADER1_ADDRESS_MASK 0xf8 -#define SPE_HEADER1_COUNTER0x98 /* counter packet (extended) */ -#define SPE_HEADER1_COUNTER_MASK 0xf8 - #if __BYTE_ORDER == __BIG_ENDIAN #define le16_to_cpu bswap_16 #define le32_to_cpu bswap_32 @@ -200,46 +178,58 @@ static int arm_spe_get_addr(const unsigned char *buf, size_t len, static int arm_spe_do_get_packet(const unsigned char *buf, size_t len, struct arm_spe_pkt *packet) { - unsigned int byte; + unsigned int hdr; + unsigned char ext_hdr = 0; memset(packet, 0, sizeof(struct arm_spe_pkt)); if (!len) return ARM_SPE_NEED_MORE_BYTES; - byte = buf[0]; - if (byte == SPE_HEADER0_PAD) + hdr = buf[0]; + + if (hdr == SPE_HEADER0_PAD) return arm_spe_get_pad(packet); - else if (byte == SPE_HEADER0_END) /* no timestamp at end of record */ + + if (hdr == SPE_HEADER0_END) /* no timestamp at end of record */ return arm_spe_get_end(packet); - else if (byte & 0xc0 /* 0y11xx */) { - if (byte & 0x80) { - if ((byte & SPE_HEADER0_ADDRESS_MASK) == SPE_HEADER0_ADDRESS) - return arm_spe_get_addr(buf, len, 0, packet); - if ((byte & SPE_HEADER0_COUNTER_MASK) == SPE_HEADER0_COUNTER) - return arm_spe_get_counter(buf, len, 0, packet); - } else - if (byte == SPE_HEADER0_TIMESTAMP) - return arm_spe_get_timestamp(buf, len, packet); - else if ((byte & SPE_HEADER0_EVENTS_MASK) == SPE_HEADER0_EVENTS) - return arm_spe_get_events(buf, len, packet); - else if ((byte & SPE_HEADER0_SOURCE_MASK) == SPE_HEADER0_SOURCE) - return arm_spe_get_data_source(buf, len, packet); - else if ((byte & SPE_HEADER0_CONTEXT_MASK) == SPE_HEADER0_CONTEXT) - return arm_spe_get_context(buf, len, packet); - else if ((byte & SPE_HEADER0_OP_TYPE_MASK) == SPE_HEADER0_OP_TYPE) - return arm_spe_get_op_type(buf, len, packet); - } else if ((byte & 0xe0) == 0x20 /* 0y001x */) { - /* 16-bit header */ - byte = buf[1]; - if (byte == SPE_HEADER1_ALIGNMENT) + + if (hdr == SPE_HEADER0_TIMESTAMP) + return arm_spe_get_timestamp(buf, len, packet); + + if ((hdr & SPE_HEADER0_MASK1) == SPE_HEADER0_EVENTS) + return arm_spe_get_events(buf, len, packet); + + if ((hdr & SPE_HEADER0_MASK1) == SPE_HEADER0_SOURCE) + return arm_spe_get_data_source(buf, len, packet); + + if ((hdr &
[PATCH v8 07/22] perf arm-spe: Consolidate arm_spe_pkt_desc()'s return value
arm_spe_pkt_desc() returns the length of consumed the buffer for the success case; otherwise, it delivers the return value from arm_spe_pkt_snprintf(), and returns the last return value if there have multiple calling arm_spe_pkt_snprintf(). Since arm_spe_pkt_snprintf() has the same semantics with vsnprintf() for the return value, and vsnprintf() might return value equals to or bigger than the parameter 'size' to indicate the truncation. Because the return value is >= 0 when the string is truncated, this condition will be returned up the stack as "success". This patch simplifies the return value for arm_spe_pkt_desc(): '0' means success and other values mean an error has occurred. To realize this, it relies on arm_spe_pkt_snprintf()'s parameter 'err', the 'err' is a cumulative value, returns its final value if printing buffer is called for one time or multiple times. To unify the error value generation, this patch handles error in a central place, rather than directly bailing out in switch-cases, it returns error at the end of arm_spe_pkt_desc(). This patch changes the caller arm_spe_dump() to respect the updated return value semantics of arm_spe_pkt_desc(). Suggested-by: Dave Martin Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 128 +- tools/perf/util/arm-spe.c | 2 +- 2 files changed, 68 insertions(+), 62 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 1970686f7020..424ff5862aa1 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -301,9 +301,10 @@ static int arm_spe_pkt_snprintf(int *err, char **buf_p, size_t *blen, int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, size_t buf_len) { - int ret, ns, el, idx = packet->index; + int ns, el, idx = packet->index; unsigned long long payload = packet->payload; const char *name = arm_spe_pkt_name(packet->type); + char *buf_orig = buf; size_t blen = buf_len; int err = 0; @@ -311,82 +312,76 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, case ARM_SPE_BAD: case ARM_SPE_PAD: case ARM_SPE_END: - return arm_spe_pkt_snprintf(, , , "%s", name); + arm_spe_pkt_snprintf(, , , "%s", name); + break; case ARM_SPE_EVENTS: - ret = arm_spe_pkt_snprintf(, , , "EV"); + arm_spe_pkt_snprintf(, , , "EV"); if (payload & 0x1) - ret = arm_spe_pkt_snprintf(, , , " EXCEPTION-GEN"); + arm_spe_pkt_snprintf(, , , " EXCEPTION-GEN"); if (payload & 0x2) - ret = arm_spe_pkt_snprintf(, , , " RETIRED"); + arm_spe_pkt_snprintf(, , , " RETIRED"); if (payload & 0x4) - ret = arm_spe_pkt_snprintf(, , , " L1D-ACCESS"); + arm_spe_pkt_snprintf(, , , " L1D-ACCESS"); if (payload & 0x8) - ret = arm_spe_pkt_snprintf(, , , " L1D-REFILL"); + arm_spe_pkt_snprintf(, , , " L1D-REFILL"); if (payload & 0x10) - ret = arm_spe_pkt_snprintf(, , , " TLB-ACCESS"); + arm_spe_pkt_snprintf(, , , " TLB-ACCESS"); if (payload & 0x20) - ret = arm_spe_pkt_snprintf(, , , " TLB-REFILL"); + arm_spe_pkt_snprintf(, , , " TLB-REFILL"); if (payload & 0x40) - ret = arm_spe_pkt_snprintf(, , , " NOT-TAKEN"); + arm_spe_pkt_snprintf(, , , " NOT-TAKEN"); if (payload & 0x80) - ret = arm_spe_pkt_snprintf(, , , " MISPRED"); + arm_spe_pkt_snprintf(, , , " MISPRED"); if (idx > 1) { if (payload & 0x100) - ret = arm_spe_pkt_snprintf(, , , " LLC-ACCESS"); + arm_spe_pkt_snprintf(, , , " LLC-ACCESS"); if (payload & 0x200) - ret = arm_spe_pkt_snprintf(, , , " LLC-REFILL"); + arm_spe_pkt_snprintf(, , , " LLC-REFILL"); if (payload & 0x400) - ret = arm_spe_pkt_snprintf(, , , " REMOTE-ACCESS"); + arm_spe_pkt_snprintf(, , , " REMOTE-ACCESS"); } - if (ret < 0) - return ret; - blen -= ret; - return buf_len - blen; + break; case ARM_SPE_OP_TYPE: switch (idx) { case 0: -
[PATCH v8 09/22] perf arm-spe: Add new function arm_spe_pkt_desc_addr()
This patch moves out the address parsing code from arm_spe_pkt_desc() and uses the new introduced function arm_spe_pkt_desc_addr() to process address packet. Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 64 +++ 1 file changed, 38 insertions(+), 26 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index a43880e06547..0aa15632e87b 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -288,10 +288,46 @@ static int arm_spe_pkt_snprintf(int *err, char **buf_p, size_t *blen, return ret; } +static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet, +char *buf, size_t buf_len) +{ + int ns, el, idx = packet->index; + u64 payload = packet->payload; + int err = 0; + + switch (idx) { + case 0: + case 1: + ns = !!(packet->payload & NS_FLAG); + el = (packet->payload & EL_FLAG) >> 61; + payload &= ~(0xffULL << 56); + arm_spe_pkt_snprintf(, , _len, + "%s 0x%llx el%d ns=%d", + (idx == 1) ? "TGT" : "PC", payload, el, ns); + break; + case 2: + arm_spe_pkt_snprintf(, , _len, +"VA 0x%llx", payload); + break; + case 3: + ns = !!(packet->payload & NS_FLAG); + payload &= ~(0xffULL << 56); + arm_spe_pkt_snprintf(, , _len, +"PA 0x%llx ns=%d", payload, ns); + break; + default: + /* Unknown index */ + err = -1; + break; + } + + return err; +} + int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, size_t buf_len) { - int ns, el, idx = packet->index; + int idx = packet->index; unsigned long long payload = packet->payload; const char *name = arm_spe_pkt_name(packet->type); char *buf_orig = buf; @@ -373,31 +409,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, arm_spe_pkt_snprintf(, , , "%s %lld", name, payload); break; case ARM_SPE_ADDRESS: - switch (idx) { - case 0: - case 1: - ns = !!(packet->payload & NS_FLAG); - el = (packet->payload & EL_FLAG) >> 61; - payload &= ~(0xffULL << 56); - arm_spe_pkt_snprintf(, , , - "%s 0x%llx el%d ns=%d", - (idx == 1) ? "TGT" : "PC", payload, el, ns); - break; - case 2: - arm_spe_pkt_snprintf(, , , -"VA 0x%llx", payload); - break; - case 3: - ns = !!(packet->payload & NS_FLAG); - payload &= ~(0xffULL << 56); - arm_spe_pkt_snprintf(, , , -"PA 0x%llx ns=%d", payload, ns); - break; - default: - /* Unknown index */ - err = -1; - break; - } + err = arm_spe_pkt_desc_addr(packet, buf, buf_len); break; case ARM_SPE_CONTEXT: arm_spe_pkt_snprintf(, , , "%s 0x%lx el%d", -- 2.17.1
Re: [PATCH 1/3] md: improve variable names in md_flush_request()
Hi Paul, > > This patch improves readability by using better variable names > > in flush request coalescing logic. > > Please do not indent the commit message. o.k > > > Signed-off-by: Pankaj Gupta > > --- > > drivers/md/md.c | 8 > > drivers/md/md.h | 6 +++--- > > 2 files changed, 7 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/md/md.c b/drivers/md/md.c > > index 98bac4f304ae..167c80f98533 100644 > > --- a/drivers/md/md.c > > +++ b/drivers/md/md.c > > @@ -639,7 +639,7 @@ static void md_submit_flush_data(struct work_struct *ws) > >* could wait for this and below md_handle_request could wait for > > those > >* bios because of suspend check > >*/ > > - mddev->last_flush = mddev->start_flush; > > + mddev->prev_flush_start = mddev->start_flush; > > mddev->flush_bio = NULL; > > wake_up(>sb_wait); > > > > @@ -660,13 +660,13 @@ static void md_submit_flush_data(struct work_struct > > *ws) > >*/ > > bool md_flush_request(struct mddev *mddev, struct bio *bio) > > { > > - ktime_t start = ktime_get_boottime(); > > + ktime_t req_start = ktime_get_boottime(); > > spin_lock_irq(>lock); > > wait_event_lock_irq(mddev->sb_wait, > > !mddev->flush_bio || > > - ktime_after(mddev->last_flush, start), > > + ktime_after(mddev->prev_flush_start, req_start), > > mddev->lock); > > - if (!ktime_after(mddev->last_flush, start)) { > > + if (!ktime_after(mddev->prev_flush_start, req_start)) { > > WARN_ON(mddev->flush_bio); > > mddev->flush_bio = bio; > > bio = NULL; > > diff --git a/drivers/md/md.h b/drivers/md/md.h > > index ccfb69868c2e..2292c847f9dd 100644 > > --- a/drivers/md/md.h > > +++ b/drivers/md/md.h > > @@ -495,9 +495,9 @@ struct mddev { > >*/ > > struct bio *flush_bio; > > atomic_t flush_pending; > > - ktime_t start_flush, last_flush; /* last_flush is when the last > > completed > > - * flush was started. > > - */ > > + ktime_t start_flush, prev_flush_start; /* prev_flush_start is when > > the previous completed > > + * flush was started. > > + */ > > With the new variable name, the comment could even be removed. ;-) > > > struct work_struct flush_work; > > struct work_struct event_work; /* used by dm to report failure event > > */ > > mempool_t *serial_info_pool; > > Reviewed-by: Paul Menzel Thanks, Pankaj > > > Kind regards, > > Paul
[PATCH v8 11/22] perf arm_spe: Fixup top byte for data virtual address
To establish a valid address from the address packet payload and finally the address value can be used for parsing data symbol in DSO, current code uses 0xff to replace the tag in the top byte of data virtual address. So far the code only fixups top byte for the memory layouts with 4KB pages, it misses to support memory layouts with 64KB pages. This patch adds the conditions for checking bits [55:52] are 0xf, if detects the pattern it will fill 0xff into the top byte of the address, also adds comment to explain the fixing up. Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../util/arm-spe-decoder/arm-spe-decoder.c| 20 --- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c index 776b3e6628bb..cac2ef79c025 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c @@ -24,7 +24,7 @@ static u64 arm_spe_calc_ip(int index, u64 payload) { - u64 ns, el; + u64 ns, el, val; /* Instruction virtual address or Branch target address */ if (index == SPE_ADDR_PKT_HDR_INDEX_INS || @@ -45,8 +45,22 @@ static u64 arm_spe_calc_ip(int index, u64 payload) /* Clean tags */ payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload); - /* Fill highest byte if bits [48..55] is 0xff */ - if (SPE_ADDR_PKT_ADDR_GET_BYTE_6(payload) == 0xffULL) + /* +* Armv8 ARM (ARM DDI 0487F.c), chapter "D10.2.1 Address packet" +* defines the data virtual address payload format, the top byte +* (bits [63:56]) is assigned as top-byte tag; so we only can +* retrieve address value from bits [55:0]. +* +* According to Documentation/arm64/memory.rst, if detects the +* specific pattern in bits [55:52] of payload which falls in +* the kernel space, should fixup the top byte and this allows +* perf tool to parse DSO symbol for data address correctly. +* +* For this reason, if detects the bits [55:52] is 0xf, will +* fill 0xff into the top byte. +*/ + val = SPE_ADDR_PKT_ADDR_GET_BYTE_6(payload); + if ((val & 0xf0ULL) == 0xf0ULL) payload |= 0xffULL << SPE_ADDR_PKT_ADDR_BYTE7_SHIFT; /* Data access physical address */ -- 2.17.1
[PATCH v3 net-next 00/13] Add ethtool ntuple filters support
This patch series adds support for ethtool ntuple filters, unicast address filtering, VLAN offload and SR-IOV ndo handlers. All of the above features are based on the Admin Function(AF) driver support to install and delete the low level MCAM entries. Each MCAM entry is programmed with the packet fields to match and what actions to take if the match succeeds. The PF driver requests AF driver to allocate set of MCAM entries to be used to install the flows by that PF. The entries will be freed when the PF driver is unloaded. * The patches 1 to 4 adds AF driver infrastructure to install and delete the low level MCAM flow entries. * Patch 5 adds ethtool ntuple filter support. * Patch 6 adds unicast MAC address filtering. * Patch 7 adds support for dumping the MCAM entries via debugfs. * Patches 8 to 10 adds support for VLAN offload. * Patch 10 to 11 adds support for SR-IOV ndo handlers. * Patch 12 adds support to read the MCAM entries. Misc: * Removed redundant mailbox NIX_RXVLAN_ALLOC. Change-log: v3: - Fixed Saeed's review comments on v2. - Fixed modifying the netdev->flags from driver. - Fixed modifying the netdev features and hw_features after register_netdev. - Removed unwanted ndo_features_check callback. v2: - Fixed the sparse issues reported by Jakub. Hariprasad Kelam (3): octeontx2-pf: Add support for unicast MAC address filtering octeontx2-pf: Implement ingress/egress VLAN offload octeontx2-af: Handle PF-VF mac address changes Naveen Mamindlapalli (2): octeontx2-pf: Add support for SR-IOV management functions octeontx2-af: Add new mbox messages to retrieve MCAM entries Stanislaw Kardach (1): octeontx2-af: Modify default KEX profile to extract TX packet fields Subbaraya Sundeep (6): octeontx2-af: Verify MCAM entry channel and PF_FUNC octeontx2-af: Generate key field bit mask from KEX profile octeontx2-af: Add mbox messages to install and delete MCAM rules octeontx2-pf: Add support for ethtool ntuple filters octeontx2-af: Add debugfs entry to dump the MCAM rules octeontx2-af: Delete NIX_RXVLAN_ALLOC mailbox message Vamsi Attunuru (1): octeontx2-af: Modify nix_vtag_cfg mailbox to support TX VTAG entries drivers/net/ethernet/marvell/octeontx2/af/Makefile |2 +- drivers/net/ethernet/marvell/octeontx2/af/common.h |2 + drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 170 ++- drivers/net/ethernet/marvell/octeontx2/af/npc.h| 106 +- .../ethernet/marvell/octeontx2/af/npc_profile.h| 71 +- drivers/net/ethernet/marvell/octeontx2/af/rvu.c| 16 +- drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 71 +- .../ethernet/marvell/octeontx2/af/rvu_debugfs.c| 197 +++ .../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 305 - .../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 462 ++- .../net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 1334 .../net/ethernet/marvell/octeontx2/af/rvu_struct.h | 11 + .../net/ethernet/marvell/octeontx2/nic/Makefile|2 +- .../ethernet/marvell/octeontx2/nic/otx2_common.c |8 +- .../ethernet/marvell/octeontx2/nic/otx2_common.h | 59 + .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 58 +- .../ethernet/marvell/octeontx2/nic/otx2_flows.c| 820 .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 307 - .../net/ethernet/marvell/octeontx2/nic/otx2_txrx.c | 16 + .../net/ethernet/marvell/octeontx2/nic/otx2_vf.c |5 + 20 files changed, 3862 insertions(+), 160 deletions(-) create mode 100644 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c create mode 100644 drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c -- 2.16.5
[PATCH v8 12/22] perf arm-spe: Refactor context packet handling
Minor refactoring to use macro for index mask. Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 2 +- tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 05d63e77f741..7b0f654e5cd6 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -136,7 +136,7 @@ static int arm_spe_get_context(const unsigned char *buf, size_t len, struct arm_spe_pkt *packet) { packet->type = ARM_SPE_CONTEXT; - packet->index = buf[0] & 0x3; + packet->index = SPE_CTX_PKT_HDR_INDEX(buf[0]); return arm_spe_get_payload(buf, len, 0, packet); } diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h index f97d6840be3a..9bc876bffd35 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h @@ -79,6 +79,9 @@ struct arm_spe_pkt { #define SPE_ADDR_PKT_EL2 2 #define SPE_ADDR_PKT_EL3 3 +/* Context packet header */ +#define SPE_CTX_PKT_HDR_INDEX(h) ((h) & GENMASK_ULL(1, 0)) + const char *arm_spe_pkt_name(enum arm_spe_pkt_type); int arm_spe_get_packet(const unsigned char *buf, size_t len, -- 2.17.1
[PATCH v8 16/22] perf arm-spe: Refactor event type handling
Move the enums of event types to arm-spe-pkt-decoder.h, thus function arm_spe_pkt_desc() can them for bitmasks. Suggested-by: Andre Przywara Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../util/arm-spe-decoder/arm-spe-decoder.h| 17 -- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 22 +-- .../arm-spe-decoder/arm-spe-pkt-decoder.h | 18 +++ 3 files changed, 29 insertions(+), 28 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h index a5111a8d4360..24727b8ca7ff 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h @@ -13,23 +13,6 @@ #include "arm-spe-pkt-decoder.h" -enum arm_spe_events { - EV_EXCEPTION_GEN= 0, - EV_RETIRED = 1, - EV_L1D_ACCESS = 2, - EV_L1D_REFILL = 3, - EV_TLB_ACCESS = 4, - EV_TLB_WALK = 5, - EV_NOT_TAKEN= 6, - EV_MISPRED = 7, - EV_LLC_ACCESS = 8, - EV_LLC_MISS = 9, - EV_REMOTE_ACCESS= 10, - EV_ALIGNMENT= 11, - EV_PARTIAL_PREDICATE= 17, - EV_EMPTY_PREDICATE = 18, -}; - enum arm_spe_sample_type { ARM_SPE_L1D_ACCESS = 1 << 0, ARM_SPE_L1D_MISS= 1 << 1, diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index af87d3c8cb50..2ebbd75d9b6a 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -295,28 +295,28 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet, arm_spe_pkt_snprintf(, , _len, "EV"); - if (payload & 0x1) + if (payload & BIT(EV_EXCEPTION_GEN)) arm_spe_pkt_snprintf(, , _len, " EXCEPTION-GEN"); - if (payload & 0x2) + if (payload & BIT(EV_RETIRED)) arm_spe_pkt_snprintf(, , _len, " RETIRED"); - if (payload & 0x4) + if (payload & BIT(EV_L1D_ACCESS)) arm_spe_pkt_snprintf(, , _len, " L1D-ACCESS"); - if (payload & 0x8) + if (payload & BIT(EV_L1D_REFILL)) arm_spe_pkt_snprintf(, , _len, " L1D-REFILL"); - if (payload & 0x10) + if (payload & BIT(EV_TLB_ACCESS)) arm_spe_pkt_snprintf(, , _len, " TLB-ACCESS"); - if (payload & 0x20) + if (payload & BIT(EV_TLB_WALK)) arm_spe_pkt_snprintf(, , _len, " TLB-REFILL"); - if (payload & 0x40) + if (payload & BIT(EV_NOT_TAKEN)) arm_spe_pkt_snprintf(, , _len, " NOT-TAKEN"); - if (payload & 0x80) + if (payload & BIT(EV_MISPRED)) arm_spe_pkt_snprintf(, , _len, " MISPRED"); if (packet->index > 1) { - if (payload & 0x100) + if (payload & BIT(EV_LLC_ACCESS)) arm_spe_pkt_snprintf(, , _len, " LLC-ACCESS"); - if (payload & 0x200) + if (payload & BIT(EV_LLC_MISS)) arm_spe_pkt_snprintf(, , _len, " LLC-REFILL"); - if (payload & 0x400) + if (payload & BIT(EV_REMOTE_ACCESS)) arm_spe_pkt_snprintf(, , _len, " REMOTE-ACCESS"); } diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h index 7d8e34e35f05..42ed4e61ede2 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h @@ -87,6 +87,24 @@ struct arm_spe_pkt { #define SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT0x1 #define SPE_CNT_PKT_HDR_INDEX_TRANS_LAT0x2 +/* Event packet payload */ +enum arm_spe_events { + EV_EXCEPTION_GEN= 0, + EV_RETIRED = 1, + EV_L1D_ACCESS = 2, + EV_L1D_REFILL = 3, + EV_TLB_ACCESS = 4, + EV_TLB_WALK = 5, + EV_NOT_TAKEN= 6, + EV_MISPRED = 7, + EV_LLC_ACCESS = 8, + EV_LLC_MISS = 9, + EV_REMOTE_ACCESS= 10, + EV_ALIGNMENT= 11, + EV_PARTIAL_PREDICATE= 17, + EV_EMPTY_PREDICATE = 18, +}; + const char *arm_spe_pkt_name(enum arm_spe_pkt_type); int arm_spe_get_packet(const unsigned char *buf, size_t len, -- 2.17.1
[PATCH v8 14/22] perf arm-spe: Refactor counter packet handling
This patch defines macros for counter packet header, and uses macros to replace hard code values in functions arm_spe_get_counter() and arm_spe_pkt_desc(). In the function arm_spe_get_counter(), adds a new line for more readable. Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 11 ++- tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h | 5 + 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index e8c9da1d4280..5178bbe64422 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -152,10 +152,11 @@ static int arm_spe_get_counter(const unsigned char *buf, size_t len, const unsigned char ext_hdr, struct arm_spe_pkt *packet) { packet->type = ARM_SPE_COUNTER; + if (ext_hdr) - packet->index = ((buf[0] & 0x3) << 3) | (buf[1] & 0x7); + packet->index = SPE_HDR_EXTENDED_INDEX(buf[0], buf[1]); else - packet->index = buf[0] & 0x7; + packet->index = SPE_HDR_SHORT_INDEX(buf[0]); return arm_spe_get_payload(buf, len, ext_hdr, packet); } @@ -333,13 +334,13 @@ static int arm_spe_pkt_desc_counter(const struct arm_spe_pkt *packet, (unsigned short)payload); switch (packet->index) { - case 0: + case SPE_CNT_PKT_HDR_INDEX_TOTAL_LAT: arm_spe_pkt_snprintf(, , _len, "TOT"); break; - case 1: + case SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT: arm_spe_pkt_snprintf(, , _len, "ISSUE"); break; - case 2: + case SPE_CNT_PKT_HDR_INDEX_TRANS_LAT: arm_spe_pkt_snprintf(, , _len, "XLAT"); break; default: diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h index 9bc876bffd35..7d8e34e35f05 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h @@ -82,6 +82,11 @@ struct arm_spe_pkt { /* Context packet header */ #define SPE_CTX_PKT_HDR_INDEX(h) ((h) & GENMASK_ULL(1, 0)) +/* Counter packet header */ +#define SPE_CNT_PKT_HDR_INDEX_TOTAL_LAT0x0 +#define SPE_CNT_PKT_HDR_INDEX_ISSUE_LAT0x1 +#define SPE_CNT_PKT_HDR_INDEX_TRANS_LAT0x2 + const char *arm_spe_pkt_name(enum arm_spe_pkt_type); int arm_spe_get_packet(const unsigned char *buf, size_t len, -- 2.17.1
[PATCH v8 13/22] perf arm-spe: Add new function arm_spe_pkt_desc_counter()
This patch moves out the counter packet parsing code from arm_spe_pkt_desc() to the new function arm_spe_pkt_desc_counter(). Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 43 --- 1 file changed, 28 insertions(+), 15 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 7b0f654e5cd6..e8c9da1d4280 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -322,6 +322,33 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet, return err; } +static int arm_spe_pkt_desc_counter(const struct arm_spe_pkt *packet, + char *buf, size_t buf_len) +{ + u64 payload = packet->payload; + const char *name = arm_spe_pkt_name(packet->type); + int err = 0; + + arm_spe_pkt_snprintf(, , _len, "%s %d ", name, +(unsigned short)payload); + + switch (packet->index) { + case 0: + arm_spe_pkt_snprintf(, , _len, "TOT"); + break; + case 1: + arm_spe_pkt_snprintf(, , _len, "ISSUE"); + break; + case 2: + arm_spe_pkt_snprintf(, , _len, "XLAT"); + break; + default: + break; + } + + return err; +} + int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, size_t buf_len) { @@ -414,21 +441,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, name, (unsigned long)payload, idx + 1); break; case ARM_SPE_COUNTER: - arm_spe_pkt_snprintf(, , , "%s %d ", name, -(unsigned short)payload); - switch (idx) { - case 0: - arm_spe_pkt_snprintf(, , , "TOT"); - break; - case 1: - arm_spe_pkt_snprintf(, , , "ISSUE"); - break; - case 2: - arm_spe_pkt_snprintf(, , , "XLAT"); - break; - default: - break; - } + err = arm_spe_pkt_desc_counter(packet, buf, buf_len); break; default: /* Unknown index */ -- 2.17.1
[PATCH v8 15/22] perf arm-spe: Add new function arm_spe_pkt_desc_event()
This patch moves out the event packet parsing from arm_spe_pkt_desc() to the new function arm_spe_pkt_desc_event(). Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 63 +++ 1 file changed, 37 insertions(+), 26 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 5178bbe64422..af87d3c8cb50 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -287,6 +287,42 @@ static int arm_spe_pkt_snprintf(int *err, char **buf_p, size_t *blen, return ret; } +static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet, + char *buf, size_t buf_len) +{ + u64 payload = packet->payload; + int err = 0; + + arm_spe_pkt_snprintf(, , _len, "EV"); + + if (payload & 0x1) + arm_spe_pkt_snprintf(, , _len, " EXCEPTION-GEN"); + if (payload & 0x2) + arm_spe_pkt_snprintf(, , _len, " RETIRED"); + if (payload & 0x4) + arm_spe_pkt_snprintf(, , _len, " L1D-ACCESS"); + if (payload & 0x8) + arm_spe_pkt_snprintf(, , _len, " L1D-REFILL"); + if (payload & 0x10) + arm_spe_pkt_snprintf(, , _len, " TLB-ACCESS"); + if (payload & 0x20) + arm_spe_pkt_snprintf(, , _len, " TLB-REFILL"); + if (payload & 0x40) + arm_spe_pkt_snprintf(, , _len, " NOT-TAKEN"); + if (payload & 0x80) + arm_spe_pkt_snprintf(, , _len, " MISPRED"); + if (packet->index > 1) { + if (payload & 0x100) + arm_spe_pkt_snprintf(, , _len, " LLC-ACCESS"); + if (payload & 0x200) + arm_spe_pkt_snprintf(, , _len, " LLC-REFILL"); + if (payload & 0x400) + arm_spe_pkt_snprintf(, , _len, " REMOTE-ACCESS"); + } + + return err; +} + static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet, char *buf, size_t buf_len) { @@ -367,32 +403,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, arm_spe_pkt_snprintf(, , , "%s", name); break; case ARM_SPE_EVENTS: - arm_spe_pkt_snprintf(, , , "EV"); - - if (payload & 0x1) - arm_spe_pkt_snprintf(, , , " EXCEPTION-GEN"); - if (payload & 0x2) - arm_spe_pkt_snprintf(, , , " RETIRED"); - if (payload & 0x4) - arm_spe_pkt_snprintf(, , , " L1D-ACCESS"); - if (payload & 0x8) - arm_spe_pkt_snprintf(, , , " L1D-REFILL"); - if (payload & 0x10) - arm_spe_pkt_snprintf(, , , " TLB-ACCESS"); - if (payload & 0x20) - arm_spe_pkt_snprintf(, , , " TLB-REFILL"); - if (payload & 0x40) - arm_spe_pkt_snprintf(, , , " NOT-TAKEN"); - if (payload & 0x80) - arm_spe_pkt_snprintf(, , , " MISPRED"); - if (idx > 1) { - if (payload & 0x100) - arm_spe_pkt_snprintf(, , , " LLC-ACCESS"); - if (payload & 0x200) - arm_spe_pkt_snprintf(, , , " LLC-REFILL"); - if (payload & 0x400) - arm_spe_pkt_snprintf(, , , " REMOTE-ACCESS"); - } + err = arm_spe_pkt_desc_event(packet, buf, buf_len); break; case ARM_SPE_OP_TYPE: switch (idx) { -- 2.17.1
Re: linux-next: Fixes tag needs some work in the omap-fixes tree
* Stephen Rothwell [201110 21:16]: > Hi all, > > In commit > > e4b5575da267 ("ARM: OMAP2+: Manage MPU state properly for > omap_enter_idle_coupled()") > > Fixes tag > > Fixes: 8ca5ee624b4c ("ARM: OMAP2+: Restore MPU power domain if > cpu_cluster_pm_enter() fails") > > has these problem(s): > > - Target SHA1 does not exist > > Maybe you meeant > > Fixes: 8f04aea048d5 ("ARM: OMAP2+: Restore MPU power domain if > cpu_cluster_pm_enter() fails") Thanks for catching it, will fix! Tony
RE: [PATCH] platform/x86: dell-privacy: Add support for new privacy driver
> -Original Message- > From: Matthew Garrett > Sent: Wednesday, November 4, 2020 9:49 AM > To: Yuan, Perry > Cc: hdego...@redhat.com; mgr...@linux.intel.com; p...@kernel.org; linux- > ker...@vger.kernel.org; platform-driver-...@vger.kernel.org; Limonciello, > Mario > Subject: Re: [PATCH] platform/x86: dell-privacy: Add support for new privacy > driver > > > [EXTERNAL EMAIL] > > On Tue, Nov 03, 2020 at 04:55:42AM -0800, Perry Yuan wrote: > > > +#define PRIVACY_PlATFORM_NAME "dell-privacy-acpi" > > +#define ACPI_PRIVACY_DEVICE"\\_SB.PC00.LPCB.ECDV" > > This looks like the EC rather than a privacy device? If so, you probably want > to collaborate with the EC driver to obtain the handle rather than depending > on the path, unless it's guaranteed that this path will never change. Thanks Matthew I will change the path to handle as you suggested. > > > +static int micmute_led_set(struct led_classdev *led_cdev, > > + enum led_brightness brightness) { > > +acpi_status status; > > + > > +status = acpi_evaluate_object(NULL, ACPI_PRIVACY_EC_ACK, NULL, > NULL); > > +if (ACPI_FAILURE(status)) { > > +dev_err(led_cdev->dev, "Error setting privacy audio EC ack > value: %d\n",status); > > +return -EIO; > > +} > > +return 0; > > +} > > What's actually being set here? You don't seem to be passing any arguments. Yes, it is a EC ack notification without any arguments needed. > > > +static const struct acpi_device_id privacy_acpi_device_ids[] = { > > +{"PNP0C09", 0}, > > Oooh no please don't do this - you'll trigger autoloading on everything that > exposes a PNP0C09 device. Got it , I need to adjust the driver register logic. In drivers/platform/x86/dell-privacy-wmi.c . The privacy acpi driver will be loaded by privacy wmi driver. The privacy wmi driver need to check if the privacy device is present. It can avoid loading driver on non-dell-privacy system. +static const struct wmi_device_id dell_wmi_privacy_wmi_id_table[] = { +{ .guid_string = DELL_PRIVACY_GUID }, +{ }, > > -- > Matthew Garrett | mj...@srcf.ucam.org
Re: [PATCH] drm/panel: add missing platform_driver_unregister() on error path
Hi Yang, On Wed, Nov 11, 2020 at 02:44:25PM +0800, Yang Yingliang wrote: > If mipi_dsi_driver_register() failed, platform_driver_unregister() > need be called. > > Fixes: 210fcd9d9cf1 ("drm/panel: Add support for Panasonic VVX10F004B0") > Reported-by: Hulk Robot > Signed-off-by: Yang Yingliang Thanks for the patch but this is already fixed in drm-misx-next. See: commit f2e66f212a9de04afc2caa5ec79057c0ac75c728 drm: panel: simple: add missing platform_driver_unregister() in panel_simple_init Sam
RE: [PATCH v4 06/17] PCI: add SIOV and IMS capability detection
> From: Raj, Ashok > Sent: Tuesday, November 10, 2020 10:13 PM > > Thomas, > > With all these interrupt message storms ;-), I'm missing how to move > towards > an end goal. > > On Tue, Nov 10, 2020 at 11:27:29AM +0100, Thomas Gleixner wrote: > > Ashok, > > > > On Mon, Nov 09 2020 at 21:14, Ashok Raj wrote: > > > On Mon, Nov 09, 2020 at 11:42:29PM +0100, Thomas Gleixner wrote: > > >> On Mon, Nov 09 2020 at 13:30, Jason Gunthorpe wrote: > > > Approach to IMS is more of a phased approach. > > > > > > #1 Allow physical device to scale beyond limits of PCIe MSIx > > >Follows current methodology for guest interrupt programming and > > >evolutionary changes rather than drastic. > > > > Trapping MSI[X] writes is there because it allows to hand a device to an > > unmodified guest OS and to handle the case where the MSI[X] entries > > storage cannot be mapped exclusively to the guest. > > > > But aside of this, it's not required if the storage can be mapped > > exclusively, the guest is hypervisor aware and can get a host composed > > message via a hypercall. That works for physical functions and SRIOV, > > but not for SIOV. > > It would greatly help if you can put down what you see is blocking > to move forward in the following areas. > Agree. We really need some guidance on how to move forward. I think all people in this thread are aligned now that it's not Intel or IDXD specific thing, e.g. need architectural solution, enabling IMS on PF/VF is important, etc. But what we are not sure is whether we need complete all requirements in one batch, or could evolve step-by-step as long as the growing path is clearly defined. IMHO finding a way to disable IMS in guest is more important than supporting IMS on PF/VF, since the latter requires hypercall which is not always available in all scenarios. Even if Linux includes hypercall support for all existing archs and hypervisors, it could run as an unmodified guest on a new hypervisor before this hypervisor gets its enlightenments into the Linux. So it is more prominent to find a way to force using MSI/MSI-x inside guest, as it allows such PFs/VFs still functional though not benefiting all scalability merits of IMS. If such two-step plans can be agreed, then the next open is about how to disable IMS in guest. We need a sane solution when checking in the initial host-only-IMS support. There are several options discussed in this thread: 1. Industry standard (e.g. a vendor-agnostic ACPI flag) followed by all platforms, hypervisors and OSes. It will require collaboration beyond Linux community; 2. IOMMU-vendor specific standards (DMAR, IORT, etc.) to report whether IMS is allowed, implying that IMS is tied to the IOMMU. This tradeoff is acceptable since IMS alone cannot make SIOV working which relies on the IOMMU anyway. and this might be an easier path to move forward and even not require to wait for all vendors to extend their tables together. On physical platform the FW always reports IMS as 'allowed' and there is time to change it. On virtual platform the hypervisor can choose to hide IMS in three ways: a) do not expose IOMMU b) expose IOMMU, but using the old format c) expose IOMMU, using the new format with IMS reported 'disallowed' a/b can well support legacy software stack. However, there is one potential issue with option 1/2. The construction of the virtual ACPI table is at VM creation time, likely based on whether a PV interrupt controller is exposed to this guest. However, in most cases the hypervisor doesn't know which guest OS is running and whether it will use the PV controller when the VM is being created. If IMS is marked as 'allowed' in the virtual DMAR table, an unmodified guest might just go to enable it as if it's on the native platform. Maybe what we really required is a flag to tell the guest that although IMS is available you cannot use it with traditional interrupt controllers? 3. Use IOMMU 'caching mode' as the hint of running as guest and disable IMS by default as long as 'caching mode' is detected. iirc all IOMMU vendors provide such capability for constructing shadow IOMMU page table. Later when hypercall support is detected for a specific hypervisor/arch, that path can override the IOMMU hint to enable IMS. Unlike the first two options, this will be a Linux-specific policy but self contained. Other guest OSes may not follow this way though. 4. Using CPUID to detect running as guest. But as Thomas pointed out, this approach is less reliable as not all hypervisors do this way. Thoughts? Thanks Kevin
[PATCH v3 net-next 05/13] octeontx2-pf: Add support for ethtool ntuple filters
From: Subbaraya Sundeep This patch adds support for adding and deleting ethtool ntuple filters. The filters for ether, ipv4, ipv6, tcp, udp and sctp are supported. The mask is also supported. The supported actions are drop and direct to a queue. Additionally we support FLOW_EXT field vlan_tci and FLOW_MAC_EXT. The NIX PF will allocate total 32 MCAM entries for the use of ethtool ntuple filters. The Administrative Function(AF) will install/delete the MCAM rules when NIX PF sends mailbox message to install/delete the ntuple filters. Ethtool ntuple filters support is restricted to PFs as of now and PF can install ntuple filters to direct the traffic to its VFs. Hence added a separate callback for VFs to get/set RSS configuration. Signed-off-by: Subbaraya Sundeep Signed-off-by: Sunil Goutham Signed-off-by: Naveen Mamindlapalli --- .../net/ethernet/marvell/octeontx2/nic/Makefile| 2 +- .../ethernet/marvell/octeontx2/nic/otx2_common.h | 31 ++ .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 58 +- .../ethernet/marvell/octeontx2/nic/otx2_flows.c| 603 + .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 18 +- 5 files changed, 707 insertions(+), 5 deletions(-) create mode 100644 drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/Makefile b/drivers/net/ethernet/marvell/octeontx2/nic/Makefile index b2c6385707c9..4193ae3bde6b 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/Makefile +++ b/drivers/net/ethernet/marvell/octeontx2/nic/Makefile @@ -7,7 +7,7 @@ obj-$(CONFIG_OCTEONTX2_PF) += octeontx2_nicpf.o obj-$(CONFIG_OCTEONTX2_VF) += octeontx2_nicvf.o octeontx2_nicpf-y := otx2_pf.o otx2_common.o otx2_txrx.o otx2_ethtool.o \ -otx2_ptp.o +otx2_ptp.o otx2_flows.o octeontx2_nicvf-y := otx2_vf.o ccflags-y += -I$(srctree)/drivers/net/ethernet/marvell/octeontx2/af diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h index 386cb08497e4..2387c40a2a8f 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h @@ -18,6 +18,7 @@ #include #include +#include #include "otx2_reg.h" #include "otx2_txrx.h" #include @@ -228,6 +229,16 @@ struct otx2_ptp { #define OTX2_HW_TIMESTAMP_LEN 8 +struct otx2_flow_config { + u16 entry[NPC_MAX_NONCONTIG_ENTRIES]; + u32 nr_flows; +#define OTX2_MAX_NTUPLE_FLOWS 32 +#define OTX2_MCAM_COUNTOTX2_MAX_NTUPLE_FLOWS + u32 ntuple_offset; + u32 ntuple_max_flows; + struct list_headflow_list; +}; + struct otx2_nic { void __iomem*reg_base; struct net_device *netdev; @@ -238,6 +249,8 @@ struct otx2_nic { #define OTX2_FLAG_RX_TSTAMP_ENABLEDBIT_ULL(0) #define OTX2_FLAG_TX_TSTAMP_ENABLEDBIT_ULL(1) #define OTX2_FLAG_INTF_DOWNBIT_ULL(2) +#define OTX2_FLAG_MCAM_ENTRIES_ALLOC BIT_ULL(3) +#define OTX2_FLAG_NTUPLE_SUPPORT BIT_ULL(4) #define OTX2_FLAG_RX_PAUSE_ENABLED BIT_ULL(9) #define OTX2_FLAG_TX_PAUSE_ENABLED BIT_ULL(10) u64 flags; @@ -275,6 +288,8 @@ struct otx2_nic { struct otx2_ptp *ptp; struct hwtstamp_config tstamp; + + struct otx2_flow_config *flow_cfg; }; static inline bool is_otx2_lbkvf(struct pci_dev *pdev) @@ -644,4 +659,20 @@ int otx2_open(struct net_device *netdev); int otx2_stop(struct net_device *netdev); int otx2_set_real_num_queues(struct net_device *netdev, int tx_queues, int rx_queues); +/* MCAM filter related APIs */ +int otx2_mcam_flow_init(struct otx2_nic *pf); +int otx2_alloc_mcam_entries(struct otx2_nic *pfvf); +void otx2_mcam_flow_del(struct otx2_nic *pf); +int otx2_destroy_ntuple_flows(struct otx2_nic *pf); +int otx2_destroy_mcam_flows(struct otx2_nic *pfvf); +int otx2_get_flow(struct otx2_nic *pfvf, + struct ethtool_rxnfc *nfc, u32 location); +int otx2_get_all_flows(struct otx2_nic *pfvf, + struct ethtool_rxnfc *nfc, u32 *rule_locs); +int otx2_add_flow(struct otx2_nic *pfvf, + struct ethtool_rx_flow_spec *fsp); +int otx2_remove_flow(struct otx2_nic *pfvf, u32 location); +int otx2_prepare_flow_request(struct ethtool_rx_flow_spec *fsp, + struct npc_install_flow_req *req); + #endif /* OTX2_COMMON_H */ diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c index 662fb80dbb9d..67171b66a56c 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c @@ -551,6 +551,16 @@ static int
[PATCH v3 net-next 01/13] octeontx2-af: Modify default KEX profile to extract TX packet fields
From: Stanislaw Kardach The current default Key Extraction(KEX) profile can only use RX packet fields while generating the MCAM search key. The profile can't be used for matching TX packet fields. This patch modifies the default KEX profile to add support for extracting TX packet fields into MCAM search key. Enabled Tx KPU packet parsing by configuring TX PKIND in tx_parse_cfg. Also modified the default KEX profile to extract VLAN TCI from the LB_PTR and exact byte offset of VLAN header. The NPC KPU parser was modified to point LB_PTR to the starting byte offset of VLAN header which points to the tpid field. Signed-off-by: Stanislaw Kardach Signed-off-by: Sunil Goutham Signed-off-by: Naveen Mamindlapalli --- .../ethernet/marvell/octeontx2/af/npc_profile.h| 71 -- .../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 6 ++ 2 files changed, 72 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h b/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h index 199448610e3e..c5b13385c81d 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h @@ -13386,8 +13386,8 @@ static struct npc_mcam_kex npc_mkex_default = { .kpu_version = NPC_KPU_PROFILE_VER, .keyx_cfg = { /* nibble: LA..LE (ltype only) + Channel */ - [NIX_INTF_RX] = ((u64)NPC_MCAM_KEY_X2 << 32) | 0x49247, - [NIX_INTF_TX] = ((u64)NPC_MCAM_KEY_X2 << 32) | ((1ULL << 19) - 1), + [NIX_INTF_RX] = ((u64)NPC_MCAM_KEY_X2 << 32) | 0x249207, + [NIX_INTF_TX] = ((u64)NPC_MCAM_KEY_X2 << 32) | 0x249200, }, .intf_lid_lt_ld = { /* Default RX MCAM KEX profile */ @@ -13405,12 +13405,14 @@ static struct npc_mcam_kex npc_mkex_default = { /* Layer B: Single VLAN (CTAG) */ /* CTAG VLAN[2..3] + Ethertype, 4 bytes, KW0[63:32] */ [NPC_LT_LB_CTAG] = { - KEX_LD_CFG(0x03, 0x0, 0x1, 0x0, 0x4), + KEX_LD_CFG(0x03, 0x2, 0x1, 0x0, 0x4), }, /* Layer B: Stacked VLAN (STAG|QinQ) */ [NPC_LT_LB_STAG_QINQ] = { - /* CTAG VLAN[2..3] + Ethertype, 4 bytes, KW0[63:32] */ - KEX_LD_CFG(0x03, 0x4, 0x1, 0x0, 0x4), + /* Outer VLAN: 2 bytes, KW0[63:48] */ + KEX_LD_CFG(0x01, 0x2, 0x1, 0x0, 0x6), + /* Ethertype: 2 bytes, KW0[47:32] */ + KEX_LD_CFG(0x01, 0x8, 0x1, 0x0, 0x4), }, [NPC_LT_LB_FDSA] = { /* SWITCH PORT: 1 byte, KW0[63:48] */ @@ -13450,6 +13452,65 @@ static struct npc_mcam_kex npc_mkex_default = { }, }, }, + + /* Default TX MCAM KEX profile */ + [NIX_INTF_TX] = { + [NPC_LID_LA] = { + /* Layer A: Ethernet: */ + [NPC_LT_LA_IH_NIX_ETHER] = { + /* PF_FUNC: 2B , KW0 [47:32] */ + KEX_LD_CFG(0x01, 0x0, 0x1, 0x0, 0x4), + /* DMAC: 6 bytes, KW1[63:16] */ + KEX_LD_CFG(0x05, 0x8, 0x1, 0x0, 0xa), + }, + }, + [NPC_LID_LB] = { + /* Layer B: Single VLAN (CTAG) */ + [NPC_LT_LB_CTAG] = { + /* CTAG VLAN[2..3] KW0[63:48] */ + KEX_LD_CFG(0x01, 0x2, 0x1, 0x0, 0x6), + /* CTAG VLAN[2..3] KW1[15:0] */ + KEX_LD_CFG(0x01, 0x4, 0x1, 0x0, 0x8), + }, + /* Layer B: Stacked VLAN (STAG|QinQ) */ + [NPC_LT_LB_STAG_QINQ] = { + /* Outer VLAN: 2 bytes, KW0[63:48] */ + KEX_LD_CFG(0x01, 0x2, 0x1, 0x0, 0x6), + /* Outer VLAN: 2 Bytes, KW1[15:0] */ + KEX_LD_CFG(0x01, 0x8, 0x1, 0x0, 0x8), + }, + }, + [NPC_LID_LC] = { + /* Layer C: IPv4 */ + [NPC_LT_LC_IP] = { + /* SIP+DIP: 8 bytes, KW2[63:0] */ + KEX_LD_CFG(0x07, 0xc, 0x1, 0x0, 0x10), + /* TOS: 1 byte, KW1[63:56] */ + KEX_LD_CFG(0x0, 0x1, 0x1, 0x0, 0xf), + }, + /* Layer C: IPv6 */ + [NPC_LT_LC_IP6] = { + /* Everything up to SADDR: 8 bytes,
[PATCH v3 net-next 03/13] octeontx2-af: Generate key field bit mask from KEX profile
From: Subbaraya Sundeep Key Extraction(KEX) profile decides how the packet metadata such as layer information and selected packet data bytes at each layer are placed in MCAM search key. This patch reads the configured KEX profile parameters to find out the bit position and bit mask for each field. The information is used when programming the MCAM match data by SW to match a packet flow and take appropriate action on the flow. This patch also verifies the mandatory fields such as channel and DMAC are not overwritten by the KEX configuration of other fields. Signed-off-by: Subbaraya Sundeep Signed-off-by: Sunil Goutham Signed-off-by: Naveen Mamindlapalli --- drivers/net/ethernet/marvell/octeontx2/af/Makefile | 2 +- drivers/net/ethernet/marvell/octeontx2/af/npc.h| 48 ++ drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 38 ++ .../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 11 +- .../net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 562 + 5 files changed, 658 insertions(+), 3 deletions(-) create mode 100644 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c diff --git a/drivers/net/ethernet/marvell/octeontx2/af/Makefile b/drivers/net/ethernet/marvell/octeontx2/af/Makefile index 2f7a861d0c7b..ffc681b67f1c 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/Makefile +++ b/drivers/net/ethernet/marvell/octeontx2/af/Makefile @@ -9,4 +9,4 @@ obj-$(CONFIG_OCTEONTX2_AF) += octeontx2_af.o octeontx2_mbox-y := mbox.o rvu_trace.o octeontx2_af-y := cgx.o rvu.o rvu_cgx.o rvu_npa.o rvu_nix.o \ - rvu_reg.o rvu_npc.o rvu_debugfs.o ptp.o + rvu_reg.o rvu_npc.o rvu_debugfs.o ptp.o rvu_npc_fs.o diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc.h b/drivers/net/ethernet/marvell/octeontx2/af/npc.h index 91a9d00e4fb5..0fe47216f771 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/npc.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/npc.h @@ -140,6 +140,54 @@ enum npc_kpu_lh_ltype { NPC_LT_LH_CUSTOM1 = 0xF, }; +/* list of known and supported fields in packet header and + * fields present in key structure. + */ +enum key_fields { + NPC_DMAC, + NPC_SMAC, + NPC_ETYPE, + NPC_OUTER_VID, + NPC_TOS, + NPC_SIP_IPV4, + NPC_DIP_IPV4, + NPC_SIP_IPV6, + NPC_DIP_IPV6, + NPC_SPORT_TCP, + NPC_DPORT_TCP, + NPC_SPORT_UDP, + NPC_DPORT_UDP, + NPC_SPORT_SCTP, + NPC_DPORT_SCTP, + NPC_HEADER_FIELDS_MAX, + NPC_CHAN = NPC_HEADER_FIELDS_MAX, /* Valid when Rx */ + NPC_PF_FUNC, /* Valid when Tx */ + NPC_ERRLEV, + NPC_ERRCODE, + NPC_LXMB, + NPC_LA, + NPC_LB, + NPC_LC, + NPC_LD, + NPC_LE, + NPC_LF, + NPC_LG, + NPC_LH, + /* ether type for untagged frame */ + NPC_ETYPE_ETHER, + /* ether type for single tagged frame */ + NPC_ETYPE_TAG1, + /* ether type for double tagged frame */ + NPC_ETYPE_TAG2, + /* outer vlan tci for single tagged frame */ + NPC_VLAN_TAG1, + /* outer vlan tci for double tagged frame */ + NPC_VLAN_TAG2, + /* other header fields programmed to extract but not of our interest */ + NPC_UNKNOWN, + NPC_KEY_FIELDS_MAX, +}; + struct npc_kpu_profile_cam { u8 state; u8 state_mask; diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h index 1724dbd18847..7e556c7b6ccf 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h @@ -15,6 +15,7 @@ #include "rvu_struct.h" #include "common.h" #include "mbox.h" +#include "npc.h" /* PCI device IDs */ #definePCI_DEVID_OCTEONTX2_RVU_AF 0xA065 @@ -105,6 +106,36 @@ struct nix_mce_list { int max; }; +/* layer meta data to uniquely identify a packet header field */ +struct npc_layer_mdata { + u8 lid; + u8 ltype; + u8 hdr; + u8 key; + u8 len; +}; + +/* Structure to represent a field present in the + * generated key. A key field may present anywhere and can + * be of any size in the generated key. Once this structure + * is populated for fields of interest then field's presence + * and location (if present) can be known. + */ +struct npc_key_field { + /* Masks where all set bits indicate position +* of a field in the key +*/ + u64 kw_mask[NPC_MAX_KWS_IN_KEY]; + /* Number of words in the key a field spans. If a field is +* of 16 bytes and key offset is 4 then the field will use +* 4 bytes in KW0, 8 bytes in KW1 and 4 bytes in KW2 and +* nr_kws will be 3(KW0, KW1 and KW2). +*/ + int nr_kws; + /* used by packet header fields */ + struct npc_layer_mdata layer_mdata; +}; + struct npc_mcam { struct rsrc_bmap counters; struct mutexlock; /* MCAM
[PATCH v8 17/22] perf arm-spe: Remove size condition checking for events
In the Armv8 ARM (ARM DDI 0487F.c), chapter "D10.2.6 Events packet", it describes the event bit is valid with specific payload requirement. For example, the Last Level cache access event, the bit is defined as: E[8], byte 1 bit [0], when SZ == 0b01 , when SZ == 0b10 , or when SZ == 0b11 It requires the payload size is at least 2 bytes, when byte 1 (start counting from 0) is valid, E[8] (bit 0 in byte 1) can be used for LLC access event type. For safety, the code checks the condition for payload size firstly, if meet the requirement for payload size, then continue to parse event type. If review function arm_spe_get_payload(), it has used cast, so any bytes beyond the valid size have been set to zeros. For this reason, we don't need to check payload size anymore afterwards when parse events, thus this patch removes payload size conditions. Suggested-by: Andre Przywara Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- tools/perf/util/arm-spe-decoder/arm-spe-decoder.c | 9 +++-- .../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 14 ++ 2 files changed, 9 insertions(+), 14 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c index cac2ef79c025..90d575cee1b9 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c @@ -192,16 +192,13 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder) if (payload & BIT(EV_TLB_ACCESS)) decoder->record.type |= ARM_SPE_TLB_ACCESS; - if ((idx == 2 || idx == 4 || idx == 8) && - (payload & BIT(EV_LLC_MISS))) + if (payload & BIT(EV_LLC_MISS)) decoder->record.type |= ARM_SPE_LLC_MISS; - if ((idx == 2 || idx == 4 || idx == 8) && - (payload & BIT(EV_LLC_ACCESS))) + if (payload & BIT(EV_LLC_ACCESS)) decoder->record.type |= ARM_SPE_LLC_ACCESS; - if ((idx == 2 || idx == 4 || idx == 8) && - (payload & BIT(EV_REMOTE_ACCESS))) + if (payload & BIT(EV_REMOTE_ACCESS)) decoder->record.type |= ARM_SPE_REMOTE_ACCESS; if (payload & BIT(EV_MISPRED)) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 2ebbd75d9b6a..64811021f36c 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -311,14 +311,12 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet, arm_spe_pkt_snprintf(, , _len, " NOT-TAKEN"); if (payload & BIT(EV_MISPRED)) arm_spe_pkt_snprintf(, , _len, " MISPRED"); - if (packet->index > 1) { - if (payload & BIT(EV_LLC_ACCESS)) - arm_spe_pkt_snprintf(, , _len, " LLC-ACCESS"); - if (payload & BIT(EV_LLC_MISS)) - arm_spe_pkt_snprintf(, , _len, " LLC-REFILL"); - if (payload & BIT(EV_REMOTE_ACCESS)) - arm_spe_pkt_snprintf(, , _len, " REMOTE-ACCESS"); - } + if (payload & BIT(EV_LLC_ACCESS)) + arm_spe_pkt_snprintf(, , _len, " LLC-ACCESS"); + if (payload & BIT(EV_LLC_MISS)) + arm_spe_pkt_snprintf(, , _len, " LLC-REFILL"); + if (payload & BIT(EV_REMOTE_ACCESS)) + arm_spe_pkt_snprintf(, , _len, " REMOTE-ACCESS"); return err; } -- 2.17.1
[PATCH v8 18/22] perf arm-spe: Add new function arm_spe_pkt_desc_op_type()
The operation type packet is complex and contains subclass; the parsing flow causes deep indentation; for more readable, this patch introduces a new function arm_spe_pkt_desc_op_type() which is used for operation type parsing. Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 79 +++ 1 file changed, 45 insertions(+), 34 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 64811021f36c..4f93b75c87e6 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -321,6 +321,50 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet, return err; } +static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet, + char *buf, size_t buf_len) +{ + u64 payload = packet->payload; + int err = 0; + + switch (packet->index) { + case 0: + arm_spe_pkt_snprintf(, , _len, + payload & 0x1 ? "COND-SELECT" : "INSN-OTHER"); + break; + case 1: + arm_spe_pkt_snprintf(, , _len, +payload & 0x1 ? "ST" : "LD"); + + if (payload & 0x2) { + if (payload & 0x4) + arm_spe_pkt_snprintf(, , _len, " AT"); + if (payload & 0x8) + arm_spe_pkt_snprintf(, , _len, " EXCL"); + if (payload & 0x10) + arm_spe_pkt_snprintf(, , _len, " AR"); + } else if (payload & 0x4) { + arm_spe_pkt_snprintf(, , _len, " SIMD-FP"); + } + break; + case 2: + arm_spe_pkt_snprintf(, , _len, "B"); + + if (payload & 0x1) + arm_spe_pkt_snprintf(, , _len, " COND"); + if (payload & 0x2) + arm_spe_pkt_snprintf(, , _len, " IND"); + + break; + default: + /* Unknown index */ + err = -1; + break; + } + + return err; +} + static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet, char *buf, size_t buf_len) { @@ -404,40 +448,7 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, err = arm_spe_pkt_desc_event(packet, buf, buf_len); break; case ARM_SPE_OP_TYPE: - switch (idx) { - case 0: - arm_spe_pkt_snprintf(, , , - payload & 0x1 ? "COND-SELECT" : "INSN-OTHER"); - break; - case 1: - arm_spe_pkt_snprintf(, , , -payload & 0x1 ? "ST" : "LD"); - - if (payload & 0x2) { - if (payload & 0x4) - arm_spe_pkt_snprintf(, , , " AT"); - if (payload & 0x8) - arm_spe_pkt_snprintf(, , , " EXCL"); - if (payload & 0x10) - arm_spe_pkt_snprintf(, , , " AR"); - } else if (payload & 0x4) { - arm_spe_pkt_snprintf(, , , " SIMD-FP"); - } - break; - case 2: - arm_spe_pkt_snprintf(, , , "B"); - - if (payload & 0x1) - arm_spe_pkt_snprintf(, , , " COND"); - if (payload & 0x2) - arm_spe_pkt_snprintf(, , , " IND"); - - break; - default: - /* Unknown index */ - err = -1; - break; - } + err = arm_spe_pkt_desc_op_type(packet, buf, buf_len); break; case ARM_SPE_DATA_SOURCE: case ARM_SPE_TIMESTAMP: -- 2.17.1
[PATCH v3 net-next 04/13] octeontx2-af: Add mbox messages to install and delete MCAM rules
From: Subbaraya Sundeep Added new mailbox messages to install and delete MCAM rules. These mailbox messages will be used for adding/deleting ethtool n-tuple filters by NIX PF. The installed MCAM rules are stored in a list that will be traversed later to delete the MCAM entries when the interface is brought down or when PCIe FLR is received. The delete mailbox supports deleting a single MCAM entry or range of entries or all the MCAM entries owned by the pcifunc. Each MCAM entry can be associated with a HW match stat entry if the mailbox requester wants to check the hit count for debugging. Modified adding default unicast DMAC match rule using install flow API. The default unicast DMAC match entry installed by Administrative Function is saved and can be changed later by the mailbox user to fit additional fields, or the default MCAM entry rule action can be used for other flow rules installed later. Modified rvu_mbox_handler_nix_lf_free mailbox to add a flag to disable or delete the MCAM entries. The MCAM entries are disabled when the interface is brought down and deleted in FLR handler. The disabled MCAM entries will be re-enabled when the interface is brought up again. Signed-off-by: Subbaraya Sundeep Signed-off-by: Sunil Goutham Signed-off-by: Naveen Mamindlapalli --- drivers/net/ethernet/marvell/octeontx2/af/common.h | 2 + drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 76 ++- drivers/net/ethernet/marvell/octeontx2/af/npc.h| 57 +- drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 13 + .../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 19 +- .../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 217 ++- .../net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 721 + .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 12 +- 8 files changed, 1065 insertions(+), 52 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/common.h b/drivers/net/ethernet/marvell/octeontx2/af/common.h index 8f68e7a8b882..17f6f42f4453 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/common.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/common.h @@ -162,6 +162,8 @@ enum nix_scheduler { #define NIX_RX_ACTIONOP_UCAST_IPSEC(0x2ull) #define NIX_RX_ACTIONOP_MCAST (0x3ull) #define NIX_RX_ACTIONOP_RSS(0x4ull) +/* Use the RX action set in the default unicast entry */ +#define NIX_RX_ACTION_DEFAULT (0xfull) /* NIX TX action operation*/ #define NIX_TX_ACTIONOP_DROP (0x0ull) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h index f46de8419b77..ac3118d2d126 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -188,10 +188,14 @@ M(NPC_MCAM_ALLOC_AND_WRITE_ENTRY, 0x600b, npc_mcam_alloc_and_write_entry, \ npc_mcam_alloc_and_write_entry_rsp) \ M(NPC_GET_KEX_CFG, 0x600c, npc_get_kex_cfg, \ msg_req, npc_get_kex_cfg_rsp)\ +M(NPC_INSTALL_FLOW, 0x600d, npc_install_flow,\ + npc_install_flow_req, npc_install_flow_rsp) \ +M(NPC_DELETE_FLOW, 0x600e, npc_delete_flow, \ + npc_delete_flow_req, msg_rsp) \ /* NIX mbox IDs (range 0x8000 - 0x) */ \ M(NIX_LF_ALLOC,0x8000, nix_lf_alloc, \ nix_lf_alloc_req, nix_lf_alloc_rsp)\ -M(NIX_LF_FREE, 0x8001, nix_lf_free, msg_req, msg_rsp) \ +M(NIX_LF_FREE, 0x8001, nix_lf_free, nix_lf_free_req, msg_rsp) \ M(NIX_AQ_ENQ, 0x8002, nix_aq_enq, nix_aq_enq_req, nix_aq_enq_rsp) \ M(NIX_HWCTX_DISABLE, 0x8003, nix_hwctx_disable, \ hwctx_disable_req, msg_rsp)\ @@ -510,6 +514,12 @@ struct nix_lf_alloc_rsp { u8 sdp_links; /* No. of SDP links present in HW */ }; +struct nix_lf_free_req { + struct mbox_msghdr hdr; +#define NIX_LF_DISABLE_FLOWS BIT_ULL(0) + u64 flags; +}; + /* NIX AQ enqueue msg */ struct nix_aq_enq_req { struct mbox_msghdr hdr; @@ -882,6 +892,70 @@ struct npc_get_kex_cfg_rsp { u8 mkex_pfl_name[MKEX_NAME_LEN]; }; +struct flow_msg { + unsigned char dmac[6]; + unsigned char smac[6]; + __be16 etype; + __be16 vlan_etype; + __be16 vlan_tci; + union { + __be32 ip4src; + __be32 ip6src[4]; + }; + union { + __be32 ip4dst; + __be32 ip6dst[4]; + }; + u8 tos; + u8 ip_ver; + u8 ip_proto; + u8 tc; + __be16 sport; + __be16 dport; +}; + +struct npc_install_flow_req { + struct mbox_msghdr hdr; + struct
Re: [PATCH -next] treewide: Remove stringification from __alias macro definition
(+ Russell) On Thu, 22 Oct 2020 at 18:20, Joe Perches wrote: > > On Thu, 2020-10-22 at 09:33 +0200, Peter Zijlstra wrote: > > On Wed, Oct 21, 2020 at 11:58:25AM -0700, Joe Perches wrote: > > > Like the __section macro, the __alias macro uses > > > macro # stringification to create quotes around > > > the section name used in the __attribute__. > > > > > > Remove the stringification and add quotes or a > > > stringification to the uses instead. > > > > There's a complete lack of rationale for this change. > > I'll eventually post V2. > I'm waiting to see if there are more comments. > > As I wrote in reply to Ard: > > https://lore.kernel.org/lkml/1cecfbfc853b2e71a96ab58661037c28a2f9280e.ca...@perches.com/ > > Using quotes in __section caused/causes differences > between clang and gcc. > > https://lkml.org/lkml/2020/9/29/2187 > > Using common styles for details like this is good. > This patch is now causing problems in the ARM tree, because some new uses of __alias() have been queued (for KASAN), and since this is a non-backwards compatible change, we have to choose between breaking the maintainer's tree or breaking -next (given that the change has been pulled in there now) I am still not convinced we need this change, as I don't see how the concerns regarding __section apply to __alias. But if we do, can we please use the same approach, i.e., revert the current patch, and queue it again after v5.11-rc1 with all new occurrences covered as well?
[PATCH v3 net-next 08/13] octeontx2-af: Modify nix_vtag_cfg mailbox to support TX VTAG entries
From: Vamsi Attunuru This patch modifies the existing nix_vtag_config mailbox message to allocate and free TX VTAG entries as requested by a NIX PF. The TX VTAG entries are global resource that shared by all PFs and each entry specifies the size of VTAG to insert and the VTAG header data to insert. The mailbox response contains the entry index which is used by mailbox requester in configuring the NPC_TX_VTAG_ACTION for any MCAM entry. Signed-off-by: Vamsi Attunuru Signed-off-by: Sunil Goutham Signed-off-by: Naveen Mamindlapalli --- drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 60 +-- drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 8 + .../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 195 - 3 files changed, 250 insertions(+), 13 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h index ac3118d2d126..4f230a7272ce 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -204,7 +204,8 @@ M(NIX_TXSCH_ALLOC, 0x8004, nix_txsch_alloc, \ M(NIX_TXSCH_FREE, 0x8005, nix_txsch_free, nix_txsch_free_req, msg_rsp) \ M(NIX_TXSCHQ_CFG, 0x8006, nix_txschq_cfg, nix_txschq_config, msg_rsp) \ M(NIX_STATS_RST, 0x8007, nix_stats_rst, msg_req, msg_rsp)\ -M(NIX_VTAG_CFG,0x8008, nix_vtag_cfg, nix_vtag_config, msg_rsp) \ +M(NIX_VTAG_CFG,0x8008, nix_vtag_cfg, nix_vtag_config, \ +nix_vtag_config_rsp) \ M(NIX_RSS_FLOWKEY_CFG, 0x8009, nix_rss_flowkey_cfg, \ nix_rss_flowkey_cfg, \ nix_rss_flowkey_cfg_rsp) \ @@ -477,6 +478,7 @@ enum nix_af_status { NIX_AF_ERR_LSO_CFG_FAIL = -418, NIX_AF_INVAL_NPA_PF_FUNC= -419, NIX_AF_INVAL_SSO_PF_FUNC= -420, + NIX_AF_ERR_TX_VTAG_NOSPC= -421, }; /* For NIX LF context alloc and init */ @@ -516,7 +518,8 @@ struct nix_lf_alloc_rsp { struct nix_lf_free_req { struct mbox_msghdr hdr; -#define NIX_LF_DISABLE_FLOWS BIT_ULL(0) +#define NIX_LF_DISABLE_FLOWS BIT_ULL(0) +#define NIX_LF_DONT_FREE_TX_VTAG BIT_ULL(1) u64 flags; }; @@ -610,14 +613,40 @@ struct nix_vtag_config { union { /* valid when cfg_type is '0' */ struct { - /* tx vlan0 tag(C-VLAN) */ - u64 vlan0; - /* tx vlan1 tag(S-VLAN) */ - u64 vlan1; - /* insert tx vlan tag */ - u8 insert_vlan :1; - /* insert tx double vlan tag */ - u8 double_vlan :1; + u64 vtag0; + u64 vtag1; + + /* cfg_vtag0 & cfg_vtag1 fields are valid +* when free_vtag0 & free_vtag1 are '0's. +*/ + /* cfg_vtag0 = 1 to configure vtag0 */ + u8 cfg_vtag0 :1; + /* cfg_vtag1 = 1 to configure vtag1 */ + u8 cfg_vtag1 :1; + + /* vtag0_idx & vtag1_idx are only valid when +* both cfg_vtag0 & cfg_vtag1 are '0's, +* these fields are used along with free_vtag0 +* & free_vtag1 to free the nix lf's tx_vlan +* configuration. +* +* Denotes the indices of tx_vtag def registers +* that needs to be cleared and freed. +*/ + int vtag0_idx; + int vtag1_idx; + + /* free_vtag0 & free_vtag1 fields are valid +* when cfg_vtag0 & cfg_vtag1 are '0's. +*/ + /* free_vtag0 = 1 clears vtag0 configuration +* vtag0_idx denotes the index to be cleared. +*/ + u8 free_vtag0 :1; + /* free_vtag1 = 1 clears vtag1 configuration +* vtag1_idx denotes the index to be cleared. +*/ + u8 free_vtag1 :1; } tx; /* valid when cfg_type is '1' */ @@ -632,6 +661,17 @@ struct nix_vtag_config { }; }; +struct nix_vtag_config_rsp { + struct mbox_msghdr hdr; + int vtag0_idx; + int vtag1_idx; + /* Indices of tx_vtag def registers used to configure +* tx vtag0 & vtag1 headers, these indices are valid +* when nix_vtag_config mbox requested for vtag0 and/ +* or vtag1 configuration. +*/ +}; + struct
[PATCH v3 net-next 09/13] octeontx2-pf: Implement ingress/egress VLAN offload
From: Hariprasad Kelam This patch implements egress VLAN offload by appending NIX_SEND_EXT_S header to NIX_SEND_HDR_S. The VLAN TCI information is specified in the NIX_SEND_EXT_S. The VLAN offload in the ingress path is implemented by configuring the NIX_RX_VTAG_ACTION_S to strip and capture the outer vlan fields. The NIX PF allocates one MCAM entry for Rx VLAN offload. Signed-off-by: Hariprasad Kelam Signed-off-by: Sunil Goutham Signed-off-by: Naveen Mamindlapalli --- drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 13 +++ .../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 3 +- .../ethernet/marvell/octeontx2/nic/otx2_common.c | 8 +- .../ethernet/marvell/octeontx2/nic/otx2_common.h | 8 +- .../ethernet/marvell/octeontx2/nic/otx2_flows.c| 102 + .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 16 .../net/ethernet/marvell/octeontx2/nic/otx2_txrx.c | 16 .../net/ethernet/marvell/octeontx2/nic/otx2_vf.c | 5 + 8 files changed, 167 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h index 4f230a7272ce..ef20078508a5 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -479,6 +479,19 @@ enum nix_af_status { NIX_AF_INVAL_NPA_PF_FUNC= -419, NIX_AF_INVAL_SSO_PF_FUNC= -420, NIX_AF_ERR_TX_VTAG_NOSPC= -421, + NIX_AF_ERR_RX_VTAG_INUSE= -422, +}; + +/* For NIX RX vtag action */ +enum nix_rx_vtag0_type { + NIX_AF_LFX_RX_VTAG_TYPE0, /* reserved for rx vlan offload */ + NIX_AF_LFX_RX_VTAG_TYPE1, + NIX_AF_LFX_RX_VTAG_TYPE2, + NIX_AF_LFX_RX_VTAG_TYPE3, + NIX_AF_LFX_RX_VTAG_TYPE4, + NIX_AF_LFX_RX_VTAG_TYPE5, + NIX_AF_LFX_RX_VTAG_TYPE6, + NIX_AF_LFX_RX_VTAG_TYPE7, }; /* For NIX LF context alloc and init */ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c index 4709d8b6197b..97a8f932d1e2 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c @@ -1986,7 +1986,8 @@ static int nix_rx_vtag_cfg(struct rvu *rvu, int nixlf, int blkaddr, { u64 regval = req->vtag_size; - if (req->rx.vtag_type > 7 || req->vtag_size > VTAGSIZE_T8) + if (req->rx.vtag_type > NIX_AF_LFX_RX_VTAG_TYPE7 || + req->vtag_size > VTAGSIZE_T8) return -EINVAL; if (req->rx.capture_vtag) diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c index 9f3d6715748e..68fb4e4757aa 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c @@ -191,10 +191,14 @@ int otx2_set_mac_address(struct net_device *netdev, void *p) if (!is_valid_ether_addr(addr->sa_data)) return -EADDRNOTAVAIL; - if (!otx2_hw_set_mac_addr(pfvf, addr->sa_data)) + if (!otx2_hw_set_mac_addr(pfvf, addr->sa_data)) { memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); - else + /* update dmac field in vlan offload rule */ + if (pfvf->flags & OTX2_FLAG_RX_VLAN_SUPPORT) + otx2_install_rxvlan_offload_flow(pfvf); + } else { return -EPERM; + } return 0; } diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h index f959688e14a3..7819f278b99c 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h @@ -240,10 +240,13 @@ struct otx2_flow_config { u32 nr_flows; #define OTX2_MAX_NTUPLE_FLOWS 32 #define OTX2_MAX_UNICAST_FLOWS 8 +#define OTX2_MAX_VLAN_FLOWS1 #define OTX2_MCAM_COUNT(OTX2_MAX_NTUPLE_FLOWS + \ -OTX2_MAX_UNICAST_FLOWS) +OTX2_MAX_UNICAST_FLOWS + \ +OTX2_MAX_VLAN_FLOWS) u32 ntuple_offset; u32 unicast_offset; + u32 rx_vlan_offset; u32 ntuple_max_flows; struct list_headflow_list; }; @@ -261,6 +264,7 @@ struct otx2_nic { #define OTX2_FLAG_MCAM_ENTRIES_ALLOC BIT_ULL(3) #define OTX2_FLAG_NTUPLE_SUPPORT BIT_ULL(4) #define OTX2_FLAG_UCAST_FLTR_SUPPORT BIT_ULL(5) +#define OTX2_FLAG_RX_VLAN_SUPPORT BIT_ULL(6) #define OTX2_FLAG_RX_PAUSE_ENABLED BIT_ULL(9) #define OTX2_FLAG_TX_PAUSE_ENABLED BIT_ULL(10) u64 flags; @@ -687,5 +691,7 @@ int otx2_prepare_flow_request(struct
[PATCH v3 net-next 07/13] octeontx2-af: Add debugfs entry to dump the MCAM rules
From: Subbaraya Sundeep Add debugfs support to dump the MCAM rules installed using NPC_INSTALL_FLOW mbox message. Debugfs file can display mcam entry, counter if any, flow type and counter hits. Ethtool will dump the ntuple flows related to the PF only. The debugfs file gives systemwide view of the MCAM rules installed by all the PF's. Below is the example output when the debugfs file is read: ~ # mount -t debugfs none /sys/kernel/debug ~ # cat /sys/kernel/debug/octeontx2/npc/mcam_rules Installed by: PF1 direction: RX mcam entry: 227 udp source port 23 mask 0x Forward to: PF1 VF0 action: Direct to queue 0 enabled: yes counter: 1 hits: 0 Signed-off-by: Subbaraya Sundeep Signed-off-by: Sunil Goutham Signed-off-by: Naveen Mamindlapalli --- .../ethernet/marvell/octeontx2/af/rvu_debugfs.c| 197 + 1 file changed, 197 insertions(+) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c index b7b6b6f8865a..39e1a614aaf8 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c @@ -1770,6 +1770,198 @@ static int rvu_dbg_npc_rx_miss_stats_display(struct seq_file *filp, RVU_DEBUG_SEQ_FOPS(npc_rx_miss_act, npc_rx_miss_stats_display, NULL); +static void rvu_dbg_npc_mcam_show_flows(struct seq_file *s, + struct rvu_npc_mcam_rule *rule) +{ + u8 bit; + + for_each_set_bit(bit, (unsigned long *)>features, 64) { + seq_printf(s, "\t%s ", npc_get_field_name(bit)); + switch (bit) { + case NPC_DMAC: + seq_printf(s, "%pM ", rule->packet.dmac); + seq_printf(s, "mask %pM\n", rule->mask.dmac); + break; + case NPC_SMAC: + seq_printf(s, "%pM ", rule->packet.smac); + seq_printf(s, "mask %pM\n", rule->mask.smac); + break; + case NPC_ETYPE: + seq_printf(s, "0x%x ", ntohs(rule->packet.etype)); + seq_printf(s, "mask 0x%x\n", ntohs(rule->mask.etype)); + break; + case NPC_OUTER_VID: + seq_printf(s, "%d ", ntohs(rule->packet.vlan_tci)); + seq_printf(s, "mask 0x%x\n", + ntohs(rule->mask.vlan_tci)); + break; + case NPC_TOS: + seq_printf(s, "%d ", rule->packet.tos); + seq_printf(s, "mask 0x%x\n", rule->mask.tos); + break; + case NPC_SIP_IPV4: + seq_printf(s, "%pI4 ", >packet.ip4src); + seq_printf(s, "mask %pI4\n", >mask.ip4src); + break; + case NPC_DIP_IPV4: + seq_printf(s, "%pI4 ", >packet.ip4dst); + seq_printf(s, "mask %pI4\n", >mask.ip4dst); + break; + case NPC_SIP_IPV6: + seq_printf(s, "%pI6 ", rule->packet.ip6src); + seq_printf(s, "mask %pI6\n", rule->mask.ip6src); + break; + case NPC_DIP_IPV6: + seq_printf(s, "%pI6 ", rule->packet.ip6dst); + seq_printf(s, "mask %pI6\n", rule->mask.ip6dst); + break; + case NPC_SPORT_TCP: + case NPC_SPORT_UDP: + case NPC_SPORT_SCTP: + seq_printf(s, "%d ", ntohs(rule->packet.sport)); + seq_printf(s, "mask 0x%x\n", ntohs(rule->mask.sport)); + break; + case NPC_DPORT_TCP: + case NPC_DPORT_UDP: + case NPC_DPORT_SCTP: + seq_printf(s, "%d ", ntohs(rule->packet.dport)); + seq_printf(s, "mask 0x%x\n", ntohs(rule->mask.dport)); + break; + default: + break; + } + } +} + +static void rvu_dbg_npc_mcam_show_action(struct seq_file *s, +struct rvu_npc_mcam_rule *rule) +{ + if (rule->intf == NIX_INTF_TX) { + switch (rule->tx_action.op) { + case NIX_TX_ACTIONOP_DROP: + seq_puts(s, "\taction: Drop\n"); + break; + case NIX_TX_ACTIONOP_UCAST_DEFAULT: + seq_puts(s, "\taction: Unicast to default channel\n"); + break; + case NIX_TX_ACTIONOP_UCAST_CHAN: + seq_printf(s, "\taction: Unicast to channel %d\n", + rule->tx_action.index); +
[PATCH v3 net-next 06/13] octeontx2-pf: Add support for unicast MAC address filtering
From: Hariprasad Kelam Add unicast MAC address filtering support using install flow message. Total of 8 MCAM entries are allocated for adding unicast mac filtering rules. If the MCAM allocation fails, the unicast filtering support will not be advertised. Signed-off-by: Hariprasad Kelam Signed-off-by: Sunil Goutham Signed-off-by: Naveen Mamindlapalli --- .../ethernet/marvell/octeontx2/nic/otx2_common.h | 15 ++- .../ethernet/marvell/octeontx2/nic/otx2_flows.c| 120 - .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 15 ++- 3 files changed, 143 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h index 2387c40a2a8f..f959688e14a3 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h @@ -229,12 +229,21 @@ struct otx2_ptp { #define OTX2_HW_TIMESTAMP_LEN 8 +struct otx2_mac_table { + u8 addr[ETH_ALEN]; + u16 mcam_entry; + bool inuse; +}; + struct otx2_flow_config { u16 entry[NPC_MAX_NONCONTIG_ENTRIES]; u32 nr_flows; #define OTX2_MAX_NTUPLE_FLOWS 32 -#define OTX2_MCAM_COUNTOTX2_MAX_NTUPLE_FLOWS +#define OTX2_MAX_UNICAST_FLOWS 8 +#define OTX2_MCAM_COUNT(OTX2_MAX_NTUPLE_FLOWS + \ +OTX2_MAX_UNICAST_FLOWS) u32 ntuple_offset; + u32 unicast_offset; u32 ntuple_max_flows; struct list_headflow_list; }; @@ -251,6 +260,7 @@ struct otx2_nic { #define OTX2_FLAG_INTF_DOWNBIT_ULL(2) #define OTX2_FLAG_MCAM_ENTRIES_ALLOC BIT_ULL(3) #define OTX2_FLAG_NTUPLE_SUPPORT BIT_ULL(4) +#define OTX2_FLAG_UCAST_FLTR_SUPPORT BIT_ULL(5) #define OTX2_FLAG_RX_PAUSE_ENABLED BIT_ULL(9) #define OTX2_FLAG_TX_PAUSE_ENABLED BIT_ULL(10) u64 flags; @@ -279,6 +289,7 @@ struct otx2_nic { struct refill_work *refill_wrk; struct workqueue_struct *otx2_wq; struct work_struct rx_mode_work; + struct otx2_mac_table *mac_table; /* Ethtool stuff */ u32 msg_enable; @@ -674,5 +685,7 @@ int otx2_add_flow(struct otx2_nic *pfvf, int otx2_remove_flow(struct otx2_nic *pfvf, u32 location); int otx2_prepare_flow_request(struct ethtool_rx_flow_spec *fsp, struct npc_install_flow_req *req); +int otx2_del_macfilter(struct net_device *netdev, const u8 *mac); +int otx2_add_macfilter(struct net_device *netdev, const u8 *mac); #endif /* OTX2_COMMON_H */ diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c index 094f547c9889..7da80aa3f063 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c @@ -46,14 +46,21 @@ int otx2_alloc_mcam_entries(struct otx2_nic *pfvf) rsp = (struct npc_mcam_alloc_entry_rsp *)otx2_mbox_get_rsp (>mbox.mbox, 0, >hdr); - if (rsp->count != req->count) + if (rsp->count != req->count) { netdev_info(pfvf->netdev, "Unable to allocate %d MCAM entries, got %d\n", req->count, rsp->count); - - flow_cfg->ntuple_max_flows = rsp->count; - flow_cfg->ntuple_offset = 0; - pfvf->flags |= OTX2_FLAG_NTUPLE_SUPPORT; + /* support only ntuples here */ + flow_cfg->ntuple_max_flows = rsp->count; + flow_cfg->ntuple_offset = 0; + pfvf->flags |= OTX2_FLAG_NTUPLE_SUPPORT; + } else { + flow_cfg->ntuple_offset = 0; + flow_cfg->unicast_offset = flow_cfg->ntuple_offset + + OTX2_MAX_NTUPLE_FLOWS; + pfvf->flags |= OTX2_FLAG_NTUPLE_SUPPORT; + pfvf->flags |= OTX2_FLAG_UCAST_FLTR_SUPPORT; + } for (i = 0; i < rsp->count; i++) flow_cfg->entry[i] = rsp->entry_list[i]; @@ -82,6 +89,11 @@ int otx2_mcam_flow_init(struct otx2_nic *pf) if (err) return err; + pf->mac_table = devm_kzalloc(pf->dev, sizeof(struct otx2_mac_table) + * OTX2_MAX_UNICAST_FLOWS, GFP_KERNEL); + if (!pf->mac_table) + return -ENOMEM; + return 0; } @@ -90,6 +102,104 @@ void otx2_mcam_flow_del(struct otx2_nic *pf) otx2_destroy_mcam_flows(pf); } +/* On success adds mcam entry + * On failure enable promisous mode + */ +static int otx2_do_add_macfilter(struct otx2_nic *pf, const u8 *mac) +{ + struct otx2_flow_config *flow_cfg = pf->flow_cfg; + struct
[PATCH v8 19/22] perf arm-spe: Refactor operation packet handling
Defines macros for operation packet header and formats (support sub classes for 'other', 'branch', 'load and store', etc). Uses these macros for operation packet decoding and dumping. Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 26 ++- .../arm-spe-decoder/arm-spe-pkt-decoder.h | 23 2 files changed, 37 insertions(+), 12 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 4f93b75c87e6..5fe1c5e8094d 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -144,7 +144,7 @@ static int arm_spe_get_op_type(const unsigned char *buf, size_t len, struct arm_spe_pkt *packet) { packet->type = ARM_SPE_OP_TYPE; - packet->index = buf[0] & 0x3; + packet->index = SPE_OP_PKT_HDR_CLASS(buf[0]); return arm_spe_get_payload(buf, len, 0, packet); } @@ -328,31 +328,33 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet, int err = 0; switch (packet->index) { - case 0: + case SPE_OP_PKT_HDR_CLASS_OTHER: arm_spe_pkt_snprintf(, , _len, - payload & 0x1 ? "COND-SELECT" : "INSN-OTHER"); + payload & SPE_OP_PKT_COND ? "COND-SELECT" : "INSN-OTHER"); break; - case 1: + case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC: arm_spe_pkt_snprintf(, , _len, payload & 0x1 ? "ST" : "LD"); - if (payload & 0x2) { - if (payload & 0x4) + if (SPE_OP_PKT_IS_LDST_ATOMIC(payload)) { + if (payload & SPE_OP_PKT_AT) arm_spe_pkt_snprintf(, , _len, " AT"); - if (payload & 0x8) + if (payload & SPE_OP_PKT_EXCL) arm_spe_pkt_snprintf(, , _len, " EXCL"); - if (payload & 0x10) + if (payload & SPE_OP_PKT_AR) arm_spe_pkt_snprintf(, , _len, " AR"); - } else if (payload & 0x4) { + } else if (SPE_OP_PKT_LDST_SUBCLASS_GET(payload) == + SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP) { arm_spe_pkt_snprintf(, , _len, " SIMD-FP"); } break; - case 2: + case SPE_OP_PKT_HDR_CLASS_BR_ERET: arm_spe_pkt_snprintf(, , _len, "B"); - if (payload & 0x1) + if (payload & SPE_OP_PKT_COND) arm_spe_pkt_snprintf(, , _len, " COND"); - if (payload & 0x2) + + if (SPE_OP_PKT_IS_INDIRECT_BRANCH(payload)) arm_spe_pkt_snprintf(, , _len, " IND"); break; diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h index 42ed4e61ede2..7032fc141ad4 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h @@ -105,6 +105,29 @@ enum arm_spe_events { EV_EMPTY_PREDICATE = 18, }; +/* Operation packet header */ +#define SPE_OP_PKT_HDR_CLASS(h)((h) & GENMASK_ULL(1, 0)) +#define SPE_OP_PKT_HDR_CLASS_OTHER 0x0 +#define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC 0x1 +#define SPE_OP_PKT_HDR_CLASS_BR_ERET 0x2 + +#define SPE_OP_PKT_CONDBIT(0) + +#define SPE_OP_PKT_LDST_SUBCLASS_GET(v)((v) & GENMASK_ULL(7, 1)) +#define SPE_OP_PKT_LDST_SUBCLASS_GP_REG0x0 +#define SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP 0x4 +#define SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG0x10 +#define SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG 0x30 + +#define SPE_OP_PKT_IS_LDST_ATOMIC(v) (((v) & (GENMASK_ULL(7, 5) | BIT(1))) == 0x2) + +#define SPE_OP_PKT_AR BIT(4) +#define SPE_OP_PKT_EXCLBIT(3) +#define SPE_OP_PKT_AT BIT(2) +#define SPE_OP_PKT_ST BIT(0) + +#define SPE_OP_PKT_IS_INDIRECT_BRANCH(v) (((v) & GENMASK_ULL(7, 1)) == 0x2) + const char *arm_spe_pkt_name(enum arm_spe_pkt_type); int arm_spe_get_packet(const unsigned char *buf, size_t len, -- 2.17.1
[PATCH v3 net-next 10/13] octeontx2-pf: Add support for SR-IOV management functions
This patch adds support for ndo_set_vf_mac, ndo_set_vf_vlan and ndo_get_vf_config handlers. The traffic redirection based on the VF mac address or vlan id is done by installing MCAM rules. Reserved RX_VTAG_TYPE7 in each NIXLF for VF VLAN which strips the VLAN tag from ingress VLAN traffic. The NIX PF allocates two MCAM entries for VF VLAN feature, one used for ingress VTAG strip and another entry for egress VTAG insertion. This patch also updates the MAC address in PF installed VF VLAN rule upon receiving nix_lf_start_rx mbox request for VF since Administrative Function driver will assign a valid MAC addr in nix_lf_start_rx function. Signed-off-by: Naveen Mamindlapalli Co-developed-by: Tomasz Duszynski Signed-off-by: Tomasz Duszynski Signed-off-by: Sunil Goutham Signed-off-by: Hariprasad Kelam --- drivers/net/ethernet/marvell/octeontx2/af/npc.h| 1 + drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 4 + .../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 14 ++ .../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 88 .../net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 40 .../net/ethernet/marvell/octeontx2/af/rvu_struct.h | 11 + .../ethernet/marvell/octeontx2/nic/otx2_common.h | 9 + .../ethernet/marvell/octeontx2/nic/otx2_flows.c| 9 +- .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 246 + 9 files changed, 420 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc.h b/drivers/net/ethernet/marvell/octeontx2/af/npc.h index 860706033aad..35d0348a9d29 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/npc.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/npc.h @@ -452,6 +452,7 @@ struct rvu_npc_mcam_rule { bool has_cntr; u8 default_rule; bool enable; + bool vfvlan_cfg; }; #endif /* NPC_H */ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h index 6a45573724b4..15e668a87aa1 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h @@ -209,6 +209,7 @@ struct rvu_pfvf { u16 maxlen; u16 minlen; + u8 pf_set_vf_cfg; u8 mac_addr[ETH_ALEN]; /* MAC address of this PF/VF */ /* Broadcast pkt replication info */ @@ -596,6 +597,9 @@ void npc_mcam_enable_flows(struct rvu *rvu, u16 target); void npc_mcam_disable_flows(struct rvu *rvu, u16 target); void npc_enable_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam, int blkaddr, int index, bool enable); +void npc_read_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam, +int blkaddr, u16 src, struct mcam_entry *entry, +u8 *intf, u8 *ena); #ifdef CONFIG_DEBUG_FS void rvu_dbg_init(struct rvu *rvu); diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c index 97a8f932d1e2..53c5556d7061 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c @@ -1196,6 +1196,11 @@ int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu, /* Disable NPC entries as NIXLF's contexts are not initialized yet */ rvu_npc_disable_default_entries(rvu, pcifunc, nixlf); + /* Configure RX VTAG Type 7 (strip) for vf vlan */ + rvu_write64(rvu, blkaddr, + NIX_AF_LFX_RX_VTAG_TYPEX(nixlf, NIX_AF_LFX_RX_VTAG_TYPE7), + VTAGSIZE_T4 | VTAG_STRIP); + goto exit; free_mem: @@ -1990,6 +1995,10 @@ static int nix_rx_vtag_cfg(struct rvu *rvu, int nixlf, int blkaddr, req->vtag_size > VTAGSIZE_T8) return -EINVAL; + /* RX VTAG Type 7 reserved for vf vlan */ + if (req->rx.vtag_type == NIX_AF_LFX_RX_VTAG_TYPE7) + return NIX_AF_ERR_RX_VTAG_INUSE; + if (req->rx.capture_vtag) regval |= BIT_ULL(5); if (req->rx.strip_vtag) @@ -2933,6 +2942,7 @@ int rvu_mbox_handler_nix_set_mac_addr(struct rvu *rvu, struct nix_set_mac_addr *req, struct msg_rsp *rsp) { + bool from_vf = req->hdr.pcifunc & RVU_PFVF_FUNC_MASK; u16 pcifunc = req->hdr.pcifunc; int blkaddr, nixlf, err; struct rvu_pfvf *pfvf; @@ -2943,6 +2953,10 @@ int rvu_mbox_handler_nix_set_mac_addr(struct rvu *rvu, pfvf = rvu_get_pfvf(rvu, pcifunc); + /* VF can't overwrite admin(PF) changes */ + if (from_vf && pfvf->pf_set_vf_cfg) + return -EPERM; + ether_addr_copy(pfvf->mac_addr, req->mac_addr); rvu_npc_install_ucast_entry(rvu, pcifunc, nixlf, diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c index a7759ecfa586..84e954dafe85 100644 ---
[PATCH v8 22/22] perf arm-spe: Add support for ARMv8.3-SPE
From: Wei Li This patch is to support Armv8.3 extension for SPE, it adds alignment field in the Events packet and it supports the Scalable Vector Extension (SVE) for Operation packet and Events packet with two additions: - The vector length for SVE operations in the Operation Type packet; - The incomplete predicate and empty predicate fields in the Events packet. Signed-off-by: Wei Li Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 36 +-- .../arm-spe-decoder/arm-spe-pkt-decoder.h | 16 + 2 files changed, 50 insertions(+), 2 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index cefdc52b..afb6d9fe9eae 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -317,6 +317,12 @@ static int arm_spe_pkt_desc_event(const struct arm_spe_pkt *packet, arm_spe_pkt_snprintf(, , _len, " LLC-REFILL"); if (payload & BIT(EV_REMOTE_ACCESS)) arm_spe_pkt_snprintf(, , _len, " REMOTE-ACCESS"); + if (payload & BIT(EV_ALIGNMENT)) + arm_spe_pkt_snprintf(, , _len, " ALIGNMENT"); + if (payload & BIT(EV_PARTIAL_PREDICATE)) + arm_spe_pkt_snprintf(, , _len, " SVE-PARTIAL-PRED"); + if (payload & BIT(EV_EMPTY_PREDICATE)) + arm_spe_pkt_snprintf(, , _len, " SVE-EMPTY-PRED"); return err; } @@ -329,8 +335,23 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet, switch (packet->index) { case SPE_OP_PKT_HDR_CLASS_OTHER: - arm_spe_pkt_snprintf(, , _len, - payload & SPE_OP_PKT_COND ? "COND-SELECT" : "INSN-OTHER"); + if (SPE_OP_PKT_IS_OTHER_SVE_OP(payload)) { + arm_spe_pkt_snprintf(, , _len, "SVE-OTHER"); + + /* SVE effective vector length */ + arm_spe_pkt_snprintf(, , _len, " EVLEN %d", +SPE_OP_PKG_SVE_EVL(payload)); + + if (payload & SPE_OP_PKT_SVE_FP) + arm_spe_pkt_snprintf(, , _len, " FP"); + if (payload & SPE_OP_PKT_SVE_PRED) + arm_spe_pkt_snprintf(, , _len, " PRED"); + } else { + arm_spe_pkt_snprintf(, , _len, "OTHER"); + arm_spe_pkt_snprintf(, , _len, " %s", +payload & SPE_OP_PKT_COND ? +"COND-SELECT" : "INSN-OTHER"); + } break; case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC: arm_spe_pkt_snprintf(, , _len, @@ -361,6 +382,17 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet, default: break; } + + if (SPE_OP_PKT_IS_LDST_SVE(payload)) { + /* SVE effective vector length */ + arm_spe_pkt_snprintf(, , _len, " EVLEN %d", +SPE_OP_PKG_SVE_EVL(payload)); + + if (payload & SPE_OP_PKT_SVE_PRED) + arm_spe_pkt_snprintf(, , _len, " PRED"); + if (payload & SPE_OP_PKT_SVE_SG) + arm_spe_pkt_snprintf(, , _len, " SG"); + } break; case SPE_OP_PKT_HDR_CLASS_BR_ERET: arm_spe_pkt_snprintf(, , _len, "B"); diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h index 1ad14885c2a1..9b970e7bf1e2 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h @@ -113,6 +113,8 @@ enum arm_spe_events { #define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC 0x1 #define SPE_OP_PKT_HDR_CLASS_BR_ERET 0x2 +#define SPE_OP_PKT_IS_OTHER_SVE_OP(v) (((v) & (BIT(7) | BIT(3) | BIT(0))) == 0x8) + #define SPE_OP_PKT_CONDBIT(0) #define SPE_OP_PKT_LDST_SUBCLASS_GET(v)((v) & GENMASK_ULL(7, 1)) @@ -128,6 +130,20 @@ enum arm_spe_events { #define SPE_OP_PKT_AT BIT(2) #define SPE_OP_PKT_ST BIT(0) +#define SPE_OP_PKT_IS_LDST_SVE(v) (((v) & (BIT(3) | BIT(1))) == 0x8) + +#define SPE_OP_PKT_SVE_SG BIT(7) +/* + * SVE effective vector length (EVL) is stored in byte 0 bits [6:4]; + * the length is rounded up to a power of two and use 32 as one step, + * so EVL calculation is: + * + * 32 * (2 ^ bits [6:4]) = 32 << (bits [6:4]) + */ +#define SPE_OP_PKG_SVE_EVL(v) (32 << (((v) & GENMASK_ULL(6, 4)) >> 4))
[PATCH v8 20/22] perf arm-spe: Add more sub classes for operation packet
For the operation type packet payload with load/store class, it misses to support these sub classes: - A load/store targeting the general-purpose registers; - A load/store targeting unspecified registers; - The ARMv8.4 nested virtualisation extension can redirect system register accesses to a memory page controlled by the hypervisor. The SPE profiling feature in newer implementations can tag those memory accesses accordingly. Add the bit pattern describing load/store sub classes, so that the perf tool can decode it properly. Inspired by Andre Przywara, refined the commit log and code for more clear description. Co-developed-by: Andre Przywara Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 18 -- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 5fe1c5e8094d..55c4bf330b96 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -343,9 +343,23 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet, arm_spe_pkt_snprintf(, , _len, " EXCL"); if (payload & SPE_OP_PKT_AR) arm_spe_pkt_snprintf(, , _len, " AR"); - } else if (SPE_OP_PKT_LDST_SUBCLASS_GET(payload) == - SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP) { + } + + switch (SPE_OP_PKT_LDST_SUBCLASS_GET(payload)) { + case SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP: arm_spe_pkt_snprintf(, , _len, " SIMD-FP"); + break; + case SPE_OP_PKT_LDST_SUBCLASS_GP_REG: + arm_spe_pkt_snprintf(, , _len, " GP-REG"); + break; + case SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG: + arm_spe_pkt_snprintf(, , _len, " UNSPEC-REG"); + break; + case SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG: + arm_spe_pkt_snprintf(, , _len, " NV-SYSREG"); + break; + default: + break; } break; case SPE_OP_PKT_HDR_CLASS_BR_ERET: -- 2.17.1
[PATCH v3 net-next 12/13] octeontx2-af: Add new mbox messages to retrieve MCAM entries
This patch introduces new mailbox mesages to retrieve a given MCAM entry or base flow steering rule of a VF installed by its parent PF. This helps while updating the existing MCAM rules with out re-framing the whole mailbox request again. The INSTALL FLOW mailbox consumer can read-modify-write the existing entry. Similarly while installing new flow rules for a VF, the base flow steering rule match creteria is copied to the new flow rule and the deltas are appended to the new rule. Signed-off-by: Naveen Mamindlapalli Co-developed-by: Vamsi Attunuru Signed-off-by: Vamsi Attunuru Signed-off-by: Sunil Goutham --- drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 22 +++ .../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 70 ++ 2 files changed, 92 insertions(+) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h index ef20078508a5..8ea132ec1784 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -192,6 +192,11 @@ M(NPC_INSTALL_FLOW, 0x600d, npc_install_flow, \ npc_install_flow_req, npc_install_flow_rsp) \ M(NPC_DELETE_FLOW, 0x600e, npc_delete_flow, \ npc_delete_flow_req, msg_rsp) \ +M(NPC_MCAM_READ_ENTRY, 0x600f, npc_mcam_read_entry, \ + npc_mcam_read_entry_req, \ + npc_mcam_read_entry_rsp) \ +M(NPC_MCAM_READ_BASE_RULE, 0x6011, npc_read_base_steer_rule,\ + msg_req, npc_mcam_read_base_rule_rsp) \ /* NIX mbox IDs (range 0x8000 - 0x) */ \ M(NIX_LF_ALLOC,0x8000, nix_lf_alloc, \ nix_lf_alloc_req, nix_lf_alloc_rsp)\ @@ -1009,6 +1014,23 @@ struct npc_delete_flow_req { u8 all; /* PF + VFs */ }; +struct npc_mcam_read_entry_req { + struct mbox_msghdr hdr; + u16 entry; /* MCAM entry to read */ +}; + +struct npc_mcam_read_entry_rsp { + struct mbox_msghdr hdr; + struct mcam_entry entry_data; + u8 intf; + u8 enable; +}; + +struct npc_mcam_read_base_rule_rsp { + struct mbox_msghdr hdr; + struct mcam_entry entry; +}; + enum ptp_op { PTP_OP_ADJFINE = 0, PTP_OP_GET_CLOCK = 1, diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c index 84e954dafe85..9b5c5b376cc6 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c @@ -2194,6 +2194,30 @@ int rvu_mbox_handler_npc_mcam_free_entry(struct rvu *rvu, return rc; } +int rvu_mbox_handler_npc_mcam_read_entry(struct rvu *rvu, +struct npc_mcam_read_entry_req *req, +struct npc_mcam_read_entry_rsp *rsp) +{ + struct npc_mcam *mcam = >hw->mcam; + u16 pcifunc = req->hdr.pcifunc; + int blkaddr, rc; + + blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0); + if (blkaddr < 0) + return NPC_MCAM_INVALID_REQ; + + mutex_lock(>lock); + rc = npc_mcam_verify_entry(mcam, pcifunc, req->entry); + if (!rc) { + npc_read_mcam_entry(rvu, mcam, blkaddr, req->entry, + >entry_data, + >intf, >enable); + } + + mutex_unlock(>lock); + return rc; +} + int rvu_mbox_handler_npc_mcam_write_entry(struct rvu *rvu, struct npc_mcam_write_entry_req *req, struct msg_rsp *rsp) @@ -2754,3 +2778,49 @@ bool rvu_npc_write_default_rule(struct rvu *rvu, int blkaddr, int nixlf, return enable; } + +int rvu_mbox_handler_npc_read_base_steer_rule(struct rvu *rvu, + struct msg_req *req, + struct npc_mcam_read_base_rule_rsp *rsp) +{ + struct npc_mcam *mcam = >hw->mcam; + int index, blkaddr, nixlf, rc = 0; + u16 pcifunc = req->hdr.pcifunc; + struct rvu_pfvf *pfvf; + u8 intf, enable; + + blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0); + if (blkaddr < 0) + return NPC_MCAM_INVALID_REQ; + + /* Return the channel number in case of PF */ + if (!(pcifunc & RVU_PFVF_FUNC_MASK)) { + pfvf = rvu_get_pfvf(rvu, pcifunc); + rsp->entry.kw[0] = pfvf->rx_chan_base; + rsp->entry.kw_mask[0] = 0xFFFULL; + goto out; + } + + /* Find the pkt steering rule installed by PF to this VF */ + mutex_lock(>lock); + for (index
[PATCH v3 net-next 13/13] octeontx2-af: Delete NIX_RXVLAN_ALLOC mailbox message
From: Subbaraya Sundeep Since mailbox message for installing flows is in place, remove the RXVLAN_ALLOC mbox message which is redundant. Signed-off-by: Subbaraya Sundeep Signed-off-by: Sunil Goutham Signed-off-by: Naveen Mamindlapalli --- drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 1 - drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 6 --- .../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 59 -- .../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 24 - 4 files changed, 90 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h index 8ea132ec1784..cb4e3d86b58b 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -226,7 +226,6 @@ M(NIX_SET_RX_CFG, 0x8010, nix_set_rx_cfg, nix_rx_cfg, msg_rsp)\ M(NIX_LSO_FORMAT_CFG, 0x8011, nix_lso_format_cfg, \ nix_lso_format_cfg,\ nix_lso_format_cfg_rsp)\ -M(NIX_RXVLAN_ALLOC,0x8012, nix_rxvlan_alloc, msg_req, msg_rsp) \ M(NIX_LF_PTP_TX_ENABLE, 0x8013, nix_lf_ptp_tx_enable, msg_req, msg_rsp) \ M(NIX_LF_PTP_TX_DISABLE, 0x8014, nix_lf_ptp_tx_disable, msg_req, msg_rsp) \ M(NIX_BP_ENABLE, 0x8016, nix_bp_enable, nix_bp_cfg_req, \ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h index 4bc75be6d45b..044dde24865c 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h @@ -217,11 +217,6 @@ struct rvu_pfvf { u16 bcast_mce_idx; struct nix_mce_list bcast_mce_list; - /* VLAN offload */ - struct mcam_entry entry; - int rxvlan_index; - bool rxvlan; - struct rvu_npc_mcam_rule *def_ucast_rule; boolcgx_in_use; /* this PF/VF using CGX? */ @@ -571,7 +566,6 @@ void rvu_npc_enable_promisc_entry(struct rvu *rvu, u16 pcifunc, int nixlf); void rvu_npc_install_bcast_match_entry(struct rvu *rvu, u16 pcifunc, int nixlf, u64 chan); void rvu_npc_enable_bcast_entry(struct rvu *rvu, u16 pcifunc, bool enable); -int rvu_npc_update_rxvlan(struct rvu *rvu, u16 pcifunc, int nixlf); void rvu_npc_disable_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf); void rvu_npc_free_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf); void rvu_npc_disable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf); diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c index f5affb809c77..89601e796c85 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c @@ -3144,65 +3144,6 @@ int rvu_mbox_handler_nix_set_hw_frs(struct rvu *rvu, struct nix_frs_cfg *req, return 0; } -int rvu_mbox_handler_nix_rxvlan_alloc(struct rvu *rvu, struct msg_req *req, - struct msg_rsp *rsp) -{ - struct npc_mcam_alloc_entry_req alloc_req = { }; - struct npc_mcam_alloc_entry_rsp alloc_rsp = { }; - struct npc_mcam_free_entry_req free_req = { }; - u16 pcifunc = req->hdr.pcifunc; - int blkaddr, nixlf, err; - struct rvu_pfvf *pfvf; - - /* LBK VFs do not have separate MCAM UCAST entry hence -* skip allocating rxvlan for them -*/ - if (is_afvf(pcifunc)) - return 0; - - pfvf = rvu_get_pfvf(rvu, pcifunc); - if (pfvf->rxvlan) - return 0; - - /* alloc new mcam entry */ - alloc_req.hdr.pcifunc = pcifunc; - alloc_req.count = 1; - - err = rvu_mbox_handler_npc_mcam_alloc_entry(rvu, _req, - _rsp); - if (err) - return err; - - /* update entry to enable rxvlan offload */ - blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc); - if (blkaddr < 0) { - err = NIX_AF_ERR_AF_LF_INVALID; - goto free_entry; - } - - nixlf = rvu_get_lf(rvu, >hw->block[blkaddr], pcifunc, 0); - if (nixlf < 0) { - err = NIX_AF_ERR_AF_LF_INVALID; - goto free_entry; - } - - pfvf->rxvlan_index = alloc_rsp.entry_list[0]; - /* all it means is that rxvlan_index is valid */ - pfvf->rxvlan = true; - - err = rvu_npc_update_rxvlan(rvu, pcifunc, nixlf); - if (err) - goto free_entry; - - return 0; -free_entry: - free_req.hdr.pcifunc = pcifunc; - free_req.entry = alloc_rsp.entry_list[0]; - rvu_mbox_handler_npc_mcam_free_entry(rvu, _req, rsp); - pfvf->rxvlan = false; - return err; -} - int rvu_mbox_handler_nix_set_rx_cfg(struct rvu *rvu, struct nix_rx_cfg *req,
[PATCH v8 21/22] perf arm_spe: Decode memory tagging properties
From: Andre Przywara When SPE records a physical address, it can additionally tag the event with information from the Memory Tagging architecture extension. Decode the two additional fields in the SPE event payload. [leoy: Refined patch to use predefined macros] Signed-off-by: Andre Przywara Signed-off-by: Leo Yan Reviewed-by: Dave Martin --- tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 6 +- tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h | 2 ++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 55c4bf330b96..cefdc52b 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -385,6 +385,7 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet, char *buf, size_t buf_len) { int ns, el, idx = packet->index; + int ch, pat; u64 payload = packet->payload; int err = 0; @@ -404,9 +405,12 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet, break; case SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS: ns = !!SPE_ADDR_PKT_GET_NS(payload); + ch = !!SPE_ADDR_PKT_GET_CH(payload); + pat = SPE_ADDR_PKT_GET_PAT(payload); payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload); arm_spe_pkt_snprintf(, , _len, -"PA 0x%llx ns=%d", payload, ns); +"PA 0x%llx ns=%d ch=%d pat=%x", +payload, ns, ch, pat); break; default: /* Unknown index */ diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h index 7032fc141ad4..1ad14885c2a1 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h @@ -73,6 +73,8 @@ struct arm_spe_pkt { #define SPE_ADDR_PKT_GET_NS(v) (((v) & BIT_ULL(63)) >> 63) #define SPE_ADDR_PKT_GET_EL(v) (((v) & GENMASK_ULL(62, 61)) >> 61) +#define SPE_ADDR_PKT_GET_CH(v) (((v) & BIT_ULL(62)) >> 62) +#define SPE_ADDR_PKT_GET_PAT(v)(((v) & GENMASK_ULL(59, 56)) >> 56) #define SPE_ADDR_PKT_EL0 0 #define SPE_ADDR_PKT_EL1 1 -- 2.17.1
Re: [PATCH 01/30] drm/radeon/evergreen: Add comment for 'evergreen_page_flip()'s 'async' param
On Tue, 10 Nov 2020, Alex Deucher wrote: > On Tue, Nov 10, 2020 at 2:31 PM Lee Jones wrote: > > > > Fixes the following W=1 kernel build warning(s): > > > > drivers/gpu/drm/radeon/evergreen.c: In function ‘evergreen_gpu_init’: > > drivers/gpu/drm/radeon/evergreen.c:1419: warning: Function parameter or > > member 'async' not described in 'evergreen_page_flip' > > > > Cc: Alex Deucher > > Cc: "Christian König" > > Cc: David Airlie > > Cc: Daniel Vetter > > Cc: amd-...@lists.freedesktop.org > > Cc: dri-de...@lists.freedesktop.org > > Signed-off-by: Lee Jones > > Applied with minor fixups. Thanks! Superstar! Thanks Alex. Once these are all in -next, I'll rebase and fix the stragglers. -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog
[PATCH v3 net-next 11/13] octeontx2-af: Handle PF-VF mac address changes
From: Hariprasad Kelam This patch handles the VF mac address changes as given below. 1. mac addr configrued by VF will be retained until VF module unload. 2. mac addr configred by PF for VF will be retained until power cycle. 3. mac addr confgired by PF for its VF can't be overwritten by VF. Signed-off-by: Hariprasad Kelam Signed-off-by: Sunil Goutham Signed-off-by: Naveen Mamindlapalli --- drivers/net/ethernet/marvell/octeontx2/af/rvu.c| 12 +++- drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 2 ++ drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c| 9 + drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 17 ++--- 4 files changed, 36 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c index e8b5aaf73201..9f901c0edcbb 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c @@ -727,6 +727,10 @@ static void rvu_setup_pfvf_macaddress(struct rvu *rvu) u64 *mac; for (pf = 0; pf < hw->total_pfs; pf++) { + /* For PF0(AF), Assign MAC address to only VFs (LBKVFs) */ + if (!pf) + goto lbkvf; + if (!is_pf_cgxmapped(rvu, pf)) continue; /* Assign MAC address to PF */ @@ -740,8 +744,10 @@ static void rvu_setup_pfvf_macaddress(struct rvu *rvu) } else { eth_random_addr(pfvf->mac_addr); } + ether_addr_copy(pfvf->default_mac, pfvf->mac_addr); - /* Assign MAC address to VFs */ +lbkvf: + /* Assign MAC address to VFs*/ rvu_get_pf_numvfs(rvu, pf, , ); for (vf = 0; vf < numvfs; vf++, hwvf++) { pfvf = >hwvf[hwvf]; @@ -754,6 +760,7 @@ static void rvu_setup_pfvf_macaddress(struct rvu *rvu) } else { eth_random_addr(pfvf->mac_addr); } + ether_addr_copy(pfvf->default_mac, pfvf->mac_addr); } } } @@ -1176,6 +1183,9 @@ static void rvu_detach_block(struct rvu *rvu, int pcifunc, int blktype) if (blkaddr < 0) return; + if (blktype == BLKTYPE_NIX) + rvu_nix_reset_mac(pfvf, pcifunc); + block = >block[blkaddr]; num_lfs = rvu_get_rsrc_mapcount(pfvf, block->addr); diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h index 15e668a87aa1..4bc75be6d45b 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h @@ -211,6 +211,7 @@ struct rvu_pfvf { u8 pf_set_vf_cfg; u8 mac_addr[ETH_ALEN]; /* MAC address of this PF/VF */ + u8 default_mac[ETH_ALEN]; /* MAC address from FWdata */ /* Broadcast pkt replication info */ u16 bcast_mce_idx; @@ -553,6 +554,7 @@ int nix_get_nixlf(struct rvu *rvu, u16 pcifunc, int *nixlf, int *nix_blkaddr); int nix_update_bcast_mce_list(struct rvu *rvu, u16 pcifunc, bool add); struct nix_hw *get_nix_hw(struct rvu_hwinfo *hw, int blkaddr); int rvu_get_next_nix_blkaddr(struct rvu *rvu, int blkaddr); +void rvu_nix_reset_mac(struct rvu_pfvf *pfvf, int pcifunc); /* NPC APIs */ int rvu_npc_init(struct rvu *rvu); diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c index 53c5556d7061..f5affb809c77 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c @@ -3737,3 +3737,12 @@ int rvu_mbox_handler_nix_lso_format_cfg(struct rvu *rvu, return 0; } + +void rvu_nix_reset_mac(struct rvu_pfvf *pfvf, int pcifunc) +{ + bool from_vf = !!(pcifunc & RVU_PFVF_FUNC_MASK); + + /* overwrite vf mac address with default_mac */ + if (from_vf) + ether_addr_copy(pfvf->mac_addr, pfvf->default_mac); +} diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c index 7bb5e6760509..2f4030821d8d 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c @@ -938,7 +938,8 @@ static void npc_update_tx_entry(struct rvu *rvu, struct rvu_pfvf *pfvf, static int npc_install_flow(struct rvu *rvu, int blkaddr, u16 target, int nixlf, struct rvu_pfvf *pfvf, struct npc_install_flow_req *req, - struct npc_install_flow_rsp *rsp, bool enable) + struct npc_install_flow_rsp *rsp, bool enable, + bool pf_set_vfs_mac) { struct
[PATCH v3 net-next 02/13] octeontx2-af: Verify MCAM entry channel and PF_FUNC
From: Subbaraya Sundeep This patch adds support to verify the channel number sent by mailbox requester before writing MCAM entry for Ingress packets. Similarly for Egress packets, verifying the PF_FUNC sent by the mailbox user. Signed-off-by: Subbaraya Sundeep Signed-off-by: Kiran Kumar K Signed-off-by: Sunil Goutham Signed-off-by: Naveen Mamindlapalli --- drivers/net/ethernet/marvell/octeontx2/af/rvu.c| 4 +- drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 2 + .../net/ethernet/marvell/octeontx2/af/rvu_npc.c| 78 ++ 3 files changed, 82 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c index a28a518c0eae..e8b5aaf73201 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c @@ -2642,7 +2642,7 @@ static void rvu_enable_afvf_intr(struct rvu *rvu) #define PCI_DEVID_OCTEONTX2_LBK 0xA061 -static int lbk_get_num_chans(void) +int rvu_get_num_lbk_chans(void) { struct pci_dev *pdev; void __iomem *base; @@ -2677,7 +2677,7 @@ static int rvu_enable_sriov(struct rvu *rvu) return 0; } - chans = lbk_get_num_chans(); + chans = rvu_get_num_lbk_chans(); if (chans < 0) return chans; diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h index 5ac9bb12415f..1724dbd18847 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h @@ -445,6 +445,7 @@ int rvu_get_lf(struct rvu *rvu, struct rvu_block *block, u16 pcifunc, u16 slot); int rvu_lf_reset(struct rvu *rvu, struct rvu_block *block, int lf); int rvu_get_blkaddr(struct rvu *rvu, int blktype, u16 pcifunc); int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero); +int rvu_get_num_lbk_chans(void); /* RVU HW reg validation */ enum regmap_block { @@ -535,6 +536,7 @@ bool is_npc_intf_tx(u8 intf); bool is_npc_intf_rx(u8 intf); bool is_npc_interface_valid(struct rvu *rvu, u8 intf); int rvu_npc_get_tx_nibble_cfg(struct rvu *rvu, u64 nibble_ena); +int npc_mcam_verify_channel(struct rvu *rvu, u16 pcifunc, u8 intf, u16 channel); #ifdef CONFIG_DEBUG_FS void rvu_dbg_init(struct rvu *rvu); diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c index 989533a3d2ce..3666159bb6b6 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c @@ -28,6 +28,8 @@ #define NPC_PARSE_RESULT_DMAC_OFFSET 8 #define NPC_HW_TSTAMP_OFFSET 8 +#define NPC_KEX_CHAN_MASK 0xFFFULL +#define NPC_KEX_PF_FUNC_MASK 0xULL static const char def_pfl_name[] = "default"; @@ -63,6 +65,54 @@ int rvu_npc_get_tx_nibble_cfg(struct rvu *rvu, u64 nibble_ena) return 0; } +static int npc_mcam_verify_pf_func(struct rvu *rvu, + struct mcam_entry *entry_data, u8 intf, + u16 pcifunc) +{ + u16 pf_func, pf_func_mask; + + if (is_npc_intf_rx(intf)) + return 0; + + pf_func_mask = (entry_data->kw_mask[0] >> 32) & + NPC_KEX_PF_FUNC_MASK; + pf_func = (entry_data->kw[0] >> 32) & NPC_KEX_PF_FUNC_MASK; + + pf_func = be16_to_cpu((__force __be16)pf_func); + if (pf_func_mask != NPC_KEX_PF_FUNC_MASK || + ((pf_func & ~RVU_PFVF_FUNC_MASK) != +(pcifunc & ~RVU_PFVF_FUNC_MASK))) + return -EINVAL; + + return 0; +} + +int npc_mcam_verify_channel(struct rvu *rvu, u16 pcifunc, u8 intf, u16 channel) +{ + int pf = rvu_get_pf(pcifunc); + u8 cgx_id, lmac_id; + int base = 0, end; + + if (is_npc_intf_tx(intf)) + return 0; + + if (is_afvf(pcifunc)) { + end = rvu_get_num_lbk_chans(); + if (end < 0) + return -EINVAL; + } else { + rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], _id, _id); + base = NIX_CHAN_CGX_LMAC_CHX(cgx_id, lmac_id, 0x0); + /* CGX mapped functions has maximum of 16 channels */ + end = NIX_CHAN_CGX_LMAC_CHX(cgx_id, lmac_id, 0xF); + } + + if (channel < base || channel > end) + return -EINVAL; + + return 0; +} + void rvu_npc_set_pkind(struct rvu *rvu, int pkind, struct rvu_pfvf *pfvf) { int blkaddr; @@ -1935,6 +1985,7 @@ int rvu_mbox_handler_npc_mcam_write_entry(struct rvu *rvu, struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc); struct npc_mcam *mcam = >hw->mcam; u16 pcifunc = req->hdr.pcifunc; + u16 channel, chan_mask; int blkaddr, rc; u8 nix_intf; @@ -1942,6 +1993,10 @@ int rvu_mbox_handler_npc_mcam_write_entry(struct rvu
[PATCH v8 10/22] perf arm-spe: Refactor address packet handling
This patch is to refactor address packet handling, it defines macros for address packet's header and payload, these macros are used by decoder and the dump flow. Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../util/arm-spe-decoder/arm-spe-decoder.c| 29 --- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 26 +++--- .../arm-spe-decoder/arm-spe-pkt-decoder.h | 35 --- 3 files changed, 48 insertions(+), 42 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c index cc18a1e8c212..776b3e6628bb 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c @@ -24,36 +24,35 @@ static u64 arm_spe_calc_ip(int index, u64 payload) { - u8 *addr = (u8 *) - int ns, el; + u64 ns, el; /* Instruction virtual address or Branch target address */ if (index == SPE_ADDR_PKT_HDR_INDEX_INS || index == SPE_ADDR_PKT_HDR_INDEX_BRANCH) { - ns = addr[7] & SPE_ADDR_PKT_NS; - el = (addr[7] & SPE_ADDR_PKT_EL_MASK) >> SPE_ADDR_PKT_EL_OFFSET; + ns = SPE_ADDR_PKT_GET_NS(payload); + el = SPE_ADDR_PKT_GET_EL(payload); + + /* Clean highest byte */ + payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload); /* Fill highest byte for EL1 or EL2 (VHE) mode */ if (ns && (el == SPE_ADDR_PKT_EL1 || el == SPE_ADDR_PKT_EL2)) - addr[7] = 0xff; - /* Clean highest byte for other cases */ - else - addr[7] = 0x0; + payload |= 0xffULL << SPE_ADDR_PKT_ADDR_BYTE7_SHIFT; /* Data access virtual address */ } else if (index == SPE_ADDR_PKT_HDR_INDEX_DATA_VIRT) { + /* Clean tags */ + payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload); + /* Fill highest byte if bits [48..55] is 0xff */ - if (addr[6] == 0xff) - addr[7] = 0xff; - /* Otherwise, cleanup tags */ - else - addr[7] = 0x0; + if (SPE_ADDR_PKT_ADDR_GET_BYTE_6(payload) == 0xffULL) + payload |= 0xffULL << SPE_ADDR_PKT_ADDR_BYTE7_SHIFT; /* Data access physical address */ } else if (index == SPE_ADDR_PKT_HDR_INDEX_DATA_PHYS) { - /* Cleanup byte 7 */ - addr[7] = 0x0; + /* Clean highest byte */ + payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload); } else { pr_err("unsupported address packet index: 0x%x\n", index); } diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 0aa15632e87b..05d63e77f741 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -13,9 +13,6 @@ #include "arm-spe-pkt-decoder.h" -#define NS_FLAGBIT(63) -#define EL_FLAG(BIT(62) | BIT(61)) - #if __BYTE_ORDER == __BIG_ENDIAN #define le16_to_cpu bswap_16 #define le32_to_cpu bswap_32 @@ -167,10 +164,11 @@ static int arm_spe_get_addr(const unsigned char *buf, size_t len, const unsigned char ext_hdr, struct arm_spe_pkt *packet) { packet->type = ARM_SPE_ADDRESS; + if (ext_hdr) - packet->index = ((buf[0] & 0x3) << 3) | (buf[1] & 0x7); + packet->index = SPE_HDR_EXTENDED_INDEX(buf[0], buf[1]); else - packet->index = buf[0] & 0x7; + packet->index = SPE_HDR_SHORT_INDEX(buf[0]); return arm_spe_get_payload(buf, len, ext_hdr, packet); } @@ -296,22 +294,22 @@ static int arm_spe_pkt_desc_addr(const struct arm_spe_pkt *packet, int err = 0; switch (idx) { - case 0: - case 1: - ns = !!(packet->payload & NS_FLAG); - el = (packet->payload & EL_FLAG) >> 61; - payload &= ~(0xffULL << 56); + case SPE_ADDR_PKT_HDR_INDEX_INS: + case SPE_ADDR_PKT_HDR_INDEX_BRANCH: + ns = !!SPE_ADDR_PKT_GET_NS(payload); + el = SPE_ADDR_PKT_GET_EL(payload); + payload = SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(payload); arm_spe_pkt_snprintf(, , _len, "%s 0x%llx el%d ns=%d", (idx == 1) ? "TGT" : "PC", payload, el, ns); break; - case 2: + case SPE_ADDR_PKT_HDR_INDEX_DATA_VIRT: arm_spe_pkt_snprintf(, , _len, "VA 0x%llx", payload); break; - case 3: - ns = !!(packet->payload & NS_FLAG); - payload &= ~(0xffULL << 56); + case
[PATCH v8 06/22] perf arm-spe: Refactor printing string to buffer
When outputs strings to the decoding buffer with function snprintf(), SPE decoder needs to detects if any error returns from snprintf() and if so needs to directly bail out. If snprintf() returns success, it needs to update buffer pointer and reduce the buffer length so can continue to output the next string into the consequent memory space. This complex logics are spreading in the function arm_spe_pkt_desc() so there has many duplicate codes for handling error detecting, increment buffer pointer and decrement buffer size. To avoid the duplicate code, this patch introduces a new helper function arm_spe_pkt_snprintf() which is used to wrap up the complex logics, and it's used by the caller arm_spe_pkt_desc(). This patch also moves the variable 'blen' as the function's local variable, this allows to remove the unnecessary braces and improve the readability. Suggested-by: Dave Martin Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 260 +- 1 file changed, 126 insertions(+), 134 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 04fd7fd7c15f..1970686f7020 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -9,6 +9,7 @@ #include #include #include +#include #include "arm-spe-pkt-decoder.h" @@ -258,192 +259,183 @@ int arm_spe_get_packet(const unsigned char *buf, size_t len, return ret; } +static int arm_spe_pkt_snprintf(int *err, char **buf_p, size_t *blen, + const char *fmt, ...) +{ + va_list ap; + int ret; + + /* Bail out if any error occurred */ + if (err && *err) + return *err; + + va_start(ap, fmt); + ret = vsnprintf(*buf_p, *blen, fmt, ap); + va_end(ap); + + if (ret < 0) { + if (err && !*err) + *err = ret; + + /* +* A return value of (*blen - 1) or more means that the +* output was truncated and the buffer is overrun. +*/ + } else if (ret >= ((int)*blen - 1)) { + (*buf_p)[*blen - 1] = '\0'; + + /* +* Set *err to 'ret' to avoid overflow if tries to +* fill this buffer sequentially. +*/ + if (err && !*err) + *err = ret; + } else { + *buf_p += ret; + *blen -= ret; + } + + return ret; +} + int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, size_t buf_len) { int ret, ns, el, idx = packet->index; unsigned long long payload = packet->payload; const char *name = arm_spe_pkt_name(packet->type); + size_t blen = buf_len; + int err = 0; switch (packet->type) { case ARM_SPE_BAD: case ARM_SPE_PAD: case ARM_SPE_END: - return snprintf(buf, buf_len, "%s", name); - case ARM_SPE_EVENTS: { - size_t blen = buf_len; - - ret = 0; - ret = snprintf(buf, buf_len, "EV"); - buf += ret; - blen -= ret; - if (payload & 0x1) { - ret = snprintf(buf, buf_len, " EXCEPTION-GEN"); - buf += ret; - blen -= ret; - } - if (payload & 0x2) { - ret = snprintf(buf, buf_len, " RETIRED"); - buf += ret; - blen -= ret; - } - if (payload & 0x4) { - ret = snprintf(buf, buf_len, " L1D-ACCESS"); - buf += ret; - blen -= ret; - } - if (payload & 0x8) { - ret = snprintf(buf, buf_len, " L1D-REFILL"); - buf += ret; - blen -= ret; - } - if (payload & 0x10) { - ret = snprintf(buf, buf_len, " TLB-ACCESS"); - buf += ret; - blen -= ret; - } - if (payload & 0x20) { - ret = snprintf(buf, buf_len, " TLB-REFILL"); - buf += ret; - blen -= ret; - } - if (payload & 0x40) { - ret = snprintf(buf, buf_len, " NOT-TAKEN"); - buf += ret; - blen -= ret; - } - if (payload & 0x80) { - ret = snprintf(buf, buf_len, " MISPRED"); - buf += ret; - blen -= ret; - } + return arm_spe_pkt_snprintf(, , , "%s", name); + case ARM_SPE_EVENTS: + ret
[PATCH v8 04/22] perf arm-spe: Refactor arm_spe_get_events()
In function arm_spe_get_events(), the event packet's 'index' is assigned as payload length, but the flow is not directive: it firstly gets the packet length from the return value of arm_spe_get_payload(), the value includes header length (1) and payload length: int ret = arm_spe_get_payload(buf, len, packet); and then reduces header length from packet length, so finally get the payload length: packet->index = ret - 1; To simplify the code, this patch directly assigns payload length to event packet's index; and at the end it calls arm_spe_get_payload() to return the payload value. Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 06b3eec4494e..f1b4cb008837 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -136,8 +136,6 @@ static int arm_spe_get_timestamp(const unsigned char *buf, size_t len, static int arm_spe_get_events(const unsigned char *buf, size_t len, struct arm_spe_pkt *packet) { - int ret = arm_spe_get_payload(buf, len, packet); - packet->type = ARM_SPE_EVENTS; /* we use index to identify Events with a less number of @@ -145,9 +143,9 @@ static int arm_spe_get_events(const unsigned char *buf, size_t len, * LLC-REFILL, and REMOTE-ACCESS events are identified if * index > 1. */ - packet->index = ret - 1; + packet->index = arm_spe_payload_len(buf[0]); - return ret; + return arm_spe_get_payload(buf, len, packet); } static int arm_spe_get_data_source(const unsigned char *buf, size_t len, -- 2.17.1
[PATCH v8 02/22] perf arm-spe: Fix a typo in comment
Fix a typo: s/iff/if. Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 46ddb53a6457..7c7b5eb09fba 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -142,7 +142,7 @@ static int arm_spe_get_events(const unsigned char *buf, size_t len, /* we use index to identify Events with a less number of * comparisons in arm_spe_pkt_desc(): E.g., the LLC-ACCESS, -* LLC-REFILL, and REMOTE-ACCESS events are identified iff +* LLC-REFILL, and REMOTE-ACCESS events are identified if * index > 1. */ packet->index = ret - 1; -- 2.17.1
[PATCH v8 03/22] perf arm-spe: Refactor payload size calculation
This patch defines macro to extract "sz" field from header, and renames the function payloadlen() to arm_spe_payload_len(). Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index 7c7b5eb09fba..06b3eec4494e 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -69,22 +69,22 @@ const char *arm_spe_pkt_name(enum arm_spe_pkt_type type) return arm_spe_packet_name[type]; } -/* return ARM SPE payload size from its encoding, - * which is in bits 5:4 of the byte. - * 00 : byte - * 01 : halfword (2) - * 10 : word (4) - * 11 : doubleword (8) +/* + * Extracts the field "sz" from header bits and converts to bytes: + * 00 : byte (1) + * 01 : halfword (2) + * 10 : word (4) + * 11 : doubleword (8) */ -static int payloadlen(unsigned char byte) +static unsigned int arm_spe_payload_len(unsigned char hdr) { - return 1 << ((byte & 0x30) >> 4); + return 1U << ((hdr & GENMASK_ULL(5, 4)) >> 4); } static int arm_spe_get_payload(const unsigned char *buf, size_t len, struct arm_spe_pkt *packet) { - size_t payload_len = payloadlen(buf[0]); + size_t payload_len = arm_spe_payload_len(buf[0]); if (len < 1 + payload_len) return ARM_SPE_NEED_MORE_BYTES; -- 2.17.1
Re: [PATCH v4 bpf-next 4/5] bpf: load and verify kernel module BTFs
Hi Andrii, I love your patch! Perhaps something to improve: [auto build test WARNING on bpf-next/master] url: https://github.com/0day-ci/linux/commits/Andrii-Nakryiko/Integrate-kernel-module-BTF-support/20201110-095309 base: https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next.git master config: mips-randconfig-r002-20201110 (attached as .config) compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 4d81c8adb6ed9840257f6cb6b93f60856d422a15) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install mips cross compiling tool for clang build # apt-get install binutils-mips-linux-gnu # https://github.com/0day-ci/linux/commit/dcd763b7808fdc01ebf70bbe07ba92388df4d20d git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Andrii-Nakryiko/Integrate-kernel-module-BTF-support/20201110-095309 git checkout dcd763b7808fdc01ebf70bbe07ba92388df4d20d # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=mips If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All warnings (new ones prefixed by >>): >> kernel/bpf/btf.c:4481:20: warning: unused function 'btf_parse_module' static struct btf char const void unsigned int data_size) ^ fatal error: error in backend: Nested variants found in inline asm string: ' .set push .set mips64r2 .if ( 0x00 ) != -1)) 0x00 ) != -1)) : ($( static struct ftrace_branch_data __attribute__((__aligned__(4))) __attribute__((__section__("_ftrace_branch"))) __if_trace = $( .func = __func__, .file = "arch/mips/include/asm/atomic.h", .line = 154, $); 0x00 ) != -1)) : $))) ) && ( 0 ); .set push; .set mips64r2; .rept 1; sync 0x00; .endr; .set pop; .else; ; .endif 1: ll $1, $2 # atomic_fetch_sub subu $0, $1, $3 sc $0, $2 beqz $0, 1b .set pop move $0, $1 ' clang-12: error: clang frontend command failed with exit code 70 (use -v to see invocation) clang version 12.0.0 (git://gitmirror/llvm_project 874b0a0b9db93f5d3350ffe6b5efda2d908415d0) Target: mipsel-unknown-linux-gnu Thread model: posix InstalledDir: /opt/cross/clang-874b0a0b9d/bin clang-12: note: diagnostic msg: Makefile arch drivers include kernel mm scripts source usr vim +/btf_parse_module +4481 kernel/bpf/btf.c 4480 > 4481 static struct btf *btf_parse_module(const char *module_name, const void > *data, unsigned int data_size) 4482 { 4483 struct btf_verifier_env *env = NULL; 4484 struct bpf_verifier_log *log; 4485 struct btf *btf = NULL, *base_btf; 4486 int err; 4487 4488 base_btf = bpf_get_btf_vmlinux(); 4489 if (IS_ERR(base_btf)) 4490 return base_btf; 4491 if (!base_btf) 4492 return ERR_PTR(-EINVAL); 4493 4494 env = kzalloc(sizeof(*env), GFP_KERNEL | __GFP_NOWARN); 4495 if (!env) 4496 return ERR_PTR(-ENOMEM); 4497 4498 log = >log; 4499 log->level = BPF_LOG_KERNEL; 4500 4501 btf = kzalloc(sizeof(*btf), GFP_KERNEL | __GFP_NOWARN); 4502 if (!btf) { 4503 err = -ENOMEM; 4504 goto errout; 4505 } 4506 env->btf = btf; 4507 4508 btf->base_btf = base_btf; 4509 btf->start_id = base_btf->nr_types; 4510 btf->start_str_off = base_btf->hdr.str_len; 4511 btf->kernel_btf = true; 4512 snprintf(btf->name, sizeof(btf->name), "%s", module_name); 4513 4514 btf->data = kvmalloc(data_size, GFP_KERNEL | __GFP_NOWARN); 4515 if (!btf->data) { 4516 err = -ENOMEM; 4517 goto errout; 4518 } 4519 memcpy(btf->data, data, data_size); 4520 btf->data_size = data_size; 4521 4522 err = btf_parse_hdr(env); 4523 if (err) 4524 goto errout; 4525 4526 btf->nohdr_data = btf->data + btf->hdr.hdr_len; 4527 4528 err = btf_parse_str_sec(env); 4529 if (err) 4530 goto errout; 4531 4532 err = btf_check_all_metas(env); 4533 if (err) 4534 goto errout; 4535 4536 btf_verifier_env_free(env); 4537 refcount_set(>refcnt, 1); 4538 return btf; 4539 4540 errout: 4541 btf_verifier_env_free(env); 4542 if (btf) { 4543 kvfree(btf->data); 4544 kvfree(btf->types); 4545
Re: [PATCH 19/25] soc: qcom: smp2p: Remove unused struct attribute provide another
On Tue, 10 Nov 2020, Bjorn Andersson wrote: > On Tue 03 Nov 09:28 CST 2020, Lee Jones wrote: > > > Fixes the following W=1 kernel build warning(s): > > > > drivers/soc/qcom/smp2p.c:74: warning: Function parameter or member 'flags' > > not described in 'smp2p_smem_item' > > drivers/soc/qcom/smp2p.c:149: warning: Function parameter or member 'out' > > not described in 'qcom_smp2p' > > > > Cc: Andy Gross > > Cc: Bjorn Andersson > > Cc: linux-arm-...@vger.kernel.org > > Signed-off-by: Lee Jones > > --- > > drivers/soc/qcom/smp2p.c | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > diff --git a/drivers/soc/qcom/smp2p.c b/drivers/soc/qcom/smp2p.c > > index a9709aae54abb..43df63419c327 100644 > > --- a/drivers/soc/qcom/smp2p.c > > +++ b/drivers/soc/qcom/smp2p.c > > @@ -52,7 +52,6 @@ > > * @remote_pid:processor id of receiving end > > * @total_entries: number of entries - always SMP2P_MAX_ENTRY > > * @valid_entries: number of allocated entries > > - * @flags: > > * @entries: individual communication entries > > * @name: name of the entry > > * @value: content of the entry > > @@ -65,7 +64,6 @@ struct smp2p_smem_item { > > u16 remote_pid; > > u16 total_entries; > > u16 valid_entries; > > - u32 flags; > > This struct describes the data shared between processors in the SoC and > as such these 32 bits are significant. I believe we have an incoming > patch that adds handling of some flag, so let's document it properly > at that time. Sounds reasonable. > I've applied the second half of the patch for now. Thanks. And for the other applied patches too. -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog
[PATCH v8 00/22] perf arm-spe: Refactor decoding & dumping flow
This is patch set v8 for refactoring Arm SPE trace decoding and dumping. This version addresses Andre's comment to pass parameter '_len' at the last call arm_spe_pkt_snprintf() in the function arm_spe_pkt_desc(). This patch set is cleanly applied on the top of perf/core branch with commit 644bf4b0f7ac ("perf jevents: Add test for arch std events"). I retested this patch set on Hisilicon D06 platform with commands "perf report -D" and "perf script", compared the decoding results between with this patch set and without this patch set, "diff" tool shows the result as expected. Changes from v7: - Changed to pass '_len' for the last call arm_spe_pkt_snprintf() in the patch 07/22 (Andre). Changes from v6: - Removed the redundant comma from the string in the patch 21/22 "perf arm_spe: Decode memory tagging properties" (Dave); - Refined the return value for arm_spe_pkt_desc(): returns 0 for success, otherwise returns non zero for failures; handle error code at the end of function arm_spe_pkt_desc(); this is accomplished in the new patch 07/22 "perf arm-spe: Consolidate arm_spe_pkt_desc()'s return value" (Dave). Changes from v5: - Directly bail out arm_spe_pkt_snprintf() if any error occurred (Andre). Changes from v4: - Implemented a cumulative error for arm_spe_pkt_snprintf() and changed to condense code for printing strings (Dave); - Changed to check payload bits [55:52] for parse kernel address (Andre). Changes from v3: - Refined arm_spe_payload_len() and removed macro SPE_HEADER_SZ() (Andre); - Refined packet header index macros (Andre); - Added patch "perf arm_spe: Fixup top byte for data virtual address" to fixup the data virtual address for 64KB pages and refined comments for the fixup (Andre); - Added Andre's review tag (using "b4 am" command); - Changed the macros to SPE_PKT_IS_XXX() format to check operation types (Andre). Andre Przywara (1): perf arm_spe: Decode memory tagging properties Leo Yan (20): perf arm-spe: Include bitops.h for BIT() macro perf arm-spe: Fix a typo in comment perf arm-spe: Refactor payload size calculation perf arm-spe: Refactor arm_spe_get_events() perf arm-spe: Fix packet length handling perf arm-spe: Refactor printing string to buffer perf arm-spe: Consolidate arm_spe_pkt_desc()'s return value perf arm-spe: Refactor packet header parsing perf arm-spe: Add new function arm_spe_pkt_desc_addr() perf arm-spe: Refactor address packet handling perf arm_spe: Fixup top byte for data virtual address perf arm-spe: Refactor context packet handling perf arm-spe: Add new function arm_spe_pkt_desc_counter() perf arm-spe: Refactor counter packet handling perf arm-spe: Add new function arm_spe_pkt_desc_event() perf arm-spe: Refactor event type handling perf arm-spe: Remove size condition checking for events perf arm-spe: Add new function arm_spe_pkt_desc_op_type() perf arm-spe: Refactor operation packet handling perf arm-spe: Add more sub classes for operation packet Wei Li (1): perf arm-spe: Add support for ARMv8.3-SPE .../util/arm-spe-decoder/arm-spe-decoder.c| 59 +- .../util/arm-spe-decoder/arm-spe-decoder.h| 17 - .../arm-spe-decoder/arm-spe-pkt-decoder.c | 601 ++ .../arm-spe-decoder/arm-spe-pkt-decoder.h | 122 +++- tools/perf/util/arm-spe.c | 2 +- 5 files changed, 479 insertions(+), 322 deletions(-) -- 2.17.1
[PATCH v4] hwmon: Add driver for STMicroelectronics PM6764 Voltage Regulator
Add the pmbus driver for the STMicroelectronics pm6764 voltage regulator. the output voltage use the MFR_READ_VOUT 0xD4 vout value returned is linear11 Signed-off-by: Charles Hsu --- v4: - Add pm6764tr to Documentation/hwmon/index.rst. v3: - Add Documentation(Documentation/hwmon/pm6764tr.rst). - Fix include order. v2: - Fix formatting. - Remove pmbus_do_remove. - Change from .probe to .probe_new. v1: - Initial patchset. --- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/pm6764tr.rst | 33 ++ drivers/hwmon/pmbus/Kconfig | 9 drivers/hwmon/pmbus/Makefile | 1 + drivers/hwmon/pmbus/pm6764tr.c | 78 5 files changed, 122 insertions(+) create mode 100644 Documentation/hwmon/pm6764tr.rst create mode 100644 drivers/hwmon/pmbus/pm6764tr.c diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index b797db738225..1bbd05e41de4 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -144,6 +144,7 @@ Hardware Monitoring Kernel Drivers pc87360 pc87427 pcf8591 + pm6764tr pmbus powr1220 pxe1610 diff --git a/Documentation/hwmon/pm6764tr.rst b/Documentation/hwmon/pm6764tr.rst new file mode 100644 index ..5e8092e39297 --- /dev/null +++ b/Documentation/hwmon/pm6764tr.rst @@ -0,0 +1,33 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +Kernel driver pm6764tr +== + +Supported chips: + + * ST PM6764TR + + Prefix: 'pm6764tr' + + Addresses scanned: - + + Datasheet: http://www.st.com/resource/en/data_brief/pm6764.pdf + +Authors: + + +Description: + + +This driver supports the STMicroelectronics PM6764TR chip. The PM6764TR is a high +performance digital controller designed to power Intel’s VR12.5 processors and memories. + +The device utilizes digital technology to implement all control and power management +functions to provide maximum flexibility and performance. The NVM is embedded to store +custom configurations. The PM6764TR device features up to 4-phase programmable operation. + +The PM6764TR supports power state transitions featuring VFDE, and programmable DPM +maintaining the best efficiency over all loading conditions without compromising transient +response. The device assures fast and independent protectionagainstload overcurrent, +under/overvoltage and feedback disconnections. + diff --git a/drivers/hwmon/pmbus/Kconfig b/drivers/hwmon/pmbus/Kconfig index a25faf69fce3..9c846facce9f 100644 --- a/drivers/hwmon/pmbus/Kconfig +++ b/drivers/hwmon/pmbus/Kconfig @@ -220,6 +220,15 @@ config SENSORS_MP2975 This driver can also be built as a module. If so, the module will be called mp2975. +config SENSORS_PM6764TR + tristate "ST PM6764TR" + help + If you say yes here you get hardware monitoring support for ST + PM6764TR. + + This driver can also be built as a module. If so, the module will + be called pm6764tr. + config SENSORS_PXE1610 tristate "Infineon PXE1610" help diff --git a/drivers/hwmon/pmbus/Makefile b/drivers/hwmon/pmbus/Makefile index 4c97ad0bd791..31ebdef5d4a6 100644 --- a/drivers/hwmon/pmbus/Makefile +++ b/drivers/hwmon/pmbus/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_SENSORS_MAX31785) += max31785.o obj-$(CONFIG_SENSORS_MAX34440) += max34440.o obj-$(CONFIG_SENSORS_MAX8688) += max8688.o obj-$(CONFIG_SENSORS_MP2975) += mp2975.o +obj-$(CONFIG_SENSORS_PM6764TR) += pm6764tr.o obj-$(CONFIG_SENSORS_PXE1610) += pxe1610.o obj-$(CONFIG_SENSORS_TPS40422) += tps40422.o obj-$(CONFIG_SENSORS_TPS53679) += tps53679.o diff --git a/drivers/hwmon/pmbus/pm6764tr.c b/drivers/hwmon/pmbus/pm6764tr.c new file mode 100644 index ..2ab68036bb0c --- /dev/null +++ b/drivers/hwmon/pmbus/pm6764tr.c @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Hardware monitoring driver for STMicroelectronics digital controller PM6764TR + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "pmbus.h" + +#define PM6764TR_PMBUS_READ_VOUT 0xD4 + +static int pm6764tr_read_word_data(struct i2c_client *client, int page, int reg) +{ + int ret; + + switch (reg) { + case PMBUS_VIRT_READ_VMON: + ret = pmbus_read_word_data(client, page, PM6764TR_PMBUS_READ_VOUT); + break; + default: + ret = -ENODATA; + break; + } + return ret; +} + +static struct pmbus_driver_info pm6764tr_info = { + .pages = 1, + .format[PSC_VOLTAGE_IN] = linear, + .format[PSC_VOLTAGE_OUT] = vid, + .format[PSC_TEMPERATURE] = linear, + .format[PSC_CURRENT_OUT] = linear, + .format[PSC_POWER] = linear, + .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | + PMBUS_HAVE_IOUT | PMBUS_HAVE_POUT | PMBUS_HAVE_VMON | + PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_STATUS_VOUT | + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP, +
[PATCH v8 05/22] perf arm-spe: Fix packet length handling
When processing address packet and counter packet, if the packet contains extended header, it misses to account the extra one byte for header length calculation, thus returns the wrong packet length. To correct the packet length calculation, one possible fixing is simply to plus extra 1 for extended header, but will spread some duplicate code in the flows for processing address packet and counter packet. Alternatively, we can refine the function arm_spe_get_payload() to not only support short header and allow it to support extended header, and rely on it for the packet length calculation. So this patch refactors function arm_spe_get_payload() with a new argument 'ext_hdr' for support extended header; the packet processing flows can invoke this function to unify the packet length calculation. Signed-off-by: Leo Yan Reviewed-by: Andre Przywara --- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 34 +++ 1 file changed, 12 insertions(+), 22 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index f1b4cb008837..04fd7fd7c15f 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -82,14 +82,15 @@ static unsigned int arm_spe_payload_len(unsigned char hdr) } static int arm_spe_get_payload(const unsigned char *buf, size_t len, + unsigned char ext_hdr, struct arm_spe_pkt *packet) { - size_t payload_len = arm_spe_payload_len(buf[0]); + size_t payload_len = arm_spe_payload_len(buf[ext_hdr]); - if (len < 1 + payload_len) + if (len < 1 + ext_hdr + payload_len) return ARM_SPE_NEED_MORE_BYTES; - buf++; + buf += 1 + ext_hdr; switch (payload_len) { case 1: packet->payload = *(uint8_t *)buf; break; @@ -99,7 +100,7 @@ static int arm_spe_get_payload(const unsigned char *buf, size_t len, default: return ARM_SPE_BAD_PACKET; } - return 1 + payload_len; + return 1 + ext_hdr + payload_len; } static int arm_spe_get_pad(struct arm_spe_pkt *packet) @@ -130,7 +131,7 @@ static int arm_spe_get_timestamp(const unsigned char *buf, size_t len, struct arm_spe_pkt *packet) { packet->type = ARM_SPE_TIMESTAMP; - return arm_spe_get_payload(buf, len, packet); + return arm_spe_get_payload(buf, len, 0, packet); } static int arm_spe_get_events(const unsigned char *buf, size_t len, @@ -145,14 +146,14 @@ static int arm_spe_get_events(const unsigned char *buf, size_t len, */ packet->index = arm_spe_payload_len(buf[0]); - return arm_spe_get_payload(buf, len, packet); + return arm_spe_get_payload(buf, len, 0, packet); } static int arm_spe_get_data_source(const unsigned char *buf, size_t len, struct arm_spe_pkt *packet) { packet->type = ARM_SPE_DATA_SOURCE; - return arm_spe_get_payload(buf, len, packet); + return arm_spe_get_payload(buf, len, 0, packet); } static int arm_spe_get_context(const unsigned char *buf, size_t len, @@ -160,8 +161,7 @@ static int arm_spe_get_context(const unsigned char *buf, size_t len, { packet->type = ARM_SPE_CONTEXT; packet->index = buf[0] & 0x3; - - return arm_spe_get_payload(buf, len, packet); + return arm_spe_get_payload(buf, len, 0, packet); } static int arm_spe_get_op_type(const unsigned char *buf, size_t len, @@ -169,41 +169,31 @@ static int arm_spe_get_op_type(const unsigned char *buf, size_t len, { packet->type = ARM_SPE_OP_TYPE; packet->index = buf[0] & 0x3; - return arm_spe_get_payload(buf, len, packet); + return arm_spe_get_payload(buf, len, 0, packet); } static int arm_spe_get_counter(const unsigned char *buf, size_t len, const unsigned char ext_hdr, struct arm_spe_pkt *packet) { - if (len < 2) - return ARM_SPE_NEED_MORE_BYTES; - packet->type = ARM_SPE_COUNTER; if (ext_hdr) packet->index = ((buf[0] & 0x3) << 3) | (buf[1] & 0x7); else packet->index = buf[0] & 0x7; - packet->payload = le16_to_cpu(*(uint16_t *)(buf + 1)); - - return 1 + ext_hdr + 2; + return arm_spe_get_payload(buf, len, ext_hdr, packet); } static int arm_spe_get_addr(const unsigned char *buf, size_t len, const unsigned char ext_hdr, struct arm_spe_pkt *packet) { - if (len < 8) - return ARM_SPE_NEED_MORE_BYTES; - packet->type = ARM_SPE_ADDRESS; if (ext_hdr) packet->index = ((buf[0] & 0x3) << 3) | (buf[1] & 0x7); else packet->index = buf[0] & 0x7; - memcpy_le64(>payload, buf + 1, 8); - - return 1 + ext_hdr + 8; + return
Re: [RFC PATCH 1/9] cxl/acpi: Add an acpi_cxl module for the CXL interconnect
On Tue, Nov 10, 2020 at 09:43:48PM -0800, Ben Widawsky wrote: > +menuconfig CXL_BUS > + tristate "CXL (Compute Express Link) Devices Support" > + help > + CXL is a bus that is electrically compatible with PCI-E, but layers > + three protocols on that signalling (CXL.io, CXL.cache, and CXL.mem). > The > + CXL.cache protocol allows devices to hold cachelines locally, the > + CXL.mem protocol allows devices to be fully coherent memory targets, > the > + CXL.io protocol is equivalent to PCI-E. Say 'y' to enable support for > + the configuration and management of devices supporting these > protocols. > + Please fix the overly long lines. > +static void acpi_cxl_desc_init(struct acpi_cxl_desc *acpi_desc, struct > device *dev) Another overly long line. > +{ > + dev_set_drvdata(dev, acpi_desc); > + acpi_desc->dev = dev; > +} But this helper seems pretty pointless to start with. > +static int acpi_cxl_remove(struct acpi_device *adev) > +{ > + return 0; > +} The emptry remove callback is not needed. > +/* > + * If/when CXL support is defined by other platform firmware the kernel > + * will need a mechanism to select between the platform specific version > + * of this routine, until then, hard-code ACPI assumptions > + */ > +int cxl_bus_prepared(struct pci_dev *pdev) > +{ > + struct acpi_device *adev; > + struct pci_dev *root_port; > + struct device *root; > + > + root_port = pcie_find_root_port(pdev); > + if (!root_port) > + return -ENXIO; > + > + root = root_port->dev.parent; > + if (!root) > + return -ENXIO; > + > + adev = ACPI_COMPANION(root); > + if (!adev) > + return -ENXIO; > + > + /* TODO: OSC enabling */ > + > + return 0; > +} > +EXPORT_SYMBOL_GPL(cxl_bus_prepared); What is the point of this function? I doesn't realy do anything, not even a CXL specific check. > > +/*** > + * > + * CEDT - CXL Early Discovery Table (ACPI 6.4) > + *Version 1 > + * > + > **/ > + Pleae use the normal Linux comment style. > +#define ACPI_CEDT_CHBS_VERSION_CXL11(0) > +#define ACPI_CEDT_CHBS_VERSION_CXL20(1) > + > +/* Values for length field above */ > + > +#define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000) > +#define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x1) No need for the braces.
Re: [PATCH v4 1/1] applesmc: Re-work SMC comms
On 11/11/20 4:56 pm, Guenter Roeck wrote: > On 11/10/20 7:38 PM, Brad Campbell wrote: >> Commit fff2d0f701e6 ("hwmon: (applesmc) avoid overlong udelay()") >> introduced an issue whereby communication with the SMC became >> unreliable with write errors like : >> >> [ 120.378614] applesmc: send_byte(0x00, 0x0300) fail: 0x40 >> [ 120.378621] applesmc: LKSB: write data fail >> [ 120.512782] applesmc: send_byte(0x00, 0x0300) fail: 0x40 >> [ 120.512787] applesmc: LKSB: write data fail >> >> The original code appeared to be timing sensitive and was not reliable >> with the timing changes in the aforementioned commit. >> >> This patch re-factors the SMC communication to remove the timing >> dependencies and restore function with the changes previously >> committed. >> >> Tested on : MacbookAir6,2 MacBookPro11,1 iMac12,2, MacBookAir1,1, >> MacBookAir3,1 >> >> Fixes: fff2d0f701e6 ("hwmon: (applesmc) avoid overlong udelay()") >> Reported-by: Andreas Kemnade >> Tested-by: Andreas Kemnade # MacBookAir6,2 >> Acked-by: Arnd Bergmann >> Signed-off-by: Brad Campbell >> Signed-off-by: Henrik Rydberg >> >> --- >> Changelog : >> v1 : Initial attempt >> v2 : Address logic and coding style >> v3 : Removed some debug hangover. Added tested-by. Modifications for >> MacBookAir1,1 >> v4 : Re-factored logic based on Apple driver. Simplified wait_status loop >> Index: linux-stable/drivers/hwmon/applesmc.c >> === >> --- linux-stable.orig/drivers/hwmon/applesmc.c >> +++ linux-stable/drivers/hwmon/applesmc.c >> @@ -32,6 +32,7 @@ >> #include >> #include >> #include >> +#include >> >> /* data port used by Apple SMC */ >> #define APPLESMC_DATA_PORT 0x300 >> @@ -42,10 +43,14 @@ >> >> #define APPLESMC_MAX_DATA_LENGTH 32 >> >> -/* wait up to 128 ms for a status change. */ >> -#define APPLESMC_MIN_WAIT 0x0010 >> -#define APPLESMC_RETRY_WAIT 0x0100 >> -#define APPLESMC_MAX_WAIT 0x2 >> +/* Apple SMC status bits */ >> +#define SMC_STATUS_AWAITING_DATA BIT(0) /* SMC has data waiting to be read >> */ >> +#define SMC_STATUS_IB_CLOSED BIT(1) /* Will ignore any input */ >> +#define SMC_STATUS_BUSY BIT(2) /* Command in progress */ >> + >> +/* Exponential delay boundaries */ >> +#define APPLESMC_MIN_WAIT 0x0008 >> +#define APPLESMC_MAX_WAIT 0x10 > > This is a substantial increase in wait time which should be documented. > 0x2 was explained (it translated to 128 ms), but this isn't, > and no reason is provided why it was increased to one second. > Is there any evidence that this is needed ? The only "benefit" I > can see is that a stuck SMC will now hang everything 8 times longer. > > There really should be some evidence suggesting that the longer > timeout is really needed, better than "the apple driver does it". > The timeout was increased to 128 ms back in 2012, according to > the commit because timeouts were observed on MacBookPro6,1. > I would expect something similar here. In other words, describe > the circumstances of observed timeouts and the affected system(s). > G'day Guenter, The wait timer turns out to be the most contentious part of the whole patch. That particular algorithm was put forward off list, and in testing it was as fast as {while true ; do stuff; udelay(10)}. The reason for the larger max value isn't actually for timing purposes. It was to allow a minimum of 16 times around the hedge. I've probably had 10 chops at this timeout trying to balance performance with a sane algorithm. How does this look? This performs pretty well. /* Minimum sleep time is 8uS */ #define APPLESMC_MIN_WAIT 0x0008 /* * Wait for specific status bits with a mask on the SMC. * Used before all transactions. * This does 10 fast loops of 8us then exponentially backs off for a * minimum total wait of 262ms. Depending on usleep_range this could * run out past 500ms. */ static int wait_status(u8 val, u8 mask) { u8 status; int us; int i; us=APPLESMC_MIN_WAIT; for (i = 0; i < 24 ; i++) { status = inb(APPLESMC_CMD_PORT); if ((status & mask) == val) return 0; usleep_range(us, us * 2); if (i > 9) us <<= 1; } return -EIO; } Regards, Brad
[PATCH v9 4/6] Bluetooth: Handle active scan case
This patch adds code to handle the active scan during interleave scan. The interleave scan will be canceled when users start active scan, and it will be restarted after active scan stopped. Signed-off-by: Howard Chung Reviewed-by: Alain Michaud Reviewed-by: Manish Mandlik --- (no changes since v1) net/bluetooth/hci_request.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/net/bluetooth/hci_request.c b/net/bluetooth/hci_request.c index d943ad2885aa0..172ccbf4f0cd2 100644 --- a/net/bluetooth/hci_request.c +++ b/net/bluetooth/hci_request.c @@ -3099,8 +3099,10 @@ static int active_scan(struct hci_request *req, unsigned long opt) * running. Thus, we should temporarily stop it in order to set the * discovery scanning parameters. */ - if (hci_dev_test_flag(hdev, HCI_LE_SCAN)) + if (hci_dev_test_flag(hdev, HCI_LE_SCAN)) { hci_req_add_le_scan_disable(req, false); + cancel_interleave_scan(hdev); + } /* All active scans will be done with either a resolvable private * address (when privacy feature has been enabled) or non-resolvable -- 2.29.2.222.g5d2a92d10f8-goog
[PATCH v9 5/6] Bluetooth: Refactor read default sys config for various types
Refactor read default system configuration function so that it's capable of returning different types than u16 Signed-off-by: Howard Chung --- (no changes since v8) Changes in v8: - Update the commit title and message net/bluetooth/mgmt_config.c | 140 +--- 1 file changed, 84 insertions(+), 56 deletions(-) diff --git a/net/bluetooth/mgmt_config.c b/net/bluetooth/mgmt_config.c index 2d3ad288c78ac..282fbf82f3192 100644 --- a/net/bluetooth/mgmt_config.c +++ b/net/bluetooth/mgmt_config.c @@ -11,72 +11,100 @@ #include "mgmt_util.h" #include "mgmt_config.h" -#define HDEV_PARAM_U16(_param_code_, _param_name_) \ -{ \ - { cpu_to_le16(_param_code_), sizeof(__u16) }, \ - { cpu_to_le16(hdev->_param_name_) } \ -} +#define HDEV_PARAM_U16(_param_name_) \ + struct {\ + struct mgmt_tlv entry; \ + __le16 value; \ + } __packed _param_name_ -#define HDEV_PARAM_U16_JIFFIES_TO_MSECS(_param_code_, _param_name_) \ -{ \ - { cpu_to_le16(_param_code_), sizeof(__u16) }, \ - { cpu_to_le16(jiffies_to_msecs(hdev->_param_name_)) } \ -} +#define TLV_SET_U16(_param_code_, _param_name_) \ + { \ + { cpu_to_le16(_param_code_), sizeof(__u16) }, \ + cpu_to_le16(hdev->_param_name_) \ + } + +#define TLV_SET_U16_JIFFIES_TO_MSECS(_param_code_, _param_name_) \ + { \ + { cpu_to_le16(_param_code_), sizeof(__u16) }, \ + cpu_to_le16(jiffies_to_msecs(hdev->_param_name_)) \ + } int read_def_system_config(struct sock *sk, struct hci_dev *hdev, void *data, u16 data_len) { - struct { - struct mgmt_tlv entry; - union { - /* This is a simplification for now since all values -* are 16 bits. In the future, this code may need -* refactoring to account for variable length values -* and properly calculate the required buffer size. -*/ - __le16 value; - }; - } __packed params[] = { + int ret; + struct mgmt_rp_read_def_system_config { /* Please see mgmt-api.txt for documentation of these values */ - HDEV_PARAM_U16(0x, def_page_scan_type), - HDEV_PARAM_U16(0x0001, def_page_scan_int), - HDEV_PARAM_U16(0x0002, def_page_scan_window), - HDEV_PARAM_U16(0x0003, def_inq_scan_type), - HDEV_PARAM_U16(0x0004, def_inq_scan_int), - HDEV_PARAM_U16(0x0005, def_inq_scan_window), - HDEV_PARAM_U16(0x0006, def_br_lsto), - HDEV_PARAM_U16(0x0007, def_page_timeout), - HDEV_PARAM_U16(0x0008, sniff_min_interval), - HDEV_PARAM_U16(0x0009, sniff_max_interval), - HDEV_PARAM_U16(0x000a, le_adv_min_interval), - HDEV_PARAM_U16(0x000b, le_adv_max_interval), - HDEV_PARAM_U16(0x000c, def_multi_adv_rotation_duration), - HDEV_PARAM_U16(0x000d, le_scan_interval), - HDEV_PARAM_U16(0x000e, le_scan_window), - HDEV_PARAM_U16(0x000f, le_scan_int_suspend), - HDEV_PARAM_U16(0x0010, le_scan_window_suspend), - HDEV_PARAM_U16(0x0011, le_scan_int_discovery), - HDEV_PARAM_U16(0x0012, le_scan_window_discovery), - HDEV_PARAM_U16(0x0013, le_scan_int_adv_monitor), - HDEV_PARAM_U16(0x0014, le_scan_window_adv_monitor), - HDEV_PARAM_U16(0x0015, le_scan_int_connect), - HDEV_PARAM_U16(0x0016, le_scan_window_connect), - HDEV_PARAM_U16(0x0017, le_conn_min_interval), - HDEV_PARAM_U16(0x0018, le_conn_max_interval), - HDEV_PARAM_U16(0x0019, le_conn_latency), - HDEV_PARAM_U16(0x001a, le_supv_timeout), - HDEV_PARAM_U16_JIFFIES_TO_MSECS(0x001b, - def_le_autoconnect_timeout), - HDEV_PARAM_U16(0x001d, advmon_allowlist_duration), - HDEV_PARAM_U16(0x001e, advmon_no_filter_duration), + HDEV_PARAM_U16(def_page_scan_type); + HDEV_PARAM_U16(def_page_scan_int); + HDEV_PARAM_U16(def_page_scan_window); + HDEV_PARAM_U16(def_inq_scan_type); + HDEV_PARAM_U16(def_inq_scan_int); + HDEV_PARAM_U16(def_inq_scan_window); + HDEV_PARAM_U16(def_br_lsto); + HDEV_PARAM_U16(def_page_timeout); + HDEV_PARAM_U16(sniff_min_interval); + HDEV_PARAM_U16(sniff_max_interval); + HDEV_PARAM_U16(le_adv_min_interval); + HDEV_PARAM_U16(le_adv_max_interval); + HDEV_PARAM_U16(def_multi_adv_rotation_duration); + HDEV_PARAM_U16(le_scan_interval); +
[PATCH v9 6/6] Bluetooth: Add toggle to switch off interleave scan
This patch add a configurable parameter to switch off the interleave scan feature. Reviewed-by: Alain Michaud Signed-off-by: Howard Chung --- Changes in v9: - Update and rename the macro TLV_GET_LE8 Changes in v7: - Fix bt_dev_warn arguemnt type warning Changes in v6: - Set EnableAdvMonInterleaveScan to 1 byte long Changes in v4: - Set EnableAdvMonInterleaveScan default to Disable - Fix 80 chars limit in mgmt_config.c include/net/bluetooth/hci_core.h | 1 + net/bluetooth/hci_core.c | 1 + net/bluetooth/hci_request.c | 3 ++- net/bluetooth/mgmt_config.c | 41 +--- 4 files changed, 37 insertions(+), 9 deletions(-) diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h index cfede18709d8f..63c6d656564a1 100644 --- a/include/net/bluetooth/hci_core.h +++ b/include/net/bluetooth/hci_core.h @@ -363,6 +363,7 @@ struct hci_dev { __u32 clock; __u16 advmon_allowlist_duration; __u16 advmon_no_filter_duration; + __u8enable_advmon_interleave_scan; __u16 devid_source; __u16 devid_vendor; diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c index 65b7b74baba4c..b7cb7bfe250bd 100644 --- a/net/bluetooth/hci_core.c +++ b/net/bluetooth/hci_core.c @@ -3595,6 +3595,7 @@ struct hci_dev *hci_alloc_dev(void) /* The default values will be chosen in the future */ hdev->advmon_allowlist_duration = 300; hdev->advmon_no_filter_duration = 500; + hdev->enable_advmon_interleave_scan = 0x00; /* Default to disable */ hdev->sniff_max_interval = 800; hdev->sniff_min_interval = 80; diff --git a/net/bluetooth/hci_request.c b/net/bluetooth/hci_request.c index 172ccbf4f0cd2..28520c4d2d229 100644 --- a/net/bluetooth/hci_request.c +++ b/net/bluetooth/hci_request.c @@ -1057,7 +1057,8 @@ void hci_req_add_le_passive_scan(struct hci_request *req) _addr_type)) return; - if (__hci_update_interleaved_scan(hdev)) + if (hdev->enable_advmon_interleave_scan && + __hci_update_interleaved_scan(hdev)) return; bt_dev_dbg(hdev, "interleave state %d", hdev->interleave_scan_state); diff --git a/net/bluetooth/mgmt_config.c b/net/bluetooth/mgmt_config.c index 282fbf82f3192..1deb0ca7a9297 100644 --- a/net/bluetooth/mgmt_config.c +++ b/net/bluetooth/mgmt_config.c @@ -17,12 +17,24 @@ __le16 value; \ } __packed _param_name_ +#define HDEV_PARAM_U8(_param_name_) \ + struct {\ + struct mgmt_tlv entry; \ + __u8 value; \ + } __packed _param_name_ + #define TLV_SET_U16(_param_code_, _param_name_) \ { \ { cpu_to_le16(_param_code_), sizeof(__u16) }, \ cpu_to_le16(hdev->_param_name_) \ } +#define TLV_SET_U8(_param_code_, _param_name_) \ + { \ + { cpu_to_le16(_param_code_), sizeof(__u8) }, \ + hdev->_param_name_ \ + } + #define TLV_SET_U16_JIFFIES_TO_MSECS(_param_code_, _param_name_) \ { \ { cpu_to_le16(_param_code_), sizeof(__u16) }, \ @@ -65,6 +77,7 @@ int read_def_system_config(struct sock *sk, struct hci_dev *hdev, void *data, HDEV_PARAM_U16(def_le_autoconnect_timeout); HDEV_PARAM_U16(advmon_allowlist_duration); HDEV_PARAM_U16(advmon_no_filter_duration); + HDEV_PARAM_U8(enable_advmon_interleave_scan); } __packed rp = { TLV_SET_U16(0x, def_page_scan_type), TLV_SET_U16(0x0001, def_page_scan_int), @@ -97,6 +110,7 @@ int read_def_system_config(struct sock *sk, struct hci_dev *hdev, void *data, def_le_autoconnect_timeout), TLV_SET_U16(0x001d, advmon_allowlist_duration), TLV_SET_U16(0x001e, advmon_no_filter_duration), + TLV_SET_U8(0x001f, enable_advmon_interleave_scan), }; bt_dev_dbg(hdev, "sock %p", sk); @@ -109,6 +123,7 @@ int read_def_system_config(struct sock *sk, struct hci_dev *hdev, void *data, #define TO_TLV(x) ((struct mgmt_tlv *)(x)) #define TLV_GET_LE16(tlv) le16_to_cpu(*((__le16 *)(TO_TLV(tlv)->value))) +#define TLV_GET_U8(tlv)(*((__u8 *)(TO_TLV(tlv)->value))) int set_def_system_config(struct sock *sk, struct hci_dev *hdev, void *data, u16 data_len) @@ -125,6 +140,7 @@ int set_def_system_config(struct sock *sk, struct hci_dev *hdev, void *data, /* First pass to validate the tlv */ while (buffer_left >= sizeof(struct mgmt_tlv)) { const u8 len = TO_TLV(buffer)->length; + size_t exp_type_len; const u16 exp_len = sizeof(struct mgmt_tlv) + len;
[PATCH v9 3/6] Bluetooth: Handle system suspend resume case
This patch adds code to handle the system suspension during interleave scan. The interleave scan will be canceled when the system is going to sleep, and will be restarted after waking up. Signed-off-by: Howard Chung Reviewed-by: Alain Michaud Reviewed-by: Manish Mandlik Reviewed-by: Abhishek Pandit-Subedi Reviewed-by: Miao-chen Chou --- (no changes since v5) Changes in v5: - Remove the change in hci_req_config_le_suspend_scan net/bluetooth/hci_request.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/net/bluetooth/hci_request.c b/net/bluetooth/hci_request.c index 2fd56ee21d31f..d943ad2885aa0 100644 --- a/net/bluetooth/hci_request.c +++ b/net/bluetooth/hci_request.c @@ -1293,8 +1293,10 @@ void hci_req_prepare_suspend(struct hci_dev *hdev, enum suspended_state next) hci_req_add(, HCI_OP_WRITE_SCAN_ENABLE, 1, _scan); /* Disable LE passive scan if enabled */ - if (hci_dev_test_flag(hdev, HCI_LE_SCAN)) + if (hci_dev_test_flag(hdev, HCI_LE_SCAN)) { + cancel_interleave_scan(hdev); hci_req_add_le_scan_disable(, false); + } /* Mark task needing completion */ set_bit(SUSPEND_SCAN_DISABLE, hdev->suspend_tasks); -- 2.29.2.222.g5d2a92d10f8-goog
[PATCH v9 2/6] Bluetooth: Interleave with allowlist scan
This patch implements the interleaving between allowlist scan and no-filter scan. It'll be used to save power when at least one monitor is registered and at least one pending connection or one device to be scanned for. The durations of the allowlist scan and the no-filter scan are controlled by MGMT command: Set Default System Configuration. The default values are set randomly for now. Signed-off-by: Howard Chung Reviewed-by: Alain Michaud Reviewed-by: Manish Mandlik --- (no changes since v8) Changes in v8: - Simplified logic in __hci_update_interleaved_scan - remove hdev->name when calling bt_dev_dbg - remove 'default' in hci_req_add_le_interleaved_scan switch block - remove {} around :1915 include/net/bluetooth/hci_core.h | 10 +++ net/bluetooth/hci_core.c | 4 + net/bluetooth/hci_request.c | 128 +-- net/bluetooth/mgmt_config.c | 10 +++ 4 files changed, 145 insertions(+), 7 deletions(-) diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h index 9873e1c8cd163..cfede18709d8f 100644 --- a/include/net/bluetooth/hci_core.h +++ b/include/net/bluetooth/hci_core.h @@ -361,6 +361,8 @@ struct hci_dev { __u8ssp_debug_mode; __u8hw_error_code; __u32 clock; + __u16 advmon_allowlist_duration; + __u16 advmon_no_filter_duration; __u16 devid_source; __u16 devid_vendor; @@ -542,6 +544,14 @@ struct hci_dev { struct delayed_work rpa_expired; bdaddr_trpa; + enum { + INTERLEAVE_SCAN_NONE, + INTERLEAVE_SCAN_NO_FILTER, + INTERLEAVE_SCAN_ALLOWLIST + } interleave_scan_state; + + struct delayed_work interleave_scan; + #if IS_ENABLED(CONFIG_BT_LEDS) struct led_trigger *power_led; #endif diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c index 502552d6e9aff..65b7b74baba4c 100644 --- a/net/bluetooth/hci_core.c +++ b/net/bluetooth/hci_core.c @@ -3592,6 +3592,10 @@ struct hci_dev *hci_alloc_dev(void) hdev->cur_adv_instance = 0x00; hdev->adv_instance_timeout = 0; + /* The default values will be chosen in the future */ + hdev->advmon_allowlist_duration = 300; + hdev->advmon_no_filter_duration = 500; + hdev->sniff_max_interval = 800; hdev->sniff_min_interval = 80; diff --git a/net/bluetooth/hci_request.c b/net/bluetooth/hci_request.c index 048d4db9d4ea5..2fd56ee21d31f 100644 --- a/net/bluetooth/hci_request.c +++ b/net/bluetooth/hci_request.c @@ -378,6 +378,53 @@ void __hci_req_write_fast_connectable(struct hci_request *req, bool enable) hci_req_add(req, HCI_OP_WRITE_PAGE_SCAN_TYPE, 1, ); } +static void start_interleave_scan(struct hci_dev *hdev) +{ + hdev->interleave_scan_state = INTERLEAVE_SCAN_NO_FILTER; + queue_delayed_work(hdev->req_workqueue, + >interleave_scan, 0); +} + +static bool is_interleave_scanning(struct hci_dev *hdev) +{ + return hdev->interleave_scan_state != INTERLEAVE_SCAN_NONE; +} + +static void cancel_interleave_scan(struct hci_dev *hdev) +{ + bt_dev_dbg(hdev, "cancelling interleave scan"); + + cancel_delayed_work_sync(>interleave_scan); + + hdev->interleave_scan_state = INTERLEAVE_SCAN_NONE; +} + +/* Return true if interleave_scan wasn't started until exiting this function, + * otherwise, return false + */ +static bool __hci_update_interleaved_scan(struct hci_dev *hdev) +{ + /* If there is at least one ADV monitors and one pending LE connection +* or one device to be scanned for, we should alternate between +* allowlist scan and one without any filters to save power. +*/ + bool should_interleaving = hci_is_adv_monitoring(hdev) && + !(list_empty(>pend_le_conns) && +list_empty(>pend_le_reports)); + bool is_interleaving = is_interleave_scanning(hdev); + + if (should_interleaving && !is_interleaving) { + start_interleave_scan(hdev); + bt_dev_dbg(hdev, "starting interleave scan"); + return true; + } + + if (!should_interleaving && is_interleaving) + cancel_interleave_scan(hdev); + + return false; +} + /* This function controls the background scanning based on hdev->pend_le_conns * list. If there are pending LE connection we start the background scanning, * otherwise we stop it. @@ -450,8 +497,7 @@ static void __hci_update_background_scan(struct hci_request *req) hci_req_add_le_scan_disable(req, false); hci_req_add_le_passive_scan(req); - - BT_DBG("%s starting background scanning", hdev->name); + bt_dev_dbg(hdev, "starting background scanning"); } } @@ -848,12 +894,17 @@
[PATCH v9 1/6] Bluetooth: Replace BT_DBG with bt_dev_dbg in HCI request
This replaces the BT_DBG function to bt_dev_dbg as it is cleaner to show the controller index in the debug message. Signed-off-by: Howard Chung --- Changes in v9: - Fix compile warning on patch 6/6 Changes in v8: - Simplified logic in __hci_update_interleaved_scan - Remove hdev->name when calling bt_dev_dbg - Remove 'default' in hci_req_add_le_interleaved_scan switch block - Remove {} around :1915 - Update commit message and title in v7 4/5 - Add a cleanup patch for replacing BT_DBG with bt_dev_dbg Changes in v7: - Fix bt_dev_warn argument type warning Changes in v6: - Set parameter EnableAdvMonInterleaveScan to 1 byte long Changes in v5: - Rename 'adv_monitor' from many functions/variables - Move __hci_update_interleaved_scan into hci_req_add_le_passive_scan - Update the logic of update_adv_monitor_scan_state Changes in v4: - Rebase to bluetooth-next/master (previous 2 patches are applied) - Fix over 80 chars limit in mgmt_config.c - Set EnableAdvMonInterleaveScan default to Disable Changes in v3: - Remove 'Bluez' prefix Changes in v2: - remove 'case 0x001c' in mgmt_config.c net/bluetooth/hci_request.c | 52 ++--- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/net/bluetooth/hci_request.c b/net/bluetooth/hci_request.c index 6a74097c50d34..048d4db9d4ea5 100644 --- a/net/bluetooth/hci_request.c +++ b/net/bluetooth/hci_request.c @@ -58,7 +58,7 @@ static int req_run(struct hci_request *req, hci_req_complete_t complete, struct sk_buff *skb; unsigned long flags; - BT_DBG("length %u", skb_queue_len(>cmd_q)); + bt_dev_dbg(hdev, "length %u", skb_queue_len(>cmd_q)); /* If an error occurred during request building, remove all HCI * commands queued on the HCI request queue. @@ -102,7 +102,7 @@ int hci_req_run_skb(struct hci_request *req, hci_req_complete_skb_t complete) static void hci_req_sync_complete(struct hci_dev *hdev, u8 result, u16 opcode, struct sk_buff *skb) { - BT_DBG("%s result 0x%2.2x", hdev->name, result); + bt_dev_dbg(hdev, "result 0x%2.2x", result); if (hdev->req_status == HCI_REQ_PEND) { hdev->req_result = result; @@ -115,7 +115,7 @@ static void hci_req_sync_complete(struct hci_dev *hdev, u8 result, u16 opcode, void hci_req_sync_cancel(struct hci_dev *hdev, int err) { - BT_DBG("%s err 0x%2.2x", hdev->name, err); + bt_dev_dbg(hdev, "err 0x%2.2x", err); if (hdev->req_status == HCI_REQ_PEND) { hdev->req_result = err; @@ -131,7 +131,7 @@ struct sk_buff *__hci_cmd_sync_ev(struct hci_dev *hdev, u16 opcode, u32 plen, struct sk_buff *skb; int err = 0; - BT_DBG("%s", hdev->name); + bt_dev_dbg(hdev, ""); hci_req_init(, hdev); @@ -167,7 +167,7 @@ struct sk_buff *__hci_cmd_sync_ev(struct hci_dev *hdev, u16 opcode, u32 plen, skb = hdev->req_skb; hdev->req_skb = NULL; - BT_DBG("%s end: err %d", hdev->name, err); + bt_dev_dbg(hdev, "end: err %d", err); if (err < 0) { kfree_skb(skb); @@ -196,7 +196,7 @@ int __hci_req_sync(struct hci_dev *hdev, int (*func)(struct hci_request *req, struct hci_request req; int err = 0; - BT_DBG("%s start", hdev->name); + bt_dev_dbg(hdev, "start"); hci_req_init(, hdev); @@ -260,7 +260,7 @@ int __hci_req_sync(struct hci_dev *hdev, int (*func)(struct hci_request *req, hdev->req_skb = NULL; hdev->req_status = hdev->req_result = 0; - BT_DBG("%s end: err %d", hdev->name, err); + bt_dev_dbg(hdev, "end: err %d", err); return err; } @@ -300,7 +300,7 @@ struct sk_buff *hci_prepare_cmd(struct hci_dev *hdev, u16 opcode, u32 plen, if (plen) skb_put_data(skb, param, plen); - BT_DBG("skb len %d", skb->len); + bt_dev_dbg(hdev, "skb len %d", skb->len); hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; hci_skb_opcode(skb) = opcode; @@ -315,7 +315,7 @@ void hci_req_add_ev(struct hci_request *req, u16 opcode, u32 plen, struct hci_dev *hdev = req->hdev; struct sk_buff *skb; - BT_DBG("%s opcode 0x%4.4x plen %d", hdev->name, opcode, plen); + bt_dev_dbg(hdev, "opcode 0x%4.4x plen %d", opcode, plen); /* If an error occurred during request building, there is no point in * queueing the HCI command. We can simply return. @@ -413,8 +413,8 @@ static void __hci_update_background_scan(struct hci_request *req) */ hci_discovery_filter_clear(hdev); - BT_DBG("%s ADV monitoring is %s", hdev->name, - hci_is_adv_monitoring(hdev) ? "on" : "off"); + bt_dev_dbg(hdev, "ADV monitoring is %s", + hci_is_adv_monitoring(hdev) ? "on" : "off"); if (list_empty(>pend_le_conns) && list_empty(>pend_le_reports) && @@ -430,7 +430,7 @@ static void
Re: [PATCH 2/3] arm: introduce IRQ stacks
* Arnd Bergmann [201110 13:35]: > On Tue, Nov 10, 2020 at 1:06 PM Tony Lindgren wrote: > > > > Are these actually ARMv6? Most ARM11 cores you'd come across > > > in practice are ARMv6K (ARM1136r1, ARM1167, ARM11MPCore), > > > in particular every SoC that has any mainline support except for > > > the ARM1136r0 based OMAP2 and i.MX3. > > > > I've been only using smp_on_up for the ARMv6 ARM1136r0 variants > > for omap2, no SMP on those. > > Obviously all SMP hardware is ARMv6K, the only question I raised > in point "c)" is what we would lose by making ARMv6 (ARM1136r0) > support and SMP mutually exclusive in a kernel configuration, and > I suppose the answer remains "testing". Agreed that is probably the biggest reason to keep it at this point. Regards, Tony
Re: [PATCH] mm/zsmalloc: include sparsemem.h for MAX_PHYSMEM_BITS
Hi, On Tue, Nov 10, 2020 at 03:36:20PM -0800, Minchan Kim wrote: > On Tue, Nov 10, 2020 at 06:21:55PM +0200, Mike Rapoport wrote: > > On Tue, Nov 10, 2020 at 12:21:11PM +0100, Arnd Bergmann wrote: > > > On Tue, Nov 10, 2020 at 10:58 AM Mike Rapoport wrote: > > > > > > > > > > > > asm/sparsemem.h is not available on some architectures. > > > > > > It's better to use linux/mmzone.h instead. > > > > > > Ah, I missed that, too. > > > > > > > > Hm, linux/mmzone.h only includes asm/sparsemem.h when CONFIG_SPARSEMEM > > > > > is enabled. However, on ARM at least I can have configurations without > > > > > CONFIG_SPARSEMEM and physical address extension on (e.g. > > > > > multi_v7_defconfig + CONFIG_LPAE + CONFIG_ZSMALLOC). > > > > > > > > > > While sparsemem seems to be a good idea with LPAE it really seems not > > > > > required (see also https://lore.kernel.org/patchwork/patch/567589/). > > > > > > > > > > There seem to be also other architectures which define > > > > > MAX_PHYSMEM_BITS > > > > > only when SPARSEMEM is enabled, e.g. > > > > > arch/riscv/include/asm/sparsemem.h... > > > > > > > > > > Not sure how to get out of this.. Maybe make ZSMALLOC dependent on > > > > > SPARSEMEM? It feels a bit silly restricting ZSMALLOC selection only > > > > > due > > > > > to a compile time define... > > > > > > > > I think we can define MAX_POSSIBLE_PHYSMEM_BITS in one of > > > > arch/arm/inclide/asm/pgtable-{2,3}level-*.h headers to values supported > > > > by !LPAE and LPAE. > > > > > > Good idea. I wonder what other architectures need the same though. > > > Here are some I found: > > > > > > $ git grep -l PHYS_ADDR_T_64BIT arch | grep Kconfig > > > arch/arc/Kconfig > > > arch/arm/mm/Kconfig > > > arch/mips/Kconfig > > > arch/powerpc/platforms/Kconfig.cputype > > > arch/x86/Kconfig > > > > > > arch/arc has a CONFIG_ARC_HAS_PAE40 option > > > arch/riscv has 34-bit addressing in rv32 mode > > > arch/mips has up to 40 bits with mips32r3 XPA, but I don't know what > > > supports that > > > > > > arch/powerpc has this: > > > config PHYS_64BIT > > > bool 'Large physical address support' if E500 || PPC_86xx > > > depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx > > > > > > Apparently all three (4xx, e500v2, mpc86xx/e600) do 36-bit physical > > > addressing, but each one has a different page table format. > > > > > > Microblaze has physical address extensions, but neither those nor > > > 64-bit mode have so far made it into the kernel. > > > > > > To be on the safe side, we could provoke a compile-time error > > > when CONFIG_PHYS_ADDR_T_64BIT is set on a 32-bit > > > architecture, but MAX_POSSIBLE_PHYSMEM_BITS is not set. > > > > Maybe compile time warning and a runtime error in zs_init() if 32 bit > > machine has memory above 4G? > > I guess max_pfn will represent maximum pfn configued in the system > and will not be changed in the runtime. If it's true, how about this? > (didn't test at all but just for RFC) Largely, max_pfn is the maximal pfn at boot time but I don't think it can be used on systems with memory hotplug. Unless I'm missing something, with memory hotplug we must have compile-time maximum. > From 2f51a743a08d10c787a36912515a91826693e308 Mon Sep 17 00:00:00 2001 > From: Minchan Kim > Date: Tue, 10 Nov 2020 15:17:12 -0800 > Subject: [PATCH] zsmalloc: do not support if system has too big memory > > zsmalloc encode object location into unsigned long so if the system > has too big memory to encode the object location into BITS_PER_LONG, > it should return the error. Otherwise, system will be crash. > > Signed-off-by: Minchan Kim > --- > mm/zsmalloc.c | 82 --- > 1 file changed, 45 insertions(+), 37 deletions(-) > > diff --git a/mm/zsmalloc.c b/mm/zsmalloc.c > index 662ee420706f..13552f412ca1 100644 > --- a/mm/zsmalloc.c > +++ b/mm/zsmalloc.c > @@ -87,19 +87,8 @@ > * This is made more complicated by various memory models and PAE. > */ > > -#ifndef MAX_POSSIBLE_PHYSMEM_BITS > -#ifdef MAX_PHYSMEM_BITS > -#define MAX_POSSIBLE_PHYSMEM_BITS MAX_PHYSMEM_BITS > -#else > -/* > - * If this definition of MAX_PHYSMEM_BITS is used, OBJ_INDEX_BITS will just > - * be PAGE_SHIFT > - */ > -#define MAX_POSSIBLE_PHYSMEM_BITS BITS_PER_LONG > -#endif > -#endif > - > -#define _PFN_BITS(MAX_POSSIBLE_PHYSMEM_BITS - PAGE_SHIFT) > +static unsigned int pfn_bits; > +static unsigned int obj_index_bits; > > /* > * Memory for allocating for handle keeps object position by > @@ -119,18 +108,20 @@ > */ > #define OBJ_ALLOCATED_TAG 1 > #define OBJ_TAG_BITS 1 > -#define OBJ_INDEX_BITS (BITS_PER_LONG - _PFN_BITS - OBJ_TAG_BITS) > -#define OBJ_INDEX_MASK ((_AC(1, UL) << OBJ_INDEX_BITS) - 1) > +static unsigned int obj_index_mask; > > #define FULLNESS_BITS2 > #define CLASS_BITS 8 > #define ISOLATED_BITS3 > #define MAGIC_VAL_BITS 8 > > -#define MAX(a, b) ((a) >= (b) ? (a) : (b))
Re: [PATCH 1/3] md: improve variable names in md_flush_request()
Dear Pankaj, Thank you for the cleanups. Am 11.11.20 um 06:16 schrieb Pankaj Gupta: From: Pankaj Gupta This patch improves readability by using better variable names in flush request coalescing logic. Please do not indent the commit message. Signed-off-by: Pankaj Gupta --- drivers/md/md.c | 8 drivers/md/md.h | 6 +++--- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/md/md.c b/drivers/md/md.c index 98bac4f304ae..167c80f98533 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c @@ -639,7 +639,7 @@ static void md_submit_flush_data(struct work_struct *ws) * could wait for this and below md_handle_request could wait for those * bios because of suspend check */ - mddev->last_flush = mddev->start_flush; + mddev->prev_flush_start = mddev->start_flush; mddev->flush_bio = NULL; wake_up(>sb_wait); @@ -660,13 +660,13 @@ static void md_submit_flush_data(struct work_struct *ws) */ bool md_flush_request(struct mddev *mddev, struct bio *bio) { - ktime_t start = ktime_get_boottime(); + ktime_t req_start = ktime_get_boottime(); spin_lock_irq(>lock); wait_event_lock_irq(mddev->sb_wait, !mddev->flush_bio || - ktime_after(mddev->last_flush, start), + ktime_after(mddev->prev_flush_start, req_start), mddev->lock); - if (!ktime_after(mddev->last_flush, start)) { + if (!ktime_after(mddev->prev_flush_start, req_start)) { WARN_ON(mddev->flush_bio); mddev->flush_bio = bio; bio = NULL; diff --git a/drivers/md/md.h b/drivers/md/md.h index ccfb69868c2e..2292c847f9dd 100644 --- a/drivers/md/md.h +++ b/drivers/md/md.h @@ -495,9 +495,9 @@ struct mddev { */ struct bio *flush_bio; atomic_t flush_pending; - ktime_t start_flush, last_flush; /* last_flush is when the last completed - * flush was started. - */ + ktime_t start_flush, prev_flush_start; /* prev_flush_start is when the previous completed + * flush was started. + */ With the new variable name, the comment could even be removed. ;-) struct work_struct flush_work; struct work_struct event_work; /* used by dm to report failure event */ mempool_t *serial_info_pool; Reviewed-by: Paul Menzel Kind regards, Paul
Re: [PATCH -V2 2/2] autonuma: Migrate on fault among multiple bound nodes
Hi, Mel, Mel Gorman writes: > On Wed, Nov 04, 2020 at 01:36:58PM +0800, Huang, Ying wrote: >> > I've no specific objection to the patch or the name change. I can't >> > remember exactly why I picked the name, it was 8 years ago but I think it >> > was because the policy represented the most basic possible approach that >> > could be done without any attempt at being intelligent and established >> > a baseline. The intent was that anything built on top had to be better >> > than the most basic policy imaginable. The name reflected the dictionary >> > definition at the time and happened to match the acronym closely enough >> > and I wanted to make it absolutely clear to reviewers that the policy >> > was not good enough (ruling out MPOL_BASIC or variants thereof) even if >> > it happened to work for some workload and there was no intent to report >> > it to the userspace API. >> > >> > The only hazard with the patch is that applications that use MPOL_BIND >> > on multiple nodes may now incur some NUMA balancing overhead due to >> > trapping faults and migrations. >> >> For this specific version of patch, I don't think this will happen. >> Because now, MPOL_F_MOF need to be set in struct mempolicy, for >> MPOL_BIND, only if mbind() syscall is called with MPOL_MF_LAZY, that >> will be the case. So I think most workloads will not be affected by >> this patch. The feature is opt-in. >> > > Ok. I just found MPOL_MF_LAZY is disabled now. And as in commit a720094ded8c ("mm: mempolicy: Hide MPOL_NOOP and MPOL_MF_LAZY from userspace for now"), the ABI needs to be revisted before exporting to the user space formally. Sorry about that, I should have found that earlier. Think about that. I think MPOL_MF_LAZY is tied with MPOL_MF_MOVE, so it's semantics isn't good for the purpose of the patch. So I have rewritten the patch and the description and sent it as follows, can you help to review it? https://lore.kernel.org/lkml/2020063717.186589-1-ying.hu...@intel.com/ Best Regards, Huang, Ying
[PATCH] clocksource/drivers/orion: add missing clk_disable_unprepare() on error path
After calling clk_prepare_enable(), clk_disable_unprepare() need be called on error path. Fixes: fbe4b3566ddc ("clocksource/drivers/orion: Convert init function...") Reported-by: Hulk Robot Signed-off-by: Yang Yingliang --- drivers/clocksource/timer-orion.c | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/clocksource/timer-orion.c b/drivers/clocksource/timer-orion.c index d01ff4181867..5101e834d78f 100644 --- a/drivers/clocksource/timer-orion.c +++ b/drivers/clocksource/timer-orion.c @@ -143,7 +143,8 @@ static int __init orion_timer_init(struct device_node *np) irq = irq_of_parse_and_map(np, 1); if (irq <= 0) { pr_err("%pOFn: unable to parse timer1 irq\n", np); - return -EINVAL; + ret = -EINVAL; + goto out_unprep_clk; } rate = clk_get_rate(clk); @@ -160,7 +161,7 @@ static int __init orion_timer_init(struct device_node *np) clocksource_mmio_readl_down); if (ret) { pr_err("Failed to initialize mmio timer\n"); - return ret; + goto out_unprep_clk; } sched_clock_register(orion_read_sched_clock, 32, rate); @@ -170,7 +171,7 @@ static int __init orion_timer_init(struct device_node *np) "orion_event", NULL); if (ret) { pr_err("%pOFn: unable to setup irq\n", np); - return ret; + goto out_unprep_clk; } ticks_per_jiffy = (clk_get_rate(clk) + HZ/2) / HZ; @@ -183,5 +184,9 @@ static int __init orion_timer_init(struct device_node *np) orion_delay_timer_init(rate); return 0; + +out_unprep_clk: + clk_disable_unprepare(clk); + return ret; } TIMER_OF_DECLARE(orion_timer, "marvell,orion-timer", orion_timer_init); -- 2.25.1
linux-next: Tree for Nov 11
Hi all, Changes since 20201110: New tree: stm32 The drivers-memory tree still had its build failure. The mac80211-next tree gained a build failure, so I used the version from next-20201110. The drm-misc tree lost its build failure. The akpm tree gained a build failure for which I applied a patch. Non-merge commits (relative to Linus' tree): 4465 4753 files changed, 513029 insertions(+), 76414 deletions(-) I have created today's linux-next tree at git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git (patches at http://www.kernel.org/pub/linux/kernel/next/ ). If you are tracking the linux-next tree using git, you should not use "git pull" to do so as that will try to merge the new linux-next release with the old one. You should use "git fetch" and checkout or reset to the new master. You can see which trees have been included by looking in the Next/Trees file in the source. There are also quilt-import.log and merge.log files in the Next directory. Between each merge, the tree was built with a ppc64_defconfig for powerpc, an allmodconfig for x86_64, a multi_v7_defconfig for arm and a native build of tools/perf. After the final fixups (if any), I do an x86_64 modules_install followed by builds for x86_64 allnoconfig, powerpc allnoconfig (32 and 64 bit), ppc44x_defconfig, allyesconfig and pseries_le_defconfig and i386, sparc and sparc64 defconfig and htmldocs. And finally, a simple boot test of the powerpc pseries_le_defconfig kernel in qemu (with and without kvm enabled). Below is a summary of the state of the merge. I am currently merging 327 trees (counting Linus' and 85 trees of bug fix patches pending for the current merge release). Stats about the size of the tree over time can be seen at http://neuling.org/linux-next-size.html . Status of my local build tests will be at http://kisskb.ellerman.id.au/linux-next . If maintainers want to give advice about cross compilers/configs that work, we are always open to add more builds. Thanks to Randy Dunlap for doing many randconfig builds. And to Paul Gortmaker for triage and bug fixes. -- Cheers, Stephen Rothwell $ git checkout master $ git reset --hard stable Merging origin/master (eccc87672492 Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs) Merging fixes/fixes (9123e3a74ec7 Linux 5.9-rc1) Merging kbuild-current/fixes (d1889589a4f5 builddeb: Fix rootless build in setuid/setgid directory) Merging arc-current/for-curr (3b57533b460c ARC: [plat-hsdk] Remap CCMs super early in asm boot trampoline) Merging arm-current/fixes (9fa2e7af3d53 ARM: 9019/1: kprobes: Avoid fortify_panic() when copying optprobe template) Merging arm64-fixes/for-next/fixes (04e613ded8c2 arm64: smp: Tell RCU about CPUs that fail to come online) Merging arm-soc-fixes/arm/fixes (3d696f42c7f4 soc: ti: ti_sci_pm_domains: check for proper args count in xlate) Merging drivers-memory-fixes/fixes (3650b228f83a Linux 5.10-rc1) Merging m68k-current/for-linus (50c5feeea0af ide/macide: Convert Mac IDE driver to platform driver) Merging powerpc-fixes/fixes (01776f070ffc powerpc/32s: Use relocation offset when setting early hash table) Merging s390-fixes/fixes (ce9dfafe29be s390: fix system call exit path) Merging sparc/master (0a95a6d1a4cd sparc: use for_each_child_of_node() macro) Merging fscrypt-current/for-stable (92cfcd030e4b fscrypt: remove reachable WARN in fscrypt_setup_iv_ino_lblk_32_key()) Merging net/master (989ef49bdf10 mptcp: provide rmem[0] limit) Merging bpf/master (abbaa433de07 bpf: Fix passing zero to PTR_ERR() in bpf_btf_printf_prepare) Merging ipsec/master (bc0230b6461c Merge branch 'xfrm/compat: syzbot-found fixes') Merging netfilter/master (fea07a487c6d net: openvswitch: silence suspicious RCU usage warning) Merging ipvs/master (fea07a487c6d net: openvswitch: silence suspicious RCU usage warning) Merging wireless-drivers/master (fe56d05ee6c8 iwlwifi: mvm: fix kernel panic in case of assert during CSA) Merging mac80211/master (989ef49bdf10 mptcp: provide rmem[0] limit) Merging rdma-fixes/for-rc (f8394f232b1e Linux 5.10-rc3) Merging sound-current/for-linus (446b8185f0c3 ALSA: hda/realtek - Add supported for Lenovo ThinkPad Headset Button) Merging sound-asoc-fixes/for-linus (025893350b74 Merge remote-tracking branch 'asoc/for-5.10' into asoc-linus) Merging regmap-fixes/for-linus (780f88b04704 Merge remote-tracking branch 'regmap/for-5.10' into regmap-linus) Merging regulator-fixes/for-linus (c088a4985e5f regulator: core: don't disable regulator if is_enabled return error.) Merging spi-fixes/for-linus (1a7154e2ec65 Merge remote-tracking branch 'spi/for-5.10' into spi-linus) Merging pci-current/for-linus (832ea234277a PCI: mvebu: Fix duplicate resource requests) Merging driver-core.current/driver-core-linus (f8394f232b1e Linux 5.10-rc3) Merging tty.current/tty-linus (f8394f232b1e Linux 5.10-rc3) Merging u
[PATCH] drm/panel: add missing platform_driver_unregister() on error path
If mipi_dsi_driver_register() failed, platform_driver_unregister() need be called. Fixes: 210fcd9d9cf1 ("drm/panel: Add support for Panasonic VVX10F004B0") Reported-by: Hulk Robot Signed-off-by: Yang Yingliang --- drivers/gpu/drm/panel/panel-simple.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 2be358fb46f7..2966ac13c538 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -4644,8 +4644,10 @@ static int __init panel_simple_init(void) if (IS_ENABLED(CONFIG_DRM_MIPI_DSI)) { err = mipi_dsi_driver_register(_simple_dsi_driver); - if (err < 0) + if (err < 0) { + platform_driver_unregister(_simple_platform_driver); return err; + } } return 0; -- 2.25.1
arch/sh/kernel/cpu/sh3/clock-sh7712.c:23:21: sparse: sparse: incorrect type in argument 1 (different base types)
Hi Luc, First bad commit (maybe != root cause): tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: eccc876724927ff3b9ff91f36f7b6b159e948f0c commit: e5fc436f06eef54ef512ea55a9db8eb9f2e76959 sparse: use static inline for __chk_{user,io}_ptr() date: 2 months ago config: sh-randconfig-s031-2020 (attached as .config) compiler: sh4-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.3-106-gd020cf33-dirty # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e5fc436f06eef54ef512ea55a9db8eb9f2e76959 git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git git fetch --no-tags linus master git checkout e5fc436f06eef54ef512ea55a9db8eb9f2e76959 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=sh If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot "sparse warnings: (new ones prefixed by >>)" >> arch/sh/kernel/cpu/sh3/clock-sh7712.c:23:21: sparse: sparse: incorrect type >> in argument 1 (different base types) @@ expected void const volatile >> [noderef] __iomem *ptr @@ got unsigned int @@ >> arch/sh/kernel/cpu/sh3/clock-sh7712.c:23:21: sparse: expected void const >> volatile [noderef] __iomem *ptr arch/sh/kernel/cpu/sh3/clock-sh7712.c:23:21: sparse: got unsigned int arch/sh/kernel/cpu/sh3/clock-sh7712.c:35:21: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected void const volatile [noderef] __iomem *ptr @@ got unsigned int @@ arch/sh/kernel/cpu/sh3/clock-sh7712.c:35:21: sparse: expected void const volatile [noderef] __iomem *ptr arch/sh/kernel/cpu/sh3/clock-sh7712.c:35:21: sparse: got unsigned int arch/sh/kernel/cpu/sh3/clock-sh7712.c:47:21: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected void const volatile [noderef] __iomem *ptr @@ got unsigned int @@ arch/sh/kernel/cpu/sh3/clock-sh7712.c:47:21: sparse: expected void const volatile [noderef] __iomem *ptr arch/sh/kernel/cpu/sh3/clock-sh7712.c:47:21: sparse: got unsigned int -- fs/binfmt_flat.c:402:9: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected unsigned long const *__gu_addr @@ got unsigned long [noderef] __user *[assigned] ptr @@ fs/binfmt_flat.c:402:9: sparse: expected unsigned long const *__gu_addr fs/binfmt_flat.c:402:9: sparse: got unsigned long [noderef] __user *[assigned] ptr >> fs/binfmt_flat.c:402:9: sparse: sparse: incorrect type in argument 1 >> (different address spaces) @@ expected void const volatile [noderef] >> __user *ptr @@ got unsigned long const *__gu_addr @@ fs/binfmt_flat.c:402:9: sparse: expected void const volatile [noderef] __user *ptr fs/binfmt_flat.c:402:9: sparse: got unsigned long const *__gu_addr fs/binfmt_flat.c:775:29: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected unsigned int const *__gu_addr @@ got unsigned int [noderef] [usertype] __user *[assigned] rp @@ fs/binfmt_flat.c:775:29: sparse: expected unsigned int const *__gu_addr fs/binfmt_flat.c:775:29: sparse: got unsigned int [noderef] [usertype] __user *[assigned] rp fs/binfmt_flat.c:775:29: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const volatile [noderef] __user *ptr @@ got unsigned int const *__gu_addr @@ fs/binfmt_flat.c:775:29: sparse: expected void const volatile [noderef] __user *ptr fs/binfmt_flat.c:775:29: sparse: got unsigned int const *__gu_addr fs/binfmt_flat.c:812:29: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected restricted __be32 const *__gu_addr @@ got restricted __be32 [noderef] [usertype] __user * @@ fs/binfmt_flat.c:812:29: sparse: expected restricted __be32 const *__gu_addr fs/binfmt_flat.c:812:29: sparse: got restricted __be32 [noderef] [usertype] __user * fs/binfmt_flat.c:812:29: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const volatile [noderef] __user *ptr @@ got restricted __be32 const *__gu_addr @@ fs/binfmt_flat.c:812:29: sparse: expected void const volatile [noderef] __user *ptr fs/binfmt_flat.c:812:29: sparse: got restricted __be32 const *__gu_addr fs/binfmt_flat.c:855:29: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected restricted __be32 const *__gu_addr @@ got restricted __be32 [noderef] [usertype] __user
Re: [PATCHv7 2/7] iommu/arm-smmu: Add domain attribute for system cache
On 2020-11-10 17:48, Will Deacon wrote: On Fri, Oct 30, 2020 at 02:53:09PM +0530, Sai Prakash Ranjan wrote: Add iommu domain attribute for using system cache aka last level cache by client drivers like GPU to set right attributes for caching the hardware pagetables into the system cache. Signed-off-by: Sai Prakash Ranjan --- drivers/iommu/arm/arm-smmu/arm-smmu.c | 17 + drivers/iommu/arm/arm-smmu/arm-smmu.h | 1 + include/linux/iommu.h | 1 + 3 files changed, 19 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index b1cf8f0abc29..070d13f80c7e 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -789,6 +789,9 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, if (smmu_domain->non_strict) pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_NON_STRICT; + if (smmu_domain->sys_cache) + pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_SYS_CACHE; + pgtbl_ops = alloc_io_pgtable_ops(fmt, _cfg, smmu_domain); if (!pgtbl_ops) { ret = -ENOMEM; @@ -1520,6 +1523,9 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain, case DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE: *(int *)data = smmu_domain->non_strict; return 0; + case DOMAIN_ATTR_SYS_CACHE: + *((int *)data) = smmu_domain->sys_cache; + return 0; default: return -ENODEV; } @@ -1551,6 +1557,17 @@ static int arm_smmu_domain_set_attr(struct iommu_domain *domain, else smmu_domain->stage = ARM_SMMU_DOMAIN_S1; break; + case DOMAIN_ATTR_SYS_CACHE: + if (smmu_domain->smmu) { + ret = -EPERM; + goto out_unlock; + } + + if (*((int *)data)) + smmu_domain->sys_cache = true; + else + smmu_domain->sys_cache = false; + break; default: ret = -ENODEV; } diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h index 885840f3bec8..dfc44d806671 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.h +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h @@ -373,6 +373,7 @@ struct arm_smmu_domain { struct mutexinit_mutex; /* Protects smmu pointer */ spinlock_t cb_lock; /* Serialises ATS1* ops and TLB syncs */ struct iommu_domain domain; + boolsys_cache; }; struct arm_smmu_master_cfg { diff --git a/include/linux/iommu.h b/include/linux/iommu.h index b95a6f8db6ff..4f4bb9c6f8f6 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -118,6 +118,7 @@ enum iommu_attr { DOMAIN_ATTR_FSL_PAMUV1, DOMAIN_ATTR_NESTING,/* two stages of translation */ DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE, + DOMAIN_ATTR_SYS_CACHE, I think you're trying to make this look generic, but it's really not. If we need to funnel io-pgtable quirks through domain attributes, then I think we should be open about that and add something like DOMAIN_ATTR_IO_PGTABLE_CFG which could take a struct of page-table configuration data for the domain (this could just be quirks initially, but maybe it's worth extending to take ias, oas and page size) Actually the initial versions used DOMAIN_ATTR_QCOM_SYS_CACHE to make it QCOM specific and not generic, I don't see anyone else using this attribute, would that work? Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Re: BUG: KASAN: global-out-of-bounds in soc_device_match on arm
Hi Naresh, On Wed, 11 Nov 2020 11:55:46 +0530 Naresh Kamboju wrote: > > The following kernel warning noticed on arm KASAN enabled config while > booting on > TI beagleboard x15 device. > > [ 32.127451] BUG: KASAN: global-out-of-bounds in soc_device_match+0x64/0xe4 > [ 32.127485] Read of size 4 at addr c21701f8 by task swapper/0/1 > [ 32.127508] > [ 32.127549] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W > 5.10.0-rc3-next-20201110 #2 > [ 32.127577] Hardware name: Generic DRA74X (Flattened Device Tree) > [ 32.127604] Backtrace: > [ 32.127670] [] (dump_backtrace) from [] > (show_stack+0x20/0x24) > [ 32.127717] r9:0080 r8:c4208000 r7:c3023060 r6:4093 > r5: r4:c3023060 > [ 32.127766] [] (show_stack) from [] > (dump_stack+0xe8/0x10c) > [ 32.127824] [] (dump_stack) from [] > (print_address_description.constprop.0+0x3c/0x4b0) > [ 32.127871] r10:0030 r9:c5da4010 r8:c5da4000 r7: > r6:c0fd5c20 r5:eebf33c0 > [ 32.127903] r4:c21701f8 r3:eebf33c4 > [ 32.127958] [] (print_address_description.constprop.0) > from [] (kasan_report+0x160/0x17c) > [ 32.128000] r8:c5da4000 r7: r6:c0fd5c20 r5:0001 r4:c21701f8 > [ 32.128053] [] (kasan_report) from [] > (__asan_load4+0x6c/0x9c) > [ 32.128093] r7:c3c3ede0 r6:c354dea0 r5:c0fd5b88 r4:c21701f8 > [ 32.128144] [] (__asan_load4) from [] > (soc_device_match+0x64/0xe4) > [ 32.128197] [] (soc_device_match) from [] > (omap8250_probe+0x628/0x75c) > [ 32.128236] r7:b7841730 r6:c6db2c4e r5:0001 r4:c6db2c40 > [ 32.128290] [] (omap8250_probe) from [] > (platform_drv_probe+0x70/0xc8) > [ 32.128335] r10:c5da4044 r9:c5da4048 r8:c34ff834 r7:c3c3e240 > r6:c34ff834 r5: > [ 32.128363] r4:c5da4010 > [ 32.128413] [] (platform_drv_probe) from [] > (really_probe+0x184/0x72c) > [ 32.128452] r7:c3c3e240 r6: r5:c3c3e1c0 r4:c5da4010 > [ 32.128499] [] (really_probe) from [] > (driver_probe_device+0xa4/0x270) > [ 32.128544] r10:c34ff834 r9:c416fa58 r8:c379e840 r7:c5d75a00 > r6:c5da4034 r5:c37c01c0 > [ 32.128572] r4:c5da4010 > [ 32.128620] [] (driver_probe_device) from [] > (device_driver_attach+0x94/0x9c) > [ 32.128665] r10: r9:c416fa58 r8:c0f956b4 r7:c5d75a00 > r6:c5da4034 r5:c34ff834 > [ 32.128693] r4:c5da4010 > [ 32.128741] [] (device_driver_attach) from [] > (__driver_attach+0xe4/0x19c) > [ 32.128780] r7:c34ff834 r6:c5da4010 r5:c34ff834 r4: > [ 32.128826] [] (__driver_attach) from [] > (bus_for_each_dev+0x100/0x154) > [ 32.128865] r7:c34ff834 r6:b78417a4 r5:c420bd40 r4:c5d75a34 > [ 32.128910] [] (bus_for_each_dev) from [] > (driver_attach+0x38/0x3c) > [ 32.128955] r9:c34ff87c r8:c416fa00 r7:c3541a70 r6:c3541a20 > r5:c6db4f00 r4:c34ff834 > [ 32.129001] [] (driver_attach) from [] > (bus_add_driver+0x21c/0x2dc) > [ 32.129034] r5:c6db4f00 r4:c34ff834 > [ 32.129080] [] (bus_add_driver) from [] > (driver_register+0xdc/0x1b0) > [ 32.129125] r10: r9:c2b00468 r8:c378a0c0 r7:c2170360 > r6:c34ff838 r5:c3541a20 > [ 32.129153] r4:c34ff834 > [ 32.129202] [] (driver_register) from [] > (__platform_driver_register+0x7c/0x84) > [ 32.129241] r7:c000 r6:c2bc509c r5: r4:c34ff820 > [ 32.129300] [] (__platform_driver_register) from > [] (omap8250_platform_driver_init+0x24/0x28) > [ 32.129333] r5:c420bf20 r4:b78417d0 > [ 32.129387] [] (omap8250_platform_driver_init) from > [] (do_one_initcall+0xc4/0x400) > [ 32.129437] [] (do_one_initcall) from [] > (kernel_init_freeable+0x214/0x268) > [ 32.129482] r10:c2d128a8 r9:c2b00468 r8:c2c50834 r7:c2c50854 > r6:c2a55ac8 r5:0007 > [ 32.129511] r4:c425a700 > [ 32.129563] [] (kernel_init_freeable) from [] > (kernel_init+0x18/0x140) > [ 32.129607] r10: r9: r8: r7: > r6: r5:c19bfd04 > [ 32.129635] r4: > [ 32.129684] [] (kernel_init) from [] > (ret_from_fork+0x14/0x38) > [ 32.129715] Exception stack(0xc420bfb0 to 0xc420bff8) > [ 32.129753] bfa0: > > [ 32.129798] bfc0: > > [ 32.129839] bfe0: 0013 > [ 32.129872] r5:c19bfd04 r4: > [ 32.129894] > [ 32.129917] The buggy address belongs to the variable: > [ 32.129957] k3_soc_devices+0x38/0x1e0 > [ 32.129981] The buggy address belongs to the page: > [ 32.130018] page:(ptrval) refcount:1 mapcount:0 mapping: > index:0x0 pfn:0x82170 > [ 32.130051] flags: 0x1000(reserved) > [ 32.130104] raw: 1000 eebf33c4 eebf33c4
[RFC -V4] autonuma: Migrate on fault among multiple bound nodes
Now, AutoNUMA can only optimize the page placement among the NUMA nodes if the default memory policy is used. Because the memory policy specified explicitly should take precedence. But this seems too strict in some situations. For example, on a system with 4 NUMA nodes, if the memory of an application is bound to the node 0 and 1, AutoNUMA can potentially migrate the pages between the node 0 and 1 to reduce cross-node accessing without breaking the explicit memory binding policy. So in this patch, we added MPOL_MF_AUTONUMA to mbind() and MPOL_F_AUTONUMA to set_mempolicy(). With these flags specified, AutoNUMA will be enabled within the memory area or thread to optimize the page placement within the constrains of the specified memory binding policy. With these newly added flags, the NUMA balancing control mechanism becomes, - sysctl knob numa_balancing can enable/disable the NUMA balancing globally. - even if sysctl numa_balancing is enabled, the NUMA balancing will be disabled for the memory areas or applications with the explicit memory policy by default. - MPOL_MF_AUTONUMA and MPOL_F_AUTONUMA can be used to enable the NUMA balancing for the memory areas or applications when specifying the explicit memory policy. Various page placement optimization based on the NUMA balancing can be done with these flags. As the first step, in this patch, if the memory of the application is bound to multiple nodes (MPOL_BIND), and in the hint page fault handler both the faulting page node and the accessing node are in the policy nodemask, the page will be tried to be migrated to the accessing node to reduce the cross-node accessing. In the previous version of the patch, we tried to reuse MPOL_MF_LAZY for mbind(). But that flag is tied to MPOL_MF_MOVE.*, so it seems not a good API/ABI for the purpose of the patch. Signed-off-by: "Huang, Ying" Cc: Andrew Morton Cc: Ingo Molnar Cc: Mel Gorman Cc: Rik van Riel Cc: Johannes Weiner Cc: "Matthew Wilcox (Oracle)" Cc: Dave Hansen Cc: Andi Kleen Cc: Michal Hocko Cc: David Rientjes --- include/uapi/linux/mempolicy.h | 10 +++--- mm/mempolicy.c | 13 + 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/include/uapi/linux/mempolicy.h b/include/uapi/linux/mempolicy.h index 3354774af61e..99afe7f4b61e 100644 --- a/include/uapi/linux/mempolicy.h +++ b/include/uapi/linux/mempolicy.h @@ -28,12 +28,14 @@ enum { /* Flags for set_mempolicy */ #define MPOL_F_STATIC_NODES(1 << 15) #define MPOL_F_RELATIVE_NODES (1 << 14) +#define MPOL_F_AUTONUMA(1 << 13) /* Optimize with AutoNUMA if possible */ /* * MPOL_MODE_FLAGS is the union of all possible optional mode flags passed to * either set_mempolicy() or mbind(). */ -#define MPOL_MODE_FLAGS(MPOL_F_STATIC_NODES | MPOL_F_RELATIVE_NODES) +#define MPOL_MODE_FLAGS \ + (MPOL_F_STATIC_NODES | MPOL_F_RELATIVE_NODES | MPOL_F_AUTONUMA) /* Flags for get_mempolicy */ #define MPOL_F_NODE(1<<0) /* return next IL mode instead of node mask */ @@ -46,11 +48,13 @@ enum { to policy */ #define MPOL_MF_MOVE_ALL (1<<2)/* Move every page to conform to policy */ #define MPOL_MF_LAZY(1<<3) /* Modifies '_MOVE: lazy migrate on fault */ -#define MPOL_MF_INTERNAL (1<<4)/* Internal flags start here */ +#define MPOL_MF_AUTONUMA (1<<4)/* Optimize with AutoNUMA if possible */ +#define MPOL_MF_INTERNAL (1<<5)/* Internal flags start here */ #define MPOL_MF_VALID (MPOL_MF_STRICT | \ MPOL_MF_MOVE | \ -MPOL_MF_MOVE_ALL) +MPOL_MF_MOVE_ALL | \ +MPOL_MF_AUTONUMA) /* * Internal flags that share the struct mempolicy flags word with diff --git a/mm/mempolicy.c b/mm/mempolicy.c index 3ca4898f3f24..37e4e76ded62 100644 --- a/mm/mempolicy.c +++ b/mm/mempolicy.c @@ -875,6 +875,9 @@ static long do_set_mempolicy(unsigned short mode, unsigned short flags, goto out; } + if (new && new->mode == MPOL_BIND && (flags & MPOL_F_AUTONUMA)) + new->flags |= (MPOL_F_MOF | MPOL_F_MORON); + ret = mpol_set_nodemask(new, nodes, scratch); if (ret) { mpol_put(new); @@ -1278,6 +1281,8 @@ static long do_mbind(unsigned long start, unsigned long len, if (flags & ~(unsigned long)MPOL_MF_VALID) return -EINVAL; + if ((flags & MPOL_MF_LAZY) && (flags & MPOL_MF_AUTONUMA)) + return -EINVAL; if ((flags & MPOL_MF_MOVE_ALL) && !capable(CAP_SYS_NICE)) return -EPERM; @@ -1301,6 +1306,8 @@ static long do_mbind(unsigned long start, unsigned long len, if (flags & MPOL_MF_LAZY) new->flags |= MPOL_F_MOF; + if (new && new->mode == MPOL_BIND && (flags & MPOL_MF_AUTONUMA))
[PATCH v2] Bluetooth: Enforce key size of 16 bytes on FIPS level
From: Archie Pusaka According to the spec Ver 5.2, Vol 3, Part C, Sec 5.2.2.8: Device in security mode 4 level 4 shall enforce: 128-bit equivalent strength for link and encryption keys required using FIPS approved algorithms (E0 not allowed, SAFER+ not allowed, and P-192 not allowed; encryption key not shortened) This patch rejects connection with key size below 16 for FIPS level services. Signed-off-by: Archie Pusaka Reviewed-by: Alain Michaud --- Sorry for the long delay. This patch fell out of my radar. Changes in v2: * Add comment on enforcing 16 bytes key size net/bluetooth/l2cap_core.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c index 1ab27b90ddcb..5817f5c2ec18 100644 --- a/net/bluetooth/l2cap_core.c +++ b/net/bluetooth/l2cap_core.c @@ -1515,8 +1515,14 @@ static bool l2cap_check_enc_key_size(struct hci_conn *hcon) * that have no key size requirements. Ensure that the link is * actually encrypted before enforcing a key size. */ + int min_key_size = hcon->hdev->min_enc_key_size; + + /* On FIPS security level, key size must be 16 bytes */ + if (hcon->sec_level == BT_SECURITY_FIPS) + min_key_size = 16; + return (!test_bit(HCI_CONN_ENCRYPT, >flags) || - hcon->enc_key_size >= hcon->hdev->min_enc_key_size); + hcon->enc_key_size >= min_key_size); } static void l2cap_do_start(struct l2cap_chan *chan) -- 2.29.2.299.gdc1121823c-goog
fs/binfmt_flat.c:402:9: sparse: sparse: incorrect type in argument 1 (different address spaces)
Hi Luc, First bad commit (maybe != root cause): tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: eccc876724927ff3b9ff91f36f7b6b159e948f0c commit: e5fc436f06eef54ef512ea55a9db8eb9f2e76959 sparse: use static inline for __chk_{user,io}_ptr() date: 2 months ago config: sh-randconfig-s031-2020 (attached as .config) compiler: sh4-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.3-106-gd020cf33-dirty # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e5fc436f06eef54ef512ea55a9db8eb9f2e76959 git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git git fetch --no-tags linus master git checkout e5fc436f06eef54ef512ea55a9db8eb9f2e76959 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=sh If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot "sparse warnings: (new ones prefixed by >>)" fs/binfmt_flat.c:402:9: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected unsigned long const *__gu_addr @@ got unsigned long [noderef] __user *[assigned] ptr @@ fs/binfmt_flat.c:402:9: sparse: expected unsigned long const *__gu_addr fs/binfmt_flat.c:402:9: sparse: got unsigned long [noderef] __user *[assigned] ptr >> fs/binfmt_flat.c:402:9: sparse: sparse: incorrect type in argument 1 >> (different address spaces) @@ expected void const volatile [noderef] >> __user *ptr @@ got unsigned long const *__gu_addr @@ fs/binfmt_flat.c:402:9: sparse: expected void const volatile [noderef] __user *ptr fs/binfmt_flat.c:402:9: sparse: got unsigned long const *__gu_addr fs/binfmt_flat.c:775:29: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected unsigned int const *__gu_addr @@ got unsigned int [noderef] [usertype] __user *[assigned] rp @@ fs/binfmt_flat.c:775:29: sparse: expected unsigned int const *__gu_addr fs/binfmt_flat.c:775:29: sparse: got unsigned int [noderef] [usertype] __user *[assigned] rp fs/binfmt_flat.c:775:29: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const volatile [noderef] __user *ptr @@ got unsigned int const *__gu_addr @@ fs/binfmt_flat.c:775:29: sparse: expected void const volatile [noderef] __user *ptr fs/binfmt_flat.c:775:29: sparse: got unsigned int const *__gu_addr fs/binfmt_flat.c:812:29: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected restricted __be32 const *__gu_addr @@ got restricted __be32 [noderef] [usertype] __user * @@ fs/binfmt_flat.c:812:29: sparse: expected restricted __be32 const *__gu_addr fs/binfmt_flat.c:812:29: sparse: got restricted __be32 [noderef] [usertype] __user * fs/binfmt_flat.c:812:29: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const volatile [noderef] __user *ptr @@ got restricted __be32 const *__gu_addr @@ fs/binfmt_flat.c:812:29: sparse: expected void const volatile [noderef] __user *ptr fs/binfmt_flat.c:812:29: sparse: got restricted __be32 const *__gu_addr fs/binfmt_flat.c:855:29: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected restricted __be32 const *__gu_addr @@ got restricted __be32 [noderef] [usertype] __user * @@ fs/binfmt_flat.c:855:29: sparse: expected restricted __be32 const *__gu_addr fs/binfmt_flat.c:855:29: sparse: got restricted __be32 [noderef] [usertype] __user * fs/binfmt_flat.c:855:29: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const volatile [noderef] __user *ptr @@ got restricted __be32 const *__gu_addr @@ fs/binfmt_flat.c:855:29: sparse: expected void const volatile [noderef] __user *ptr fs/binfmt_flat.c:855:29: sparse: got restricted __be32 const *__gu_addr fs/binfmt_flat.c:865:13: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void *addr @@ got void [noderef] __user *__cl_addr @@ fs/binfmt_flat.c:865:13: sparse: expected void *addr fs/binfmt_flat.c:865:13: sparse: got void [noderef] __user *__cl_addr -- >> arch/sh/kernel/cpu/sh3/clock-sh7712.c:23:21: sparse: sparse: incorrect type >> in argument 1 (different base types) @@ expected void const volatile >> [noderef] __iomem *ptr @@ got unsigned int @@ >> arch/sh/kernel/cpu/sh3/clock-sh7712.c:23:21: sparse: expected void const >> volatile [noderef]
[RFC PATCH 3/3] KVM: x86: Load guest fpu state when accessing MSRs managed by XSAVES
From: Sean Christopherson When feature MSRs supported in XSS are passed through to the guest they are saved and restored by XSAVES/XRSTORS, i.e. in the guest's FPU state. Load the guest's FPU state if userspace is accessing MSRs whose values are managed by XSAVES so that the MSR helper, e.g. vmx_{get,set}_xsave_msr(), can simply do {RD,WR}MSR to access the guest's value. Because is also used for the KVM_GET_MSRS device ioctl(), explicitly check that @vcpu is non-null before attempting to load guest state. The XSS supporting MSRs cannot be retrieved via the device ioctl() without loading guest FPU state (which doesn't exist). MSRs that are switched through XSAVES are especially annoying due to the possibility of the kernel's FPU being used in IRQ context. Disable IRQs and ensure the guest's FPU state is loaded when accessing such MSRs. Note that guest_cpuid_has() is not queried as host userspace is allowed to access MSRs that have not been exposed to the guest, e.g. it might do KVM_SET_MSRS prior to KVM_SET_CPUID2. Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson Signed-off-by: Yang Weijiang --- arch/x86/kvm/vmx/vmx.c | 22 ++ arch/x86/kvm/x86.c | 23 ++- 2 files changed, 44 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index aef73dd3de4f..25293a499ced 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1773,6 +1773,28 @@ static inline bool vmx_feature_control_msr_valid(struct kvm_vcpu *vcpu, return !(val & ~valid_bits); } +/* + * Below two helpers are used for XSS managed guest MSRs, accessing the MSRs + * should rely on these helpers to avoid latent guest MSR content overwritten. + */ +static void __maybe_unused vmx_get_xsave_msr(struct msr_data *msr_info) +{ + local_irq_disable(); + if (test_thread_flag(TIF_NEED_FPU_LOAD)) + switch_fpu_return(); + rdmsrl(msr_info->index, msr_info->data); + local_irq_enable(); +} + +static void __maybe_unused vmx_set_xsave_msr(struct msr_data *msr_info) +{ + local_irq_disable(); + if (test_thread_flag(TIF_NEED_FPU_LOAD)) + switch_fpu_return(); + wrmsrl(msr_info->index, msr_info->data); + local_irq_enable(); +} + static int vmx_get_msr_feature(struct kvm_msr_entry *msr) { switch (msr->index) { diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index f0557d47c75e..409bde09b293 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -109,6 +109,8 @@ static void enter_smm(struct kvm_vcpu *vcpu); static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); static void store_regs(struct kvm_vcpu *vcpu); static int sync_regs(struct kvm_vcpu *vcpu); +static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu); +static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu); struct kvm_x86_ops kvm_x86_ops __read_mostly; EXPORT_SYMBOL_GPL(kvm_x86_ops); @@ -3575,6 +3577,16 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) } EXPORT_SYMBOL_GPL(kvm_get_msr_common); +/* + * If new features passthrough XSS managed MSRs to guest, it's required to + * add separate checks here so as to load feature dependent guest MSRs before + * access them. + */ +static bool is_xsaves_msr(u32 index) +{ + return false; +} + /* * Read or write a bunch of msrs. All parameters are kernel addresses. * @@ -3585,11 +3597,20 @@ static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs, int (*do_msr)(struct kvm_vcpu *vcpu, unsigned index, u64 *data)) { + bool fpu_loaded = false; int i; - for (i = 0; i < msrs->nmsrs; ++i) + for (i = 0; i < msrs->nmsrs; ++i) { + if (vcpu && !fpu_loaded && supported_xss && + is_xsaves_msr(entries[i].index)) { + kvm_load_guest_fpu(vcpu); + fpu_loaded = true; + } if (do_msr(vcpu, entries[i].index, [i].data)) break; + } + if (fpu_loaded) + kvm_put_guest_fpu(vcpu); return i; } -- 2.17.2
[RFC PATCH 1/3] KVM: x86: Add helpers for {set|clear} bits in supported_xss
From: Sean Christopherson KVM supported XSS feature bits are designated in supported_xss, bits could be set/cleared dynamically, add helpers to facilitate the operation. Also add MSR_IA32_XSS to the list of MSRs reported to userspace if supported_xss is non-zero, i.e. KVM supports at least one XSS based feature. Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson Signed-off-by: Yang Weijiang --- arch/x86/kvm/x86.c | 20 1 file changed, 20 insertions(+) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 397f599b20e5..528eba526c9c 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1237,6 +1237,8 @@ static const u32 msrs_to_save_all[] = { MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13, MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15, MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17, + + MSR_IA32_XSS, }; static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)]; @@ -5728,6 +5730,10 @@ static void kvm_init_msr_list(void) min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp)) continue; break; + case MSR_IA32_XSS: + if (!supported_xss) + continue; + break; default: break; } @@ -10137,6 +10143,18 @@ void kvm_arch_hardware_disable(void) drop_user_return_notifiers(); } +static inline void __maybe_unused kvm_set_xss_bits(u32 low, u32 high) +{ + supported_xss |= low; + supported_xss |= ((u64)high) << 32; +} + +static inline void __maybe_unused kvm_clear_xss_bits(u32 low, u32 high) +{ + supported_xss &= ~low; + supported_xss &= ~(((u64)high) << 32); +} + int kvm_arch_hardware_setup(void *opaque) { struct kvm_x86_init_ops *ops = opaque; @@ -10155,6 +10173,8 @@ int kvm_arch_hardware_setup(void *opaque) if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES)) supported_xss = 0; + else + supported_xss &= host_xss; #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f) cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_); -- 2.17.2
[RFC PATCH 0/3] Get supported_xss ready for XSS dependent
Although supported_xss was added long time ago, yet it doesn't get ready for XSS dependent new features usage, e.g., when guest update XSS MSRs, it's necessary to update guest CPUID to reflect the correct info. So post this patchset to get things ready, or at least as a hint to maintainers that there're still a few things left before support feature bits in XSS. Also added a few helpers to facilitate new features development. This part of code originates from CET KVM patchset, with more and more new features dependent on this part, post this patchset ahead of them. Sean Christopherson (2): KVM: x86: Add helpers for {set|clear} bits in supported_xss KVM: x86: Load guest fpu state when accessing MSRs managed by XSAVES Yang Weijiang (1): KVM: x86: Refresh CPUID when guest modifies MSR_IA32_XSS arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/cpuid.c| 21 -- arch/x86/kvm/vmx/vmx.c | 22 +++ arch/x86/kvm/x86.c | 50 +++-- 4 files changed, 88 insertions(+), 6 deletions(-) -- 2.17.2
[RFC PATCH 2/3] KVM: x86: Refresh CPUID when guest modifies MSR_IA32_XSS
Updated CPUID.0xD.0x1, which reports the current required storage size of all features enabled via XCR0 | XSS, when the guest's XSS is modified. Note, KVM does not yet support any XSS based features, i.e. supported_xss is guaranteed to be zero at this time. Co-developed-by: Zhang Yi Z Signed-off-by: Zhang Yi Z Signed-off-by: Yang Weijiang --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/cpuid.c| 21 ++--- arch/x86/kvm/x86.c | 7 +-- 3 files changed, 24 insertions(+), 5 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index d44858b69353..1620a2cca781 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -611,6 +611,7 @@ struct kvm_vcpu_arch { u64 xcr0; u64 guest_supported_xcr0; + u64 guest_supported_xss; struct kvm_pio_request pio; void *pio_data; diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 06a278b3701d..2c737337f466 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -115,9 +115,24 @@ void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu) best->ebx = xstate_required_size(vcpu->arch.xcr0, false); best = kvm_find_cpuid_entry(vcpu, 0xD, 1); - if (best && (cpuid_entry_has(best, X86_FEATURE_XSAVES) || -cpuid_entry_has(best, X86_FEATURE_XSAVEC))) - best->ebx = xstate_required_size(vcpu->arch.xcr0, true); + if (best) { + if (cpuid_entry_has(best, X86_FEATURE_XSAVES) || + cpuid_entry_has(best, X86_FEATURE_XSAVEC)) { + u64 xstate = vcpu->arch.xcr0 | vcpu->arch.ia32_xss; + + best->ebx = xstate_required_size(xstate, true); + } + + if (!cpuid_entry_has(best, X86_FEATURE_XSAVES)) { + best->ecx = 0; + best->edx = 0; + } + vcpu->arch.guest_supported_xss = + (((u64)best->edx << 32) | best->ecx) & supported_xss; + + } else { + vcpu->arch.guest_supported_xss = 0; + } best = kvm_find_cpuid_entry(vcpu, KVM_CPUID_FEATURES, 0); if (kvm_hlt_in_guest(vcpu->kvm) && best && diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 528eba526c9c..f0557d47c75e 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3124,9 +3124,12 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than * XSAVES/XRSTORS to save/restore PT MSRs. */ - if (data & ~supported_xss) + if (data & ~vcpu->arch.guest_supported_xss) return 1; - vcpu->arch.ia32_xss = data; + if (vcpu->arch.ia32_xss != data) { + vcpu->arch.ia32_xss = data; + kvm_update_cpuid_runtime(vcpu); + } break; case MSR_SMI_COUNT: if (!msr_info->host_initiated) -- 2.17.2
BUG: KASAN: global-out-of-bounds in soc_device_match on arm
The following kernel warning noticed on arm KASAN enabled config while booting on TI beagleboard x15 device. [ 32.127451] BUG: KASAN: global-out-of-bounds in soc_device_match+0x64/0xe4 [ 32.127485] Read of size 4 at addr c21701f8 by task swapper/0/1 [ 32.127508] [ 32.127549] CPU: 0 PID: 1 Comm: swapper/0 Tainted: GW 5.10.0-rc3-next-20201110 #2 [ 32.127577] Hardware name: Generic DRA74X (Flattened Device Tree) [ 32.127604] Backtrace: [ 32.127670] [] (dump_backtrace) from [] (show_stack+0x20/0x24) [ 32.127717] r9:0080 r8:c4208000 r7:c3023060 r6:4093 r5: r4:c3023060 [ 32.127766] [] (show_stack) from [] (dump_stack+0xe8/0x10c) [ 32.127824] [] (dump_stack) from [] (print_address_description.constprop.0+0x3c/0x4b0) [ 32.127871] r10:0030 r9:c5da4010 r8:c5da4000 r7: r6:c0fd5c20 r5:eebf33c0 [ 32.127903] r4:c21701f8 r3:eebf33c4 [ 32.127958] [] (print_address_description.constprop.0) from [] (kasan_report+0x160/0x17c) [ 32.128000] r8:c5da4000 r7: r6:c0fd5c20 r5:0001 r4:c21701f8 [ 32.128053] [] (kasan_report) from [] (__asan_load4+0x6c/0x9c) [ 32.128093] r7:c3c3ede0 r6:c354dea0 r5:c0fd5b88 r4:c21701f8 [ 32.128144] [] (__asan_load4) from [] (soc_device_match+0x64/0xe4) [ 32.128197] [] (soc_device_match) from [] (omap8250_probe+0x628/0x75c) [ 32.128236] r7:b7841730 r6:c6db2c4e r5:0001 r4:c6db2c40 [ 32.128290] [] (omap8250_probe) from [] (platform_drv_probe+0x70/0xc8) [ 32.128335] r10:c5da4044 r9:c5da4048 r8:c34ff834 r7:c3c3e240 r6:c34ff834 r5: [ 32.128363] r4:c5da4010 [ 32.128413] [] (platform_drv_probe) from [] (really_probe+0x184/0x72c) [ 32.128452] r7:c3c3e240 r6: r5:c3c3e1c0 r4:c5da4010 [ 32.128499] [] (really_probe) from [] (driver_probe_device+0xa4/0x270) [ 32.128544] r10:c34ff834 r9:c416fa58 r8:c379e840 r7:c5d75a00 r6:c5da4034 r5:c37c01c0 [ 32.128572] r4:c5da4010 [ 32.128620] [] (driver_probe_device) from [] (device_driver_attach+0x94/0x9c) [ 32.128665] r10: r9:c416fa58 r8:c0f956b4 r7:c5d75a00 r6:c5da4034 r5:c34ff834 [ 32.128693] r4:c5da4010 [ 32.128741] [] (device_driver_attach) from [] (__driver_attach+0xe4/0x19c) [ 32.128780] r7:c34ff834 r6:c5da4010 r5:c34ff834 r4: [ 32.128826] [] (__driver_attach) from [] (bus_for_each_dev+0x100/0x154) [ 32.128865] r7:c34ff834 r6:b78417a4 r5:c420bd40 r4:c5d75a34 [ 32.128910] [] (bus_for_each_dev) from [] (driver_attach+0x38/0x3c) [ 32.128955] r9:c34ff87c r8:c416fa00 r7:c3541a70 r6:c3541a20 r5:c6db4f00 r4:c34ff834 [ 32.129001] [] (driver_attach) from [] (bus_add_driver+0x21c/0x2dc) [ 32.129034] r5:c6db4f00 r4:c34ff834 [ 32.129080] [] (bus_add_driver) from [] (driver_register+0xdc/0x1b0) [ 32.129125] r10: r9:c2b00468 r8:c378a0c0 r7:c2170360 r6:c34ff838 r5:c3541a20 [ 32.129153] r4:c34ff834 [ 32.129202] [] (driver_register) from [] (__platform_driver_register+0x7c/0x84) [ 32.129241] r7:c000 r6:c2bc509c r5: r4:c34ff820 [ 32.129300] [] (__platform_driver_register) from [] (omap8250_platform_driver_init+0x24/0x28) [ 32.129333] r5:c420bf20 r4:b78417d0 [ 32.129387] [] (omap8250_platform_driver_init) from [] (do_one_initcall+0xc4/0x400) [ 32.129437] [] (do_one_initcall) from [] (kernel_init_freeable+0x214/0x268) [ 32.129482] r10:c2d128a8 r9:c2b00468 r8:c2c50834 r7:c2c50854 r6:c2a55ac8 r5:0007 [ 32.129511] r4:c425a700 [ 32.129563] [] (kernel_init_freeable) from [] (kernel_init+0x18/0x140) [ 32.129607] r10: r9: r8: r7: r6: r5:c19bfd04 [ 32.129635] r4: [ 32.129684] [] (kernel_init) from [] (ret_from_fork+0x14/0x38) [ 32.129715] Exception stack(0xc420bfb0 to 0xc420bff8) [ 32.129753] bfa0: [ 32.129798] bfc0: [ 32.129839] bfe0: 0013 [ 32.129872] r5:c19bfd04 r4: [ 32.129894] [ 32.129917] The buggy address belongs to the variable: [ 32.129957] k3_soc_devices+0x38/0x1e0 [ 32.129981] The buggy address belongs to the page: [ 32.130018] page:(ptrval) refcount:1 mapcount:0 mapping: index:0x0 pfn:0x82170 [ 32.130051] flags: 0x1000(reserved) [ 32.130104] raw: 1000 eebf33c4 eebf33c4 0001 [ 32.130133] raw: [ 32.130159] page dumped because: kasan: bad access detected [ 32.130182] [ 32.130205] Memory state around the buggy address: [ 32.130239] c2170080: 00 00 f9 f9 f9 f9 f9 f9 00 00 00 00 00 05 f9 f9 [ 32.130272] c2170100: f9 f9 f9 f9 00 00 00 00 00 01 f9 f9 f9 f9 f9 f9 [ 32.130306] >c2170180: 00 02 f9 f9 f9 f9 f9 f9 00 00 00 00 00 00 00 f9 [ 32.130331] ^ [ 32.130364] c2170200: f9 f9 f9 f9 00 00 00 06 f9 f9 f9 f9 00 00 00 02 [ 32.130397] c2170280: f9 f9
Re: linux-next: manual merge of the notifications tree with Linus' tree
Hi David, On Wed, 21 Oct 2020 12:47:33 +1100 Stephen Rothwell wrote: > > Today's linux-next merge of the notifications tree got conflicts in: > > arch/alpha/kernel/syscalls/syscall.tbl > arch/arm/tools/syscall.tbl > arch/arm64/include/asm/unistd32.h > arch/ia64/kernel/syscalls/syscall.tbl > arch/m68k/kernel/syscalls/syscall.tbl > arch/microblaze/kernel/syscalls/syscall.tbl > arch/mips/kernel/syscalls/syscall_n32.tbl > arch/mips/kernel/syscalls/syscall_n64.tbl > arch/mips/kernel/syscalls/syscall_o32.tbl > arch/parisc/kernel/syscalls/syscall.tbl > arch/powerpc/kernel/syscalls/syscall.tbl > arch/s390/kernel/syscalls/syscall.tbl > arch/sh/kernel/syscalls/syscall.tbl > arch/sparc/kernel/syscalls/syscall.tbl > arch/x86/entry/syscalls/syscall_32.tbl > arch/x86/entry/syscalls/syscall_64.tbl > arch/xtensa/kernel/syscalls/syscall.tbl > include/uapi/asm-generic/unistd.h > > between commit: > > ecb8ac8b1f14 ("mm/madvise: introduce process_madvise() syscall: an external > memory hinting API") > > from Linus' tree and commit: > > 4cd92d064cb0 ("watch_queue: Implement mount topology and attribute change > notifications") > > from the notifications tree. Do you intend to keep this change? If so, will you rebase it? -- Cheers, Stephen Rothwell pgpK3XDUgzzas.pgp Description: OpenPGP digital signature
[PATCH v15 3/9] ptp: Reorganize ptp_kvm module to make it arch-independent.
Currently, ptp_kvm modules implementation is only for x86 which includes large part of arch-specific code. This patch moves all of this code into a new arch related file in the same directory. Signed-off-by: Jianyong Wu --- drivers/ptp/Makefile| 1 + drivers/ptp/ptp_kvm.h | 11 +++ drivers/ptp/{ptp_kvm.c => ptp_kvm_common.c} | 85 +- drivers/ptp/ptp_kvm_x86.c | 95 + 4 files changed, 130 insertions(+), 62 deletions(-) create mode 100644 drivers/ptp/ptp_kvm.h rename drivers/ptp/{ptp_kvm.c => ptp_kvm_common.c} (60%) create mode 100644 drivers/ptp/ptp_kvm_x86.c diff --git a/drivers/ptp/Makefile b/drivers/ptp/Makefile index 7aff75f745dc..699a4e4d19c2 100644 --- a/drivers/ptp/Makefile +++ b/drivers/ptp/Makefile @@ -4,6 +4,7 @@ # ptp-y := ptp_clock.o ptp_chardev.o ptp_sysfs.o +ptp_kvm-$(CONFIG_X86) := ptp_kvm_x86.o ptp_kvm_common.o obj-$(CONFIG_PTP_1588_CLOCK) += ptp.o obj-$(CONFIG_PTP_1588_CLOCK_DTE) += ptp_dte.o obj-$(CONFIG_PTP_1588_CLOCK_INES) += ptp_ines.o diff --git a/drivers/ptp/ptp_kvm.h b/drivers/ptp/ptp_kvm.h new file mode 100644 index ..46fe4c7c377d --- /dev/null +++ b/drivers/ptp/ptp_kvm.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Virtual PTP 1588 clock for use with KVM guests + * + * Copyright (C) 2017 Red Hat Inc. + */ + +int kvm_arch_ptp_init(void); +int kvm_arch_ptp_get_clock(struct timespec64 *ts); +int kvm_arch_ptp_get_crosststamp(u64 *cycle, + struct timespec64 *tspec, void *cs); diff --git a/drivers/ptp/ptp_kvm.c b/drivers/ptp/ptp_kvm_common.c similarity index 60% rename from drivers/ptp/ptp_kvm.c rename to drivers/ptp/ptp_kvm_common.c index 658d33fc3195..2df4ff3c518f 100644 --- a/drivers/ptp/ptp_kvm.c +++ b/drivers/ptp/ptp_kvm_common.c @@ -8,15 +8,16 @@ #include #include #include +#include #include #include #include -#include -#include #include #include +#include "ptp_kvm.h" + struct kvm_ptp_clock { struct ptp_clock *ptp_clock; struct ptp_clock_info caps; @@ -24,56 +25,29 @@ struct kvm_ptp_clock { static DEFINE_SPINLOCK(kvm_ptp_lock); -static struct pvclock_vsyscall_time_info *hv_clock; - -static struct kvm_clock_pairing clock_pair; -static phys_addr_t clock_pair_gpa; - static int ptp_kvm_get_time_fn(ktime_t *device_time, struct system_counterval_t *system_counter, void *ctx) { - unsigned long ret; + long ret; + u64 cycle; struct timespec64 tspec; - unsigned version; - int cpu; - struct pvclock_vcpu_time_info *src; + struct clocksource *cs; spin_lock(_ptp_lock); preempt_disable_notrace(); - cpu = smp_processor_id(); - src = _clock[cpu].pvti; - - do { - /* -* We are using a TSC value read in the hosts -* kvm_hc_clock_pairing handling. -* So any changes to tsc_to_system_mul -* and tsc_shift or any other pvclock -* data invalidate that measurement. -*/ - version = pvclock_read_begin(src); - - ret = kvm_hypercall2(KVM_HC_CLOCK_PAIRING, -clock_pair_gpa, -KVM_CLOCK_PAIRING_WALLCLOCK); - if (ret != 0) { - pr_err_ratelimited("clock pairing hypercall ret %lu\n", ret); - spin_unlock(_ptp_lock); - preempt_enable_notrace(); - return -EOPNOTSUPP; - } - - tspec.tv_sec = clock_pair.sec; - tspec.tv_nsec = clock_pair.nsec; - ret = __pvclock_read_cycles(src, clock_pair.tsc); - } while (pvclock_read_retry(src, version)); + ret = kvm_arch_ptp_get_crosststamp(, , ); + if (ret) { + spin_unlock(_ptp_lock); + preempt_enable_notrace(); + return ret; + } preempt_enable_notrace(); - system_counter->cycles = ret; - system_counter->cs = _clock; + system_counter->cycles = cycle; + system_counter->cs = cs; *device_time = timespec64_to_ktime(tspec); @@ -111,22 +85,17 @@ static int ptp_kvm_settime(struct ptp_clock_info *ptp, static int ptp_kvm_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts) { - unsigned long ret; + long ret; struct timespec64 tspec; spin_lock(_ptp_lock); - ret = kvm_hypercall2(KVM_HC_CLOCK_PAIRING, -clock_pair_gpa, -KVM_CLOCK_PAIRING_WALLCLOCK); - if (ret != 0) { - pr_err_ratelimited("clock offset hypercall ret %lu\n", ret); + ret = kvm_arch_ptp_get_clock(); +