On Sun, 17 Jan 2021 at 13:31, Jiang Biao wrote:
>
> From: Jiang Biao
>
> delta in update_stats_wait_end() might be negative, which would
> make following statistics go wrong.
Could you describe the use case that generates a negative delta ?
rq_clock is always increasing so this should not lead
Hi
Am 18.01.21 um 08:43 schrieb Christian König:
Hi Eli,
have you already tried using kmemleak?
This sounds like a leak of memory allocated using kmalloc(), so kmemleak
should be able to catch it.
I have an idea what happens here. When the refcount is 0 in kmap, a new
page mapping for the
On Mon, Jan 18, 2021 at 08:43:12AM +0100, Christian König wrote:
> Hi Eli,
>
> have you already tried using kmemleak?
>
> This sounds like a leak of memory allocated using kmalloc(), so kmemleak
> should be able to catch it.
>
Hi Christian,
I have the following configured but I did not see
On Mon, Jan 18, 2021 at 7:53 AM Thomas Zimmermann wrote:
>
> Hi
>
> Am 18.01.21 um 02:22 schrieb ZhiJie.Zhang:
> > From: zhangzhijie
> >
> > this callback was used by drm_kms_helper_hotplug_event()
> >
> > V2: (Thanks for Daniel's suggestions)
> > - remove the FIXME below.since with the
On Mon, Jan 18, 2021 at 04:36:55AM +, Aisheng Dong wrote:
> > From: Randy Dunlap
> > Sent: Saturday, January 16, 2021 11:33 AM
> > Subject: [PATCH] imx: select SOC_BUS to fix firmware build
>
> Patch title probably is better to be:
> firmware: imx: x
Fixed it up and applied.
On Fri, Jan 15, 2021 at 10:01:23PM +0100, Adrien Grassein wrote:
> Tested with a basic Build Root configuration booting from sdcard.
>
> Signed-off-by: Adrien Grassein
> ---
> arch/arm64/boot/dts/freescale/Makefile| 1 +
> .../dts/freescale/imx8mm-nitrogen8mm_rev2.dts | 415
On 18-01-21, 03:55, Dmitry Osipenko wrote:
> Fix adding OPP entries in a wrong (opposite) order if OPP rate is
> unavailable. The OPP comparison was erroneously skipped, thus OPPs
> were left unsorted.
>
> Tested-by: Peter Geis
> Tested-by: Nicolas Chauvet
> Tested-by: Matt Merhar
>
Hi Eli,
have you already tried using kmemleak?
This sounds like a leak of memory allocated using kmalloc(), so kmemleak
should be able to catch it.
Regards,
Christian.
Am 17.01.21 um 06:08 schrieb Eli Cohen:
On Fri, Jan 15, 2021 at 10:03:50AM +0100, Thomas Zimmermann wrote:
Could you
Hi Daniel,
Thank you for the patch.
On Mon, Jan 18, 2021 at 12:34:28AM +, Daniel Scally wrote:
> This driver only covered one scenario in which ACPI devices with _HID
> INT3472 are found, and its functionality has been taken over by the
> intel-skl-int3472 module, so remove it.
>
>
In fast_isolate_freepages, high_pfn will be used if a prefered one(PFN >=
low_fn) not found. But the high_pfn
is not reset before searching an free area, so when it was used as freepage, it
may from another free area searched before.
And move_freelist_head(freelist, freepage) will have
* Drew Fustini [210115 21:40]:
> On Fri, Jan 15, 2021 at 07:02:01PM +0100, Emmanuel Vadot wrote:
> >
> > Hello Drew,
> >
> > On Wed, 1 Jul 2020 03:33:20 +0200
> > Drew Fustini wrote:
> >
> > > Increase #pinctrl-cells to 2 so that mux and conf be kept separate. This
> > > requires the
On Mon, Jan 18, 2021 at 3:34 PM Viresh Kumar wrote:
>
> On 18-01-21, 15:21, Hsin-Yi Wang wrote:
> > Do you still have plans to push this? I've tested on mt8183 cci with:
>
> I was never able to get Saravana to test this, if you are interested
> in this stuff then I can rebase this and resend and
On Fri, Jan 15, 2021 at 11:16:13AM +0100, Pawel Dembicki wrote:
> This patch adds spi-uart controller to LS1012A-FRDM board dts.
> Device is equipped in SC16IS740 from NXP.
>
> Signed-off-by: Pawel Dembicki
> ---
> .../boot/dts/freescale/fsl-ls1012a-frdm.dts | 21 +++
> 1
Hi Daniel,
Thank you for the patch.
On Mon, Jan 18, 2021 at 12:34:26AM +, Daniel Scally wrote:
> I need to be able to translate GPIO resources in an acpi_device's _CRS
> into gpio_descs. Those are represented in _CRS as a pathname to a GPIO
> device plus the pin's index number: this function
* Geert Uytterhoeven [210115 09:57]:
> CC DT
>
> On Fri, Jan 15, 2021 at 10:42 AM Tony Lindgren wrote:
> > Later on we may want to consider handling simple-pm-bus directly in
> > drivers/of/platform.c as then we no longer need the platform data for
> > simple-pm-bus.
As we still need a device
On Fri, Jan 15, 2021 at 11:16:12AM +0100, Pawel Dembicki wrote:
> LS1012A-RDB equipped in some i2c devices:
> - 3x GPIO Expander: PCAL9555A (NXP)
> - Gyro: FXAS21002 (NXP)
> - Accelerometer: FXOS8700 (NXP)
> - Current & Power Monitor: INA220 (TI)
>
> This patch add listed devices to dts.
End users frequently want to know what features their processor
supports, independent of what the kernel supports.
/proc/cpuinfo is great. It is omnipresent and since it is provided by
the kernel it is always as up to date as the kernel. But, it could be
ambiguous about processor features which
On 18-01-21, 15:21, Hsin-Yi Wang wrote:
> Do you still have plans to push this? I've tested on mt8183 cci with:
I was never able to get Saravana to test this, if you are interested
in this stuff then I can rebase this and resend and we can see if it
works.
--
viresh
Hi Daniel,
Thank you for the patch.
On Mon, Jan 18, 2021 at 12:34:23AM +, Daniel Scally wrote:
> In some ACPI tables we encounter, devices use the _DEP method to assert
> a dependence on other ACPI devices as opposed to the OpRegions that the
> specification intends. We need to be able to
After converting am335x to probe devices with simple-pm-bus I noticed
that we are not passing auxdata for of_platform_populate() like we do
with simple-bus.
While device tree using SoCs should no longer need platform data, there
are still quite a few drivers that still need it as can be seen with
On 18-01-21, 04:13, Dmitry Osipenko wrote:
> Driver of a power domain provider may not be ready at the time of
> of_genpd_add_subdomain() invocation. Make this function to return
> -EPROBE_DEFER instead of -ENOENT in order to remove a need from
> power domain drivers to handle the error code
On 18-01-21, 04:13, Dmitry Osipenko wrote:
> Add "performance" column to debug summary which shows performance state
> of all power domains and theirs devices.
>
> Tested-by: Peter Geis
> Tested-by: Nicolas Chauvet
> Tested-by: Matt Merhar
> Reviewed-by: Ulf Hansson
> Signed-off-by: Dmitry
Clean up that CONFIG_RETPOLINE crud and replace the
indirect call x86_pmu.guest_get_msrs with static_call().
Suggested-by: Peter Zijlstra (Intel)
Signed-off-by: Like Xu
---
arch/x86/events/core.c | 16
arch/x86/events/intel/core.c | 20
2 files
On 18-01-21, 04:13, Dmitry Osipenko wrote:
> Make set_performance_state() callback optional in order to remove the
> need from power domain drivers to implement a dummy callback. If callback
> isn't implemented by a GENPD driver, then the performance state is passed
> to the parent domain.
>
>
Hi Daniel,
Thank you for the patch.
On Mon, Jan 18, 2021 at 12:34:24AM +, Daniel Scally wrote:
> Some places in the kernel allow users to map resources to a device
> using device name (for example, gpiod_lookup_table). Currently
> this involves waiting for the i2c_client to have been
On Sat, Jan 9, 2021 at 12:25 AM Kai-Heng Feng
wrote:
>
> Commit 8765c5ba19490 ("ACPI / scan: Rework modalias creation when
> "compatible" is present") creates two modaliases for certain ACPI
> devices. However userspace (systemd-udevd in this case) assumes uevent
> file doesn't have duplicated
Hi Daniel,
Thank you for the patch.
On Mon, Jan 18, 2021 at 12:34:22AM +, Daniel Scally wrote:
> I need to be able to identify devices which declare themselves to be
> dependent on other devices through _DEP; add this function to utils.c
> and export it to the rest of the ACPI layer.
>
>
On 2021-01-18 15:37, Steffen Klassert wrote:
> On Fri, Jan 15, 2021 at 05:12:33PM +, Alexander Lobakin wrote:
> > From: Dongseok Yi
> > Date: Fri, 15 Jan 2021 22:20:35 +0900
> >
> > > UDP/IP header of UDP GROed frag_skbs are not updated even after NAT
> > > forwarding. Only the header of
On Thu, Jan 30, 2020 at 12:21 PM Viresh Kumar wrote:
>
> On 29-01-20, 19:04, Sibi Sankar wrote:
> > I don't have a gen-pd use case to test against but with the is_genpd
> > check removed it works as expected when I used it against this
> > series: https://patchwork.kernel.org/cover/11353185/
> >
On Sun, Jan 17, 2021 at 10:47:59AM -0800, Olof Johansson wrote:
> Hi,
>
> On Mon, Nov 30, 2020 at 10:42 AM Scott Branden
> wrote:
> >
> > This patch series drops previous patches in [1]
> > that were incorporated by Kees Cook into patch series
> > "Introduce partial kernel_read_file() support"
On Wed, Jan 13, 2021 at 02:53:08PM +0200, Abel Vesa wrote:
> Add a section for NXP i.MX clock drivers and list myself
> as the maintainer.
>
> Signed-off-by: Abel Vesa
Acked-by: Shawn Guo
On Wed, Jan 13, 2021 at 12:15:44AM +0100, Andreas Kemnade wrote:
> - add second uart
> - correct pinmux for console uart (it was working before because of
> setup by uboot)
> - document locations on board
>
> Andreas Kemnade (4):
> ARM: dts: imx6sl-tolino-shine2hd: correct console uart pinmux
Hi Peter and Kan,
On Thu, Dec 10, 2020 at 11:25 PM Peter Zijlstra wrote:
>
> On Thu, Dec 10, 2020 at 08:52:55AM -0500, Liang, Kan wrote:
> >
> >
> > On 12/10/2020 2:13 AM, Namhyung Kim wrote:
> > > Hi Peter and Kan,
> > >
> > > How can we move this forward?
> >
> > Hi Namhyung,
> >
> > Thanks
On Tue, Jan 12, 2021 at 10:51:48AM +0100, Martin Kepplinger wrote:
> This enables the Librem5's ft8006p based LCD panel driven by the
> imx8mq's Northwest Logic DSI IP core and mxsfb display controller.
>
> Signed-off-by: Martin Kepplinger
> ---
> .../boot/dts/freescale/imx8mq-librem5.dtsi|
On Fri, 15 Jan 2021 at 18:18, Mike Leach wrote:
>
> Hi Chunyan,
>
> On Fri, 15 Jan 2021 at 08:39, Chunyan Zhang wrote:
> >
> > From: Bin Ji
> >
> > Add ETM amba id to support Cortex-A55(Ananke) and Cortex-A75(Promethus).
> >
> > Signed-off-by: Bin Ji
> > Signed-off-by: Chunyan Zhang
> > ---
>
On 14-01-21, 09:51, Linus Torvalds wrote:
> On Thu, Jan 14, 2021 at 3:34 AM Viresh Kumar wrote:
> >
> > This is build/boot tested by kernel test robot (Intel) and Linaro's
> > Tuxmake[2] for a lot of architectures and no failures were reported.
>
> Can you make sure this is in linux-next, and
From: Chunyan Zhang
Add AMBA UCI id to support Cortex-A55(Ananke) and Cortex-A75(Promethus).
Signed-off-by: Bin Ji
Signed-off-by: Chunyan Zhang
---
Changes since v1:
* Addressed Mike's comments - changed to use CS_AMBA_UCI_ID().
---
drivers/hwtracing/coresight/coresight-etm4x-core.c | 2 ++
on stable-rc 4.19 and stable-rc 5.4 branch MIPS cavium_octeon_defconfig and
nlm_xlp_defconfig builds failed recently.
Regressions (compared to build v4.19.167-43-g5a52ae31885b)
Regressions (compared to build v5.4.89-62-ga698e3bcad9e)
mips:
build:
* gcc-10-cavium_octeon_defconfig
*
On 17-01-21, 15:26, Christophe JAILLET wrote:
> If 'cpufreq_register_driver()' fails, we must release the resources
> allocated in 'brcm_avs_prepare_init()' as already done in the remove
> function.
>
> To do that, introduce a new function 'brcm_avs_prepare_uninit()' in order
> to avoid code
Hi
Am 18.01.21 um 02:22 schrieb ZhiJie.Zhang:
From: zhangzhijie
this callback was used by drm_kms_helper_hotplug_event()
V2: (Thanks for Daniel's suggestions)
- remove the FIXME below.since with the drm_client
- infrastructure and the generic fbdev emulation we've
- resolved this all very
Hi Ray,
On Mon, 18 Jan 2021 05:56:20 + "Huang, Ray" wrote:
>
> [AMD Public Use]
>
> Thanks Setphen. Please check attached V2 patch.
> (If you can share the config file to me, I can do the test in my side)
It looks good, but I did not try to build it. I have attached the
config (it is just
We add binding for supporting a new AST2600 PWM/Fan hwmon driver.
Changes since v2:
- Fixed yamllint warnings/errors
Changes since v1:
- dt binding with DT schema format
Signed-off-by: Troy Lee
Reported-by: Rob Herring
---
.../hwmon/aspeed,ast2600-pwm-tachometer.yaml | 131
On Fri, Jan 15, 2021 at 11:14:50AM +0530, Viresh Kumar wrote:
> +David,
>
> On 14-01-21, 09:01, Rob Herring wrote:
> > On Wed, Jan 13, 2021 at 11:03 PM Viresh Kumar
> > wrote:
> > >
> > > On 11-01-21, 09:46, Rob Herring wrote:
> > > > On Fri, Jan 8, 2021 at 2:41 AM Viresh Kumar
> > > > wrote:
Add Aspeed AST2600 PWM/Fan tacho driver. AST2600 has 16 PWM channel and
16 FAN tacho channel.
Changes since v2:
- declare local function as static function
Changes since v1:
- fixed review comments
- fixed double-looped calculation of div_h and div_l
- moving configuration to device tree
-
Create a common node in aspeed-g6.dtsi and add fan nodes for ast2600-evb
dts file.
Changes since v2:
- Change property name pwm-freq to pwm-freq-hz
Changes since v1:
- rename properties name in child node
Signed-off-by: Troy Lee
---
arch/arm/boot/dts/aspeed-ast2600-evb.dts | 152
Updating index.rst and adding aspeed2600-pwm-tachometer.rst to address
the driver.
Changes since v1:
- rename to aspeed2600-pwm-tachometer.rst
- add license identifier
Signed-off-by: Troy Lee
---
.../hwmon/aspeed2600-pwm-tachometer.rst | 27 +++
Aspeed AST2600 is a server management SoC which has 16 PWM channels and
16 fan tacho channel.
This series of patch provides AST2600 PWM/Fan tacho support in hwmon
class.
The driver provides a sysfs interface, and user can configure PWM duty
cycle and read current FAN speed in RPM.
Changes since
Hi all,
Changes since 20210115:
New trees: oprofile-removal gpio-brgl-fixes
The drm tree gained a conflict against Linus' tree but still had its
build failure so I used the version from next-20210107.
The amdgpu tree lost its build failure.
The drm-intel tree still had its build failure from
Hi Shawn,
> > + can0: can@218 {
> > + compatible = "fsl,lx2160ar1-flexcan";
> > + reg = <0x0 0x218 0x0 0x1>;
> > + interrupts = ;
> > + clocks = < 4 7>, <>;
>
> Can defines in
On Mon, Jan 11, 2021 at 04:17:04PM +0100, Max Krummenacher wrote:
> When the kernel is configured to use the Thumb-2 instruction set
> "suspend-to-memory" fails to resume. Observed on a Colibri iMX6ULL
> (i.MX 6ULL) and Apalis iMX6 (i.MX 6Q).
>
> It looks like the CPU resumes unconditionally in
On Fri, Jan 15, 2021 at 05:12:33PM +, Alexander Lobakin wrote:
> From: Dongseok Yi
> Date: Fri, 15 Jan 2021 22:20:35 +0900
>
> > UDP/IP header of UDP GROed frag_skbs are not updated even after NAT
> > forwarding. Only the header of head_skb from ip_finish_output_gso ->
> > skb_gso_segment is
On 18-01-21, 02:18, Dmitry Osipenko wrote:
> Switch cpufreq-tegra20 driver to use resource-managed API.
> This removes the need to get opp_table pointer using
> dev_pm_opp_get_opp_table() in order to release OPP table that
> was requested by dev_pm_opp_set_supported_hw(), making the code
> a bit
Hi Lukasz,
I has been developed[1] the sysfs attributes for upthreshold and
downdifferential.
But, I has not yet posted it[1]. I'll post my approach with some changes.
[1]
On Mon, Jan 11, 2021 at 04:15:37PM +0100, Bruno Thomsen wrote:
> RTC pcf2127 device driver has changed default behaviour of the watchdog
> feature in v5.11-rc1. Now you need to explicitly enable it with a
> device tree property, "reset-source", when used in the board design.
It sound that the
Since commit 36e789144267 ("kill do_generic_mapping_read"), the function
do_generic_mapping_read() is renamed to do_generic_file_read(). And then
commit 47c27bc46946 ("fs: pass iocb to do_generic_file_read") renamed it
to generic_file_buffered_read(). So replace do_generic_mapping_read() with
On 2021-01-13 14:10, Felipe Balbi wrote:
Hi,
Sandeep Maheswaram writes:
This patch adds a shutdown callback to USB DWC QCOM driver to ensure
that
it is properly shutdown in reboot/shutdown path. This is required
where SMMU address translation is enabled like on SC7180
SoC and few others. If
On Mon, Jan 11, 2021 at 12:45:55PM +0100, Michael Walle wrote:
> Now that we have a proper driver for the FlexSPI interface use it. This
> will fix SCK frequency switching on Layerscape SoCs.
>
> This was tested on the Kontron sl28 board.
>
> Signed-off-by: Michael Walle
Applied, thanks.
On Mon, Jan 11, 2021 at 11:18:50AM +0100, Oleksij Rempel wrote:
> changes v7:
> - add Acked-by: Rob Herring to the firs patch
> - imx6qdl-vicut1.dtsi: add missing KEY_POWER
> - imx6dl-victgo.dts: add missing gpio flags to rotary-encoder
> - imx6dl-victgo.dts: rename video@5c to video-decoder@5c
On Sun, Jan 17, 2021 at 2:24 PM Christophe JAILLET
wrote:
>
> The wrappers in include/linux/pci-dma-compat.h should go away.
>
> The patch has been generated with the coccinelle script below and has been
> hand modified to replace GFP_ with a correct flag.
> It has been compile tested.
>
> When
On Wed, Dec 30, 2020 at 11:29 AM Chen-Yu Tsai wrote:
>
> On Tue, Dec 22, 2020 at 4:17 PM Jernej Škrabec
> wrote:
> >
> > Hi!
> >
> > Dne petek, 18. december 2020 ob 20:50:33 CET je Paul Kocialkowski
> > napisal(a):
> > > This adds a device-tree definition for the CSI0 MCLK pin,
> > > which can
Currently, requesting kernel FPU access doesn't distinguish which parts of
the extended ("FPU") state are needed. This is nice for simplicity, but
there are a few cases in which it's suboptimal:
- The vast majority of in-kernel FPU users want XMM/YMM/ZMM state but do
not use legacy 387
The default kernel_fpu_begin() doesn't work on systems that support XMM but
haven't yet enabled OSFXSR. This causes crashes when _mmx_memcpy() is
called too early.
Fix it by using kernel_fpu_begin(KFPU_MMX) explicitly. This should also be
faster, since it skips both the reasonably fast LDMXCSR
The remaining callers of kernel_fpu_begin() in 64-bit kernels don't use 387
instructions, so there's no need to sanitize FCW. Skip it to get the
performance we lost back.
Reported-by: Krzysztof Olędzki
Signed-off-by: Andy Lutomirski
---
arch/x86/include/asm/fpu/api.h | 12
1 file
This series fixes two regressions: a boot failure on AMD K7 and a
performance regression on everything.
I did a double-take here -- the regressions were reported by different
people, both named Krzysztof :)
Andy Lutomirski (4):
x86/fpu: Add kernel_fpu_begin_mask() to selectively initialize
EFI uses kernel_fpu_begin() to conform to the UEFI calling convention.
This specifically requires initializing FCW, whereas no sane 64-bit kernel
code should use legacy 387 operations that reference FCW.
Add KFPU_EFI to make this self-documenting, and use it in the EFI code.
This should enable us
On 2021-01-13 16:26, David Howells wrote:
Casey Schaufler wrote:
>> How would this interact with or complement __read_mostly?
>>
> Currently, the mechanism we are working on developing is
> independent of __read_mostly. This is something we can look more into
> while working further on the
On 1/18/21 12:00 AM, Samuel Holland wrote:
> This series cleans up some dead code in the sunxi-cir driver and adds
> system power management hooks.
>
> ---
> Changes from v1:
> - Unregister the RC device first thing in sunxi_ir_remove() [3]
I forgot to add:
Acked-by: Maxime Ripard
from v1.
This series cleans up some dead code in the sunxi-cir driver and adds
system power management hooks.
---
Changes from v1:
- Unregister the RC device first thing in sunxi_ir_remove() [3]
Samuel Holland (4):
media: sunxi-cir: Clean up dead register writes
media: sunxi-cir: Remove unnecessary
In preparation for adding suspend/resume hooks, factor out the hardware
initialization from the driver probe/remove functions.
The timeout programmed during init is taken from the `struct rc_dev` so
it is maintained across an exit/init cycle.
This resolves some trivial issues with the probe
Only one register, SUNXI_IR_CIR_REG, is accessed from outside the
interrupt handler, and that register is not accessed from inside it.
As there is no overlap between different contexts, no lock is needed.
Signed-off-by: Samuel Holland
---
drivers/media/rc/sunxi-cir.c | 10 --
1 file
The register writes during driver removal occur after the device is
already put back in reset, so they never had any effect.
Signed-off-by: Samuel Holland
---
drivers/media/rc/sunxi-cir.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/drivers/media/rc/sunxi-cir.c
Receiving ACK with a valid SYN cookie, cookie_v4_check() allocates struct
request_sock and then can allocate inet_rsk(req)->ireq_opt. After that,
tcp_v4_syn_recv_sock() allocates struct sock and copies ireq_opt to
inet_sk(sk)->inet_opt. Normally, tcp_v4_syn_recv_sock() inserts the full
socket into
To save power, gate/reset the hardware block while the system is
asleep or powered off.
Signed-off-by: Samuel Holland
---
drivers/media/rc/sunxi-cir.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
index
On 2021-01-12 22:36, Casey Schaufler wrote:
On 1/12/2021 1:36 AM, pna...@codeaurora.org wrote:
On 2021-01-08 22:41, Casey Schaufler wrote:
On 1/8/2021 1:49 AM, Preeti Nagar wrote:
The changes introduce a new security feature, RunTime Integrity
Check
(RTIC), designed to protect Linux Kernel
[AMD Public Use]
Thanks Setphen. Please check attached V2 patch.
(If you can share the config file to me, I can do the test in my side)
Best Regards,
Ray
-Original Message-
From: Stephen Rothwell
Sent: Monday, January 18, 2021 1:29 PM
To: Alex Deucher
Cc: Huang, Ray ; Linux Kernel
All IRQs that can be used to wake up the system must be routed through
r_intc, so they are visible to firmware while the system is suspended.
In addition to the external NMI input, which is already routed through
r_intc, these include PIO and R_PIO (gpio-keys), the LRADC, and the RTC.
Acked-by:
The R_INTC block controls more than just the NMI, and it is a different
hardware block than the NMI INTC found in some other Allwinner SoCs, so
the label "nmi_intc" is inaccurate. Name it "r_intc" to match the
compatible and to match the few references in the vendor documentation.
Acked-by:
The binding of R_INTC was updated to allow specifying interrupts other
than the external NMI, since routing those interrupts through the R_INTC
driver allows using them for wakeup.
Update the device trees to use the new binding.
Acked-by: Maxime Ripard
Signed-off-by: Samuel Holland
---
All IRQs that can be used to wake up the system must be routed through
r_intc, so they are visible to firmware while the system is suspended.
In addition to the external NMI input, which is already routed through
r_intc, these include PIO and R_PIO (gpio-keys), the LRADC, and the RTC.
Acked-by:
The R_INTC in the A31 and newer sun8i/sun50i SoCs is more similar to the
original sun4i interrupt controller than the sun7i/sun9i NMI controller.
It is used for two distinct purposes:
- To control the trigger, latch, and mask for the NMI input pin
- To provide the interrupt input for the ARISC
The H3 and H5 SoCs have an additional interrupt controller in the RTC
power domain that can be used to enable wakeup for certain IRQs.
Add a node for it.
Acked-by: Maxime Ripard
Signed-off-by: Samuel Holland
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 9 +
1 file changed, 9 insertions(+)
The binding of R_INTC was updated to allow specifying interrupts other
than the external NMI, since routing those interrupts through the R_INTC
driver allows using them for wakeup.
Update the device trees to use the new binding.
Acked-by: Maxime Ripard
Signed-off-by: Samuel Holland
---
The R_INTC in the A31 and newer sun8i/sun50i SoCs has additional
functionality compared to the sun7i/sun9i NMI controller. Among other
things, it multiplexes access to up to 128 interrupts corresponding to
(and in parallel to) the first 128 GIC SPIs. This means the NMI is no
longer the
On 15.01.21 20:11, Randy Dunlap wrote:
Fix build error in x86/xen/ when PARAVIRT_SPINLOCKS is not enabled.
Fixes this build error:
../arch/x86/xen/smp_hvm.c: In function ‘xen_hvm_smp_init’:
../arch/x86/xen/smp_hvm.c:77:3: error: ‘nopvspin’ undeclared (first use in this
function)
nopvspin
Allwinner sun6i/sun8i/sun50i SoCs (A31 and newer) have two interrupt
controllers: GIC and R_INTC. GIC does not support wakeup. R_INTC handles
the external NMI pin, and provides 32+ IRQs to the ARISC. The first 16
of these correspond 1:1 to a block of GIC IRQs starting with the NMI.
The last 13-16
Maintain bitmaps of wake-enabled IRQs and mux inputs, and program them
to the hardware during the syscore phase of suspend and shutdown. Then
restore the original set of enabled IRQs (only the NMI) during resume.
This serves two purposes. First, it lets power management firmware
running on the
The Allwinner H3 SoC contains an R_INTC that is, as far as we know,
compatible with the R_INTC present in other sun8i SoCs starting with
the A31. Since the R_INTC hardware is undocumented, introduce a new
compatible for the R_INTC variant in this SoC, in case there turns out
to be some difference.
The remote-endpoint may not be available if it is part of some
pluggable module. One such example would be an audio card, the
Codec endpoint will not be available until it is plugged in.
Hence drop 'remote-endpoint' as a required property.
Cc: Rob Herring
Cc: Kuninori Morimoto
Signed-off-by:
Enable ARM Power State Coordination Interface (PSCI) support on Qualcomm
platforms.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
index
Enable Command DB driver to query the shared system resources on
platforms using RPMh such as SDX55.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
On 1/15/2021 9:45 PM, Bjorn Andersson wrote:
On Thu 24 Dec 05:12 CST 2020, Roja Rani Yarubandi wrote:
While most devices within power-domains which support performance states,
scale the performance state dynamically, some devices might want to
set a static/default performance state while the
Enable watchdog driver for Qualcomm platforms.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/configs/qcom_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
index 5627b142d5fb..9573c0406954 100644
---
Enable RPMh power domain driver to support power-domains on platforms
like SDX55.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
index
Enable DWC3 controller, QMP PHY and SNPS HS PHY for using with platforms
like SDX55.
---
arch/arm/configs/qcom_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
index 51eeefd264d3..77f234bf84c8 100644
---
Enable UBI file system support.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
index 07737cbe557f..51eeefd264d3 100644
---
Enable RPMh regulator for using with platforms like SDX55.
---
arch/arm/configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
index 70dd57b110ab..5627b142d5fb 100644
--- a/arch/arm/configs/qcom_defconfig
+++
Enable ARM SMMU driver for using with platforms like SDX55.
---
arch/arm/configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
index 77f234bf84c8..70dd57b110ab 100644
--- a/arch/arm/configs/qcom_defconfig
+++
Enable MTD UBI driver for using partitions on top of NAND flash in
platforms like SDX55.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
index
Enable Qcom SDX55 GCC driver for clock support.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
index bd269ade52cf..13b5a906b427 100644
---
Enable Qcom SMEM partition parser driver to make use of the NAND
partitions defined in Shared Memory (SMEM).
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/qcom_defconfig
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