Re: [PATCH v2 0/4] x86/fpu: Reduce unnecessary FNINIT and MXCSR usage

2021-01-19 Thread Krzysztof Olędzki

On 2021-01-19 at 09:38, Andy Lutomirski wrote:

This series fixes two regressions: a boot failure on AMD K7 and a
performance regression on everything.

I did a double-take here -- the regressions were reported by different
people, both named Krzysztof :)

Changes from v1:
  - Fix MMX better -- MMX really does need FNINIT.
  - Improve the EFI code.
  - Rename the KFPU constants.
  - Changelog improvements.

Andy Lutomirski (4):
   x86/fpu: Add kernel_fpu_begin_mask() to selectively initialize state
   x86/mmx: Use KFPU_387 for MMX string operations
   x86/fpu: Make the EFI FPU calling convention explicit
   x86/fpu/64: Don't FNINIT in kernel_fpu_begin()


Hi Andy.

I have quickly tested the new version on E3-1280 V2.

* 5.10.9 + 7ad816762f9bf89e940e618ea40c43138b479e10 reverted (aka unfixed)
xor: measuring software checksum speed
   avx : 38616 MB/sec
   prefetch64-sse  : 25797 MB/sec
   generic_sse : 23147 MB/sec
xor: using function: avx (38616 MB/sec)

* 5.10.9 (the original)
xor: measuring software checksum speed
   avx : 23318 MB/sec
   prefetch64-sse  : 22562 MB/sec
   generic_sse : 20431 MB/sec
xor: using function: avx (23318 MB/sec)

* 5.10.9 + "Reduce unnecessary FNINIT and MXCSR usage" v2
xor: measuring software checksum speed
   avx : 26451 MB/sec
   prefetch64-sse  : 25777 MB/sec
   generic_sse : 23178 MB/sec
xor: using function: avx (26451 MB/sec)

Overall, kernel xor benchmark reports better performance on 5.10.9 than 
on 5.4.90 (see my prev e-mail), but the general trend is the same.


The "unfixed" kernel is much faster for all of avx, prefetch64-sse and 
generic_sse. With the fix, we see the expected perf regression.


Now, with your patchset, both prefetch64-sse and generic_sse are able to 
recover the full performance, as seen on 5.4. However, this is not the 
case for avx. While there is still an improvement, it is nowhere close 
to where it used to be.


I wonder why AVX still sees a regression and if anything more can be 
done about it?


Will do more tests tomorrow.

Thanks,
 Krzysztof


Re: [PATCH v3 2/3] reset: mchp: sparx5: add switch reset driver

2021-01-19 Thread Steen Hegelund
Hi Alex,

On Tue, 2021-01-19 at 21:37 +0100, Alexandre Belloni wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
> 
> Hi,
> 
> This commit is also missing a commit message and you could probably
> get
> some info from your cover letter here.

I will do that.

> 
> On 14/01/2021 17:24:31+0100, Steen Hegelund wrote:
> > Signed-off-by: Steen Hegelund 
> > ---
> >  drivers/reset/Kconfig  |   8 ++
> >  drivers/reset/Makefile |   1 +
> >  drivers/reset/reset-microchip-sparx5.c | 120
> > +
> >  3 files changed, 129 insertions(+)
> >  create mode 100644 drivers/reset/reset-microchip-sparx5.c
> > 
> > diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> > index 71ab75a46491..05c240c47a8a 100644
> > --- a/drivers/reset/Kconfig
> > +++ b/drivers/reset/Kconfig
> > @@ -101,6 +101,14 @@ config RESET_LPC18XX
> >   help
> >     This enables the reset controller driver for NXP
> > LPC18xx/43xx SoCs.
> > 
> > +config RESET_MCHP_SPARX5
> > + bool "Microchip Sparx5 reset driver"
> > + depends on HAS_IOMEM || COMPILE_TEST
> > + default y if SPARX5_SWITCH
> > + select MFD_SYSCON
> > + help
> > +   This driver supports switch core reset for the Microchip
> > Sparx5 SoC.
> > +
> >  config RESET_MESON
> >   tristate "Meson Reset Driver"
> >   depends on ARCH_MESON || COMPILE_TEST
> > diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> > index 1054123fd187..341fd9ab4bf6 100644
> > --- a/drivers/reset/Makefile
> > +++ b/drivers/reset/Makefile
> > @@ -15,6 +15,7 @@ obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
> >  obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o
> >  obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o
> >  obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
> > +obj-$(CONFIG_RESET_MCHP_SPARX5) += reset-microchip-sparx5.o
> >  obj-$(CONFIG_RESET_MESON) += reset-meson.o
> >  obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
> >  obj-$(CONFIG_RESET_NPCM) += reset-npcm.o
> > diff --git a/drivers/reset/reset-microchip-sparx5.c
> > b/drivers/reset/reset-microchip-sparx5.c
> > new file mode 100644
> > index ..0dbd2b6161ef
> > --- /dev/null
> > +++ b/drivers/reset/reset-microchip-sparx5.c
> > @@ -0,0 +1,120 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/* Microchip Sparx5 Switch Reset driver
> > + *
> > + * Copyright (c) 2020 Microchip Technology Inc. and its
> > subsidiaries.
> > + *
> > + * The Sparx5 Chip Register Model can be browsed at this location:
> > + * https://github.com/microchip-ung/sparx-5_reginfo
> > + */
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#define PROTECT_REG    0x84
> > +#define PROTECT_BIT    BIT(10)
> > +#define SOFT_RESET_REG 0x08
> > +#define SOFT_RESET_BIT BIT(1)
> > +
> > +struct mchp_reset_context {
> > + struct regmap *cpu_ctrl;
> > + struct regmap *gcb_ctrl;
> > + struct reset_controller_dev rcdev;
> > +};
> > +
> > +static int sparx5_switch_reset(struct reset_controller_dev *rcdev,
> > +    unsigned long id)
> > +{
> > + struct mchp_reset_context *ctx =
> > + container_of(rcdev, struct mchp_reset_context,
> > rcdev);
> > + u32 val;
> > +
> 
> I would ensure the reset only happens once here else I'm not sure how
> you could do it from the individual drivers.

The framework handles that automatically.

> 
> > + /* Make sure the core is PROTECTED from reset */
> > + regmap_update_bits(ctx->cpu_ctrl, PROTECT_REG, PROTECT_BIT,
> > PROTECT_BIT);
> > +
> > + /* Start soft reset */
> > + regmap_write(ctx->gcb_ctrl, SOFT_RESET_REG, SOFT_RESET_BIT);
> > +
> > + /* Wait for soft reset done */
> > + return regmap_read_poll_timeout(ctx->gcb_ctrl,
> > SOFT_RESET_REG, val,
> > + (val & SOFT_RESET_BIT) == 0,
> > + 1, 100);
> > +}
> > +
> 
> --
> Alexandre Belloni, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com

Thanks for your comments
BR
Steen



Re: [PATCH v5] venus: core: add support to dump FW region

2021-01-19 Thread Stephen Boyd
Quoting Dikshita Agarwal (2020-12-15 10:08:36)
> Add support to dump video FW region during FW crash
> using devcoredump helpers.
> 
> Signed-off-by: Dikshita Agarwal 
> Reviewed-by: Stephen Boyd 
> Reviewed-by: Stanimir Varbanov 
> 
> Major changes since v1:
> - update the name of function (Stephen)
> - store start address and size in resource structure during
>   probe and reuse while dumping (Stephen, Stanimir)
> ---

Can this be picked up for the next merge window?


Re: “KASAN: null-ptr-deref Write in event_handler” and "KASAN: null-ptr-deref Write in vhci_shutdown_connection" should share the same root cause.

2021-01-19 Thread Greg KH
On Wed, Jan 20, 2021 at 11:22:11AM +0800, 慕冬亮 wrote:
> Dear kernel developers,
> 
> I found that on the syzbot dashboard, “KASAN: null-ptr-deref Write in
> event_handler”[1] and
> "KASAN: null-ptr-deref Write in vhci_shutdown_connection" () should
> share the same root cause.
> 
> 
> The reasons for the above statement:
> 1) the stack trace is the same, and this title difference is due to
> the inline property of "vhci_shutdown_connection";
> 2) their PoCs are the same as each other.
> 
> If you can have any issues with this statement or our information is
> useful to you, please let us know. Thanks very much.
> 
> [1] KASAN: null-ptr-deref Write in event_handler -
> https://syzkaller.appspot.com/bug?id=28cccdd18b4bb8670d077937fb8d4849dca96230
> [2] KASAN: null-ptr-deref Write in vhci_shutdown_connection -
> https://syzkaller.appspot.com/bug?id=c21c07f3d51769405e8efc027bdb927515dcc7d6

Great, care to create a patch for this problem?  That's the best way to
solve these things.

thanks,

greg k-h


Re: [PATCH] swap: Check nrexceptional of swap cache before being freed

2021-01-19 Thread Huang, Ying
Michal Hocko  writes:

> On Wed 20-01-21 15:27:11, Huang Ying wrote:
>> To catch the error in updating the swap cache shadow entries or their count.
>
> What is the error?

There's no error in the current code.  But we will change the related
code in the future.  So this checking will help us to prevent error in
the future.  I will change the patch description to make it more clear.

> Can it happens in the real life? Why do we need this
> patch? Is crashing the kernel the right way to handle the situation?

Emm... The mistake to update swap shadow entries will hurt performance,
but will not trigger functionality bug.  So it may be better to use
VM_WARN_ON_ONCE().

Best Regards,
Huang, Ying


>> Signed-off-by: "Huang, Ying" 
>> Cc: Minchan Kim 
>> Cc: Joonsoo Kim ,
>> Cc: Johannes Weiner ,
>> Cc: Vlastimil Babka , Hugh Dickins ,
>> Cc: Mel Gorman ,
>> Cc: Michal Hocko ,
>> Cc: Dan Williams ,
>> Cc: Christoph Hellwig , Ilya Dryomov ,
>> ---
>>  mm/swap_state.c | 7 ++-
>>  1 file changed, 6 insertions(+), 1 deletion(-)
>> 
>> diff --git a/mm/swap_state.c b/mm/swap_state.c
>> index d0d417efeecc..240a4f97594a 100644
>> --- a/mm/swap_state.c
>> +++ b/mm/swap_state.c
>> @@ -703,7 +703,12 @@ int init_swap_address_space(unsigned int type, unsigned 
>> long nr_pages)
>>  
>>  void exit_swap_address_space(unsigned int type)
>>  {
>> -kvfree(swapper_spaces[type]);
>> +int i;
>> +struct address_space *spaces = swapper_spaces[type];
>> +
>> +for (i = 0; i < nr_swapper_spaces[type]; i++)
>> +VM_BUG_ON(spaces[i].nrexceptional);
>> +kvfree(spaces);
>>  nr_swapper_spaces[type] = 0;
>>  swapper_spaces[type] = NULL;
>>  }
>> -- 
>> 2.29.2


[PATCH net-next v2 3/3] xsk: build skb by page

2021-01-19 Thread Xuan Zhuo
This patch is used to construct skb based on page to save memory copy
overhead.

This function is implemented based on IFF_TX_SKB_NO_LINEAR. Only the
network card priv_flags supports IFF_TX_SKB_NO_LINEAR will use page to
directly construct skb. If this feature is not supported, it is still
necessary to copy data to construct skb.

 Performance Testing 

The test environment is Aliyun ECS server.
Test cmd:
```
xdpsock -i eth0 -t  -S -s 
```

Test result data:

size64  512 10241500
copy1916747 1775988 1600203 1440054
page1974058 1953655 1945463 1904478
percent 3.0%10.0%   21.58%  32.3%

Signed-off-by: Xuan Zhuo 
Reviewed-by: Dust Li 
---
 net/xdp/xsk.c | 104 --
 1 file changed, 86 insertions(+), 18 deletions(-)

diff --git a/net/xdp/xsk.c b/net/xdp/xsk.c
index 8037b04..817a3a5 100644
--- a/net/xdp/xsk.c
+++ b/net/xdp/xsk.c
@@ -430,6 +430,87 @@ static void xsk_destruct_skb(struct sk_buff *skb)
sock_wfree(skb);
 }
 
+static struct sk_buff *xsk_build_skb_zerocopy(struct xdp_sock *xs,
+ struct xdp_desc *desc)
+{
+   u32 len, offset, copy, copied;
+   struct sk_buff *skb;
+   struct page *page;
+   char *buffer;
+   int err, i;
+   u64 addr;
+
+   skb = sock_alloc_send_skb(>sk, 0, 1, );
+   if (unlikely(!skb))
+   return ERR_PTR(err);
+
+   addr = desc->addr;
+   len = desc->len;
+
+   buffer = xsk_buff_raw_get_data(xs->pool, addr);
+   offset = offset_in_page(buffer);
+   addr = buffer - (char *)xs->pool->addrs;
+
+   for (copied = 0, i = 0; copied < len; i++) {
+   page = xs->pool->umem->pgs[addr >> PAGE_SHIFT];
+
+   get_page(page);
+
+   copy = min_t(u32, PAGE_SIZE - offset, len - copied);
+
+   skb_fill_page_desc(skb, i, page, offset, copy);
+
+   copied += copy;
+   addr += copy;
+   offset = 0;
+   }
+
+   skb->len += len;
+   skb->data_len += len;
+   skb->truesize += len;
+
+   refcount_add(len, >sk.sk_wmem_alloc);
+
+   return skb;
+}
+
+static struct sk_buff *xsk_build_skb(struct xdp_sock *xs,
+struct xdp_desc *desc)
+{
+   struct sk_buff *skb = NULL;
+
+   if (xs->dev->priv_flags & IFF_TX_SKB_NO_LINEAR) {
+   skb = xsk_build_skb_zerocopy(xs, desc);
+   if (IS_ERR(skb))
+   return skb;
+   } else {
+   char *buffer;
+   u32 len;
+   int err;
+
+   len = desc->len;
+   skb = sock_alloc_send_skb(>sk, len, 1, );
+   if (unlikely(!skb))
+   return ERR_PTR(err);
+
+   skb_put(skb, len);
+   buffer = xsk_buff_raw_get_data(xs->pool, desc->addr);
+   err = skb_store_bits(skb, 0, buffer, len);
+   if (unlikely(err)) {
+   kfree_skb(skb);
+   return ERR_PTR(err);
+   }
+   }
+
+   skb->dev = xs->dev;
+   skb->priority = xs->sk.sk_priority;
+   skb->mark = xs->sk.sk_mark;
+   skb_shinfo(skb)->destructor_arg = (void *)(long)desc->addr;
+   skb->destructor = xsk_destruct_skb;
+
+   return skb;
+}
+
 static int xsk_generic_xmit(struct sock *sk)
 {
struct xdp_sock *xs = xdp_sk(sk);
@@ -446,43 +527,30 @@ static int xsk_generic_xmit(struct sock *sk)
goto out;
 
while (xskq_cons_peek_desc(xs->tx, , xs->pool)) {
-   char *buffer;
-   u64 addr;
-   u32 len;
-
if (max_batch-- == 0) {
err = -EAGAIN;
goto out;
}
 
-   len = desc.len;
-   skb = sock_alloc_send_skb(sk, len, 1, );
-   if (unlikely(!skb))
+   skb = xsk_build_skb(xs, );
+   if (IS_ERR(skb)) {
+   err = PTR_ERR(skb);
goto out;
+   }
 
-   skb_put(skb, len);
-   addr = desc.addr;
-   buffer = xsk_buff_raw_get_data(xs->pool, addr);
-   err = skb_store_bits(skb, 0, buffer, len);
/* This is the backpressure mechanism for the Tx path.
 * Reserve space in the completion queue and only proceed
 * if there is space in it. This avoids having to implement
 * any buffering in the Tx path.
 */
spin_lock_irqsave(>pool->cq_lock, flags);
-   if (unlikely(err) || xskq_prod_reserve(xs->pool->cq)) {
+   if (xskq_prod_reserve(xs->pool->cq)) {
spin_unlock_irqrestore(>pool->cq_lock, flags);
kfree_skb(skb);
goto out;
}

Re: [PATCH v3 1/3] dt-bindings: reset: microchip sparx5 reset driver bindings

2021-01-19 Thread Steen.Hegelund
Hi Alex,

On Tue, 2021-01-19 at 21:35 +0100, Alexandre Belloni wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
> 
> Hi,
> 
> Every patches need a commit message, even if in this case it will be
> very small.

Yes that is a mistake.  I will update the series.

> 
> On 14/01/2021 17:24:30+0100, Steen Hegelund wrote:
> > Signed-off-by: Steen Hegelund 
> > ---
> >  .../bindings/reset/microchip,rst.yaml | 59
> > +++
> >  1 file changed, 59 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/reset/microchip,rst.yaml
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/reset/microchip,rst.yaml
> > b/Documentation/devicetree/bindings/reset/microchip,rst.yaml
> > new file mode 100644
> > index ..af01016e246f
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/reset/microchip,rst.yaml
> > @@ -0,0 +1,59 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: "http://devicetree.org/schemas/reset/microchip,rst.yaml#;
> > +$schema: "http://devicetree.org/meta-schemas/core.yaml#;
> > +
> > +title: Microchip Sparx5 Switch Reset Controller
> > +
> > +maintainers:
> > +  - Steen Hegelund 
> > +  - Lars Povlsen 
> > +
> > +description: |
> > +  The Microchip Sparx5 Switch provides reset control and
> > implements the following
> > +  functions
> > +    - One Time Switch Core Reset (Soft Reset)
> > +
> > +properties:
> > +  $nodename:
> > +    pattern: "^reset-controller@[0-9a-f]+$"
> > +
> > +  compatible:
> > +    const: microchip,sparx5-switch-reset
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  "#reset-cells":
> > +    const: 1
> > +
> > +  cpu-syscon:
> > +    $ref: "/schemas/types.yaml#/definitions/phandle"
> > +    description: syscon used to access CPU reset
> > +    maxItems: 1
> > +
> > +  gcb-syscon:
> > +    $ref: "/schemas/types.yaml#/definitions/phandle"
> > +    description: syscon used to access Global Control Block
> > +    maxItems: 1
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - "#reset-cells"
> > +  - cpu-syscon
> > +  - gcb-syscon
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    reset: reset-controller@0 {
> > +    compatible = "microchip,sparx5-switch-reset";
> > +    reg = <0x0 0x0>;
> > +    #reset-cells = <1>;
> > +    cpu-syscon = <_ctrl>;
> > +    gcb-syscon = <_ctrl>;
> > +    };
> > +
> > --
> > 2.29.2
> > 
> 
> --
> Alexandre Belloni, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com


Thanks for your comments
BR
Steen
-- 
BR
Steen

-=-=-=-=-=-=-=-=-=-=-=-=-=-=
steen.hegel...@microchip.com


Re: [PATCH] sched/deadline: Reduce rq lock contention in dl_add_task_root_domain()

2021-01-19 Thread Daniel Bristot de Oliveira
On 1/19/21 9:35 AM, Dietmar Eggemann wrote:
> dl_add_task_root_domain() is called during sched domain rebuild:
> 
>   rebuild_sched_domains_locked()
> partition_and_rebuild_sched_domains()
>   rebuild_root_domains()
>  for all top_cpuset descendants:
>update_tasks_root_domain()
>  for all tasks of cpuset:
>dl_add_task_root_domain()
> 
> Change it so that only the task pi lock is taken to check if the task
> has a SCHED_DEADLINE (DL) policy. In case that p is a DL task take the
> rq lock as well to be able to safely de-reference root domain's DL
> bandwidth structure.
> 
> Most of the tasks will have another policy (namely SCHED_NORMAL) and
> can now bail without taking the rq lock.
> 
> One thing to note here: Even in case that there aren't any DL user
> tasks, a slow frequency switching system with cpufreq gov schedutil has
> a DL task (sugov) per frequency domain running which participates in DL
> bandwidth management.
> 
> Reviewed-by: Quentin Perret 
> Signed-off-by: Dietmar Eggemann 

Reviewed-by: Daniel Bristot de Oliveira 

Thanks!
-- Daniel



Re: [PATCH 1/2] ecryptfs: fix uid translation for setxattr on security.capability

2021-01-19 Thread Miklos Szeredi
On Tue, Jan 19, 2021 at 10:11 PM Eric W. Biederman
 wrote:
>
> Miklos Szeredi  writes:
>
> > Prior to commit 7c03e2cda4a5 ("vfs: move cap_convert_nscap() call into
> > vfs_setxattr()") the translation of nscap->rootid did not take stacked
> > filesystems (overlayfs and ecryptfs) into account.
> >
> > That patch fixed the overlay case, but made the ecryptfs case worse.
> >
> > Restore old the behavior for ecryptfs that existed before the overlayfs
> > fix.  This does not fix ecryptfs's handling of complex user namespace
> > setups, but it does make sure existing setups don't regress.
>
> Today vfs_setxattr handles handles a delegated_inode and breaking
> leases.  Code that is enabled with CONFIG_FILE_LOCKING.  So unless
> I am missing something this introduces a different regression into
> ecryptfs.

This is in line with all the other cases of ecryptfs passing NULL as
delegated inode.

I'll defer this to the maintainer of ecryptfs.

Thanks,
Miklos


[PATCH 1/2] powerpc/47x: Disable 256k page size

2021-01-19 Thread Christophe Leroy
PPC47x_TLBE_SIZE isn't defined for 256k pages, so
this size of page shall not be selected for 47x.

Reported-by: kernel test robot 
Fixes: e7f75ad01d59 ("powerpc/47x: Base ppc476 support")
Signed-off-by: Christophe Leroy 
---
 arch/powerpc/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 107bb4319e0e..a685e42d3993 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -772,7 +772,7 @@ config PPC_64K_PAGES
 
 config PPC_256K_PAGES
bool "256k page size"
-   depends on 44x && !STDBINUTILS
+   depends on 44x && !STDBINUTILS && !PPC_47x
help
  Make the page size 256k.
 
-- 
2.25.0



[PATCH v3] drm/loongson: Add DRM Driver for Loongson 7A1000 bridge chip

2021-01-19 Thread Chenyang Li
This patch adds an initial DRM driver for the Loongson LS7A1000
bridge chip(LS7A). The LS7A bridge chip contains two display
controllers, support dual display output. The maximum support for
each channel display is to 1920x1080@60Hz.
At present, DC device detection and DRM driver registration are
completed, the crtc/plane/encoder/connector objects has been
implemented.
On Loongson 3A4000 CPU and 7A1000 system, we have achieved the use
of dual screen, and support dual screen clone mode and expansion
mode.

v3:
- Move the mode_valid function to the connector and optimize it.
- Fix num_crtc calculation method.

v2:
- Complete the case of 32-bit color in CRTC.

Signed-off-by: Chenyang Li 
---
 drivers/gpu/drm/Kconfig   |   2 +
 drivers/gpu/drm/Makefile  |   1 +
 drivers/gpu/drm/loongson/Kconfig  |  14 +
 drivers/gpu/drm/loongson/Makefile |  14 +
 drivers/gpu/drm/loongson/loongson_connector.c |  65 +
 drivers/gpu/drm/loongson/loongson_crtc.c  | 227 +++
 drivers/gpu/drm/loongson/loongson_device.c|  54 
 drivers/gpu/drm/loongson/loongson_drv.c   | 269 ++
 drivers/gpu/drm/loongson/loongson_drv.h   | 133 +
 drivers/gpu/drm/loongson/loongson_encoder.c   |  37 +++
 drivers/gpu/drm/loongson/loongson_plane.c | 102 +++
 11 files changed, 918 insertions(+)
 create mode 100644 drivers/gpu/drm/loongson/Kconfig
 create mode 100644 drivers/gpu/drm/loongson/Makefile
 create mode 100644 drivers/gpu/drm/loongson/loongson_connector.c
 create mode 100644 drivers/gpu/drm/loongson/loongson_crtc.c
 create mode 100644 drivers/gpu/drm/loongson/loongson_device.c
 create mode 100644 drivers/gpu/drm/loongson/loongson_drv.c
 create mode 100644 drivers/gpu/drm/loongson/loongson_drv.h
 create mode 100644 drivers/gpu/drm/loongson/loongson_encoder.c
 create mode 100644 drivers/gpu/drm/loongson/loongson_plane.c

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 0973f408d75f..6ed1b6dc2f25 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -374,6 +374,8 @@ source "drivers/gpu/drm/xen/Kconfig"
 
 source "drivers/gpu/drm/vboxvideo/Kconfig"
 
+source "drivers/gpu/drm/loongson/Kconfig"
+
 source "drivers/gpu/drm/lima/Kconfig"
 
 source "drivers/gpu/drm/panfrost/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index fefaff4c832d..f87da730ea6d 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -119,6 +119,7 @@ obj-$(CONFIG_DRM_PL111) += pl111/
 obj-$(CONFIG_DRM_TVE200) += tve200/
 obj-$(CONFIG_DRM_XEN) += xen/
 obj-$(CONFIG_DRM_VBOXVIDEO) += vboxvideo/
+obj-$(CONFIG_DRM_LOONGSON) += loongson/
 obj-$(CONFIG_DRM_LIMA)  += lima/
 obj-$(CONFIG_DRM_PANFROST) += panfrost/
 obj-$(CONFIG_DRM_ASPEED_GFX) += aspeed/
diff --git a/drivers/gpu/drm/loongson/Kconfig b/drivers/gpu/drm/loongson/Kconfig
new file mode 100644
index ..43eb0c80cc12
--- /dev/null
+++ b/drivers/gpu/drm/loongson/Kconfig
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+config DRM_LOONGSON
+   tristate "DRM support for LS7A1000 bridge chipset"
+   depends on DRM && PCI
+   depends on CPU_LOONGSON64
+   select DRM_KMS_HELPER
+   select DRM_VRAM_HELPER
+   select DRM_TTM
+   select DRM_TTM_HELPER
+   default n
+   help
+ Support the display controllers found on the Loongson LS7A1000
+ bridge.
diff --git a/drivers/gpu/drm/loongson/Makefile 
b/drivers/gpu/drm/loongson/Makefile
new file mode 100644
index ..22d063953b78
--- /dev/null
+++ b/drivers/gpu/drm/loongson/Makefile
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Makefile for loongson drm drivers.
+# This driver provides support for the
+# Direct Rendering Infrastructure (DRI)
+
+ccflags-y := -Iinclude/drm
+loongson-y := loongson_drv.o \
+   loongson_crtc.o \
+   loongson_plane.o \
+   loongson_device.o \
+   loongson_connector.o \
+   loongson_encoder.o
+obj-$(CONFIG_DRM_LOONGSON) += loongson.o
diff --git a/drivers/gpu/drm/loongson/loongson_connector.c 
b/drivers/gpu/drm/loongson/loongson_connector.c
new file mode 100644
index ..8cffabb62ebb
--- /dev/null
+++ b/drivers/gpu/drm/loongson/loongson_connector.c
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "loongson_drv.h"
+
+static int loongson_get_modes(struct drm_connector *connector)
+{
+   int count;
+
+   count = drm_add_modes_noedid(connector, 1920, 1080);
+   drm_set_preferred_mode(connector, 1024, 768);
+
+   return count;
+}
+
+static enum drm_mode_status
+loongson_mode_valid(struct drm_connector *connector,
+   struct drm_display_mode *mode)
+{
+   if (mode->hdisplay > 1920)
+   return MODE_BAD;
+   if (mode->vdisplay > 1080)
+   return MODE_BAD;
+   if (mode->hdisplay % 64)
+   return MODE_BAD;
+   if (mode->clock > 173000)
+

[PATCH 2/2] powerpc/44x: Remove STDBINUTILS kconfig option

2021-01-19 Thread Christophe Leroy
STDBINUTILS is just a toggle to allow 256k page size
to appear in the possible page sizes list for the 44x.

Make 256k page size appear all the time with an
explicit warning on binutils, and remove this unneccessary
STDBINUTILS config option.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/Kconfig | 27 +++
 1 file changed, 7 insertions(+), 20 deletions(-)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index a685e42d3993..3e29995540a7 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -720,18 +720,6 @@ config ARCH_MEMORY_PROBE
def_bool y
depends on MEMORY_HOTPLUG
 
-config STDBINUTILS
-   bool "Using standard binutils settings"
-   depends on 44x
-   default y
-   help
- Turning this option off allows you to select 256KB PAGE_SIZE on 44x.
- Note, that kernel will be able to run only those applications,
- which had been compiled using binutils later than 2.17.50.0.3 with
- '-zmax-page-size' set to 256K (the default is 64K). Or, if using
- the older binutils, you can patch them with a trivial patch, which
- changes the ELF_MAXPAGESIZE definition from 0x1 to 0x4.
-
 choice
prompt "Page size"
default PPC_4K_PAGES
@@ -771,17 +759,16 @@ config PPC_64K_PAGES
select HAVE_ARCH_SOFT_DIRTY if PPC_BOOK3S_64
 
 config PPC_256K_PAGES
-   bool "256k page size"
-   depends on 44x && !STDBINUTILS && !PPC_47x
+   bool "256k page size (Requires non-standard binutils settings)"
+   depends on 44x && !PPC_47x
help
  Make the page size 256k.
 
- As the ELF standard only requires alignment to support page
- sizes up to 64k, you will need to compile all of your user
- space applications with a non-standard binutils settings
- (see the STDBINUTILS description for details).
-
- Say N unless you know what you are doing.
+ That kernel will be able to run only those applications,
+ which had been compiled using binutils later than 2.17.50.0.3 with
+ '-zmax-page-size' set to 256K (the default is 64K). Or, if using
+ the older binutils, you can patch them with a trivial patch, which
+ changes the ELF_MAXPAGESIZE definition from 0x1 to 0x4.
 
 endchoice
 
-- 
2.25.0



[PATCH net-next v2 2/3] virtio-net: support IFF_TX_SKB_NO_LINEAR

2021-01-19 Thread Xuan Zhuo
Virtio net supports the case where the skb linear space is empty, so add
priv_flags.

Signed-off-by: Xuan Zhuo 
---
 drivers/net/virtio_net.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c
index ba8e637..f2ff6c3 100644
--- a/drivers/net/virtio_net.c
+++ b/drivers/net/virtio_net.c
@@ -2972,7 +2972,8 @@ static int virtnet_probe(struct virtio_device *vdev)
return -ENOMEM;
 
/* Set up network device as normal. */
-   dev->priv_flags |= IFF_UNICAST_FLT | IFF_LIVE_ADDR_CHANGE;
+   dev->priv_flags |= IFF_UNICAST_FLT | IFF_LIVE_ADDR_CHANGE |
+  IFF_TX_SKB_NO_LINEAR;
dev->netdev_ops = _netdev;
dev->features = NETIF_F_HIGHDMA;
 
-- 
1.8.3.1



[PATCH V1] clk: qcom: gcc-sc7180: Mark the MM XO clocks to be always ON

2021-01-19 Thread Taniya Das
There are intermittent GDSC power-up failures observed for titan top
gdsc, which requires the XO clock. Thus mark all the MM XO clocks always
enabled from probe.

Fixes: 8d4025943e13 ("clk: qcom: camcc-sc7180: Use runtime PM ops instead of 
clk ones")
Signed-off-by: Taniya Das 
---
 drivers/clk/qcom/gcc-sc7180.c | 47 ---
 1 file changed, 4 insertions(+), 43 deletions(-)

diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c
index b05901b..88e896a 100644
--- a/drivers/clk/qcom/gcc-sc7180.c
+++ b/drivers/clk/qcom/gcc-sc7180.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
  */

 #include 
@@ -919,19 +919,6 @@ static struct clk_branch gcc_camera_throttle_hf_axi_clk = {
},
 };

-static struct clk_branch gcc_camera_xo_clk = {
-   .halt_reg = 0xb02c,
-   .halt_check = BRANCH_HALT,
-   .clkr = {
-   .enable_reg = 0xb02c,
-   .enable_mask = BIT(0),
-   .hw.init = &(struct clk_init_data){
-   .name = "gcc_camera_xo_clk",
-   .ops = _branch2_ops,
-   },
-   },
-};
-
 static struct clk_branch gcc_ce1_ahb_clk = {
.halt_reg = 0x4100c,
.halt_check = BRANCH_HALT_VOTED,
@@ -1096,19 +1083,6 @@ static struct clk_branch gcc_disp_throttle_hf_axi_clk = {
},
 };

-static struct clk_branch gcc_disp_xo_clk = {
-   .halt_reg = 0xb030,
-   .halt_check = BRANCH_HALT,
-   .clkr = {
-   .enable_reg = 0xb030,
-   .enable_mask = BIT(0),
-   .hw.init = &(struct clk_init_data){
-   .name = "gcc_disp_xo_clk",
-   .ops = _branch2_ops,
-   },
-   },
-};
-
 static struct clk_branch gcc_gp1_clk = {
.halt_reg = 0x64000,
.halt_check = BRANCH_HALT,
@@ -2159,19 +2133,6 @@ static struct clk_branch gcc_video_throttle_axi_clk = {
},
 };

-static struct clk_branch gcc_video_xo_clk = {
-   .halt_reg = 0xb028,
-   .halt_check = BRANCH_HALT,
-   .clkr = {
-   .enable_reg = 0xb028,
-   .enable_mask = BIT(0),
-   .hw.init = &(struct clk_init_data){
-   .name = "gcc_video_xo_clk",
-   .ops = _branch2_ops,
-   },
-   },
-};
-
 static struct clk_branch gcc_mss_cfg_ahb_clk = {
.halt_reg = 0x8a000,
.halt_check = BRANCH_HALT,
@@ -2304,7 +2265,6 @@ static struct clk_regmap *gcc_sc7180_clocks[] = {
[GCC_BOOT_ROM_AHB_CLK] = _boot_rom_ahb_clk.clkr,
[GCC_CAMERA_HF_AXI_CLK] = _camera_hf_axi_clk.clkr,
[GCC_CAMERA_THROTTLE_HF_AXI_CLK] = _camera_throttle_hf_axi_clk.clkr,
-   [GCC_CAMERA_XO_CLK] = _camera_xo_clk.clkr,
[GCC_CE1_AHB_CLK] = _ce1_ahb_clk.clkr,
[GCC_CE1_AXI_CLK] = _ce1_axi_clk.clkr,
[GCC_CE1_CLK] = _ce1_clk.clkr,
@@ -2317,7 +2277,6 @@ static struct clk_regmap *gcc_sc7180_clocks[] = {
[GCC_DISP_GPLL0_DIV_CLK_SRC] = _disp_gpll0_div_clk_src.clkr,
[GCC_DISP_HF_AXI_CLK] = _disp_hf_axi_clk.clkr,
[GCC_DISP_THROTTLE_HF_AXI_CLK] = _disp_throttle_hf_axi_clk.clkr,
-   [GCC_DISP_XO_CLK] = _disp_xo_clk.clkr,
[GCC_GP1_CLK] = _gp1_clk.clkr,
[GCC_GP1_CLK_SRC] = _gp1_clk_src.clkr,
[GCC_GP2_CLK] = _gp2_clk.clkr,
@@ -2413,7 +2372,6 @@ static struct clk_regmap *gcc_sc7180_clocks[] = {
[GCC_VIDEO_AXI_CLK] = _video_axi_clk.clkr,
[GCC_VIDEO_GPLL0_DIV_CLK_SRC] = _video_gpll0_div_clk_src.clkr,
[GCC_VIDEO_THROTTLE_AXI_CLK] = _video_throttle_axi_clk.clkr,
-   [GCC_VIDEO_XO_CLK] = _video_xo_clk.clkr,
[GPLL0] = ,
[GPLL0_OUT_EVEN] = _out_even.clkr,
[GPLL6] = ,
@@ -2510,6 +2468,9 @@ static int gcc_sc7180_probe(struct platform_device *pdev)
regmap_update_bits(regmap, 0x0b004, BIT(0), BIT(0));
regmap_update_bits(regmap, 0x0b008, BIT(0), BIT(0));
regmap_update_bits(regmap, 0x0b00c, BIT(0), BIT(0));
+   regmap_update_bits(regmap, 0x0b02c, BIT(0), BIT(0));
+   regmap_update_bits(regmap, 0x0b028, BIT(0), BIT(0));
+   regmap_update_bits(regmap, 0x0b030, BIT(0), BIT(0));
regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0));

ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks,
--
Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member
of the Code Aurora Forum, hosted by the  Linux Foundation.



[PATCH] iio: hid-sensor-prox: Fix scale not correct issue

2021-01-19 Thread Ye Xiang
Currently, the proxy sensor scale is zero because it just return the
exponent directly. To fix this issue, this patch use
hid_sensor_format_scale to process the scale first then return the
output.

Signed-off-by: Ye Xiang 
---
 drivers/iio/light/hid-sensor-prox.c | 13 +++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/light/hid-sensor-prox.c 
b/drivers/iio/light/hid-sensor-prox.c
index 4ab285a418d5..4abcfe48f1d4 100644
--- a/drivers/iio/light/hid-sensor-prox.c
+++ b/drivers/iio/light/hid-sensor-prox.c
@@ -23,6 +23,9 @@ struct prox_state {
struct hid_sensor_common common_attributes;
struct hid_sensor_hub_attribute_info prox_attr;
u32 human_presence;
+   int scale_pre_decml;
+   int scale_post_decml;
+   int scale_precision;
 };
 
 static const u32 prox_sensitivity_addresses[] = {
@@ -98,8 +101,9 @@ static int prox_read_raw(struct iio_dev *indio_dev,
ret_type = IIO_VAL_INT;
break;
case IIO_CHAN_INFO_SCALE:
-   *val = prox_state->prox_attr.units;
-   ret_type = IIO_VAL_INT;
+   *val = prox_state->scale_pre_decml;
+   *val2 = prox_state->scale_post_decml;
+   ret_type = prox_state->scale_precision;
break;
case IIO_CHAN_INFO_OFFSET:
*val = hid_sensor_convert_exponent(
@@ -221,6 +225,11 @@ static int prox_parse_report(struct platform_device *pdev,
dev_dbg(>dev, "prox %x:%x\n", st->prox_attr.index,
st->prox_attr.report_id);
 
+   st->scale_precision = hid_sensor_format_scale(
+   hsdev->usage,
+   >prox_attr,
+   >scale_pre_decml, >scale_post_decml);
+
return ret;
 }
 
-- 
2.17.1



[PATCH] watchdog/hpwdt: Assign boolean values to a bool variable

2021-01-19 Thread Jiapeng Zhong
Fix the following coccicheck warnings:

 ./drivers/watchdog/hpwdt.c:345:2-12: WARNING: Assignment of
0/1 to bool variable.

./drivers/watchdog/hpwdt.c:126:2-12: WARNING: Assignment of
0/1 to bool variable.

Reported-by: Abaci Robot 
Signed-off-by: Jiapeng Zhong 
---
 drivers/watchdog/hpwdt.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c
index cbd1498..22ddba3 100644
--- a/drivers/watchdog/hpwdt.c
+++ b/drivers/watchdog/hpwdt.c
@@ -123,7 +123,7 @@ static int hpwdt_settimeout(struct watchdog_device *wdd, 
unsigned int val)
if (val <= wdd->pretimeout) {
dev_dbg(wdd->parent, "pretimeout < timeout. Setting to zero\n");
wdd->pretimeout = 0;
-   pretimeout = 0;
+   pretimeout = false;
if (watchdog_active(wdd))
hpwdt_start(wdd);
}
@@ -336,13 +336,13 @@ static int hpwdt_init_one(struct pci_dev *dev,
watchdog_init_timeout(_dev, soft_margin, NULL);
 
if (is_kdump_kernel()) {
-   pretimeout = 0;
+   pretimeout = false;
kdumptimeout = 0;
}
 
if (pretimeout && hpwdt_dev.timeout <= PRETIMEOUT_SEC) {
dev_warn(>dev, "timeout <= pretimeout. Setting pretimeout 
to zero\n");
-   pretimeout = 0;
+   pretimeout = false;
}
hpwdt_dev.pretimeout = pretimeout ? PRETIMEOUT_SEC : 0;
kdumptimeout = min(kdumptimeout, HPWDT_MAX_TIMER);
-- 
1.8.3.1



[PATCH] iio: hid-sensor-rotation: Fix quaternion data not correct

2021-01-19 Thread Ye Xiang
Because the data of HID_USAGE_SENSOR_ORIENT_QUATERNION defined by ISH FW
is s16, but quaternion data type is in_rot_quaternion_type(le:s16/32X4>>0),
need to transform data type from s16 to s32

Signed-off-by: Ye Xiang 
---
 drivers/iio/orientation/hid-sensor-rotation.c | 13 ++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/iio/orientation/hid-sensor-rotation.c 
b/drivers/iio/orientation/hid-sensor-rotation.c
index b0245b3b7ffc..cf7f57a47681 100644
--- a/drivers/iio/orientation/hid-sensor-rotation.c
+++ b/drivers/iio/orientation/hid-sensor-rotation.c
@@ -21,7 +21,7 @@ struct dev_rot_state {
struct hid_sensor_common common_attributes;
struct hid_sensor_hub_attribute_info quaternion;
struct {
-   u32 sampled_vals[4] __aligned(16);
+   s32 sampled_vals[4] __aligned(16);
u64 timestamp __aligned(8);
} scan;
int scale_pre_decml;
@@ -175,8 +175,15 @@ static int dev_rot_capture_sample(struct 
hid_sensor_hub_device *hsdev,
struct dev_rot_state *rot_state = iio_priv(indio_dev);
 
if (usage_id == HID_USAGE_SENSOR_ORIENT_QUATERNION) {
-   memcpy(_state->scan.sampled_vals, raw_data,
-  sizeof(rot_state->scan.sampled_vals));
+   if (raw_len / 4 == sizeof(s16)) {
+   rot_state->scan.sampled_vals[0] = ((s16 *)raw_data)[0];
+   rot_state->scan.sampled_vals[1] = ((s16 *)raw_data)[1];
+   rot_state->scan.sampled_vals[2] = ((s16 *)raw_data)[2];
+   rot_state->scan.sampled_vals[3] = ((s16 *)raw_data)[3];
+   } else {
+   memcpy(_state->scan.sampled_vals, raw_data,
+  sizeof(rot_state->scan.sampled_vals));
+   }
 
dev_dbg(_dev->dev, "Recd Quat len:%zu::%zu\n", raw_len,
sizeof(rot_state->scan.sampled_vals));
-- 
2.17.1



Re: [PATCH] swap: Check nrexceptional of swap cache before being freed

2021-01-19 Thread Michal Hocko
On Wed 20-01-21 15:27:11, Huang Ying wrote:
> To catch the error in updating the swap cache shadow entries or their count.

What is the error? Can it happens in the real life? Why do we need this
patch? Is crashing the kernel the right way to handle the situation?

> Signed-off-by: "Huang, Ying" 
> Cc: Minchan Kim 
> Cc: Joonsoo Kim ,
> Cc: Johannes Weiner ,
> Cc: Vlastimil Babka , Hugh Dickins ,
> Cc: Mel Gorman ,
> Cc: Michal Hocko ,
> Cc: Dan Williams ,
> Cc: Christoph Hellwig , Ilya Dryomov ,
> ---
>  mm/swap_state.c | 7 ++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/mm/swap_state.c b/mm/swap_state.c
> index d0d417efeecc..240a4f97594a 100644
> --- a/mm/swap_state.c
> +++ b/mm/swap_state.c
> @@ -703,7 +703,12 @@ int init_swap_address_space(unsigned int type, unsigned 
> long nr_pages)
>  
>  void exit_swap_address_space(unsigned int type)
>  {
> - kvfree(swapper_spaces[type]);
> + int i;
> + struct address_space *spaces = swapper_spaces[type];
> +
> + for (i = 0; i < nr_swapper_spaces[type]; i++)
> + VM_BUG_ON(spaces[i].nrexceptional);
> + kvfree(spaces);
>   nr_swapper_spaces[type] = 0;
>   swapper_spaces[type] = NULL;
>  }
> -- 
> 2.29.2

-- 
Michal Hocko
SUSE Labs


Re: [PATCH v2] of: property: Add fw_devlink support for "gpio" and "gpios" binding

2021-01-19 Thread Saravana Kannan
On Tue, Jan 19, 2021 at 11:33 PM Saravana Kannan  wrote:
>
> To provide backward compatibility for boards that use deprecated DT
> bindings, we need to add fw_devlink support for "gpio" and "gpios".
>
> Cc: linux-tegra 
> Cc: Linus Walleij 
> Cc: Bartosz Golaszewski 
> Cc: Greg Kroah-Hartman 
> Cc: Geert Uytterhoeven 
> Fixes: e590474768f1 ("driver core: Set fw_devlink=on by default")
> Tested-by: Jon Hunter 
> Signed-off-by: Saravana Kannan 
> ---
> Greg/Rob,
>
> I think it's better for this to go into driver-core-next because this
> fixed fw_devlink=on change that's queued for 5.12-rcX.
>
> -Saravana
>
>  drivers/of/property.c | 19 +++
>  1 file changed, 19 insertions(+)
>
> diff --git a/drivers/of/property.c b/drivers/of/property.c
> index 5f9eed79a8aa..0b256ce9d7d5 100644
> --- a/drivers/of/property.c
> +++ b/drivers/of/property.c
> @@ -1271,6 +1271,24 @@ static struct device_node *parse_iommu_maps(struct 
> device_node *np,
> return of_parse_phandle(np, prop_name, (index * 4) + 1);
>  }
>
> +static struct device_node *parse_gpio_compat(struct device_node *np,
> +const char *prop_name, int index)
> +{
> +   struct of_phandle_args sup_args;
> +
> +   if (strcmp(prop_name, "gpio") && strcmp(prop_name, "gpios"))
> +   return NULL;
> +
> +   if (of_find_property(np, "gpio-hog", NULL))
> +   return NULL;
> +
> +   if (of_parse_phandle_with_args(np, prop_name, "#gpio-cells", index,
> +  _args))
> +   return NULL;
> +
> +   return sup_args.np;
> +}
> +
>  static const struct supplier_bindings of_supplier_bindings[] = {
> { .parse_prop = parse_clocks, },
> { .parse_prop = parse_interconnects, },
> @@ -1296,6 +1314,7 @@ static const struct supplier_bindings 
> of_supplier_bindings[] = {
> { .parse_prop = parse_pinctrl6, },
> { .parse_prop = parse_pinctrl7, },
> { .parse_prop = parse_pinctrl8, },
> +   { .parse_prop = parse_gpio_compat, },
> { .parse_prop = parse_regulators, },
> { .parse_prop = parse_gpio, },
> { .parse_prop = parse_gpios, },
> --
> 2.30.0.284.gd98b1dd5eaa7-goog
>

Please ignore this patch. I'm going to make this part of a series I'll
be sending out.

-Saravana


[PATCH 2/3] hid-sensor-common: Add relative sensitivity check

2021-01-19 Thread Ye Xiang
Some hid sensors may use relative sensitivity such as als sensor.
This patch add relative sensitivity check for all hid-sensors.

Signed-off-by: Ye Xiang 
---
 .../iio/common/hid-sensors/hid-sensor-attributes.c| 11 ++-
 include/linux/hid-sensor-ids.h|  1 +
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/iio/common/hid-sensors/hid-sensor-attributes.c 
b/drivers/iio/common/hid-sensors/hid-sensor-attributes.c
index d349ace2e33f..b685c292a179 100644
--- a/drivers/iio/common/hid-sensors/hid-sensor-attributes.c
+++ b/drivers/iio/common/hid-sensors/hid-sensor-attributes.c
@@ -480,7 +480,7 @@ int hid_sensor_parse_common_attributes(struct 
hid_sensor_hub_device *hsdev,
 
/*
 * Set Sensitivity field ids, when there is no individual modifier, will
-* check absolute sensitivity of data field
+* check absolute sensitivity and relative sensitivity of data field
 */
for (i = 0; i < sensitivity_addresses_len && st->sensitivity.index < 0; 
i++) {
sensor_hub_input_get_attribute_info(hsdev,
@@ -488,6 +488,15 @@ int hid_sensor_parse_common_attributes(struct 
hid_sensor_hub_device *hsdev,

HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_ABS |
sensitivity_addresses[i],
>sensitivity);
+
+   if (st->sensitivity.index >= 0)
+   break;
+
+   sensor_hub_input_get_attribute_info(hsdev,
+   HID_FEATURE_REPORT, usage_id,
+   
HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_REL_PCT |
+   sensitivity_addresses[i],
+   >sensitivity);
}
 
st->raw_hystersis = -1;
diff --git a/include/linux/hid-sensor-ids.h b/include/linux/hid-sensor-ids.h
index 3bbdbccc5805..ac631159403a 100644
--- a/include/linux/hid-sensor-ids.h
+++ b/include/linux/hid-sensor-ids.h
@@ -149,6 +149,7 @@
 /* Per data field properties */
 #define HID_USAGE_SENSOR_DATA_MOD_NONE 0x00
 #define HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_ABS   0x1000
+#define HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_REL_PCT0xE000
 
 /* Power state enumerations */
 #define HID_USAGE_SENSOR_PROP_POWER_STATE_UNDEFINED_ENUM   0x200850
-- 
2.17.1



[PATCH 3/3] hid-sensors: Add more data fields for sensitivity checking

2021-01-19 Thread Ye Xiang
Before, when reading/writing the hysteresis of als, incli-3d, press, and
rotation sensor, we will get invalid argument error.

This patch add more sensitivity data fields for these sensors, so that
these sensors can get sensitivity index and return correct hysteresis
value.

Signed-off-by: Ye Xiang 
---
 drivers/iio/light/hid-sensor-als.c| 1 +
 drivers/iio/orientation/hid-sensor-incl-3d.c  | 1 +
 drivers/iio/orientation/hid-sensor-rotation.c | 1 +
 drivers/iio/pressure/hid-sensor-press.c   | 1 +
 4 files changed, 4 insertions(+)

diff --git a/drivers/iio/light/hid-sensor-als.c 
b/drivers/iio/light/hid-sensor-als.c
index 8bf6e9e0a0e0..afcdb424bfb8 100644
--- a/drivers/iio/light/hid-sensor-als.c
+++ b/drivers/iio/light/hid-sensor-als.c
@@ -41,6 +41,7 @@ struct als_state {
 
 static const u32 als_sensitivity_addresses[] = {
HID_USAGE_SENSOR_DATA_LIGHT,
+   HID_USAGE_SENSOR_LIGHT_ILLUM,
 };
 
 /* Channel definitions */
diff --git a/drivers/iio/orientation/hid-sensor-incl-3d.c 
b/drivers/iio/orientation/hid-sensor-incl-3d.c
index 6e69f6e673cc..7af48d336285 100644
--- a/drivers/iio/orientation/hid-sensor-incl-3d.c
+++ b/drivers/iio/orientation/hid-sensor-incl-3d.c
@@ -49,6 +49,7 @@ static const u32 incl_3d_addresses[INCLI_3D_CHANNEL_MAX] = {
 
 static const u32 incl_3d_sensitivity_addresses[] = {
HID_USAGE_SENSOR_DATA_ORIENTATION,
+   HID_USAGE_SENSOR_ORIENT_TILT,
 };
 
 /* Channel definitions */
diff --git a/drivers/iio/orientation/hid-sensor-rotation.c 
b/drivers/iio/orientation/hid-sensor-rotation.c
index 03d2845a7b2c..b0245b3b7ffc 100644
--- a/drivers/iio/orientation/hid-sensor-rotation.c
+++ b/drivers/iio/orientation/hid-sensor-rotation.c
@@ -33,6 +33,7 @@ struct dev_rot_state {
 
 static const u32 rotation_sensitivity_addresses[] = {
HID_USAGE_SENSOR_DATA_ORIENTATION,
+   HID_USAGE_SENSOR_ORIENT_QUATERNION,
 };
 
 /* Channel definitions */
diff --git a/drivers/iio/pressure/hid-sensor-press.c 
b/drivers/iio/pressure/hid-sensor-press.c
index 8cac2c94e75a..c416d261e3e3 100644
--- a/drivers/iio/pressure/hid-sensor-press.c
+++ b/drivers/iio/pressure/hid-sensor-press.c
@@ -31,6 +31,7 @@ struct press_state {
 
 static const u32 press_sensitivity_addresses[] = {
HID_USAGE_SENSOR_DATA_ATMOSPHERIC_PRESSURE,
+   HID_USAGE_SENSOR_ATMOSPHERIC_PRESSURE
 };
 
 /* Channel definitions */
-- 
2.17.1



[PATCH 1/3] iio: hid-sensors: Move get sensitivity attribute to hid-sensor-common

2021-01-19 Thread Ye Xiang
No functional change has been made with this patch. The main intent here
is to reduce code repetition of get sensitivity attribute.

In the current implementation, sensor_hub_input_get_attribute_info() is
called from multiple drivers to get attribute info for sensitivity
field. Moving this to common place will avoid code repetition.

Signed-off-by: Ye Xiang 
---
 drivers/iio/accel/hid-sensor-accel-3d.c   | 23 +
 .../hid-sensors/hid-sensor-attributes.c   | 17 +-
 drivers/iio/gyro/hid-sensor-gyro-3d.c | 19 ---
 drivers/iio/humidity/hid-sensor-humidity.c| 16 -
 drivers/iio/light/hid-sensor-als.c| 19 ---
 drivers/iio/light/hid-sensor-prox.c   | 27 +--
 drivers/iio/magnetometer/hid-sensor-magn-3d.c | 34 ++-
 drivers/iio/orientation/hid-sensor-incl-3d.c  | 19 ---
 drivers/iio/orientation/hid-sensor-rotation.c | 23 +
 .../position/hid-sensor-custom-intel-hinge.c  | 20 ---
 drivers/iio/pressure/hid-sensor-press.c   | 19 ---
 .../iio/temperature/hid-sensor-temperature.c  | 16 -
 drivers/rtc/rtc-hid-sensor-time.c |  4 ++-
 include/linux/hid-sensor-hub.h|  4 ++-
 14 files changed, 108 insertions(+), 152 deletions(-)

diff --git a/drivers/iio/accel/hid-sensor-accel-3d.c 
b/drivers/iio/accel/hid-sensor-accel-3d.c
index 5d63ed19e6e2..2f9465cb382f 100644
--- a/drivers/iio/accel/hid-sensor-accel-3d.c
+++ b/drivers/iio/accel/hid-sensor-accel-3d.c
@@ -43,6 +43,10 @@ static const u32 accel_3d_addresses[ACCEL_3D_CHANNEL_MAX] = {
HID_USAGE_SENSOR_ACCEL_Z_AXIS
 };
 
+static const u32 accel_3d_sensitivity_addresses[] = {
+   HID_USAGE_SENSOR_DATA_ACCELERATION,
+};
+
 /* Channel definitions */
 static const struct iio_chan_spec accel_3d_channels[] = {
{
@@ -317,18 +321,6 @@ static int accel_3d_parse_report(struct platform_device 
*pdev,
>accel[CHANNEL_SCAN_INDEX_X],
>scale_pre_decml, >scale_post_decml);
 
-   /* Set Sensitivity field ids, when there is no individual modifier */
-   if (st->common_attributes.sensitivity.index < 0) {
-   sensor_hub_input_get_attribute_info(hsdev,
-   HID_FEATURE_REPORT, usage_id,
-   HID_USAGE_SENSOR_DATA_MOD_CHANGE_SENSITIVITY_ABS |
-   HID_USAGE_SENSOR_DATA_ACCELERATION,
-   >common_attributes.sensitivity);
-   dev_dbg(>dev, "Sensitivity index:report %d:%d\n",
-   st->common_attributes.sensitivity.index,
-   st->common_attributes.sensitivity.report_id);
-   }
-
return ret;
 }
 
@@ -366,8 +358,11 @@ static int hid_accel_3d_probe(struct platform_device *pdev)
channel_size = sizeof(gravity_channels);
indio_dev->num_channels = ARRAY_SIZE(gravity_channels);
}
-   ret = hid_sensor_parse_common_attributes(hsdev, hsdev->usage,
-   _state->common_attributes);
+   ret = hid_sensor_parse_common_attributes(hsdev,
+hsdev->usage,
+
_state->common_attributes,
+accel_3d_sensitivity_addresses,
+
ARRAY_SIZE(accel_3d_sensitivity_addresses));
if (ret) {
dev_err(>dev, "failed to setup common attributes\n");
return ret;
diff --git a/drivers/iio/common/hid-sensors/hid-sensor-attributes.c 
b/drivers/iio/common/hid-sensors/hid-sensor-attributes.c
index 5b822a4298a0..d349ace2e33f 100644
--- a/drivers/iio/common/hid-sensors/hid-sensor-attributes.c
+++ b/drivers/iio/common/hid-sensors/hid-sensor-attributes.c
@@ -448,12 +448,15 @@ EXPORT_SYMBOL(hid_sensor_batch_mode_supported);
 
 int hid_sensor_parse_common_attributes(struct hid_sensor_hub_device *hsdev,
u32 usage_id,
-   struct hid_sensor_common *st)
+   struct hid_sensor_common *st,
+   const u32 *sensitivity_addresses,
+   u32 sensitivity_addresses_len)
 {
 
struct hid_sensor_hub_attribute_info timestamp;
s32 value;
int ret;
+   int i;
 
hid_sensor_get_reporting_interval(hsdev, usage_id, st);
 
@@ -475,6 +478,18 @@ int hid_sensor_parse_common_attributes(struct 
hid_sensor_hub_device *hsdev,
HID_USAGE_SENSOR_PROP_SENSITIVITY_ABS,
 >sensitivity);
 
+   /*
+* Set Sensitivity field ids, when there is no individual modifier, will
+* check absolute sensitivity of data field
+*/
+   for (i = 0; i < sensitivity_addresses_len && 

[PATCH 0/3] resolve read hystersis return invalid argument issue for hid sensors

2021-01-19 Thread Ye Xiang
This patch series move get sensitivity attribute to common layer and
resolve read hystersis return invalid argument issue for hid sensors als,
incli-3d, rotation, and press on intel ISH Platform.

Ye Xiang (3):
  iio: hid-sensors: Move get sensitivity attribute to hid-sensor-common
  hid-sensor-common: Add relative sensitivity check
  hid-sensors: Add more data fields for sensitivity checking

 drivers/iio/accel/hid-sensor-accel-3d.c   | 23 +
 .../hid-sensors/hid-sensor-attributes.c   | 26 +-
 drivers/iio/gyro/hid-sensor-gyro-3d.c | 19 ---
 drivers/iio/humidity/hid-sensor-humidity.c| 16 -
 drivers/iio/light/hid-sensor-als.c| 20 +--
 drivers/iio/light/hid-sensor-prox.c   | 27 +--
 drivers/iio/magnetometer/hid-sensor-magn-3d.c | 34 ++-
 drivers/iio/orientation/hid-sensor-incl-3d.c  | 20 +--
 drivers/iio/orientation/hid-sensor-rotation.c | 24 ++---
 .../position/hid-sensor-custom-intel-hinge.c  | 20 ---
 drivers/iio/pressure/hid-sensor-press.c   | 20 +--
 .../iio/temperature/hid-sensor-temperature.c  | 16 -
 drivers/rtc/rtc-hid-sensor-time.c |  4 ++-
 include/linux/hid-sensor-hub.h|  4 ++-
 include/linux/hid-sensor-ids.h|  1 +
 15 files changed, 122 insertions(+), 152 deletions(-)

-- 
2.17.1



[PATCH] pinctrl: nomadik: Assign boolean values to a bool variable

2021-01-19 Thread Jiapeng Zhong
Fix the following coccicheck warnings:

./drivers/pinctrl/nomadik/pinctrl-nomadik.c:1397:6-16: WARNING:
Assignment of 0/1 to bool variable.

./drivers/pinctrl/nomadik/pinctrl-nomadik.c:1380:4-14: WARNING:
Assignment of 0/1 to bool variable.

./drivers/pinctrl/nomadik/pinctrl-nomadik.c:1370:6-16: WARNING:
Assignment of 0/1 to bool variable.

Reported-by: Abaci Robot 
Signed-off-by: Jiapeng Zhong 
---
 drivers/pinctrl/nomadik/pinctrl-nomadik.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/pinctrl/nomadik/pinctrl-nomadik.c 
b/drivers/pinctrl/nomadik/pinctrl-nomadik.c
index d4ea108..770cbf7 100644
--- a/drivers/pinctrl/nomadik/pinctrl-nomadik.c
+++ b/drivers/pinctrl/nomadik/pinctrl-nomadik.c
@@ -1367,7 +1367,7 @@ static const char *nmk_find_pin_name(struct pinctrl_dev 
*pctldev, const char *pi
 static bool nmk_pinctrl_dt_get_config(struct device_node *np,
unsigned long *configs)
 {
-   bool has_config = 0;
+   bool has_config = false;
unsigned long cfg = 0;
int i, val, ret;
 
@@ -1377,7 +1377,7 @@ static bool nmk_pinctrl_dt_get_config(struct device_node 
*np,
if (ret != -EINVAL) {
if (nmk_dt_pin_config(i, val, ) == 0) {
*configs |= cfg;
-   has_config = 1;
+   has_config = true;
}
}
}
@@ -1394,7 +1394,7 @@ static int nmk_pinctrl_dt_subnode_to_map(struct 
pinctrl_dev *pctldev,
int ret;
const char *function = NULL;
unsigned long configs = 0;
-   bool has_config = 0;
+   bool has_config = false;
struct property *prop;
struct device_node *np_config;
 
-- 
1.8.3.1



[PATCH v7 03/14] phy: tegra: xusb: Move usb3 port init for Tegra210

2021-01-19 Thread JC Kuo
The programming sequence in tegra210_usb3_port_enable() is required
for both cold boot and SC7 exit, and must be performed only after
PEX/SATA UPHY is initialized. Therefore, this commit moves the
programming sequence to tegra210_usb3_phy_power_on(). PCIE/SATA phy
.power_on() stub will invoke tegra210_usb3_phy_power_on() if the lane
is assigned for XUSB super-speed.

Signed-off-by: JC Kuo 
Acked-by: Thierry Reding 
---
v7:
   no change
v6:
   no change
v5:
   no change
v4:
   mutex_lock()/mutex_unlock() fix
   update copyright string
v3:
   new, was a part of "phy: tegra: xusb: Rearrange UPHY init on Tegra210"

 drivers/phy/tegra/xusb-tegra210.c | 316 +-
 drivers/phy/tegra/xusb.c  |   4 +-
 drivers/phy/tegra/xusb.h  |   4 +-
 3 files changed, 180 insertions(+), 144 deletions(-)

diff --git a/drivers/phy/tegra/xusb-tegra210.c 
b/drivers/phy/tegra/xusb-tegra210.c
index 66bd4613835b..4dc9286ec1b8 100644
--- a/drivers/phy/tegra/xusb-tegra210.c
+++ b/drivers/phy/tegra/xusb-tegra210.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2020, NVIDIA CORPORATION.  All rights reserved.
  * Copyright (C) 2015 Google, Inc.
  */
 
@@ -256,6 +256,32 @@ to_tegra210_xusb_padctl(struct tegra_xusb_padctl *padctl)
return container_of(padctl, struct tegra210_xusb_padctl, base);
 }
 
+static const struct tegra_xusb_lane_map tegra210_usb3_map[] = {
+   { 0, "pcie", 6 },
+   { 1, "pcie", 5 },
+   { 2, "pcie", 0 },
+   { 2, "pcie", 3 },
+   { 3, "pcie", 4 },
+   { 3, "sata", 0 },
+   { 0, NULL,   0 }
+};
+
+static int tegra210_usb3_lane_map(struct tegra_xusb_lane *lane)
+{
+   const struct tegra_xusb_lane_map *map;
+
+   for (map = tegra210_usb3_map; map->type; map++) {
+   if (map->index == lane->index &&
+   strcmp(map->type, lane->pad->soc->name) == 0) {
+   dev_dbg(lane->pad->padctl->dev, "lane = %s map to port 
= usb3-%d\n",
+   lane->pad->soc->lanes[lane->index].name, 
map->port);
+   return map->port;
+   }
+   }
+
+   return -EINVAL;
+}
+
 /* must be called under padctl->lock */
 static int tegra210_pex_uphy_enable(struct tegra_xusb_padctl *padctl)
 {
@@ -470,19 +496,14 @@ static void tegra210_pex_uphy_disable(struct 
tegra_xusb_padctl *padctl)
 {
struct tegra_xusb_pcie_pad *pcie = to_pcie_pad(padctl->pcie);
 
-   mutex_lock(>lock);
-
if (WARN_ON(pcie->enable == 0))
-   goto unlock;
+   return;
 
if (--pcie->enable > 0)
-   goto unlock;
+   return;
 
reset_control_assert(pcie->rst);
clk_disable_unprepare(pcie->pll);
-
-unlock:
-   mutex_unlock(>lock);
 }
 
 /* must be called under padctl->lock */
@@ -712,19 +733,14 @@ static void tegra210_sata_uphy_disable(struct 
tegra_xusb_padctl *padctl)
 {
struct tegra_xusb_sata_pad *sata = to_sata_pad(padctl->sata);
 
-   mutex_lock(>lock);
-
if (WARN_ON(sata->enable == 0))
-   goto unlock;
+   return;
 
if (--sata->enable > 0)
-   goto unlock;
+   return;
 
reset_control_assert(sata->rst);
clk_disable_unprepare(sata->pll);
-
-unlock:
-   mutex_unlock(>lock);
 }
 
 static int tegra210_xusb_padctl_enable(struct tegra_xusb_padctl *padctl)
@@ -1599,6 +1615,128 @@ static const struct tegra_xusb_lane_soc 
tegra210_pcie_lanes[] = {
TEGRA210_LANE("pcie-6", 0x028, 24, 0x3, pcie),
 };
 
+static struct tegra_xusb_usb3_port *
+tegra210_lane_to_usb3_port(struct tegra_xusb_lane *lane)
+{
+   int port;
+
+   if (!lane || !lane->pad || !lane->pad->padctl)
+   return NULL;
+
+   port = tegra210_usb3_lane_map(lane);
+   if (port < 0)
+   return NULL;
+
+   return tegra_xusb_find_usb3_port(lane->pad->padctl, port);
+}
+
+static int tegra210_usb3_phy_power_on(struct phy *phy)
+{
+   struct device *dev = >dev;
+   struct tegra_xusb_lane *lane = phy_get_drvdata(phy);
+   struct tegra_xusb_padctl *padctl = lane->pad->padctl;
+   struct tegra_xusb_usb3_port *usb3 = tegra210_lane_to_usb3_port(lane);
+   unsigned int index;
+   u32 value;
+
+   if (!usb3) {
+   dev_err(dev, "no USB3 port found for lane %u\n", lane->index);
+   return -ENODEV;
+   }
+
+   index = usb3->base.index;
+
+   value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_MAP);
+
+   if (!usb3->internal)
+   value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(index);
+   else
+   value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(index);
+
+   value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_MASK(index);
+   value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(index, usb3->port);
+   padctl_writel(padctl, value, 

[PATCH] HID: wacom: Assign boolean values to a bool variable

2021-01-19 Thread Jiapeng Zhong
Fix the following coccicheck warnings:

./drivers/hid/wacom_wac.c:2536:2-6: WARNING: Assignment of
0/1 to bool variable.

Reported-by: Abaci Robot 
Signed-off-by: Jiapeng Zhong 
---
 drivers/hid/wacom_wac.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/hid/wacom_wac.c b/drivers/hid/wacom_wac.c
index 1bd0eb7..62b0f71 100644
--- a/drivers/hid/wacom_wac.c
+++ b/drivers/hid/wacom_wac.c
@@ -2533,7 +2533,7 @@ static void wacom_wac_finger_slot(struct wacom_wac 
*wacom_wac,
!wacom_wac->shared->is_touch_on) {
if (!wacom_wac->shared->touch_down)
return;
-   prox = 0;
+   prox = false;
}
 
wacom_wac->hid_data.num_received++;
-- 
1.8.3.1



Re: [PATCH v2 2/2] Input: ads7846: convert to one message

2021-01-19 Thread Oleksij Rempel


Hi Dmitry,

On Tue, Nov 17, 2020 at 04:31:38PM -0800, Dmitry Torokhov wrote:
> On Tue, Nov 10, 2020 at 09:50:41AM +0100, Oleksij Rempel wrote:
> > Convert multiple full duplex transfers in to a single transfer to reduce
> > CPU load.
> > 
> > Current driver version support following filtering modes:
> > - ads7846_no_filter() - not filtered
> > - ads7846_debounce_filter() - driver specific debounce filter
> > - pdata->filter - platform specific debounce filter (do any platform
> > provides such filter?)
> > 
> > Without filter this HW is not really usable, since the physic of
> > resistive touchscreen can provide some bounce effects. With driver internal
> > filter, we have constant amount of retries + debounce retries if some 
> > anomaly
> > was detected.
> > 
> > High amount of tiny SPI transfers is the primer reason of high CPU load
> > and interrupt frequency.
> > 
> > This patch create one SPI transfer with all fields and not optional 
> > retires. If
> > bounce anomaly was detected, we will make more transfer if needed.
> > 
> > Without this patch, we will get about 10% CPU load on iMX6S on pen-down 
> > event.
> > For example by holding stylus on the screen.
> > 
> > With this patch, depending in the amount of retries, the CPU load will
> > be 1% with "ti,debounce-rep = <3>".
> > 
> > One buffer transfer allows us to use PIO FIFO or DMA engine, depending
> > on the platform.
> > 
> > Signed-off-by: Oleksij Rempel 
> 
> Applied, thank you.

I can't find this patch in your git repository. Should I rebase it
against latest git and resend it?

Regards,
Oleksij
-- 
Pengutronix e.K.   | |
Steuerwalder Str. 21   | http://www.pengutronix.de/  |
31137 Hildesheim, Germany  | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686   | Fax:   +49-5121-206917- |


[PATCH v7 05/14] phy: tegra: xusb: Add Tegra210 lane_iddq operation

2021-01-19 Thread JC Kuo
As per Tegra210 TRM, before changing lane assignments, driver should
keep lanes in IDDQ and sleep state; after changing lane assignments,
driver should bring lanes out of IDDQ.
This commit implements the required operations.

Signed-off-by: JC Kuo 
Acked-by: Thierry Reding 
---
v7:
   no change
v6:
   no change
v5:
   no change
v4:
   no change
v3:
   add 'misc_ctl2' data member to UPHY lane for carrying MISC_PAD_PX_CTL2 offset
   tegra210_uphy_lane_iddq_[enable/disable]() to access 'misc_ctl2' data member

 drivers/phy/tegra/xusb-tegra210.c | 82 ---
 drivers/phy/tegra/xusb.c  |  6 +++
 drivers/phy/tegra/xusb.h  |  6 +++
 3 files changed, 86 insertions(+), 8 deletions(-)

diff --git a/drivers/phy/tegra/xusb-tegra210.c 
b/drivers/phy/tegra/xusb-tegra210.c
index faacb866cd1f..b038d032fea1 100644
--- a/drivers/phy/tegra/xusb-tegra210.c
+++ b/drivers/phy/tegra/xusb-tegra210.c
@@ -198,6 +198,18 @@
 #define XUSB_PADCTL_UPHY_MISC_PAD_CTL1_AUX_RX_TERM_EN BIT(18)
 #define XUSB_PADCTL_UPHY_MISC_PAD_CTL1_AUX_RX_MODE_OVRD BIT(13)
 
+#define XUSB_PADCTL_UPHY_MISC_PAD_PX_CTL2(x) (0x464 + (x) * 0x40)
+#define XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_IDDQ BIT(0)
+#define XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_IDDQ_OVRD BIT(1)
+#define XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_SLEEP_MASK (0x3 << 4)
+#define XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_SLEEP_VAL (0x3 << 4)
+#define XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_PWR_OVRD BIT(24)
+#define XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_IDDQ BIT(8)
+#define XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_IDDQ_OVRD BIT(9)
+#define XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_SLEEP_MASK (0x3 << 12)
+#define XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_SLEEP_VAL (0x3 << 12)
+#define XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_PWR_OVRD BIT(25)
+
 #define XUSB_PADCTL_UPHY_PLL_S0_CTL1 0x860
 
 #define XUSB_PADCTL_UPHY_PLL_S0_CTL2 0x864
@@ -209,6 +221,7 @@
 #define XUSB_PADCTL_UPHY_PLL_S0_CTL8 0x87c
 
 #define XUSB_PADCTL_UPHY_MISC_PAD_S0_CTL1 0x960
+#define XUSB_PADCTL_UPHY_MISC_PAD_S0_CTL2 0x964
 
 #define XUSB_PADCTL_UPHY_USB3_PADX_ECTL1(x) (0xa60 + (x) * 0x40)
 #define XUSB_PADCTL_UPHY_USB3_PAD_ECTL1_TX_TERM_CTRL_SHIFT 16
@@ -1640,6 +1653,55 @@ static const struct tegra_xusb_pad_soc tegra210_hsic_pad 
= {
.ops = _hsic_ops,
 };
 
+static void tegra210_uphy_lane_iddq_enable(struct tegra_xusb_lane *lane)
+{
+   struct tegra_xusb_padctl *padctl = lane->pad->padctl;
+   u32 value;
+
+   value = padctl_readl(padctl, lane->soc->regs.misc_ctl2);
+   value |= XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_IDDQ_OVRD;
+   value |= XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_IDDQ_OVRD;
+   value |= XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_PWR_OVRD;
+   value |= XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_PWR_OVRD;
+   value |= XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_IDDQ;
+   value &= ~XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_SLEEP_MASK;
+   value |= XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_SLEEP_VAL;
+   value |= XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_IDDQ;
+   value &= ~XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_SLEEP_MASK;
+   value |= XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_SLEEP_VAL;
+   padctl_writel(padctl, value, lane->soc->regs.misc_ctl2);
+}
+
+static void tegra210_uphy_lane_iddq_disable(struct tegra_xusb_lane *lane)
+{
+   struct tegra_xusb_padctl *padctl = lane->pad->padctl;
+   u32 value;
+
+   value = padctl_readl(padctl, lane->soc->regs.misc_ctl2);
+   value &= ~XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_IDDQ_OVRD;
+   value &= ~XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_IDDQ_OVRD;
+   value &= ~XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_PWR_OVRD;
+   value &= ~XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_PWR_OVRD;
+   value |= XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_IDDQ;
+   value &= ~XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_SLEEP_MASK;
+   value |= XUSB_PADCTL_UPHY_MISC_PAD_CTL2_TX_SLEEP_VAL;
+   value |= XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_IDDQ;
+   value &= ~XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_SLEEP_MASK;
+   value |= XUSB_PADCTL_UPHY_MISC_PAD_CTL2_RX_SLEEP_VAL;
+   padctl_writel(padctl, value, lane->soc->regs.misc_ctl2);
+}
+
+#define TEGRA210_UPHY_LANE(_name, _offset, _shift, _mask, _type, _misc)
\
+   {   \
+   .name = _name,  \
+   .offset = _offset,  \
+   .shift = _shift,\
+   .mask = _mask,  \
+   .num_funcs = ARRAY_SIZE(tegra210_##_type##_functions),  \
+   .funcs = tegra210_##_type##_functions,  \
+   .regs.misc_ctl2 = _misc,\
+   }
+
 static const char *tegra210_pcie_functions[] = {
"pcie-x1",
"usb3-ss",
@@ -1648,13 +1710,13 @@ static const char *tegra210_pcie_functions[] = {
 };
 
 static const struct tegra_xusb_lane_soc tegra210_pcie_lanes[] = 

Re: [PATCH 0/2] capability conversion fixes

2021-01-19 Thread Miklos Szeredi
On Tue, Jan 19, 2021 at 10:15 PM Eric W. Biederman
 wrote:
>
> Miklos Szeredi  writes:
>
> > It turns out overlayfs is actually okay wrt. mutliple conversions, because
> > it uses the right context for lower operations.  I.e. before calling
> > vfs_{set,get}xattr() on underlying fs, it overrides creds with that of the
> > mounter, so the current user ns will now match that of
> > overlay_sb->s_user_ns, meaning that the caps will be converted to just the
> > right format for the next layer
> >
> > OTOH ecryptfs, which is the only other one affected by commit 7c03e2cda4a5
> > ("vfs: move cap_convert_nscap() call into vfs_setxattr()") needs to be
> > fixed up, since it doesn't do the cap override thing that overlayfs does.
> >
> > I don't have an ecryptfs setup, so untested, but it's a fairly trivial
> > change.
> >
> > My other observation was that cap_inode_getsecurity() messes up conversion
> > of caps in more than one case.  This is independent of the overlayfs user
> > ns enablement but affects it as well.
> >
> > Maybe we can revisit the infrastructure improvements we discussed, but I
> > think these fixes are more appropriate for the current cycle.
>
> I mostly agree.  Fixing the bugs in a back-portable way is important.
>
> However we need to sort out the infrastructure, and implementation.
>
> As far as I can tell it is only the fact that overlayfs does not support
> the new mount api aka fs_context that allows this fix to work and be
> correct.
>
> I believe the new mount api would allow specifying a different userns
> thatn curent_user_ns for the overlay filesystem and that would break
> this.

This is a valid concern.   I'll add a WARN_ON() to make sure that
whenever this changes it doesn't go unnoticed.

Fixing it would also be easy:  just update creds->user_ns field to
that of sb->s_user_ns in ovl_fill_super().   For now I'll go with the
WARNING though, since this cannot be tested.

Thanks,
Miklos


[PATCH] mmc: Assign boolean values to a bool variable

2021-01-19 Thread Jiapeng Zhong
Fix the following coccicheck warnings:

./drivers/mmc/host/atmel-mci.c:2436:2-34: WARNING: Assignment
of 0/1 to bool variable.

./drivers/mmc/host/atmel-mci.c:2425:2-20: WARNING: Assignment
of 0/1 to bool variable.

Reported-by: Abaci Robot 
Signed-off-by: Jiapeng Zhong 
---
 drivers/mmc/host/atmel-mci.c | 46 ++--
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
index 444bd3a..6324120 100644
--- a/drivers/mmc/host/atmel-mci.c
+++ b/drivers/mmc/host/atmel-mci.c
@@ -2401,45 +2401,45 @@ static void atmci_get_cap(struct atmel_mci *host)
dev_info(>pdev->dev,
"version: 0x%x\n", version);
 
-   host->caps.has_dma_conf_reg = 0;
-   host->caps.has_pdc = 1;
-   host->caps.has_cfg_reg = 0;
-   host->caps.has_cstor_reg = 0;
-   host->caps.has_highspeed = 0;
-   host->caps.has_rwproof = 0;
-   host->caps.has_odd_clk_div = 0;
-   host->caps.has_bad_data_ordering = 1;
-   host->caps.need_reset_after_xfer = 1;
-   host->caps.need_blksz_mul_4 = 1;
-   host->caps.need_notbusy_for_read_ops = 0;
+   host->caps.has_dma_conf_reg = false;
+   host->caps.has_pdc = true;
+   host->caps.has_cfg_reg = false;
+   host->caps.has_cstor_reg = false;
+   host->caps.has_highspeed = false;
+   host->caps.has_rwproof = false;
+   host->caps.has_odd_clk_div = false;
+   host->caps.has_bad_data_ordering = true;
+   host->caps.need_reset_after_xfer = true;
+   host->caps.need_blksz_mul_4 = true;
+   host->caps.need_notbusy_for_read_ops = false;
 
/* keep only major version number */
switch (version & 0xf00) {
case 0x600:
case 0x500:
-   host->caps.has_odd_clk_div = 1;
+   host->caps.has_odd_clk_div = true;
fallthrough;
case 0x400:
case 0x300:
-   host->caps.has_dma_conf_reg = 1;
-   host->caps.has_pdc = 0;
-   host->caps.has_cfg_reg = 1;
-   host->caps.has_cstor_reg = 1;
-   host->caps.has_highspeed = 1;
+   host->caps.has_dma_conf_reg = true;
+   host->caps.has_pdc = false;
+   host->caps.has_cfg_reg = true;
+   host->caps.has_cstor_reg = true;
+   host->caps.has_highspeed = true;
fallthrough;
case 0x200:
-   host->caps.has_rwproof = 1;
-   host->caps.need_blksz_mul_4 = 0;
-   host->caps.need_notbusy_for_read_ops = 1;
+   host->caps.has_rwproof = true;
+   host->caps.need_blksz_mul_4 = false;
+   host->caps.need_notbusy_for_read_ops = true;
fallthrough;
case 0x100:
-   host->caps.has_bad_data_ordering = 0;
-   host->caps.need_reset_after_xfer = 0;
+   host->caps.has_bad_data_ordering = false;
+   host->caps.need_reset_after_xfer = false;
fallthrough;
case 0x0:
break;
default:
-   host->caps.has_pdc = 0;
+   host->caps.has_pdc = false;
dev_warn(>pdev->dev,
"Unmanaged mci version, set minimum 
capabilities\n");
break;
-- 
1.8.3.1



[PATCH v7 06/14] phy: tegra: xusb: Add sleepwalk and suspend/resume

2021-01-19 Thread JC Kuo
This commit adds sleepwalk/wake and suspend/resume interfaces
to Tegra XUSB PHY driver.

Tegra XUSB host controller driver makes use of sleepwalk functions
to enable/disable sleepwalk circuit which is in always-on partition
and can respond to USB resume signals when controller is not powered.
Sleepwalk can be enabled/disabled for any USB UPHY individually.

  - tegra_xusb_padctl_enable_phy_sleepwalk()
  - tegra_xusb_padctl_disable_phy_sleepwalk()

Tegra XUSB host controller driver makes use of wake functions to
enable/disable/query wake circuit which is in always-on partition
can wake system up when USB resume happens.
Wake circuit can be enabled/disabled for any USB PHY individually.

  - tegra_xusb_padctl_enable_phy_wake()
  - tegra_xusb_padctl_disable_phy_wake()
  - tegra_xusb_padctl_remote_wake_detected()

This commit also adds two system suspend stubs that can be used to
save and restore XUSB PADCTL context during system suspend and
resume.
  - tegra_xusb_padctl_suspend_noirq()
  - tegra_xusb_padctl_resume_noirq()

Signed-off-by: JC Kuo 
Acked-by: Thierry Reding 
---
v7:
   add 'Acked-by: Thierry Reding '
v6:
   no change
v5:
   no change
v4:
   move sleepwalk/wake stubs from 'struct tegra_xusb_padctl_ops' to
   'struct tegra_xusb_lane_ops'
v3:
   commit message improvement, no change in code

 drivers/phy/tegra/xusb.c   | 82 ++
 drivers/phy/tegra/xusb.h   |  8 
 include/linux/phy/tegra/xusb.h | 10 -
 3 files changed, 99 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/tegra/xusb.c b/drivers/phy/tegra/xusb.c
index a34d304677bb..0aadac678191 100644
--- a/drivers/phy/tegra/xusb.c
+++ b/drivers/phy/tegra/xusb.c
@@ -1273,10 +1273,36 @@ static int tegra_xusb_padctl_remove(struct 
platform_device *pdev)
return err;
 }
 
+static int tegra_xusb_padctl_suspend_noirq(struct device *dev)
+{
+   struct tegra_xusb_padctl *padctl = dev_get_drvdata(dev);
+
+   if (padctl->soc && padctl->soc->ops && padctl->soc->ops->suspend_noirq)
+   return padctl->soc->ops->suspend_noirq(padctl);
+
+   return 0;
+}
+
+static int tegra_xusb_padctl_resume_noirq(struct device *dev)
+{
+   struct tegra_xusb_padctl *padctl = dev_get_drvdata(dev);
+
+   if (padctl->soc && padctl->soc->ops && padctl->soc->ops->resume_noirq)
+   return padctl->soc->ops->resume_noirq(padctl);
+
+   return 0;
+}
+
+static const struct dev_pm_ops tegra_xusb_padctl_pm_ops = {
+   SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(tegra_xusb_padctl_suspend_noirq,
+ tegra_xusb_padctl_resume_noirq)
+};
+
 static struct platform_driver tegra_xusb_padctl_driver = {
.driver = {
.name = "tegra-xusb-padctl",
.of_match_table = tegra_xusb_padctl_of_match,
+   .pm = _xusb_padctl_pm_ops,
},
.probe = tegra_xusb_padctl_probe,
.remove = tegra_xusb_padctl_remove,
@@ -1343,6 +1369,62 @@ int tegra_xusb_padctl_hsic_set_idle(struct 
tegra_xusb_padctl *padctl,
 }
 EXPORT_SYMBOL_GPL(tegra_xusb_padctl_hsic_set_idle);
 
+int tegra_xusb_padctl_enable_phy_sleepwalk(struct tegra_xusb_padctl *padctl, 
struct phy *phy,
+  enum usb_device_speed speed)
+{
+   struct tegra_xusb_lane *lane = phy_get_drvdata(phy);
+
+   if (lane->pad->ops->enable_phy_sleepwalk)
+   return lane->pad->ops->enable_phy_sleepwalk(lane, speed);
+
+   return -EOPNOTSUPP;
+}
+EXPORT_SYMBOL_GPL(tegra_xusb_padctl_enable_phy_sleepwalk);
+
+int tegra_xusb_padctl_disable_phy_sleepwalk(struct tegra_xusb_padctl *padctl, 
struct phy *phy)
+{
+   struct tegra_xusb_lane *lane = phy_get_drvdata(phy);
+
+   if (lane->pad->ops->disable_phy_sleepwalk)
+   return lane->pad->ops->disable_phy_sleepwalk(lane);
+
+   return -EOPNOTSUPP;
+}
+EXPORT_SYMBOL_GPL(tegra_xusb_padctl_disable_phy_sleepwalk);
+
+int tegra_xusb_padctl_enable_phy_wake(struct tegra_xusb_padctl *padctl, struct 
phy *phy)
+{
+   struct tegra_xusb_lane *lane = phy_get_drvdata(phy);
+
+   if (lane->pad->ops->enable_phy_wake)
+   return lane->pad->ops->enable_phy_wake(lane);
+
+   return -EOPNOTSUPP;
+}
+EXPORT_SYMBOL_GPL(tegra_xusb_padctl_enable_phy_wake);
+
+int tegra_xusb_padctl_disable_phy_wake(struct tegra_xusb_padctl *padctl, 
struct phy *phy)
+{
+   struct tegra_xusb_lane *lane = phy_get_drvdata(phy);
+
+   if (lane->pad->ops->disable_phy_wake)
+   return lane->pad->ops->disable_phy_wake(lane);
+
+   return -EOPNOTSUPP;
+}
+EXPORT_SYMBOL_GPL(tegra_xusb_padctl_disable_phy_wake);
+
+bool tegra_xusb_padctl_remote_wake_detected(struct tegra_xusb_padctl *padctl, 
struct phy *phy)
+{
+   struct tegra_xusb_lane *lane = phy_get_drvdata(phy);
+
+   if (lane->pad->ops->remote_wake_detected)
+   return lane->pad->ops->remote_wake_detected(lane);
+
+   return false;
+}

Re: [PATCH] opp: Prepare for ->set_opp() helper to work without regulators

2021-01-19 Thread Viresh Kumar
On 19-01-21, 20:16, Dmitry Osipenko wrote:
> 19.01.2021 09:35, Viresh Kumar пишет:
> > +   mutex_lock(_table->lock);
> > +   opp_table->set_opp_data = data;
> > +   if (opp_table->sod_supplies) {
> > +   data->old_opp.supplies = opp_table->sod_supplies;
> > +   data->new_opp.supplies = opp_table->sod_supplies +
> > +opp_table->regulator_count;
> > +   }
> > +   mutex_unlock(_table->lock);
> 
> Why do we need all these locks in this patch?

In case dev_pm_opp_set_regulators() and
dev_pm_opp_register_set_opp_helper() get called at the same time.
Which can actually happen, though is a corner case.

> The OPP API isn't thread-safe, these locks won't make the API
> thread-safe.

I am not sure what you mean by that, can you please explain ?

> At least both sod_supplies and set_opp() pointers should be
> set and unset under the lock.

The ->set_opp pointer isn't getting used for a comparison and so
putting that inside a lock won't get us anything. We are only using
set_opp_data and sod_supplies for comparison at both the places and so
they need to be updated within the lock.

-- 
viresh


[PATCH v7 07/14] soc/tegra: pmc: Provide USB sleepwalk register map

2021-01-19 Thread JC Kuo
This commit implements a register map which grants USB (UTMI and HSIC)
sleepwalk registers access to USB PHY drivers. The USB sleepwalk logic
is in PMC hardware block but USB PHY drivers have the best knowledge
of proper programming sequence.

Signed-off-by: JC Kuo 
Acked-by: Thierry Reding 
---
v7:
   no change
v6:
   no change
v5:
   no change
v4:
   commit message improvement
   remove an unnecessary type cast when invokes devm_regmap_init()
v3:
   commit message improvement
   drop regmap_reg() usage
   rename 'reg' with 'offset'
   rename 'val' with 'value'
   drop '__force' when invokes devm_regmap_init()
   print error code of devm_regmap_init()
   move devm_regmap_init() a litter bit earlier
   explicitly set '.has_usb_sleepwalk=false'

 drivers/soc/tegra/pmc.c | 94 +
 1 file changed, 94 insertions(+)

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index df9a5ca8c99c..a619a23f9592 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -43,6 +43,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -102,6 +103,9 @@
 
 #define PMC_PWR_DET_VALUE  0xe4
 
+#define PMC_USB_DEBOUNCE_DEL   0xec
+#define PMC_USB_AO 0xf0
+
 #define PMC_SCRATCH41  0x140
 
 #define PMC_WAKE2_MASK 0x160
@@ -133,6 +137,13 @@
 #define IO_DPD2_STATUS 0x1c4
 #define SEL_DPD_TIM0x1c8
 
+#define PMC_UTMIP_UHSIC_TRIGGERS   0x1ec
+#define PMC_UTMIP_UHSIC_SAVED_STATE0x1f0
+
+#define PMC_UTMIP_TERM_PAD_CFG 0x1f8
+#define PMC_UTMIP_UHSIC_SLEEP_CFG  0x1fc
+#define PMC_UTMIP_UHSIC_FAKE   0x218
+
 #define PMC_SCRATCH54  0x258
 #define  PMC_SCRATCH54_DATA_SHIFT  8
 #define  PMC_SCRATCH54_ADDR_SHIFT  0
@@ -145,8 +156,18 @@
 #define  PMC_SCRATCH55_CHECKSUM_SHIFT  16
 #define  PMC_SCRATCH55_I2CSLV1_SHIFT   0
 
+#define  PMC_UTMIP_UHSIC_LINE_WAKEUP   0x26c
+
+#define PMC_UTMIP_BIAS_MASTER_CNTRL0x270
+#define PMC_UTMIP_MASTER_CONFIG0x274
+#define PMC_UTMIP_UHSIC2_TRIGGERS  0x27c
+#define PMC_UTMIP_MASTER2_CONFIG   0x29c
+
 #define GPU_RG_CNTRL   0x2d4
 
+#define PMC_UTMIP_PAD_CFG0 0x4c0
+#define PMC_UTMIP_UHSIC_SLEEP_CFG1 0x4d0
+#define PMC_UTMIP_SLEEPWALK_P3 0x4e0
 /* Tegra186 and later */
 #define WAKE_AOWAKE_CNTRL(x) (0x000 + ((x) << 2))
 #define WAKE_AOWAKE_CNTRL_LEVEL (1 << 3)
@@ -334,6 +355,7 @@ struct tegra_pmc_soc {
const struct pmc_clk_init_data *pmc_clks_data;
unsigned int num_pmc_clks;
bool has_blink_output;
+   bool has_usb_sleepwalk;
 };
 
 /**
@@ -2443,6 +2465,67 @@ static void tegra_pmc_clock_register(struct tegra_pmc 
*pmc,
 err);
 }
 
+static const struct regmap_range pmc_usb_sleepwalk_ranges[] = {
+   regmap_reg_range(PMC_USB_DEBOUNCE_DEL, PMC_USB_AO),
+   regmap_reg_range(PMC_UTMIP_UHSIC_TRIGGERS, PMC_UTMIP_UHSIC_SAVED_STATE),
+   regmap_reg_range(PMC_UTMIP_TERM_PAD_CFG, PMC_UTMIP_UHSIC_FAKE),
+   regmap_reg_range(PMC_UTMIP_UHSIC_LINE_WAKEUP, 
PMC_UTMIP_UHSIC_LINE_WAKEUP),
+   regmap_reg_range(PMC_UTMIP_BIAS_MASTER_CNTRL, PMC_UTMIP_MASTER_CONFIG),
+   regmap_reg_range(PMC_UTMIP_UHSIC2_TRIGGERS, PMC_UTMIP_MASTER2_CONFIG),
+   regmap_reg_range(PMC_UTMIP_PAD_CFG0, PMC_UTMIP_UHSIC_SLEEP_CFG1),
+   regmap_reg_range(PMC_UTMIP_SLEEPWALK_P3, PMC_UTMIP_SLEEPWALK_P3),
+};
+
+static const struct regmap_access_table pmc_usb_sleepwalk_table = {
+   .yes_ranges = pmc_usb_sleepwalk_ranges,
+   .n_yes_ranges = ARRAY_SIZE(pmc_usb_sleepwalk_ranges),
+};
+
+static int tegra_pmc_regmap_readl(void *context, unsigned int offset, unsigned 
int *value)
+{
+   struct tegra_pmc *pmc = context;
+
+   *value = tegra_pmc_readl(pmc, offset);
+   return 0;
+}
+
+static int tegra_pmc_regmap_writel(void *context, unsigned int offset, 
unsigned int value)
+{
+   struct tegra_pmc *pmc = context;
+
+   tegra_pmc_writel(pmc, value, offset);
+   return 0;
+}
+
+static const struct regmap_config usb_sleepwalk_regmap_config = {
+   .name = "usb_sleepwalk",
+   .reg_bits = 32,
+   .val_bits = 32,
+   .reg_stride = 4,
+   .fast_io = true,
+   .rd_table = _usb_sleepwalk_table,
+   .wr_table = _usb_sleepwalk_table,
+   .reg_read = tegra_pmc_regmap_readl,
+   .reg_write = tegra_pmc_regmap_writel,
+};
+
+static int tegra_pmc_regmap_init(struct tegra_pmc *pmc)
+{
+   struct regmap *regmap;
+   int err;
+
+   if (pmc->soc->has_usb_sleepwalk) {
+   regmap = devm_regmap_init(pmc->dev, NULL, pmc, 
_sleepwalk_regmap_config);
+   if (IS_ERR(regmap)) {
+   err = PTR_ERR(regmap);
+   dev_err(pmc->dev, "failed to allocate register map 
(%d)\n", err);
+   return err;
+   }
+   }
+
+   return 0;
+}
+
 

[PATCH v7 11/14] phy: tegra: xusb: Tegra210 host mode VBUS control

2021-01-19 Thread JC Kuo
To support XUSB host controller ELPG, this commit moves VBUS control
.phy_power_on()/.phy_power_off() to .phy_init()/.phy_exit().
When XUSB host controller enters ELPG, host driver invokes
.phy_power_off(), VBUS should remain ON so that USB devices will not
disconnect. VBUS can be turned OFF when host driver invokes
.phy_exit() which indicates disabling a USB port.

Signed-off-by: JC Kuo 
Acked-by: Thierry Reding 
---
v7:
   no change
v6:
   no change
v5:
   no change
v4:
   no change
v3:
   new, was a part of "phy: tegra: xusb: Add wake/sleepwalk for Tegra210"

 drivers/phy/tegra/xusb-tegra210.c | 52 ---
 1 file changed, 40 insertions(+), 12 deletions(-)

diff --git a/drivers/phy/tegra/xusb-tegra210.c 
b/drivers/phy/tegra/xusb-tegra210.c
index 8af73ba78ad7..9d39f812fb43 100644
--- a/drivers/phy/tegra/xusb-tegra210.c
+++ b/drivers/phy/tegra/xusb-tegra210.c
@@ -1819,8 +1819,25 @@ static int tegra210_usb2_phy_init(struct phy *phy)
 {
struct tegra_xusb_lane *lane = phy_get_drvdata(phy);
struct tegra_xusb_padctl *padctl = lane->pad->padctl;
+   unsigned int index = lane->index;
+   struct tegra_xusb_usb2_port *port;
+   int err;
u32 value;
 
+   port = tegra_xusb_find_usb2_port(padctl, index);
+   if (!port) {
+   dev_err(>dev, "no port found for USB2 lane %u\n", index);
+   return -ENODEV;
+   }
+
+   if (port->supply && port->mode == USB_DR_MODE_HOST) {
+   err = regulator_enable(port->supply);
+   if (err)
+   return err;
+   }
+
+   mutex_lock(>lock);
+
value = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX);
value &= ~(XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_MASK <<
   XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_SHIFT);
@@ -1828,11 +1845,30 @@ static int tegra210_usb2_phy_init(struct phy *phy)
 XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_SHIFT;
padctl_writel(padctl, value, XUSB_PADCTL_USB2_PAD_MUX);
 
+   mutex_unlock(>lock);
+
return 0;
 }
 
 static int tegra210_usb2_phy_exit(struct phy *phy)
 {
+   struct tegra_xusb_lane *lane = phy_get_drvdata(phy);
+   struct tegra_xusb_padctl *padctl = lane->pad->padctl;
+   struct tegra_xusb_usb2_port *port;
+   int err;
+
+   port = tegra_xusb_find_usb2_port(padctl, lane->index);
+   if (!port) {
+   dev_err(>dev, "no port found for USB2 lane %u\n", 
lane->index);
+   return -ENODEV;
+   }
+
+   if (port->supply && port->mode == USB_DR_MODE_HOST) {
+   err = regulator_disable(port->supply);
+   if (err)
+   return err;
+   }
+
return 0;
 }
 
@@ -1953,6 +1989,8 @@ static int tegra210_usb2_phy_power_on(struct phy *phy)
 
priv = to_tegra210_xusb_padctl(padctl);
 
+   mutex_lock(>lock);
+
if (port->usb3_port_fake != -1) {
value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_MAP);
value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_MASK(
@@ -2046,14 +2084,6 @@ static int tegra210_usb2_phy_power_on(struct phy *phy)
padctl_writel(padctl, value,
  XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPADX_CTL1(index));
 
-   if (port->supply && port->mode == USB_DR_MODE_HOST) {
-   err = regulator_enable(port->supply);
-   if (err)
-   return err;
-   }
-
-   mutex_lock(>lock);
-
if (pad->enable > 0) {
pad->enable++;
mutex_unlock(>lock);
@@ -2062,7 +2092,7 @@ static int tegra210_usb2_phy_power_on(struct phy *phy)
 
err = clk_prepare_enable(pad->clk);
if (err)
-   goto disable_regulator;
+   goto out;
 
value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);
value &= ~((XUSB_PADCTL_USB2_BIAS_PAD_CTL1_TRK_START_TIMER_MASK <<
@@ -2094,8 +2124,7 @@ static int tegra210_usb2_phy_power_on(struct phy *phy)
 
return 0;
 
-disable_regulator:
-   regulator_disable(port->supply);
+out:
mutex_unlock(>lock);
return err;
 }
@@ -2154,7 +2183,6 @@ static int tegra210_usb2_phy_power_off(struct phy *phy)
padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0);
 
 out:
-   regulator_disable(port->supply);
mutex_unlock(>lock);
return 0;
 }
-- 
2.25.1



[PATCH v7 12/14] phy: tegra: xusb: Add wake/sleepwalk for Tegra186

2021-01-19 Thread JC Kuo
This commit implements Tegra186/Tegra194 XUSB PADCTL/AO wake and
sleepwalk operations.

Signed-off-by: JC Kuo 
Acked-by: Thierry Reding 
---
v7:
   add 'Acked-by: Thierry Reding '
v6:
   no change
v5:
   no change
v4:
   move sleepwalk/wake stubs from 'struct tegra_xusb_padctl_ops' to
   'struct tegra_xusb_lane_ops'
v3:
   move 'ao_regs' to the top of 'struct tegra186_xusb_padctl'
   change return data of .phy_remote_wake_detected() to 'bool'
   change input parameter of .phy_remote_wake_detected() to 'struct phy*'
   remove unnecessary 'else'
   rename 'val' with 'value'

 drivers/phy/tegra/xusb-tegra186.c | 558 +-
 1 file changed, 557 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/tegra/xusb-tegra186.c 
b/drivers/phy/tegra/xusb-tegra186.c
index 5d64f69b39a9..2208c26f8af9 100644
--- a/drivers/phy/tegra/xusb-tegra186.c
+++ b/drivers/phy/tegra/xusb-tegra186.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (c) 2016-2019, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2020, NVIDIA CORPORATION.  All rights reserved.
  */
 
 #include 
@@ -113,6 +113,117 @@
 #define  ID_OVERRIDE_FLOATING  ID_OVERRIDE(8)
 #define  ID_OVERRIDE_GROUNDED  ID_OVERRIDE(0)
 
+/* XUSB AO registers */
+#define XUSB_AO_USB_DEBOUNCE_DEL   (0x4)
+#define   UHSIC_LINE_DEB_CNT(x)(((x) & 0xf) << 4)
+#define   UTMIP_LINE_DEB_CNT(x)((x) & 0xf)
+
+#define XUSB_AO_UTMIP_TRIGGERS(x)  (0x40 + (x) * 4)
+#define   CLR_WALK_PTR (1 << 0)
+#define   CAP_CFG  (1 << 1)
+#define   CLR_WAKE_ALARM   (1 << 3)
+
+#define XUSB_AO_UHSIC_TRIGGERS(x)  (0x60 + (x) * 4)
+#define   HSIC_CLR_WALK_PTR(1 << 0)
+#define   HSIC_CLR_WAKE_ALARM  (1 << 3)
+#define   HSIC_CAP_CFG (1 << 4)
+
+#define XUSB_AO_UTMIP_SAVED_STATE(x)   (0x70 + (x) * 4)
+#define   SPEED(x) ((x) & 0x3)
+#define UTMI_HSSPEED(0)
+#define UTMI_FSSPEED(1)
+#define UTMI_LSSPEED(2)
+#define UTMI_RST   SPEED(3)
+
+#define XUSB_AO_UHSIC_SAVED_STATE(x)   (0x90 + (x) * 4)
+#define   MODE(x)  ((x) & 0x1)
+#define   MODE_HS  MODE(0)
+#define   MODE_RST MODE(1)
+
+#define XUSB_AO_UTMIP_SLEEPWALK_CFG(x) (0xd0 + (x) * 4)
+#define XUSB_AO_UHSIC_SLEEPWALK_CFG(x) (0xf0 + (x) * 4)
+#define   FAKE_USBOP_VAL   (1 << 0)
+#define   FAKE_USBON_VAL   (1 << 1)
+#define   FAKE_USBOP_EN(1 << 2)
+#define   FAKE_USBON_EN(1 << 3)
+#define   FAKE_STROBE_VAL  (1 << 0)
+#define   FAKE_DATA_VAL(1 << 1)
+#define   FAKE_STROBE_EN   (1 << 2)
+#define   FAKE_DATA_EN (1 << 3)
+#define   WAKE_WALK_EN (1 << 14)
+#define   MASTER_ENABLE(1 << 15)
+#define   LINEVAL_WALK_EN  (1 << 16)
+#define   WAKE_VAL(x)  (((x) & 0xf) << 17)
+#define WAKE_VAL_NONE  WAKE_VAL(12)
+#define WAKE_VAL_ANY   WAKE_VAL(15)
+#define WAKE_VAL_DS10  WAKE_VAL(2)
+#define   LINE_WAKEUP_EN   (1 << 21)
+#define   MASTER_CFG_SEL   (1 << 22)
+
+#define XUSB_AO_UTMIP_SLEEPWALK(x) (0x100 + (x) * 4)
+/* phase A */
+#define   USBOP_RPD_A  (1 << 0)
+#define   USBON_RPD_A  (1 << 1)
+#define   AP_A (1 << 4)
+#define   AN_A (1 << 5)
+#define   HIGHZ_A  (1 << 6)
+/* phase B */
+#define   USBOP_RPD_B  (1 << 8)
+#define   USBON_RPD_B  (1 << 9)
+#define   AP_B (1 << 12)
+#define   AN_B (1 << 13)
+#define   HIGHZ_B  (1 << 14)
+/* phase C */
+#define   USBOP_RPD_C  (1 << 16)
+#define   USBON_RPD_C  (1 << 17)
+#define   AP_C (1 << 20)
+#define   AN_C (1 << 21)
+#define   HIGHZ_C  (1 << 22)
+/* phase D */
+#define   USBOP_RPD_D  (1 << 24)
+#define   USBON_RPD_D  (1 << 25)
+#define   AP_D (1 << 28)
+#define   AN_D (1 << 29)
+#define   HIGHZ_D  

[PATCH v7 13/14] usb: host: xhci-tegra: Unlink power domain devices

2021-01-19 Thread JC Kuo
This commit unlinks xhci-tegra platform device with SS/host power
domain devices. Reasons for this change is - at ELPG entry, PHY
sleepwalk and wake configuration need to be done before powering
down SS/host partitions, and PHY need be powered off after powering
down SS/host partitions. Sequence looks like roughly below:

  tegra_xusb_enter_elpg() -> xhci_suspend()
  -> enable PHY sleepwalk and wake if needed
  -> power down SS/host partitions
  -> power down PHY

If SS/host power domains are linked to xhci-tegra platform device, we
are not able to perform the sequence like above.

This commit introduces:
  1. tegra_xusb_unpowergate_partitions() to power up SS and host
 partitions together. If SS/host power domain devices are
 available, it invokes pm_runtime_get_sync() to request power
 driver to power up partitions; If power domain devices are not
 available, tegra_powergate_sequence_power_up() will be used to
 power up partitions.

  2. tegra_xusb_powergate_partitions() to power down SS and host
 partitions together. If SS/host power domain devices are
 available, it invokes pm_runtime_put_sync() to request power
 driver to power down partitions; If power domain devices are not
 available, tegra_powergate_power_off() will be used to power down
 partitions.

Signed-off-by: JC Kuo 
Acked-by: Thierry Reding 
---
v7:
   add 'Acked-by: Thierry Reding '
v6:
   no change
v5:
   no change
v4:
   commit message improvement
   update copyright string
v3:
   use 'unsigned int' for PHY index
   remove unnecessary 'else'
   drop IRQF_TRIGGER_HIGH when invokes devm_request_threaded_irq()

 drivers/usb/host/xhci-tegra.c | 206 ++
 1 file changed, 112 insertions(+), 94 deletions(-)

diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
index 50bb91b6a4b8..5b39a739f8f0 100644
--- a/drivers/usb/host/xhci-tegra.c
+++ b/drivers/usb/host/xhci-tegra.c
@@ -2,7 +2,7 @@
 /*
  * NVIDIA Tegra xHCI host controller driver
  *
- * Copyright (C) 2014 NVIDIA Corporation
+ * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
  * Copyright (C) 2014 Google, Inc.
  */
 
@@ -249,8 +249,7 @@ struct tegra_xusb {
 
struct device *genpd_dev_host;
struct device *genpd_dev_ss;
-   struct device_link *genpd_dl_host;
-   struct device_link *genpd_dl_ss;
+   bool use_genpd;
 
struct phy **phys;
unsigned int num_phys;
@@ -821,36 +820,12 @@ static void tegra_xusb_phy_disable(struct tegra_xusb 
*tegra)
 
 static int tegra_xusb_runtime_suspend(struct device *dev)
 {
-   struct tegra_xusb *tegra = dev_get_drvdata(dev);
-
-   regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies);
-   tegra_xusb_clk_disable(tegra);
-
return 0;
 }
 
 static int tegra_xusb_runtime_resume(struct device *dev)
 {
-   struct tegra_xusb *tegra = dev_get_drvdata(dev);
-   int err;
-
-   err = tegra_xusb_clk_enable(tegra);
-   if (err) {
-   dev_err(dev, "failed to enable clocks: %d\n", err);
-   return err;
-   }
-
-   err = regulator_bulk_enable(tegra->soc->num_supplies, tegra->supplies);
-   if (err) {
-   dev_err(dev, "failed to enable regulators: %d\n", err);
-   goto disable_clk;
-   }
-
return 0;
-
-disable_clk:
-   tegra_xusb_clk_disable(tegra);
-   return err;
 }
 
 #ifdef CONFIG_PM_SLEEP
@@ -1026,10 +1001,9 @@ static int tegra_xusb_load_firmware(struct tegra_xusb 
*tegra)
 static void tegra_xusb_powerdomain_remove(struct device *dev,
  struct tegra_xusb *tegra)
 {
-   if (tegra->genpd_dl_ss)
-   device_link_del(tegra->genpd_dl_ss);
-   if (tegra->genpd_dl_host)
-   device_link_del(tegra->genpd_dl_host);
+   if (!tegra->use_genpd)
+   return;
+
if (!IS_ERR_OR_NULL(tegra->genpd_dev_ss))
dev_pm_domain_detach(tegra->genpd_dev_ss, true);
if (!IS_ERR_OR_NULL(tegra->genpd_dev_host))
@@ -1055,20 +1029,84 @@ static int tegra_xusb_powerdomain_init(struct device 
*dev,
return err;
}
 
-   tegra->genpd_dl_host = device_link_add(dev, tegra->genpd_dev_host,
-  DL_FLAG_PM_RUNTIME |
-  DL_FLAG_STATELESS);
-   if (!tegra->genpd_dl_host) {
-   dev_err(dev, "adding host device link failed!\n");
-   return -ENODEV;
+   tegra->use_genpd = true;
+
+   return 0;
+}
+
+static int tegra_xusb_unpowergate_partitions(struct tegra_xusb *tegra)
+{
+   struct device *dev = tegra->dev;
+   int rc;
+
+   if (tegra->use_genpd) {
+   rc = pm_runtime_get_sync(tegra->genpd_dev_ss);
+   if (rc < 0) {
+   dev_err(dev, "failed to enable XUSB 

[PATCH v7 01/14] clk: tegra: Add PLLE HW power sequencer control

2021-01-19 Thread JC Kuo
PLLE has a hardware power sequencer logic which is a state machine
that can power on/off PLLE without any software intervention. The
sequencer has two inputs, one from XUSB UPHY PLL and the other from
SATA UPHY PLL. PLLE provides reference clock to XUSB and SATA UPHY
PLLs. When both of the downstream PLLs are powered-off, PLLE hardware
power sequencer will automatically power off PLLE for power saving.

XUSB and SATA UPHY PLLs also have their own hardware power sequencer
logic. XUSB UPHY PLL is shared between XUSB SuperSpeed ports and PCIE
controllers. The XUSB UPHY PLL hardware power sequencer has inputs
from XUSB and PCIE. When all of the XUSB SuperSpeed ports and PCIE
controllers are in low power state, XUSB UPHY PLL hardware power
sequencer automatically power off PLL and flags idle to PLLE hardware
power sequencer. Similar applies to SATA UPHY PLL.

PLLE hardware power sequencer has to be enabled after both downstream
sequencers are enabled.

This commit adds two helper functions:
1. tegra210_plle_hw_sequence_start() for XUSB PADCTL driver to enable
   PLLE hardware sequencer at proper time.

2. tegra210_plle_hw_sequence_is_enabled() for XUSB PADCTL driver to
   check whether PLLE hardware sequencer has been enabled or not.

Signed-off-by: JC Kuo 
Acked-by: Thierry Reding 
---
v7:
   no change
v6:
   no change
v5:
   no change
v4:
   update copyright strings
v3:
   rename 'val' with 'value

 drivers/clk/tegra/clk-tegra210.c | 53 +++-
 include/linux/clk/tegra.h|  4 ++-
 2 files changed, 55 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index 68cbb98af567..b9099012dc7b 100644
--- a/drivers/clk/tegra/clk-tegra210.c
+++ b/drivers/clk/tegra/clk-tegra210.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2012-2014 NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2012-2020 NVIDIA CORPORATION.  All rights reserved.
  */
 
 #include 
@@ -403,6 +403,14 @@ static unsigned long tegra210_input_freq[] = {
 #define PLLRE_BASE_DEFAULT_MASK0x1c00
 #define PLLRE_MISC0_WRITE_MASK 0x67ff
 
+/* PLLE */
+#define PLLE_MISC_IDDQ_SW_CTRL (1 << 14)
+#define PLLE_AUX_USE_LOCKDET   (1 << 3)
+#define PLLE_AUX_SS_SEQ_INCLUDE(1 << 31)
+#define PLLE_AUX_ENABLE_SWCTL  (1 << 4)
+#define PLLE_AUX_SS_SWCTL  (1 << 6)
+#define PLLE_AUX_SEQ_ENABLE(1 << 24)
+
 /* PLLX */
 #define PLLX_USE_DYN_RAMP  1
 #define PLLX_BASE_LOCK (1 << 27)
@@ -489,6 +497,49 @@ static unsigned long tegra210_input_freq[] = {
 #define PLLU_MISC0_WRITE_MASK  0xbfff
 #define PLLU_MISC1_WRITE_MASK  0x0007
 
+bool tegra210_plle_hw_sequence_is_enabled(void)
+{
+   u32 value;
+
+   value = readl_relaxed(clk_base + PLLE_AUX);
+   if (value & PLLE_AUX_SEQ_ENABLE)
+   return true;
+
+   return false;
+}
+EXPORT_SYMBOL_GPL(tegra210_plle_hw_sequence_is_enabled);
+
+int tegra210_plle_hw_sequence_start(void)
+{
+   u32 value;
+
+   if (tegra210_plle_hw_sequence_is_enabled())
+   return 0;
+
+   /* skip if PLLE is not enabled yet */
+   value = readl_relaxed(clk_base + PLLE_MISC0);
+   if (!(value & PLLE_MISC_LOCK))
+   return -EIO;
+
+   value &= ~PLLE_MISC_IDDQ_SW_CTRL;
+   writel_relaxed(value, clk_base + PLLE_MISC0);
+
+   value = readl_relaxed(clk_base + PLLE_AUX);
+   value |= (PLLE_AUX_USE_LOCKDET | PLLE_AUX_SS_SEQ_INCLUDE);
+   value &= ~(PLLE_AUX_ENABLE_SWCTL | PLLE_AUX_SS_SWCTL);
+   writel_relaxed(value, clk_base + PLLE_AUX);
+
+   fence_udelay(1, clk_base);
+
+   value |= PLLE_AUX_SEQ_ENABLE;
+   writel_relaxed(value, clk_base + PLLE_AUX);
+
+   fence_udelay(1, clk_base);
+
+   return 0;
+}
+EXPORT_SYMBOL_GPL(tegra210_plle_hw_sequence_start);
+
 void tegra210_xusb_pll_hw_control_enable(void)
 {
u32 val;
diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h
index eb016fc9cc0b..f7ff722a03dd 100644
--- a/include/linux/clk/tegra.h
+++ b/include/linux/clk/tegra.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2012-2020, NVIDIA CORPORATION.  All rights reserved.
  */
 
 #ifndef __LINUX_CLK_TEGRA_H_
@@ -123,6 +123,8 @@ static inline void tegra_cpu_clock_resume(void)
 }
 #endif
 
+extern int tegra210_plle_hw_sequence_start(void);
+extern bool tegra210_plle_hw_sequence_is_enabled(void);
 extern void tegra210_xusb_pll_hw_control_enable(void);
 extern void tegra210_xusb_pll_hw_sequence_start(void);
 extern void tegra210_sata_pll_hw_control_enable(void);
-- 
2.25.1



[PATCH v7 14/14] xhci: tegra: Enable ELPG for runtime/system PM

2021-01-19 Thread JC Kuo
This commit implements the complete programming sequence for ELPG
entry and exit.

 1. At ELPG entry, invokes tegra_xusb_padctl_enable_phy_sleepwalk()
and tegra_xusb_padctl_enable_phy_wake() to configure XUSB PADCTL
sleepwalk and wake detection circuits to maintain USB lines level
and respond to wake events (wake-on-connect, wake-on-disconnect,
device-initiated-wake).

 2. At ELPG exit, invokes tegra_xusb_padctl_disable_phy_sleepwalk()
and tegra_xusb_padctl_disable_phy_wake() to disarm sleepwalk and
wake detection circuits.

At runtime suspend, XUSB host controller can enter ELPG to reduce
power consumption. When XUSB PADCTL wake detection circuit detects
a wake event, an interrupt will be raised. xhci-tegra driver then
will invoke pm_runtime_resume() for xhci-tegra.

Runtime resume could also be triggered by protocol drivers, this is
the host-initiated-wake event. At runtime resume, xhci-tegra driver
brings XUSB host controller out of ELPG to handle the wake events.

The same ELPG enter/exit procedure will be performed for system
suspend/resume path so USB devices can remain connected across SC7.

Signed-off-by: JC Kuo 
Acked-by: Thierry Reding 
---
v7:
   add 'Acked-by: Thierry Reding '
v6:
   fix compiling warning: extra tokens at end of #ifdef directive
v5:
   avoid using xhci_get_rhub()
   protect ELPG routines with (CONFIG_PM || CONFIG_PM_SLEEP)
v4:
   reshuffle the code to avoid these pre-declarations
v3:
   use 'unsigned int' for PHY index
   remove unnecessary 'else'
   drop IRQF_TRIGGER_HIGH when invokes devm_request_threaded_irq()

 drivers/usb/host/xhci-tegra.c | 407 ++
 1 file changed, 370 insertions(+), 37 deletions(-)

diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
index 5b39a739f8f0..ce97ff054c68 100644
--- a/drivers/usb/host/xhci-tegra.c
+++ b/drivers/usb/host/xhci-tegra.c
@@ -15,9 +15,11 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -224,6 +226,7 @@ struct tegra_xusb {
 
int xhci_irq;
int mbox_irq;
+   int padctl_irq;
 
void __iomem *ipfs_base;
void __iomem *fpci_base;
@@ -269,6 +272,7 @@ struct tegra_xusb {
dma_addr_t phys;
} fw;
 
+   bool suspended;
struct tegra_xusb_context context;
 };
 
@@ -665,6 +669,9 @@ static irqreturn_t tegra_xusb_mbox_thread(int irq, void 
*data)
 
mutex_lock(>lock);
 
+   if (pm_runtime_suspended(tegra->dev) || tegra->suspended)
+   goto out;
+
value = fpci_readl(tegra, tegra->soc->mbox.data_out);
tegra_xusb_mbox_unpack(, value);
 
@@ -678,6 +685,7 @@ static irqreturn_t tegra_xusb_mbox_thread(int irq, void 
*data)
 
tegra_xusb_mbox_handle(tegra, );
 
+out:
mutex_unlock(>lock);
return IRQ_HANDLED;
 }
@@ -818,16 +826,6 @@ static void tegra_xusb_phy_disable(struct tegra_xusb 
*tegra)
}
 }
 
-static int tegra_xusb_runtime_suspend(struct device *dev)
-{
-   return 0;
-}
-
-static int tegra_xusb_runtime_resume(struct device *dev)
-{
-   return 0;
-}
-
 #ifdef CONFIG_PM_SLEEP
 static int tegra_xusb_init_context(struct tegra_xusb *tegra)
 {
@@ -1128,6 +1126,24 @@ static int __tegra_xusb_enable_firmware_messages(struct 
tegra_xusb *tegra)
return err;
 }
 
+static irqreturn_t tegra_xusb_padctl_irq(int irq, void *data)
+{
+   struct tegra_xusb *tegra = data;
+
+   mutex_lock(>lock);
+
+   if (tegra->suspended) {
+   mutex_unlock(>lock);
+   return IRQ_HANDLED;
+   }
+
+   mutex_unlock(>lock);
+
+   pm_runtime_resume(tegra->dev);
+
+   return IRQ_HANDLED;
+}
+
 static int tegra_xusb_enable_firmware_messages(struct tegra_xusb *tegra)
 {
int err;
@@ -1251,6 +1267,52 @@ static void tegra_xhci_id_work(struct work_struct *work)
}
 }
 
+#if IS_ENABLED(CONFIG_PM) || IS_ENABLED(CONFIG_PM_SLEEP)
+static bool is_usb2_otg_phy(struct tegra_xusb *tegra, unsigned int index)
+{
+   return (tegra->usbphy[index] != NULL);
+}
+
+static bool is_usb3_otg_phy(struct tegra_xusb *tegra, unsigned int index)
+{
+   struct tegra_xusb_padctl *padctl = tegra->padctl;
+   unsigned int i;
+   int port;
+
+   for (i = 0; i < tegra->num_usb_phys; i++) {
+   if (is_usb2_otg_phy(tegra, i)) {
+   port = tegra_xusb_padctl_get_usb3_companion(padctl, i);
+   if ((port >= 0) && (index == (unsigned int)port))
+   return true;
+   }
+   }
+
+   return false;
+}
+
+static bool is_host_mode_phy(struct tegra_xusb *tegra, unsigned int phy_type, 
unsigned int index)
+{
+   if (strcmp(tegra->soc->phy_types[phy_type].name, "hsic") == 0)
+   return true;
+
+   if (strcmp(tegra->soc->phy_types[phy_type].name, "usb2") == 0) {
+   if (is_usb2_otg_phy(tegra, index))
+ 

[PATCH v7 10/14] phy: tegra: xusb: Add wake/sleepwalk for Tegra210

2021-01-19 Thread JC Kuo
This commit implements Tegra210 XUSB PADCTL wake and sleepwalk
routines. Sleepwalk logic is in PMC (always-on) hardware block.
PMC driver provides managed access to the sleepwalk registers
via regmap framework.

Signed-off-by: JC Kuo 
Acked-by: Thierry Reding 
---
v7:
   add 'Acked-by: Thierry Reding '
v6:
   no change
v5:
   no change
v4:
   move sleepwalk/wake stubs from 'struct tegra_xusb_padctl_ops' to
   'struct tegra_xusb_lane_ops'
   remove a blank line 
   rename 'pmc_dev' with 'pdev'
   remove 'struct device_node *np' 
   rename label 'no_pmc' with 'out'
   defer .probe() if PMC driver is yet to load 

v3:
   rename 'pmc_reg" with 'regmap' and move to the top of 'struct 
tegra210_xusb_padctl'
   change return data of .phy_remote_wake_detected() to 'bool'
   change input parameter of .phy_remote_wake_detected() to 'struct phy*'
   remove unnecessary 'else'
   rename 'val' with 'value'
   rename tegra_pmc_*() with tegra210_pmc_*()
   remove VBUS ON/OFF control change

 drivers/phy/tegra/xusb-tegra210.c | 930 ++
 1 file changed, 930 insertions(+)

diff --git a/drivers/phy/tegra/xusb-tegra210.c 
b/drivers/phy/tegra/xusb-tegra210.c
index b038d032fea1..8af73ba78ad7 100644
--- a/drivers/phy/tegra/xusb-tegra210.c
+++ b/drivers/phy/tegra/xusb-tegra210.c
@@ -16,6 +16,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 
@@ -52,6 +54,20 @@
 #define XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(x, v) (((v) & 0x7) << ((x) * 5))
 #define XUSB_PADCTL_SS_PORT_MAP_PORT_DISABLED 0x7
 
+#define XUSB_PADCTL_ELPG_PROGRAM_0 0x20
+#define   USB2_PORT_WAKE_INTERRUPT_ENABLE(x)  BIT((x))
+#define   USB2_PORT_WAKEUP_EVENT(x)   BIT((x) + 7)
+#define   SS_PORT_WAKE_INTERRUPT_ENABLE(x)BIT((x) + 14)
+#define   SS_PORT_WAKEUP_EVENT(x) BIT((x) + 21)
+#define   USB2_HSIC_PORT_WAKE_INTERRUPT_ENABLE(x) BIT((x) + 28)
+#define   USB2_HSIC_PORT_WAKEUP_EVENT(x)  BIT((x) + 30)
+#define   ALL_WAKE_EVENTS ( \
+   USB2_PORT_WAKEUP_EVENT(0) | USB2_PORT_WAKEUP_EVENT(1) | \
+   USB2_PORT_WAKEUP_EVENT(2) | USB2_PORT_WAKEUP_EVENT(3) | \
+   SS_PORT_WAKEUP_EVENT(0) | SS_PORT_WAKEUP_EVENT(1) | \
+   SS_PORT_WAKEUP_EVENT(2) | SS_PORT_WAKEUP_EVENT(3) | \
+   USB2_HSIC_PORT_WAKEUP_EVENT(0))
+
 #define XUSB_PADCTL_ELPG_PROGRAM1 0x024
 #define XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_VCORE_DOWN (1 << 31)
 #define XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN_EARLY (1 << 30)
@@ -90,6 +106,8 @@
 #define XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DR (1 << 2)
 #define XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_DISC_OVRD (1 << 1)
 #define XUSB_PADCTL_USB2_OTG_PAD_CTL1_PD_CHRP_OVRD (1 << 0)
+#define   RPD_CTRL(x)  (((x) & 0x1f) << 26)
+#define   RPD_CTRL_VALUE(x)(((x) >> 26) & 0x1f)
 
 #define XUSB_PADCTL_USB2_BIAS_PAD_CTL0 0x284
 #define XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD (1 << 11)
@@ -108,6 +126,8 @@
 #define XUSB_PADCTL_USB2_BIAS_PAD_CTL1_TRK_START_TIMER_SHIFT 12
 #define XUSB_PADCTL_USB2_BIAS_PAD_CTL1_TRK_START_TIMER_MASK 0x7f
 #define XUSB_PADCTL_USB2_BIAS_PAD_CTL1_TRK_START_TIMER_VAL 0x1e
+#define   TCTRL_VALUE(x)(((x) & 0x3f) >> 0)
+#define   PCTRL_VALUE(x)(((x) >> 6) & 0x3f)
 
 #define XUSB_PADCTL_HSIC_PADX_CTL0(x) (0x300 + (x) * 0x20)
 #define XUSB_PADCTL_HSIC_PAD_CTL0_RPU_STROBE (1 << 18)
@@ -251,16 +271,161 @@
 #define XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_FLOATING 8
 #define XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_GROUNDED 0
 
+/* USB2 SLEEPWALK registers */
+#define UTMIP(_port, _offset1, _offset2) \
+   (((_port) <= 2) ? (_offset1) : (_offset2))
+
+#define PMC_UTMIP_UHSIC_SLEEP_CFG(x)   UTMIP(x, 0x1fc, 0x4d0)
+#define   UTMIP_MASTER_ENABLE(x)   UTMIP(x, BIT(8 * (x)), BIT(0))
+#define   UTMIP_FSLS_USE_PMC(x)UTMIP(x, BIT(8 * (x) + 
1), \
+   BIT(1))
+#define   UTMIP_PCTRL_USE_PMC(x)   UTMIP(x, BIT(8 * (x) + 2), \
+   BIT(2))
+#define   UTMIP_TCTRL_USE_PMC(x)   UTMIP(x, BIT(8 * (x) + 3), \
+   BIT(3))
+#define   UTMIP_WAKE_VAL(_port, _value)(((_value) & 0xf) << \
+   (UTMIP(_port, 8 * (_port) + 4, 4)))
+#define   UTMIP_WAKE_VAL_NONE(_port)   UTMIP_WAKE_VAL(_port, 12)
+#define   UTMIP_WAKE_VAL_ANY(_port)UTMIP_WAKE_VAL(_port, 15)
+
+#define PMC_UTMIP_UHSIC_SLEEP_CFG1 (0x4d0)
+#define   UTMIP_RPU_SWITC_LOW_USE_PMC_PX(x)BIT((x) + 8)
+#define   UTMIP_RPD_CTRL_USE_PMC_PX(x) BIT((x) + 16)
+
+#define PMC_UTMIP_MASTER_CONFIG(0x274)
+#define   UTMIP_PWR(x) UTMIP(x, BIT(x), BIT(4))
+#define   UHSIC_PWR(x) BIT(3)
+
+#define PMC_USB_DEBOUNCE_DEL   (0xec)
+#define   DEBOUNCE_VAL(x)  

[PATCH v7 09/14] dt-bindings: phy: tegra-xusb: Add nvidia,pmc prop

2021-01-19 Thread JC Kuo
This commit describes the "nvidia,pmc" property for Tegra210 tegra-xusb
PHY driver. It is a phandle and specifier referring to the Tegra210
pmc@7000e400 node.

Signed-off-by: JC Kuo 
Acked-by: Rob Herring 
---
v7:
   no change
v6:
   no change
v5:
   replace "pmc@7000e400 node" -> with "PMC node"
v4:
   new change to document "nvidia,pmc" prop

 .../devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt  | 1 +
 1 file changed, 1 insertion(+)

diff --git 
a/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt 
b/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt
index 38c5fa21f435..b62397d2bb0c 100644
--- a/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt
+++ b/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt
@@ -54,6 +54,7 @@ For Tegra210:
 - avdd-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
 - dvdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.
 - hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 1.8 V.
+- nvidia,pmc: phandle and specifier referring to the Tegra210 PMC node.
 
 For Tegra186:
 - avdd-pll-erefeut-supply: UPHY brick and reference clock as well as UTMI PHY
-- 
2.25.1



[PATCH v7 08/14] arm64: tegra210: XUSB PADCTL add "nvidia,pmc" prop

2021-01-19 Thread JC Kuo
PMC driver provides USB sleepwalk registers access to XUSB PADCTL
driver. This commit adds a "nvidia,pmc" property which points to
PMC node to XUSB PADCTL device node.

Signed-off-by: JC Kuo 
---
v7:
   no change
v6:
   no change
v5:
   no change
v4:
   no change
v3:
   no change

 arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi 
b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 4fbf8c15b0a1..83f6d11c578b 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -1043,6 +1043,7 @@ padctl: padctl@7009f000 {
interrupts = ;
resets = <_car 142>;
reset-names = "padctl";
+   nvidia,pmc =  <_pmc>;
 
status = "disabled";
 
-- 
2.25.1



[PATCH v7 04/14] phy: tegra: xusb: Rearrange UPHY init on Tegra210

2021-01-19 Thread JC Kuo
This commit is a preparation for enabling XUSB SC7 support.
It rearranges Tegra210 XUSB PADCTL UPHY initialization sequence,
for the following reasons:

1. PLLE hardware power sequencer has to be enabled only after both
   PEX UPHY PLL and SATA UPHY PLL are initialized.
   tegra210_uphy_init() -> tegra210_pex_uphy_enable()
-> tegra210_sata_uphy_enable()
-> tegra210_plle_hw_sequence_start()
-> tegra210_aux_mux_lp0_clamp_disable()

2. At cold boot and SC7 exit, the following bits must be cleared after
   PEX/SATA lanes are out of IDDQ (IDDQ_DISABLE=1).
   a. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN,
   b. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN_EARLY
   c. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_VCORE_DOWN

   tegra210_pex_uphy_enable() and tegra210_sata_uphy_enable() are in
   charge of bringing lanes out of IDDQ, and then AUX_MUX_LP0_* bits
   will be cleared by tegra210_aux_mux_lp0_clamp_disable().

3. Once UPHY PLL hardware power sequencer is enabled, do not assert
   reset to PEX/SATA PLLs, otherwise UPHY PLL operation will be broken.

Signed-off-by: JC Kuo 
Acked-by: Thierry Reding 
---
v7:
   merge v5 [04/15] phy: tegra: xusb: tegra210: Do not reset UPHY PLL   
v6:
   no change
v5:
   no change
v4:
   no change
v3:
   make separate changes
   use "unsigned int" instead "int" type for PHY index
   add blank line for better readability

 drivers/phy/tegra/xusb-tegra210.c | 197 +++---
 drivers/phy/tegra/xusb.h  |   4 +-
 2 files changed, 103 insertions(+), 98 deletions(-)

diff --git a/drivers/phy/tegra/xusb-tegra210.c 
b/drivers/phy/tegra/xusb-tegra210.c
index 4dc9286ec1b8..faacb866cd1f 100644
--- a/drivers/phy/tegra/xusb-tegra210.c
+++ b/drivers/phy/tegra/xusb-tegra210.c
@@ -288,17 +288,19 @@ static int tegra210_pex_uphy_enable(struct 
tegra_xusb_padctl *padctl)
struct tegra_xusb_pcie_pad *pcie = to_pcie_pad(padctl->pcie);
unsigned long timeout;
u32 value;
+   unsigned int i;
int err;
 
-   if (pcie->enable > 0) {
-   pcie->enable++;
+   if (pcie->enable)
return 0;
-   }
 
err = clk_prepare_enable(pcie->pll);
if (err < 0)
return err;
 
+   if (tegra210_plle_hw_sequence_is_enabled())
+   goto skip_pll_init;
+
err = reset_control_deassert(pcie->rst);
if (err < 0)
goto disable;
@@ -481,7 +483,14 @@ static int tegra210_pex_uphy_enable(struct 
tegra_xusb_padctl *padctl)
 
tegra210_xusb_pll_hw_sequence_start();
 
-   pcie->enable++;
+skip_pll_init:
+   pcie->enable = true;
+
+   for (i = 0; i < padctl->pcie->soc->num_lanes; i++) {
+   value = padctl_readl(padctl, XUSB_PADCTL_USB3_PAD_MUX);
+   value |= XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE(i);
+   padctl_writel(padctl, value, XUSB_PADCTL_USB3_PAD_MUX);
+   }
 
return 0;
 
@@ -495,29 +504,44 @@ static int tegra210_pex_uphy_enable(struct 
tegra_xusb_padctl *padctl)
 static void tegra210_pex_uphy_disable(struct tegra_xusb_padctl *padctl)
 {
struct tegra_xusb_pcie_pad *pcie = to_pcie_pad(padctl->pcie);
+   u32 value;
+   unsigned int i;
 
-   if (WARN_ON(pcie->enable == 0))
+   if (WARN_ON(!pcie->enable))
return;
 
-   if (--pcie->enable > 0)
-   return;
+   pcie->enable = false;
+
+   for (i = 0; i < padctl->pcie->soc->num_lanes; i++) {
+   value = padctl_readl(padctl, XUSB_PADCTL_USB3_PAD_MUX);
+   value &= ~XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE(i);
+   padctl_writel(padctl, value, XUSB_PADCTL_USB3_PAD_MUX);
+   }
 
-   reset_control_assert(pcie->rst);
clk_disable_unprepare(pcie->pll);
 }
 
 /* must be called under padctl->lock */
-static int tegra210_sata_uphy_enable(struct tegra_xusb_padctl *padctl, bool 
usb)
+static int tegra210_sata_uphy_enable(struct tegra_xusb_padctl *padctl)
 {
struct tegra_xusb_sata_pad *sata = to_sata_pad(padctl->sata);
+   struct tegra_xusb_lane *lane = tegra_xusb_find_lane(padctl, "sata", 0);
unsigned long timeout;
u32 value;
+   unsigned int i;
int err;
+   bool usb;
 
-   if (sata->enable > 0) {
-   sata->enable++;
+   if (sata->enable)
+   return 0;
+
+   if (IS_ERR(lane))
return 0;
-   }
+
+   if (tegra210_plle_hw_sequence_is_enabled())
+   goto skip_pll_init;
+
+   usb = tegra_xusb_lane_check(lane, "usb3-ss");
 
err = clk_prepare_enable(sata->pll);
if (err < 0)
@@ -718,7 +742,14 @@ static int tegra210_sata_uphy_enable(struct 
tegra_xusb_padctl *padctl, bool usb)
 
tegra210_sata_pll_hw_sequence_start();
 
-   sata->enable++;
+skip_pll_init:
+   sata->enable = true;
+
+   for (i = 0; i < padctl->sata->soc->num_lanes; 

[PATCH v7 00/14] Tegra XHCI controller ELPG support

2021-01-19 Thread JC Kuo
Tegra XHCI controler can be placed in ELPG (Engine Level PowerGated)
state for power saving when all of the connected USB devices are in
suspended state. This patch series includes clk, phy and pmc changes
that are required for properly place controller in ELPG and bring
controller out of ELPG.

JC Kuo (14):
  clk: tegra: Add PLLE HW power sequencer control
  clk: tegra: Don't enable PLLE HW sequencer at init
  phy: tegra: xusb: Move usb3 port init for Tegra210
  phy: tegra: xusb: Rearrange UPHY init on Tegra210
  phy: tegra: xusb: Add Tegra210 lane_iddq operation
  phy: tegra: xusb: Add sleepwalk and suspend/resume
  soc/tegra: pmc: Provide USB sleepwalk register map
  arm64: tegra210: XUSB PADCTL add "nvidia,pmc" prop
  dt-bindings: phy: tegra-xusb: Add nvidia,pmc prop
  phy: tegra: xusb: Add wake/sleepwalk for Tegra210
  phy: tegra: xusb: Tegra210 host mode VBUS control
  phy: tegra: xusb: Add wake/sleepwalk for Tegra186
  usb: host: xhci-tegra: Unlink power domain devices
  xhci: tegra: Enable ELPG for runtime/system PM

 .../phy/nvidia,tegra124-xusb-padctl.txt   |1 +
 arch/arm64/boot/dts/nvidia/tegra210.dtsi  |1 +
 drivers/clk/tegra/clk-pll.c   |   12 -
 drivers/clk/tegra/clk-tegra210.c  |   53 +-
 drivers/phy/tegra/xusb-tegra186.c |  558 -
 drivers/phy/tegra/xusb-tegra210.c | 1889 +
 drivers/phy/tegra/xusb.c  |   92 +-
 drivers/phy/tegra/xusb.h  |   22 +-
 drivers/soc/tegra/pmc.c   |   94 +
 drivers/usb/host/xhci-tegra.c |  613 --
 include/linux/clk/tegra.h |4 +-
 include/linux/phy/tegra/xusb.h|   10 +-
 12 files changed, 2784 insertions(+), 565 deletions(-)

v5 "phy: tegra: xusb: tegra210: Do not reset UPHY PLL" is moved
into v6 "phy: tegra: xusb: Rearrange UPHY init on Tegra210"
-- 
2.25.1



[PATCH 1/2] powerpc/32s: Add missing call to kuep_lock on syscall entry

2021-01-19 Thread Christophe Leroy
Userspace Execution protection and fast syscall entry were implemented
independently from each other and were both merged in kernel 5.2,
leading to syscall entry missing userspace execution protection.

On syscall entry, execution of user space memory must be
locked in the same way as on exception entry.

Fixes: b86fb88855ea ("powerpc/32: implement fast entry for syscalls on non 
BOOKE")
Cc: sta...@vger.kernel.org
Signed-off-by: Christophe Leroy 
---
 arch/powerpc/kernel/entry_32.S | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 1c9b0ccc2172..9bc4e7dd0bee 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -356,6 +356,9 @@ trace_syscall_entry_irq_off:
 
.globl  transfer_to_syscall
 transfer_to_syscall:
+#ifdef CONFIG_PPC_BOOK3S_32
+   kuep_lock r11, r12
+#endif
 #ifdef CONFIG_TRACE_IRQFLAGS
andi.   r12,r9,MSR_EE
beq-trace_syscall_entry_irq_off
-- 
2.25.0



[PATCH v2] of: property: Add fw_devlink support for "gpio" and "gpios" binding

2021-01-19 Thread Saravana Kannan
To provide backward compatibility for boards that use deprecated DT
bindings, we need to add fw_devlink support for "gpio" and "gpios".

Cc: linux-tegra 
Cc: Linus Walleij 
Cc: Bartosz Golaszewski 
Cc: Greg Kroah-Hartman 
Cc: Geert Uytterhoeven 
Fixes: e590474768f1 ("driver core: Set fw_devlink=on by default")
Tested-by: Jon Hunter 
Signed-off-by: Saravana Kannan 
---
Greg/Rob,

I think it's better for this to go into driver-core-next because this
fixed fw_devlink=on change that's queued for 5.12-rcX.

-Saravana

 drivers/of/property.c | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/drivers/of/property.c b/drivers/of/property.c
index 5f9eed79a8aa..0b256ce9d7d5 100644
--- a/drivers/of/property.c
+++ b/drivers/of/property.c
@@ -1271,6 +1271,24 @@ static struct device_node *parse_iommu_maps(struct 
device_node *np,
return of_parse_phandle(np, prop_name, (index * 4) + 1);
 }
 
+static struct device_node *parse_gpio_compat(struct device_node *np,
+const char *prop_name, int index)
+{
+   struct of_phandle_args sup_args;
+
+   if (strcmp(prop_name, "gpio") && strcmp(prop_name, "gpios"))
+   return NULL;
+
+   if (of_find_property(np, "gpio-hog", NULL))
+   return NULL;
+
+   if (of_parse_phandle_with_args(np, prop_name, "#gpio-cells", index,
+  _args))
+   return NULL;
+
+   return sup_args.np;
+}
+
 static const struct supplier_bindings of_supplier_bindings[] = {
{ .parse_prop = parse_clocks, },
{ .parse_prop = parse_interconnects, },
@@ -1296,6 +1314,7 @@ static const struct supplier_bindings 
of_supplier_bindings[] = {
{ .parse_prop = parse_pinctrl6, },
{ .parse_prop = parse_pinctrl7, },
{ .parse_prop = parse_pinctrl8, },
+   { .parse_prop = parse_gpio_compat, },
{ .parse_prop = parse_regulators, },
{ .parse_prop = parse_gpio, },
{ .parse_prop = parse_gpios, },
-- 
2.30.0.284.gd98b1dd5eaa7-goog



[PATCH 2/2] powerpc/32s: Unroll kuep_lock and kuep_unlock macros

2021-01-19 Thread Christophe Leroy
Unroll the loops in kuep_lock and kuep_unlock.

Benchmarked on an mpc 8321 with a standard kernel having a
3M/1M user/kernel memory split, i.e. 12 segments for user.

Without KUEP, null_syscall benchmark is 220 cycles.
With KUEP, null_syscall benchmark is 439 cycles.

Once loops are unrolled, null_syscall benchmark is 366 cycles.
This is almost 17% reduction.

It is assumed that userspace covers at least 4 segments and
at most 14 segments.

The isync is removed, it saves 8 cycles. For kuep_unlock, the rfi
will do the synchronisation. For kuep_lock, we get a small window
during which exec is still possible, but is won't last more than a
few instructions.

Both macros are called two times so the size increase is in
the noise (approx 120 instructions).

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/include/asm/book3s/32/kup.h | 67 ++--
 1 file changed, 52 insertions(+), 15 deletions(-)

diff --git a/arch/powerpc/include/asm/book3s/32/kup.h 
b/arch/powerpc/include/asm/book3s/32/kup.h
index a0117a9d5b06..e800b515ac02 100644
--- a/arch/powerpc/include/asm/book3s/32/kup.h
+++ b/arch/powerpc/include/asm/book3s/32/kup.h
@@ -7,21 +7,61 @@
 
 #ifdef __ASSEMBLY__
 
-.macro kuep_update_sr  gpr1, gpr2  /* NEVER use r0 as gpr2 due to 
addis */
-101:   mtsrin  \gpr1, \gpr2
-   addi\gpr1, \gpr1, 0x111 /* next VSID */
-   rlwinm  \gpr1, \gpr1, 0, 0xf0ff /* clear VSID overflow */
-   addis   \gpr2, \gpr2, 0x1000/* address of next segment */
-   bdnz101b
-   isync
+.macro kuep_increment gpr1, gpr2
+   addi\gpr1, \gpr1, 0x222 /* Next second VSID */
+   addi\gpr2, \gpr2, 0x222 /* Next second VSID */
+   rlwinm  \gpr1, \gpr1, 0, 0xf0ff /* Clear VSID overflow */
+   rlwinm  \gpr2, \gpr2, 0, 0xf0ff /* Clear VSID overflow */
+.endm
+
+.macro kuep_update_sr gpr1, gpr2   /* NEVER use r0 as gpr1 or gpr2 
due to addi */
+   addi\gpr2, \gpr1, 0x111 /* Next VSID */
+   rlwinm  \gpr2, \gpr2, 0, 0xf0ff /* Clear VSID overflow */
+   mtsr0, \gpr1
+   mtsr1, \gpr2
+   kuep_increment \gpr1, \gpr2
+   mtsr2, \gpr1
+   mtsr3, \gpr2
+#if NUM_USER_SEGMENTS > 4
+   kuep_increment \gpr1, \gpr2
+   mtsr4, \gpr1
+#if NUM_USER_SEGMENTS > 5
+   mtsr5, \gpr2
+#if NUM_USER_SEGMENTS > 6
+   kuep_increment \gpr1, \gpr2
+   mtsr6, \gpr1
+#if NUM_USER_SEGMENTS > 7
+   mtsr7, \gpr2
+#if NUM_USER_SEGMENTS > 8
+   kuep_increment \gpr1, \gpr2
+   mtsr8, \gpr1
+#if NUM_USER_SEGMENTS > 9
+   mtsr9, \gpr2
+#if NUM_USER_SEGMENTS > 10
+   kuep_increment \gpr1, \gpr2
+   mtsr10, \gpr1
+#if NUM_USER_SEGMENTS > 11
+   mtsr11, \gpr2
+#if NUM_USER_SEGMENTS > 12
+   kuep_increment \gpr1, \gpr2
+   mtsr12, \gpr1
+#if NUM_USER_SEGMENTS > 13
+   mtsr13, \gpr2
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
 .endm
 
 .macro kuep_lock   gpr1, gpr2
 #ifdef CONFIG_PPC_KUEP
-   li  \gpr1, NUM_USER_SEGMENTS
-   li  \gpr2, 0
-   mtctr   \gpr1
-   mfsrin  \gpr1, \gpr2
+   mfsr\gpr1, 0
oris\gpr1, \gpr1, SR_NX@h   /* set Nx */
kuep_update_sr \gpr1, \gpr2
 #endif
@@ -29,10 +69,7 @@
 
 .macro kuep_unlock gpr1, gpr2
 #ifdef CONFIG_PPC_KUEP
-   li  \gpr1, NUM_USER_SEGMENTS
-   li  \gpr2, 0
-   mtctr   \gpr1
-   mfsrin  \gpr1, \gpr2
+   mfsr\gpr1, 0
rlwinm  \gpr1, \gpr1, 0, ~SR_NX /* Clear Nx */
kuep_update_sr \gpr1, \gpr2
 #endif
-- 
2.25.0



[PATCH v7 02/14] clk: tegra: Don't enable PLLE HW sequencer at init

2021-01-19 Thread JC Kuo
PLLE hardware power sequencer references PEX/SATA UPHY PLL hardware
power sequencers' output to enable/disable PLLE. PLLE hardware power
sequencer has to be enabled only after PEX/SATA UPHY PLL's sequencers
are enabled.

Signed-off-by: JC Kuo 
Acked-by: Thierry Reding 
---
v7:
   no change
v6:
   no change
v5:
   no change
v4:
   no change 
v3:
   no change

 drivers/clk/tegra/clk-pll.c | 12 
 1 file changed, 12 deletions(-)

diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index c5cc0a2dac6f..0193cebe8c5a 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -2515,18 +2515,6 @@ static int clk_plle_tegra210_enable(struct clk_hw *hw)
pll_writel(val, PLLE_SS_CTRL, pll);
udelay(1);
 
-   val = pll_readl_misc(pll);
-   val &= ~PLLE_MISC_IDDQ_SW_CTRL;
-   pll_writel_misc(val, pll);
-
-   val = pll_readl(pll->params->aux_reg, pll);
-   val |= (PLLE_AUX_USE_LOCKDET | PLLE_AUX_SS_SEQ_INCLUDE);
-   val &= ~(PLLE_AUX_ENABLE_SWCTL | PLLE_AUX_SS_SWCTL);
-   pll_writel(val, pll->params->aux_reg, pll);
-   udelay(1);
-   val |= PLLE_AUX_SEQ_ENABLE;
-   pll_writel(val, pll->params->aux_reg, pll);
-
 out:
if (pll->lock)
spin_unlock_irqrestore(pll->lock, flags);
-- 
2.25.1



[PATCH] scsi: qla2xxx: Assign boolean values to a bool variable

2021-01-19 Thread Jiapeng Zhong
Fix the following coccicheck warnings:

./drivers/scsi/qla2xxx/qla_isr.c:780:2-18: WARNING: Assignment
of 0/1 to bool variable.

Reported-by: Abaci Robot 
Signed-off-by: Jiapeng Zhong 
---
 drivers/scsi/qla2xxx/qla_isr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
index f9142db..77a7acd 100644
--- a/drivers/scsi/qla2xxx/qla_isr.c
+++ b/drivers/scsi/qla2xxx/qla_isr.c
@@ -761,7 +761,7 @@ static struct purex_item *qla27xx_copy_fpin_pkt(struct 
scsi_qla_host *vha,
 qla27xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
 {
struct qla_hw_data *ha = vha->hw;
-   bool reset_isp_needed = 0;
+   bool reset_isp_needed = false;
 
ql_log(ql_log_warn, vha, 0x02f0,
   "MPI Heartbeat stop. MPI reset is%s needed. "
@@ -777,7 +777,7 @@ static struct purex_item *qla27xx_copy_fpin_pkt(struct 
scsi_qla_host *vha,
 
if (ql2xfulldump_on_mpifail) {
ha->isp_ops->fw_dump(vha);
-   reset_isp_needed = 1;
+   reset_isp_needed = true;
}
 
ha->isp_ops->mpi_fw_dump(vha, 1);
-- 
1.8.3.1



[PATCH] pinctrl: qcom: spmi-gpio: Assign boolean values to a bool variable

2021-01-19 Thread Jiapeng Zhong
Fix the following coccicheck warnings:

./drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:340:3-15: WARNING:
Assignment of 0/1 to bool variable.

Reported-by: Abaci Robot 
Signed-off-by: Jiapeng Zhong 
---
 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c 
b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
index b5949f7..eb0b60c 100644
--- a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
+++ b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
@@ -331,13 +331,13 @@ static int pm8xxx_pin_config_set(struct pinctrl_dev 
*pctldev,
case PIN_CONFIG_BIAS_DISABLE:
pin->bias = PM8XXX_GPIO_BIAS_NP;
banks |= BIT(2);
-   pin->disable = 0;
+   pin->disable = false;
banks |= BIT(3);
break;
case PIN_CONFIG_BIAS_PULL_DOWN:
pin->bias = PM8XXX_GPIO_BIAS_PD;
banks |= BIT(2);
-   pin->disable = 0;
+   pin->disable = false;
banks |= BIT(3);
break;
case PM8XXX_QCOM_PULL_UP_STRENGTH:
@@ -350,11 +350,11 @@ static int pm8xxx_pin_config_set(struct pinctrl_dev 
*pctldev,
case PIN_CONFIG_BIAS_PULL_UP:
pin->bias = pin->pull_up_strength;
banks |= BIT(2);
-   pin->disable = 0;
+   pin->disable = false;
banks |= BIT(3);
break;
case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
-   pin->disable = 1;
+   pin->disable = true;
banks |= BIT(3);
break;
case PIN_CONFIG_INPUT_ENABLE:
-- 
1.8.3.1



[PATCH] swap: Check nrexceptional of swap cache before being freed

2021-01-19 Thread Huang Ying
To catch the error in updating the swap cache shadow entries or their count.

Signed-off-by: "Huang, Ying" 
Cc: Minchan Kim 
Cc: Joonsoo Kim ,
Cc: Johannes Weiner ,
Cc: Vlastimil Babka , Hugh Dickins ,
Cc: Mel Gorman ,
Cc: Michal Hocko ,
Cc: Dan Williams ,
Cc: Christoph Hellwig , Ilya Dryomov ,
---
 mm/swap_state.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/mm/swap_state.c b/mm/swap_state.c
index d0d417efeecc..240a4f97594a 100644
--- a/mm/swap_state.c
+++ b/mm/swap_state.c
@@ -703,7 +703,12 @@ int init_swap_address_space(unsigned int type, unsigned 
long nr_pages)
 
 void exit_swap_address_space(unsigned int type)
 {
-   kvfree(swapper_spaces[type]);
+   int i;
+   struct address_space *spaces = swapper_spaces[type];
+
+   for (i = 0; i < nr_swapper_spaces[type]; i++)
+   VM_BUG_ON(spaces[i].nrexceptional);
+   kvfree(spaces);
nr_swapper_spaces[type] = 0;
swapper_spaces[type] = NULL;
 }
-- 
2.29.2



[PATCH] rtlwifi: Assign boolean values to a bool variable

2021-01-19 Thread Jiapeng Zhong
Fix the following coccicheck warnings:

./drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c:
892:1-10: WARNING: Assignment of 0/1 to bool variable.

Reported-by: Abaci Robot 
Signed-off-by: Jiapeng Zhong 
---
 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c 
b/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c
index be4c0e6..c198222 100644
--- a/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c
+++ b/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c
@@ -873,7 +873,7 @@ static void halbtc_display_wifi_status(struct btc_coexist 
*btcoexist,
dc_mode = true; /*TODO*/
under_ips = rtlpriv->psc.inactive_pwrstate == ERFOFF ? 1 : 0;
under_lps = rtlpriv->psc.dot11_psmode == EACTIVE ? 0 : 1;
-   low_power = 0; /*TODO*/
+   low_power = false; /*TODO*/
seq_printf(m, "\n %-35s = %s%s%s%s",
   "Power Status",
   (dc_mode ? "DC mode" : "AC mode"),
-- 
1.8.3.1



linux-next: Signed-off-by missing for commit in the pci tree

2021-01-19 Thread Stephen Rothwell
Hi all,

Commit

  0ca2233eb71f ("PCI: Update ROM BAR even if disabled")

is missing a Signed-off-by from its authorand committer.

-- 
Cheers,
Stephen Rothwell


pgpbfSBRoSjiF.pgp
Description: OpenPGP digital signature


[PATCH] checkpatch: add warning for avoiding .L prefix symbols in assembly files

2021-01-19 Thread Aditya Srivastava
Local symbols prefixed with '.L' do not emit symbol table entries, as
they have special meaning for the assembler.

'.L' prefixed symbols can be used within a code region, but should be
avoided for denoting a range of code via 'SYM_*_START/END' annotations.

Add a new check to emit a warning on finding the usage of '.L' symbols
in '.S' files, if it lies within SYM_*_START/END annotation pair.

Suggested-by: Mark Brown 
Link: https://lore.kernel.org/lkml/20210112210154.gi4...@sirena.org.uk/
Signed-off-by: Aditya Srivastava 
---
 scripts/checkpatch.pl | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 7030c4d6d126..858b5def61e9 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -2501,6 +2501,9 @@ sub process {
 
my $checklicenseline = 1;
 
+   # record SYM_*_START/END annotation pair count, for AVOID_L_PREFIX
+   my $sym_start_block = 0;
+
sanitise_line_reset();
my $line;
foreach my $rawline (@rawlines) {
@@ -3590,6 +3593,25 @@ sub process {
}
}
 
+# check for .L prefix local symbols in .S files
+   if ($realfile =~ /\.S$/) {
+   if ($line =~ /SYM_.*_START/ ||
+   (defined $context_function && $context_function =~ 
/SYM_.*_START/)) {
+   $sym_start_block++;
+   }
+
+   if ($line=~ /\.L\S+/ && # line contains .L 
prefixed local symbol
+   $sym_start_block > 0) { # lies between 
SYM_*_START and SYM_*_END pair
+   WARN("AVOID_L_PREFIX",
+   "Avoid using '.L' prefixed local symbol 
names for denoting a range of code via 'SYM_*_START/END' annotations; see 
Documentation/asm-annotations.rst\n" . $herecurr);
+   }
+
+   if ($line =~ /SYM_.*_END/ ||
+   (defined $context_function && $context_function =~ 
/SYM_.*_END/)) {
+   $sym_start_block--;
+   }
+   }
+
 # check we are in a valid source file C or perl if not then ignore this hunk
next if ($realfile !~ /\.(h|c|pl|dtsi|dts)$/);
 
-- 
2.17.1



Re: [PATCH v8 2/4] KEYS: trusted: Introduce TEE based Trusted Keys

2021-01-19 Thread Sumit Garg
On Wed, 20 Jan 2021 at 07:01, Jarkko Sakkinen  wrote:
>
> On Tue, Jan 19, 2021 at 12:30:42PM +0200, Jarkko Sakkinen wrote:
> > On Fri, Jan 15, 2021 at 11:32:31AM +0530, Sumit Garg wrote:
> > > On Thu, 14 Jan 2021 at 07:35, Jarkko Sakkinen  wrote:
> > > >
> > > > On Wed, Jan 13, 2021 at 04:47:00PM +0530, Sumit Garg wrote:
> > > > > Hi Jarkko,
> > > > >
> > > > > On Mon, 11 Jan 2021 at 22:05, Jarkko Sakkinen  
> > > > > wrote:
> > > > > >
> > > > > > On Tue, Nov 03, 2020 at 09:31:44PM +0530, Sumit Garg wrote:
> > > > > > > Add support for TEE based trusted keys where TEE provides the 
> > > > > > > functionality
> > > > > > > to seal and unseal trusted keys using hardware unique key.
> > > > > > >
> > > > > > > Refer to Documentation/tee.txt for detailed information about TEE.
> > > > > > >
> > > > > > > Signed-off-by: Sumit Garg 
> > > > > >
> > > > > > I haven't yet got QEMU environment working with aarch64, this 
> > > > > > produces
> > > > > > just a blank screen:
> > > > > >
> > > > > > ./output/host/usr/bin/qemu-system-aarch64 -M virt -cpu cortex-a53 
> > > > > > -smp 1 -kernel output/images/Image -initrd 
> > > > > > output/images/rootfs.cpio -serial stdio
> > > > > >
> > > > > > My BuildRoot fork for TPM and keyring testing is located over here:
> > > > > >
> > > > > > https://git.kernel.org/pub/scm/linux/kernel/git/jarkko/buildroot-tpmdd.git/
> > > > > >
> > > > > > The "ARM version" is at this point in aarch64 branch. Over time I 
> > > > > > will
> > > > > > define tpmdd-x86_64 and tpmdd-aarch64 boards and everything will be 
> > > > > > then
> > > > > > in the master branch.
> > > > > >
> > > > > > To create identical images you just need to
> > > > > >
> > > > > > $ make tpmdd_defconfig && make
> > > > > >
> > > > > > Can you check if you see anything obviously wrong? I'm eager to 
> > > > > > test this
> > > > > > patch set, and in bigger picture I really need to have ready to run
> > > > > > aarch64 environment available.
> > > > >
> > > > > I would rather suggest you to follow steps listed here [1] as to test
> > > > > this feature on Qemu aarch64 we need to build firmwares such as TF-A,
> > > > > OP-TEE, UEFI etc. which are all integrated into OP-TEE Qemu build
> > > > > system [2]. And then it would be easier to migrate them to your
> > > > > buildroot environment as well.
> > > > >
> > > > > [1] 
> > > > > https://lists.trustedfirmware.org/pipermail/op-tee/2020-May/27.html
> > > > > [2] 
> > > > > https://optee.readthedocs.io/en/latest/building/devices/qemu.html#qemu-v8
> > > > >
> > > > > -Sumit
> > > >
> > > > Can you provide 'keyctl_change'? Otherwise, the steps are easy to 
> > > > follow.
> > > >
> > >
> > > $ cat keyctl_change
> > > diff --git a/common.mk b/common.mk
> > > index aeb7b41..663e528 100644
> > > --- a/common.mk
> > > +++ b/common.mk
> > > @@ -229,6 +229,7 @@ BR2_PACKAGE_OPTEE_TEST_SDK ?= 
> > > $(OPTEE_OS_TA_DEV_KIT_DIR)
> > >  BR2_PACKAGE_OPTEE_TEST_SITE ?= $(OPTEE_TEST_PATH)
> > >  BR2_PACKAGE_STRACE ?= y
> > >  BR2_TARGET_GENERIC_GETTY_PORT ?= $(if
> > > $(CFG_NW_CONSOLE_UART),ttyAMA$(CFG_NW_CONSOLE_UART),ttyAMA0)
> > > +BR2_PACKAGE_KEYUTILS := y
> > >
> > >  # All BR2_* variables from the makefile or the environment are appended 
> > > to
> > >  # ../out-br/extra.conf. All values are quoted "..." except y and n.
> > > diff --git a/kconfigs/qemu.conf b/kconfigs/qemu.conf
> > > index 368c18a..832ab74 100644
> > > --- a/kconfigs/qemu.conf
> > > +++ b/kconfigs/qemu.conf
> > > @@ -20,3 +20,5 @@ CONFIG_9P_FS=y
> > >  CONFIG_9P_FS_POSIX_ACL=y
> > >  CONFIG_HW_RANDOM=y
> > >  CONFIG_HW_RANDOM_VIRTIO=y
> > > +CONFIG_TRUSTED_KEYS=y
> > > +CONFIG_ENCRYPTED_KEYS=y
> > >
> > > > After I've successfully tested 2/4, I'd suggest that you roll out one 
> > > > more
> > > > version and CC the documentation patch to Elaine and Mini, and clearly
> > > > remark in the commit message that TEE is a standard, with a link to the
> > > > specification.
> > > >
> > >
> > > Sure, I will roll out the next version after your testing.
> >
> > Thanks, I'll try this at instant, and give my feedback.
>
> I bump into this:
>
> $ make run-only
> ln -sf /home/jarkko/devel/tpm/optee/build/../out-br/images/rootfs.cpio.gz 
> /home/jarkko/devel/tpm/optee/build/../out/bin/
> ln: failed to create symbolic link 
> '/home/jarkko/devel/tpm/optee/build/../out/bin/': No such file or directory
> make: *** [Makefile:194: run-only] Error 1
>

Could you check if the following directory tree is built after
executing the below command?

$ make -j`nproc`
CFG_IN_TREE_EARLY_TAS=trusted_keys/f04a0fe7-1f5d-4b9b-abf7-619b85b4ce8c

$ tree out/bin/
out/bin/
├── bl1.bin -> 
/home/sumit/build/optee/build/../trusted-firmware-a/build/qemu/release/bl1.bin
├── bl2.bin -> 
/home/sumit/build/optee/build/../trusted-firmware-a/build/qemu/release/bl2.bin
├── bl31.bin ->
/home/sumit/build/optee/build/../trusted-firmware-a/build/qemu/release/bl31.bin
├── bl32.bin ->

[PATCH] drivers/scsi/qla4xxx: use scnprintf() instead of snprintf()

2021-01-19 Thread Jiapeng Zhong
Fix the following coccicheck warning:

./drivers/scsi/qla4xxx/ql4_attr.c: WARNING: use scnprintf or
sprintf

The snprintf() function returns the number of characters which would
have been printed if there were enough space, but the scnprintf()
returns the number of characters which were actually printed.  If
the buffer is not large enough, then using snprintf() would result
in a read overflow and an information leak.

Reported-by: Abaci Robot
Signed-off-by: Jiapeng Zhong 
---
 drivers/scsi/qla4xxx/ql4_attr.c | 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/scsi/qla4xxx/ql4_attr.c b/drivers/scsi/qla4xxx/ql4_attr.c
index ec43528..1a16017 100644
--- a/drivers/scsi/qla4xxx/ql4_attr.c
+++ b/drivers/scsi/qla4xxx/ql4_attr.c
@@ -170,7 +170,7 @@ void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha)
char *buf)
 {
struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev));
-   return snprintf(buf, PAGE_SIZE, "%s\n", ha->serial_number);
+   return scnprintf(buf, PAGE_SIZE, "%s\n", ha->serial_number);
 }
 
 static ssize_t
@@ -178,7 +178,7 @@ void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha)
   char *buf)
 {
struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev));
-   return snprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->fw_info.iscsi_major,
+   return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->fw_info.iscsi_major,
ha->fw_info.iscsi_minor);
 }
 
@@ -187,7 +187,7 @@ void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha)
char *buf)
 {
struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev));
-   return snprintf(buf, PAGE_SIZE, "%d.%02d.%02d.%02d\n",
+   return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d.%02d\n",
ha->fw_info.bootload_major, ha->fw_info.bootload_minor,
ha->fw_info.bootload_patch, ha->fw_info.bootload_build);
 }
@@ -197,7 +197,7 @@ void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha)
  char *buf)
 {
struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev));
-   return snprintf(buf, PAGE_SIZE, "0x%08X\n", ha->board_id);
+   return scnprintf(buf, PAGE_SIZE, "0x%08X\n", ha->board_id);
 }
 
 static ssize_t
@@ -207,7 +207,7 @@ void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha)
struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev));
 
qla4xxx_get_firmware_state(ha);
-   return snprintf(buf, PAGE_SIZE, "0x%08X%8X\n", ha->firmware_state,
+   return scnprintf(buf, PAGE_SIZE, "0x%08X%8X\n", ha->firmware_state,
ha->addl_fw_state);
 }
 
@@ -220,7 +220,7 @@ void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha)
if (is_qla40XX(ha))
return -ENOSYS;
 
-   return snprintf(buf, PAGE_SIZE, "0x%04X\n", ha->phy_port_cnt);
+   return scnprintf(buf, PAGE_SIZE, "0x%04X\n", ha->phy_port_cnt);
 }
 
 static ssize_t
@@ -232,7 +232,7 @@ void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha)
if (is_qla40XX(ha))
return -ENOSYS;
 
-   return snprintf(buf, PAGE_SIZE, "0x%04X\n", ha->phy_port_num);
+   return scnprintf(buf, PAGE_SIZE, "0x%04X\n", ha->phy_port_num);
 }
 
 static ssize_t
@@ -244,7 +244,7 @@ void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha)
if (is_qla40XX(ha))
return -ENOSYS;
 
-   return snprintf(buf, PAGE_SIZE, "0x%04X\n", ha->iscsi_pci_func_cnt);
+   return scnprintf(buf, PAGE_SIZE, "0x%04X\n", ha->iscsi_pci_func_cnt);
 }
 
 static ssize_t
@@ -253,7 +253,7 @@ void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha)
 {
struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev));
 
-   return snprintf(buf, PAGE_SIZE, "%s\n", ha->model_name);
+   return scnprintf(buf, PAGE_SIZE, "%s\n", ha->model_name);
 }
 
 static ssize_t
@@ -261,7 +261,7 @@ void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha)
  char *buf)
 {
struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev));
-   return snprintf(buf, PAGE_SIZE, "%s %s\n", ha->fw_info.fw_build_date,
+   return scnprintf(buf, PAGE_SIZE, "%s %s\n", ha->fw_info.fw_build_date,
ha->fw_info.fw_build_time);
 }
 
@@ -309,7 +309,7 @@ void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha)
 {
struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev));
qla4xxx_about_firmware(ha);
-   return snprintf(buf, PAGE_SIZE, "%u.%u secs\n", ha->fw_uptime_secs,
+   return scnprintf(buf, PAGE_SIZE, "%u.%u secs\n", ha->fw_uptime_secs,
ha->fw_uptime_msecs);
 }
 
-- 
1.8.3.1



Re: [PATCH v6 1/2] dt-bindings: iio: accel: Add bmi088 accelerometer bindings

2021-01-19 Thread Mike Looijmans

Wow, fast response, thanks.

Updated my dtschema, fixed the match name as requested and v7 is ready 
to go. I'm awaiting feedback from the iio people so I can send a new 
patch set.


M.


Met vriendelijke groet / kind regards,

Mike Looijmans
System Expert


TOPIC Embedded Products B.V.
Materiaalweg 4, 5681 RJ Best
The Netherlands

T: +31 (0) 499 33 69 69
E: mike.looijm...@topicproducts.com
W: www.topicproducts.com

Please consider the environment before printing this e-mail
On 20-01-2021 02:31, Rob Herring wrote:

On Tue, Jan 19, 2021 at 01:46:21PM +0100, Mike Looijmans wrote:

This adds the device-tree bindings for the Bosch Sensortec BMI088 IMU,
the accelerometer part.

Signed-off-by: Mike Looijmans 

---

Changes in v6:
I't been almost a year since the last commit, sorry...
Fixed the yaml errors
Add interrupt, vdd and vddio properties

Changes in v5:
submit together with driver code as patch series

Changes in v2:
convert to yaml format

  .../bindings/iio/accel/bosch,bmi088.yaml  | 55 +++
  1 file changed, 55 insertions(+)
  create mode 100644 
Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml

diff --git a/Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml 
b/Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml
new file mode 100644
index ..459b9969fd12
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/accel/bosch,bmi088.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Bosch BMI088 IMU accelerometer part
+
+maintainers:
+  - Mike Looijmans 
+
+description: |
+  Acceleration part of the IMU sensor with an SPI interface
+  Specifications about the sensor can be found at:
+
https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bmi088-ds001.pdf
+
+properties:
+  compatible:
+enum:
+  - bosch,bmi088_accel

bosch,bmi088-accel


+
+  reg:
+maxItems: 1
+
+  vdd-supply: true
+
+  vddio-supply: true
+
+  interrupts:
+minItems: 1
+maxItems: 2
+description: |
+  Type should be either IRQ_TYPE_LEVEL_HIGH or IRQ_TYPE_LEVEL_LOW.
+  The first interrupt listed must be the one connected to the INT1 pin, the
+  second must be the one connected to the INT2 pin.
+
+required:
+  - compatible
+  - reg
+
+examples:
+  - |
+#include 
+spi {
+  #address-cells = <1>;
+  #size-cells = <0>;
+  bmi088_accel@1 {
+compatible = "bosch,bmi088_accel";
+reg = <1>;
+spi-max-frequency = <1000>;
+interrupt-parent = <>;
+interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
+  };
+};
+...
--
2.17.1



--
Mike Looijmans



Re: [PATCH v17 02/10] fs/ntfs3: Add initialization of super block

2021-01-19 Thread Kari Argillander
On Tue, Jan 19, 2021 at 06:03:06AM +0200, Kari Argillander wrote:
> On Thu, Dec 31, 2020 at 06:23:53PM +0300, Konstantin Komarov wrote:
> > diff --git a/fs/ntfs3/index.c b/fs/ntfs3/index.c

> > +struct ntfs_fnd *fnd_get(struct ntfs_index *indx)
> > +{
> > +   struct ntfs_fnd *fnd = ntfs_alloc(sizeof(struct ntfs_fnd), 1);
> > +
> > +   if (!fnd)
> > +   return NULL;
> > +
> > +   return fnd;
> > +}
> 
> This should be initilized. What about that indx. Is that neccasarry?
> Also no need to check NULL because if it is NULL we can just return it. 

Sorry about initilized part. Didn't notice it was kzalloc. Other parts
are still relevent.



[PATCH] drm/amdgpu: Assign boolean values to a bool variable

2021-01-19 Thread Jiapeng Zhong
Fix the following coccicheck warnings:

./drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c:
1009:6-16: WARNING: Assignment of 0/1 to bool variable.

./drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c:
200:2-10: WARNING: Assignment of 0/1 to bool variable.

Reported-by: Abaci Robot 
Signed-off-by: Jiapeng Zhong 
---
 .../display/dc/dml/dcn30/display_rq_dlg_calc_30.c  | 32 +++---
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c 
b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
index 5b5916b..0f14f20 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
@@ -165,8 +165,8 @@ static void handle_det_buf_split(struct display_mode_lib 
*mode_lib,
unsigned int swath_bytes_c = 0;
unsigned int full_swath_bytes_packed_l = 0;
unsigned int full_swath_bytes_packed_c = 0;
-   bool req128_l = 0;
-   bool req128_c = 0;
+   bool req128_l = false;
+   bool req128_c = false;
bool surf_linear = (pipe_src_param.sw_mode == dm_sw_linear);
bool surf_vert = (pipe_src_param.source_scan == dm_vert);
unsigned int log2_swath_height_l = 0;
@@ -191,37 +191,37 @@ static void handle_det_buf_split(struct display_mode_lib 
*mode_lib,
total_swath_bytes = 2 * full_swath_bytes_packed_l;
 
if (total_swath_bytes <= detile_buf_size_in_bytes) { //full 256b request
-   req128_l = 0;
-   req128_c = 0;
+   req128_l = false;
+   req128_c = false;
swath_bytes_l = full_swath_bytes_packed_l;
swath_bytes_c = full_swath_bytes_packed_c;
} else if (!rq_param->yuv420) {
-   req128_l = 1;
-   req128_c = 0;
+   req128_l = true;
+   req128_c = false;
swath_bytes_c = full_swath_bytes_packed_c;
swath_bytes_l = full_swath_bytes_packed_l / 2;
} else if ((double)full_swath_bytes_packed_l / 
(double)full_swath_bytes_packed_c < 1.5) {
-   req128_l = 0;
-   req128_c = 1;
+   req128_l = false;
+   req128_c = true;
swath_bytes_l = full_swath_bytes_packed_l;
swath_bytes_c = full_swath_bytes_packed_c / 2;
 
total_swath_bytes = 2 * swath_bytes_l + 2 * swath_bytes_c;
 
if (total_swath_bytes > detile_buf_size_in_bytes) {
-   req128_l = 1;
+   req128_l = true;
swath_bytes_l = full_swath_bytes_packed_l / 2;
}
} else {
-   req128_l = 1;
-   req128_c = 0;
+   req128_l = true;
+   req128_c = false;
swath_bytes_l = full_swath_bytes_packed_l/2;
swath_bytes_c = full_swath_bytes_packed_c;
 
total_swath_bytes = 2 * swath_bytes_l + 2 * swath_bytes_c;
 
if (total_swath_bytes > detile_buf_size_in_bytes) {
-   req128_c = 1;
+   req128_c = true;
swath_bytes_c = full_swath_bytes_packed_c/2;
}
}
@@ -1006,8 +1006,8 @@ static void dml_rq_dlg_get_dlg_params(struct 
display_mode_lib *mode_lib,
 
double min_dst_y_ttu_vblank = 0;
unsigned int dlg_vblank_start = 0;
-   bool dual_plane = 0;
-   bool mode_422 = 0;
+   bool dual_plane = false;
+   bool mode_422 = false;
unsigned int access_dir = 0;
unsigned int vp_height_l = 0;
unsigned int vp_width_l = 0;
@@ -1021,7 +1021,7 @@ static void dml_rq_dlg_get_dlg_params(struct 
display_mode_lib *mode_lib,
double hratio_c = 0;
double vratio_l = 0;
double vratio_c = 0;
-   bool scl_enable = 0;
+   bool scl_enable = false;
 
double line_time_in_us = 0;
//  double vinit_l;
@@ -1156,7 +1156,7 @@ static void dml_rq_dlg_get_dlg_params(struct 
display_mode_lib *mode_lib,
// Source
//   dcc_en   = src.dcc;
dual_plane = is_dual_plane((enum 
source_format_class)(src->source_format));
-   mode_422 = 0; // TODO
+   mode_422 = false; // TODO
access_dir = (src->source_scan == dm_vert); // vp access direction: 
horizontal or vertical accessed
vp_height_l = src->viewport_height;
vp_width_l = src->viewport_width;
-- 
1.8.3.1



[PATCH v2] hugetlbfs: remove meaningless variable avoid_reserve

2021-01-19 Thread Miaohe Lin
The variable avoid_reserve is meaningless because we never changed its
value and just passed it to alloc_huge_page(). So remove it to make code
more clear that in hugetlbfs_fallocate, we never avoid reserve when alloc
hugepage yet. Also add a comment offered by Mike Kravetz to explain this.

Reviewed-by: David Hildenbrand 
Signed-off-by: Miaohe Lin 
Cc: Mike Kravetz 
---
 fs/hugetlbfs/inode.c | 12 +---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/fs/hugetlbfs/inode.c b/fs/hugetlbfs/inode.c
index 4bbfd78a7ccb..14df2f73b8ef 100644
--- a/fs/hugetlbfs/inode.c
+++ b/fs/hugetlbfs/inode.c
@@ -680,7 +680,6 @@ static long hugetlbfs_fallocate(struct file *file, int 
mode, loff_t offset,
 */
struct page *page;
unsigned long addr;
-   int avoid_reserve = 0;
 
cond_resched();
 
@@ -716,8 +715,15 @@ static long hugetlbfs_fallocate(struct file *file, int 
mode, loff_t offset,
continue;
}
 
-   /* Allocate page and add to page cache */
-   page = alloc_huge_page(_vma, addr, avoid_reserve);
+   /*
+* Allocate page without setting the avoid_reserve argument.
+* There certainly are no reserves associated with the
+* pseudo_vma.  However, there could be shared mappings with
+* reserves for the file at the inode level.  If we fallocate
+* pages in these areas, we need to consume the reserves
+* to keep reservation accounting consistent.
+*/
+   page = alloc_huge_page(_vma, addr, 0);
hugetlb_drop_vma_policy(_vma);
if (IS_ERR(page)) {
mutex_unlock(_fault_mutex_table[hash]);
-- 
2.19.1



Re: [Patch v4 1/2] cgroup: svm: Add Encryption ID controller

2021-01-19 Thread Vipin Sharma
On Tue, Jan 19, 2021 at 10:51:24AM -0500, Tejun Heo wrote:
> Hello,
> 
> On Fri, Jan 15, 2021 at 08:32:19PM -0800, Vipin Sharma wrote:
> > SEV-ES has stronger memory encryption gurantees compared to SEV, apart
> > from encrypting the application memory it also encrypts register state
> > among other things. In a single host ASIDs can be distributed between
> > these two types by BIOS settings.
> > 
> > Currently, Google Cloud has Confidential VM machines offering using SEV.
> > ASIDs are not compatible between SEV and SEV-ES, so a VM running on SEV
> > cannot run on SEV-ES and vice versa
> > 
> > There are use cases for both types of VMs getting used in future.
> 
> Can you please elaborate? I skimmed through the amd manual and it seemed to
> say that SEV-ES ASIDs are superset of SEV but !SEV-ES ASIDs. What's the use
> case for mixing those two?

For example, customers can be given options for which kind of protection they
want to choose for their workloads based on factors like data protection
requirement, cost, speed, etc.

In terms of features SEV-ES is superset of SEV but that doesn't mean SEV
ASIDs are superset of SEV ASIDs. SEV ASIDs cannot be used for SEV-ES VMs
and similarly SEV-ES ASIDs cannot be used for SEV VMs. Once a system is
booted, based on the BIOS settings each type will have their own
capacity and that number cannot be changed until the next boot and BIOS
changes.

We are not mixing the two types of ASIDs, they are separate and used
separately.

> 
> > > > > > Other ID types can be easily added in the controller in the same 
> > > > > > way.
> > > > > 
> > > > > I'm not sure this is necessarily a good thing.
> > > > 
> > > > This is to just say that when Intel and PowerPC changes are ready it
> > > > won't be difficult for them to add their controller.
> > > 
> > > I'm not really enthused about having per-hardware-type control knobs. None
> > > of other controllers behave that way. Unless it can be abstracted into
> > > something common, I'm likely to object.
> > 
> > There was a discussion in Patch v1 and consensus was to have individual
> > files because it makes kernel implementation extremely simple.
> > 
> > https://lore.kernel.org/lkml/alpine.deb.2.23.453.2011131615510.333...@chino.kir.corp.google.com/#t
> 
> I'm very reluctant to ack vendor specific interfaces for a few reasons but
> most importantly because they usually indicate abstraction and/or the
> underlying feature not being sufficiently developed and they tend to become
> baggages after a while. So, here are my suggestions:

My first patch was only for SEV, but soon we got comments that this can
be abstracted and used by TDX and SEID for their use cases.

I see this patch as providing an abstraction for simple accounting of
resources used for creating secure execution contexts. Here, secure
execution is achieved through different means. SEID, TDX, and SEV
provide security using different features and capabilities. I am not
sure if we will reach a point where all three and other vendors will use
the same approach and technology for this purpose.

Instead of each one coming up with their own resource tracking for their
features, this patch is providing a common framework and cgroup for
tracking these resources.

> 
> * If there can be a shared abstraction which hopefully makes intuitive
>   sense, that'd be ideal. It doesn't have to be one knob but it shouldn't be
>   something arbitrary to specific vendors.

I think we should see these as features provided on a host. Tasks can
be executed securely on a host with the guarantees provided by the
specific feature (SEV, SEV-ES, TDX, SEID) used by the task.

I don't think each H/W vendor can agree to a common set of security
guarantees and approach.

> 
> * If we aren't there yet and vendor-specific interface is a must, attach
>   that part to an interface which is already vendor-aware.
Sorry, I don't understand this approach. Can you please give more
details about it?

Thanks
Vipin


[PATCH] net/bluetooth: Fix the follow coccicheck warnings

2021-01-19 Thread Jiapeng Zhong
./net/bluetooth/hci_debugfs.c: WARNING: sniff_min_interval_fops
should be defined with DEFINE_DEBUGFS_ATTRIBUTE

Signed-off-by: Jiapeng Zhong 
Reported-by: Abaci Robot
---
 net/bluetooth/hci_debugfs.c | 38 +++---
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/net/bluetooth/hci_debugfs.c b/net/bluetooth/hci_debugfs.c
index 4626e02..65cad9f 100644
--- a/net/bluetooth/hci_debugfs.c
+++ b/net/bluetooth/hci_debugfs.c
@@ -237,7 +237,7 @@ static int conn_info_min_age_get(void *data, u64 *val)
return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(conn_info_min_age_fops, conn_info_min_age_get,
+DEFINE_DEBUGFS_ATTRIBUTE(conn_info_min_age_fops, conn_info_min_age_get,
conn_info_min_age_set, "%llu\n");
 
 static int conn_info_max_age_set(void *data, u64 val)
@@ -265,7 +265,7 @@ static int conn_info_max_age_get(void *data, u64 *val)
return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(conn_info_max_age_fops, conn_info_max_age_get,
+DEFINE_DEBUGFS_ATTRIBUTE(conn_info_max_age_fops, conn_info_max_age_get,
conn_info_max_age_set, "%llu\n");
 
 static ssize_t use_debug_keys_read(struct file *file, char __user *user_buf,
@@ -419,7 +419,7 @@ static int voice_setting_get(void *data, u64 *val)
return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(voice_setting_fops, voice_setting_get,
+DEFINE_DEBUGFS_ATTRIBUTE(voice_setting_fops, voice_setting_get,
NULL, "0x%4.4llx\n");
 
 static ssize_t ssp_debug_mode_read(struct file *file, char __user *user_buf,
@@ -476,7 +476,7 @@ static int min_encrypt_key_size_get(void *data, u64 *val)
return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(min_encrypt_key_size_fops,
+DEFINE_DEBUGFS_ATTRIBUTE(min_encrypt_key_size_fops,
min_encrypt_key_size_get,
min_encrypt_key_size_set, "%llu\n");
 
@@ -491,7 +491,7 @@ static int auto_accept_delay_get(void *data, u64 *val)
return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(auto_accept_delay_fops, auto_accept_delay_get,
+DEFINE_DEBUGFS_ATTRIBUTE(auto_accept_delay_fops, auto_accept_delay_get,
auto_accept_delay_set, "%llu\n");
 
 static ssize_t force_bredr_smp_read(struct file *file,
@@ -558,7 +558,7 @@ static int idle_timeout_get(void *data, u64 *val)
return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(idle_timeout_fops, idle_timeout_get,
+DEFINE_DEBUGFS_ATTRIBUTE(idle_timeout_fops, idle_timeout_get,
idle_timeout_set, "%llu\n");
 
 static int sniff_min_interval_set(void *data, u64 val)
@@ -586,7 +586,7 @@ static int sniff_min_interval_get(void *data, u64 *val)
return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(sniff_min_interval_fops, sniff_min_interval_get,
+DEFINE_DEBUGFS_ATTRIBUTE(sniff_min_interval_fops, sniff_min_interval_get,
sniff_min_interval_set, "%llu\n");
 
 static int sniff_max_interval_set(void *data, u64 val)
@@ -614,7 +614,7 @@ static int sniff_max_interval_get(void *data, u64 *val)
return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(sniff_max_interval_fops, sniff_max_interval_get,
+DEFINE_DEBUGFS_ATTRIBUTE(sniff_max_interval_fops, sniff_max_interval_get,
sniff_max_interval_set, "%llu\n");
 
 void hci_debugfs_create_bredr(struct hci_dev *hdev)
@@ -706,7 +706,7 @@ static int rpa_timeout_get(void *data, u64 *val)
return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(rpa_timeout_fops, rpa_timeout_get,
+DEFINE_DEBUGFS_ATTRIBUTE(rpa_timeout_fops, rpa_timeout_get,
rpa_timeout_set, "%llu\n");
 
 static int random_address_show(struct seq_file *f, void *p)
@@ -869,7 +869,7 @@ static int conn_min_interval_get(void *data, u64 *val)
return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(conn_min_interval_fops, conn_min_interval_get,
+DEFINE_DEBUGFS_ATTRIBUTE(conn_min_interval_fops, conn_min_interval_get,
conn_min_interval_set, "%llu\n");
 
 static int conn_max_interval_set(void *data, u64 val)
@@ -897,7 +897,7 @@ static int conn_max_interval_get(void *data, u64 *val)
return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(conn_max_interval_fops, conn_max_interval_get,
+DEFINE_DEBUGFS_ATTRIBUTE(conn_max_interval_fops, conn_max_interval_get,
conn_max_interval_set, "%llu\n");
 
 static int conn_latency_set(void *data, u64 val)
@@ -925,7 +925,7 @@ static int conn_latency_get(void *data, u64 *val)
return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(conn_latency_fops, conn_latency_get,
+DEFINE_DEBUGFS_ATTRIBUTE(conn_latency_fops, conn_latency_get,
conn_latency_set, "%llu\n");
 
 static int supervision_timeout_set(void *data, u64 val)
@@ -953,7 +953,7 @@ static int supervision_timeout_get(void *data, u64 *val)
return 0;
 }
 
-DEFINE_SIMPLE_ATTRIBUTE(supervision_timeout_fops, supervision_timeout_get,
+DEFINE_DEBUGFS_ATTRIBUTE(supervision_timeout_fops, supervision_timeout_get,
supervision_timeout_set, "%llu\n");
 
 static int 

[PATCH V5 4/5] kbuild: Add support to build overlays (%.dtbo)

2021-01-19 Thread Viresh Kumar
Add support for building DT overlays (%.dtbo). The overlay's source file
will have the usual extension, i.e. .dts, though the blob will have
.dtbo extension to distinguish it from normal blobs.

Signed-off-by: Viresh Kumar 
---
 .gitignore   | 3 +--
 Makefile | 4 ++--
 scripts/Makefile.dtbinst | 3 +++
 scripts/Makefile.lib | 4 +++-
 4 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/.gitignore b/.gitignore
index d01cda8e1177..0458c36f3cb2 100644
--- a/.gitignore
+++ b/.gitignore
@@ -17,8 +17,7 @@
 *.bz2
 *.c.[012]*.*
 *.dt.yaml
-*.dtb
-*.dtb.S
+*.dtb*
 *.dwo
 *.elf
 *.gcno
diff --git a/Makefile b/Makefile
index 9e73f82e0d86..b84f5e0b46ab 100644
--- a/Makefile
+++ b/Makefile
@@ -1334,7 +1334,7 @@ endif
 
 ifneq ($(dtstree),)
 
-%.dtb: include/config/kernel.release scripts_dtc
+%.dtb %.dtbo: include/config/kernel.release scripts_dtc
$(Q)$(MAKE) $(build)=$(dtstree) $(dtstree)/$@
 
 PHONY += dtbs dtbs_install dtbs_check
@@ -1816,7 +1816,7 @@ clean: $(clean-dirs)
@find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \
\( -name '*.[aios]' -o -name '*.ko' -o -name '.*.cmd' \
-o -name '*.ko.*' \
-   -o -name '*.dtb' -o -name '*.dtb.S' -o -name '*.dt.yaml' \
+   -o -name '*.dtb' -o -name '*.dtbo' -o -name '*.dtb.S' -o -name 
'*.dt.yaml' \
-o -name '*.dwo' -o -name '*.lst' \
-o -name '*.su' -o -name '*.mod' \
-o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
diff --git a/scripts/Makefile.dtbinst b/scripts/Makefile.dtbinst
index 50d580d77ae9..ba01f5ba2517 100644
--- a/scripts/Makefile.dtbinst
+++ b/scripts/Makefile.dtbinst
@@ -29,6 +29,9 @@ quiet_cmd_dtb_install = INSTALL $@
 $(dst)/%.dtb: $(obj)/%.dtb
$(call cmd,dtb_install)
 
+$(dst)/%.dtbo: $(obj)/%.dtbo
+   $(call cmd,dtb_install)
+
 PHONY += $(subdirs)
 $(subdirs):
$(Q)$(MAKE) $(dtbinst)=$@ dst=$(patsubst $(obj)/%,$(dst)/%,$@)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 213677a5ed33..30bc0a8e0087 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -86,7 +86,9 @@ extra-$(CONFIG_OF_ALL_DTBS)   += $(dtb-)
 
 ifneq ($(CHECK_DTBS),)
 extra-y += $(patsubst %.dtb,%.dt.yaml, $(dtb-y))
+extra-y += $(patsubst %.dtbo,%.dt.yaml, $(dtb-y))
 extra-$(CONFIG_OF_ALL_DTBS) += $(patsubst %.dtb,%.dt.yaml, $(dtb-))
+extra-$(CONFIG_OF_ALL_DTBS) += $(patsubst %.dtbo,%.dt.yaml, $(dtb-))
 endif
 
 # Add subdir path
@@ -324,7 +326,7 @@ cmd_dtc = $(HOSTCC) -E $(dtc_cpp_flags) -x 
assembler-with-cpp -o $(dtc-tmp) $< ;
-d $(depfile).dtc.tmp $(dtc-tmp) ; \
cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
 
-$(obj)/%.dtb: $(src)/%.dts $(DTC) FORCE
+$(obj)/%.dtb $(obj)/%.dtbo: $(src)/%.dts $(DTC) FORCE
$(call if_changed_dep,dtc)
 
 DT_CHECKER ?= dt-validate
-- 
2.25.0.rc1.19.g042ed3e048af



[PATCH V5 5/5] of: unittest: Statically apply overlays using fdtoverlay

2021-01-19 Thread Viresh Kumar
Now that fdtoverlay is part of the kernel build, start using it to test
the unitest overlays we have by applying them statically.

Some unittest overlays deliberately contain errors that unittest checks
for. These overlays will cause fdtoverlay to fail, and are thus not
included in the static_test.dtb.

Signed-off-by: Viresh Kumar 
---
 drivers/of/unittest-data/Makefile | 50 +++
 1 file changed, 50 insertions(+)

diff --git a/drivers/of/unittest-data/Makefile 
b/drivers/of/unittest-data/Makefile
index 009f4045c8e4..ece7dfd5cafa 100644
--- a/drivers/of/unittest-data/Makefile
+++ b/drivers/of/unittest-data/Makefile
@@ -38,3 +38,53 @@ DTC_FLAGS_testcases += -@
 
 # suppress warnings about intentional errors
 DTC_FLAGS_testcases += -Wno-interrupts_property
+
+# Apply overlays statically with fdtoverlay.  This is a build time test that
+# the overlays can be applied successfully by fdtoverlay.  This does not
+# guarantee that the overlays can be applied successfully at run time by
+# unittest, but it provides a bit of build time test coverage for those
+# who do not execute unittest.
+#
+# The overlays are applied on top of testcases.dtb to create static_test.dtb
+# If fdtoverlay detects an error than the kernel build will fail.
+# static_test.dtb is not consumed by unittest.
+#
+# Some unittest overlays deliberately contain errors that unittest checks for.
+# These overlays will cause fdtoverlay to fail, and are thus not included
+# in the static test:
+#  overlay.dtb \
+#  overlay_bad_add_dup_node.dtb \
+#  overlay_bad_add_dup_prop.dtb \
+#  overlay_bad_phandle.dtb \
+#  overlay_bad_symbol.dtb \
+#  overlay_base.dtb \
+
+apply_static_overlay := overlay_0.dtb \
+   overlay_1.dtb \
+   overlay_2.dtb \
+   overlay_3.dtb \
+   overlay_4.dtb \
+   overlay_5.dtb \
+   overlay_6.dtb \
+   overlay_7.dtb \
+   overlay_8.dtb \
+   overlay_9.dtb \
+   overlay_10.dtb \
+   overlay_11.dtb \
+   overlay_12.dtb \
+   overlay_13.dtb \
+   overlay_15.dtb \
+   overlay_gpio_01.dtb \
+   overlay_gpio_02a.dtb \
+   overlay_gpio_02b.dtb \
+   overlay_gpio_03.dtb \
+   overlay_gpio_04a.dtb \
+   overlay_gpio_04b.dtb
+
+quiet_cmd_fdtoverlay = FDTOVERLAY $@
+  cmd_fdtoverlay = $(objtree)/scripts/dtc/fdtoverlay -o $@ -i $^
+
+$(obj)/static_test.dtb: $(obj)/testcases.dtb $(addprefix 
$(obj)/,$(apply_static_overlay))
+   $(call if_changed,fdtoverlay)
+
+always-$(CONFIG_OF_OVERLAY) += static_test.dtb
-- 
2.25.0.rc1.19.g042ed3e048af



[PATCH V5 2/5] scripts: dtc: Build fdtoverlay tool

2021-01-19 Thread Viresh Kumar
We will start building overlays for platforms soon in the kernel and
would need fdtoverlay going forward. Lets start building it.

The fdtoverlay program applies (or merges) one or more overlay dtb
blobs to a base dtb blob. The kernel build system would later use
fdtoverlay to generate the overlaid blobs based on platform specific
configurations.

Signed-off-by: Viresh Kumar 
---
 scripts/dtc/Makefile | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile
index 4852bf44e913..5f19386a49eb 100644
--- a/scripts/dtc/Makefile
+++ b/scripts/dtc/Makefile
@@ -1,13 +1,17 @@
 # SPDX-License-Identifier: GPL-2.0
 # scripts/dtc makefile
 
-hostprogs-always-$(CONFIG_DTC) += dtc
+hostprogs-always-$(CONFIG_DTC) += dtc fdtoverlay
 hostprogs-always-$(CHECK_DT_BINDING)   += dtc
 
 dtc-objs   := dtc.o flattree.o fstree.o data.o livetree.o treesource.o \
   srcpos.o checks.o util.o
 dtc-objs   += dtc-lexer.lex.o dtc-parser.tab.o
 
+libfdt-objs:= fdt.o fdt_ro.o fdt_wip.o fdt_sw.o fdt_rw.o fdt_strerror.o 
fdt_empty_tree.o fdt_addresses.o fdt_overlay.o
+libfdt = $(addprefix libfdt/,$(libfdt-objs))
+fdtoverlay-objs:= $(libfdt) fdtoverlay.o util.o
+
 # Source files need to get at the userspace version of libfdt_env.h to compile
 HOST_EXTRACFLAGS += -I $(srctree)/$(src)/libfdt
 
-- 
2.25.0.rc1.19.g042ed3e048af



[PATCH V5 3/5] scripts: dtc: Remove the unused fdtdump.c file

2021-01-19 Thread Viresh Kumar
This was copied from external DTC repository long back and isn't used
anymore. Over that the dtc tool can be used to generate the dts source
back from the dtb. Remove the unused fdtdump.c file.

Signed-off-by: Viresh Kumar 
---
 scripts/dtc/fdtdump.c | 163 --
 1 file changed, 163 deletions(-)
 delete mode 100644 scripts/dtc/fdtdump.c

diff --git a/scripts/dtc/fdtdump.c b/scripts/dtc/fdtdump.c
deleted file mode 100644
index 7d460a50b513..
--- a/scripts/dtc/fdtdump.c
+++ /dev/null
@@ -1,163 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * fdtdump.c - Contributed by Pantelis Antoniou 
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-
-#include "util.h"
-
-#define ALIGN(x, a)(((x) + ((a) - 1)) & ~((a) - 1))
-#define PALIGN(p, a)   ((void *)(ALIGN((unsigned long)(p), (a
-#define GET_CELL(p)(p += 4, *((const uint32_t *)(p-4)))
-
-static void print_data(const char *data, int len)
-{
-   int i;
-   const char *p = data;
-
-   /* no data, don't print */
-   if (len == 0)
-   return;
-
-   if (util_is_printable_string(data, len)) {
-   printf(" = \"%s\"", (const char *)data);
-   } else if ((len % 4) == 0) {
-   printf(" = <");
-   for (i = 0; i < len; i += 4)
-   printf("0x%08x%s", fdt32_to_cpu(GET_CELL(p)),
-  i < (len - 4) ? " " : "");
-   printf(">");
-   } else {
-   printf(" = [");
-   for (i = 0; i < len; i++)
-   printf("%02x%s", *p++, i < len - 1 ? " " : "");
-   printf("]");
-   }
-}
-
-static void dump_blob(void *blob)
-{
-   struct fdt_header *bph = blob;
-   uint32_t off_mem_rsvmap = fdt32_to_cpu(bph->off_mem_rsvmap);
-   uint32_t off_dt = fdt32_to_cpu(bph->off_dt_struct);
-   uint32_t off_str = fdt32_to_cpu(bph->off_dt_strings);
-   struct fdt_reserve_entry *p_rsvmap =
-   (struct fdt_reserve_entry *)((char *)blob + off_mem_rsvmap);
-   const char *p_struct = (const char *)blob + off_dt;
-   const char *p_strings = (const char *)blob + off_str;
-   uint32_t version = fdt32_to_cpu(bph->version);
-   uint32_t totalsize = fdt32_to_cpu(bph->totalsize);
-   uint32_t tag;
-   const char *p, *s, *t;
-   int depth, sz, shift;
-   int i;
-   uint64_t addr, size;
-
-   depth = 0;
-   shift = 4;
-
-   printf("/dts-v1/;\n");
-   printf("// magic:\t\t0x%x\n", fdt32_to_cpu(bph->magic));
-   printf("// totalsize:\t\t0x%x (%d)\n", totalsize, totalsize);
-   printf("// off_dt_struct:\t0x%x\n", off_dt);
-   printf("// off_dt_strings:\t0x%x\n", off_str);
-   printf("// off_mem_rsvmap:\t0x%x\n", off_mem_rsvmap);
-   printf("// version:\t\t%d\n", version);
-   printf("// last_comp_version:\t%d\n",
-  fdt32_to_cpu(bph->last_comp_version));
-   if (version >= 2)
-   printf("// boot_cpuid_phys:\t0x%x\n",
-  fdt32_to_cpu(bph->boot_cpuid_phys));
-
-   if (version >= 3)
-   printf("// size_dt_strings:\t0x%x\n",
-  fdt32_to_cpu(bph->size_dt_strings));
-   if (version >= 17)
-   printf("// size_dt_struct:\t0x%x\n",
-  fdt32_to_cpu(bph->size_dt_struct));
-   printf("\n");
-
-   for (i = 0; ; i++) {
-   addr = fdt64_to_cpu(p_rsvmap[i].address);
-   size = fdt64_to_cpu(p_rsvmap[i].size);
-   if (addr == 0 && size == 0)
-   break;
-
-   printf("/memreserve/ %llx %llx;\n",
-  (unsigned long long)addr, (unsigned long long)size);
-   }
-
-   p = p_struct;
-   while ((tag = fdt32_to_cpu(GET_CELL(p))) != FDT_END) {
-
-   /* printf("tag: 0x%08x (%d)\n", tag, p - p_struct); */
-
-   if (tag == FDT_BEGIN_NODE) {
-   s = p;
-   p = PALIGN(p + strlen(s) + 1, 4);
-
-   if (*s == '\0')
-   s = "/";
-
-   printf("%*s%s {\n", depth * shift, "", s);
-
-   depth++;
-   continue;
-   }
-
-   if (tag == FDT_END_NODE) {
-   depth--;
-
-   printf("%*s};\n", depth * shift, "");
-   continue;
-   }
-
-   if (tag == FDT_NOP) {
-   printf("%*s// [NOP]\n", depth * shift, "");
-   continue;
-   }
-
-   if (tag != FDT_PROP) {
-   fprintf(stderr, "%*s ** Unknown tag 0x%08x\n", depth * 
shift, "", tag);
-   break;
-   }
-   sz = fdt32_to_cpu(GET_CELL(p));
-   s = p_strings + fdt32_to_cpu(GET_CELL(p));
-   if 

Re: [PATCH v5 06/27] dt-bindings: mediatek: Add binding for mt8192 IOMMU

2021-01-19 Thread Yong Wu
On Wed, 2021-01-20 at 13:15 +0900, Tomasz Figa wrote:
> On Wed, Jan 13, 2021 at 3:45 PM Yong Wu  wrote:
> >
> > On Wed, 2021-01-13 at 14:30 +0900, Tomasz Figa wrote:
> > > On Thu, Dec 24, 2020 at 8:35 PM Yong Wu  wrote:
> > > >
> > > > On Wed, 2020-12-23 at 17:18 +0900, Tomasz Figa wrote:
> > > > > On Wed, Dec 09, 2020 at 04:00:41PM +0800, Yong Wu wrote:
> > > > > > This patch adds decriptions for mt8192 IOMMU and SMI.
> > > > > >
> > > > > > mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor 
> > > > > > translation
> > > > > > table format. The M4U-SMI HW diagram is as below:
> > > > > >
> > > > > >   EMI
> > > > > >|
> > > > > >   M4U
> > > > > >|
> > > > > >   
> > > > > >SMI Common
> > > > > >   
> > > > > >|
> > > > > >   +---+--+--+--+---+
> > > > > >   |   |  |  |   .. |   |
> > > > > >   |   |  |  |  |   |
> > > > > > larb0   larb1  larb2  larb4 ..  larb19   larb20
> > > > > > disp0   disp1   mdpvdec   IPE  IPE
> > > > > >
> > > > > > All the connections are HW fixed, SW can NOT adjust it.
> > > > > >
> > > > > > mt8192 M4U support 0~16GB iova range. we preassign different engines
> > > > > > into different iova ranges:
> > > > > >
> > > > > > domain-id  module iova-range  larbs
> > > > > >0   disp0 ~ 4G  larb0/1
> > > > > >1   vcodec  4G ~ 8G larb4/5/7
> > > > > >2   cam/mdp 8G ~ 12G 
> > > > > > larb2/9/11/13/14/16/17/18/19/20
> > > > >
> > > > > Why do we preassign these addresses in DT? Shouldn't it be a user's or
> > > > > integrator's decision to split the 16 GB address range into sub-ranges
> > > > > and define which larbs those sub-ranges are shared with?
> > > >
> > > > The problem is that we can't split the 16GB range with the larb as unit.
> > > > The example is the below ccu0(larb13 port9/10) is a independent
> > > > range(domain), the others ports in larb13 is in another domain.
> > > >
> > > > disp/vcodec/cam/mdp don't have special iova requirement, they could
> > > > access any range. vcodec also can locate 8G~12G. it don't care about
> > > > where its iova locate. here I preassign like this following with our
> > > > internal project setting.
> > >
> > > Let me try to understand this a bit more. Given the split you're
> > > proposing, is there actually any isolation enforced between particular
> > > domains? For example, if I program vcodec to with a DMA address from
> > > the 0-4G range, would the IOMMU actually generate a fault, even if
> > > disp had some memory mapped at that address?
> >
> > In this case. we will get fault in current SW setting.
> >
> 
> Okay, thanks.
> 
> > >
> > > >
> > > > Why set this in DT?, this is only for simplifying the code. Assume we
> > > > put it in the platform data. We have up to 32 larbs, each larb has up to
> > > > 32 ports, each port may be in different iommu domains. we should have a
> > > > big array for this..however we only use a macro to get the domain in the
> > > > DT method.
> > > >
> > > > When replying this mail, I happen to see there is a "dev->dev_range_map"
> > > > which has "dma-range" information, I think I could use this value to get
> > > > which domain the device belong to. then no need put domid in DT. I will
> > > > test this.
> > >
> > > My feeling is that the only part that needs to be enforced statically
> > > is the reserved IOVA range for CCUs. The other ranges should be
> > > determined dynamically, although I think I need to understand better
> > > how the hardware and your proposed design work to tell what would be
> > > likely the best choice here.
> >
> > I have removed the domid patch in v6. and get the domain id in [27/33]
> > in v6..
> >
> > About the other ranges should be dynamical, the commit message [30/33]
> > of v6 should be helpful. the problem is that we have a bank_sel setting
> > for the iova[32:33]. currently we preassign this value. thus, all the
> > ranges are fixed. If you adjust this setting, you can let vcodec access
> > 0~4G.
> 
> Okay, so it sounds like we effectively have four 4G address spaces and
> we can assign the master devices to them. I guess each of these
> address spaces makes for an IOMMU group.

Yes. Each a address spaces is an IOMMU group.

> 
> It's fine to pre-assign the devices to those groups for now, but it
> definitely shouldn't be hardcoded in DT, because it depends on the use
> case of the device. I'll take a look at v6, but it sounds like it
> should be fine if it doesn't take the address space assignment from DT
> anymore.

Thanks very much for your review.

> 
> >
> > Currently we have no 

[PATCH V5 1/5] scripts: dtc: Fetch fdtoverlay.c from external DTC project

2021-01-19 Thread Viresh Kumar
We will start building overlays for platforms soon in the kernel and
would need fdtoverlay tool going forward. Lets start fetching it.

Signed-off-by: Viresh Kumar 
---
 scripts/dtc/update-dtc-source.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/scripts/dtc/update-dtc-source.sh b/scripts/dtc/update-dtc-source.sh
index bc704e2a6a4a..32ff17ffd089 100755
--- a/scripts/dtc/update-dtc-source.sh
+++ b/scripts/dtc/update-dtc-source.sh
@@ -37,6 +37,7 @@ DTC_SOURCE="checks.c data.c dtc.c dtc.h flattree.c fstree.c 
livetree.c srcpos.c
 LIBFDT_SOURCE="fdt.c fdt.h fdt_addresses.c fdt_empty_tree.c \
fdt_overlay.c fdt_ro.c fdt_rw.c fdt_strerror.c fdt_sw.c \
fdt_wip.c libfdt.h libfdt_env.h libfdt_internal.h"
+FDTOVERLAY_SOURCE=fdtoverlay.c
 
 get_last_dtc_version() {
git log --oneline scripts/dtc/ | grep 'upstream' | head -1 | sed -e 
's/^.* \(.*\)/\1/'
@@ -54,7 +55,7 @@ dtc_log=$(git log --oneline ${last_dtc_ver}..)
 
 # Copy the files into the Linux tree
 cd $DTC_LINUX_PATH
-for f in $DTC_SOURCE; do
+for f in $DTC_SOURCE $FDTOVERLAY_SOURCE; do
cp ${DTC_UPSTREAM_PATH}/${f} ${f}
git add ${f}
 done
-- 
2.25.0.rc1.19.g042ed3e048af



[PATCH V5 0/5] dt: build overlays

2021-01-19 Thread Viresh Kumar
Hi Frank/Rob,

I have picked all the related patches together into a single patchset,
so they can be properly reviewed/tested.

This patchset makes necessary changes to the kernel to add support for
building overlays (%.dtbo) and the required fdtoverlay tool. This also
builds static_test.dtb using some of the existing overlay tests present
in drivers/of/unittest-data/ for better test coverage.

Note that in order for anyone to test this stuff, you need to manually
run the ./update-dtc-source.sh script once to fetch the necessary
changes from the external DTC project (i.e. fdtoverlay.c and this[1]
patch).

Also note that Frank has already shared his concerns towards the error
reporting done by fdtoverlay tool [2], I have still included the patch
in this series for completeness, will see how to get that sorted out.

V5:

- Don't reuse DTC_SOURCE for fdtoverlay.c in patch 1/5 (Frank).

- Update .gitignore and scripts/Makefile.dtbinst, drop dtbo-y syntax and
  DTC_FLAGS += -@ in patch 4/5 (Masahiro).

- Remove the intermediate dtb, rename output to static_test.dtb, don't
  use overlay.dtb and overlay_base.dtb for static builds, improved
  layout/comments in Makefile for patch 5/5 (Frank).

--
Viresh

[1] 
https://github.com/dgibson/dtc/commit/163f0469bf2ed8b2fe5aa15bc796b93c70243ddc
[2] https://lore.kernel.org/lkml/74f8aa8f-ffab-3b0f-186f-31fb7395e...@gmail.com/

Viresh Kumar (5):
  scripts: dtc: Fetch fdtoverlay.c from external DTC project
  scripts: dtc: Build fdtoverlay tool
  scripts: dtc: Remove the unused fdtdump.c file
  kbuild: Add support to build overlays (%.dtbo)
  of: unittest: Statically apply overlays using fdtoverlay

 .gitignore|   3 +-
 Makefile  |   4 +-
 drivers/of/unittest-data/Makefile |  50 +
 scripts/Makefile.dtbinst  |   3 +
 scripts/Makefile.lib  |   4 +-
 scripts/dtc/Makefile  |   6 +-
 scripts/dtc/fdtdump.c | 163 --
 scripts/dtc/update-dtc-source.sh  |   3 +-
 8 files changed, 66 insertions(+), 170 deletions(-)
 delete mode 100644 scripts/dtc/fdtdump.c

-- 
2.25.0.rc1.19.g042ed3e048af



[PATCH] cxgb4: Assign boolean values to a bool variable

2021-01-19 Thread Jiapeng Zhong
Fix the following coccicheck warnings:

./drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c:5142:2-33:
WARNING: Assignment of 0/1 to bool variable.

Reported-by: Abaci Robot 
Signed-off-by: Jiapeng Zhong 
---
 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c 
b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 7fd264a..b95c008 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -5139,7 +5139,7 @@ static int adap_init0(struct adapter *adap, int vpd_skip)
 
/* See if FW supports FW_FILTER2 work request */
if (is_t4(adap->params.chip)) {
-   adap->params.filter2_wr_support = 0;
+   adap->params.filter2_wr_support = false;
} else {
params[0] = FW_PARAM_DEV(FILTER2_WR);
ret = t4_query_params(adap, adap->mbox, adap->pf, 0,
-- 
1.8.3.1



RE: [PATCH net v2] udp: ipv4: manipulate network header of NATed UDP GRO fraglist

2021-01-19 Thread Dongseok Yi
On 2021-01-18 22:27, Steffen Klassert wrote:
> On Fri, Jan 15, 2021 at 10:20:35PM +0900, Dongseok Yi wrote:
> > UDP/IP header of UDP GROed frag_skbs are not updated even after NAT
> > forwarding. Only the header of head_skb from ip_finish_output_gso ->
> > skb_gso_segment is updated but following frag_skbs are not updated.
> >
> > A call path skb_mac_gso_segment -> inet_gso_segment ->
> > udp4_ufo_fragment -> __udp_gso_segment -> __udp_gso_segment_list
> > does not try to update UDP/IP header of the segment list but copy
> > only the MAC header.
> >
> > Update dport, daddr and checksums of each skb of the segment list
> > in __udp_gso_segment_list. It covers both SNAT and DNAT.
> >
> > Fixes: 9fd1ff5d2ac7 (udp: Support UDP fraglist GRO/GSO.)
> > Signed-off-by: Dongseok Yi 
> > ---
> > v1:
> > Steffen Klassert said, there could be 2 options.
> > https://lore.kernel.org/patchwork/patch/1362257/
> > I was trying to write a quick fix, but it was not easy to forward
> > segmented list. Currently, assuming DNAT only.
> >
> > v2:
> > Per Steffen Klassert request, move the procedure from
> > udp4_ufo_fragment to __udp_gso_segment_list and support SNAT.
> >
> > To Alexander Lobakin, I've checked your email late. Just use this
> > patch as a reference. It support SNAT too, but does not support IPv6
> > yet. I cannot make IPv6 header changes in __udp_gso_segment_list due
> > to the file is in IPv4 directory.
> >
> >  include/net/udp.h  |  2 +-
> >  net/ipv4/udp_offload.c | 62 
> > ++
> >  net/ipv6/udp_offload.c |  2 +-
> >  3 files changed, 59 insertions(+), 7 deletions(-)
> >
> > diff --git a/include/net/udp.h b/include/net/udp.h
> > index 877832b..01351ba 100644
> > --- a/include/net/udp.h
> > +++ b/include/net/udp.h
> > @@ -178,7 +178,7 @@ struct sk_buff *udp_gro_receive(struct list_head *head, 
> > struct sk_buff *skb,
> >  int udp_gro_complete(struct sk_buff *skb, int nhoff, udp_lookup_t lookup);
> >
> >  struct sk_buff *__udp_gso_segment(struct sk_buff *gso_skb,
> > - netdev_features_t features);
> > + netdev_features_t features, bool is_ipv6);
> >
> >  static inline struct udphdr *udp_gro_udphdr(struct sk_buff *skb)
> >  {
> > diff --git a/net/ipv4/udp_offload.c b/net/ipv4/udp_offload.c
> > index ff39e94..c532d3b 100644
> > --- a/net/ipv4/udp_offload.c
> > +++ b/net/ipv4/udp_offload.c
> > @@ -187,8 +187,57 @@ struct sk_buff *skb_udp_tunnel_segment(struct sk_buff 
> > *skb,
> >  }
> >  EXPORT_SYMBOL(skb_udp_tunnel_segment);
> >
> > +static void __udpv4_gso_segment_csum(struct sk_buff *seg,
> > +__be32 *oldip, __be32 *newip,
> > +__be16 *oldport, __be16 *newport)
> > +{
> > +   struct udphdr *uh = udp_hdr(seg);
> > +   struct iphdr *iph = ip_hdr(seg);
> > +
> > +   if (uh->check) {
> > +   inet_proto_csum_replace4(>check, seg, *oldip, *newip,
> > +true);
> > +   inet_proto_csum_replace2(>check, seg, *oldport, *newport,
> > +false);
> > +   if (!uh->check)
> > +   uh->check = CSUM_MANGLED_0;
> > +   }
> > +   uh->dest = *newport;
> > +
> > +   csum_replace4(>check, *oldip, *newip);
> > +   iph->daddr = *newip;
> > +}
> 
> Can't we just do the checksum recalculation for this case as it is done
> with standard GRO?

If I understand standard GRO correctly, it calculates full checksum.
Should we adopt the same method to UDP GRO fraglist? I did not find
a simple method for the incremental checksum update.

> 
> > +
> > +static struct sk_buff *__udpv4_gso_segment_list_csum(struct sk_buff *segs)
> > +{
> > +   struct sk_buff *seg;
> > +   struct udphdr *uh, *uh2;
> > +   struct iphdr *iph, *iph2;
> > +
> > +   seg = segs;
> > +   uh = udp_hdr(seg);
> > +   iph = ip_hdr(seg);
> > +
> > +   while ((seg = seg->next)) {
> > +   uh2 = udp_hdr(seg);
> > +   iph2 = ip_hdr(seg);
> > +
> > +   if (uh->source != uh2->source || iph->saddr != iph2->saddr)
> > +   __udpv4_gso_segment_csum(seg,
> > +>saddr, >saddr,
> > +>source, >source);
> > +
> > +   if (uh->dest != uh2->dest || iph->daddr != iph2->daddr)
> > +   __udpv4_gso_segment_csum(seg,
> > +>daddr, >daddr,
> > +>dest, >dest);
> > +   }
> 
> You don't need to check the addresses and ports of all packets in the
> segment list. If the addresses and ports are equal for the first and
> second packet in the list, then this also holds for the rest of the
> packets.

I think we can try this with an additional flag (seg_csum).

diff --git a/net/ipv4/udp_offload.c b/net/ipv4/udp_offload.c
index 36b7e30..3f892df 100644
--- a/net/ipv4/udp_offload.c
+++ 

Re: [PATCH v2 net-next 1/1] Allow user to set metric on default route learned via Router Advertisement.

2021-01-19 Thread praveen chaudhary



> On Jan 19, 2021, at 8:22 PM, David Ahern  wrote:
> 
> On 1/19/21 3:17 PM, praveen chaudhary wrote:
 
 For IPv4:
 
 
 Config in etc/network/interfaces
 
 ```
 auto eth0
 iface eth0 inet dhcp
   metric 4261413864
>>> 
>>> how does that work for IPv4? Is the metric passed to the dhclient and it
>>> inserts the route with the given metric or is a dhclient script used to
>>> replace the route after insert?
>>> 
>>> 
>> 
>> Yes, DHCP client picks config under “iface eth0 inet dhcp” line and if 
>> metric is configured, then it adds the metric for all added routes.
> 
> As I recall ifupdown{2} forks dhclient as a process to handle dhcp
> config, and I believe there is a script that handles adding the default
> route with metric. Meaning ... it is not comparable to an RA.
> 

I hope, we both will agree that a fixed metric value on default route learned 
via RA 
restricts Network Administrators today. And such issues hinder the deployment
of IPv6 only networks. So if we agree that in future we may need to allow  a
configurable value for metric then this fix makes good sense.
BTW, kindly let me know if there is a better way to configure this metric. I 
think,
sysctl is the only way.


>> 
>> Thanks a lot again for spending time for this Review,
>> This feature will help SONiC OS [and others Linux flavors] for better IPv6 
>> support, so thanks again.
> 
> I think SONiC is an abomination, so that is definitely not the
> motivation for my reviews. :-)
> 

Trying to make things better day by day. That is the only solace for Software 
Engineers :-). 

I really appreciate for your time to review this patch. Cheers.




Re: [PATCH] x86/fpu/xstate: calculate the number by sizeof and offsetof

2021-01-19 Thread Dave Hansen
On 1/19/21 10:44 PM, Yejune Deng wrote:
> In fpstate_sanitize_xstate(), use memset and offsetof instead of '= 0',
> and use sizeof instead of a constant.

What's the benefit to doing this?  Saving 4 lines of code?

Your suggestions are not obviously wrong at a glance, but they're also
not obviously right.


RE: [PATCH 1/1] scsi: sd: use max_xfer_blocks for set rw_max if max_xfer_blocks is available

2021-01-19 Thread Manjong Lee
Add recipients for more reviews.

>SCSI device has max_xfer_size and opt_xfer_size,
>but current kernel uses only opt_xfer_size.
>
>It causes the limitation on setting IO chunk size,
>although it can support larger one.
>
>So, I propose this patch to use max_xfer_size in case it has valid value.
>It can support to use the larger chunk IO on SCSI device.
>
>For example,
>This patch is effective in case of some SCSI device like UFS
>with opt_xfer_size 512KB, queue depth 32 and max_xfer_size over 512KB.
>
>I expect both the performance improvement
>and the efficiency use of smaller command queue depth.
>
>Signed-off-by: Manjong Lee 
>---
>drivers/scsi/sd.c | 56 +++
>1 file changed, 52 insertions(+), 4 deletions(-)
>
>diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
>index 679c2c025047..de59f01c1304 100644
>--- a/drivers/scsi/sd.c
>+++ b/drivers/scsi/sd.c
>@@ -3108,6 +3108,53 @@ static void sd_read_security(struct scsi_disk *sdkp, 
>unsigned char *buffer)
>sdkp->security = 1;
>}
>
>+static bool sd_validate_max_xfer_size(struct scsi_disk *sdkp,
>+unsigned int dev_max)
>+{
>+  struct scsi_device *sdp = sdkp->device;
>+  unsigned int max_xfer_bytes =
>+  logical_to_bytes(sdp, sdkp->max_xfer_blocks);
>+
>+  if (sdkp->max_xfer_blocks == 0)
>+  return false;
>+
>+  if (sdkp->max_xfer_blocks > SD_MAX_XFER_BLOCKS) {
>+  sd_first_printk(KERN_WARNING, sdkp,
>+  "Maximal transfer size %u logical blocks " \
>+  "> sd driver limit (%u logical blocks)\n",
>+  sdkp->max_xfer_blocks, SD_DEF_XFER_BLOCKS);
>+  return false;
>+  }
>+
>+  if (sdkp->max_xfer_blocks > dev_max) {
>+  sd_first_printk(KERN_WARNING, sdkp,
>+  "Maximal transfer size %u logical blocks "
>+  "> dev_max (%u logical blocks)\n",
>+  sdkp->max_xfer_blocks, dev_max);
>+  return false;
>+  }
>+
>+  if (max_xfer_bytes < PAGE_SIZE) {
>+  sd_first_printk(KERN_WARNING, sdkp,
>+  "Maximal transfer size %u bytes < " \
>+  "PAGE_SIZE (%u bytes)\n",
>+  max_xfer_bytes, (unsigned int)PAGE_SIZE);
>+  return false;
>+  }
>+
>+  if (max_xfer_bytes & (sdkp->physical_block_size - 1)) {
>+  sd_first_printk(KERN_WARNING, sdkp,
>+  "Maximal transfer size %u bytes not a " \
>+  "multiple of physical block size (%u bytes)\n",
>+  max_xfer_bytes, sdkp->physical_block_size);
>+  return false;
>+  }
>+
>+  sd_first_printk(KERN_INFO, sdkp, "Maximal transfer size %u bytes\n",
>+  max_xfer_bytes);
>+  return true;
>+}
>+
>/*
>* Determine the device's preferred I/O size for reads and writes
>* unless the reported value is unreasonably small, large, not a
>@@ -3233,12 +3280,13 @@ static int sd_revalidate_disk(struct gendisk *disk)
>
>/* Initial block count limit based on CDB TRANSFER LENGTH field size. */
>dev_max = sdp->use_16_for_rw ? SD_MAX_XFER_BLOCKS : SD_DEF_XFER_BLOCKS;
>-
>-  /* Some devices report a maximum block count for READ/WRITE requests. */
>-  dev_max = min_not_zero(dev_max, sdkp->max_xfer_blocks);
>q->limits.max_dev_sectors = logical_to_sectors(sdp, dev_max);
>
>-  if (sd_validate_opt_xfer_size(sdkp, dev_max)) {
>+  if (sd_validate_max_xfer_size(sdkp, dev_max)) {
>+  q->limits.io_opt = 0;
>+  rw_max = logical_to_sectors(sdp, sdkp->max_xfer_blocks);
>+  q->limits.max_dev_sectors = rw_max;
>+  } else if (sd_validate_opt_xfer_size(sdkp, dev_max)) {
>q->limits.io_opt = logical_to_bytes(sdp, sdkp->opt_xfer_blocks);
>rw_max = logical_to_sectors(sdp, sdkp->opt_xfer_blocks);
>} else {
>-- 
>2.29.0
>
>


[PATCH] x86/fpu/xstate: calculate the number by sizeof and offsetof

2021-01-19 Thread Yejune Deng
In fpstate_sanitize_xstate(), use memset and offsetof instead of '= 0',
and use sizeof instead of a constant.

Signed-off-by: Yejune Deng 
---
 arch/x86/kernel/fpu/xstate.c | 10 +++---
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
index 5d8047441a0a..2e75630c86e9 100644
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -161,20 +161,16 @@ void fpstate_sanitize_xstate(struct fpu *fpu)
 * FP is in init state
 */
if (!(xfeatures & XFEATURE_MASK_FP)) {
+   memset(fx, 0, offsetof(struct fxregs_state, mxcsr));
+   memset(fx->st_space, 0, sizeof(fx->st_space));
fx->cwd = 0x37f;
-   fx->swd = 0;
-   fx->twd = 0;
-   fx->fop = 0;
-   fx->rip = 0;
-   fx->rdp = 0;
-   memset(>st_space[0], 0, 128);
}
 
/*
 * SSE is in init state
 */
if (!(xfeatures & XFEATURE_MASK_SSE))
-   memset(>xmm_space[0], 0, 256);
+   memset(fx->xmm_space, 0, sizeof(fx->xmm_space));
 
/*
 * First two features are FPU and SSE, which above we handled
-- 
2.29.0



[PATCH] hwmon: (applesmc) Assign boolean values to a bool variable

2021-01-19 Thread Jiapeng Zhong
Fix the following coccicheck warnings:

./drivers/hwmon/applesmc.c:568:6-23: WARNING: Assignment of
0/1 to bool variable.

Reported-by: Abaci Robot 
Signed-off-by: Jiapeng Zhong 
---
 drivers/hwmon/applesmc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/hwmon/applesmc.c b/drivers/hwmon/applesmc.c
index 89207af..28b137e 100644
--- a/drivers/hwmon/applesmc.c
+++ b/drivers/hwmon/applesmc.c
@@ -565,7 +565,7 @@ static int applesmc_init_index(struct applesmc_registers *s)
 static int applesmc_init_smcreg_try(void)
 {
struct applesmc_registers *s = 
-   bool left_light_sensor = 0, right_light_sensor = 0;
+   bool left_light_sensor = false, right_light_sensor = false;
unsigned int count;
u8 tmp[1];
int ret;
-- 
1.8.3.1



Re: [PATCH v3 4/4] hwmon: Support Aspeed AST2600 PWM/Fan tachometer

2021-01-19 Thread Andrew Jeffery



On Wed, 20 Jan 2021, at 15:53, Ryan Chen wrote:
> > -Original Message-
> > From: Andrew Jeffery 
> > Sent: Wednesday, January 20, 2021 1:16 PM
> > To: Troy Lee ; open...@lists.ozlabs.org; Joel
> > Stanley ; Philipp Zabel ; open list
> > ; moderated list:ARM/ASPEED MACHINE
> > SUPPORT ; moderated
> > list:ARM/ASPEED MACHINE SUPPORT 
> > Cc: Ryan Chen ; ChiaWei Wang
> > ; Troy Lee ; kbuild
> > test robot 
> > Subject: Re: [PATCH v3 4/4] hwmon: Support Aspeed AST2600 PWM/Fan
> > tachometer
> > 
> > Hi Troy,
> > 
> > On Mon, 18 Jan 2021, at 17:20, Troy Lee wrote:
> > > Add Aspeed AST2600 PWM/Fan tacho driver. AST2600 has 16 PWM channel
> > > and
> > > 16 FAN tacho channel.
> > >
> > > Changes since v2:
> > >  - declare local function as static function
> > >
> > > Changes since v1:
> > >  - fixed review comments
> > >  - fixed double-looped calculation of div_h and div_l
> > >  - moving configuration to device tree
> > >  - register hwmon driver with devm_hwmon_device_register_with_info()
> > >
> > > Signed-off-by: Troy Lee 
> > > Reported-by: kernel test robot 
> > > ---
> > >  drivers/hwmon/Kconfig|  10 +
> > >  drivers/hwmon/Makefile   |   1 +
> > >  drivers/hwmon/aspeed2600-pwm-tacho.c | 756
> > > +++
> > >  3 files changed, 767 insertions(+)
> > >  create mode 100644 drivers/hwmon/aspeed2600-pwm-tacho.c
> > 
> > ...
> > 
> > > diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index
> > > 09a86c5e1d29..1a415d493ffc 100644
> > > --- a/drivers/hwmon/Makefile
> > > +++ b/drivers/hwmon/Makefile
> > > @@ -52,6 +52,7 @@ obj-$(CONFIG_SENSORS_ARM_SCPI)  +=
> > scpi-hwmon.o
> > >  obj-$(CONFIG_SENSORS_AS370)  += as370-hwmon.o
> > >  obj-$(CONFIG_SENSORS_ASC7621)+= asc7621.o
> > >  obj-$(CONFIG_SENSORS_ASPEED) += aspeed-pwm-tacho.o
> > > +obj-$(CONFIG_SENSORS_ASPEED2600_PWM_TACHO)   +=
> > aspeed2600-pwm-tacho.o
> > 
> > Why does this have to be a separate implementation from the existing ASPEED
> > PWM/Tacho driver? Is there really nothing in common?
> > 
> Hello Andrew,
>   The register set is fully re-arrange. And it is new design at AST2600, 
> can't be compatible with older PWM.  
>

Ah, okay. I hadn't looked. Thanks Ryan.

Andrew


Re: [PATCH v2 02/17] rtc: bd70528: Do not require parent data

2021-01-19 Thread Matti Vaittinen


On Tue, 2021-01-19 at 22:09 +0100, Alexandre Belloni wrote:
> On 19/01/2021 09:14:45+0200, Matti Vaittinen wrote:
> > The ROHM BD71828 and BD71815 RTC drivers only need the regmap
> > pointer from parent. Regmap can be obtained via dev_get_regmap()
> > so do not require parent to populate driver data for that.
> > 
> > BD70528 on the other hand requires parent data to access the
> > watchdog so leave the parent data for BD70528 here for now.
> > 
> > Signed-off-by: Matti Vaittinen 
> Acked-by: Alexandre Belloni 
> 
> > ---
> > 
> > Please note that this same change has been sent individually:
> > https://lore.kernel.org/lkml/20210105152350.GA3714833@localhost.localdomain/
> > It is present in this series only because some patches depend on
> > it.
> > 
> 
> Then I think it is best to have it as part of this series.

Thanks for taking a look at this Alexandre! I'll keep the patch in the
series and remove this comment from cover-letter and the patch. (I
guess you have now dropped the previously sent patch).

> 
> > ~~~ "I don't think so," said Rene Descartes. Just then he vanished
> > ~~~
> 
> I've alway wanted to comment on that, should he have to say "I don't
> think" to vanish ? Because saying "I don't think so," means that he
> thinks this is not so.

My interpretation is he really was disagreeing and intended to say "he
doesn't think so". It was just the saying which made him to disappear.
This is what may happen when you have strong principles ^_^; What is
interesting to me is that he was able to add the "so" before vanishing.
This makes me believe it was required the information about him saying
this must've reached someone before the action was taken. If we make
some assumptions and a rough estimates we can compute the maximum
distance for this "something" that must've received the information
about the event.

I now assume that saying "so" can't really take longer than 10ms. I
also take into account the current state of physics - which means that
maximum speed for delivering the information is the speed of light, C.

I further guess that first the information about the event must've
reached this "something" - and then this "something" must've sent some
'make him vanish' event back. Again we take the speed-of-light as a
restriction.

So, poor Rene was no further than 0.01 * C/2 km away from the
"something" - when C is the speed of light using km/s as unit. 

I think it is safe to say that when you say "you're not thinking" you
should ensure you're further than 150 000 km away from "something"
which can make you to vanish.

> 
> > Simon says - in Latin please.
> > ~~~ "non cogito me" dixit Rene Descarte, deinde evanescavit ~~~
> 
> And I guess this should be simply "non cogito" ;)

I think we should definitely discuss this with Simon Glass if we ever
happen to be in a same location :] After all, he did the Latin
translation for me. I can't really speak Latin - but I can always lead
the discussion to some side-tracks XD


Best Regards
Matti Vaittinen




[PATCH] dsa: vsc73xx: add support for vlan filtering

2021-01-19 Thread Pawel Dembicki
This patch adds support for vlan filtering in vsc73xx driver.

After vlan filtering enable, CPU_PORT is configured as trunk, without
non-tagged frames. This allows to avoid problems with transmit untagged
frames because vsc73xx is DSA_TAG_PROTO_NONE.

Signed-off-by: Pawel Dembicki 
---
 drivers/net/dsa/vitesse-vsc73xx-core.c | 311 -
 1 file changed, 310 insertions(+), 1 deletion(-)

diff --git a/drivers/net/dsa/vitesse-vsc73xx-core.c 
b/drivers/net/dsa/vitesse-vsc73xx-core.c
index 19ce4aa0973b..bf805eb9d3a6 100644
--- a/drivers/net/dsa/vitesse-vsc73xx-core.c
+++ b/drivers/net/dsa/vitesse-vsc73xx-core.c
@@ -39,6 +39,7 @@
 #define VSC73XX_BLOCK_SYSTEM   0x7 /* Only subblock 0 */
 
 #define CPU_PORT   6 /* CPU port */
+#define VLAN_TABLE_ATTEMPTS10
 
 /* MAC Block registers */
 #define VSC73XX_MAC_CFG0x00
@@ -62,6 +63,8 @@
 #define VSC73XX_CAT_DROP   0x6e
 #define VSC73XX_CAT_PR_MISC_L2 0x6f
 #define VSC73XX_CAT_PR_USR_PRIO0x75
+#define VSC73XX_CAT_VLAN_MISC  0x79
+#define VSC73XX_CAT_PORT_VLAN  0x7a
 #define VSC73XX_Q_MISC_CONF0xdf
 
 /* MAC_CFG register bits */
@@ -122,6 +125,17 @@
 #define VSC73XX_ADVPORTM_IO_LOOPBACK   BIT(1)
 #define VSC73XX_ADVPORTM_HOST_LOOPBACK BIT(0)
 
+/* TXUPDCFG transmit modify setup bits */
+#define VSC73XX_TXUPDCFG_DSCP_REWR_MODEGENMASK(20, 19)
+#define VSC73XX_TXUPDCFG_DSCP_REWR_ENA BIT(18)
+#define VSC73XX_TXUPDCFG_TX_INT_TO_USRPRIO_ENA BIT(17)
+#define VSC73XX_TXUPDCFG_TX_UNTAGGED_VID   GENMASK(15, 4)
+#define VSC73XX_TXUPDCFG_TX_UNTAGGED_VID_ENA   BIT(3)
+#define VSC73XX_TXUPDCFG_TX_UPDATE_CRC_CPU_ENA BIT(1)
+#define VSC73XX_TXUPDCFG_TX_INSERT_TAG BIT(0)
+
+#define VSC73XX_TXUPDCFG_TX_UNTAGGED_VID_SHIFT 4
+
 /* CAT_DROP categorizer frame dropping register bits */
 #define VSC73XX_CAT_DROP_DROP_MC_SMAC_ENA  BIT(6)
 #define VSC73XX_CAT_DROP_FWD_CTRL_ENA  BIT(4)
@@ -135,6 +149,15 @@
 #define VSC73XX_Q_MISC_CONF_EARLY_TX_512   (1 << 1)
 #define VSC73XX_Q_MISC_CONF_MAC_PAUSE_MODE BIT(0)
 
+/* CAT_VLAN_MISC categorizer VLAN miscellaneous bits*/
+#define VSC73XX_CAT_VLAN_MISC_VLAN_TCI_IGNORE_ENA  BIT(8)
+#define VSC73XX_CAT_VLAN_MISC_VLAN_KEEP_TAG_ENABIT(7)
+
+/* CAT_PORT_VLAN categorizer port VLAN*/
+#define VSC73XX_CAT_PORT_VLAN_VLAN_CFI BIT(15)
+#define VSC73XX_CAT_PORT_VLAN_VLAN_USR_PRIOGENMASK(14, 12)
+#define VSC73XX_CAT_PORT_VLAN_VLAN_VID GENMASK(11, 0)
+
 /* Frame analyzer block 2 registers */
 #define VSC73XX_STORMLIMIT 0x02
 #define VSC73XX_ADVLEARN   0x03
@@ -185,7 +208,8 @@
 #define VSC73XX_VLANACCESS_VLAN_MIRROR BIT(29)
 #define VSC73XX_VLANACCESS_VLAN_SRC_CHECK  BIT(28)
 #define VSC73XX_VLANACCESS_VLAN_PORT_MASK  GENMASK(9, 2)
-#define VSC73XX_VLANACCESS_VLAN_TBL_CMD_MASK   GENMASK(2, 0)
+#define VSC73XX_VLANACCESS_VLAN_PORT_MASK_SHIFT2
+#define VSC73XX_VLANACCESS_VLAN_TBL_CMD_MASK   GENMASK(1, 0)
 #define VSC73XX_VLANACCESS_VLAN_TBL_CMD_IDLE   0
 #define VSC73XX_VLANACCESS_VLAN_TBL_CMD_READ_ENTRY 1
 #define VSC73XX_VLANACCESS_VLAN_TBL_CMD_WRITE_ENTRY2
@@ -557,6 +581,287 @@ static enum dsa_tag_protocol 
vsc73xx_get_tag_protocol(struct dsa_switch *ds,
return DSA_TAG_PROTO_NONE;
 }
 
+static int
+vsc73xx_port_wait_for_vlan_table_cmd(struct vsc73xx *vsc, int attempts)
+{
+   u32 val;
+   int i;
+
+   for (i = 0; i <= attempts; i++) {
+   vsc73xx_read(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_VLANACCESS,
+);
+   if ((val & VSC73XX_VLANACCESS_VLAN_TBL_CMD_MASK) ==
+   VSC73XX_VLANACCESS_VLAN_TBL_CMD_IDLE)
+   return 0;
+   }
+   return -EBUSY;
+}
+
+static int
+vsc73xx_port_read_vlan_table_entry(struct dsa_switch *ds, u16 vid, u8 *portmap)
+{
+   struct vsc73xx *vsc = ds->priv;
+   u32 val;
+   int ret;
+
+   if (vid > 4095)
+   return -EPERM;
+   vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_VLANTIDX, vid);
+   ret = vsc73xx_port_wait_for_vlan_table_cmd(vsc, VLAN_TABLE_ATTEMPTS);
+   if (ret)
+   return ret;
+   vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_VLANACCESS,
+   VSC73XX_VLANACCESS_VLAN_TBL_CMD_MASK,
+   VSC73XX_VLANACCESS_VLAN_TBL_CMD_READ_ENTRY);
+   ret = vsc73xx_port_wait_for_vlan_table_cmd(vsc, VLAN_TABLE_ATTEMPTS);
+   if (ret)
+   return ret;
+   vsc73xx_read(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_VLANACCESS, );
+   *portmap =
+   (val & VSC73XX_VLANACCESS_VLAN_PORT_MASK) >>
+   VSC73XX_VLANACCESS_VLAN_PORT_MASK_SHIFT;
+   return 0;
+}
+
+static int
+vsc73xx_port_write_vlan_table_entry(struct dsa_switch *ds, u16 vid, u8 portmap)
+{
+   struct vsc73xx *vsc = ds->priv;
+   int ret;
+
+   if (vid > 4095)
+   return -EPERM;
+   vsc73xx_write(vsc, 

Re: [PATCH] powerpc/47x: Disable 256k page size

2021-01-19 Thread Christophe Leroy




Le 20/01/2021 à 06:45, Michael Ellerman a écrit :

Christophe Leroy  writes:

PPC47x_TLBE_SIZE isn't defined for 256k pages, so
this size of page shall not be selected for 47x.

Reported-by: kernel test robot 
Fixes: e7f75ad01d59 ("powerpc/47x: Base ppc476 support")
Signed-off-by: Christophe Leroy 
---
  arch/powerpc/Kconfig | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 107bb4319e0e..a685e42d3993 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -772,7 +772,7 @@ config PPC_64K_PAGES
  
  config PPC_256K_PAGES

bool "256k page size"
-   depends on 44x && !STDBINUTILS
+   depends on 44x && !STDBINUTILS && !PPC_47x


Do we still need this STDBINUTILS thing?

It's pretty gross, and I notice we have zero defconfigs which disable
it, meaning it's only randconfig builds that will ever test 256K pages.

Can we just drop it and say if you enable 256K pages you need to know
what you're doing?


I guess we can, yes. I'll send a patch for that.

Christophe





linux-next: Tree for Jan 20

2021-01-19 Thread Stephen Rothwell
Hi all,

Changes since 20210119:

The drm tree still had its build failure so I used the version from
next-20210107.

The drm-intel tree still had its build failure from merging the drm tree
and gained another, so I have used the version from next-20210108.

The usb tree gained a conflict against the usb.current tree.

The gpio-brgl tree gained a conflict against the gpio-brgl-fixes tree.

The akpm-current tree gained a build failure for which I applied a
supplied patch.

Non-merge commits (relative to Linus' tree): 4117
 4547 files changed, 157860 insertions(+), 83445 deletions(-)



I have created today's linux-next tree at
git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
(patches at http://www.kernel.org/pub/linux/kernel/next/ ).  If you
are tracking the linux-next tree using git, you should not use "git pull"
to do so as that will try to merge the new linux-next release with the
old one.  You should use "git fetch" and checkout or reset to the new
master.

You can see which trees have been included by looking in the Next/Trees
file in the source.  There are also quilt-import.log and merge.log
files in the Next directory.  Between each merge, the tree was built
with a ppc64_defconfig for powerpc, an allmodconfig for x86_64, a
multi_v7_defconfig for arm and a native build of tools/perf. After
the final fixups (if any), I do an x86_64 modules_install followed by
builds for x86_64 allnoconfig, powerpc allnoconfig (32 and 64 bit),
ppc44x_defconfig, allyesconfig and pseries_le_defconfig and i386, sparc
and sparc64 defconfig and htmldocs. And finally, a simple boot test
of the powerpc pseries_le_defconfig kernel in qemu (with and without
kvm enabled).

Below is a summary of the state of the merge.

I am currently merging 333 trees (counting Linus' and 86 trees of bug
fix patches pending for the current merge release).

Stats about the size of the tree over time can be seen at
http://neuling.org/linux-next-size.html .

Status of my local build tests will be at
http://kisskb.ellerman.id.au/linux-next .  If maintainers want to give
advice about cross compilers/configs that work, we are always open to add
more builds.

Thanks to Randy Dunlap for doing many randconfig builds.  And to Paul
Gortmaker for triage and bug fixes.

-- 
Cheers,
Stephen Rothwell

$ git checkout master
$ git reset --hard stable
Merging origin/master (1e2a199f6ccd Merge tag 'spi-fix-v5.11-rc4' of 
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi)
Merging fixes/fixes (e71ba9452f0b Linux 5.11-rc2)
Merging kbuild-current/fixes (0bc9bc1d8b2f Merge tag 'ext4_for_linus_stable' of 
git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4)
Merging arc-current/for-curr (7c53f6b671f4 Linux 5.11-rc3)
Merging arm-current/fixes (e64ab473ddda ARM: 9034/1: __div64_32(): straighten 
up inline asm constraints)
Merging arm64-fixes/for-next/fixes (3ed86b9a7140 kasan, arm64: fix pointer tags 
in KASAN reports)
Merging arm-soc-fixes/arm/fixes (8a996b2d8a03 ARM: dts: ux500: Reserve memory 
carveouts)
Merging drivers-memory-fixes/fixes (5c8fe583cce5 Linux 5.11-rc1)
Merging m68k-current/for-linus (2ae92e8b9b7e MAINTAINERS: Update m68k Mac entry)
Merging powerpc-fixes/fixes (41131a5e54ae powerpc/vdso: Fix 
clock_gettime_fallback for vdso32)
Merging s390-fixes/fixes (19c329f68089 Linux 5.11-rc4)
Merging sparc/master (0a95a6d1a4cd sparc: use for_each_child_of_node() macro)
Merging fscrypt-current/for-stable (d19d8d345eec fscrypt: fix inline encryption 
not used on new files)
Merging net/master (f7b9820dbe16 Merge branch 'sh_eth-fix-reboot-crash')
Merging bpf/master (e23a8d002198 Merge 
https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf)
Merging ipsec/master (da64ae2d35d3 xfrm: Fix wraparound in 
xfrm_policy_addr_delta())
Merging netfilter/master (c8a8ead01736 Merge 
git://git.kernel.org/pub/scm/linux/kernel/git/pablo/nf)
Merging ipvs/master (c8a8ead01736 Merge 
git://git.kernel.org/pub/scm/linux/kernel/git/pablo/nf)
Merging wireless-drivers/master (952de419b617 mt76: mt7663s: fix rx buffer 
refcounting)
Merging mac80211/master (c13cf5c15966 mac80211: check if atf has been disabled 
in __ieee80211_schedule_txq)
Merging rdma-fixes/for-rc (a372173bf314 RDMA/cxgb4: Fix the reported 
max_recv_sge value)
Merging sound-current/for-linus (2b73649cee65 ALSA: hda: Balance runtime/system 
PM if direct-complete is disabled)
Merging sound-asoc-fixes/for-linus (63e1267254ab Merge remote-tracking branch 
'asoc/for-5.11' into asoc-linus)
Merging regmap-fixes/for-linus (7c53f6b671f4 Linux 5.11-rc3)
Merging regulator-fixes/for-linus (09db7311ca61 Merge v5.11-rc3)
Merging spi-fixes/for-linus (a12e0fb859fc Merge remote-tracking branch 
'spi/for-5.11' into spi-linus)
Merging pci-current/for-linus (7c53f6b671f4 Linux 5.11-rc3)
Merging driver-core.current/driver-core-linus (895bee270863 Revert "driver 
core: Reorder devices on successful probe")

[PATCH] kbuild: use always-y instead of extra-y

2021-01-19 Thread Masahiro Yamada
As commit d0e628cd817f ("kbuild: doc: clarify the difference between
extra-y and always-y") explained, extra-y should be used for listing
the prerequsites of vmlinux. always-y is a better fix here.

Signed-off-by: Masahiro Yamada 
---

 Documentation/devicetree/bindings/Makefile |  8 
 drivers/gpu/drm/i915/Makefile  |  2 +-
 scripts/Makefile.lib   | 10 +-
 scripts/gdb/linux/Makefile |  2 +-
 4 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/Documentation/devicetree/bindings/Makefile 
b/Documentation/devicetree/bindings/Makefile
index 8f2b054bec5a..90fcad98984d 100644
--- a/Documentation/devicetree/bindings/Makefile
+++ b/Documentation/devicetree/bindings/Makefile
@@ -78,10 +78,10 @@ $(obj)/processed-schema.json: $(DT_SCHEMA_FILES) 
check_dtschema_version FORCE
 
 endif
 
-extra-$(CHECK_DT_BINDING) += processed-schema-examples.json
-extra-$(CHECK_DTBS) += processed-schema.json
-extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dts, 
$(DT_SCHEMA_FILES))
-extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dt.yaml, 
$(DT_SCHEMA_FILES))
+always-$(CHECK_DT_BINDING) += processed-schema-examples.json
+always-$(CHECK_DTBS)   += processed-schema.json
+always-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dts, 
$(DT_SCHEMA_FILES))
+always-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dt.yaml, 
$(DT_SCHEMA_FILES))
 
 # Hack: avoid 'Argument list too long' error for 'make clean'. Remove most of
 # build artifacts here before they are processed by scripts/Makefile.clean
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 6d9e81ea67f4..938221894d0c 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -294,7 +294,7 @@ no-header-test := \
gvt/mpt.h \
gvt/scheduler.h
 
-extra-$(CONFIG_DRM_I915_WERROR) += \
+always-$(CONFIG_DRM_I915_WERROR) += \
$(patsubst %.h,%.hdrtest, $(filter-out $(no-header-test), \
$(shell cd $(srctree)/$(src) && find * -name '*.h')))
 
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 4612a887f28e..b8e587a17dcc 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -64,12 +64,12 @@ always-y += $(userprogs-always-y) $(userprogs-always-m)
 
 # DTB
 # If CONFIG_OF_ALL_DTBS is enabled, all DT blobs are built
-extra-y+= $(dtb-y)
-extra-$(CONFIG_OF_ALL_DTBS)+= $(dtb-)
+always-y   += $(dtb-y)
+always-$(CONFIG_OF_ALL_DTBS)   += $(dtb-)
 
 ifneq ($(CHECK_DTBS),)
-extra-y += $(patsubst %.dtb,%.dt.yaml, $(dtb-y))
-extra-$(CONFIG_OF_ALL_DTBS) += $(patsubst %.dtb,%.dt.yaml, $(dtb-))
+always-y += $(patsubst %.dtb,%.dt.yaml, $(dtb-y))
+always-$(CONFIG_OF_ALL_DTBS) += $(patsubst %.dtb,%.dt.yaml, $(dtb-))
 endif
 
 # Add subdir path
@@ -230,7 +230,7 @@ $(obj)/%: $(src)/%_shipped
 #  target: source(s) FORCE
 #  $(if_changed,ld/objcopy/gzip)
 #
-#  and add target to extra-y so that we know we have to
+#  and add target to 'targets' so that we know we have to
 #  read in the saved command line
 
 # Linking
diff --git a/scripts/gdb/linux/Makefile b/scripts/gdb/linux/Makefile
index 124755087510..13903073cbff 100644
--- a/scripts/gdb/linux/Makefile
+++ b/scripts/gdb/linux/Makefile
@@ -18,7 +18,7 @@ quiet_cmd_gen_constants_py = GEN $@
$(CPP) -E -x c -P $(c_flags) $< > $@ ;\
sed -i '1,//d;' $@
 
-extra-y += constants.py
+always-y += constants.py
 $(obj)/constants.py: $(src)/constants.py.in FORCE
$(call if_changed_dep,gen_constants_py)
 
-- 
2.27.0



[PATCH] igc: Assign boolean values to a bool variable

2021-01-19 Thread Jiapeng Zhong
Fix the following coccicheck warnings:

./drivers/net/ethernet/intel/igc/igc_main.c:4961:2-14: WARNING:
Assignment of 0/1 to bool variable.

./drivers/net/ethernet/intel/igc/igc_main.c:4955:2-14: WARNING:
Assignment of 0/1 to bool variable.

./drivers/net/ethernet/intel/igc/igc_main.c:4933:1-13: WARNING:
Assignment of 0/1 to bool variable.

./drivers/net/ethernet/intel/igc/igc_main.c:4592:1-24: WARNING:
Assignment of 0/1 to bool variable.

./drivers/net/ethernet/intel/igc/igc_main.c:4438:2-25: WARNING:
Assignment of 0/1 to bool variable.

./drivers/net/ethernet/intel/igc/igc_main.c:4396:2-25: WARNING:
Assignment of 0/1 to bool variable.

./drivers/net/ethernet/intel/igc/igc_main.c:4018:2-25: WARNING:
Assignment of 0/1 to bool variable.

Reported-by: Abaci Robot 
Signed-off-by: Jiapeng Zhong 
---
 drivers/net/ethernet/intel/igc/igc_main.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ethernet/intel/igc/igc_main.c 
b/drivers/net/ethernet/intel/igc/igc_main.c
index afd6a62..6abb331 100644
--- a/drivers/net/ethernet/intel/igc/igc_main.c
+++ b/drivers/net/ethernet/intel/igc/igc_main.c
@@ -3597,7 +3597,7 @@ void igc_up(struct igc_adapter *adapter)
netif_tx_start_all_queues(adapter->netdev);
 
/* start the watchdog. */
-   hw->mac.get_link_status = 1;
+   hw->mac.get_link_status = true;
schedule_work(>watchdog_task);
 }
 
@@ -4016,7 +4016,7 @@ static irqreturn_t igc_msix_other(int irq, void *data)
}
 
if (icr & IGC_ICR_LSC) {
-   hw->mac.get_link_status = 1;
+   hw->mac.get_link_status = true;
/* guard against interrupt when we're going down */
if (!test_bit(__IGC_DOWN, >state))
mod_timer(>watchdog_timer, jiffies + 1);
@@ -4394,7 +4394,7 @@ static irqreturn_t igc_intr_msi(int irq, void *data)
}
 
if (icr & (IGC_ICR_RXSEQ | IGC_ICR_LSC)) {
-   hw->mac.get_link_status = 1;
+   hw->mac.get_link_status = true;
if (!test_bit(__IGC_DOWN, >state))
mod_timer(>watchdog_timer, jiffies + 1);
}
@@ -4436,7 +4436,7 @@ static irqreturn_t igc_intr(int irq, void *data)
}
 
if (icr & (IGC_ICR_RXSEQ | IGC_ICR_LSC)) {
-   hw->mac.get_link_status = 1;
+   hw->mac.get_link_status = true;
/* guard against interrupt when we're going down */
if (!test_bit(__IGC_DOWN, >state))
mod_timer(>watchdog_timer, jiffies + 1);
@@ -4590,7 +4590,7 @@ static int __igc_open(struct net_device *netdev, bool 
resuming)
netif_tx_start_all_queues(netdev);
 
/* start the watchdog. */
-   hw->mac.get_link_status = 1;
+   hw->mac.get_link_status = true;
schedule_work(>watchdog_task);
 
return IGC_SUCCESS;
@@ -4931,7 +4931,7 @@ int igc_set_spd_dplx(struct igc_adapter *adapter, u32 
spd, u8 dplx)
 {
struct igc_mac_info *mac = >hw.mac;
 
-   mac->autoneg = 0;
+   mac->autoneg = false;
 
/* Make sure dplx is at most 1 bit and lsb of speed is not set
 * for the switch() below to work
@@ -4953,13 +4953,13 @@ int igc_set_spd_dplx(struct igc_adapter *adapter, u32 
spd, u8 dplx)
mac->forced_speed_duplex = ADVERTISE_100_FULL;
break;
case SPEED_1000 + DUPLEX_FULL:
-   mac->autoneg = 1;
+   mac->autoneg = true;
adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
break;
case SPEED_1000 + DUPLEX_HALF: /* not supported */
goto err_inval;
case SPEED_2500 + DUPLEX_FULL:
-   mac->autoneg = 1;
+   mac->autoneg = true;
adapter->hw.phy.autoneg_advertised = ADVERTISE_2500_FULL;
break;
case SPEED_2500 + DUPLEX_HALF: /* not supported */
-- 
1.8.3.1



Re: [PATCH] i2c: sprd:: depend on COMMON_CLK to fix compile tests

2021-01-19 Thread Baolin Wang
Hi,

On Sun, Jan 17, 2021 at 7:43 PM Krzysztof Kozlowski  wrote:
>
> The I2C_SPRD uses Common Clock Framework thus it cannot be built on
> platforms without it (e.g. compile test on MIPS with LANTIQ):
>
> /usr/bin/mips-linux-gnu-ld: drivers/i2c/busses/i2c-sprd.o: in function 
> `sprd_i2c_probe':
> i2c-sprd.c:(.text.sprd_i2c_probe+0x254): undefined reference to 
> `clk_set_parent'
>
> Fixes: 4a2d5f663dab ("i2c: Enable compile testing for more drivers")
> Reported-by: kernel test robot 
> Signed-off-by: Krzysztof Kozlowski 

LGTM. Thanks.
Reviewed-by: Baolin Wang 

> ---
>  drivers/i2c/busses/Kconfig | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
> index d4d60ad0eda0..ab1f39ac39f4 100644
> --- a/drivers/i2c/busses/Kconfig
> +++ b/drivers/i2c/busses/Kconfig
> @@ -1013,6 +1013,7 @@ config I2C_SIRF
>  config I2C_SPRD
> tristate "Spreadtrum I2C interface"
> depends on I2C=y && (ARCH_SPRD || COMPILE_TEST)
> +   depends on COMMON_CLK
> help
>   If you say yes to this option, support will be included for the
>   Spreadtrum I2C interface.
> --
> 2.25.1
>


-- 
Baolin Wang


Re: [PATCH] of: unittest: Statically apply overlays using fdtoverlay

2021-01-19 Thread Viresh Kumar
On 20-01-21, 10:36, Viresh Kumar wrote:
> On 19-01-21, 09:44, Frank Rowand wrote:
> > No.  overlay_base.dts is intentionally compiled into a base FDT, not
> > an overlay.  Unittest intentionally unflattens this FDT in early boot,
> > in association with unflattening the system FDT.  One key intent
> > behind this is to use the same memory allocation method that is
> > used for the system FDT.
> > 
> > Do not try to convert overlay_base.dts into an overlay.
> 
> Okay, but why does it have /plugin/; specified in it then ?
> 
> And shouldn't we create two separate dtb-s now, static_test.dtb and
> static_overlay_test.dtb ? As fdtoverlay will not be able to merge it with
> testcase.dtb anyway.
> 
> Or maybe we can create another file static_overlay.dts (like testcases.dts)
> which can include both testcases.dts and overlay_base.dts, and then we can
> create static_test.dtb out of it ? That won't impact the runtime tests at all.

Hmm, I noticed just now that you have kept overlay.dtb out of the build,
probably we should then drop overlay_base.dtb as well ?

-- 
viresh


Re: linux-next: manual merge of the notifications tree with Linus' tree

2021-01-19 Thread Stephen Rothwell
Hi David,

On Mon, 21 Dec 2020 12:02:09 +1100 Stephen Rothwell  
wrote:
>
> Hi all,
> 
> Today's linux-next merge of the notifications tree got conflicts in:
> 
>   arch/alpha/kernel/syscalls/syscall.tbl
>   arch/arm/tools/syscall.tbl
>   arch/arm64/include/asm/unistd.h
>   arch/arm64/include/asm/unistd32.h
>   arch/ia64/kernel/syscalls/syscall.tbl
>   arch/m68k/kernel/syscalls/syscall.tbl
>   arch/microblaze/kernel/syscalls/syscall.tbl
>   arch/mips/kernel/syscalls/syscall_n32.tbl
>   arch/mips/kernel/syscalls/syscall_n64.tbl
>   arch/mips/kernel/syscalls/syscall_o32.tbl
>   arch/parisc/kernel/syscalls/syscall.tbl
>   arch/powerpc/kernel/syscalls/syscall.tbl
>   arch/s390/kernel/syscalls/syscall.tbl
>   arch/sh/kernel/syscalls/syscall.tbl
>   arch/sparc/kernel/syscalls/syscall.tbl
>   arch/x86/entry/syscalls/syscall_32.tbl
>   arch/x86/entry/syscalls/syscall_64.tbl
>   arch/xtensa/kernel/syscalls/syscall.tbl
>   include/uapi/asm-generic/unistd.h
> 
> between commits:
> 
>   b0a0c2615f6f ("epoll: wire up syscall epoll_pwait2")
>   450f68e2425e ("epoll: fix compat syscall wire up of epoll_pwait2")
>   ecb8ac8b1f14 ("mm/madvise: introduce process_madvise() syscall: an external 
> memory hinting API")
> 
> from Linus' tree and commit:
> 
>   4cd92d064cb0 ("watch_queue: Implement mount topology and attribute change 
> notifications")
> 
> from the notifications tree.
> 
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging.  You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
> 
> If this is not submitted to Linus during this merge window, please
> either drop it from your linux-next included branch, or at least fix it
> up wrt to the sate of Linus' tree.

How are you going with this?

-- 
Cheers,
Stephen Rothwell


pgpQX4kT2H06H.pgp
Description: OpenPGP digital signature


[PATCH] kbuild: remove deprecated syntax EXTRA_*FLAGS, always, hostprogs-*

2021-01-19 Thread Masahiro Yamada
The backward compatibility has been kept for a while. There is no user
in upstream. Out-of-tree users must be converted to new ones.

Signed-off-by: Masahiro Yamada 
---

 scripts/Makefile.clean |  3 ---
 scripts/Makefile.lib   | 17 -
 2 files changed, 20 deletions(-)

diff --git a/scripts/Makefile.clean b/scripts/Makefile.clean
index d9e0ceace6a6..22a8172bce1f 100644
--- a/scripts/Makefile.clean
+++ b/scripts/Makefile.clean
@@ -34,9 +34,6 @@ __clean-files := \
$(hostprogs-always-y) $(hostprogs-always-m) $(hostprogs-always-) \
$(userprogs-always-y) $(userprogs-always-m) $(userprogs-always-)
 
-# deprecated
-__clean-files  += $(always) $(hostprogs-y) $(hostprogs-m) $(hostprogs-)
-
 __clean-files   := $(filter-out $(no-clean-files), $(__clean-files))
 
 # clean-files is given relative to the current directory, unless it
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index e10b675165cd..b8e587a17dcc 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -1,21 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
-# Backward compatibility
-asflags-y  += $(EXTRA_AFLAGS)
-ccflags-y  += $(EXTRA_CFLAGS)
-cppflags-y += $(EXTRA_CPPFLAGS)
-ldflags-y  += $(EXTRA_LDFLAGS)
-ifneq ($(always),)
-$(warning 'always' is deprecated. Please use 'always-y' instead)
-always-y   += $(always)
-endif
-ifneq ($(hostprogs-y),)
-$(warning 'hostprogs-y' is deprecated. Please use 'hostprogs' instead)
-hostprogs  += $(hostprogs-y)
-endif
-ifneq ($(hostprogs-m),)
-$(warning 'hostprogs-m' is deprecated. Please use 'hostprogs' instead)
-hostprogs  += $(hostprogs-m)
-endif
 
 # flags that take effect in current and sub directories
 KBUILD_AFLAGS += $(subdir-asflags-y)
-- 
2.27.0



Re: [PATCH 1/3] devicetree/bindings: Initial commit of wacom,wacom-i2c

2021-01-19 Thread Alistair Francis
On Tue, Jan 19, 2021 at 6:15 PM Dmitry Torokhov
 wrote:
>
> Hi Alistair,
>
> On Sat, Jan 16, 2021 at 08:24:26PM -0800, Alistair Francis wrote:
> > Signed-off-by: Alistair Francis 
> > ---
> >  .../input/touchscreen/wacom,wacom-i2c.yaml| 55 +++
> >  .../devicetree/bindings/vendor-prefixes.yaml  |  2 +
> >  2 files changed, 57 insertions(+)
> >  create mode 100644 
> > Documentation/devicetree/bindings/input/touchscreen/wacom,wacom-i2c.yaml
> >
> > diff --git 
> > a/Documentation/devicetree/bindings/input/touchscreen/wacom,wacom-i2c.yaml 
> > b/Documentation/devicetree/bindings/input/touchscreen/wacom,wacom-i2c.yaml
> > new file mode 100644
> > index ..6b0e0034f836
> > --- /dev/null
> > +++ 
> > b/Documentation/devicetree/bindings/input/touchscreen/wacom,wacom-i2c.yaml
> > @@ -0,0 +1,55 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/input/touchscreen/wacom,wacom-i2c.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Wacom I2C Controller
> > +
> > +maintainers:
> > +  - Alistair Francis 
> > +
> > +allOf:
> > +  - $ref: touchscreen.yaml#
> > +
> > +properties:
> > +  compatible:
> > +const: wacom,wacom-i2c
> > +
> > +  reg:
> > +maxItems: 1
> > +
> > +  interrupts:
> > +maxItems: 1
> > +
> > +  flip-tilt-x:
> > +  flip-tilt-y:
>
> Does the device support tilt? The driver does not, at least at the
> moment. Also, does it make sense to flip tilt but not position?
>
> > +  flip-pos-x:
> > +  flip-pos-y:
>
> This needs to use standard touchscreen properties. See
> Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml
>
> > +  flip-distance:
>
> I am having trouble understanding when this one would be useful.

Thanks for the review. These came from the original out of tree DT. I
have removed them, I'm planning on using the standard touchscreen ones
you pointed out if they are required.

Alistair

>
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +#include "dt-bindings/interrupt-controller/irq.h"
> > +i2c {
> > +#address-cells = <1>;
> > +#size-cells = <0>;
> > +digitiser@9 {
> > +compatible = "wacom,wacom-i2c";
> > +reg = <0x9>;
> > +interrupt-parent = <>;
> > +interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
> > +flip-tilt-x;
> > +flip-tilt-y;
> > +flip-pos-x;
> > +flip-pos-y;
> > +flip-distance;
> > +};
> > +};
> > diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml 
> > b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> > index 041ae90b0d8f..5bca22f035a3 100644
> > --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
> > +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> > @@ -1202,6 +1202,8 @@ patternProperties:
> >  description: Vision Optical Technology Co., Ltd.
> >"^vxt,.*":
> >  description: VXT Ltd
> > +  "^wacom,.*":
> > +description: Wacom Co., Ltd
> >"^wand,.*":
> >  description: Wandbord (Technexion)
> >"^waveshare,.*":
> > --
> > 2.29.2
> >
>
> Thanks.
>
> --
> Dmitry


[PATCH -V9 2/3] NOT kernel/man2/set_mempolicy.2: Add mode flag MPOL_F_NUMA_BALANCING

2021-01-19 Thread Huang Ying
Signed-off-by: "Huang, Ying" 
Cc: "Alejandro Colomar" 
---
 man2/set_mempolicy.2 | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/man2/set_mempolicy.2 b/man2/set_mempolicy.2
index 68011eecb..fa64a1820 100644
--- a/man2/set_mempolicy.2
+++ b/man2/set_mempolicy.2
@@ -113,6 +113,22 @@ A nonempty
 .I nodemask
 specifies node IDs that are relative to the set of
 node IDs allowed by the process's current cpuset.
+.TP
+.BR MPOL_F_NUMA_BALANCING " (since Linux 5.12)"
+When
+.I mode
+is
+.BR MPOL_BIND ,
+enable the kernel NUMA balancing for the task if it is supported by
+the kernel.
+If the flag isn't supported by the kernel, or is used with
+.I mode
+other than
+.BR MPOL_BIND ,
+return \-1 and
+.I errno
+is set to
+.BR EINVAL .
 .PP
 .I nodemask
 points to a bit mask of node IDs that contains up to
@@ -293,6 +309,12 @@ argument specified both
 .B MPOL_F_STATIC_NODES
 and
 .BR MPOL_F_RELATIVE_NODES .
+Or, the
+.B MPOL_F_NUMA_BALANCING
+isn't supported by the kernel, or is used with
+.I mode
+other than
+.BR MPOL_BIND .
 .TP
 .B ENOMEM
 Insufficient kernel memory was available.
-- 
2.29.2



Re: linux-next: build warning after merge of the v4l-dvb tree

2021-01-19 Thread Stephen Rothwell
Hi all,

On Wed, 13 Jan 2021 15:10:27 +1100 Stephen Rothwell  
wrote:
>
> After merging the v4l-dvb tree, today's linux-next build (htmldocs)
> produced this warning:
> 
> Documentation/driver-api/media/v4l2-subdev.rst:125: WARNING: Inline 
> interpreted text or phrase reference start-string without end-string.
> 
> Introduced by commit
> 
>   25c8d9a7689e ("media: Documentation: v4l: Document that link_validate op is 
> valid for sink only")

I am still getting this warning.

-- 
Cheers,
Stephen Rothwell


pgp5pOQ8eR2bR.pgp
Description: OpenPGP digital signature


Re: linux-next: build warning after merge of the amdgpu tree

2021-01-19 Thread Stephen Rothwell
Hi all,

On Fri, 15 Jan 2021 12:00:14 +1100 Stephen Rothwell  
wrote:
> 
> After merging the amdgpu tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
> 
> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In function 
> 'dm_set_vblank':
> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5380:33: warning: 
> unused variable 'dm' [-Wunused-variable]
>  5380 |  struct amdgpu_display_manager *dm = >dm;
>   | ^~
> 
> Caused by commit
> 
>   98ab5f3513f9 ("drm/amd/display: Fix deadlock during gpu reset v3")

I am still getting this warning.

-- 
Cheers,
Stephen Rothwell


pgpX_3bvJD44e.pgp
Description: OpenPGP digital signature


[PATCH -V9 3/3] NOT kernel/numactl: Support to enable Linux kernel NUMA balancing

2021-01-19 Thread Huang Ying
A new API: numa_set_membind_balancing() is added to libnuma.  It is
same as numa_set_membind() except that the Linux kernel NUMA balancing
will be enabled for the task if the feature is supported by the
kernel.

At the same time, a new option: --balancing (-b) is added to numactl.
Which can be used before the --membind/-m memory policy in the command
line.  With it, the Linux kernel NUMA balancing will be enabled for
the process if --membind/-m is used and the feature is supported by
the kernel.

Signed-off-by: "Huang, Ying" 
---
 libnuma.c | 14 ++
 numa.3| 15 +++
 numa.h|  4 
 numactl.8 | 12 
 numactl.c | 17 ++---
 numaif.h  |  3 +++
 versions.ldscript |  8 
 7 files changed, 70 insertions(+), 3 deletions(-)

diff --git a/libnuma.c b/libnuma.c
index 88f479b..f073c50 100644
--- a/libnuma.c
+++ b/libnuma.c
@@ -1064,6 +1064,20 @@ numa_set_membind_v2(struct bitmask *bmp)
 
 make_internal_alias(numa_set_membind_v2);
 
+void
+numa_set_membind_balancing(struct bitmask *bmp)
+{
+   /* MPOL_F_NUMA_BALANCING: ignore if unsupported */
+   if (set_mempolicy(MPOL_BIND | MPOL_F_NUMA_BALANCING,
+ bmp->maskp, bmp->size + 1) < 0) {
+   if (errno == EINVAL) {
+   errno = 0;
+   numa_set_membind_v2(bmp);
+   } else
+   numa_error("set_mempolicy");
+   }
+}
+
 /*
  * copy a bitmask map body to a numa.h nodemask_t structure
  */
diff --git a/numa.3 b/numa.3
index 3e18098..af01c8f 100644
--- a/numa.3
+++ b/numa.3
@@ -80,6 +80,8 @@ numa \- NUMA policy library
 .br
 .BI "void numa_set_membind(struct bitmask *" nodemask );
 .br
+.BI "void numa_set_membind_balancing(struct bitmask *" nodemask );
+.br
 .B struct bitmask *numa_get_membind(void);
 .sp
 .BI "void *numa_alloc_onnode(size_t " size ", int " node );
@@ -538,6 +540,19 @@ that contains nodes other than those in the mask returned 
by
 .IR numa_get_mems_allowed ()
 will result in an error.
 
+.BR numa_set_membind_balancing ()
+sets the memory allocation mask and enable the Linux kernel NUMA
+balancing for the task if the feature is supported by the kernel.
+The task will only allocate memory from the nodes set in
+.IR nodemask .
+Passing an empty
+.I nodemask
+or a
+.I nodemask
+that contains nodes other than those in the mask returned by
+.IR numa_get_mems_allowed ()
+will result in an error.
+
 .BR numa_get_membind ()
 returns the mask of nodes from which memory can currently be allocated.
 If the returned mask is equal to
diff --git a/numa.h b/numa.h
index bd1d676..5d8543a 100644
--- a/numa.h
+++ b/numa.h
@@ -192,6 +192,10 @@ void numa_set_localalloc(void);
 /* Only allocate memory from the nodes set in mask. 0 to turn off */
 void numa_set_membind(struct bitmask *nodemask);
 
+/* Only allocate memory from the nodes set in mask. Optimize page
+   placement with Linux kernel NUMA balancing if possible. 0 to turn off */
+void numa_set_membind_balancing(struct bitmask *bmp);
+
 /* Return current membind */
 struct bitmask *numa_get_membind(void);
 
diff --git a/numactl.8 b/numactl.8
index f3bb22b..7d52688 100644
--- a/numactl.8
+++ b/numactl.8
@@ -25,6 +25,8 @@ numactl \- Control NUMA policy for processes or shared memory
 [
 .B \-\-all
 ] [
+.B \-\-balancing
+] [
 .B \-\-interleave nodes
 ] [
 .B \-\-preferred node 
@@ -168,6 +170,12 @@ but if memory cannot be allocated there fall back to other 
nodes.
 This option takes only a single node number.
 Relative notation may be used.
 .TP
+.B \-\-balancing, \-b
+Enable Linux kernel NUMA balancing for the process if it is supported by 
kernel.
+This should only be used with
+.I \-\-membind, \-m
+only, otherwise ignored.
+.TP
 .B \-\-show, \-s
 Show NUMA policy settings of the current process. 
 .TP
@@ -278,6 +286,10 @@ numactl \-\-cpunodebind=0 \-\-membind=0,1 -- process -l
 Run process as above, but with an option (-l) that would be confused with
 a numactl option.
 
+numactl \-\-cpunodebind=0 \-\-balancing \-\-membind=0,1 process
+Run process on node 0 with memory allocated on node 0 and 1.  Optimize the
+page placement with Linux kernel NUMA balancing mechanism if possible.
+
 numactl \-\-cpunodebind=netdev:eth0 \-\-membind=netdev:eth0 network-server
 Run network-server on the node of network device eth0 with its memory
 also in the same node.
diff --git a/numactl.c b/numactl.c
index df9dbcb..5a9d2df 100644
--- a/numactl.c
+++ b/numactl.c
@@ -45,6 +45,7 @@ struct option opts[] = {
{"membind", 1, 0, 'm'},
{"show", 0, 0, 's' },
{"localalloc", 0,0, 'l'},
+   {"balancing", 0, 0, 'b'},
{"hardware", 0,0,'H' },
 
{"shm", 1, 0, 'S'},
@@ -65,9 +66,10 @@ struct option opts[] = {
 void usage(void)
 {
fprintf(stderr,
-   "usage: numactl [--all | -a] [--interleave= | -i ] 
[--preferred= | -p ]\n"
-   "   [--physcpubind= | 

[PATCH -V9 1/3] numa balancing: Migrate on fault among multiple bound nodes

2021-01-19 Thread Huang Ying
Now, NUMA balancing can only optimize the page placement among the
NUMA nodes if the default memory policy is used.  Because the memory
policy specified explicitly should take precedence.  But this seems
too strict in some situations.  For example, on a system with 4 NUMA
nodes, if the memory of an application is bound to the node 0 and 1,
NUMA balancing can potentially migrate the pages between the node 0
and 1 to reduce cross-node accessing without breaking the explicit
memory binding policy.

So in this patch, we add MPOL_F_NUMA_BALANCING mode flag to
set_mempolicy() when mode is MPOL_BIND.  With the flag specified, NUMA
balancing will be enabled within the thread to optimize the page
placement within the constrains of the specified memory binding
policy.  With the newly added flag, the NUMA balancing control
mechanism becomes,

- sysctl knob numa_balancing can enable/disable the NUMA balancing
  globally.

- even if sysctl numa_balancing is enabled, the NUMA balancing will be
  disabled for the memory areas or applications with the explicit memory
  policy by default.

- MPOL_F_NUMA_BALANCING can be used to enable the NUMA balancing for the
  applications when specifying the explicit memory policy (MPOL_BIND).

Various page placement optimization based on the NUMA balancing can be
done with these flags.  As the first step, in this patch, if the
memory of the application is bound to multiple nodes (MPOL_BIND), and
in the hint page fault handler the accessing node are in the policy
nodemask, the page will be tried to be migrated to the accessing node
to reduce the cross-node accessing.

If the newly added MPOL_F_NUMA_BALANCING flag is specified by an
application on an old kernel version without its support,
set_mempolicy() will return -1 and errno will be set to EINVAL.  The
application can use this behavior to run on both old and new kernel
versions.

And if the MPOL_F_NUMA_BALANCING flag is specified for the mode other
than MPOL_BIND, set_mempolicy() will return -1 and errno will be set
to EINVAL as before.  Because we don't support optimization based on
the NUMA balancing for these modes.

In the previous version of the patch, we tried to reuse MPOL_MF_LAZY
for mbind().  But that flag is tied to MPOL_MF_MOVE.*, so it seems not
a good API/ABI for the purpose of the patch.

And because it's not clear whether it's necessary to enable NUMA
balancing for a specific memory area inside an application, so we only
add the flag at the thread level (set_mempolicy()) instead of the
memory area level (mbind()).  We can do that when it become necessary.

To test the patch, we run a test case as follows on a 4-node machine
with 192 GB memory (48 GB per node).

1. Change pmbench memory accessing benchmark to call set_mempolicy()
   to bind its memory to node 1 and 3 and enable NUMA balancing.  Some
   related code snippets are as follows,

 #include 
 #include 

struct bitmask *bmp;
int ret;

bmp = numa_parse_nodestring("1,3");
ret = set_mempolicy(MPOL_BIND | MPOL_F_NUMA_BALANCING,
bmp->maskp, bmp->size + 1);
/* If MPOL_F_NUMA_BALANCING isn't supported, fall back to MPOL_BIND */
if (ret < 0 && errno == EINVAL)
ret = set_mempolicy(MPOL_BIND, bmp->maskp, bmp->size + 1);
if (ret < 0) {
perror("Failed to call set_mempolicy");
exit(-1);
}

2. Run a memory eater on node 3 to use 40 GB memory before running pmbench.

3. Run pmbench with 64 processes, the working-set size of each process
   is 640 MB, so the total working-set size is 64 * 640 MB = 40 GB.  The
   CPU and the memory (as in step 1.) of all pmbench processes is bound
   to node 1 and 3. So, after CPU usage is balanced, some pmbench
   processes run on the CPUs of the node 3 will access the memory of
   the node 1.

4. After the pmbench processes run for 100 seconds, kill the memory
   eater.  Now it's possible for some pmbench processes to migrate
   their pages from node 1 to node 3 to reduce cross-node accessing.

Test results show that, with the patch, the pages can be migrated from
node 1 to node 3 after killing the memory eater, and the pmbench score
can increase about 17.5%.

Signed-off-by: "Huang, Ying" 
Acked-by: Mel Gorman 
Cc: Peter Zijlstra 
Cc: Ingo Molnar 
Cc: Rik van Riel 
Cc: Johannes Weiner 
Cc: "Matthew Wilcox (Oracle)" 
Cc: Dave Hansen 
Cc: Andi Kleen 
Cc: Michal Hocko 
Cc: David Rientjes 
Cc: linux-...@vger.kernel.org
---
 include/uapi/linux/mempolicy.h |  4 +++-
 mm/mempolicy.c | 16 
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/include/uapi/linux/mempolicy.h b/include/uapi/linux/mempolicy.h
index 3354774af61e..8948467b3992 100644
--- a/include/uapi/linux/mempolicy.h
+++ b/include/uapi/linux/mempolicy.h
@@ -28,12 +28,14 @@ enum {
 /* Flags for set_mempolicy */
 #define MPOL_F_STATIC_NODES(1 << 15)
 #define MPOL_F_RELATIVE_NODES  (1 << 14)

[PATCH -V9 0/3] numa balancing: Migrate on fault among multiple bound nodes

2021-01-19 Thread Huang Ying
To make it possible to optimize cross-socket memory accessing with
AutoNUMA even if the memory of the application is bound to multiple
NUMA nodes.

Patch [2/3] and [3/3] are NOT kernel patches.  Instead, they are
patches for man-pages and numactl respectively.  They are sent
together to make it easy to review the newly added kernel API.

Changes:

v9:

- Rebased on latest mmotm kernel v5.11-rc3-mmots-2021-01-12-02-00

v8:

- Rebased on latest upstream kernel v5.11-rc2

v7:

- Make set_mempolicy() return -1 with errno is set to EINVAL if mode
  isn't MPOL_BIND per Mel's comments.  Revise document accordingly
  too.

v6:

- Rebased on latest upstream kernel v5.10-rc5

- Added some benchmark data and example in patch description of [1/3]

- Rename AutoNUMA to NUMA Balancing

- Add patches to man-pages [2/3] and numactl [3/3]

v5:

- Remove mbind() support, because it's not clear that it's necessary.

v4:

- Use new flags instead of reuse MPOL_MF_LAZY.

v3:

- Rebased on latest upstream (v5.10-rc3)

- Revised the change log.

v2:

- Rebased on latest upstream (v5.10-rc1)

Best Regards,
Huang, Ying


[PATCH] ARM: vdso: remove unneded extra-y addition

2021-01-19 Thread Masahiro Yamada
The vdso linker script is prepocessed on demand. Adding it to 'targets'
is enough, and line 13 of this Makefile does that. This extra-y addition
is unneeded.

Signed-off-by: Masahiro Yamada 
---

KernelVersion: v5.11-rc1

 arch/arm/vdso/Makefile | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/vdso/Makefile b/arch/arm/vdso/Makefile
index b558bee0e1f6..7c9e395b77f7 100644
--- a/arch/arm/vdso/Makefile
+++ b/arch/arm/vdso/Makefile
@@ -23,7 +23,6 @@ ldflags-y := -Bsymbolic --no-undefined 
-soname=linux-vdso.so.1 \
-T
 
 obj-$(CONFIG_VDSO) += vdso.o
-extra-$(CONFIG_VDSO) += vdso.lds
 CPPFLAGS_vdso.lds += -P -C -U$(ARCH)
 
 CFLAGS_REMOVE_vdso.o = -pg
-- 
2.27.0



Re: [PATCH net-next v4] bonding: add a vlan+srcmac tx hashing option

2021-01-19 Thread patchwork-bot+netdevbpf
Hello:

This patch was applied to netdev/net-next.git (refs/heads/master):

On Mon, 18 Jan 2021 20:09:27 -0500 you wrote:
> This comes from an end-user request, where they're running multiple VMs on
> hosts with bonded interfaces connected to some interest switch topologies,
> where 802.3ad isn't an option. They're currently running a proprietary
> solution that effectively achieves load-balancing of VMs and bandwidth
> utilization improvements with a similar form of transmission algorithm.
> 
> Basically, each VM has it's own vlan, so it always sends its traffic out
> the same interface, unless that interface fails. Traffic gets split
> between the interfaces, maintaining a consistent path, with failover still
> available if an interface goes down.
> 
> [...]

Here is the summary with links:
  - [net-next,v4] bonding: add a vlan+srcmac tx hashing option
https://git.kernel.org/netdev/net-next/c/7b8fc0103bb5

You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html




Re: [PATCH AUTOSEL 5.10 28/45] net: stmmac: Fixed mtu channged by cache aligned

2021-01-19 Thread Jakub Kicinski
On Tue, 19 Jan 2021 20:25:45 -0500 Sasha Levin wrote:
> From: David Wu 
> 
> [ Upstream commit 5b55299eed78538cc4746e50ee97103a1643249c ]
> 
> Since the original mtu is not used when the mtu is updated,
> the mtu is aligned with cache, this will get an incorrect.
> For example, if you want to configure the mtu to be 1500,
> but mtu 1536 is configured in fact.
> 
> Fixed: eaf4fac478077 ("net: stmmac: Do not accept invalid MTU values")
> Signed-off-by: David Wu 
> Link: https://lore.kernel.org/r/20210113034109.27865-1-david...@rock-chips.com
> Signed-off-by: Jakub Kicinski 
> Signed-off-by: Sasha Levin 

This was applied 6 days ago, I thought you said you wait two weeks.
What am I missing?


Re: [PATCH v5 1/3] Remove $(cc-option,-gdwarf-4) dependency from CONFIG_DEBUG_INFO_DWARF4

2021-01-19 Thread Masahiro Yamada
On Sat, Jan 16, 2021 at 8:54 AM Masahiro Yamada  wrote:
>
> On Sat, Jan 16, 2021 at 6:51 AM Nick Desaulniers
>  wrote:
> >
> > On Fri, Jan 15, 2021 at 1:48 PM Sedat Dilek  wrote:
> > >
> > > On Fri, Jan 15, 2021 at 10:06 PM Nick Desaulniers
> > >  wrote:
> > > >
> > > > From: Masahiro Yamada 
> > > >
> > > > The -gdwarf-4 flag is supported by GCC 4.5+, and also by Clang.
> > > >
> > > > You can see it at https://godbolt.org/z/6ed1oW
> > > >
> > > >   For gcc 4.5.3 pane,line 37:.value 0x4
> > > >   For clang 10.0.1 pane, line 117:   .short 4
> > > >
> > > > Given Documentation/process/changes.rst stating GCC 4.9 is the minimal
> > > > version, this cc-option is unneeded.
> > > >
> > > > Note
> > > > 
> > > >
> > > > CONFIG_DEBUG_INFO_DWARF4 controls the DWARF version only for C files.
> > > >
> > > > As you can see in the top Makefile, -gdwarf-4 is only passed to CFLAGS.
> > > >
> > > >   ifdef CONFIG_DEBUG_INFO_DWARF4
> > > >   DEBUG_CFLAGS+= -gdwarf-4
> > > >   endif
> > > >
> > > > This flag is used when compiling *.c files.
> > > >
> > > > On the other hand, the assembler is always given -gdwarf-2.
> > > >
> > > >   KBUILD_AFLAGS   += -Wa,-gdwarf-2
> > > >
> > > > Hence, the debug info that comes from *.S files is always DWARF v2.
> > > > This is simply because GAS supported only -gdwarf-2 for a long time.
> > > >
> > > > Recently, GAS gained the support for --dwarf-[3|4|5] options. [1]
> > > > And, also we have Clang integrated assembler. So, the debug info
> > > > for *.S files might be improved if we want.
> > > >
> > > > In my understanding, the current code is intentional, not a bug.
> > > >
> > > > [1] 
> > > > https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=31bf18645d98b4d3d7357353be840e320649a67d
> > > >
> > > > Reviewed-by: Nick Desaulniers 
> > > > Reviewed-by: Nathan Chancellor 
> > > > Signed-off-by: Masahiro Yamada 
> > >
> > > Subject misses a "kbuild:" label like in all other patches.
> > > You have:
> > > "Remove $(cc-option,-gdwarf-4) dependency from CONFIG_DEBUG_INFO_DWARF4"
> >
> > Ack, I wonder how that happened? Ah well, will fix in v6; thanks for
> > the feedback.
>
>
>
> I will apply this in my tree,
> adding "kbuild:" and fixing the typo pointed out by Fangrui.
>
> You do not need to resend this one.
>



Applied to linux-kbuild.


>
>
>
>
>
>
> > >
> > > - Sedat -
> > >
> > > > ---
> > > >  lib/Kconfig.debug | 1 -
> > > >  1 file changed, 1 deletion(-)
> > > >
> > > > diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
> > > > index 78361f0abe3a..dd7d8d35b2a5 100644
> > > > --- a/lib/Kconfig.debug
> > > > +++ b/lib/Kconfig.debug
> > > > @@ -258,7 +258,6 @@ config DEBUG_INFO_SPLIT
> > > >
> > > >  config DEBUG_INFO_DWARF4
> > > > bool "Generate dwarf4 debuginfo"
> > > > -   depends on $(cc-option,-gdwarf-4)
> > > > help
> > > >   Generate dwarf4 debug info. This requires recent versions
> > > >   of gcc and gdb. It makes the debug information larger.
> > > > --
> > > > 2.30.0.284.gd98b1dd5eaa7-goog
> > > >
> >
> >
> >
> > --
> > Thanks,
> > ~Nick Desaulniers
>
>
>
> --
> Best Regards
> Masahiro Yamada



-- 
Best Regards
Masahiro Yamada


Re: [PATCH] kbuild: doc: remove "Objects which export symbols" section

2021-01-19 Thread Masahiro Yamada
On Sun, Jan 17, 2021 at 8:52 PM Masahiro Yamada  wrote:
>
> EXPORT_SYMBOL is unrelated to makefiles. No need to mention it.
>
> Signed-off-by: Masahiro Yamada 
> ---


Applied to linux-kbuild.

>
>  Documentation/kbuild/makefiles.rst | 8 +---
>  1 file changed, 1 insertion(+), 7 deletions(-)
>
> diff --git a/Documentation/kbuild/makefiles.rst 
> b/Documentation/kbuild/makefiles.rst
> index 9f6a11881951..949f09ea3f1a 100644
> --- a/Documentation/kbuild/makefiles.rst
> +++ b/Documentation/kbuild/makefiles.rst
> @@ -12,7 +12,7 @@ This document describes the Linux kernel Makefiles.
>--- 3.1 Goal definitions
>--- 3.2 Built-in object goals - obj-y
>--- 3.3 Loadable module goals - obj-m
> -  --- 3.4 Objects which export symbols
> +  --- 3.4 
>--- 3.5 Library file goals - lib-y
>--- 3.6 Descending down in directories
>--- 3.7 Non-builtin vmlinux targets - extra-y
> @@ -247,12 +247,6 @@ more details, with real examples.
> kbuild will build an ext2.o file for you out of the individual
> parts and then link this into built-in.a, as you would expect.
>
> -3.4 Objects which export symbols
> -
> -
> -   No special notation is required in the makefiles for
> -   modules exporting symbols.
> -
>  3.5 Library file goals - lib-y
>  --
>
> --
> 2.27.0
>


-- 
Best Regards
Masahiro Yamada


drivers/gpu/drm/kmb/kmb_dsi.c:812:2: warning: unused function 'set_test_mode_src_osc_freq_target_low_bits'

2021-01-19 Thread kernel test robot
Hi Geert,

First bad commit (maybe != root cause):

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   1e2a199f6ccdc15cf111d68d212e2fd4ce65682e
commit: ade896460e4a62f5e4a892a98d254937f6f5b64c drm: DRM_KMB_DISPLAY should 
depend on ARCH_KEEMBAY
date:   2 months ago
config: mips-randconfig-r022-20210120 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
22b68440e1647e16b5ee24b924986207173c02d1)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install mips cross compiling tool for clang build
# apt-get install binutils-mips-linux-gnu
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ade896460e4a62f5e4a892a98d254937f6f5b64c
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout ade896460e4a62f5e4a892a98d254937f6f5b64c
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=mips 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/kmb/kmb_dsi.c:812:2: warning: unused function 
>> 'set_test_mode_src_osc_freq_target_low_bits'
   set_test_mode_src_osc_freq_target_low_bits(struct kmb_dsi
   ^
>> drivers/gpu/drm/kmb/kmb_dsi.c:824:2: warning: unused function 
>> 'set_test_mode_src_osc_freq_target_hi_bits'
   set_test_mode_src_osc_freq_target_hi_bits(struct kmb_dsi
   ^
   fatal error: error in backend: Nested variants found in inline asm string: 
'.if ( 0x00 ) != -1)) 0x00 ) != -1)) : ($( static struct ftrace_branch_data 
__attribute__((__aligned__(4))) __attribute__((__section__("_ftrace_branch"))) 
__if_trace = $( .func = __func__, .file = "arch/mips/include/asm/barrier.h", 
.line = 16, $); 0x00 ) != -1)) : $))) ) && ( (1 << 0) ); .set push; .set 
mips64r2; .rept 1; sync 0x00; .endr; .set pop; .else; ; .endif'
   clang-12: error: clang frontend command failed with exit code 70 (use -v to 
see invocation)
   clang version 12.0.0 (git://gitmirror/llvm_project 
22b68440e1647e16b5ee24b924986207173c02d1)
   Target: mips-unknown-linux-gnu
   Thread model: posix
   InstalledDir: /opt/cross/clang-22b68440e1/bin
   clang-12: note: diagnostic msg:
   Makefile arch drivers include kernel mm scripts source usr


vim +/set_test_mode_src_osc_freq_target_low_bits +812 
drivers/gpu/drm/kmb/kmb_dsi.c

98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  810  
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  811  static inline void
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04 @812 
set_test_mode_src_osc_freq_target_low_bits(struct kmb_dsi *kmb_dsi,
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  813 
   u32 dphy_no,
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  814 
   u32 freq)
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  815  {
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  816 /* Typical rise/fall 
time=166, refer Table 1207 databook,
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  817  * 
sr_osc_freq_target[7:0]
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  818  */
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  819 test_mode_send(kmb_dsi, 
dphy_no, TEST_CODE_SLEW_RATE_DDL_CYCLES,
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  820(freq & 
0x7f));
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  821  }
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  822  
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  823  static inline void
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04 @824 
set_test_mode_src_osc_freq_target_hi_bits(struct kmb_dsi *kmb_dsi,
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  825 
  u32 dphy_no,
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  826 
  u32 freq)
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  827  {
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  828 u32 data;
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  829  
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  830 /* Flag this as high 
nibble */
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  831 data = ((freq >> 6) & 
0x1f) | (1 << 7);
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  832  
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  833 /* Typical rise/fall 
time=166, refer Table 1207 databook,
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  834  * 
sr_osc_freq_target[11:7]
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  835  */
98521f4d4b4cb265 Anitha Chrisanthus 2020-11-04  836 test_mode_send(kmb_dsi, 
dphy_no, TEST_CODE_SLEW_RATE_DDL_CYCLES, data);

Re: linux-next: build failure after merge of the akpm-current tree

2021-01-19 Thread Dan Williams
On Tue, Jan 19, 2021 at 9:25 PM Stephen Rothwell  wrote:
>
> Hi all,
>
> After merging the akpm-current tree, today's linux-next build (powerpc
> ppc64_defconfig) failed like this:
>
> mm/memory_hotplug.c: In function 'move_pfn_range_to_zone':
> mm/memory_hotplug.c:772:24: error: 'ZONE_DEVICE' undeclared (first use in 
> this function)
>   772 |  if (zone_idx(zone) == ZONE_DEVICE) {
>   |^~~
>
> Caused by commit
>
>   e821cf25cfee ("mm: teach pfn_to_online_page() about ZONE_DEVICE section 
> collisions")
>
> I applied the patch from Randy Dunlap for today.
>
> That, however, lead to this warning:
>
> mm/memory_hotplug.c:730:13: warning: 'section_taint_zone_device' defined but 
> not used [-Wunused-function]
>   730 | static void section_taint_zone_device(unsigned long pfn)
>   | ^
>

I sent this one as an alternate:

http://lore.kernel.org/r/16619868.2787408.1710192276369197040.st...@dwillia2-desk3.amr.corp.intel.com


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