[PATCH] serial: 8250_dw: Use 64-bit access for OCTEON.

Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- drivers/tty/serial/8250/8250_dw.c | 55 +-- 1 file changed, 41 insertions(+), 14 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index beea6ca..6232d15

[PATCH 0/3] MIPS: OCTEON: flash: syncronize bootbus access

- Use semaphore to protect access to bootbus. - Use device tree to probe for flash chips. David Daney (3): MIPS: OCTEON: Add semaphore to serialize bootbus accesses. MIPS: OCTEON: Protect accesses to bootbus flash with octeon_bootbus_sem. MIPS: OCTEON: Use device tree to probe for

[PATCH 1/3] MIPS: OCTEON: Add semaphore to serialize bootbus accesses.

...@auriga.com: combine the patches] Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com --- arch/mips/cavium-octeon/setup.c | 3 +++ arch/mips/include/asm/octeon/octeon.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/arch/mips

[PATCH 3/3] MIPS: OCTEON: Use device tree to probe for flash chips.

From: David Daney david.da...@cavium.com Don't assume they are there, the device tree will tell us. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/flash_setup.c | 42 ++- 1

[PATCH 2/3] MIPS: OCTEON: Protect accesses to bootbus flash with octeon_bootbus_sem.

From: David Daney david.da...@cavium.com Without this, we get bus errors. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/Kconfig | 1 + arch/mips/cavium-octeon/flash_setup.c | 42

[PATCH v2 00/12] MIPS: OCTEON: Some partial support for Octeon III

Octeon code and introduce some partial support for Octeon III and little-endian. Aleksey Makarov (1): MIPS: OCTEON: Delete unused COP2 saving code Chandrakala Chavva (1): MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register David Daney (10): MIPS: OCTEON: Save/Restore wider

[PATCH v2 03/12] MIPS: OCTEON: Save and restore CP2 SHA3 state

From: David Daney david.da...@cavium.com Allocate new save space, and then save/restore the registers if OCTEON III. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/include/asm/processor.h | 2 ++ arch/mips/kernel/asm

[PATCH v2 01/12] MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs

...@caviumnetworks.com [aleksey.maka...@auriga.com: conflict resolution, support for old compilers] Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/setup.c | 37 ++ arch/mips/include/asm/octeon/octeon.h | 13 arch/mips

[PATCH v2 02/12] MIPS: OCTEON: Fix FP context save.

From: David Daney david.da...@cavium.com It wasn't being saved on task switch. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/kernel/octeon_switch.S | 19 +++ 1 file changed, 7 insertions(+), 12 deletions

[PATCH v2 07/12] MIPS: OCTEON: Don't do acknowledge operations for level triggered irqs.

From: David Daney david.da...@cavium.com The acknowledge bits don't exist for level triggered irqs, so setting them causes the simulator to terminate. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Leonid Rosenboim lrosenb...@caviumnetworks.com Signed-off-by: Aleksey Makarov

[PATCH v2 06/12] MIPS: OCTEON: Implement the core-16057 workaround

From: David Daney david.da...@cavium.com Disable ICache prefetch for certian Octeon II processors. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- .../asm/mach-cavium-octeon/kernel-entry-init.h | 22 ++ 1

[PATCH v2 05/12] MIPS: OCTEON: Delete unused COP2 saving code

Commit 2c952e06e4f5 (MIPS: Move cop2 save/restore to switch_to()) removes assembler code to store COP2 registers. Commit a36d8225bceb (MIPS: OCTEON: Enable use of FPU) mistakenly restores it Fixes: a36d8225bceb (MIPS: OCTEON: Enable use of FPU) Signed-off-by: Aleksey Makarov aleksey.maka

[PATCH v2 04/12] MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register

From: Chandrakala Chavva ccha...@caviumnetworks.com Use dmfc0/dmtc0 instructions for reading CvmMemCtl COP0 register, its a 64-bit wide. Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/kernel/octeon_switch.S

[PATCH v2 08/12] MIPS: OCTEON: Add ability to used an initrd from a named memory block.

resolution] Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/setup.c | 37 + arch/mips/include/asm/bootinfo.h | 1 + arch/mips/kernel/setup.c | 19 --- 3 files changed, 50 insertions(+), 7 deletions(-) diff

[PATCH v2 09/12] MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.h

From: David Daney david.da...@cavium.com Also update union octeon_cvmemctl with new OCTEON II fields. Signed-off-by: David Daney david.da...@cavium.com [aleksey.maka...@auriga.com: use __BITFIELD_FIELD] Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/include/asm/octeon

[PATCH v2 12/12] MIPS: OCTEON: Handle OCTEON III in csrc-octeon.

From: David Daney david.da...@cavium.com The clock divisors are kept in different registers on OCTEON III. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/csrc-octeon.c | 34

[PATCH v2 11/12] MIPS: OCTEON: Update octeon-model.h code for new SoCs.

From: David Daney david.da...@cavium.com Add coverage for OCTEON III models. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/include/asm/octeon/octeon-model.h | 65 - 1 file changed, 63

[PATCH] MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.h

From: David Daney david.da...@cavium.com Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/include/asm/processor.h | 6 -- 1 file changed, 6 deletions(-) diff --git a/arch/mips/include/asm/processor.h b/arch/mips

[PATCH 00/14] MIPS: OCTEON: Some partial support for Octeon III

These patches fix some issues in the Cavium Octeon code and introduce some partial support for Octeon III and little-endian. Aleksey Makarov (1): MIPS: OCTEON: Delete unused COP2 saving code Chandrakala Chavva (1): MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register David

[PATCH 02/14] MIPS: OCTEON: Fix FP context save.

From: David Daney david.da...@cavium.com It wasn't being saved on task switch. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/kernel/octeon_switch.S | 19 +++ 1 file changed, 7 insertions(+), 12 deletions

[PATCH 01/14] MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs

...@caviumnetworks.com [aleksey.maka...@auriga.com: conflict resolution, support for old compilers] Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/setup.c | 37 ++ arch/mips/include/asm/octeon/octeon.h | 13 arch/mips

[PATCH 04/14] MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register

From: Chandrakala Chavva ccha...@caviumnetworks.com Use dmfc0/dmtc0 instructions for reading CvmMemCtl COP0 register, its a 64-bit wide. Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/kernel/octeon_switch.S

[PATCH 03/14] MIPS: OCTEON: Save and restore CP2 SHA3 state

From: David Daney david.da...@cavium.com Allocate new save space, and then save/restore the registers if OCTEON III. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/include/asm/processor.h | 2 ++ arch/mips/kernel/asm

[PATCH 05/14] MIPS: OCTEON: Delete unused COP2 saving code

Commit 2c952e06e4f5 (MIPS: Move cop2 save/restore to switch_to()) removes assembler code to store COP2 registers. Commit a36d8225bceb (MIPS: OCTEON: Enable use of FPU) mistakenly restores it Fixes: a36d8225bceb (MIPS: OCTEON: Enable use of FPU) Signed-off-by: Aleksey Makarov aleksey.maka

[PATCH 08/14] MIPS: OCTEON: Don't do acknowledge operations for level triggered irqs.

From: David Daney david.da...@cavium.com The acknowledge bits don't exist for level triggered irqs, so setting them causes the simulator to terminate. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Leonid Rosenboim lrosenb...@caviumnetworks.com Signed-off-by: Aleksey Makarov

[PATCH 12/14] MIPS: OCTEON: Update octeon-model.h code for new SoCs.

From: David Daney david.da...@cavium.com Add coverage for OCTEON III models. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/include/asm/octeon/octeon-model.h | 65 - 1 file changed, 63

[PATCH 14/14] MIPS: OCTEON: Handle OCTEON III in csrc-octeon.

From: David Daney david.da...@cavium.com The clock divisors are kept in different registers on OCTEON III. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/csrc-octeon.c | 10 ++ 1 file changed, 10

[PATCH 13/14] MIPS: OCTEON: Add register definitions for OCTEON III reset unit.

From: David Daney david.da...@cavium.com Needed by follow-on patches. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/include/asm/octeon/cvmx-rst-defs.h | 441 +++ 1 file changed, 441 insertions

[PATCH 10/14] MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.h

From: David Daney david.da...@cavium.com Also update union octeon_cvmemctl with new OCTEON II fields. Signed-off-by: David Daney david.da...@cavium.com [aleksey.maka...@auriga.com: use __BITFIELD_FIELD] Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/include/asm/octeon

[PATCH 09/14] MIPS: OCTEON: Add ability to used an initrd from a named memory block.

resolution] Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/setup.c | 37 + arch/mips/include/asm/bootinfo.h | 1 + arch/mips/kernel/setup.c | 19 --- 3 files changed, 50 insertions(+), 7 deletions(-) diff

[PATCH 06/14] MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.h

From: David Daney david.da...@cavium.com Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/include/asm/processor.h | 6 -- 1 file changed, 6 deletions(-) diff --git a/arch/mips/include/asm/processor.h b/arch/mips

[PATCH 07/14] MIPS: OCTEON: Implement the core-16057 workaround

From: David Daney david.da...@cavium.com Disable ICache prefetch for certian Octeon II processors. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- .../asm/mach-cavium-octeon/kernel-entry-init.h | 22 ++ 1

Re: [PATCH 09/14] MIPS: OCTEON: Add ability to used an initrd from a named memory block.

On 12/15/2014 11:53 PM, Aaro Koskinen wrote: On Mon, Dec 15, 2014 at 09:03:15PM +0300, Aleksey Makarov wrote: From: David Daney david.da...@cavium.com If 'rd_name=xxx' is passed to the kernel, the named block with name 'xxx' is used for the initrd. Maybe use initrd_name for consistency

[PATCH v2] SATA: OCTEON: support SATA on OCTEON platform

The OCTEON SATA controller is currently found on cn71XX devices. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Vinita Gupta vgu...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- Version 1: https://lkml.kernel.org/g/1421681040-3392-1-git-send

[PATCH v2] mmc: OCTEON: Add host driver for OCTEON MMC controller

-by: Aaron Williams aaron.willi...@cavium.com Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com Signed-off-by: Peter Swain psw...@cavium.com [aleksey.maka...@auriga.com: preparation for submission] Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- This patch should be applied

[PATCH] mmc: OCTEON: Add host driver for OCTEON MMC controller

Signed-off-by: Aaron Williams aaron.willi...@cavium.com Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com Signed-off-by: Peter Swain psw...@cavium.com [aleksey.maka...@auriga.com: preparation for submission] Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- This patch should

[PATCH] SATA: OCTEON: support SATA on OCTEON platform

The OCTEON SATA controller is currently found on cn71XX devices. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Vinita Gupta vgu...@caviumnetworks.com [aleksey.maka...@auriga.com: preparing for submission, conflict resolution, fixes for the platform code] Signed-off-by: Aleksey

[PATCH v3 01/15] MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs

...@caviumnetworks.com [aleksey.maka...@auriga.com: conflict resolution, support for old compilers] Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/setup.c | 37 ++ arch/mips/include/asm/octeon/octeon.h | 13 arch/mips

[PATCH v3 15/15] MIPS: OCTEON: irq: add CIB and other fixes

Rosenboim lrosenb...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com Signed-off-by: Peter Swain peter.sw...@cavium.com --- .../devicetree/bindings/mips/cavium/cib.txt| 43 + arch/mips/cavium-octeon/octeon-irq.c | 1049 +++- 2 files

[PATCH v3 04/15] MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register

From: Chandrakala Chavva ccha...@caviumnetworks.com Use dmfc0/dmtc0 instructions for reading CvmMemCtl COP0 register, its a 64-bit wide. Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/kernel/octeon_switch.S

[PATCH v3 07/15] MIPS: OCTEON: Add ability to used an initrd from a named memory block.

resolution] Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/setup.c | 37 + arch/mips/include/asm/bootinfo.h | 1 + arch/mips/kernel/setup.c | 19 --- 3 files changed, 50 insertions(+), 7 deletions(-) diff

[PATCH v3 13/15] MIPS: OCTEON: More OCTEONIII support

From: Chandrakala Chavva ccha...@caviumnetworks.com Read clock rate from the correct CSR. Don't clear COP0_DCACHE for OCTEONIII. Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com Signed-off-by: David Daney david.da

[PATCH v3 10/15] MIPS: OCTEON: Update octeon-model.h code for new SoCs.

From: David Daney david.da...@cavium.com Add coverage for OCTEON III models. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/dma-octeon.c | 4 +- .../cavium-octeon/executive/cvmx-helper

[PATCH v3 14/15] MIPS: OCTEON: Don't do acknowledge operations for level triggered irqs.

From: David Daney david.da...@cavium.com The acknowledge bits don't exist for level triggered irqs, so setting them causes the simulator to terminate. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Leonid Rosenboim lrosenb...@caviumnetworks.com Signed-off-by: Aleksey Makarov

[PATCH v3 11/15] MIPS: OCTEON: Core-15169 Workaround and general CVMSEG cleanup.

From: David Daney david.da...@cavium.com Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/setup.c | 4 +--- .../asm/mach-cavium-octeon/kernel-entry-init.h| 19

[PATCH v3 05/15] MIPS: OCTEON: Delete unused COP2 saving code

Commit 2c952e06e4f5 (MIPS: Move cop2 save/restore to switch_to()) removes assembler code to store COP2 registers. Commit a36d8225bceb (MIPS: OCTEON: Enable use of FPU) mistakenly restores it Fixes: a36d8225bceb (MIPS: OCTEON: Enable use of FPU) Signed-off-by: Aleksey Makarov aleksey.maka

[PATCH v3 03/15] MIPS: OCTEON: Save and restore CP2 SHA3 state

From: David Daney david.da...@cavium.com Allocate new save space, and then save/restore the registers if OCTEON III. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/include/asm/processor.h | 2 ++ arch/mips/kernel/asm

[PATCH v3 08/15] MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.h

From: David Daney david.da...@cavium.com Also update union octeon_cvmemctl with new OCTEON II fields. Signed-off-by: David Daney david.da...@cavium.com [aleksey.maka...@auriga.com: use __BITFIELD_FIELD] Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/include/asm/octeon

[PATCH v3 02/15] MIPS: OCTEON: Fix FP context save.

From: David Daney david.da...@cavium.com It wasn't being saved on task switch. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/kernel/octeon_switch.S | 19 +++ 1 file changed, 7 insertions(+), 12 deletions

[PATCH v3 12/15] MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.

...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- .../asm/mach-cavium-octeon/kernel-entry-init.h | 20 1 file changed, 20 deletions(-) diff --git a/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h b/arch/mips/include/asm/mach

[PATCH v3 06/15] MIPS: OCTEON: Implement the core-16057 workaround

From: David Daney david.da...@cavium.com Disable ICache prefetch for certian Octeon II processors. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- .../asm/mach-cavium-octeon/kernel-entry-init.h | 22 ++ 1

[PATCH v3 00/15] MIPS: OCTEON: Some partial support for Octeon III

__KERNEL__ from asm/processor.h will be sent separately as it is not OCTEON specific Summary: These patches fix some issues in the Cavium Octeon code and introduce some partial support for Octeon III and little-endian. Also irq code was changed to support SATA and some other interrutps. Aleksey

[PATCH v4] mmc: OCTEON: Add host driver for OCTEON MMC controller

-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com Signed-off-by: Leonid Rosenboim lrosenb...@caviumnetworks.com Signed-off-by: Peter Swain psw...@cavium.com Signed-off-by: Aaron Williams aaron.willi...@cavium.com --- .../devicetree/bindings/mmc/octeon

Re: [PATCH v4] SATA: OCTEON: support SATA on OCTEON platform

with an extra set of soc-specific registers to set up. This is not an option, because the device tree ABI is deployed and fixed, and deriving sata driver does not fit it well. Thanks Aleksey Makarov -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message

[PATCH v5] SATA: OCTEON: support SATA on OCTEON platform

The OCTEON SATA controller is currently found on cn71XX devices. Cc: Arnd Bergmann a...@arndb.de Acked-by: Hans de Goede hdego...@redhat.com Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Vinita Gupta vgu...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka

[PATCH 1/3] MIPS: OCTEON: Handle bootloader structures in little-endian mode.

From: David Daney david.da...@cavium.com Compensate for the differences in the layout of in-memory bootloader information as seen from little-endian mode. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon

[PATCH 0/3] mips: OCTEON: Support for little-endian mode

These patches enable compiling and booting kernel on Octeon boards in little-endian mode. David Daney (3): MIPS: OCTEON: Handle bootloader structures in little-endian mode. MIPS: OCTEON: Add mach-cavium-octeon/mangle-port.h MIPS: OCTEON: Enable little endian kernel. arch/mips/Kconfig

[PATCH 3/3] MIPS: OCTEON: Enable little endian kernel.

From: David Daney david.da...@cavium.com Now it is supported, so let people select it. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Leonid Rosenboim lrosenb...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/Kconfig | 3 ++- 1 file

[PATCH 2/3] MIPS: OCTEON: Add mach-cavium-octeon/mangle-port.h

From: David Daney david.da...@cavium.com Needed for little-endian ioport access. This fixes NOR flash in little-endian mode Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- .../include/asm/mach-cavium-octeon/mangle-port.h | 74

[PATCH v4] SATA: OCTEON: support SATA on OCTEON platform

The OCTEON SATA controller is currently found on cn71XX devices. Cc: Arnd Bergmann a...@arndb.de Acked-by: Hans de Goede hdego...@redhat.com Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Vinita Gupta vgu...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka

[PATCH v2] MIPS: OCTEON: Use correct CSR to soft reset

From: Chandrakala Chavva ccha...@caviumnetworks.com Also delete unused cvmx_reset_octeon() This fixes reboot for Octeon III boards Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/setup.c | 5

[PATCH v2 2/3] MIPS: OCTEON: Protect accesses to bootbus flash with octeon_bootbus_sem.

From: David Daney david.da...@cavium.com Without this, we get bus errors. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/Kconfig | 1 + arch/mips/cavium-octeon/flash_setup.c | 42

[PATCH v2 0/3] MIPS: OCTEON: flash: syncronize bootbus access

Changes in v2: - Rebase to v4.0-rc2 Summary: - Use semaphore to protect access to bootbus. - Use device tree to probe for flash chips. Version 1: https://lkml.kernel.org/g/1419337623-16101-1-git-send-email-aleksey.maka...@auriga.com David Daney (3): MIPS: OCTEON: Add semaphore to

[PATCH v2 1/3] MIPS: OCTEON: Add semaphore to serialize bootbus accesses.

...@auriga.com: combine the patches] Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com --- arch/mips/cavium-octeon/setup.c | 3 +++ arch/mips/include/asm/octeon/octeon.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/arch/mips

[PATCH v2 3/3] MIPS: OCTEON: Use device tree to probe for flash chips.

From: David Daney david.da...@cavium.com Don't assume they are there, the device tree will tell us. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/flash_setup.c | 42 ++- 1

[PATCH v3] mmc: OCTEON: Add host driver for OCTEON MMC controller

-by: Aaron Williams aaron.willi...@cavium.com Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com Signed-off-by: Peter Swain psw...@cavium.com [aleksey.maka...@auriga.com: preparation for submission] Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- .../devicetree/bindings/mmc

[PATCH v3] SATA: OCTEON: support SATA on OCTEON platform

The OCTEON SATA controller is currently found on cn71XX devices. Signed-off-by: David Daney david.da...@cavium.com Signed-off-by: Vinita Gupta vgu...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- Version 2: https://lkml.kernel.org/g/1422038495-5204-1-git-send

[PATCH] MIPS: OCTEON: Use correct CSR to soft reset

From: Chandrakala Chavva ccha...@caviumnetworks.com This fixes reboot for Octeon III boards Signed-off-by: Chandrakala Chavva ccha...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- arch/mips/cavium-octeon/setup.c | 5 - arch/mips/include/asm/octeon

[PATCH net-next v3 0/2] Adding support for Cavium ThunderX network controller

-10061-1-git-send-email-r...@kernel.org v1: https://lkml.kernel.org/g/20141030165434.GW20170@rric.localhost Aleksey Makarov (1): pci: Add Cavium PCI vendor id Sunil Goutham (1): net: Adding support for Cavium ThunderX network controller MAINTAINERS|7

[PATCH net-next v3 1/2] pci: Add Cavium PCI vendor id

Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- include/linux/pci_ids.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index e63c02a..3633cc6 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2327,6

Re: [PATCH net-next v3 1/2] pci: Add Cavium PCI vendor id

Author of this patch is Author: Sunil Goutham sgout...@cavium.com Sorry for this. It will be fixed in next versions. On 05/15/2015 08:36 PM, Aleksey Makarov wrote: Signed-off-by: Aleksey Makarov aleksey.maka...@auriga.com --- include/linux/pci_ids.h | 2 ++ 1 file changed, 2 insertions

[PATCH net-next v4 0/2] Adding support for Cavium ThunderX network controller

This patchset adds support for the Cavium ThunderX network controller. changes in v4: * the patch pci: Add Cavium PCI vendor id was attributed correctly * a note that Cavium id is used in many drivers was added * the license comments now match MODULE_LICENSE * a comment explaining usage of

[PATCH net-next v4 1/2] pci: Add Cavium PCI vendor id

From: Sunil Goutham sgout...@cavium.com This vendor id will be used by network (vNIC), USB (xHCI), SATA (AHCI), GPIO, I2C, MMC and maybe other drivers for ThunderX SoC. Acked-by: Bjorn Helgaas bhelg...@google.com Signed-off-by: Sunil Goutham sgout...@cavium.com Signed-off-by: Aleksey Makarov

Re: [PATCH v4] mmc: OCTEON: Add host driver for OCTEON MMC controller

On 05/18/2015 02:05 PM, Aaro Koskinen wrote: Hi, On Mon, Mar 16, 2015 at 06:06:00PM +0300, Aleksey Makarov wrote: The OCTEON MMC controller is currently found on cn61XX and cnf71XX devices. Device parameters are configured from device tree data. eMMC, MMC and SD devices are supported

[PATCH 00/10] net: thunderx: fix problems reported by static check tools

These are fixes for the problems that were reported by static check tools. Aleksey Makarov (9): net: thunderx: fix constants net: thunderx: introduce a function for mailbox access net: thunderx: rework mac address handling net: thunderx: delete unused variables net: thunderx: add static

[PATCH 02/10] net: thunderx: fix constants

This fixes sparse messages like this: drivers/net/ethernet/cavium/thunder/thunder_bgx.c:897:24: sparse: constant 0x3000 is so big it is long Reported-by: kbuild test robot fengguang...@intel.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet

[PATCH 03/10] net: thunderx: introduce a function for mailbox access

This fixes sparse message: drivers/net/ethernet/cavium/thunder/nicvf_main.c:153:25: sparse: cast to restricted __le64 Reported-by: kbuild test robot fengguang...@intel.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet/cavium/thunder/nicvf_main.c | 27

[PATCH 04/10] net: thunderx: rework mac address handling

This fixes sparse message: drivers/net/ethernet/cavium/thunder/nicvf_main.c:385:40: sparse: cast to restricted __le64 Reported-by: kbuild test robot fengguang...@intel.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet/cavium/thunder/nic.h | 4

[PATCH 07/10] net: thunderx: fix nicvf_set_rxfh()

; 524 } regards, dan carpenter Reported-by: Dan Carpenter dan.carpen...@oracle.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net

[PATCH 01/10] net: thunderx: Cleanup duplicate NODE_ID macros, add nic_get_node_id()

From: Robert Richter rrich...@cavium.com There are duplicate NODE_ID macro definitions. Move all of them to nic.h for usage in nic and bgx driver and introduce nic_get_node_id() helper function. This patch also fixes 64bit mask which should have been ULL by reworking the node calculation.

[PATCH 08/10] net: thunderx: remove unneeded type conversions

No need to cast void* to u8*: pointer arithmetics works same way for both. Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet/cavium/thunder/nicvf_queues.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/ethernet/cavium

[PATCH 06/10] net: thunderx: add static

This fixes sparse messages like this: drivers/net/ethernet/cavium/thunder/nicvf_main.c:1141:26: sparse: symbol 'nicvf_get_stats64' was not declared. Should it be static? Also remove unused declarations Reported-by: kbuild test robot fengguang...@intel.com Signed-off-by: Aleksey Makarov

[PATCH 09/10] net: thunderx: check if memory allocation was successful

q_len * TSO_HEADER_SIZE, 369sq-tso_hdrs_phys, GFP_KERNEL); 370 if (!sq-tso_hdrs) Reported-by: kbuild test robot fengguang...@intel.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com

[PATCH 10/10] net: thunderx: use GFP_KERNEL in thread context

GFP_KERNEL should be used in the thread context Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet/cavium/thunder/nicvf_queues.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_queues.c b

[PATCH 05/10] net: thunderx: delete unused variables

They were left from development stage Reported-by: kbuild test robot fengguang...@intel.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet/cavium/thunder/thunder_bgx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net

[PATCH net-next v6 0/2] Adding support for Cavium ThunderX network controller

This patchset adds support for the Cavium ThunderX network controller. changes in v6: * unused preprocessor symbols were removed * reduce no of atomic operations in SQ maintenance * support for TCP segmentation at driver level * reset RBDR if fifo state is FAIL * fixed an issue with link

[PATCH net-next v6 1/2] pci: Add Cavium PCI vendor id

From: Sunil Goutham sgout...@cavium.com This vendor id will be used by network (vNIC), USB (xHCI), SATA (AHCI), GPIO, I2C, MMC and maybe other drivers for ThunderX SoC. Acked-by: Bjorn Helgaas bhelg...@google.com Signed-off-by: Sunil Goutham sgout...@cavium.com Signed-off-by: Aleksey Makarov

[PATCH net-next v5 0/2] Adding support for Cavium ThunderX network controller

This patchset adds support for the Cavium ThunderX network controller. changes in v5: * __packed were removed. now we rely on C language ABI * nic_dbg() - netdev_dbg() * fixes for a typo, constant spelling and using BIT_ULL * use print_hex_dump() * unnecessary conditions in a long if()

[PATCH net-next v5 1/2] pci: Add Cavium PCI vendor id

From: Sunil Goutham sgout...@cavium.com This vendor id will be used by network (vNIC), USB (xHCI), SATA (AHCI), GPIO, I2C, MMC and maybe other drivers for ThunderX SoC. Acked-by: Bjorn Helgaas bhelg...@google.com Signed-off-by: Sunil Goutham sgout...@cavium.com Signed-off-by: Aleksey Makarov

[PATCH net 07/11] net: thunderx: Wakeup TXQ only if CQE_TX are processed

-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet/cavium/thunder/nic.h | 3 +- .../net/ethernet/cavium/thunder/nicvf_ethtool.c| 3 +- drivers/net/ethernet/cavium/thunder/nicvf_main.c | 40 +++--- 3 files changed, 31 insertions

[PATCH net 00/11] net: thunderx: Misc fixes

Miscellaneous fixes for the ThunderX VNIC driver All the patches can be applied individually. It's ok to drop some if the maintainer feels uncomfortable with applying for 4.2. Sunil Goutham (10): net: thunderx: Fix data integrity issues with LDWB net: thunderx: Fix memory leak while tearing

[PATCH net 02/11] net: thunderx: Fix memory leak while tearing down interface

From: Sunil Goutham sgout...@cavium.com Fixed 'tso_hdrs' memory not being freed properly. Also fixed SQ skbuff maintenance issues. Signed-off-by: Sunil Goutham sgout...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet/cavium/thunder

[PATCH net 03/11] net: thunderx: Fix RQ_DROP miscalculation

notifications taking first half of CQ under heavy load and time taken by NAPI to clear transmit notifications will increase with higher queue sizes. Again results in SQ being stopped. Signed-off-by: Sunil Goutham sgout...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com

[PATCH net 04/11] net: thunderx: Fix memory leak when changing queue count

From: Sunil Goutham sgout...@cavium.com Fix for memory leak when changing queue/channel count via ethtool Signed-off-by: Sunil Goutham sgout...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- .../net/ethernet/cavium/thunder/nicvf_ethtool.c| 23

[PATCH net 09/11] net: thunderx: Fix crash when changing rss with mutliple traffic flows

Goutham sgout...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet/cavium/thunder/nicvf_main.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_main.c b/drivers/net/ethernet/cavium

[PATCH net 05/11] net: thunderx: Fix TSO packet statistic

From: Sunil Goutham sgout...@cavium.com Fixing TSO packages not being counted. Signed-off-by: Sunil Goutham sgout...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet/cavium/thunder/nicvf_queues.c | 1 + 1 file changed, 1 insertion(+) diff

[PATCH net 01/11] net: thunderx: Fix data integrity issues with LDWB

rrich...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet/cavium/thunder/nicvf_queues.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_queues.c b/drivers/net/ethernet/cavium/thunder

[PATCH net 11/11] net: thunderx: Fix for crash while BGX teardown

...@caviumnetworks.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet/cavium/thunder/thunder_bgx.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/cavium/thunder/thunder_bgx.c b/drivers/net/ethernet/cavium/thunder

[PATCH net 06/11] net: thunderx: Suppress alloc_pages() failure warnings

not be allocated. Signed-off-by: Sunil Goutham sgout...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet/cavium/thunder/nicvf_queues.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/cavium/thunder

[PATCH net 08/11] net: thunderx: Set watchdog timeout value

From: Sunil Goutham sgout...@cavium.com If a txq (SQ) remains in stopped state after this timeout its considered as stuck and interface is reinited. Signed-off-by: Sunil Goutham sgout...@cavium.com Signed-off-by: Aleksey Makarov aleksey.maka...@caviumnetworks.com --- drivers/net/ethernet/cavium

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